Merge branch 'master' of git://git.denx.de/u-boot-arc

[karo-tx-uboot.git] / drivers / mtd / onenand / samsung.c

diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index c9d33ec825004500b4b9056f376c03be8a279181..5e56a2954df6e480ce4b3b9a3b19d7a2485c1142 100644 (file)
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -1,5 +1,5 @@
 /*
- * S3C64XX/S5PC100 OneNAND driver at U-Boot
+ * S5PC100 OneNAND driver at U-Boot
  *
  * Copyright (C) 2008-2009 Samsung Electronics
  * Kyungmin Park <kyungmin.park@samsung.com>
@@ -7,44 +7,20 @@
  * Implementation:
  *     Emulate the pseudo BufferRAM
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <malloc.h>
-#include <linux/mtd/compat.h>
+#include <linux/compat.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/onenand.h>
+#include <linux/mtd/flashchip.h>
 #include <linux/mtd/samsung_onenand.h>
 
 #include <asm/io.h>
 #include <asm/errno.h>
 
-#ifdef ONENAND_DEBUG
-#define DPRINTK(format, args...)                                       \
-do {                                                                   \
-       printf("%s[%d]: " format "\n", __func__, __LINE__, ##args);     \
-} while (0)
-#else
-#define DPRINTK(...)                   do { } while (0)
-#endif
-
 #define ONENAND_ERASE_STATUS           0x00
 #define ONENAND_MULTI_ERASE_SET                0x01
 #define ONENAND_ERASE_START            0x03
@@ -62,12 +38,7 @@ do {                                                                 \
 #define ONENAND_MAIN_SPARE_ACCESS      0x16
 #define ONENAND_PIPELINE_READ          0x4000
 
-#if defined(CONFIG_S3C64XX)
-#define MAP_00                         (0x0 << 24)
-#define MAP_01                         (0x1 << 24)
-#define MAP_10                         (0x2 << 24)
-#define MAP_11                         (0x3 << 24)
-#elif defined(CONFIG_S5P)
+#if defined(CONFIG_S5P)
 #define MAP_00                         (0x0 << 26)
 #define MAP_01                         (0x1 << 26)
 #define MAP_10                         (0x2 << 26)
@@ -116,12 +87,7 @@ static void s3c_write_cmd(int value, unsigned int cmd)
  * return the buffer address on the memory device
  * It will be combined with CMD_MAP_XX
  */
-#if defined(CONFIG_S3C64XX)
-static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
-{
-       return (fba << 12) | (fpa << 6) | (fsa << 4);
-}
-#elif defined(CONFIG_S5P)
+#if defined(CONFIG_S5P)
 static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
 {
        return (fba << 13) | (fpa << 7) | (fsa << 5);
@@ -550,45 +516,6 @@ static void s3c_onenand_unlock_all(struct mtd_info *mtd)
        s3c_onenand_check_lock_status(mtd);
 }
 
-#ifdef CONFIG_S3C64XX
-static void s3c_set_width_regs(struct onenand_chip *this)
-{
-       int dev_id, density;
-       int fba, fpa, fsa;
-       int dbs_dfs;
-
-       dev_id = DEVICE_ID0_REG;
-
-       density = (dev_id >> ONENAND_DEVICE_DENSITY_SHIFT) & 0xf;
-       dbs_dfs = !!(dev_id & ONENAND_DEVICE_IS_DDP);
-
-       fba = density + 7;
-       if (dbs_dfs)
-               fba--;          /* Decrease the fba */
-       fpa = 6;
-       if (density >= ONENAND_DEVICE_DENSITY_512Mb)
-               fsa = 2;
-       else
-               fsa = 1;
-
-       DPRINTK("FBA %lu, FPA %lu, FSA %lu, DDP %lu",
-               FBA_WIDTH0_REG, FPA_WIDTH0_REG, FSA_WIDTH0_REG,
-               DDP_DEVICE_REG);
-
-       DPRINTK("mem_cfg0 0x%lx, sync mode %lu, "
-               "dev_page_size %lu, BURST LEN %lu",
-               MEM_CFG0_REG, SYNC_MODE_REG,
-               DEV_PAGE_SIZE_REG, BURST_LEN0_REG);
-
-       DEV_PAGE_SIZE_REG = 0x1;
-
-       FBA_WIDTH0_REG = fba;
-       FPA_WIDTH0_REG = fpa;
-       FSA_WIDTH0_REG = fsa;
-       DBS_DFS_WIDTH0_REG = dbs_dfs;
-}
-#endif
-
 int s5pc110_chip_probe(struct mtd_info *mtd)
 {
        return 0;
@@ -620,10 +547,7 @@ void s3c_onenand_init(struct mtd_info *mtd)
 
        onenand->mtd = mtd;
 
-#if defined(CONFIG_S3C64XX)
-       onenand->base = (void *)0x70100000;
-       onenand->ahb_addr = (void *)0x20000000;
-#elif defined(CONFIG_S5P)
+#if defined(CONFIG_S5P)
        onenand->base = (void *)0xE7100000;
        onenand->ahb_addr = (void *)0xB0000000;
 #endif