]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - drivers/spi/omap3_spi.c
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
[karo-tx-uboot.git] / drivers / spi / omap3_spi.c
index 80a4e4776c83d17314b54060e758d980d91975b8..651e46e4bd20b345b83dcd9a87d89a5196c583bf 100644 (file)
  *
  * Modified by Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -37,8 +20,7 @@
 #include <asm/io.h>
 #include "omap3_spi.h"
 
-#define WORD_LEN       8
-#define SPI_WAIT_TIMEOUT 3000000;
+#define SPI_WAIT_TIMEOUT 3000000
 
 static void spi_reset(struct omap3_spi_slave *ds)
 {
@@ -67,7 +49,7 @@ static void omap3_spi_write_chconf(struct omap3_spi_slave *ds, int val)
 static void omap3_spi_set_enable(struct omap3_spi_slave *ds, int enable)
 {
        writel(enable, &ds->regs->channel[ds->slave.cs].chctrl);
-        /* Flash post writes to make immediate effect */
+       /* Flash post writes to make immediate effect */
        readl(&ds->regs->channel[ds->slave.cs].chctrl);
 }
 
@@ -100,7 +82,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                regs = (struct mcspi *)OMAP3_MCSPI2_BASE;
                break;
 #endif
-#ifdef OMAP3_MCSPI3_BASE 
+#ifdef OMAP3_MCSPI3_BASE
        case 2:
                regs = (struct mcspi *)OMAP3_MCSPI3_BASE;
                break;
@@ -202,7 +184,7 @@ int spi_claim_bus(struct spi_slave *slave)
 
        /* wordlength */
        conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK;
-       conf |= (WORD_LEN - 1) << 7;
+       conf |= (ds->slave.wordlen - 1) << 7;
 
        /* set chipselect polarity; manage with FORCE */
        if (!(ds->mode & SPI_CS_HIGH))
@@ -240,7 +222,7 @@ void spi_release_bus(struct spi_slave *slave)
        spi_reset(ds);
 }
 
-int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp,
+int omap3_spi_write(struct spi_slave *slave, unsigned int len, const void *txp,
                    unsigned long flags)
 {
        struct omap3_spi_slave *ds = to_omap3_spi(slave);
@@ -251,7 +233,8 @@ int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp,
        /* Enable the channel */
        omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN);
 
-       chconf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK;
+       chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK);
+       chconf |= (ds->slave.wordlen - 1) << 7;
        chconf |= OMAP3_MCSPI_CHCONF_TRM_TX_ONLY;
        chconf |= OMAP3_MCSPI_CHCONF_FORCE;
        omap3_spi_write_chconf(ds,chconf);
@@ -267,12 +250,19 @@ int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp,
                        }
                }
                /* Write the data */
-               writel(txp[i], &ds->regs->channel[ds->slave.cs].tx);
+               unsigned int *tx = &ds->regs->channel[ds->slave.cs].tx;
+               if (ds->slave.wordlen > 16)
+                       writel(((u32 *)txp)[i], tx);
+               else if (ds->slave.wordlen > 8)
+                       writel(((u16 *)txp)[i], tx);
+               else
+                       writel(((u8 *)txp)[i], tx);
        }
 
-        /* wait to finish of transfer */
-        while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) &
-                         OMAP3_MCSPI_CHSTAT_EOT));
+       /* wait to finish of transfer */
+       while ((readl(&ds->regs->channel[ds->slave.cs].chstat) &
+                        (OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS)) !=
+                        (OMAP3_MCSPI_CHSTAT_EOT | OMAP3_MCSPI_CHSTAT_TXS));
 
        /* Disable the channel otherwise the next immediate RX will get affected */
        omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS);
@@ -285,7 +275,7 @@ int omap3_spi_write(struct spi_slave *slave, unsigned int len, const u8 *txp,
        return 0;
 }
 
-int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp,
+int omap3_spi_read(struct spi_slave *slave, unsigned int len, void *rxp,
                   unsigned long flags)
 {
        struct omap3_spi_slave *ds = to_omap3_spi(slave);
@@ -296,7 +286,8 @@ int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp,
        /* Enable the channel */
        omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN);
 
-       chconf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK;
+       chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK);
+       chconf |= (ds->slave.wordlen - 1) << 7;
        chconf |= OMAP3_MCSPI_CHCONF_TRM_RX_ONLY;
        chconf |= OMAP3_MCSPI_CHCONF_FORCE;
        omap3_spi_write_chconf(ds,chconf);
@@ -319,7 +310,13 @@ int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp,
                        omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS);
 
                /* Read the data */
-               rxp[i] = readl(&ds->regs->channel[ds->slave.cs].rx);
+               unsigned int *rx = &ds->regs->channel[ds->slave.cs].rx;
+               if (ds->slave.wordlen > 16)
+                       ((u32 *)rxp)[i] = readl(rx);
+               else if (ds->slave.wordlen > 8)
+                       ((u16 *)rxp)[i] = (u16)readl(rx);
+               else
+                       ((u8 *)rxp)[i] = (u8)readl(rx);
        }
 
        if (flags & SPI_XFER_END) {
@@ -331,8 +328,8 @@ int omap3_spi_read(struct spi_slave *slave, unsigned int len, u8 *rxp,
 }
 
 /*McSPI Transmit Receive Mode*/
-int omap3_spi_txrx(struct spi_slave *slave,
-               unsigned int len, const u8 *txp, u8 *rxp, unsigned long flags)
+int omap3_spi_txrx(struct spi_slave *slave, unsigned int len,
+                  const void *txp, void *rxp, unsigned long flags)
 {
        struct omap3_spi_slave *ds = to_omap3_spi(slave);
        int timeout = SPI_WAIT_TIMEOUT;
@@ -344,7 +341,8 @@ int omap3_spi_txrx(struct spi_slave *slave,
        omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_EN);
 
        /*set TRANSMIT-RECEIVE Mode*/
-       chconf &= ~OMAP3_MCSPI_CHCONF_TRM_MASK;
+       chconf &= ~(OMAP3_MCSPI_CHCONF_TRM_MASK | OMAP3_MCSPI_CHCONF_WL_MASK);
+       chconf |= (ds->slave.wordlen - 1) << 7;
        chconf |= OMAP3_MCSPI_CHCONF_FORCE;
        omap3_spi_write_chconf(ds,chconf);
 
@@ -361,7 +359,13 @@ int omap3_spi_txrx(struct spi_slave *slave,
                        }
                }
                /* Write the data */
-               writel(txp[i], &ds->regs->channel[ds->slave.cs].tx);
+               unsigned int *tx = &ds->regs->channel[ds->slave.cs].tx;
+               if (ds->slave.wordlen > 16)
+                       writel(((u32 *)txp)[i], tx);
+               else if (ds->slave.wordlen > 8)
+                       writel(((u16 *)txp)[i], tx);
+               else
+                       writel(((u8 *)txp)[i], tx);
 
                /*Read: wait for RX containing data (RXS == 1)*/
                while (!(readl(&ds->regs->channel[ds->slave.cs].chstat) &
@@ -373,10 +377,16 @@ int omap3_spi_txrx(struct spi_slave *slave,
                        }
                }
                /* Read the data */
-               rxp[i] = readl(&ds->regs->channel[ds->slave.cs].rx);
+               unsigned int *rx = &ds->regs->channel[ds->slave.cs].rx;
+               if (ds->slave.wordlen > 16)
+                       ((u32 *)rxp)[i] = readl(rx);
+               else if (ds->slave.wordlen > 8)
+                       ((u16 *)rxp)[i] = (u16)readl(rx);
+               else
+                       ((u8 *)rxp)[i] = (u8)readl(rx);
        }
        /* Disable the channel */
-        omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS);
+       omap3_spi_set_enable(ds,OMAP3_MCSPI_CHCTRL_DIS);
 
        /*if transfer must be terminated disable the channel*/
        if (flags & SPI_XFER_END) {
@@ -392,14 +402,17 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
 {
        struct omap3_spi_slave *ds = to_omap3_spi(slave);
        unsigned int    len;
-       const u8        *txp = dout;
-       u8              *rxp = din;
        int ret = -1;
 
-       if (bitlen % 8)
+       if (ds->slave.wordlen < 4 || ds->slave.wordlen > 32) {
+               printf("omap3_spi: invalid wordlen %d\n", ds->slave.wordlen);
+               return -1;
+       }
+
+       if (bitlen % ds->slave.wordlen)
                return -1;
 
-       len = bitlen / 8;
+       len = bitlen / ds->slave.wordlen;
 
        if (bitlen == 0) {       /* only change CS */
                int chconf = readl(&ds->regs->channel[ds->slave.cs].chconf);
@@ -417,11 +430,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
                ret = 0;
        } else {
                if (dout != NULL && din != NULL)
-                       ret = omap3_spi_txrx(slave, len, txp, rxp, flags);
+                       ret = omap3_spi_txrx(slave, len, dout, din, flags);
                else if (dout != NULL)
-                       ret = omap3_spi_write(slave, len, txp, flags);
+                       ret = omap3_spi_write(slave, len, dout, flags);
                else if (din != NULL)
-                       ret = omap3_spi_read(slave, len, rxp, flags);
+                       ret = omap3_spi_read(slave, len, din, flags);
        }
        return ret;
 }