arm: mx5: clock: add support for changing CPU clock via cmdline

[karo-tx-uboot.git] / include / configs / CRAYL1.h

diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 6ababa1c50017fc5460f81fecc96edb386717e93..fa3efabea4713c8024cb6bccdcae86d1c8a21710 100644 (file)
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -3,23 +3,7 @@
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  * David Updegraff, Cray, Inc.  dave@cray.com: our 405 is walnut-lite..
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+ 
  */
 /*
  * board/config.h - configuration options, board specific
@@ -52,7 +36,6 @@
 #define        CONFIG_PHY_ADDR         1       /* PHY address; handling of ENET */
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* early setup for 405gp */
 #define CONFIG_MISC_INIT_R     1       /* so that a misc_init_r() is called */
-#define CONFIG_NET_MULTI
 
 #define CONFIG_CONS_INDEX      1       /* Use UART0                    */
 #define CONFIG_SYS_NS16550
@@ -77,18 +60,18 @@
  #define CONFIG_SERVERIP         10.0.0.1
  #define CONFIG_ETHADDR          00:40:a6:80:14:5
  */
-#define CONFIG_HARD_I2C         1              /* hardware support for i2c */
-#define CONFIG_PPC4XX_I2C              /* use PPC4xx driver            */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
 #define CONFIG_SDRAM_BANK0             1
-#define CONFIG_SYS_I2C_SPEED               400000      /* I2C speed and slave address  */
-#define CONFIG_SYS_I2C_SLAVE               0x7F
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0              400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0              0x7F
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x57
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_IDENT_STRING     "Cray L1"
 #define CONFIG_ENV_OVERWRITE     1
 #define        CONFIG_SYS_HZ                        1000       /* decrementer freq: 1 ms ticks */
 #define CONFIG_SYS_HUSH_PARSER                 1
-#define CONFIG_SYS_PROMPT_HUSH_PS2             "> "
 #define CONFIG_SOURCE                  1
 
 
@@ -155,7 +138,6 @@
 
 
 #define CONFIG_SYS_LOAD_ADDR           0x100000        /* where to load what we get from TFTP */
-#define CONFIG_SYS_TFTP_LOADADDR       CONFIG_SYS_LOAD_ADDR
 #define CONFIG_SYS_EXTBDINFO           1               /* To use extended board_into (bd_t) */
 #define CONFIG_SYS_DRAM_TEST           1
 
@@ -228,17 +210,15 @@
 #define CONFIG_SYS_OCM_DATA_SIZE       0x1000
 
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM             */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM     */
-#define CONFIG_SYS_GBL_DATA_SIZE      256  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM    */
+#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 #else
 #define CONFIG_SYS_OCM_DATA_ADDR       0xF0000000
 #define CONFIG_SYS_OCM_DATA_SIZE       0x1000
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR        /* inside of On Chip SRAM    */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE        /* End of On Chip SRAM       */
-#define CONFIG_SYS_GBL_DATA_SIZE       64      /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE        /* Size of On Chip SRAM      */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 #endif