#define CONFIG_MPC5xxx 1
#define CONFIG_MPC5200 1
-#define CFG_MPC5XXX_CLKIN 33000000
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xFF800000
+#endif
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
+#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
#define CONFIG_MISC_INIT_R 1
-#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5
+#define CONFIG_SYS_CACHELINE_SIZE 32
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CACHELINE_SHIFT 5
#endif
#define CONFIG_PSC_CONSOLE 1
#define CONFIG_BAUDRATE 115200
-#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400}
+#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400}
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
-#define CFG_XLB_PIPELINING 1
+#define CONFIG_SYS_XLB_PIPELINING 1
#define CONFIG_HIGH_BATS 1
#define MV_CI mvBlueCOUGAR-P
#define MV_VCI mvBlueCOUGAR-P
#define MV_FPGA_DATA 0xff860000
-#define MV_FPGA_SIZE 0x0003c886
-#define MV_KERNEL_ADDR 0xffc00000
+#define MV_FPGA_SIZE 0
+#define MV_KERNEL_ADDR 0xffd00000
#define MV_INITRD_ADDR 0xff900000
-#define MV_INITRD_LENGTH 0x00300000
+#define MV_INITRD_LENGTH 0x00400000
#define MV_SCRATCH_ADDR 0x00000000
#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
-#define MV_AUTOSCR_ADDR 0xff840000
-#define MV_AUTOSCR_ADDR2 0xff850000
+#define MV_SCRIPT_ADDR 0xff840000
+#define MV_SCRIPT_ADDR2 0xff850000
#define MV_DTB_ADDR 0xfffc0000
#define CONFIG_SHOW_BOOT_PROGRESS 1
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_PCI
#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_I2C
#undef CONFIG_WATCHDOG
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_RESET_TO_RETRY 1000
-#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \
- then autoscr ${autoscr_addr}; \
- else autoscr ${autoscr_addr2}; \
+#define CONFIG_BOOTCOMMAND "if imi ${script_addr}; \
+ then source ${script_addr}; \
+ else source ${script_addr2}; \
fi;"
#define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs"
"fpga=0\0" \
"fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \
"fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \
- "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \
- "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \
+ "script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0" \
+ "script_addr2=" MK_STR(MV_SCRIPT_ADDR2) "\0" \
"mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \
"mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \
"mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \
"propdev_debug=0\0" \
"gevss_debug=0\0" \
"watchdog=1\0" \
+ "sensor_cnt=1\0" \
""
#undef XMK_STR
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBCLK_EQUALS_XLBCLK
-#define CFG_PCICLK_EQUALS_IPBCLK_DIV2
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
+#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
/*
* Flash configuration
*/
#undef CONFIG_FLASH_16BIT
-#define CFG_FLASH_CFI
-#define CFG_FLASH_CFI_DRIVER
-#define CFG_FLASH_CFI_AMD_RESET 1
-#define CFG_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
+#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CFG_FLASH_ERASE_TOUT 50000
-#define CFG_FLASH_WRITE_TOUT 1000
+#define CONFIG_SYS_FLASH_ERASE_TOUT 50000
+#define CONFIG_SYS_FLASH_WRITE_TOUT 1000
-#define CFG_MAX_FLASH_BANKS 1
-#define CFG_MAX_FLASH_SECT 256
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 256
-#define CFG_LOWBOOT
-#define CFG_FLASH_BASE TEXT_BASE
-#define CFG_FLASH_SIZE 0x00800000
+#define CONFIG_SYS_LOWBOOT
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_FLASH_SIZE 0x00800000
/*
* Environment settings
*/
-#define CFG_ENV_IS_IN_FLASH
-#undef CFG_FLASH_PROTECTION
+#define CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_SYS_FLASH_PROTECTION
-#define CFG_ENV_ADDR 0xFFFE0000
-#define CFG_ENV_SIZE 0x10000
-#define CFG_ENV_SECT_SIZE 0x10000
-#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE)
-#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
+#define CONFIG_ENV_ADDR 0xFFFE0000
+#define CONFIG_ENV_SIZE 0x10000
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR+CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
/*
* Memory map
*/
-#define CFG_MBAR 0xF0000000
-#define CFG_SDRAM_BASE 0x00000000
-#define CFG_DEFAULT_MBAR 0x80000000
+#define CONFIG_SYS_MBAR 0xF0000000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
-#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
-#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
+#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
-#define CFG_GBL_DATA_SIZE 128
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-#define CFG_MONITOR_BASE TEXT_BASE
-#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
-#define CFG_RAMBOOT 1
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+#define CONFIG_SYS_RAMBOOT 1
#endif
-/* CFG_MONITOR_LEN must be a multiple of CFG_ENV_SECT_SIZE */
-#define CFG_MONITOR_LEN (512 << 10)
-#define CFG_MALLOC_LEN (512 << 10)
-#define CFG_BOOTMAPSZ (8 << 20)
+/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
+#define CONFIG_SYS_MONITOR_LEN (512 << 10)
+#define CONFIG_SYS_MALLOC_LEN (512 << 10)
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1
+#define CONFIG_SYS_I2C_MODULE 1
+#define CONFIG_SYS_I2C_SPEED 86000
+#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* Ethernet configuration
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_E1000
-#define CONFIG_E1000_FALLBACK_MAC 0xb6b445ebfbc0
+#define CONFIG_E1000_FALLBACK_MAC { 0xb6, 0xb4, 0x45, 0xeb, 0xfb, 0xc0 }
#undef CONFIG_MPC5xxx_FEC
#undef CONFIG_PHY_ADDR
#define CONFIG_NETDEV eth0
/*
* Miscellaneous configurable options
*/
-#define CFG_HUSH_PARSER
+#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
-#define CFG_PROMPT_HUSH_PS2 "> "
-#undef CFG_LONGHELP
-#define CFG_PROMPT "=> "
-#if (CONFIG_CMD_KGDB)
-#define CFG_CBSIZE 1024
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#undef CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "=> "
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CBSIZE 1024
#else
-#define CFG_CBSIZE 256
+#define CONFIG_SYS_CBSIZE 256
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
-#define CFG_MAXARGS 16
-#define CFG_BARGSIZE CFG_CBSIZE
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CFG_MEMTEST_START 0x00800000
-#define CFG_MEMTEST_END 0x02f00000
+#define CONFIG_SYS_MEMTEST_START 0x00800000
+#define CONFIG_SYS_MEMTEST_END 0x02f00000
-#define CFG_HZ 1000
+#define CONFIG_SYS_HZ 1000
/* default load address */
-#define CFG_LOAD_ADDR 0x02000000
+#define CONFIG_SYS_LOAD_ADDR 0x02000000
/* default location for tftp and bootm */
#define CONFIG_LOADADDR 0x00200000
/*
* Various low-level settings
*/
-#define CFG_GPS_PORT_CONFIG 0x20000004
+#define CONFIG_SYS_GPS_PORT_CONFIG 0x20000004
-#define CFG_HID0_INIT (HID0_ICE | HID0_ICFI)
-#define CFG_HID0_FINAL HID0_ICE
+#define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI)
+#define CONFIG_SYS_HID0_FINAL HID0_ICE
-#define CFG_BOOTCS_START CFG_FLASH_BASE
-#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#define CFG_BOOTCS_CFG 0x00047800
-#define CFG_CS0_START CFG_FLASH_BASE
-#define CFG_CS0_SIZE CFG_FLASH_SIZE
+#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_BOOTCS_CFG 0x00047800
+#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
-#define CFG_CS_BURST 0x000000f0
-#define CFG_CS_DEADCYCLE 0x33333303
+#define CONFIG_SYS_CS_BURST 0x000000f0
+#define CONFIG_SYS_CS_DEADCYCLE 0x33333303
-#define CFG_RESET_ADDRESS 0x00000100
+#define CONFIG_SYS_RESET_ADDRESS 0x00000100
#undef FPGA_DEBUG
-#undef CFG_FPGA_PROG_FEEDBACK
-#define CONFIG_FPGA CFG_ALTERA_CYCLON2
+#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2
#define CONFIG_FPGA_ALTERA 1
#define CONFIG_FPGA_CYCLON2 1
#define CONFIG_FPGA_COUNT 1
projects / karo-tx-uboot.git / blobdiff