powerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260

[karo-tx-uboot.git] / include / configs / Rattler.h

diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h
index 5b6f27186bf700312388cedf305abac340f2fa35..a1e2ae975321ccb3dd7c3912ff0d9eac2e174afd 100644 (file)
--- a/include/configs/Rattler.h
+++ b/include/configs/Rattler.h
@@ -4,23 +4,7 @@
  *
  * U-Boot configuration for Analogue&Micro Rattler boards.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -29,10 +13,11 @@
 #ifdef CONFIG_MPC8248
 #define CPU_ID_STR             "MPC8248"
 #else
-#define CONFIG_MPC8260
 #define CPU_ID_STR             "MPC8250"
 #endif /* CONFIG_MPC8248 */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFE000000
+
 #define CONFIG_CPM2            1       /* Has a CPM2 */
 
 #define CONFIG_RATTLER                 /* Analogue&Micro Rattler board */
@@ -78,8 +63,8 @@
  * - BDs/buffers on 60x bus
  * - Full duplex
  */
-#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE        (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
+#define CONFIG_SYS_CMXFCR_MASK1                (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
+#define CONFIG_SYS_CMXFCR_VALUE1       (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
 #define CONFIG_SYS_CPMFCR_RAMTYPE      0
 #define CONFIG_SYS_FCC_PSMR            (FCC_PSMR_FDE | FCC_PSMR_LPB)
 
@@ -90,8 +75,8 @@
  * - BDs/buffers on 60x bus
  * - Full duplex
  */
-#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE        (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14)
+#define CONFIG_SYS_CMXFCR_MASK2                (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+#define CONFIG_SYS_CMXFCR_VALUE2       (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14)
 #define CONFIG_SYS_CPMFCR_RAMTYPE      0
 #define CONFIG_SYS_FCC_PSMR            (FCC_PSMR_FDE | FCC_PSMR_LPB)
 
@@ -103,6 +88,10 @@
  * GPIO pins used for bit-banged MII communications
  */
 #define MDIO_PORT              2       /* Port C */
+#define MDIO_DECLARE           volatile ioport_t *iop = ioport_addr ( \
+                                       (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE            MDIO_DECLARE
+
 #define MDIO_ACTIVE            (iop->pdir |=  0x00400000)
 #define MDIO_TRISTATE          (iop->pdir &= ~0x00400000)
 #define MDIO_READ              ((iop->pdat &  0x00400000) != 0)
@@ -164,9 +153,7 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 #define CONFIG_SYS_LONGHELP                    /* undef to save memory     */
-#define CONFIG_SYS_PROMPT              "=> "   /* Monitor Command Prompt   */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE              1024    /* Console I/O Buffer Size  */
 #else
@@ -181,8 +168,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR           0x100000        /* default load address */
 
-#define CONFIG_SYS_HZ                  1000    /* decrementer freq: 1 ms ticks */
-
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
 
 #define CONFIG_SYS_FLASH_BASE          0xFE000000
@@ -216,7 +201,7 @@
 */
 #endif /* CONFIG_CMD_JFFS2 */
 
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #define CONFIG_SYS_RAMBOOT
 #endif
@@ -235,9 +220,8 @@
 #define CONFIG_SYS_IMMR                0xF0000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END        0x2000  /* End of used area in DPRAM    */
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x2000  /* Size of used area in DPRAM   */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
@@ -258,9 +242,6 @@
 #define CONFIG_SYS_HRCW_SLAVE6         0
 #define CONFIG_SYS_HRCW_SLAVE7         0
 
-#define BOOTFLAG_COLD          0x01    /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM          0x02    /* Software reboot                  */
-
 #define CONFIG_SYS_MALLOC_LEN          (4096 << 10)    /* Reserve 4 MB for malloc()    */
 #define CONFIG_SYS_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */