]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - include/configs/cm_t35.h
Move setting CONFIG_BOOTP_VCI_STRING to before including the vexpress-common header
[karo-tx-uboot.git] / include / configs / cm_t35.h
index eff35b9b0dbaaa744e86fd178c36937c3f74068d..6885ae1e36ccdfd89151af7a9fb8fe58aa557b40 100644 (file)
  * High Level Configuration Options
  */
 #define CONFIG_OMAP    /* in a TI OMAP core */
-#define CONFIG_OMAP34XX        /* which is a 34XX */
 #define CONFIG_OMAP_GPIO
 #define CONFIG_CMD_GPIO
 #define CONFIG_CM_T3X  /* working with CM-T35 and CM-T3730 */
 #define CONFIG_OMAP_COMMON
-
-#define CONFIG_SYS_TEXT_BASE   0x80008000
+#define CONFIG_SYS_GENERIC_BOARD
+/* Common ARM Erratas */
+#define CONFIG_ARM_ERRATA_454179
+#define CONFIG_ARM_ERRATA_430973
+#define CONFIG_ARM_ERRATA_621766
 
 #define CONFIG_SDRC    /* The chip has SDRC controller */
 
 #include <asm/arch/cpu.h>              /* get chip and board defs */
-#include <asm/arch/omap3.h>
+#include <asm/arch/omap.h>
 
 /*
  * Display CPU and Board information
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_OF_LIBFDT               1
-/*
- * The early kernel mapping on ARM currently only maps from the base of DRAM
- * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
- * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
- * so that leaves DRAM base to DRAM base + 0x4000 available.
- */
-#define CONFIG_SYS_BOOTMAPSZ           0x4000
 
 #define CONFIG_CMDLINE_TAG             /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_USB_OMAP3
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_OMAP
-#define CONFIG_USB_ULPI
-#define CONFIG_USB_ULPI_VIEWPORT_OMAP
 #define CONFIG_USB_STORAGE
-#define CONFIG_MUSB_UDC
+#define CONFIG_USB_MUSB_UDC
 #define CONFIG_TWL4030_USB
 #define CONFIG_CMD_USB
 
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
 /* commands to include */
-#include <config_cmd_default.h>
-
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_EXT2                /* EXT2 Support                 */
 #define CONFIG_CMD_FAT         /* FAT support                  */
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
 
-#undef CONFIG_CMD_FLASH                /* flinfo, erase, protect       */
-#undef CONFIG_CMD_FPGA         /* FPGA configuration Support   */
-#undef CONFIG_CMD_IMLS         /* List all found images        */
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED           100000
-#define CONFIG_SYS_I2C_SLAVE           1
-#define CONFIG_DRIVER_OMAP34XX_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_OMAP24_I2C_SPEED    100000
+#define CONFIG_SYS_OMAP24_I2C_SLAVE    1
+#define CONFIG_SYS_I2C_OMAP34XX
 #define CONFIG_SYS_I2C_EEPROM_ADDR     0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_I2C_EEPROM_BUS      0
 #define CONFIG_I2C_MULTI_BUS
 
 /*
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x8_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
+
 /* Environment information */
 #define CONFIG_BOOTDELAY               3
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x82000000\0" \
        "usbtty=cdc_acm\0" \
-       "console=ttyS2,115200n8\0" \
+       "console=ttyO2,115200n8\0" \
        "mpurate=500\0" \
        "vram=12M\0" \
        "dvimode=1024x768MR-16@60\0" \
                "mpurate=${mpurate} " \
                "vram=${vram} " \
                "omapfb.mode=dvi:${dvimode} " \
-               "omapfb.debug=y " \
                "omapdss.def_disp=${defaultdisplay} " \
                "root=${mmcroot} " \
                "rootfstype=${mmcrootfstype}\0" \
                "mpurate=${mpurate} " \
                "vram=${vram} " \
                "omapfb.mode=dvi:${dvimode} " \
-               "omapfb.debug=y " \
                "omapdss.def_disp=${defaultdisplay} " \
                "root=${nandroot} " \
                "rootfstype=${nandrootfstype}\0" \
                "nand read ${loadaddr} 2a0000 400000; " \
                "bootm ${loadaddr}\0" \
 
+#define CONFIG_CMD_BOOTZ
 #define CONFIG_BOOTCOMMAND \
        "mmc dev ${mmcdev}; if mmc rescan; then " \
                "if run loadbootscript; then " \
  */
 #define CONFIG_SYS_TIMERBASE           (OMAP34XX_GPT2)
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ                  1000
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
 
 /* **** PISMO SUPPORT *** */
-/* Configure the PISMO */
-#define PISMO1_NAND_SIZE               GPMC_SIZE_128M
-
 /* Monitor at start of flash */
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 /* Status LED */
 #define CONFIG_STATUS_LED              /* Status LED enabled */
 #define CONFIG_BOARD_SPECIFIC_LED
-#define STATUS_LED_GREEN               0
-#define STATUS_LED_BIT                 STATUS_LED_GREEN
+#define CONFIG_GPIO_LED
+#define GREEN_LED_GPIO                 186 /* CM-T35 Green LED is GPIO186 */
+#define GREEN_LED_DEV                  0
+#define STATUS_LED_BIT                 GREEN_LED_GPIO
 #define STATUS_LED_STATE               STATUS_LED_ON
 #define STATUS_LED_PERIOD              (CONFIG_SYS_HZ / 2)
-#define STATUS_LED_BOOT                        STATUS_LED_BIT
-#define GREEN_LED_GPIO                 186 /* CM-T35 Green LED is GPIO186 */
+#define STATUS_LED_BOOT                        GREEN_LED_DEV
 
 #define CONFIG_SPLASHIMAGE_GUARD
 
 
 /* Display Configuration */
 #define CONFIG_OMAP3_GPIO_2
+#define CONFIG_OMAP3_GPIO_5
 #define CONFIG_VIDEO_OMAP3
 #define LCD_BPP                LCD_COLOR16
 
 #define CONFIG_LCD
 #define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SOURCE
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP
+#define CONFIG_SCF0403_LCD
+
+#define CONFIG_OMAP3_SPI
+
+/* Defines for SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_NAND_SIMPLE
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS     0x200 /* 256 KB */
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT     64
+#define CONFIG_SYS_NAND_PAGE_SIZE      2048
+#define CONFIG_SYS_NAND_OOBSIZE                64
+#define CONFIG_SYS_NAND_BLOCK_SIZE     (128 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
+/*
+ * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
+ * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
+ */
+#define CONFIG_SYS_NAND_ECCPOS         { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
+                                        10, 11, 12 }
+#define CONFIG_SYS_NAND_ECCSIZE                512
+#define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
+
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+
+#define CONFIG_SPL_TEXT_BASE           0x40200800
+#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+
+/*
+ * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
+ * older x-loader implementations. And move the BSS area so that it
+ * doesn't overlap with TEXT_BASE.
+ */
+#define CONFIG_SYS_TEXT_BASE           0x80008000
+#define CONFIG_SPL_BSS_START_ADDR      0x80100000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */
+
+#define CONFIG_SYS_SPL_MALLOC_START    0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
 
 #endif /* __CONFIG_H */