/*
* Configuration settings for the Gumstix Overo board.
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP34XX 1 /* which is a 34XX */
-#define CONFIG_OMAP3430 1 /* which is in a 3430 */
-#define CONFIG_OMAP3_OVERO 1 /* working with overo */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define CONFIG_NAND
-#define CONFIG_SDRC /* The chip has SDRC controller */
+#include <configs/ti_omap3_common.h>
-#include <asm/arch/cpu.h> /* get chip and board defs */
-#include <asm/arch/omap3.h>
+/* Display CPU and Board information */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
-/*
- * Display CPU and Board information
- */
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO 1
-
-/* Clock Defines */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-#undef CONFIG_USE_IRQ /* no support for IRQs */
+/* call misc_init_r */
#define CONFIG_MISC_INIT_R
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_REVISION_TAG 1
-
-#define CONFIG_OF_LIBFDT 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
- /* Sector */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Hardware drivers
- */
+/* pass the revision tag */
+#define CONFIG_REVISION_TAG
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
+/* override size of malloc() pool */
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
+/* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
+ * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+/* I2C Support */
+#define CONFIG_SYS_I2C_OMAP34XX
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3
+/* TWL4030 LED */
+#define CONFIG_TWL4030_LED
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
- 115200}
-#define CONFIG_GENERIC_MMC 1
-#define CONFIG_MMC 1
-#define CONFIG_OMAP_HSMMC 1
-#define CONFIG_DOS_PARTITION 1
-
-/* DDR - I use Micron DDR */
-#define CONFIG_OMAP3_MICRON_DDR 1
+/* Initialize GPIOs by default */
+#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
+#define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
+#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
+#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
+#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
/* commands to include */
-#include <config_cmd_default.h>
-
#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_EXT2 /* EXT2 Support */
-#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
-
-#define CONFIG_CMD_I2C /* I2C serial bus support */
-#define CONFIG_CMD_MMC /* MMC support */
-#define CONFIG_CMD_NAND /* NAND support */
-
-#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
#undef CONFIG_CMD_IMI /* iminfo */
-#undef CONFIG_CMD_IMLS /* List all found images */
#undef CONFIG_CMD_NFS /* NFS support */
-#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C 1
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_BUS 0
-#define CONFIG_SYS_I2C_BUS_SELECT 1
-#define CONFIG_I2C_MULTI_BUS 1
-#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#ifdef CONFIG_NAND
+#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
+#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
-/*
- * TWL4030
- */
-#define CONFIG_TWL4030_POWER 1
-#define CONFIG_TWL4030_LED 1
+#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
+#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
-/*
- * Board NAND Info.
+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
+
+/* NAND block size is 128 KiB. Synchronize these values with
+ * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
+ * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
+ * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
+ * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
+ * linux 64 * NAND_BLOCK_SIZE = 8 MiB
+ * rootfs remainder
*/
-#define CONFIG_SYS_NAND_QUIET_TEST 1
-#define CONFIG_NAND_OMAP_GPMC
+#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
+ "512k(xloader)," \
+ "1792k(u-boot)," \
+ "256k(environ)," \
+ "8m(linux)," \
+ "-(rootfs)"
+#else /* CONFIG_NAND */
+#define MTDPARTS_DEFAULT
+#endif /* CONFIG_NAND */
+
+/* Board NAND Info. */
+#define CONFIG_SYS_NAND_QUIET_TEST
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
/* to access nand */
-#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
- /* to access nand */
- /* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
- /* devices */
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
- /* partition */
-
/* Environment information */
-#define CONFIG_BOOTDELAY 5
-
#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=0x82000000\0" \
+ DEFAULT_LINUX_BOOT_ENV \
+ "fdtfile=overo.dtb\0" \
+ "bootdir=/boot\0" \
+ "bootfile=zImage\0" \
+ "usbtty=cdc_acm\0" \
"console=ttyO2,115200n8\0" \
- "mpurate=500\0" \
+ "mpurate=auto\0" \
+ "optargs=\0" \
"vram=12M\0" \
"dvimode=1024x768MR-16@60\0" \
"defaultdisplay=dvi\0" \
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 rw\0" \
"mmcrootfstype=ext3 rootwait\0" \
- "nandroot=/dev/mtdblock4 rw\0" \
- "nandrootfstype=jffs2\0" \
+ "nandroot=ubi0:rootfs ubi.mtd=4\0" \
+ "nandrootfstype=ubifs\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
"mmcargs=setenv bootargs console=${console} " \
+ "${optargs} " \
"mpurate=${mpurate} " \
"vram=${vram} " \
"omapfb.mode=dvi:${dvimode} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype}\0" \
"nandargs=setenv bootargs console=${console} " \
+ "${optargs} " \
"mpurate=${mpurate} " \
"vram=${vram} " \
"omapfb.mode=dvi:${dvimode} " \
"omapdss.def_disp=${defaultdisplay} " \
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
- "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
+ "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
+ "bootscript=echo Running boot script from mmc ...; " \
"source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
+ "importbootenv=echo Importing environment from mmc ...; " \
+ "env import -t ${loadaddr} ${filesize}\0" \
+ "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "mmcboot=echo Booting from mmc...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
+ "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
+ "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
+ "mmcbootfdt=echo Booting with DT from mmc ...; " \
+ "run mmcargs; " \
+ "bootz ${loadaddr} - ${fdtaddr}\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
- "nand read ${loadaddr} 280000 400000; " \
+ "nand read ${loadaddr} linux; " \
"bootm ${loadaddr}\0" \
#define CONFIG_BOOTCOMMAND \
- "if mmc rescan ${mmcdev}; then " \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
- "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
- "fi; " \
- "else run nandboot; fi"
+ "fi;" \
+ "if run loadbootenv; then " \
+ "echo Loaded environment from ${bootenv};" \
+ "run importbootenv;" \
+ "fi;" \
+ "if test -n $uenvcmd; then " \
+ "echo Running uenvcmd ...;" \
+ "run uenvcmd;" \
+ "fi;" \
+ "if run loaduimage; then " \
+ "run mmcboot;" \
+ "fi;" \
+ "if run loadzimage; then " \
+ "if test -n $fdtfile; then " \
+ "if run loadfdt; then " \
+ "run mmcbootfdt;" \
+ "fi;" \
+ "fi;" \
+ "fi;" \
+ "fi;" \
+ "run nandboot; " \
-#define CONFIG_AUTO_COMPLETE 1
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#undef CONFIG_SYS_PROMPT
#define CONFIG_SYS_PROMPT "Overo # "
-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command */
- /* args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
- /* address */
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
-#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C 1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-/* **** PISMO SUPPORT *** */
-
+/* FLASH and environment organization */
/* Configure the PISMO */
#define PISMO1_NAND_SIZE GPMC_SIZE_128M
#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-
-#if defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_NAND)
#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
#endif
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_IS_IN_NAND
#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
+/* Configure SMSC9211 ethernet */
#if defined(CONFIG_CMD_NET)
-/*----------------------------------------------------------------------------
- * SMSC9211 Ethernet from SMSC9118 family
- *----------------------------------------------------------------------------
- */
-
-#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-
+#define CONFIG_SMC911X_BASE 0x2C000000
#endif /* (CONFIG_CMD_NET) */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+/* Initial RAM setup */
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#endif /* __CONFIG_H */
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