]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - include/configs/omap3_overo.h
karo: fdt: fix panel-dpi support
[karo-tx-uboot.git] / include / configs / omap3_overo.h
index f7483a082784b90b8d93320ed3a9df6672e5b553..53ff61d10c1f3d655508a4b7ff0f7c1c844e234a 100644 (file)
 #define CONFIG_NAND
 
 #include <configs/ti_omap3_common.h>
+#undef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE    (64*1024)
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE   0x40200000
+
+#define CONFIG_BCH
 
 /* Display CPU and Board information */
 #define CONFIG_DISPLAY_CPUINFO
 /* TWL4030 LED */
 #define CONFIG_TWL4030_LED
 
+/* USB EHCI */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO       183
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     3
+
 /* Initialize GPIOs by default */
 #define CONFIG_OMAP3_GPIO_2    /* GPIO32..63 is in GPIO Bank 2 */
 #define CONFIG_OMAP3_GPIO_3    /* GPIO64..95 is in GPIO Bank 3 */
@@ -44,9 +57,7 @@
 
 /* commands to include */
 #define CONFIG_CMD_CACHE
-#undef CONFIG_CMD_FPGA         /* FPGA configuration Support   */
-#undef CONFIG_CMD_IMI          /* iminfo                       */
-#undef CONFIG_CMD_NFS          /* NFS support                  */
+#define CONFIG_CMD_USB
 
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_UBI         /* UBI-formated MTD partition support */
        "defaultdisplay=dvi\0" \
        "mmcdev=0\0" \
        "mmcroot=/dev/mmcblk0p2 rw\0" \
-       "mmcrootfstype=ext3 rootwait\0" \
+       "mmcrootfstype=ext4 rootwait\0" \
        "nandroot=ubi0:rootfs ubi.mtd=4\0" \
        "nandrootfstype=ubifs\0" \
        "mtdparts=" MTDPARTS_DEFAULT "\0" \
                "bootm ${loadaddr}\0" \
        "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
        "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
+       "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
+       "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
        "mmcbootfdt=echo Booting with DT from mmc ...; " \
                "run mmcargs; " \
                "bootz ${loadaddr} - ${fdtaddr}\0" \
        "nandboot=echo Booting from nand ...; " \
                "run nandargs; " \
-               "nand read ${loadaddr} linux; " \
-               "bootm ${loadaddr}\0" \
+               "if nand read ${loadaddr} linux; then " \
+                       "bootm ${loadaddr};" \
+               "fi;\0" \
+       "nanddtsboot=echo Booting from nand with DTS...; " \
+               "run nandargs; " \
+               "ubi part rootfs; "\
+               "ubifsmount ubi0:rootfs; "\
+               "run loadubifdt; "\
+               "run loadubizimage; "\
+               "bootz ${loadaddr} - ${fdtaddr}\0" \
 
 #define CONFIG_BOOTCOMMAND \
        "mmc dev ${mmcdev}; if mmc rescan; then " \
                        "run mmcboot;" \
                "fi;" \
                "if run loadzimage; then " \
-                       "if test $fdtfile; then " \
+                       "if test -z \"${fdtfile}\"; then " \
                                "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
                        "fi;" \
                        "if run loadfdt; then " \
                "fi;" \
        "fi;" \
        "run nandboot; " \
-
-/*
- * Miscellaneous configurable options
- */
-#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT              "Overo # "
+       "if test -z \"${fdtfile}\"; then "\
+               "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
+       "fi;" \
+       "run nanddtsboot; " \
 
 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_START       (OMAP34XX_SDRC_CS0)
                                        0x01F00000) /* 31MB */
 
 /* FLASH and environment organization */
-/* Configure the PISMO */
-#define PISMO1_NAND_SIZE               GPMC_SIZE_128M
-#define PISMO1_ONEN_SIZE               GPMC_SIZE_128M
-
 #if defined(CONFIG_NAND)
-#define CONFIG_SYS_FLASH_BASE          PISMO1_NAND_BASE
+#define CONFIG_SYS_FLASH_BASE          NAND_BASE
 #endif
 
 /* Monitor at start of flash */
 #define CONFIG_SYS_CACHELINE_SIZE      64
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_MAX_ECCPOS  56
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9,\
-                                               10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCPOS      {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
+                                       13, 14, 16, 17, 18, 19, 20, 21, 22, \
+                                       23, 24, 25, 26, 27, 28, 30, 31, 32, \
+                                       33, 34, 35, 36, 37, 38, 39, 40, 41, \
+                                       42, 44, 45, 46, 47, 48, 49, 50, 51, \
+                                       52, 53, 54, 55, 56}
 #define CONFIG_SYS_NAND_ECCSIZE                512
-#define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
+#define CONFIG_SYS_NAND_ECCBYTES       13
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS                0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS        0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE      0x2000
+#endif
 
 #endif                         /* __CONFIG_H */