*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
-/*
- * High Level Configuration Options
- */
-#define CONFIG_TEGRA114 /* in a NVidia Tegra114 core */
-
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#endif /* _TEGRA114_COMMON_H_ */