/*
* Serial Driver
*/
+#ifdef CONFIG_CONS_INDEX
+/*
+ * select STK5 UART port 0: 1st UART (DUART) 1,2 2nd,3rd UART (Appl. UART)
+ */
+#if CONFIG_CONS_INDEX == 0
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { \
(void *)MXS_UARTDBG_BASE, \
}
-#define CONFIG_CONS_INDEX 0 /* do not change! */
+#else /* CONFIG_CONS_INDEX == 0 */
+#define CONFIG_MXS_AUART
+#if CONFIG_CONS_INDEX == 1
+#define CONFIG_MXS_AUART_BASE ((void *)MXS_UARTAPP1_BASE)
+#elif CONFIG_CONS_INDEX == 2
+#define CONFIG_MXS_AUART_BASE ((void *)MXS_UARTAPP3_BASE)
+#elif CONFIG_CONS_INDEX != -1
+#error Unsupported console UART selection
+#endif
+#endif /* CONFIG_CONS_INDEX == 0 */
+#endif /* ifdef CONFIG_CONS_INDEX */
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_MAX_NAND_DEVICE 0x1
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_BASE 0x00000000
-#endif /* CONFIG_CMD_NAND */
+#endif /* CONFIG_NAND */
+
+#define CONFIG_ENV_OVERWRITE
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET (CONFIG_U_BOOT_IMG_SIZE + CONFIG_SYS_NAND_U_BOOT_OFFS)
*/
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_ENV_OVERWRITE
/* Associated with the MMC layout defined in mmcops.c */
#define CONFIG_ENV_OFFSET SZ_1K
#define CONFIG_ENV_SIZE (SZ_128K - CONFIG_ENV_OFFSET)
",512k@" xstr(CONFIG_SYS_NAND_BBT_OFFSET) "(bbt)ro"
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
GENERATED_GBL_DATA_SIZE)
+#else
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK
+#endif
/* Defines for SPL */
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SYS_SPL_BATT_BO_LEVEL 2400
#define CONFIG_SYS_SPL_VDDA_BO_VAL 100
#define CONFIG_SYS_SPL_VDDMEM_VAL 0 /* VDDMEM is not utilized on TX28 */
+#define CONFIG_SPL_STACK 0x1fffc /* End of OCRAM */
#endif /* __CONFIG_H */