int cpu_eth_init(bd_t *bis);
/* Driver initialization prototypes */
-int au1x00_enet_initialize(bd_t*);
+int altera_tse_initialize(u8 dev_num, int mac_base,
+ int sgdma_rx_base, int sgdma_tx_base,
+ u32 sgdma_desc_base, u32 sgdma_desc_size);
int at91emac_register(bd_t *bis, unsigned long iobase);
+int au1x00_enet_initialize(bd_t*);
+int ax88180_initialize(bd_t *bis);
int bfin_EMAC_initialize(bd_t *bis);
+int calxedaxgmac_initialize(u32 id, ulong base_addr);
int cs8900_initialize(u8 dev_num, int base_addr);
-int dc21x4x_initialize(bd_t *bis);
int davinci_emac_initialize(void);
+int dc21x4x_initialize(bd_t *bis);
+int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface);
+int dm9000_initialize(bd_t *bis);
int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
int e1000_initialize(bd_t *bis);
int eepro100_initialize(bd_t *bis);
+int enc28j60_initialize(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode);
int ep93xx_eth_initialize(u8 dev_num, int base_addr);
int eth_3com_initialize (bd_t * bis);
+int ethoc_initialize(u8 dev_num, int base_addr);
int fec_initialize (bd_t *bis);
-int fecmxc_initialize (bd_t *bis);
+int fecmxc_initialize(bd_t *bis);
+int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
+int ftgmac100_initialize(bd_t *bits);
int ftmac100_initialize(bd_t *bits);
int greth_initialize(bd_t *bis);
void gt6426x_eth_initialize(bd_t *bis);
int inca_switch_initialize(bd_t *bis);
-int kirkwood_egiga_initialize(bd_t *bis);
+int ks8695_eth_initialize(void);
int lan91c96_initialize(u8 dev_num, int base_addr);
int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
int mcdmafec_initialize(bd_t *bis);
int mpc5xxx_fec_initialize(bd_t *bis);
int mpc8220_fec_initialize(bd_t *bis);
int mpc82xx_scc_enet_initialize(bd_t *bis);
+int mvgbe_initialize(bd_t *bis);
int natsemi_initialize(bd_t *bis);
+int ne2k_register(void);
int npe_initialize(bd_t *bis);
int ns8382x_initialize(bd_t *bis);
int pcnet_initialize(bd_t *bis);
int rtl8139_initialize(bd_t *bis);
int rtl8169_initialize(bd_t *bis);
int scc_initialize(bd_t *bis);
+int sh_eth_initialize(bd_t *bis);
int skge_initialize(bd_t *bis);
-int smc911x_initialize(u8 dev_num, int base_addr);
int smc91111_initialize(u8 dev_num, int base_addr);
+int smc911x_initialize(u8 dev_num, int base_addr);
int tsi108_eth_initialize(bd_t *bis);
-int uec_initialize(int index);
int uec_standard_init(bd_t *bis);
int uli526x_initialize(bd_t *bis);
-int sh_eth_initialize(bd_t *bis);
-int dm9000_initialize(bd_t *bis);
+int armada100_fec_register(unsigned long base_addr);
+int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
+ unsigned long dma_addr);
+int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
+ int txpp, int rxpp);
+int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
+ unsigned long ctrl_addr);
+int zynq_gem_initialize(bd_t *bis, int base_addr);
+/*
+ * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
+ * exported by a public hader file, we need a global definition at this point.
+ */
+#if defined(CONFIG_XILINX_LL_TEMAC)
+#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
+#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
+#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
+#endif
/* Boards with PCI network controllers can call this from their board_eth_init()
* function to initialize whatever's on board.
* the stuct and enums here are used to specify switch configuration params
*/
#if defined(CONFIG_MV88E61XX_SWITCH)
-enum mv88e61xx_cfg_vlan {
- MV88E61XX_VLANCFG_DEFAULT,
- MV88E61XX_VLANCFG_ROUTER
-};
+
+/* constants for any 88E61xx switch */
+#define MV88E61XX_MAX_PORTS_NUM 6
enum mv88e61xx_cfg_mdip {
MV88E61XX_MDIP_NOCHANGE,
struct mv88e61xx_config {
char *name;
- enum mv88e61xx_cfg_vlan vlancfg;
+ u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
enum mv88e61xx_cfg_rgmiid rgmii_delay;
enum mv88e61xx_cfg_prtstt portstate;
enum mv88e61xx_cfg_ledinit led_init;
u8 cpuport;
};
+/*
+ * Common mappings for Internal VLANs
+ * These mappings consider that all ports are useable; the driver
+ * will mask inexistent/unused ports.
+ */
+
+/* Switch mode : routes any port to any port */
+#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
+
+/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
+#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
+
int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
#endif /* CONFIG_MV88E61XX_SWITCH */
+#ifdef CONFIG_DRIVER_TI_CPSW
+
+enum {
+ CPSW_CTRL_VERSION_1 = 0, /* version1 devices */
+ CPSW_CTRL_VERSION_2 /* version2 devices */
+};
+
+struct cpsw_slave_data {
+ u32 slave_reg_ofs;
+ u32 sliver_reg_ofs;
+ int phy_id;
+ int phy_if;
+};
+
+struct cpsw_platform_data {
+ u32 mdio_base;
+ u32 cpsw_base;
+ int mdio_div;
+ int channels; /* number of cpdma channels (symmetric) */
+ u32 cpdma_reg_ofs; /* cpdma register offset */
+ int slaves; /* number of slave cpgmac ports */
+ u32 ale_reg_ofs; /* address lookup engine reg offset */
+ int ale_entries; /* ale table size */
+ u32 host_port_reg_ofs; /* cpdma host port registers */
+ u32 hw_stats_reg_ofs; /* cpsw hw stats counters */
+ u32 mac_control;
+ struct cpsw_slave_data *slave_data;
+ void (*control)(int enabled);
+ void (*phy_init)(char *name, int addr);
+ u32 gigabit_en; /* gigabit capable AND enabled */
+ u32 host_port_num;
+ u8 version;
+};
+
+int cpsw_register(struct cpsw_platform_data *data);
+
+#endif /* CONFIG_DRIVER_TI_CPSW */
+/*
+ * Allow FEC to fine-tune MII configuration on boards which require this.
+ */
+int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
+
#endif /* _NETDEV_H_ */
projects / karo-tx-uboot.git / blobdiff