powerpc: p1_p2_rdb_pc: Enable p1_p2_rdb_pc to boot from SD Card with SPL

Enable p1_p2_rdb_pc to start from eSDHC with SPL.

Signed-off-by: Ying Zhang <b40530@freescale.com>

diff --git a/board/freescale/p1_p2_rdb_pc/Makefile b/board/freescale/p1_p2_rdb_pc/Makefile
index f8d0b35aba26967f33bde9344b528688b2a18ca6..202b4a5ba0965f5aa806cd524d2dc38cfcb57d10 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/Makefile
+++ b/board/freescale/p1_p2_rdb_pc/Makefile
@@ -21,6 +21,9 @@ ifdef MINIMAL
 COBJS-y        += spl_minimal.o tlb.o law.o
 
 else
+ifdef CONFIG_SPL_BUILD
+COBJS-y += spl.o
+endif
 
 COBJS-y        += $(BOARD).o
 COBJS-y        += ddr.o

diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
new file mode 100644 (file)
index 0000000..5b8e0ff
--- /dev/null
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <nand.h>
+#include <i2c.h>
+#include <fsl_esdhc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const u32 sysclk_tbl[] = {
+       66666000, 7499900, 83332500, 8999900,
+       99999000, 11111000, 12499800, 13333200
+};
+
+ulong get_effective_memsize(void)
+{
+       return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+       u32 plat_ratio, bus_clk;
+       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+       console_init_f();
+
+       /* Set pmuxcr to allow both i2c1 and i2c2 */
+       setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
+       setbits_be32(&gur->pmuxcr,
+                    in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
+
+       /* Read back the register to synchronize the write. */
+       in_be32(&gur->pmuxcr);
+
+       /* initialize selected port with appropriate baud rate */
+       plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+       plat_ratio >>= 1;
+       bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+       gd->bus_clk = bus_clk;
+
+       NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+                    bus_clk / 16 / CONFIG_BAUDRATE);
+#ifdef CONFIG_SPL_MMC_BOOT
+       puts("\nSD boot...\n");
+#endif
+
+       /* copy code to RAM and jump to it - this should not return */
+       /* NOTE - code has to be copied out of NAND buffer before
+        * other blocks can be read.
+        */
+       relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+       /* Pointer is writable since we allocated a register for it */
+       gd = (gd_t *)CONFIG_SPL_GD_ADDR;
+       bd_t *bd;
+
+       memset(gd, 0, sizeof(gd_t));
+       bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+       memset(bd, 0, sizeof(bd_t));
+       gd->bd = bd;
+       bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
+       bd->bi_memsize = CONFIG_SYS_L2_SIZE;
+
+       probecpu();
+       get_clocks();
+       mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
+                       CONFIG_SPL_RELOC_MALLOC_SIZE);
+
+       env_init();
+#ifdef CONFIG_SPL_MMC_BOOT
+       mmc_initialize(bd);
+#endif
+       /* relocate environment function pointers etc. */
+       env_relocate();
+
+#ifdef CONFIG_SYS_I2C
+       i2c_init_all();
+#else
+       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
+
+       gd->ram_size = initdram(0);
+       puts("Second program loader running in sram...\n");
+
+#ifdef CONFIG_SPL_MMC_BOOT
+       mmc_boot();
+#endif
+}

diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index d4561c7643d6130a86beafeb8a9a885ba299adfa..d6afa7b6e1def8f00b12afabff0ebf7f7fa1e066 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -78,17 +78,8 @@ struct fsl_e_tlb_entry tlb_table[] = {
                        0, 7, BOOKE_PAGESZ_1M, 1),
 #endif
 
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
-#ifdef CONFIG_SYS_INIT_L2_ADDR
-       /* L2SRAM */
-       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
-                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-                     0, 8, BOOKE_PAGESZ_256K, 1),
-       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
-                     CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
-                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-                     0, 12, BOOKE_PAGESZ_256K, 1),
-#else
+#if defined(CONFIG_SYS_RAMBOOT) || \
+       (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
        /* *I*G - eSDHC/eSPI/NAND boot */
        SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
                        MAS3_SX|MAS3_SW|MAS3_SR, 0,
@@ -101,8 +92,14 @@ struct fsl_e_tlb_entry tlb_table[] = {
                        MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                        0, 9, BOOKE_PAGESZ_1G, 1),
 #endif /* P1020MBG */
-#endif /* not L2 SRAM */
 #endif /* RAMBOOT/SPL */
+
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+       /* *I*G - L2SRAM */
+       SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+                     0, 11, BOOKE_PAGESZ_256K, 1)
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 5f0c4fb254be812c329563ca24539cdc4ee853b1..19a1699fd90c3d5d3be1a8dda0da74cad519b5ea 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -144,19 +144,33 @@
 #define CONFIG_SYS_L2_SIZE     (512 << 10)
 #endif
 
-#if CONFIG_SYS_L2_SIZE >= (512 << 10)
-/* must be 32-bit */
-#define CONFIG_SYS_INIT_L2_ADDR        0xf8f80000
-#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
-#define CONFIG_SYS_INIT_L2_END  (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#endif
-
 #ifdef CONFIG_SDCARD
-#define CONFIG_RAMBOOT_SDCARD
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE           0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS    0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW                 /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE           0x11001000
+#define CONFIG_SPL_TEXT_BASE           0xf8f81000
+#define CONFIG_SPL_PAD_TO              0x18000
+#define CONFIG_SPL_MAX_SIZE            (96 * 1024)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE     (512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_DST      (0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS     (96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_MMC_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -526,6 +540,23 @@
 #define CONFIG_VSC7385_IMAGE_SIZE      8192
 #endif
 
+/*
+ * Config the L2 Cache as L2 SRAM
+*/
+#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SDCARD)
+#define CONFIG_SYS_INIT_L2_ADDR                0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS   CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE     0xf8f81000
+#define CONFIG_SPL_RELOC_STACK         (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE    (32 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR   (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE   (96 << 10)
+#define CONFIG_SPL_GD_ADDR             (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#endif
+#endif
+
 /* Serial Port - controlled on board with jumper J8
  * open - index 2
  * shorted - index 1
@@ -536,7 +567,7 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 #define CONFIG_NS16550_MIN_FUNCTIONS
 #endif
 
@@ -742,7 +773,7 @@
 #define CONFIG_ENV_SIZE                0x2000  /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
-#elif defined(CONFIG_RAMBOOT_SDCARD)
+#elif defined(CONFIG_SDCARD)
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_FSL_FIXED_MMC_LOCATION
 #define CONFIG_ENV_SIZE                0x2000