]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
ppc: Move CONFIG_QE to arch_global_data
authorSimon Glass <sjg@chromium.org>
Thu, 13 Dec 2012 20:48:50 +0000 (20:48 +0000)
committerTom Rini <trini@ti.com>
Mon, 4 Feb 2013 14:05:42 +0000 (09:05 -0500)
Move the quantative easing fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/powerpc/cpu/mpc83xx/speed.c
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/include/asm/global_data.h
drivers/qe/fdt.c
drivers/qe/qe.c

index a40a0552f5ec3be53c2937262367aabffe94e7c1..ba8b285d57ee7be25d82eb698161f9cd32eb3b9b 100644 (file)
@@ -495,7 +495,7 @@ int get_clocks(void)
        gd->arch.mem_sec_clk = mem_sec_clk;
 #endif
 #if defined(CONFIG_QE)
-       gd->qe_clk = qe_clk;
+       gd->arch.qe_clk = qe_clk;
        gd->arch.brg_clk = brg_clk;
 #endif
 #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
@@ -541,7 +541,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        printf("  Coherent System Bus: %-4s MHz\n",
               strmhz(buf, gd->arch.csb_clk));
 #if defined(CONFIG_QE)
-       printf("  QE:                  %-4s MHz\n", strmhz(buf, gd->qe_clk));
+       printf("  QE:                  %-4s MHz\n",
+              strmhz(buf, gd->arch.qe_clk));
        printf("  BRG:                 %-4s MHz\n",
               strmhz(buf, gd->arch.brg_clk));
 #endif
index 81c80e70952506f81f785fcadebc796667111638..7173c07b092978841c62fb1be0ab92a61e5f20b3 100644 (file)
@@ -394,8 +394,8 @@ int get_clocks (void)
        gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 #ifdef CONFIG_QE
-       gd->qe_clk = sys_info.freqQE;
-       gd->arch.brg_clk = gd->qe_clk / 2;
+       gd->arch.qe_clk = sys_info.freqQE;
+       gd->arch.brg_clk = gd->arch.qe_clk / 2;
 #endif
        /*
         * The base clock for I2C depends on the actual SOC.  Unfortunately,
index b710f25fc25e0dc09eda9c679c56a6085dd5736e..760cdabb457a5d13997bbd7879edfd60040b5b85 100644 (file)
@@ -38,9 +38,6 @@ struct arch_global_data {
        unsigned long cpm_clk;
        unsigned long scc_clk;
        unsigned long brg_clk;
-#endif
-#if defined(CONFIG_QE)
-       u32 brg_clk;
 #endif
        /* TODO: sjg@chromium.org: Should these be unslgned long? */
 #if defined(CONFIG_MPC83xx)
@@ -85,6 +82,12 @@ struct arch_global_data {
        u32 i2c1_clk;
        u32 i2c2_clk;
 #endif
+#if defined(CONFIG_QE)
+       u32 qe_clk;
+       u32 brg_clk;
+       uint mp_alloc_base;
+       uint mp_alloc_top;
+#endif /* CONFIG_QE */
 };
 
 /*
@@ -107,11 +110,6 @@ typedef    struct  global_data {
 #if defined(CONFIG_FSL_ESDHC)
        u32 sdhc_clk;
 #endif
-#if defined(CONFIG_QE)
-       u32 qe_clk;
-       uint mp_alloc_base;
-       uint mp_alloc_top;
-#endif /* CONFIG_QE */
 #if defined(CONFIG_FSL_LAW)
        u32 used_laws;
 #endif
index 1a123b8ce593c87b396f0d00b0513d3312ce1658..5a0f277d0a3b37c1b426c1af04de13d43e6e9e09 100644 (file)
@@ -75,16 +75,16 @@ error:
 void ft_qe_setup(void *blob)
 {
        do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
-               "bus-frequency", gd->qe_clk, 1);
+               "bus-frequency", gd->arch.qe_clk, 1);
        do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
                "brg-frequency", gd->arch.brg_clk, 1);
        do_fixup_by_compat_u32(blob, "fsl,qe",
-               "clock-frequency", gd->qe_clk, 1);
+               "clock-frequency", gd->arch.qe_clk, 1);
        do_fixup_by_compat_u32(blob, "fsl,qe",
-               "bus-frequency", gd->qe_clk, 1);
+               "bus-frequency", gd->arch.qe_clk, 1);
        do_fixup_by_compat_u32(blob, "fsl,qe",
                "brg-frequency", gd->arch.brg_clk, 1);
        do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
-               "clock-frequency", gd->qe_clk / 2, 1);
+               "clock-frequency", gd->arch.qe_clk / 2, 1);
        fdt_fixup_qe_firmware(blob);
 }
index 72c585cffefea7e2c666b2d33c4eda04caebfb28..5fd213546d6cba795e11a5a6ee364dcef2387e89 100644 (file)
@@ -58,21 +58,22 @@ uint qe_muram_alloc(uint size, uint align)
        uint    savebase;
 
        align_mask = align - 1;
-       savebase = gd->mp_alloc_base;
+       savebase = gd->arch.mp_alloc_base;
 
-       if ((off = (gd->mp_alloc_base & align_mask)) != 0)
-               gd->mp_alloc_base += (align - off);
+       off = gd->arch.mp_alloc_base & align_mask;
+       if (off != 0)
+               gd->arch.mp_alloc_base += (align - off);
 
        if ((off = size & align_mask) != 0)
                size += (align - off);
 
-       if ((gd->mp_alloc_base + size) >= gd->mp_alloc_top) {
-               gd->mp_alloc_base = savebase;
+       if ((gd->arch.mp_alloc_base + size) >= gd->arch.mp_alloc_top) {
+               gd->arch.mp_alloc_base = savebase;
                printf("%s: ran out of ram.\n",  __FUNCTION__);
        }
 
-       retloc = gd->mp_alloc_base;
-       gd->mp_alloc_base += size;
+       retloc = gd->arch.mp_alloc_base;
+       gd->arch.mp_alloc_base += size;
 
        memset((void *)&qe_immr->muram[retloc], 0, size);
 
@@ -183,8 +184,8 @@ void qe_init(uint qe_base)
        out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
 #endif
 
-       gd->mp_alloc_base = QE_DATAONLY_BASE;
-       gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
+       gd->arch.mp_alloc_base = QE_DATAONLY_BASE;
+       gd->arch.mp_alloc_top = gd->arch.mp_alloc_base + QE_DATAONLY_SIZE;
 
        qe_sdma_init();
        qe_snums_init();