serial: Extend structure comments with register offset

This information help with debugging issues with uart.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 74c449663bc7881fea9e59f649d30f85349ad5da..3e2b8dc183e467c6562d3a868a6a8147bcf48179 100644 (file)
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -27,14 +27,14 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ZYNQ_UART_MR_PARITY_NONE       0x00000020  /* No parity mode */
 
 struct uart_zynq {
 #define ZYNQ_UART_MR_PARITY_NONE       0x00000020  /* No parity mode */
 
 struct uart_zynq {

-       u32 control; /* Control Register [8:0] */
-       u32 mode; /* Mode Register [10:0] */
+       u32 control; /* 0x0 - Control Register [8:0] */
+       u32 mode; /* 0x4 - Mode Register [10:0] */

        u32 reserved1[4];
        u32 reserved1[4];

-       u32 baud_rate_gen; /* Baud Rate Generator [15:0] */
+       u32 baud_rate_gen; /* 0x18 - Baud Rate Generator [15:0] */

        u32 reserved2[4];
        u32 reserved2[4];

-       u32 channel_sts; /* Channel Status [11:0] */
-       u32 tx_rx_fifo; /* FIFO [15:0] or [7:0] */
-       u32 baud_rate_divider; /* Baud Rate Divider [7:0] */
+       u32 channel_sts; /* 0x2c - Channel Status [11:0] */
+       u32 tx_rx_fifo; /* 0x30 - FIFO [15:0] or [7:0] */
+       u32 baud_rate_divider; /* 0x34 - Baud Rate Divider [7:0] */

 };
 
 static struct uart_zynq *uart_zynq_ports[2] = {
 };
 
 static struct uart_zynq *uart_zynq_ports[2] = {