]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge branch 'master' of git://git.denx.de/u-boot-usb
authorTom Rini <trini@ti.com>
Thu, 11 Dec 2014 23:40:49 +0000 (18:40 -0500)
committerTom Rini <trini@ti.com>
Thu, 11 Dec 2014 23:40:49 +0000 (18:40 -0500)
Conflicts:
board/freescale/mx6sxsabresd/mx6sxsabresd.c

Signed-off-by: Tom Rini <trini@ti.com>
arch/arm/include/asm/arch-mx6/mx6sl_pins.h
board/freescale/mx6slevk/mx6slevk.c
board/freescale/mx6sxsabresd/mx6sxsabresd.c
drivers/dfu/dfu.c
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-mx6.c
include/configs/mx6slevk.h
include/configs/mx6sxsabresd.h
include/usb/ehci-fsl.h
test/ums/ums_gadget_test.sh

index d9db58c9a3913c9e2ab31e31691c913508b5efac..9ded3d851cd6648fe967649e3d094d9602313b97 100644 (file)
@@ -53,5 +53,10 @@ enum {
        MX6_PAD_FEC_REF_CLK__FEC_REF_OUT                        = IOMUX_PAD(0x424, 0x134, 0x10, 0x000, 0, 0),
        MX6_PAD_FEC_RX_ER__GPIO_4_19                            = IOMUX_PAD(0x0428, 0x0138, 5, 0x0000, 0, 0),
        MX6_PAD_FEC_TX_CLK__GPIO_4_21                           = IOMUX_PAD(0x0434, 0x0144, 5, 0x0000, 0, 0),
+
+       MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID                  = IOMUX_PAD(0x03D0, 0x00E0, 4, 0x05DC, 0, 0),
+
+       MX6_PAD_KEY_COL4__USB_USBOTG1_PWR                       = IOMUX_PAD(0x0484, 0x017C, 6, 0x0000, 0, 0),
+       MX6_PAD_KEY_COL5__USB_USBOTG2_PWR                       = IOMUX_PAD(0x0488, 0x0180, 6, 0x0000, 0, 0),
 };
 #endif /* __ASM_ARCH_MX6_MX6SL_PINS_H__ */
index cac6d73a7f81a9a1f3a7b8bd1b3b682b8fd16807..3834eec60e866f9da37d512770c53dc1bcdff7b5 100644 (file)
@@ -20,6 +20,8 @@
 #include <fsl_esdhc.h>
 #include <mmc.h>
 #include <netdev.h>
+#include <usb.h>
+#include <usb/ehci-fsl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -238,6 +240,48 @@ static int setup_fec(void)
 }
 #endif
 
+#ifdef CONFIG_USB_EHCI_MX6
+#define USB_OTHERREGS_OFFSET   0x800
+#define UCTRL_PWR_POL          (1 << 9)
+
+static iomux_v3_cfg_t const usb_otg_pads[] = {
+       /* OTG1 */
+       MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+       /* OTG2 */
+       MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
+};
+
+static void setup_usb(void)
+{
+       imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
+                                        ARRAY_SIZE(usb_otg_pads));
+}
+
+int board_usb_phy_mode(int port)
+{
+       if (port == 1)
+               return USB_INIT_HOST;
+       else
+               return usb_phy_mode(port);
+}
+
+int board_ehci_hcd_init(int port)
+{
+       u32 *usbnc_usb_ctrl;
+
+       if (port > 1)
+               return -EINVAL;
+
+       usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
+                                port * 4);
+
+       /* Set Power polarity */
+       setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
+
+       return 0;
+}
+#endif
 
 int board_early_init_f(void)
 {
@@ -256,6 +300,11 @@ int board_init(void)
 #ifdef CONFIG_FEC_MXC
        setup_fec();
 #endif
+
+#ifdef CONFIG_USB_EHCI_MX6
+       setup_usb();
+#endif
+
        return 0;
 }
 
index 8b959b9fc6a02b56afcc87b2fdd937ce8dad600b..fd8bc72827496c767c35699db4667655c7241f7e 100644 (file)
@@ -26,6 +26,8 @@
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 #include "../common/pfuze.h"
+#include <usb.h>
+#include <usb/ehci-fsl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -212,6 +214,49 @@ int power_init_board(void)
        return 0;
 }
 
+#ifdef CONFIG_USB_EHCI_MX6
+#define USB_OTHERREGS_OFFSET   0x800
+#define UCTRL_PWR_POL          (1 << 9)
+
+static iomux_v3_cfg_t const usb_otg_pads[] = {
+       /* OGT1 */
+       MX6_PAD_GPIO1_IO09__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_GPIO1_IO10__ANATOP_OTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+       /* OTG2 */
+       MX6_PAD_GPIO1_IO12__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
+};
+
+static void setup_usb(void)
+{
+       imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
+                                        ARRAY_SIZE(usb_otg_pads));
+}
+
+int board_usb_phy_mode(int port)
+{
+       if (port == 1)
+               return USB_INIT_HOST;
+       else
+               return usb_phy_mode(port);
+}
+
+int board_ehci_hcd_init(int port)
+{
+       u32 *usbnc_usb_ctrl;
+
+       if (port > 1)
+               return -EINVAL;
+
+       usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
+                                port * 4);
+
+       /* Set Power polarity */
+       setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
+
+       return 0;
+}
+#endif
+
 int board_phy_config(struct phy_device *phydev)
 {
        /*
@@ -242,6 +287,10 @@ int board_early_init_f(void)
        /* Active high for ncp692 */
        gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
 
+#ifdef CONFIG_USB_EHCI_MX6
+       setup_usb();
+#endif
+
        return 0;
 }
 
@@ -322,7 +371,6 @@ int board_mmc_init(bd_t *bis)
        return 0;
 }
 
-
 int board_init(void)
 {
        /* Address of boot parameters */
index c0aba6e197c5ef3ea940685f874f75dd014c4dc4..14cb366b014cb3e7fb9de8f9e316783c1be05f19 100644 (file)
@@ -544,10 +544,35 @@ struct dfu_entity *dfu_get_entity(int alt)
 int dfu_get_alt(char *name)
 {
        struct dfu_entity *dfu;
+       char *str;
 
        list_for_each_entry(dfu, &dfu_list, list) {
-               if (!strncmp(dfu->name, name, strlen(dfu->name)))
-                       return dfu->alt;
+               if (dfu->name[0] != '/') {
+                       if (!strncmp(dfu->name, name, strlen(dfu->name)))
+                               return dfu->alt;
+               } else {
+                       /*
+                        * One must also consider absolute path
+                        * (/boot/bin/uImage) available at dfu->name when
+                        * compared "plain" file name (uImage)
+                        *
+                        * It is the case for e.g. thor gadget where lthor SW
+                        * sends only the file name, so only the very last part
+                        * of path must be checked for equality
+                        */
+
+                       str = strstr(dfu->name, name);
+                       if (!str)
+                               continue;
+
+                       /*
+                        * Check if matching substring is the last element of
+                        * dfu->name (uImage)
+                        */
+                       if (strlen(dfu->name) ==
+                           ((str - dfu->name) + strlen(name)))
+                               return dfu->alt;
+               }
        }
 
        return -ENODEV;
index 5520805af37a1c99b84843535d10b7e78496b452..bc7606646bbcf9ac76ab679a8f85405ceaa6d45a 100644 (file)
@@ -971,7 +971,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
        qh_list->qh_link = cpu_to_hc32((uint32_t)qh_list | QH_LINK_TYPE_QH);
        qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
                                                QH_ENDPT1_EPS(USB_SPEED_HIGH));
-       qh_list->qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
        qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
        qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
        qh_list->qh_overlay.qt_token =
index 9ec5a0a53948031a7a5d867dad502c54cac59304..951dd3b25f2cf766df706a4fdbf86366dbff4e05 100644 (file)
@@ -160,7 +160,7 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
        val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
        __raw_writel(val, phy_ctrl);
 
-       return val & USBPHY_CTRL_OTG_ID;
+       return 0;
 }
 
 /* Base address for this IP block is 0x02184800 */
@@ -193,6 +193,28 @@ static void usb_oc_config(int index)
        __raw_writel(val, ctrl);
 }
 
+int usb_phy_mode(int port)
+{
+       void __iomem *phy_reg;
+       void __iomem *phy_ctrl;
+       u32 val;
+
+       phy_reg = (void __iomem *)phy_bases[port];
+       phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
+
+       val = __raw_readl(phy_ctrl);
+
+       if (val & USBPHY_CTRL_OTG_ID)
+               return USB_INIT_DEVICE;
+       else
+               return USB_INIT_HOST;
+}
+
+int __weak board_usb_phy_mode(int port)
+{
+       return usb_phy_mode(port);
+}
+
 int __weak board_ehci_hcd_init(int port)
 {
        return 0;
@@ -221,7 +243,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
        usb_power_config(index);
        usb_oc_config(index);
        usb_internal_phy_clock_gate(index, 1);
-       type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
+       usb_phy_enable(index, ehci);
+       type = board_usb_phy_mode(index);
 
        *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
        *hcor = (struct ehci_hcor *)((uint32_t)*hccr +
index 271548c875f7c748a7a5dcd69e5c7d1376740d56..e3e7f7686b59e289da319fb8f3181bc0160f5835 100644 (file)
 #define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #endif
 
+/* USB Configs */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC          (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS           0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
+#endif
+
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV         1       /* SDHC2*/
index 5e0edabf3738812cfb84feb48280e7f841b87f7c..61a7a7a07ea3350b2a5bd64692ab955ade2243a8 100644 (file)
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
+
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS   0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#endif
+
 #define CONFIG_CMD_PCI
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI
index 897018bf84c942ec7a6dad04324c26cdf381e06a..e9349b5c1666db1838ef8da34d194ee5c83bbb16 100644 (file)
@@ -280,7 +280,9 @@ struct usb_ehci {
 #define MXC_EHCI_IPPUE_DOWN            (1 << 10)
 #define MXC_EHCI_IPPUE_UP              (1 << 11)
 
+int usb_phy_mode(int port);
 /* Board-specific initialization */
 int board_ehci_hcd_init(int port);
+int board_usb_phy_mode(int port);
 
 #endif /* _EHCI_FSL_H */
index 56d46163760a43c160629060bf0627c09be28268..9da486b266ce079cd0b8621c66a8baf4f6b20b7a 100755 (executable)
@@ -11,6 +11,7 @@ clear
 
 COLOUR_RED="\33[31m"
 COLOUR_GREEN="\33[32m"
+COLOUR_ORANGE="\33[33m"
 COLOUR_DEFAULT="\33[0m"
 
 DIR=./
@@ -59,8 +60,15 @@ ums_test_file () {
     fi
 
     cp ./$1 $MNT_DIR
-    umount $MNT_DIR
 
+    while true; do
+       umount $MNT_DIR > /dev/null 2>&1
+       if [ $? -eq 0 ]; then
+           break
+       fi
+       printf "$COLOUR_ORANGE\tSleeping to wait for umount...$COLOUR_DEFAULT\n"
+       sleep 1
+    done
 
     echo -n "TX: "
     calculate_md5sum $1