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8 years agodm: test: Allow test names to leave out the dm_test_ prefix
Simon Glass [Mon, 6 Jul 2015 18:54:23 +0000 (12:54 -0600)]
dm: test: Allow test names to leave out the dm_test_ prefix

All driver model tests have a dm_test_ prefix. Ignore it when matching a
test name. This makes it easier to run individual tests, like this:

   ./sandbox/u-boot -d ./sandbox/arch/sandbox/dts/test.dtb \
-c "ut dm clk_periph"

We can use 'clk_periph' instead of 'dm_test_clk_periph'.

Also print a message if the requested test is not found.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Add platform data advice and admonishment
Simon Glass [Mon, 6 Jul 2015 18:54:22 +0000 (12:54 -0600)]
dm: Add platform data advice and admonishment

We should guide people more strongly towards device tree to avoid the
proliferation of platform data structures. Add documentation to the driver
model README, and also the platform data header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agopower: pmic: Use trailing_strtol() instead of a local function
Simon Glass [Tue, 23 Jun 2015 21:39:16 +0000 (15:39 -0600)]
power: pmic: Use trailing_strtol() instead of a local function

Use the common function to obtain the number from the end of the string,
instead of a local function. Also tweak the position of a debug() statement.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agodm: Add a clock uclass
Simon Glass [Tue, 23 Jun 2015 21:39:15 +0000 (15:39 -0600)]
dm: Add a clock uclass

Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agozynq: Rename struct clk_ops to zynq_clk_ops
Simon Glass [Tue, 23 Jun 2015 21:39:14 +0000 (15:39 -0600)]
zynq: Rename struct clk_ops to zynq_clk_ops

Since we want clk_ops to be used in U-Boot as a whole, rename the Zynq
version until it can be converted to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Add a system reset uclass
Simon Glass [Tue, 23 Jun 2015 21:39:13 +0000 (15:39 -0600)]
dm: Add a system reset uclass

It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.

To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agomkimage: Set up a file size parameter and keep it updated
Simon Glass [Tue, 23 Jun 2015 21:39:12 +0000 (15:39 -0600)]
mkimage: Set up a file size parameter and keep it updated

Some functions called by mkimage would like to know the output file size.
Initially this is the same as the input file size, but it may be affected by
adding headers, etc.

Add this information to the image parameters.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agospl: Add a debug string before the jump to U-Boot
Simon Glass [Tue, 23 Jun 2015 21:39:11 +0000 (15:39 -0600)]
spl: Add a debug string before the jump to U-Boot

As a debug option, add positive confirmation that SPL has completed
execution. This can help with diagnosing the location of unexpected hangs.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: spl: Allow device tree/driver model in board_init_f()
Simon Glass [Tue, 23 Jun 2015 21:39:10 +0000 (15:39 -0600)]
dm: spl: Allow device tree/driver model in board_init_f()

Add an spl_init() function that does basic init such that board_init_f() can
use simple malloc(), device tree and driver model. Each one is set up only
if enabled for SPL.

Note: We really should refactor SPL such that there is a single
board_init_f() and rename the existing weak board_init_f() functions
provided by boards, calling them from the single board_init_f().

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agofdt: Provide debug info when a device tree cannot be found
Simon Glass [Tue, 23 Jun 2015 21:39:09 +0000 (15:39 -0600)]
fdt: Provide debug info when a device tree cannot be found

It can be quite confusing with a new platform to figure out why the device
tree cannot be located. Add some debug information for this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agolib: Add function to extract a number from the end of a string
Simon Glass [Tue, 23 Jun 2015 21:39:08 +0000 (15:39 -0600)]
lib: Add function to extract a number from the end of a string

Split out the code in fdtdec which finds a number at the end of a string. It
can be useful in other situations.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoAdd rivest cipher 4 (rc4) implementation
Simon Glass [Tue, 23 Jun 2015 21:39:07 +0000 (15:39 -0600)]
Add rivest cipher 4 (rc4) implementation

Add an implementation of RC4. This will be used by Rockchip booting but may
be useful in other situations.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agons16550: Improve debug UART so it can work with 32-bit access
Simon Glass [Tue, 23 Jun 2015 21:39:06 +0000 (15:39 -0600)]
ns16550: Improve debug UART so it can work with 32-bit access

Since Rockchip requires 32-bit serial access, add this to the driver.
Refactor a little to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: spi: Make local functions static
Simon Glass [Tue, 23 Jun 2015 21:39:05 +0000 (15:39 -0600)]
dm: spi: Make local functions static

Several functions in this file should be marked as static. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Add support for RAM drivers
Simon Glass [Tue, 23 Jun 2015 21:39:04 +0000 (15:39 -0600)]
dm: Add support for RAM drivers

Add support for a driver which sets up DRAM and can return information about
the amount of RAM available. This is a first step towards moving RAM init
to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoDrop CONFIG_ERRNO_STR from SPL
Simon Glass [Tue, 23 Jun 2015 21:39:03 +0000 (15:39 -0600)]
Drop CONFIG_ERRNO_STR from SPL

This bloats the code size quite a bit and is less useful in SPL where there
is no command line.

Avoid including this code in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: power: Allow use of regulators in SPL
Simon Glass [Tue, 23 Jun 2015 21:39:02 +0000 (15:39 -0600)]
dm: power: Allow use of regulators in SPL

This functionality may be useful for setting up regulators early during
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: pmic: Add functions to adjust PMIC registers
Simon Glass [Tue, 23 Jun 2015 21:39:01 +0000 (15:39 -0600)]
dm: pmic: Add functions to adjust PMIC registers

It is a common requirement to update some PMIC registers. Provide some
simple convenience functions to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agodm: power: Use debug() for errors in regulator uclass
Simon Glass [Tue, 23 Jun 2015 21:39:00 +0000 (15:39 -0600)]
dm: power: Use debug() for errors in regulator uclass

To reduce unnecessary code size in an uncommon code path, use debug()
where possible(). The driver returns an error which indicates failure.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agodm: power: Add a function to set up all regulators
Simon Glass [Tue, 23 Jun 2015 21:38:59 +0000 (15:38 -0600)]
dm: power: Add a function to set up all regulators

The device tree provides information about which regulators should be
on at boot, or always on. Use this to set them up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agodm: pmic: Split output from function
Simon Glass [Tue, 23 Jun 2015 21:38:58 +0000 (15:38 -0600)]
dm: pmic: Split output from function

The regulator_autoset() function mixes printf() output and PMIC adjustment
code. It provides a boolean to control the output. It is better to avoid
missing logic and output, and this permits a smaller SPL code size. So
split the output into a separate function.

Also rename the function to have a by_name() suffix, since we would like
to be able to pass a device when we know it, and thus avoid the name
search.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agodm: power: Add regulator flags to centralise auto-set logic
Simon Glass [Tue, 23 Jun 2015 21:38:57 +0000 (15:38 -0600)]
dm: power: Add regulator flags to centralise auto-set logic

Decide when the regulator is set up whether we want to auto-set the voltage
or current. This avoids the complex logic spilling into the processing code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agodm: power: Avoid case-insensitve match for child names
Simon Glass [Tue, 23 Jun 2015 21:38:56 +0000 (15:38 -0600)]
dm: power: Avoid case-insensitve match for child names

This is not user input (i.e. from the command line). It should be possible
to get the case correct and avoid the case-insensitive match. This will
help avoid sloppy device tree setups.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
8 years agommc: Add structure comments for dwmmc
Simon Glass [Tue, 23 Jun 2015 21:38:52 +0000 (15:38 -0600)]
mmc: Add structure comments for dwmmc

It took a little while to figure this out, so this patch adds documentation
to help the next person who needs to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: Allow driver model to be used for MMC in SPL
Simon Glass [Tue, 23 Jun 2015 21:38:51 +0000 (15:38 -0600)]
dm: mmc: Allow driver model to be used for MMC in SPL

Enable MMC using driver model in SPL for consistency with U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agommc: Add debug() output on read errors
Simon Glass [Tue, 23 Jun 2015 21:38:50 +0000 (15:38 -0600)]
mmc: Add debug() output on read errors

Allow read errors to be diagnosed more easily.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: mmc: Add an MMC uclass
Simon Glass [Tue, 23 Jun 2015 21:38:48 +0000 (15:38 -0600)]
dm: mmc: Add an MMC uclass

Add basic support for MMC, providing a uclass which can set up an MMC
device. This allows MMC drivers to move to using driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agospl: Add debugging info for spl_mmc boot
Simon Glass [Tue, 23 Jun 2015 21:38:47 +0000 (15:38 -0600)]
spl: Add debugging info for spl_mmc boot

Add a few messages to indicate progress and failure.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: led: Add a driver for GPIO-controlled LEDs
Simon Glass [Tue, 23 Jun 2015 21:38:46 +0000 (15:38 -0600)]
dm: led: Add a driver for GPIO-controlled LEDs

Add a simple driver which allows use of LEDs attached to GPIOs. The linux
device tree binding is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Add support for LEDs
Simon Glass [Tue, 23 Jun 2015 21:38:45 +0000 (15:38 -0600)]
dm: Add support for LEDs

Add a simple uclass for LEDs, so that these can be controlled by the device
tree and activated when needed. LEDs are referred to by their label.

This implementation requires a driver for each type of LED (e.g GPIO, I2C).

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Add support for generic system controllers (syscon)
Simon Glass [Tue, 23 Jun 2015 21:38:43 +0000 (15:38 -0600)]
dm: Add support for generic system controllers (syscon)

Many SoCs have a number of system controllers which are dealt with as a
group by a single driver. It is a pain to have to add lots of compatible
strings and/or separate drivers for each. Instead we can identify the
controllers by a number and request the address of the one we want.

Add a simple implementation of this which can be used by SoC driver code.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Add support for register maps (regmap)
Simon Glass [Tue, 23 Jun 2015 21:38:42 +0000 (15:38 -0600)]
dm: Add support for register maps (regmap)

Add a simple implementaton of register maps, supporting only direct I/O
for now. This can be enhanced later to support buses which have registers,
such as I2C, SPI and PCI.

It allows drivers which can operate with multiple buses to avoid dealing
with the particulars of register access on that bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: gpio: Add dm_gpio_request() to manually request a GPIO
Simon Glass [Tue, 23 Jun 2015 21:38:41 +0000 (15:38 -0600)]
dm: gpio: Add dm_gpio_request() to manually request a GPIO

This function can be used for testing to manually request a GPIO for use,
without resorting to the legacy GPIO API.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: gpio: Add dm_gpio_lookup_name() to look up a GPIO name
Simon Glass [Tue, 23 Jun 2015 21:38:40 +0000 (15:38 -0600)]
dm: gpio: Add dm_gpio_lookup_name() to look up a GPIO name

Provide a driver-model function to look up a GPIO name. Make the standard
function use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: gpio: Allow GPIO uclass to be used in SPL
Simon Glass [Tue, 23 Jun 2015 21:38:39 +0000 (15:38 -0600)]
dm: gpio: Allow GPIO uclass to be used in SPL

Now that we support driver model in SPL, allow GPIO drivers to be used there
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: core: Correct device_get_child_by_of_offset() parameter
Simon Glass [Tue, 23 Jun 2015 21:38:38 +0000 (15:38 -0600)]
dm: core: Correct device_get_child_by_of_offset() parameter

This parameter is named 'seq' but should be named 'of_offset'.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: core: Add a function to find any device from device tree
Simon Glass [Tue, 23 Jun 2015 21:38:37 +0000 (15:38 -0600)]
dm: core: Add a function to find any device from device tree

In some rare cases it is useful to be able to locate a device given a device
tree node offset. An example is when you have an alias that points to a node
and you want to find the associated device. The device may be SPI, MMC or
something else, but you don't need to know the uclass to find it.

Add a function to do a global search for a device, given its device tree
offset.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: core: Use debug() instead of printf() for failures
Simon Glass [Tue, 23 Jun 2015 21:38:36 +0000 (15:38 -0600)]
dm: core: Use debug() instead of printf() for failures

To avoid bloating SPL code, use debug() where possible in the driver model
core code. The error code is already returned, and can be investigated as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Move the tree/uclass dump code into its own file
Simon Glass [Tue, 23 Jun 2015 21:38:35 +0000 (15:38 -0600)]
dm: Move the tree/uclass dump code into its own file

In SPL it is sometimes useful to be able to obtain a dump of the current
driver model state. Since commands are not available, provide a way to
directly call the functions to output this information.

Adjust the existing commands to use these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agosandbox: Drop special-case sandbox console code
Simon Glass [Tue, 23 Jun 2015 21:38:34 +0000 (15:38 -0600)]
sandbox: Drop special-case sandbox console code

At present printf() skips output if it can see there is no console. This
is really just an optimisation, and is not necessary. Also it is currently
incorrect in some cases. Rather than update the logic, just remove it so
that we don't need to keep it in sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Allow debug UART to support an early console
Simon Glass [Tue, 23 Jun 2015 21:38:33 +0000 (15:38 -0600)]
dm: Allow debug UART to support an early console

When there is no console ready, allow the debug UART to be used for output.
This makes debugging of early code considerably easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodebug_uart: Remove use of asmlinkage
Simon Glass [Tue, 23 Jun 2015 21:38:32 +0000 (15:38 -0600)]
debug_uart: Remove use of asmlinkage

This does not actually help any current arch. For x86 it makes it harder
to call (requires stack) and for ARM it has no effect. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoAdd a way of checking the position of a structure member
Simon Glass [Tue, 23 Jun 2015 21:38:31 +0000 (15:38 -0600)]
Add a way of checking the position of a structure member

U-Boot uses structures for hardware access so it is important that these
structures are correct. Add a way of asserting that a structure member is
at a particular offset. This can be created using the datasheet for the
hardware.

This implementation uses Static_assert() since BUILD_BUG_ON() only works
within functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: arm: Put driver model I2C drivers before legacy ones
Simon Glass [Tue, 23 Jun 2015 21:38:30 +0000 (15:38 -0600)]
dm: arm: Put driver model I2C drivers before legacy ones

Driver-model I2C drivers can be picked up by the linker script rule for
legacy drivers. Change the order to avoid this.

We could make the legacy code depend on !CONFIG_DM_I2C but that is not
necessary and it is good to keep conditions to a minimum.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodm: Reduce SPL device tree size
Simon Glass [Tue, 23 Jun 2015 21:38:29 +0000 (15:38 -0600)]
dm: Reduce SPL device tree size

The SPL device tree size must be minimised to save memory. Only include
properties that are needed by SPL - this is determined by the presence
of the "u-boot,dm-pre-reloc" property. Also remove a predefined list of
unused properties from the nodes that remain.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agofdt: Add fdtgrep tool
Simon Glass [Tue, 23 Jun 2015 21:38:28 +0000 (15:38 -0600)]
fdt: Add fdtgrep tool

This tool allows us to extract subsets of a device tree file. It is used by
the SPL vuild, which needs to cut down the device tree size for use in
limited memory.

This tool was originally written for libfdt but it has not been accepted
upstream, so for now, include it in U-Boot. Several utilfdt library
functions been included inline here.

If fdtgrep is eventually accepted in libfdt then we can bring that version
of libfdt in here, and drop fdtgrep (requiring that fdtgrep is provided by
the user).

If it is not accepted then another approach would be to write a special
tool for chopping down device tree files for SPL. While it would use the
same libfdt support, it would be less code than fdtgrep.c because it would
not have general-purpose functions.

Another approach (which was used with v1 of this series) is to sprinkler all
the device tree files with #ifdef. I don't like that idea.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agofdt: Add fdt_first/next_region() functions
Simon Glass [Tue, 23 Jun 2015 21:38:27 +0000 (15:38 -0600)]
fdt: Add fdt_first/next_region() functions

These have been sent upstream but not accepted to libfdt. For now, bring
these into U-Boot to enable fdtgrep to operate. We will use fdtgrep to
cut device tree files down for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agofdt: Add a function to remove unused strings from a device tree
Simon Glass [Tue, 23 Jun 2015 21:38:26 +0000 (15:38 -0600)]
fdt: Add a function to remove unused strings from a device tree

Property names are stored in a string table. When a node property is
removed, the string table is not updated since other nodes may have a
property with the same name.

Thus it is possible for the string table to build up a number of unused
strings. Add a function to remove these. This works by building a new device
tree from the old one, adding strings one by one as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agomkimage: Display a better list of available image types
Simon Glass [Tue, 23 Jun 2015 21:38:25 +0000 (15:38 -0600)]
mkimage: Display a better list of available image types

Offer to display the available image types in help. Also, rather than
hacking the genimg_get_type_id() function to display a list of types,
do this in the tool. Also, sort the list.

The list of image types is quite long, and hard to discover. Print it out
when we show help information.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agosandbox: Enable dhry command
Simon Glass [Tue, 23 Jun 2015 21:38:24 +0000 (15:38 -0600)]
sandbox: Enable dhry command

Provide access to the dhrystone benchmark command.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoAdd a dhrystone benchmark command
Simon Glass [Tue, 23 Jun 2015 21:38:23 +0000 (15:38 -0600)]
Add a dhrystone benchmark command

Drystone provides a convenient sanity check that the CPU is running at full
speed. Add this as a command which can be enabled as needed.

Note: I investigated using Coremark for this but there was a license
agreement and I could not work out if it was GPL-compatible.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoarmv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.
Zhichun Hua [Mon, 29 Jun 2015 07:50:42 +0000 (15:50 +0800)]
armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.

When final MMU table is setup in DDR, TCR attributes must match
those of the memroy for cacheability and shareability.

Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
8 years agoarmv8: Fix TCR macros for shareability attribute
Zhichun Hua [Mon, 29 Jun 2015 07:49:37 +0000 (15:49 +0800)]
armv8: Fix TCR macros for shareability attribute

For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit
position [13:12] of TCR_ELx register.

Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a/defconfig: Enable FSL_DSPI, OF_CONTROL and DM support
Haikun.Wang@freescale.com [Fri, 3 Jul 2015 08:51:36 +0000 (16:51 +0800)]
armv8/ls2085a/defconfig: Enable FSL_DSPI, OF_CONTROL and DM support

Freescale DSPI driver has been converted to Driver Model.
The new driver depends on OF_CONTROL, DM, DM_SPI.
This patch enable FSL_DSPI and its dependence configure options.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085ardb: Enable DSPI flash support for LS2085ARDB
Haikun Wang [Fri, 3 Jul 2015 08:51:35 +0000 (16:51 +0800)]
armv8/ls2085ardb: Enable DSPI flash support for LS2085ARDB

Enable DSPI flash related configurations for LS2085ARDB.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085aqds: Enable DSPI flash support for LS2085AQDS
Haikun Wang [Fri, 3 Jul 2015 08:51:34 +0000 (16:51 +0800)]
armv8/ls2085aqds: Enable DSPI flash support for LS2085AQDS

Enable DSPI flash related configurations.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085ardb: DSPI pin muxing configure through QIXIS CPLD
Haikun.Wang@freescale.com [Fri, 26 Jun 2015 11:58:24 +0000 (19:58 +0800)]
armv8/ls2085ardb: DSPI pin muxing configure through QIXIS CPLD

DSPI has pin muxing with SDHC and other IPs, this patch check the
value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check
the "hwconfig" variable. If those pins are configured to DSPI and
"hwconfig" enable DSPI, set the BRDCFG5 of QIXIS CPLD to configure
the routing to on-board SPI memory. Otherwise will configure to SDHC.
DSPI is enabled in "hwconfig" by appending "dspi", eg.
setenv hwconfig "$hwconfig;dspi"

Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085aqds: DSPI pin muxing configure through QIXIS
Haikun Wang [Fri, 26 Jun 2015 11:58:12 +0000 (19:58 +0800)]
armv8/ls2085aqds: DSPI pin muxing configure through QIXIS

DSPI has pin muxing with SDHC and other IPs, this patch check the
value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check
the "hwconfig" variable. If those pins are configured to DSPI and
"hwconfig" enable DSPI, set the BRDCFG5 of QIXIS FPGA to configure
the routing to on-board SPI memory. Otherwise will configure to SDHC.
DSPI is enabled in "hwconfig" by appending "dspi", eg.
setenv hwconfig "$hwconfig;dspi"

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: Enable DSPI get input clk form 'mxc_get_clock'
Haikun Wang [Fri, 26 Jun 2015 11:56:11 +0000 (19:56 +0800)]
armv8/ls2085a: Enable DSPI get input clk form 'mxc_get_clock'

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm/dts/ls2085a: Add dts files for LS2085AQDS and LS2085ARDB
Haikun Wang [Fri, 26 Jun 2015 11:48:58 +0000 (19:48 +0800)]
arm/dts/ls2085a: Add dts files for LS2085AQDS and LS2085ARDB

Add dts source files for LS2085AQDS and LS2085ARDB boards.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm/dts/ls2085a: Add DSPI dts node
Haikun Wang [Fri, 26 Jun 2015 11:48:45 +0000 (19:48 +0800)]
arm/dts/ls2085a: Add DSPI dts node

Add DSPI controller dts node in fsl-ls2085a.dtsi

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm/dts/ls2085a: Bring in ls2085a dts files from linux kernel
Haikun Wang [Fri, 26 Jun 2015 11:48:36 +0000 (19:48 +0800)]
arm/dts/ls2085a: Bring in ls2085a dts files from linux kernel

Bring in required device tree files for ls2085a from Linux. These are
initially unchanged and have a number of pieces not needed by U-Boot.

Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm/ls102xa: Add little-endian mode support for audio IPs
Alison Wang [Tue, 9 Jun 2015 08:07:49 +0000 (16:07 +0800)]
arm/ls102xa: Add little-endian mode support for audio IPs

As SCFG_ENDIANCR register is added to choose little-endian or big-endian
for audio IPs on Rev2.0 silion, little-endian mode is selected.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm/ls102xa: Add PSCI support for ls102xa
Wang Dongsheng [Thu, 4 Jun 2015 04:01:09 +0000 (12:01 +0800)]
arm/ls102xa: Add PSCI support for ls102xa

Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoARMv7: Factor out reusable timer_wait from sunxi/psci_sun7i.S
Wang Dongsheng [Thu, 4 Jun 2015 04:01:08 +0000 (12:01 +0800)]
ARMv7: Factor out reusable timer_wait from sunxi/psci_sun7i.S

timer_wait is moved from sunxi/psci_sun7i.S, and it can be converted
completely into a reusable armv7 generic timer. LS1021A will use it
as well.

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm: ls1021a: Remove the inappropriate use of the function 'sprintf'
Alison Wang [Mon, 11 May 2015 07:39:47 +0000 (15:39 +0800)]
arm: ls1021a: Remove the inappropriate use of the function 'sprintf'

As the function 'sprintf' does not check buffer boundaries but outputs
to the buffer 'enet' of fixed size (16), this patch removes the function
'sprintf', and uses 'strcpy' instead. It will assign the character
arrays 'enet' and 'phy' the corresponding character strings.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoboard/ls2085a: Increase kernel_size value in env variable
Prabhakar Kushwaha [Wed, 1 Jul 2015 10:58:22 +0000 (16:28 +0530)]
board/ls2085a: Increase kernel_size value in env variable

Linux itb image size has been increased from 30MB.

So updating kernel_size to 40MB in env variable.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoboard/ls2085rdb: Export functions for standalone AQ FW load apps
Prabhakar Kushwaha [Sun, 28 Jun 2015 05:33:59 +0000 (11:03 +0530)]
board/ls2085rdb: Export functions for standalone AQ FW load apps

Export functions required by Aquntia PHY firmware load application.
functions are memset, strcpy, mdelay, mdio_get_current_dev,
phy_find_by_mask, mdio_phydev_for_ethname and miiphy_set_current_dev

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodriver/ldpaa_eth:Avoid infinite loop in ldpaa_eth_rx
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:59:08 +0000 (11:29 +0530)]
driver/ldpaa_eth:Avoid infinite loop in ldpaa_eth_rx

Change infinite loop mechanism to timer based polling for QBMAN release in
ldpaa_eth_rx.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodriver/ldpaa_eth: Avoid TX conf frames
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:59:07 +0000 (11:29 +0530)]
driver/ldpaa_eth: Avoid TX conf frames

Polling of TX conf frames is not a mandatory option.
Packets can be transferred via WRIOP without TX conf frame.

Configure ldpaa_eth driver to use TX path without confirmation frame

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodriver/ldpaa_eth: Add timeout handling DQRR entry read
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:59:06 +0000 (11:29 +0530)]
driver/ldpaa_eth: Add timeout handling DQRR entry read

Volatile command does not return frame immidiately, need to wait till a frame
is available in DQRR. Ideally it should be a blocking call.

Add timeout handling for DQRR frame instead of retry counter.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodriver/ldpaa_eth: Retry enqueue if portal was busy
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:59:05 +0000 (11:29 +0530)]
driver/ldpaa_eth: Retry enqueue if portal was busy

Do not immediately return if the enqueue function returns -EBUSY; re-try
mulitple times.

if timeout occures, release the buffer.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/fsl-lsch3: device tree fixups for PCI stream IDs
Stuart Yoder [Thu, 2 Jul 2015 05:59:04 +0000 (11:29 +0530)]
armv8/fsl-lsch3: device tree fixups for PCI stream IDs

This patch adds the infrastructure to update device
tree nodes to convey SMMU stream IDs in the device
tree.  Fixups are implemented for PCI controllers
initially.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodrivers/fsl-mc: dynamically create ICID pool in DPC
Stuart Yoder [Thu, 2 Jul 2015 05:59:03 +0000 (11:29 +0530)]
drivers/fsl-mc: dynamically create ICID pool in DPC

delete any existing ICID pools in the DPC and create
a new one based on the stream ID partitioning for
the SoC

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/fsl-lsch3: partition stream IDs
Stuart Yoder [Thu, 2 Jul 2015 05:59:02 +0000 (11:29 +0530)]
armv8/fsl-lsch3: partition stream IDs

Stream IDs on ls2085a devices are not hardwired and are
programmed by sw.  There are a limited number of stream IDs
available, and the partitioning of them is scenario dependent.
This header defines the partitioning between legacy, PCI,
and DPAA2 devices.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodrivers: fsl-mc: Return error for major version mismatch
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:59:01 +0000 (11:29 +0530)]
drivers: fsl-mc: Return error for major version mismatch

Management complex major version should match to the firmware present in flash.

Return error during mismatch of major version.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodrivers: fsl-mc: Update qbman driver
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:59:00 +0000 (11:29 +0530)]
drivers: fsl-mc: Update qbman driver

Update qbman driver
 - As per latest available qbman driver
 - Use of atomic APIs

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Geoff Thorpe <Geoff.Thorpe@freescale.com>
CC: Haiying Wang <Haiying.Wang@freescale.com>
CC: Roy Pledge <Roy.Pledge@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodrivers: fsl-mc: Update flibs to mc-0.6.0.1
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:58:59 +0000 (11:28 +0530)]
drivers: fsl-mc: Update flibs to mc-0.6.0.1

Update flibs changes to mc-0.6.0.1 for dpmang, dprc, dpni and dpio objects
Also rename qbman_portal_ce/ci_paddr to qbman_portal_ce/ci_offset in
dpio_attr. These are now offsets from the SoC QBMan portals base.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodrivers/fsl-mc: Autoload AOIP image from NOR flash
J. German Rivera [Thu, 2 Jul 2015 05:58:58 +0000 (11:28 +0530)]
drivers/fsl-mc: Autoload AOIP image from NOR flash

Load AIOP image from NOR flash into DDR so that the MC firmware
the MC fw can start it at boot time

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodriver/ldpaa_eth:Flush buffer before seeding BMAN after TX_conf
Prabhakar Kushwaha [Thu, 2 Jul 2015 05:58:57 +0000 (11:28 +0530)]
driver/ldpaa_eth:Flush buffer before seeding BMAN after TX_conf

Flush buffer before releasing to BMan after TX_conf to ensure, the core does
not have any cachelines that the WRIOP will DMA to.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodrivers/fsl-mc: Make MC boot error messages more readable
J. German Rivera [Thu, 2 Jul 2015 05:58:56 +0000 (11:28 +0530)]
drivers/fsl-mc: Make MC boot error messages more readable

Make it easier for the user to notice when the MC firmware
had problems booting.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: enable debug server
Stuart Yoder [Thu, 28 May 2015 09:24:15 +0000 (14:54 +0530)]
armv8/ls2085a: enable debug server

Signed-off-by: Stuart Yoder <stuart.yoder at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr
Prabhakar Kushwaha [Tue, 2 Jun 2015 05:25:52 +0000 (10:55 +0530)]
armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr

The agreed split of the top of memory is 256M for debug server and 256M
 for MC. This patch implements the split.

 In addition, the MC mem must be 512MB aligned, so the amount of memory
 to hide must be 512MB to achieve that alignment.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarm/errata: Update required bits for A57 cores erratas
Bhupesh Sharma [Thu, 28 May 2015 09:24:13 +0000 (14:54 +0530)]
arm/errata: Update required bits for A57 cores erratas

This patch updates the setting of required bits for A57 cores erratas
- 828024 and 826974

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Dai Haruki <dai.haruki at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agodriver/fsl_debug_server: Fix the DDR hide logic for LS2085a
Bhupesh Sharma [Thu, 28 May 2015 09:24:12 +0000 (14:54 +0530)]
driver/fsl_debug_server: Fix the DDR hide logic for LS2085a

This patch fixes the DDR hide logic for LS2085a, correcting the way
the Debug Server FW and MC FW images are placed on the top of system
DDR and how the rest of the system DDR space is made visibile to Linux.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: Update SoC README for DDR layout
Prabhakar Kushwaha [Thu, 28 May 2015 09:24:11 +0000 (14:54 +0530)]
armv8/ls2085a: Update SoC README for DDR layout

Update SoC README to provide details of
 - Memory regions
 - Memory used by MC and Debug server

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: Expose all DDR region(s) to Linux
Bhupesh Sharma [Thu, 28 May 2015 09:24:10 +0000 (14:54 +0530)]
armv8/ls2085a: Expose all DDR region(s) to Linux

This patch allows u-boot to expose the complete DDR region(s) to Linux
(after subtracting the memory hidden via MEM_TOP_HIDE mechanism).

This allows the u-boot to support the 48-bit VA support provided by
ARM64 Linux in flavors 3.18 and above, by passing the appropriate
'memory' DTS nodes.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085ardb: Fix SPD address error on early boards
York Sun [Thu, 28 May 2015 09:24:09 +0000 (14:54 +0530)]
armv8/ls2085ardb: Fix SPD address error on early boards

Board rev C and earlier has duplicated SPD address on 2nd DDR
controller slots. It is fixed on rev D and later. SPD addresses
need to be updated accordingly.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
8 years agodriver/ddr/fsl: Add a hook to update SPD address
York Sun [Thu, 28 May 2015 09:24:08 +0000 (14:54 +0530)]
driver/ddr/fsl: Add a hook to update SPD address

In case SPD address changes between board revisions, updating SPD
address can be called from board file.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
8 years agoarmv8/ls2085a: Avoid hard-coding for board name print
Prabhakar Kushwaha [Thu, 28 May 2015 09:24:07 +0000 (14:54 +0530)]
armv8/ls2085a: Avoid hard-coding for board name print

LS2085A supports 6 personalities i.e. LS2045AE, LS2045A, LS2080AE,
LS2080A, LS2085AE and LS2085A personlities.

Instead of hard-coding, board name should change as per selected
personality.

Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/fsl-ch3: Add support to print SoC personality
Prabhakar Kushwaha [Thu, 28 May 2015 09:24:06 +0000 (14:54 +0530)]
armv8/fsl-ch3: Add support to print SoC personality

This patch adds support to print out the SoC personality.
Freescale LS20xx SoCs (compliant to Chassis-3 specifications) can
have 6 personalities: LS2045AE, LS2045A, LS2080AE, LS2080A,
LS2085AE and LS2085A

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/fsl-lsch3: Fix DDR speed message
York Sun [Thu, 28 May 2015 09:24:05 +0000 (14:54 +0530)]
armv8/fsl-lsch3: Fix DDR speed message

DDR speed should be in MT/s, not MHz.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
8 years agoarmv8/ls2085RDB: Update board version print logic
Prabhakar Kushwaha [Thu, 28 May 2015 09:24:04 +0000 (14:54 +0530)]
armv8/ls2085RDB: Update board version print logic

As per updated board document, no need to substract 1 from arch[BRD]
bit field. Default value + 'A' represents the board revision.

So update board version print logic to reflect the same.

Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoboard/fsl/common: Fix eeprom system version endianness
Jaiprakash Singh [Thu, 28 May 2015 09:24:03 +0000 (14:54 +0530)]
board/fsl/common: Fix eeprom system version endianness

SYSTEM ID EPPROM always store SYSTEM version info in big endian format.
SoC with ARM or PowerPC core should read/write version info from eeprom
in BIG endian format.

So use cpu-specific APIs to read SYSTEM version.

Signed-off-by: Jaiprakash Singh <b44839 at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: Increase the supported kernel size
Bhupesh Sharma [Thu, 28 May 2015 09:24:02 +0000 (14:54 +0530)]
armv8/ls2085a: Increase the supported kernel size

Increases the kernel size supported for LS2085A platforms:-
 - Update environment variables
 - Add ramdisk_size in bootargs env variable
 - Define  CONFIG_SYS_BOOTM_LEN to 64MB

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085rdb: Update PCA9547PW slave address
Prabhakar Kushwaha [Thu, 28 May 2015 09:24:01 +0000 (14:54 +0530)]
armv8/ls2085rdb: Update PCA9547PW slave address

Primary Mux on I2C1 controller has slave address as 0x75.
So update its address.

Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085qds: Update SFP TX bit as "0" to enable XFI
Prabhakar Kushwaha [Thu, 28 May 2015 09:24:00 +0000 (14:54 +0530)]
armv8/ls2085qds: Update SFP TX bit as "0" to enable XFI

FPGA BRDCFG9[SFP_TX] should be clear in order to enable XFI ports.

Signed-off-by: Dai Haruki <Dai.Haruki at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: call ft_pcie_setup() to change dts status
Prabhakar Kushwaha [Thu, 28 May 2015 09:23:59 +0000 (14:53 +0530)]
armv8/ls2085a: call ft_pcie_setup() to change dts status

call ft_pci_setup() to disable PCIe dts node if corresponding
PCIe controller is disabled according to RCW

Signed-off-by: Minghuan Lian <Minghuan.Lian at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085a: Update LS2085a PCIe compatible
Prabhakar Kushwaha [Thu, 28 May 2015 09:23:58 +0000 (14:53 +0530)]
armv8/ls2085a: Update LS2085a PCIe compatible

Compatible field "fsl,20851a-pcie" is not correct.
So update it to "fsl,ls2085a-pcie"

Signed-off-by: Minghuan Lian <Minghuan.Lian at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
8 years agoarmv8/ls2085aqds: Add support of SerDes protocol 0x49
Prabhakar Kushwaha [Thu, 28 May 2015 09:23:57 +0000 (14:53 +0530)]
armv8/ls2085aqds: Add support of SerDes protocol 0x49

SerDes Protocol 0x49 enables 4 SGMII, PEX4, SATA1 and SATA2.

Add support of 0x49 SerDes protocol to enable 4SGMII on slot4 of
ls2085aqds platform.

Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>