Bin Meng [Thu, 3 Sep 2015 12:37:29 +0000 (05:37 -0700)]
net: designware: Fix build warnings
When building dm version of designware eth driver on a platform
with 64-bit phys_addr_t, it reports the following warnings:
drivers/net/designware.c: In function 'designware_eth_probe':
drivers/net/designware.c:599:2:
warning: format '%lx' expects argument of type 'long unsigned int',
but argument 3 has type 'phys_addr_t' [-Wformat]
drivers/net/designware.c:600:21:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
drivers/net/designware.c:601:21:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
This commit fixes the build warnings.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 3 Sep 2015 12:37:25 +0000 (05:37 -0700)]
x86: Enable PCIe controller on quark/galileo
Quark SoC holds the PCIe controller in reset following a power on.
U-Boot needs to release the PCIe controller from reset. The PCIe
controller (D23:F0/F1) will not be visible in PCI configuration
space and any access to its PCI configuration registers will cause
system hang while it is held in reset.
Enable PCIe controller per Quark firmware writer guide.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 3 Sep 2015 12:37:24 +0000 (05:37 -0700)]
x86: quark: Avoid chicken and egg problem
If we convert to use driver model pci on quark, we will encounter
some chicken and egg problems like below:
- To enable PCIe root ports, we need program some registers on the
message bus via pci bus. With driver model, the first time to
access pci bus, the pci enumeration process will be triggered.
But without first enabling PCIe root ports, pci enumeration
just hangs when scanning PCIe root ports.
- Similar situation happens when trying to access GPIO from the
PCIe enabling codes, as GPIO requires its block base address
to be assigned via a pci configuration register in the bridge.
To avoid such dilemma, replace all pci calls in the quark codes
to use the local version which does not go through driver model.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 3 Sep 2015 12:37:23 +0000 (05:37 -0700)]
x86: quark: Optimize MRC execution time
Intel Quark SoC has a low end x86 processor with only 400MHz
frequency. Currently it takes about 15 seconds for U-Boot to
boot to shell and the most time consuming part is with MRC,
which is about 12 seconds. MRC programs lots of registers on
the SoC internal message bus indirectly accessed via pci bus.
To speed up the boot, create an optimized version of pci config
read/write dword routines which directly operate on PCI I/O ports.
These two routines are inlined to provide better performance too.
Now it only takes about 3 seconds to finish MRC, which is really
fast (4 times faster than before).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 26 Aug 2015 03:52:14 +0000 (21:52 -0600)]
buildman: Improve the config comparison feature
At present buildman can compare configurations between commits but the
feature is less useful than it could be. There is no summary by architecture
and changes are not reported on a per-board basis.
Correct these deficiencies so that it is possible to see exactly what is
changing for any number of boards.
Note that 'buildman -b <branch> -C' is recommended for any build where you
will be comparing configuration. Without -C the correct configuration will
not be reported since changes will often not be picked up.
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Since that commit, patman generates useless patches for file removal;
"git format -D" prints only the header but not the diff when deleting
files, and "git am" always refuses such patches.
The following is the quotation from "man git-format-patch":
-D, --irreversible-delete
Omit the preimage for deletes, i.e. print only the header but
not the diff between the preimage and /dev/null. The resulting
patch is not meant to be applied with patch nor git apply; this
is solely for people who want to just concentrate on reviewing
the text after the change. In addition, the output obviously
lack enough information to apply such a patch in reverse, even
manually, hence the name of the option.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 28 Aug 2015 05:25:56 +0000 (22:25 -0700)]
x86: crownbay: Convert to use CONFIG_DM_ETH for E1000
Since E1000 driver has been converted to driver model, enable it
on Intel Crown Bay. But the Intel Topcliff GbE driver has not been
converted to driver model yet, disable it for now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Bin Meng [Fri, 28 Aug 2015 05:25:53 +0000 (22:25 -0700)]
dm: test: Add a new test case for dm_test_eth_rotate
Add one more ethernet device node in the sandbox test device tree,
with name 'sbe5'. This is to support a new test case for testing
network device rotation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Bin Meng [Fri, 28 Aug 2015 05:25:51 +0000 (22:25 -0700)]
net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"
Commit 620776d "tftp: adjust settings to be suitable for 100Mbit ethernet"
causes the following error message when trying to load a file using 'tftp'
command via a tftp server.
TFTP error: 'Unsupported option(s) requested' (8)
This is due to with commit 620776d changes, the tftp option 'timeout'
value is now set to zero which is an invalid value as per RFC2349 [1].
Valid values range between "1" and "255" seconds, inclusive. With some
tftp servers that strictly implement the RFC requirement, it reports
such an error message.
Simon Glass [Fri, 28 Aug 2015 01:54:48 +0000 (19:54 -0600)]
x86: panther: Add PCI and video configuration
Add a PCI node to the device tree. This allows SPI flash and SATA to work
correctly. Also configure the video to come up correctly even though there
is no keyboard.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 27 Aug 2015 15:38:17 +0000 (08:38 -0700)]
x86: bayleybay: Change default vga bios rom address
With multiple microcode blobs included, the generated u-boot-dtb.bin
leaves merely several hundred bytes before the vga bios. Change the
vga bios rom address to make a bigger room for u-boot-dtb.bin.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 27 Aug 2015 15:38:15 +0000 (08:38 -0700)]
x86: ifdtool: Support checking region overlap before U-Boot
We have the capability to check regions written after U-Boot that
do not overlap. Since regions can also be written before U-Boot,
add such check for these too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Andy Pont <andy.pont@sdcsystems.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Thu, 20 Aug 2015 23:38:05 +0000 (17:38 -0600)]
usb: ehci: remember init mode
When an EHCI device is registered in device mode, the HW isn't actually
initialized at all, and hence isn't left in a running state. Consequently,
when the device is deregistered, ehci_shutdown() will fail, since the HW
bits it expects to see set in response to its shutdown requests will not
be sent, and the message "EHCI failed to shut down host controller." will
be printed.
Fix ehci-hcd.c to remember whether the device was registered in host or
device mode, and only call ehci_shutdown() for host mode registrations.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Lukasz Majewski [Sun, 23 Aug 2015 22:21:44 +0000 (00:21 +0200)]
tftp: update: Allow some parts of the code to be reused when CONFIG_SYS_NO_FLASH is set
Up till now it was impossible to use code from update.c when system
was not equipped with raw FLASH memory.
Such behavior prevented DFU from reusing this code.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Sun, 23 Aug 2015 22:21:42 +0000 (00:21 +0200)]
doc: dfu: tftp: README entry for TFTP extension of DFU
Documentation file for DFU extension. With this functionality it is now
possible to transfer FIT images with firmware updates via TFTP and use
DFU backend for storing them.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Commit <8bfc288c3955> ("usb: gadget: ether: Perform board
initialization from ethernet gadget driver") added board_usb_init
and board_usb_cleanup in ethernet gadget driver. But h2200 board
didn't have board_usb_init and board_usb_cleanup implementations.
This introduced the following build errors
+drivers/usb/gadget/built-in.o: In function `usb_eth_halt':
+drivers/usb/gadget/ether.c:2498: undefined reference to `board_usb_cleanup'
+drivers/usb/gadget/built-in.o: In function `usb_eth_init':
+drivers/usb/gadget/ether.c:2316: undefined reference to `board_usb_init'
Fix it here by adding empty board_usb_init and board_usb_cleanup
functions in h2200.c.
dfu: Delete superfluous initialization of the dfu_buf_size static variable
After extension of the dfu_get_buf() to also setup (implicitly) the dfu_buf_size
variable it is not needed to set dfu_buf_size to CONFIG_SYS_DFU_DATA_BUF_SIZE.
This variable is set in the dfu_get_buf() by not only considering
CONFIG_SYS_DFU_DATA_BUF but more importantly the "dfu_bufsiz" env variable.
Therefore, dfu_get_buf() should be used for initialization.
Lukasz Majewski [Sat, 15 Aug 2015 09:23:45 +0000 (11:23 +0200)]
dfu:tests: Modify dfu_gadget_test.sh to accept USB device vendor:product ID
dfu-util allows filtering on USB device vendor:product ID by using
the -d flag (-d 0451:d022).
Such option is very handy when many DFU devices are connected to a single
host PC. This commit allows testing when above situation emerges.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Lukasz Majewski <l.majewski@majess.pl>
Test HW - AM335x Beagle Bone Black
NOTE: Max size of file to transfer: 2MiB
usb: gadget: f_thor: Allocate request up to THOR_PACKET_SIZE
Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket
as the descriptors data depend on the number of descriptors
and this 64 bytes were not enough and the buffer might overflow
which results in memalign failures later.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont perform reset at the end of thor download
if configured to do reset off.
Reset may not be required in all cases and hence
provided an option to do so.
The case would be to download the images to DDR instead
of flash device.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Marek Vasut [Sun, 2 Aug 2015 23:37:28 +0000 (01:37 +0200)]
arm: socfpga: Add support for DENX MCV SoM and MCVEVK board
Add support for DENX MCV SoM, which is CycloneV based and the
associated DENX MCVEVK baseboard. The board can boot from eMMC.
Ethernet and USB is supported.
Marek Vasut [Sat, 29 Aug 2015 08:16:20 +0000 (10:16 +0200)]
arm: socfpga: Do not call board_init_r() from board_init_f()
Instead of calling board_init_r() directly from board_init_f(), just
return from board_init_f(). This will make the code continue executing
in crt0.S _main(), from which the board_init_r() is called. This patch
aligns the SoCFPGA SPL with the correct SPL design as well as reduces
the stack utilisation slightly.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Mon, 24 Aug 2015 09:51:46 +0000 (11:51 +0200)]
arm: socfpga: Assure ISWGRP 0 and 1 are inited
This fix makes sure that the ISWGRP0 and ISWGRP1 registers are
correctly inited. In case those registers are not initialized,
it is not possible to access the registers synthesised in the
FPGA through the bridges. Any such access produces data abort.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 25 Jul 2015 08:48:14 +0000 (10:48 +0200)]
mmc: dw_mmc: Probe the MMC from OF
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.
This patch now also removes previous temporary workaround.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
Sjoerd Simons [Sun, 30 Aug 2015 22:55:50 +0000 (16:55 -0600)]
rockchip: Drop first 32kb of zeros from the rkSD image type
Instead of creating a rockchip SPL SD card image with 32KB of zeros
which can be written to the start of an SD card, create the images with
only the useful data that should be written to an offset of 32KB on the
SD card.
The first 32 kilobytes aren't needed for bootup and only serve as
convenient way of accidentally obliterating your partition table.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Sjoerd Simons [Sun, 30 Aug 2015 22:55:49 +0000 (16:55 -0600)]
arm: Turn of d-cache before i-cache
Booting the kernel fails on RK3288 (and probably other rockchip SoCs)
when the i-cache is disabled/flushed before d-cache.
I have not investigated whether this is due to U-Boot hanging or whether
it's very early in the linux boot, but following the approach of the
various rockchip U-Boot forks (first disable d-cache then i-cache) makes
things work.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Sjoerd Simons [Sun, 30 Aug 2015 22:55:48 +0000 (16:55 -0600)]
rockchip: Add config_distro_bootcmd support
Now that MMC works in U-Boot add config distro command support to start
Linux in a standard fashion. One oddity here is that linux fails to load
when the fdt is relocated to above 512MB, so set fdt_high to make sure it's
loaded below that.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Sjoerd Simons [Sun, 30 Aug 2015 22:55:47 +0000 (16:55 -0600)]
rockchip: Turn off CONFIG_SPL_LED for firefly
With LED support enabled the SPL easily goes over the size limit (e.g.
with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support
in the SPL to reduce the size just enough for those compilers.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tweaked commit subject to remove _SUPPORT Signed-off-by: Simon Glass <sjg@chromium.org>
Sjoerd Simons [Sun, 30 Aug 2015 22:55:44 +0000 (16:55 -0600)]
doc: Fix reference to Rock pro when Rock 2 is meant
The Radxa Rock pro board is rk3188 based and thus won't work with U-Boot
built for RK3288. Change the documentation to refer to the intended
board, the Radxa Rock 2, which is an RK3288-based design very similar to
the firefly
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 30 Aug 2015 22:55:41 +0000 (16:55 -0600)]
rockchip: Add basic support for firefly-rk3288
The Firefly RK3288 is a suitable target board for initial mainline Rockchip
support. It includes a good set of peripherals, a recent SoC and it is
readily available.
This adds only some basic files required to allow the baord to display a
serial message in SPL and hang.
Simon Glass [Sun, 30 Aug 2015 22:55:36 +0000 (16:55 -0600)]
rockchip: rk3288: Add SDRAM init
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may be possible to generalise the code to support other
SoCs at some point.
Simon Glass [Sun, 30 Aug 2015 22:55:29 +0000 (16:55 -0600)]
power: Add support for ACT8846 PMIC
Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and
is connected to the I2C bus. This driver supports using a regulator driver
to access the regulators.
Simon Glass [Sun, 30 Aug 2015 22:55:28 +0000 (16:55 -0600)]
rockchip: Add basic peripheral and clock definitions
Add header files for the peripherals and clocks supported on Rockchip
platforms. The particular implementation (and register set) for each is
SoC-specific, but it seems that the naming can be generic.
Simon Glass [Sun, 30 Aug 2015 22:55:26 +0000 (16:55 -0600)]
rockchip: Add support for the SPI image
The Rockchip boot ROM requires a particular file format for booting from SPI.
It consists of a 512-byte header encoded with RC4, some padding and then up
to 32KB of executable code in 2KB blocks, separated by 2KB empty blocks.
Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format. This allows booting from SPI flash on supported
machines.
Simon Glass [Sun, 30 Aug 2015 22:55:25 +0000 (16:55 -0600)]
rockchip: Add support for the SD image
The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.
Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format.
Simon Glass [Sun, 30 Aug 2015 22:55:24 +0000 (16:55 -0600)]
rockchip: Add the rkimage format to mkimage
Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this so that we can create images that the boot ROM understands.
Simon Glass [Sun, 30 Aug 2015 22:55:20 +0000 (16:55 -0600)]
rockchip: Bring in RK3288 device tree file includes and bindings
Bring in required device tree files from Linux. Since mainline Linux is
somewhat behind, use the files from the Chromium tree. We can re-sync once
further code is acccepted upstream.
Simon Glass [Sun, 30 Aug 2015 22:55:17 +0000 (16:55 -0600)]
dm: Provide better debugging when a device fails to bind
All devices should bind without error. But when they don't, they can cause
driver model init to fail. A real situation where this can happen is when
there is a missing uclass.
Add a debug() call to dm_scan_fdt_node to make this easier to track.
Simon Glass [Sun, 30 Aug 2015 22:55:16 +0000 (16:55 -0600)]
dm: Improve handling of a missing uclass
When a uclass definition is missing, no drivers in that uclass can operate.
This can happen if a board has a strange collection of options (e.g. the
driver is enabled but the uclass is not).
Unfortunately this is very confusing at present. Starting up driver model
results in a -ENOENT error, which is pretty generic. Quite a big of digging
is needed to get to the root cause.
To help with this, change the error to a very strange one with no other
users in U-Boot. Also add a debug message.
Simon Glass [Sun, 30 Aug 2015 22:55:15 +0000 (16:55 -0600)]
mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Sun, 30 Aug 2015 22:55:14 +0000 (16:55 -0600)]
dm: led: Tidy up SPL options for the led and led-gpio
At present SPL does not have its own option. But these features can
increase SPL code size. Adjust the Kconfig and Makefile so that
separate a SPL option can be selected.
Simon Glass [Sun, 30 Aug 2015 22:55:13 +0000 (16:55 -0600)]
pinctrl: Add the concept of peripheral IDs
My original pinctrl patch operating using a peripheral ID enum. This was
shared between pinmux and clock and provides an easy way to specify a device
that needs to be controlled, even it is does not (yet) have a driver within
driver model.
Masahiro's new simple pinctrl gets around this by providing a
set_state_simple() pinctrl method. By passing a device to that call the
peripheral ID becomes unnecessary. If the driver needs it, it can calculate
it itself and use it internally.
However this does not solve the problem for peripheral clocks. The 'pure'
solution would be to pass a driver to the clock uclass also. But this
requires that all devices should have a driver, and a struct udevide. Also
a key optimisation of the clock uclass is allowing a peripheral clock to
be set even when there is no device for that clock.
There may be a better way to achive the same goal, but for now it seems
expedient to add in peripheral ID to the pinctrl uclass. Two methods are
added - one to get the peripheral ID and one to select it. The existing
set_state_simple() is effectively the union of these.
projects / karo-tx-uboot.git / log