arch/arm/boot/dts/armada-38x.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 38x family of SoCs.
   3  *
   4  * Copyright (C) 2014 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  *
  10  * This file is dual-licensed: you can use it either under the terms
  11  * of the GPL or the X11 license, at your option. Note that this dual
  12  * licensing only applies to this file, and not this project as a
  13  * whole.
  14  *
  15  *  a) This file is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of the
  18  *     License, or (at your option) any later version.
  19  *
  20  *     This file is distributed in the hope that it will be useful
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include "skeleton.dtsi"
  50 #include <dt-bindings/interrupt-controller/arm-gic.h>
  51 #include <dt-bindings/interrupt-controller/irq.h>
  52
  53 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  54
  55 / {
  56         model = "Marvell Armada 38x family SoC";
  57         compatible = "marvell,armada380";
  58
  59         aliases {
  60                 gpio0 = &gpio0;
  61                 gpio1 = &gpio1;
  62                 ethernet0 = &eth0;
  63                 ethernet1 = &eth1;
  64                 ethernet2 = &eth2;
  65         };
  66
  67         soc {
  68                 compatible = "marvell,armada380-mbus", "simple-bus";
  69                 #address-cells = <2>;
  70                 #size-cells = <1>;
  71                 controller = <&mbusc>;
  72                 interrupt-parent = <&gic>;
  73                 pcie-mem-aperture = <0xe0000000 0x8000000>;
  74                 pcie-io-aperture  = <0xe8000000 0x100000>;
  75
  76                 bootrom {
  77                         compatible = "marvell,bootrom";
  78                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
  79                 };
  80
  81                 devbus-bootcs {
  82                         compatible = "marvell,mvebu-devbus";
  83                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  84                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87                         clocks = <&coreclk 0>;
  88                         status = "disabled";
  89                 };
  90
  91                 devbus-cs0 {
  92                         compatible = "marvell,mvebu-devbus";
  93                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  94                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  95                         #address-cells = <1>;
  96                         #size-cells = <1>;
  97                         clocks = <&coreclk 0>;
  98                         status = "disabled";
  99                 };
 100
 101                 devbus-cs1 {
 102                         compatible = "marvell,mvebu-devbus";
 103                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
 104                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
 105                         #address-cells = <1>;
 106                         #size-cells = <1>;
 107                         clocks = <&coreclk 0>;
 108                         status = "disabled";
 109                 };
 110
 111                 devbus-cs2 {
 112                         compatible = "marvell,mvebu-devbus";
 113                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
 114                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
 115                         #address-cells = <1>;
 116                         #size-cells = <1>;
 117                         clocks = <&coreclk 0>;
 118                         status = "disabled";
 119                 };
 120
 121                 devbus-cs3 {
 122                         compatible = "marvell,mvebu-devbus";
 123                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
 124                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127                         clocks = <&coreclk 0>;
 128                         status = "disabled";
 129                 };
 130
 131                 internal-regs {
 132                         compatible = "simple-bus";
 133                         #address-cells = <1>;
 134                         #size-cells = <1>;
 135                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 136
 137                         L2: cache-controller@8000 {
 138                                 compatible = "arm,pl310-cache";
 139                                 reg = <0x8000 0x1000>;
 140                                 cache-unified;
 141                                 cache-level = <2>;
 142                         };
 143
 144                         scu@c000 {
 145                                 compatible = "arm,cortex-a9-scu";
 146                                 reg = <0xc000 0x58>;
 147                         };
 148
 149                         timer@c600 {
 150                                 compatible = "arm,cortex-a9-twd-timer";
 151                                 reg = <0xc600 0x20>;
 152                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
 153                                 clocks = <&coreclk 2>;
 154                         };
 155
 156                         gic: interrupt-controller@d000 {
 157                                 compatible = "arm,cortex-a9-gic";
 158                                 #interrupt-cells = <3>;
 159                                 #size-cells = <0>;
 160                                 interrupt-controller;
 161                                 reg = <0xd000 0x1000>,
 162                                       <0xc100 0x100>;
 163                         };
 164
 165                         spi0: spi@10600 {
 166                                 compatible = "marvell,orion-spi";
 167                                 reg = <0x10600 0x50>;
 168                                 #address-cells = <1>;
 169                                 #size-cells = <0>;
 170                                 cell-index = <0>;
 171                                 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 172                                 clocks = <&coreclk 0>;
 173                                 status = "disabled";
 174                         };
 175
 176                         spi1: spi@10680 {
 177                                 compatible = "marvell,orion-spi";
 178                                 reg = <0x10680 0x50>;
 179                                 #address-cells = <1>;
 180                                 #size-cells = <0>;
 181                                 cell-index = <1>;
 182                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 183                                 clocks = <&coreclk 0>;
 184                                 status = "disabled";
 185                         };
 186
 187                         i2c0: i2c@11000 {
 188                                 compatible = "marvell,mv64xxx-i2c";
 189                                 reg = <0x11000 0x20>;
 190                                 #address-cells = <1>;
 191                                 #size-cells = <0>;
 192                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 193                                 timeout-ms = <1000>;
 194                                 clocks = <&coreclk 0>;
 195                                 status = "disabled";
 196                         };
 197
 198                         i2c1: i2c@11100 {
 199                                 compatible = "marvell,mv64xxx-i2c";
 200                                 reg = <0x11100 0x20>;
 201                                 #address-cells = <1>;
 202                                 #size-cells = <0>;
 203                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 204                                 timeout-ms = <1000>;
 205                                 clocks = <&coreclk 0>;
 206                                 status = "disabled";
 207                         };
 208
 209                         uart0: serial@12000 {
 210                                 compatible = "snps,dw-apb-uart";
 211                                 reg = <0x12000 0x100>;
 212                                 reg-shift = <2>;
 213                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 214                                 reg-io-width = <1>;
 215                                 clocks = <&coreclk 0>;
 216                                 status = "disabled";
 217                         };
 218
 219                         serial@12100 {
 220                                 compatible = "snps,dw-apb-uart";
 221                                 reg = <0x12100 0x100>;
 222                                 reg-shift = <2>;
 223                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 224                                 reg-io-width = <1>;
 225                                 clocks = <&coreclk 0>;
 226                                 status = "disabled";
 227                         };
 228
 229                         pinctrl: pinctrl@18000 {
 230                                 reg = <0x18000 0x20>;
 231
 232                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
 233                                         marvell,pins = "mpp6", "mpp7", "mpp8",
 234                                                        "mpp9", "mpp10", "mpp11",
 235                                                        "mpp12", "mpp13", "mpp14",
 236                                                        "mpp15", "mpp16", "mpp17";
 237                                         marvell,function = "ge0";
 238                                 };
 239
 240                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
 241                                         marvell,pins = "mpp21", "mpp27", "mpp28",
 242                                                        "mpp29", "mpp30", "mpp31",
 243                                                        "mpp32", "mpp37", "mpp38",
 244                                                        "mpp39", "mpp40", "mpp41";
 245                                         marvell,function = "ge1";
 246                                 };
 247
 248                                 i2c0_pins: i2c-pins-0 {
 249                                         marvell,pins = "mpp2", "mpp3";
 250                                         marvell,function = "i2c0";
 251                                 };
 252
 253                                 mdio_pins: mdio-pins {
 254                                         marvell,pins = "mpp4", "mpp5";
 255                                         marvell,function = "ge";
 256                                 };
 257
 258                                 ref_clk0_pins: ref-clk-pins-0 {
 259                                         marvell,pins = "mpp45";
 260                                         marvell,function = "ref";
 261                                 };
 262
 263                                 ref_clk1_pins: ref-clk-pins-1 {
 264                                         marvell,pins = "mpp46";
 265                                         marvell,function = "ref";
 266                                 };
 267
 268                                 spi0_pins: spi-pins-0 {
 269                                         marvell,pins = "mpp22", "mpp23", "mpp24",
 270                                                        "mpp25";
 271                                         marvell,function = "spi0";
 272                                 };
 273
 274                                 spi1_pins: spi-pins-1 {
 275                                         marvell,pins = "mpp56", "mpp57", "mpp58",
 276                                                        "mpp59";
 277                                         marvell,function = "spi1";
 278                                 };
 279
 280                                 uart0_pins: uart-pins-0 {
 281                                         marvell,pins = "mpp0", "mpp1";
 282                                         marvell,function = "ua0";
 283                                 };
 284
 285                                 uart1_pins: uart-pins-1 {
 286                                         marvell,pins = "mpp19", "mpp20";
 287                                         marvell,function = "ua1";
 288                                 };
 289
 290                                 sdhci_pins: sdhci-pins {
 291                                         marvell,pins = "mpp48", "mpp49", "mpp50",
 292                                                        "mpp52", "mpp53", "mpp54",
 293                                                        "mpp55", "mpp57", "mpp58",
 294                                                        "mpp59";
 295                                         marvell,function = "sd0";
 296                                 };
 297
 298                                 sata0_pins: sata-pins-0 {
 299                                         marvell,pins = "mpp20";
 300                                         marvell,function = "sata0";
 301                                 };
 302
 303                                 sata1_pins: sata-pins-1 {
 304                                         marvell,pins = "mpp19";
 305                                         marvell,function = "sata1";
 306                                 };
 307
 308                                 sata2_pins: sata-pins-2 {
 309                                         marvell,pins = "mpp47";
 310                                         marvell,function = "sata2";
 311                                 };
 312
 313                                 sata3_pins: sata-pins-3 {
 314                                         marvell,pins = "mpp44";
 315                                         marvell,function = "sata3";
 316                                 };
 317                         };
 318
 319                         gpio0: gpio@18100 {
 320                                 compatible = "marvell,orion-gpio";
 321                                 reg = <0x18100 0x40>;
 322                                 ngpios = <32>;
 323                                 gpio-controller;
 324                                 #gpio-cells = <2>;
 325                                 interrupt-controller;
 326                                 #interrupt-cells = <2>;
 327                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 328                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 329                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 330                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 331                         };
 332
 333                         gpio1: gpio@18140 {
 334                                 compatible = "marvell,orion-gpio";
 335                                 reg = <0x18140 0x40>;
 336                                 ngpios = <28>;
 337                                 gpio-controller;
 338                                 #gpio-cells = <2>;
 339                                 interrupt-controller;
 340                                 #interrupt-cells = <2>;
 341                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 342                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 343                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 344                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 345                         };
 346
 347                         system-controller@18200 {
 348                                 compatible = "marvell,armada-380-system-controller",
 349                                              "marvell,armada-370-xp-system-controller";
 350                                 reg = <0x18200 0x100>;
 351                         };
 352
 353                         gateclk: clock-gating-control@18220 {
 354                                 compatible = "marvell,armada-380-gating-clock";
 355                                 reg = <0x18220 0x4>;
 356                                 clocks = <&coreclk 0>;
 357                                 #clock-cells = <1>;
 358                         };
 359
 360                         coreclk: mvebu-sar@18600 {
 361                                 compatible = "marvell,armada-380-core-clock";
 362                                 reg = <0x18600 0x04>;
 363                                 #clock-cells = <1>;
 364                         };
 365
 366                         mbusc: mbus-controller@20000 {
 367                                 compatible = "marvell,mbus-controller";
 368                                 reg = <0x20000 0x100>, <0x20180 0x20>;
 369                         };
 370
 371                         mpic: interrupt-controller@20a00 {
 372                                 compatible = "marvell,mpic";
 373                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
 374                                 #interrupt-cells = <1>;
 375                                 #size-cells = <1>;
 376                                 interrupt-controller;
 377                                 msi-controller;
 378                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 379                         };
 380
 381                         timer@20300 {
 382                                 compatible = "marvell,armada-380-timer",
 383                                              "marvell,armada-xp-timer";
 384                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 385                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
 386                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
 387                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
 388                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
 389                                                       <&mpic 5>,
 390                                                       <&mpic 6>;
 391                                 clocks = <&coreclk 2>, <&refclk>;
 392                                 clock-names = "nbclk", "fixed";
 393                         };
 394
 395                         watchdog@20300 {
 396                                 compatible = "marvell,armada-380-wdt";
 397                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
 398                                 clocks = <&coreclk 2>, <&refclk>;
 399                                 clock-names = "nbclk", "fixed";
 400                         };
 401
 402                         cpurst@20800 {
 403                                 compatible = "marvell,armada-370-cpu-reset";
 404                                 reg = <0x20800 0x10>;
 405                         };
 406
 407                         mpcore-soc-ctrl@20d20 {
 408                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
 409                                 reg = <0x20d20 0x6c>;
 410                         };
 411
 412                         coherency-fabric@21010 {
 413                                 compatible = "marvell,armada-380-coherency-fabric";
 414                                 reg = <0x21010 0x1c>;
 415                         };
 416
 417                         pmsu@22000 {
 418                                 compatible = "marvell,armada-380-pmsu";
 419                                 reg = <0x22000 0x1000>;
 420                         };
 421
 422                         eth1: ethernet@30000 {
 423                                 compatible = "marvell,armada-370-neta";
 424                                 reg = <0x30000 0x4000>;
 425                                 interrupts-extended = <&mpic 10>;
 426                                 clocks = <&gateclk 3>;
 427                                 status = "disabled";
 428                         };
 429
 430                         eth2: ethernet@34000 {
 431                                 compatible = "marvell,armada-370-neta";
 432                                 reg = <0x34000 0x4000>;
 433                                 interrupts-extended = <&mpic 12>;
 434                                 clocks = <&gateclk 2>;
 435                                 status = "disabled";
 436                         };
 437
 438                         usb@58000 {
 439                                 compatible = "marvell,orion-ehci";
 440                                 reg = <0x58000 0x500>;
 441                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 442                                 clocks = <&gateclk 18>;
 443                                 status = "disabled";
 444                         };
 445
 446                         xor@60800 {
 447                                 compatible = "marvell,orion-xor";
 448                                 reg = <0x60800 0x100
 449                                        0x60a00 0x100>;
 450                                 clocks = <&gateclk 22>;
 451                                 status = "okay";
 452
 453                                 xor00 {
 454                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 455                                         dmacap,memcpy;
 456                                         dmacap,xor;
 457                                 };
 458                                 xor01 {
 459                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 460                                         dmacap,memcpy;
 461                                         dmacap,xor;
 462                                         dmacap,memset;
 463                                 };
 464                         };
 465
 466                         xor@60900 {
 467                                 compatible = "marvell,orion-xor";
 468                                 reg = <0x60900 0x100
 469                                        0x60b00 0x100>;
 470                                 clocks = <&gateclk 28>;
 471                                 status = "okay";
 472
 473                                 xor10 {
 474                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 475                                         dmacap,memcpy;
 476                                         dmacap,xor;
 477                                 };
 478                                 xor11 {
 479                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 480                                         dmacap,memcpy;
 481                                         dmacap,xor;
 482                                         dmacap,memset;
 483                                 };
 484                         };
 485
 486                         eth0: ethernet@70000 {
 487                                 compatible = "marvell,armada-370-neta";
 488                                 reg = <0x70000 0x4000>;
 489                                 interrupts-extended = <&mpic 8>;
 490                                 clocks = <&gateclk 4>;
 491                                 status = "disabled";
 492                         };
 493
 494                         mdio@72004 {
 495                                 #address-cells = <1>;
 496                                 #size-cells = <0>;
 497                                 compatible = "marvell,orion-mdio";
 498                                 reg = <0x72004 0x4>;
 499                                 clocks = <&gateclk 4>;
 500                         };
 501
 502                         rtc@a3800 {
 503                                 compatible = "marvell,armada-380-rtc";
 504                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
 505                                 reg-names = "rtc", "rtc-soc";
 506                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 507                         };
 508
 509                         sata@a8000 {
 510                                 compatible = "marvell,armada-380-ahci";
 511                                 reg = <0xa8000 0x2000>;
 512                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 513                                 clocks = <&gateclk 15>;
 514                                 status = "disabled";
 515                         };
 516
 517                         sata@e0000 {
 518                                 compatible = "marvell,armada-380-ahci";
 519                                 reg = <0xe0000 0x2000>;
 520                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 521                                 clocks = <&gateclk 30>;
 522                                 status = "disabled";
 523                         };
 524
 525                         coredivclk: clock@e4250 {
 526                                 compatible = "marvell,armada-380-corediv-clock";
 527                                 reg = <0xe4250 0xc>;
 528                                 #clock-cells = <1>;
 529                                 clocks = <&mainpll>;
 530                                 clock-output-names = "nand";
 531                         };
 532
 533                         thermal@e8078 {
 534                                 compatible = "marvell,armada380-thermal";
 535                                 reg = <0xe4078 0x4>, <0xe4074 0x4>;
 536                                 status = "okay";
 537                         };
 538
 539                         flash@d0000 {
 540                                 compatible = "marvell,armada370-nand";
 541                                 reg = <0xd0000 0x54>;
 542                                 #address-cells = <1>;
 543                                 #size-cells = <1>;
 544                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 545                                 clocks = <&coredivclk 0>;
 546                                 status = "disabled";
 547                         };
 548
 549                         sdhci@d8000 {
 550                                 compatible = "marvell,armada-380-sdhci";
 551                                 reg-names = "sdhci", "mbus", "conf-sdio3";
 552                                 reg = <0xd8000 0x1000>,
 553                                         <0xdc000 0x100>,
 554                                         <0x18454 0x4>;
 555                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 556                                 clocks = <&gateclk 17>;
 557                                 mrvl,clk-delay-cycles = <0x1F>;
 558                                 status = "disabled";
 559                         };
 560
 561                         usb3@f0000 {
 562                                 compatible = "marvell,armada-380-xhci";
 563                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
 564                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 565                                 clocks = <&gateclk 9>;
 566                                 status = "disabled";
 567                         };
 568
 569                         usb3@f8000 {
 570                                 compatible = "marvell,armada-380-xhci";
 571                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
 572                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 573                                 clocks = <&gateclk 10>;
 574                                 status = "disabled";
 575                         };
 576                 };
 577         };
 578
 579         clocks {
 580                 /* 2 GHz fixed main PLL */
 581                 mainpll: mainpll {
 582                         compatible = "fixed-clock";
 583                         #clock-cells = <0>;
 584                         clock-frequency = <2000000000>;
 585                 };
 586
 587                 /* 25 MHz reference crystal */
 588                 refclk: oscillator {
 589                         compatible = "fixed-clock";
 590                         #clock-cells = <0>;
 591                         clock-frequency = <25000000>;
 592                 };
 593         };
 594 };