arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include <dt-bindings/clock/exynos-audss-clk.h>
  24 #include "skeleton.dtsi"
  25
  26 / {
  27         interrupt-parent = <&gic>;
  28
  29         aliases {
  30                 spi0 = &spi_0;
  31                 spi1 = &spi_1;
  32                 spi2 = &spi_2;
  33                 i2c0 = &i2c_0;
  34                 i2c1 = &i2c_1;
  35                 i2c2 = &i2c_2;
  36                 i2c3 = &i2c_3;
  37                 i2c4 = &i2c_4;
  38                 i2c5 = &i2c_5;
  39                 i2c6 = &i2c_6;
  40                 i2c7 = &i2c_7;
  41                 csis0 = &csis_0;
  42                 csis1 = &csis_1;
  43                 fimc0 = &fimc_0;
  44                 fimc1 = &fimc_1;
  45                 fimc2 = &fimc_2;
  46                 fimc3 = &fimc_3;
  47                 serial0 = &serial_0;
  48                 serial1 = &serial_1;
  49                 serial2 = &serial_2;
  50                 serial3 = &serial_3;
  51         };
  52
  53         clock_audss: clock-controller@03810000 {
  54                 compatible = "samsung,exynos4210-audss-clock";
  55                 reg = <0x03810000 0x0C>;
  56                 #clock-cells = <1>;
  57         };
  58
  59         i2s0: i2s@03830000 {
  60                 compatible = "samsung,s5pv210-i2s";
  61                 reg = <0x03830000 0x100>;
  62                 clocks = <&clock_audss EXYNOS_I2S_BUS>;
  63                 clock-names = "iis";
  64                 #clock-cells = <1>;
  65                 clock-output-names = "i2s_cdclk0";
  66                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
  67                 dma-names = "tx", "rx", "tx-sec";
  68                 samsung,idma-addr = <0x03000000>;
  69                 status = "disabled";
  70         };
  71
  72         chipid@10000000 {
  73                 compatible = "samsung,exynos4210-chipid";
  74                 reg = <0x10000000 0x100>;
  75         };
  76
  77         mipi_phy: video-phy@10020710 {
  78                 compatible = "samsung,s5pv210-mipi-video-phy";
  79                 reg = <0x10020710 8>;
  80                 #phy-cells = <1>;
  81         };
  82
  83         pd_mfc: mfc-power-domain@10023C40 {
  84                 compatible = "samsung,exynos4210-pd";
  85                 reg = <0x10023C40 0x20>;
  86         };
  87
  88         pd_g3d: g3d-power-domain@10023C60 {
  89                 compatible = "samsung,exynos4210-pd";
  90                 reg = <0x10023C60 0x20>;
  91         };
  92
  93         pd_lcd0: lcd0-power-domain@10023C80 {
  94                 compatible = "samsung,exynos4210-pd";
  95                 reg = <0x10023C80 0x20>;
  96         };
  97
  98         pd_tv: tv-power-domain@10023C20 {
  99                 compatible = "samsung,exynos4210-pd";
 100                 reg = <0x10023C20 0x20>;
 101         };
 102
 103         pd_cam: cam-power-domain@10023C00 {
 104                 compatible = "samsung,exynos4210-pd";
 105                 reg = <0x10023C00 0x20>;
 106         };
 107
 108         pd_gps: gps-power-domain@10023CE0 {
 109                 compatible = "samsung,exynos4210-pd";
 110                 reg = <0x10023CE0 0x20>;
 111         };
 112
 113         pd_gps_alive: gps-alive-power-domain@10023D00 {
 114                 compatible = "samsung,exynos4210-pd";
 115                 reg = <0x10023D00 0x20>;
 116         };
 117
 118         gic: interrupt-controller@10490000 {
 119                 compatible = "arm,cortex-a9-gic";
 120                 #interrupt-cells = <3>;
 121                 interrupt-controller;
 122                 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
 123         };
 124
 125         combiner: interrupt-controller@10440000 {
 126                 compatible = "samsung,exynos4210-combiner";
 127                 #interrupt-cells = <2>;
 128                 interrupt-controller;
 129                 reg = <0x10440000 0x1000>;
 130         };
 131
 132         pmu {
 133                 compatible = "arm,cortex-a9-pmu";
 134                 interrupt-parent = <&combiner>;
 135                 interrupts = <2 2>, <3 2>;
 136         };
 137
 138         sys_reg: syscon@10010000 {
 139                 compatible = "samsung,exynos4-sysreg", "syscon";
 140                 reg = <0x10010000 0x400>;
 141         };
 142
 143         pmu_system_controller: system-controller@10020000 {
 144                 compatible = "samsung,exynos4210-pmu", "syscon";
 145                 reg = <0x10020000 0x4000>;
 146         };
 147
 148         dsi_0: dsi@11C80000 {
 149                 compatible = "samsung,exynos4210-mipi-dsi";
 150                 reg = <0x11C80000 0x10000>;
 151                 interrupts = <0 79 0>;
 152                 samsung,power-domain = <&pd_lcd0>;
 153                 phys = <&mipi_phy 1>;
 154                 phy-names = "dsim";
 155                 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
 156                 clock-names = "bus_clk", "pll_clk";
 157                 status = "disabled";
 158                 #address-cells = <1>;
 159                 #size-cells = <0>;
 160         };
 161
 162         camera {
 163                 compatible = "samsung,fimc", "simple-bus";
 164                 status = "disabled";
 165                 #address-cells = <1>;
 166                 #size-cells = <1>;
 167                 #clock-cells = <1>;
 168                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 169                 ranges;
 170
 171                 fimc_0: fimc@11800000 {
 172                         compatible = "samsung,exynos4210-fimc";
 173                         reg = <0x11800000 0x1000>;
 174                         interrupts = <0 84 0>;
 175                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 176                         clock-names = "fimc", "sclk_fimc";
 177                         samsung,power-domain = <&pd_cam>;
 178                         samsung,sysreg = <&sys_reg>;
 179                         status = "disabled";
 180                 };
 181
 182                 fimc_1: fimc@11810000 {
 183                         compatible = "samsung,exynos4210-fimc";
 184                         reg = <0x11810000 0x1000>;
 185                         interrupts = <0 85 0>;
 186                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 187                         clock-names = "fimc", "sclk_fimc";
 188                         samsung,power-domain = <&pd_cam>;
 189                         samsung,sysreg = <&sys_reg>;
 190                         status = "disabled";
 191                 };
 192
 193                 fimc_2: fimc@11820000 {
 194                         compatible = "samsung,exynos4210-fimc";
 195                         reg = <0x11820000 0x1000>;
 196                         interrupts = <0 86 0>;
 197                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 198                         clock-names = "fimc", "sclk_fimc";
 199                         samsung,power-domain = <&pd_cam>;
 200                         samsung,sysreg = <&sys_reg>;
 201                         status = "disabled";
 202                 };
 203
 204                 fimc_3: fimc@11830000 {
 205                         compatible = "samsung,exynos4210-fimc";
 206                         reg = <0x11830000 0x1000>;
 207                         interrupts = <0 87 0>;
 208                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 209                         clock-names = "fimc", "sclk_fimc";
 210                         samsung,power-domain = <&pd_cam>;
 211                         samsung,sysreg = <&sys_reg>;
 212                         status = "disabled";
 213                 };
 214
 215                 csis_0: csis@11880000 {
 216                         compatible = "samsung,exynos4210-csis";
 217                         reg = <0x11880000 0x4000>;
 218                         interrupts = <0 78 0>;
 219                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 220                         clock-names = "csis", "sclk_csis";
 221                         bus-width = <4>;
 222                         samsung,power-domain = <&pd_cam>;
 223                         phys = <&mipi_phy 0>;
 224                         phy-names = "csis";
 225                         status = "disabled";
 226                         #address-cells = <1>;
 227                         #size-cells = <0>;
 228                 };
 229
 230                 csis_1: csis@11890000 {
 231                         compatible = "samsung,exynos4210-csis";
 232                         reg = <0x11890000 0x4000>;
 233                         interrupts = <0 80 0>;
 234                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 235                         clock-names = "csis", "sclk_csis";
 236                         bus-width = <2>;
 237                         samsung,power-domain = <&pd_cam>;
 238                         phys = <&mipi_phy 2>;
 239                         phy-names = "csis";
 240                         status = "disabled";
 241                         #address-cells = <1>;
 242                         #size-cells = <0>;
 243                 };
 244         };
 245
 246         watchdog@10060000 {
 247                 compatible = "samsung,s3c2410-wdt";
 248                 reg = <0x10060000 0x100>;
 249                 interrupts = <0 43 0>;
 250                 clocks = <&clock CLK_WDT>;
 251                 clock-names = "watchdog";
 252                 status = "disabled";
 253         };
 254
 255         rtc@10070000 {
 256                 compatible = "samsung,s3c6410-rtc";
 257                 reg = <0x10070000 0x100>;
 258                 interrupts = <0 44 0>, <0 45 0>;
 259                 clocks = <&clock CLK_RTC>;
 260                 clock-names = "rtc";
 261                 status = "disabled";
 262         };
 263
 264         keypad@100A0000 {
 265                 compatible = "samsung,s5pv210-keypad";
 266                 reg = <0x100A0000 0x100>;
 267                 interrupts = <0 109 0>;
 268                 clocks = <&clock CLK_KEYIF>;
 269                 clock-names = "keypad";
 270                 status = "disabled";
 271         };
 272
 273         sdhci@12510000 {
 274                 compatible = "samsung,exynos4210-sdhci";
 275                 reg = <0x12510000 0x100>;
 276                 interrupts = <0 73 0>;
 277                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 278                 clock-names = "hsmmc", "mmc_busclk.2";
 279                 status = "disabled";
 280         };
 281
 282         sdhci@12520000 {
 283                 compatible = "samsung,exynos4210-sdhci";
 284                 reg = <0x12520000 0x100>;
 285                 interrupts = <0 74 0>;
 286                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 287                 clock-names = "hsmmc", "mmc_busclk.2";
 288                 status = "disabled";
 289         };
 290
 291         sdhci@12530000 {
 292                 compatible = "samsung,exynos4210-sdhci";
 293                 reg = <0x12530000 0x100>;
 294                 interrupts = <0 75 0>;
 295                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 296                 clock-names = "hsmmc", "mmc_busclk.2";
 297                 status = "disabled";
 298         };
 299
 300         sdhci@12540000 {
 301                 compatible = "samsung,exynos4210-sdhci";
 302                 reg = <0x12540000 0x100>;
 303                 interrupts = <0 76 0>;
 304                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 305                 clock-names = "hsmmc", "mmc_busclk.2";
 306                 status = "disabled";
 307         };
 308
 309         exynos_usbphy: exynos-usbphy@125B0000 {
 310                 compatible = "samsung,exynos4210-usb2-phy";
 311                 reg = <0x125B0000 0x100>;
 312                 samsung,pmureg-phandle = <&pmu_system_controller>;
 313                 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
 314                 clock-names = "phy", "ref";
 315                 #phy-cells = <1>;
 316                 status = "disabled";
 317         };
 318
 319         hsotg@12480000 {
 320                 compatible = "samsung,s3c6400-hsotg";
 321                 reg = <0x12480000 0x20000>;
 322                 interrupts = <0 71 0>;
 323                 clocks = <&clock CLK_USB_DEVICE>;
 324                 clock-names = "otg";
 325                 phys = <&exynos_usbphy 0>;
 326                 phy-names = "usb2-phy";
 327                 status = "disabled";
 328         };
 329
 330         ehci@12580000 {
 331                 compatible = "samsung,exynos4210-ehci";
 332                 reg = <0x12580000 0x100>;
 333                 interrupts = <0 70 0>;
 334                 clocks = <&clock CLK_USB_HOST>;
 335                 clock-names = "usbhost";
 336                 status = "disabled";
 337                 #address-cells = <1>;
 338                 #size-cells = <0>;
 339                 port@0 {
 340                     reg = <0>;
 341                     phys = <&exynos_usbphy 1>;
 342                     status = "disabled";
 343                 };
 344                 port@1 {
 345                     reg = <1>;
 346                     phys = <&exynos_usbphy 2>;
 347                     status = "disabled";
 348                 };
 349                 port@2 {
 350                     reg = <2>;
 351                     phys = <&exynos_usbphy 3>;
 352                     status = "disabled";
 353                 };
 354         };
 355
 356         ohci@12590000 {
 357                 compatible = "samsung,exynos4210-ohci";
 358                 reg = <0x12590000 0x100>;
 359                 interrupts = <0 70 0>;
 360                 clocks = <&clock CLK_USB_HOST>;
 361                 clock-names = "usbhost";
 362                 status = "disabled";
 363                 #address-cells = <1>;
 364                 #size-cells = <0>;
 365                 port@0 {
 366                     reg = <0>;
 367                     phys = <&exynos_usbphy 1>;
 368                     status = "disabled";
 369                 };
 370         };
 371
 372         i2s1: i2s@13960000 {
 373                 compatible = "samsung,s5pv210-i2s";
 374                 reg = <0x13960000 0x100>;
 375                 clocks = <&clock CLK_I2S1>;
 376                 clock-names = "iis";
 377                 #clock-cells = <1>;
 378                 clock-output-names = "i2s_cdclk1";
 379                 dmas = <&pdma1 12>, <&pdma1 11>;
 380                 dma-names = "tx", "rx";
 381                 status = "disabled";
 382         };
 383
 384         i2s2: i2s@13970000 {
 385                 compatible = "samsung,s5pv210-i2s";
 386                 reg = <0x13970000 0x100>;
 387                 clocks = <&clock CLK_I2S2>;
 388                 clock-names = "iis";
 389                 #clock-cells = <1>;
 390                 clock-output-names = "i2s_cdclk2";
 391                 dmas = <&pdma0 14>, <&pdma0 13>;
 392                 dma-names = "tx", "rx";
 393                 status = "disabled";
 394         };
 395
 396         mfc: codec@13400000 {
 397                 compatible = "samsung,mfc-v5";
 398                 reg = <0x13400000 0x10000>;
 399                 interrupts = <0 94 0>;
 400                 samsung,power-domain = <&pd_mfc>;
 401                 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
 402                 clock-names = "mfc", "sclk_mfc";
 403                 status = "disabled";
 404         };
 405
 406         serial_0: serial@13800000 {
 407                 compatible = "samsung,exynos4210-uart";
 408                 reg = <0x13800000 0x100>;
 409                 interrupts = <0 52 0>;
 410                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 411                 clock-names = "uart", "clk_uart_baud0";
 412                 status = "disabled";
 413         };
 414
 415         serial_1: serial@13810000 {
 416                 compatible = "samsung,exynos4210-uart";
 417                 reg = <0x13810000 0x100>;
 418                 interrupts = <0 53 0>;
 419                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 420                 clock-names = "uart", "clk_uart_baud0";
 421                 status = "disabled";
 422         };
 423
 424         serial_2: serial@13820000 {
 425                 compatible = "samsung,exynos4210-uart";
 426                 reg = <0x13820000 0x100>;
 427                 interrupts = <0 54 0>;
 428                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 429                 clock-names = "uart", "clk_uart_baud0";
 430                 status = "disabled";
 431         };
 432
 433         serial_3: serial@13830000 {
 434                 compatible = "samsung,exynos4210-uart";
 435                 reg = <0x13830000 0x100>;
 436                 interrupts = <0 55 0>;
 437                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 438                 clock-names = "uart", "clk_uart_baud0";
 439                 status = "disabled";
 440         };
 441
 442         i2c_0: i2c@13860000 {
 443                 #address-cells = <1>;
 444                 #size-cells = <0>;
 445                 compatible = "samsung,s3c2440-i2c";
 446                 reg = <0x13860000 0x100>;
 447                 interrupts = <0 58 0>;
 448                 clocks = <&clock CLK_I2C0>;
 449                 clock-names = "i2c";
 450                 pinctrl-names = "default";
 451                 pinctrl-0 = <&i2c0_bus>;
 452                 status = "disabled";
 453         };
 454
 455         i2c_1: i2c@13870000 {
 456                 #address-cells = <1>;
 457                 #size-cells = <0>;
 458                 compatible = "samsung,s3c2440-i2c";
 459                 reg = <0x13870000 0x100>;
 460                 interrupts = <0 59 0>;
 461                 clocks = <&clock CLK_I2C1>;
 462                 clock-names = "i2c";
 463                 pinctrl-names = "default";
 464                 pinctrl-0 = <&i2c1_bus>;
 465                 status = "disabled";
 466         };
 467
 468         i2c_2: i2c@13880000 {
 469                 #address-cells = <1>;
 470                 #size-cells = <0>;
 471                 compatible = "samsung,s3c2440-i2c";
 472                 reg = <0x13880000 0x100>;
 473                 interrupts = <0 60 0>;
 474                 clocks = <&clock CLK_I2C2>;
 475                 clock-names = "i2c";
 476                 pinctrl-names = "default";
 477                 pinctrl-0 = <&i2c2_bus>;
 478                 status = "disabled";
 479         };
 480
 481         i2c_3: i2c@13890000 {
 482                 #address-cells = <1>;
 483                 #size-cells = <0>;
 484                 compatible = "samsung,s3c2440-i2c";
 485                 reg = <0x13890000 0x100>;
 486                 interrupts = <0 61 0>;
 487                 clocks = <&clock CLK_I2C3>;
 488                 clock-names = "i2c";
 489                 pinctrl-names = "default";
 490                 pinctrl-0 = <&i2c3_bus>;
 491                 status = "disabled";
 492         };
 493
 494         i2c_4: i2c@138A0000 {
 495                 #address-cells = <1>;
 496                 #size-cells = <0>;
 497                 compatible = "samsung,s3c2440-i2c";
 498                 reg = <0x138A0000 0x100>;
 499                 interrupts = <0 62 0>;
 500                 clocks = <&clock CLK_I2C4>;
 501                 clock-names = "i2c";
 502                 pinctrl-names = "default";
 503                 pinctrl-0 = <&i2c4_bus>;
 504                 status = "disabled";
 505         };
 506
 507         i2c_5: i2c@138B0000 {
 508                 #address-cells = <1>;
 509                 #size-cells = <0>;
 510                 compatible = "samsung,s3c2440-i2c";
 511                 reg = <0x138B0000 0x100>;
 512                 interrupts = <0 63 0>;
 513                 clocks = <&clock CLK_I2C5>;
 514                 clock-names = "i2c";
 515                 pinctrl-names = "default";
 516                 pinctrl-0 = <&i2c5_bus>;
 517                 status = "disabled";
 518         };
 519
 520         i2c_6: i2c@138C0000 {
 521                 #address-cells = <1>;
 522                 #size-cells = <0>;
 523                 compatible = "samsung,s3c2440-i2c";
 524                 reg = <0x138C0000 0x100>;
 525                 interrupts = <0 64 0>;
 526                 clocks = <&clock CLK_I2C6>;
 527                 clock-names = "i2c";
 528                 pinctrl-names = "default";
 529                 pinctrl-0 = <&i2c6_bus>;
 530                 status = "disabled";
 531         };
 532
 533         i2c_7: i2c@138D0000 {
 534                 #address-cells = <1>;
 535                 #size-cells = <0>;
 536                 compatible = "samsung,s3c2440-i2c";
 537                 reg = <0x138D0000 0x100>;
 538                 interrupts = <0 65 0>;
 539                 clocks = <&clock CLK_I2C7>;
 540                 clock-names = "i2c";
 541                 pinctrl-names = "default";
 542                 pinctrl-0 = <&i2c7_bus>;
 543                 status = "disabled";
 544         };
 545
 546         spi_0: spi@13920000 {
 547                 compatible = "samsung,exynos4210-spi";
 548                 reg = <0x13920000 0x100>;
 549                 interrupts = <0 66 0>;
 550                 dmas = <&pdma0 7>, <&pdma0 6>;
 551                 dma-names = "tx", "rx";
 552                 #address-cells = <1>;
 553                 #size-cells = <0>;
 554                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 555                 clock-names = "spi", "spi_busclk0";
 556                 pinctrl-names = "default";
 557                 pinctrl-0 = <&spi0_bus>;
 558                 status = "disabled";
 559         };
 560
 561         spi_1: spi@13930000 {
 562                 compatible = "samsung,exynos4210-spi";
 563                 reg = <0x13930000 0x100>;
 564                 interrupts = <0 67 0>;
 565                 dmas = <&pdma1 7>, <&pdma1 6>;
 566                 dma-names = "tx", "rx";
 567                 #address-cells = <1>;
 568                 #size-cells = <0>;
 569                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 570                 clock-names = "spi", "spi_busclk0";
 571                 pinctrl-names = "default";
 572                 pinctrl-0 = <&spi1_bus>;
 573                 status = "disabled";
 574         };
 575
 576         spi_2: spi@13940000 {
 577                 compatible = "samsung,exynos4210-spi";
 578                 reg = <0x13940000 0x100>;
 579                 interrupts = <0 68 0>;
 580                 dmas = <&pdma0 9>, <&pdma0 8>;
 581                 dma-names = "tx", "rx";
 582                 #address-cells = <1>;
 583                 #size-cells = <0>;
 584                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 585                 clock-names = "spi", "spi_busclk0";
 586                 pinctrl-names = "default";
 587                 pinctrl-0 = <&spi2_bus>;
 588                 status = "disabled";
 589         };
 590
 591         pwm@139D0000 {
 592                 compatible = "samsung,exynos4210-pwm";
 593                 reg = <0x139D0000 0x1000>;
 594                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 595                 clocks = <&clock CLK_PWM>;
 596                 clock-names = "timers";
 597                 #pwm-cells = <3>;
 598                 status = "disabled";
 599         };
 600
 601         amba {
 602                 #address-cells = <1>;
 603                 #size-cells = <1>;
 604                 compatible = "arm,amba-bus";
 605                 interrupt-parent = <&gic>;
 606                 ranges;
 607
 608                 pdma0: pdma@12680000 {
 609                         compatible = "arm,pl330", "arm,primecell";
 610                         reg = <0x12680000 0x1000>;
 611                         interrupts = <0 35 0>;
 612                         clocks = <&clock CLK_PDMA0>;
 613                         clock-names = "apb_pclk";
 614                         #dma-cells = <1>;
 615                         #dma-channels = <8>;
 616                         #dma-requests = <32>;
 617                 };
 618
 619                 pdma1: pdma@12690000 {
 620                         compatible = "arm,pl330", "arm,primecell";
 621                         reg = <0x12690000 0x1000>;
 622                         interrupts = <0 36 0>;
 623                         clocks = <&clock CLK_PDMA1>;
 624                         clock-names = "apb_pclk";
 625                         #dma-cells = <1>;
 626                         #dma-channels = <8>;
 627                         #dma-requests = <32>;
 628                 };
 629
 630                 mdma1: mdma@12850000 {
 631                         compatible = "arm,pl330", "arm,primecell";
 632                         reg = <0x12850000 0x1000>;
 633                         interrupts = <0 34 0>;
 634                         clocks = <&clock CLK_MDMA>;
 635                         clock-names = "apb_pclk";
 636                         #dma-cells = <1>;
 637                         #dma-channels = <8>;
 638                         #dma-requests = <1>;
 639                 };
 640         };
 641
 642         fimd: fimd@11c00000 {
 643                 compatible = "samsung,exynos4210-fimd";
 644                 interrupt-parent = <&combiner>;
 645                 reg = <0x11c00000 0x20000>;
 646                 interrupt-names = "fifo", "vsync", "lcd_sys";
 647                 interrupts = <11 0>, <11 1>, <11 2>;
 648                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 649                 clock-names = "sclk_fimd", "fimd";
 650                 samsung,power-domain = <&pd_lcd0>;
 651                 samsung,sysreg = <&sys_reg>;
 652                 status = "disabled";
 653         };
 654 };