2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
45 #include <dt-bindings/input/input.h>
49 model = "Freescale i.MX7 SabreSD Board";
50 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
53 reg = <0x80000000 0x80000000>;
57 compatible = "simple-bus";
61 reg_usb_otg1_vbus: regulator@0 {
62 compatible = "regulator-fixed";
64 regulator-name = "usb_otg1_vbus";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
67 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
71 reg_usb_otg2_vbus: regulator@1 {
72 compatible = "regulator-fixed";
74 regulator-name = "usb_otg2_vbus";
75 regulator-min-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>;
77 gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
81 reg_can2_3v3: regulator@2 {
82 compatible = "regulator-fixed";
84 regulator-name = "can2-3v3";
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
90 reg_vref_1v8: regulator@3 {
91 compatible = "regulator-fixed";
93 regulator-name = "vref-1v8";
94 regulator-min-microvolt = <1800000>;
95 regulator-max-microvolt = <1800000>;
101 arm-supply = <&sw1a_reg>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_i2c1>;
110 compatible = "fsl,pfuze3000";
115 regulator-min-microvolt = <700000>;
116 regulator-max-microvolt = <1475000>;
119 regulator-ramp-delay = <6250>;
122 /* use sw1c_reg to align with pfuze100/pfuze200 */
124 regulator-min-microvolt = <700000>;
125 regulator-max-microvolt = <1475000>;
128 regulator-ramp-delay = <6250>;
132 regulator-min-microvolt = <1500000>;
133 regulator-max-microvolt = <1850000>;
139 regulator-min-microvolt = <900000>;
140 regulator-max-microvolt = <1650000>;
146 regulator-min-microvolt = <5000000>;
147 regulator-max-microvolt = <5150000>;
151 regulator-min-microvolt = <1000000>;
152 regulator-max-microvolt = <3000000>;
163 regulator-min-microvolt = <1800000>;
164 regulator-max-microvolt = <3300000>;
169 regulator-min-microvolt = <800000>;
170 regulator-max-microvolt = <1550000>;
174 regulator-min-microvolt = <2850000>;
175 regulator-max-microvolt = <3300000>;
180 regulator-min-microvolt = <2850000>;
181 regulator-max-microvolt = <3300000>;
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <3300000>;
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <3300000>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_i2c2>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_i2c3>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_i2c4>;
218 compatible = "wlf,wm8960";
220 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
221 clock-names = "mclk";
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_uart1>;
229 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
230 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
235 vbus-supply = <®_usb_otg1_vbus>;
240 vbus-supply = <®_usb_otg2_vbus>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_usdhc1>;
248 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
249 wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
251 keep-power-in-suspend;
256 pinctrl-names = "default", "state_100mhz", "state_200mhz";
257 pinctrl-0 = <&pinctrl_usdhc3>;
258 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
259 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
260 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
261 assigned-clock-rates = <400000000>;
263 fsl,tuning-step = <2>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_hog>;
273 pinctrl_hog: hoggrp {
275 MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
276 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
280 pinctrl_i2c1: i2c1grp {
282 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
283 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
287 pinctrl_i2c2: i2c2grp {
289 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
290 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
294 pinctrl_i2c3: i2c3grp {
296 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
297 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
301 pinctrl_i2c4: i2c4grp {
303 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
304 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
309 pinctrl_uart1: uart1grp {
311 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
312 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
316 pinctrl_uart5: uart5grp {
318 MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX 0x79
319 MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX 0x79
320 MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS 0x79
321 MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS 0x79
325 pinctrl_uart6: uart6grp {
327 MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX 0x79
328 MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX 0x79
329 MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS 0x79
330 MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS 0x79
334 pinctrl_usdhc1: usdhc1grp {
336 MX7D_PAD_SD1_CMD__SD1_CMD 0x59
337 MX7D_PAD_SD1_CLK__SD1_CLK 0x19
338 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
339 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
340 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
341 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
342 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
343 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
344 MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
348 pinctrl_usdhc2: usdhc2grp {
350 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
351 MX7D_PAD_SD2_CLK__SD2_CLK 0x19
352 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
353 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
354 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
355 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
356 MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x59 /* WL_REG_ON */
360 pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
362 MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
363 MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
364 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
365 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
366 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
367 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
371 pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
373 MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
374 MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
375 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
376 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
377 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
378 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
383 pinctrl_usdhc3: usdhc3grp {
385 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
386 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
387 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
388 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
389 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
390 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
391 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
392 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
393 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
394 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
395 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
399 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
401 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
402 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
403 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
404 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
405 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
406 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
407 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
408 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
409 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
410 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
411 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
415 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
417 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
418 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
419 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
420 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
421 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
422 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
423 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
424 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
425 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
426 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
427 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b