2 * Versatile Express Core Tile Cortex A9x4 Support
4 #include <linux/init.h>
5 #include <linux/device.h>
6 #include <linux/dma-mapping.h>
7 #include <linux/platform_device.h>
8 #include <linux/amba/bus.h>
9 #include <linux/amba/clcd.h>
11 #include <asm/clkdev.h>
12 #include <asm/hardware/arm_timer.h>
13 #include <asm/hardware/cache-l2x0.h>
14 #include <asm/hardware/gic.h>
15 #include <asm/mach-types.h>
18 #include <mach/clkdev.h>
19 #include <mach/ct-ca9x4.h>
21 #include <plat/timer-sp.h>
23 #include <asm/mach/arch.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
29 #include <mach/motherboard.h>
31 #define V2M_PA_CS7 0x10000000
33 static struct map_desc ct_ca9x4_io_desc[] __initdata = {
35 .virtual = __MMIO_P2V(CT_CA9X4_MPIC),
36 .pfn = __phys_to_pfn(CT_CA9X4_MPIC),
40 .virtual = __MMIO_P2V(CT_CA9X4_SP804_TIMER),
41 .pfn = __phys_to_pfn(CT_CA9X4_SP804_TIMER),
45 .virtual = __MMIO_P2V(CT_CA9X4_L2CC),
46 .pfn = __phys_to_pfn(CT_CA9X4_L2CC),
52 static void __init ct_ca9x4_map_io(void)
54 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
57 void __iomem *gic_cpu_base_addr;
59 static void __init ct_ca9x4_init_irq(void)
61 gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU);
62 gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29);
63 gic_cpu_init(0, gic_cpu_base_addr);
67 static void ct_ca9x4_timer_init(void)
69 writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
70 writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
72 sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1));
73 sp804_clockevents_init(MMIO_P2V(CT_CA9X4_TIMER0), IRQ_CT_CA9X4_TIMER0);
76 static struct sys_timer ct_ca9x4_timer = {
77 .init = ct_ca9x4_timer_init,
81 static struct clcd_panel xvga_panel = {
95 .vmode = FB_VMODE_NONINTERLACED,
99 .tim2 = TIM2_BCD | TIM2_IPC,
100 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
104 static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
106 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
107 v2m_cfg_write(SYS_CFG_DVIMODE | SYS_CFG_SITE_DB1, 2);
110 static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
112 unsigned long framesize = 1024 * 768 * 2;
115 fb->panel = &xvga_panel;
117 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
119 if (!fb->fb.screen_base) {
120 printk(KERN_ERR "CLCD: unable to map frame buffer\n");
123 fb->fb.fix.smem_start = dma;
124 fb->fb.fix.smem_len = framesize;
129 static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
131 return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
132 fb->fb.fix.smem_start, fb->fb.fix.smem_len);
135 static void ct_ca9x4_clcd_remove(struct clcd_fb *fb)
137 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
138 fb->fb.screen_base, fb->fb.fix.smem_start);
141 static struct clcd_board ct_ca9x4_clcd_data = {
143 .check = clcdfb_check,
144 .decode = clcdfb_decode,
145 .enable = ct_ca9x4_clcd_enable,
146 .setup = ct_ca9x4_clcd_setup,
147 .mmap = ct_ca9x4_clcd_mmap,
148 .remove = ct_ca9x4_clcd_remove,
151 static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
152 static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL);
153 static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL);
154 static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL);
156 static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
164 static long ct_round(struct clk *clk, unsigned long rate)
169 static int ct_set(struct clk *clk, unsigned long rate)
171 return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_DB1 | 1, rate);
174 static const struct clk_ops osc1_clk_ops = {
179 static struct clk osc1_clk = {
180 .ops = &osc1_clk_ops,
184 static struct clk_lookup lookups[] = {
191 static struct resource pmu_resources[] = {
193 .start = IRQ_CT_CA9X4_PMU_CPU0,
194 .end = IRQ_CT_CA9X4_PMU_CPU0,
195 .flags = IORESOURCE_IRQ,
198 .start = IRQ_CT_CA9X4_PMU_CPU1,
199 .end = IRQ_CT_CA9X4_PMU_CPU1,
200 .flags = IORESOURCE_IRQ,
203 .start = IRQ_CT_CA9X4_PMU_CPU2,
204 .end = IRQ_CT_CA9X4_PMU_CPU2,
205 .flags = IORESOURCE_IRQ,
208 .start = IRQ_CT_CA9X4_PMU_CPU3,
209 .end = IRQ_CT_CA9X4_PMU_CPU3,
210 .flags = IORESOURCE_IRQ,
214 static struct platform_device pmu_device = {
216 .id = ARM_PMU_DEVICE_CPU,
217 .num_resources = ARRAY_SIZE(pmu_resources),
218 .resource = pmu_resources,
221 static void ct_ca9x4_init(void)
225 #ifdef CONFIG_CACHE_L2X0
226 l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff);
229 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
231 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
232 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
234 platform_device_register(&pmu_device);
237 MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
238 .phys_io = V2M_UART0,
239 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
240 .boot_params = PHYS_OFFSET + 0x00000100,
241 .map_io = ct_ca9x4_map_io,
242 .init_irq = ct_ca9x4_init_irq,
244 .timer = &ct_ca9x4_timer,
248 .init_machine = ct_ca9x4_init,