2 * ARMv8 single-step debug support and mdscr context switching.
4 * Copyright (C) 2012 ARM Limited
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 * Author: Will Deacon <will.deacon@arm.com>
21 #include <linux/cpu.h>
22 #include <linux/debugfs.h>
23 #include <linux/hardirq.h>
24 #include <linux/init.h>
25 #include <linux/ptrace.h>
26 #include <linux/stat.h>
27 #include <linux/uaccess.h>
29 #include <asm/cpufeature.h>
30 #include <asm/cputype.h>
31 #include <asm/debug-monitors.h>
32 #include <asm/system_misc.h>
34 /* Determine debug architecture. */
35 u8 debug_monitors_arch(void)
37 return cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1),
38 ID_AA64DFR0_DEBUGVER_SHIFT);
42 * MDSCR access routines.
44 static void mdscr_write(u32 mdscr)
47 local_dbg_save(flags);
48 asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
49 local_dbg_restore(flags);
52 static u32 mdscr_read(void)
55 asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
60 * Allow root to disable self-hosted debug from userspace.
61 * This is useful if you want to connect an external JTAG debugger.
63 static u32 debug_enabled = 1;
65 static int create_debug_debugfs_entry(void)
67 debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
70 fs_initcall(create_debug_debugfs_entry);
72 static int __init early_debug_disable(char *buf)
78 early_param("nodebugmon", early_debug_disable);
81 * Keep track of debug users on each core.
82 * The ref counts are per-cpu so we use a local_t type.
84 static DEFINE_PER_CPU(int, mde_ref_count);
85 static DEFINE_PER_CPU(int, kde_ref_count);
87 void enable_debug_monitors(enum dbg_active_el el)
89 u32 mdscr, enable = 0;
91 WARN_ON(preemptible());
93 if (this_cpu_inc_return(mde_ref_count) == 1)
94 enable = DBG_MDSCR_MDE;
96 if (el == DBG_ACTIVE_EL1 &&
97 this_cpu_inc_return(kde_ref_count) == 1)
98 enable |= DBG_MDSCR_KDE;
100 if (enable && debug_enabled) {
101 mdscr = mdscr_read();
107 void disable_debug_monitors(enum dbg_active_el el)
109 u32 mdscr, disable = 0;
111 WARN_ON(preemptible());
113 if (this_cpu_dec_return(mde_ref_count) == 0)
114 disable = ~DBG_MDSCR_MDE;
116 if (el == DBG_ACTIVE_EL1 &&
117 this_cpu_dec_return(kde_ref_count) == 0)
118 disable &= ~DBG_MDSCR_KDE;
121 mdscr = mdscr_read();
130 static void clear_os_lock(void *unused)
132 asm volatile("msr oslar_el1, %0" : : "r" (0));
135 static int os_lock_notify(struct notifier_block *self,
136 unsigned long action, void *data)
138 int cpu = (unsigned long)data;
139 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
140 smp_call_function_single(cpu, clear_os_lock, NULL, 1);
144 static struct notifier_block os_lock_nb = {
145 .notifier_call = os_lock_notify,
148 static int debug_monitors_init(void)
150 cpu_notifier_register_begin();
152 /* Clear the OS lock. */
153 on_each_cpu(clear_os_lock, NULL, 1);
157 /* Register hotplug handler. */
158 __register_cpu_notifier(&os_lock_nb);
160 cpu_notifier_register_done();
163 postcore_initcall(debug_monitors_init);
166 * Single step API and exception handling.
168 static void set_regs_spsr_ss(struct pt_regs *regs)
173 spsr &= ~DBG_SPSR_SS;
178 static void clear_regs_spsr_ss(struct pt_regs *regs)
183 spsr &= ~DBG_SPSR_SS;
187 /* EL1 Single Step Handler hooks */
188 static LIST_HEAD(step_hook);
189 static DEFINE_RWLOCK(step_hook_lock);
191 void register_step_hook(struct step_hook *hook)
193 write_lock(&step_hook_lock);
194 list_add(&hook->node, &step_hook);
195 write_unlock(&step_hook_lock);
198 void unregister_step_hook(struct step_hook *hook)
200 write_lock(&step_hook_lock);
201 list_del(&hook->node);
202 write_unlock(&step_hook_lock);
206 * Call registered single step handlers
207 * There is no Syndrome info to check for determining the handler.
208 * So we call all the registered handlers, until the right handler is
209 * found which returns zero.
211 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
213 struct step_hook *hook;
214 int retval = DBG_HOOK_ERROR;
216 read_lock(&step_hook_lock);
218 list_for_each_entry(hook, &step_hook, node) {
219 retval = hook->fn(regs, esr);
220 if (retval == DBG_HOOK_HANDLED)
224 read_unlock(&step_hook_lock);
229 static int single_step_handler(unsigned long addr, unsigned int esr,
230 struct pt_regs *regs)
235 * If we are stepping a pending breakpoint, call the hw_breakpoint
238 if (!reinstall_suspended_bps(regs))
241 if (user_mode(regs)) {
242 info.si_signo = SIGTRAP;
244 info.si_code = TRAP_HWBKPT;
245 info.si_addr = (void __user *)instruction_pointer(regs);
246 force_sig_info(SIGTRAP, &info, current);
249 * ptrace will disable single step unless explicitly
250 * asked to re-enable it. For other clients, it makes
251 * sense to leave it enabled (i.e. rewind the controls
252 * to the active-not-pending state).
254 user_rewind_single_step(current);
256 if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
259 pr_warning("Unexpected kernel single-step exception at EL1\n");
261 * Re-enable stepping since we know that we will be
264 set_regs_spsr_ss(regs);
271 * Breakpoint handler is re-entrant as another breakpoint can
272 * hit within breakpoint handler, especically in kprobes.
273 * Use reader/writer locks instead of plain spinlock.
275 static LIST_HEAD(break_hook);
276 static DEFINE_RWLOCK(break_hook_lock);
278 void register_break_hook(struct break_hook *hook)
280 write_lock(&break_hook_lock);
281 list_add(&hook->node, &break_hook);
282 write_unlock(&break_hook_lock);
285 void unregister_break_hook(struct break_hook *hook)
287 write_lock(&break_hook_lock);
288 list_del(&hook->node);
289 write_unlock(&break_hook_lock);
292 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
294 struct break_hook *hook;
295 int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
297 read_lock(&break_hook_lock);
298 list_for_each_entry(hook, &break_hook, node)
299 if ((esr & hook->esr_mask) == hook->esr_val)
301 read_unlock(&break_hook_lock);
303 return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
306 static int brk_handler(unsigned long addr, unsigned int esr,
307 struct pt_regs *regs)
311 if (user_mode(regs)) {
315 .si_code = TRAP_BRKPT,
316 .si_addr = (void __user *)instruction_pointer(regs),
319 force_sig_info(SIGTRAP, &info, current);
320 } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
321 pr_warning("Unexpected kernel BRK exception at EL1\n");
328 int aarch32_break_handler(struct pt_regs *regs)
334 void __user *pc = (void __user *)instruction_pointer(regs);
336 if (!compat_user_mode(regs))
339 if (compat_thumb_mode(regs)) {
340 /* get 16-bit Thumb instruction */
341 get_user(thumb_instr, (u16 __user *)pc);
342 thumb_instr = le16_to_cpu(thumb_instr);
343 if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
344 /* get second half of 32-bit Thumb-2 instruction */
345 get_user(thumb_instr, (u16 __user *)(pc + 2));
346 thumb_instr = le16_to_cpu(thumb_instr);
347 bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
349 bp = thumb_instr == AARCH32_BREAK_THUMB;
352 /* 32-bit ARM instruction */
353 get_user(arm_instr, (u32 __user *)pc);
354 arm_instr = le32_to_cpu(arm_instr);
355 bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
364 .si_code = TRAP_BRKPT,
368 force_sig_info(SIGTRAP, &info, current);
372 static int __init debug_traps_init(void)
374 hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
375 TRAP_HWBKPT, "single-step handler");
376 hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
377 TRAP_BRKPT, "ptrace BRK handler");
380 arch_initcall(debug_traps_init);
382 /* Re-enable single step for syscall restarting. */
383 void user_rewind_single_step(struct task_struct *task)
386 * If single step is active for this thread, then set SPSR.SS
387 * to 1 to avoid returning to the active-pending state.
389 if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
390 set_regs_spsr_ss(task_pt_regs(task));
393 void user_fastforward_single_step(struct task_struct *task)
395 if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
396 clear_regs_spsr_ss(task_pt_regs(task));
400 void kernel_enable_single_step(struct pt_regs *regs)
402 WARN_ON(!irqs_disabled());
403 set_regs_spsr_ss(regs);
404 mdscr_write(mdscr_read() | DBG_MDSCR_SS);
405 enable_debug_monitors(DBG_ACTIVE_EL1);
408 void kernel_disable_single_step(void)
410 WARN_ON(!irqs_disabled());
411 mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
412 disable_debug_monitors(DBG_ACTIVE_EL1);
415 int kernel_active_single_step(void)
417 WARN_ON(!irqs_disabled());
418 return mdscr_read() & DBG_MDSCR_SS;
422 void user_enable_single_step(struct task_struct *task)
424 set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
425 set_regs_spsr_ss(task_pt_regs(task));
428 void user_disable_single_step(struct task_struct *task)
430 clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);