2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
10 #include <linux/init.h>
12 #include <linux/ioport.h>
14 #include <linux/export.h>
15 #include <linux/delay.h>
16 #include <linux/of_address.h>
17 #include <linux/of_platform.h>
18 #include <linux/reset-controller.h>
20 #include <asm/reboot.h>
22 #include <lantiq_soc.h>
26 /* reset request register */
27 #define RCU_RST_REQ 0x0010
28 /* reset status register */
29 #define RCU_RST_STAT 0x0014
30 /* vr9 gphy registers */
31 #define RCU_GFS_ADD0_XRX200 0x0020
32 #define RCU_GFS_ADD1_XRX200 0x0068
33 /* xRX300 gphy registers */
34 #define RCU_GFS_ADD0_XRX300 0x0020
35 #define RCU_GFS_ADD1_XRX300 0x0058
36 #define RCU_GFS_ADD2_XRX300 0x00AC
37 /* xRX330 gphy registers */
38 #define RCU_GFS_ADD0_XRX330 0x0020
39 #define RCU_GFS_ADD1_XRX330 0x0058
40 #define RCU_GFS_ADD2_XRX330 0x00AC
41 #define RCU_GFS_ADD3_XRX330 0x0264
44 #define RCU_RD_GPHY0_XRX200 BIT(31)
45 #define RCU_RD_SRST BIT(30)
46 #define RCU_RD_GPHY1_XRX200 BIT(29)
48 #define RCU_RD_GPHY0_XRX300 BIT(31)
49 #define RCU_RD_GPHY1_XRX300 BIT(29)
50 #define RCU_RD_GPHY2_XRX300 BIT(28)
52 #define RCU_RD_GPHY0_XRX330 BIT(31)
53 #define RCU_RD_GPHY1_XRX330 BIT(29)
54 #define RCU_RD_GPHY2_XRX330 BIT(28)
55 #define RCU_RD_GPHY3_XRX330 BIT(10)
58 #define RCU_STAT_SHIFT 26
60 #define RCU_BOOT_SEL(x) ((x >> 18) & 0x7)
61 #define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10))
63 /* remapped base addr of the reset control unit */
64 static void __iomem *ltq_rcu_membase;
65 static struct device_node *ltq_rcu_np;
66 static DEFINE_SPINLOCK(ltq_rcu_lock);
68 static void ltq_rcu_w32(uint32_t val, uint32_t reg_off)
70 ltq_w32(val, ltq_rcu_membase + reg_off);
73 static uint32_t ltq_rcu_r32(uint32_t reg_off)
75 return ltq_r32(ltq_rcu_membase + reg_off);
78 static void ltq_rcu_w32_mask(uint32_t clr, uint32_t set, uint32_t reg_off)
82 spin_lock_irqsave(<q_rcu_lock, flags);
83 ltq_rcu_w32((ltq_rcu_r32(reg_off) & ~(clr)) | (set), reg_off);
84 spin_unlock_irqrestore(<q_rcu_lock, flags);
87 /* This function is used by the watchdog driver */
88 int ltq_reset_cause(void)
90 u32 val = ltq_rcu_r32(RCU_RST_STAT);
91 return val >> RCU_STAT_SHIFT;
93 EXPORT_SYMBOL_GPL(ltq_reset_cause);
95 /* allow platform code to find out what source we booted from */
96 unsigned char ltq_boot_select(void)
98 u32 val = ltq_rcu_r32(RCU_RST_STAT);
100 if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200"))
101 return RCU_BOOT_SEL_XRX200(val);
103 return RCU_BOOT_SEL(val);
106 struct ltq_gphy_reset {
111 /* reset / boot a gphy */
112 static struct ltq_gphy_reset xrx200_gphy[] = {
113 {RCU_RD_GPHY0_XRX200, RCU_GFS_ADD0_XRX200},
114 {RCU_RD_GPHY1_XRX200, RCU_GFS_ADD1_XRX200},
117 /* reset / boot a gphy */
118 static struct ltq_gphy_reset xrx300_gphy[] = {
119 {RCU_RD_GPHY0_XRX300, RCU_GFS_ADD0_XRX300},
120 {RCU_RD_GPHY1_XRX300, RCU_GFS_ADD1_XRX300},
121 {RCU_RD_GPHY2_XRX300, RCU_GFS_ADD2_XRX300},
124 /* reset / boot a gphy */
125 static struct ltq_gphy_reset xrx330_gphy[] = {
126 {RCU_RD_GPHY0_XRX330, RCU_GFS_ADD0_XRX330},
127 {RCU_RD_GPHY1_XRX330, RCU_GFS_ADD1_XRX330},
128 {RCU_RD_GPHY2_XRX330, RCU_GFS_ADD2_XRX330},
129 {RCU_RD_GPHY3_XRX330, RCU_GFS_ADD3_XRX330},
132 static void xrx200_gphy_boot_addr(struct ltq_gphy_reset *phy_regs,
135 ltq_rcu_w32_mask(0, phy_regs->rd, RCU_RST_REQ);
136 ltq_rcu_w32(dev_addr, phy_regs->addr);
137 ltq_rcu_w32_mask(phy_regs->rd, 0, RCU_RST_REQ);
140 /* reset and boot a gphy. these phys only exist on xrx200 SoC */
141 int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr)
145 if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) {
146 dev_err(dev, "this SoC has no GPHY\n");
150 if (of_machine_is_compatible("lantiq,vr9")) {
151 clk = clk_get_sys("1f203000.rcu", "gphy");
157 dev_info(dev, "booting GPHY%u firmware at %X\n", id, dev_addr);
159 if (of_machine_is_compatible("lantiq,vr9")) {
160 if (id >= ARRAY_SIZE(xrx200_gphy)) {
161 dev_err(dev, "%u is an invalid gphy id\n", id);
164 xrx200_gphy_boot_addr(&xrx200_gphy[id], dev_addr);
165 } else if (of_machine_is_compatible("lantiq,ar10")) {
166 if (id >= ARRAY_SIZE(xrx300_gphy)) {
167 dev_err(dev, "%u is an invalid gphy id\n", id);
170 xrx200_gphy_boot_addr(&xrx300_gphy[id], dev_addr);
171 } else if (of_machine_is_compatible("lantiq,grx390")) {
172 if (id >= ARRAY_SIZE(xrx330_gphy)) {
173 dev_err(dev, "%u is an invalid gphy id\n", id);
176 xrx200_gphy_boot_addr(&xrx330_gphy[id], dev_addr);
181 /* reset a io domain for u micro seconds */
182 void ltq_reset_once(unsigned int module, ulong u)
184 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
186 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ);
189 static int ltq_assert_device(struct reset_controller_dev *rcdev,
197 val = ltq_rcu_r32(RCU_RST_REQ);
199 ltq_rcu_w32(val, RCU_RST_REQ);
204 static int ltq_deassert_device(struct reset_controller_dev *rcdev,
212 val = ltq_rcu_r32(RCU_RST_REQ);
214 ltq_rcu_w32(val, RCU_RST_REQ);
219 static int ltq_reset_device(struct reset_controller_dev *rcdev,
222 ltq_assert_device(rcdev, id);
223 return ltq_deassert_device(rcdev, id);
226 static struct reset_control_ops reset_ops = {
227 .reset = ltq_reset_device,
228 .assert = ltq_assert_device,
229 .deassert = ltq_deassert_device,
232 static struct reset_controller_dev reset_dev = {
234 .owner = THIS_MODULE,
236 .of_reset_n_cells = 1,
239 void ltq_rst_init(void)
241 reset_dev.of_node = of_find_compatible_node(NULL, NULL,
242 "lantiq,xway-reset");
243 if (!reset_dev.of_node)
244 pr_err("Failed to find reset controller node");
246 reset_controller_register(&reset_dev);
249 static void ltq_machine_restart(char *command)
251 u32 val = ltq_rcu_r32(RCU_RST_REQ);
253 if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200"))
254 val |= RCU_RD_GPHY1_XRX200 | RCU_RD_GPHY0_XRX200;
259 ltq_rcu_w32(val, RCU_RST_REQ);
263 static void ltq_machine_halt(void)
269 static void ltq_machine_power_off(void)
275 static int __init mips_reboot_setup(void)
279 ltq_rcu_np = of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway");
281 ltq_rcu_np = of_find_compatible_node(NULL, NULL,
282 "lantiq,rcu-xrx200");
284 /* check if all the reset register range is available */
286 panic("Failed to load reset resources from devicetree");
288 if (of_address_to_resource(ltq_rcu_np, 0, &res))
289 panic("Failed to get rcu memory range");
291 if (!request_mem_region(res.start, resource_size(&res), res.name))
292 pr_err("Failed to request rcu memory");
294 ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&res));
295 if (!ltq_rcu_membase)
296 panic("Failed to remap core memory");
298 _machine_restart = ltq_machine_restart;
299 _machine_halt = ltq_machine_halt;
300 pm_power_off = ltq_machine_power_off;
305 arch_initcall(mips_reboot_setup);