arch/mips/mm/dma-default.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2000  Ani Joshi <ajoshi@unixbox.com>
   7  * Copyright (C) 2000, 2001, 06  Ralf Baechle <ralf@linux-mips.org>
   8  * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/mm.h>
  14 #include <linux/module.h>
  15 #include <linux/scatterlist.h>
  16 #include <linux/string.h>
  17 #include <linux/gfp.h>
  18 #include <linux/highmem.h>
  19 #include <linux/dma-contiguous.h>
  20
  21 #include <asm/cache.h>
  22 #include <asm/cpu-type.h>
  23 #include <asm/io.h>
  24
  25 #include <dma-coherence.h>
  26
  27 #ifdef CONFIG_DMA_MAYBE_COHERENT
  28 int coherentio = 0;     /* User defined DMA coherency from command line. */
  29 EXPORT_SYMBOL_GPL(coherentio);
  30 int hw_coherentio = 0;  /* Actual hardware supported DMA coherency setting. */
  31
  32 static int __init setcoherentio(char *str)
  33 {
  34         coherentio = 1;
  35         pr_info("Hardware DMA cache coherency (command line)\n");
  36         return 0;
  37 }
  38 early_param("coherentio", setcoherentio);
  39
  40 static int __init setnocoherentio(char *str)
  41 {
  42         coherentio = 0;
  43         pr_info("Software DMA cache coherency (command line)\n");
  44         return 0;
  45 }
  46 early_param("nocoherentio", setnocoherentio);
  47 #endif
  48
  49 static inline struct page *dma_addr_to_page(struct device *dev,
  50         dma_addr_t dma_addr)
  51 {
  52         return pfn_to_page(
  53                 plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
  54 }
  55
  56 /*
  57  * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
  58  * speculatively fill random cachelines with stale data at any time,
  59  * requiring an extra flush post-DMA.
  60  *
  61  * Warning on the terminology - Linux calls an uncached area coherent;
  62  * MIPS terminology calls memory areas with hardware maintained coherency
  63  * coherent.
  64  *
  65  * Note that the R14000 and R16000 should also be checked for in this
  66  * condition.  However this function is only called on non-I/O-coherent
  67  * systems and only the R10000 and R12000 are used in such systems, the
  68  * SGI IP28 Indigo² rsp. SGI IP32 aka O2.
  69  */
  70 static inline int cpu_needs_post_dma_flush(struct device *dev)
  71 {
  72         return !plat_device_is_coherent(dev) &&
  73                (boot_cpu_type() == CPU_R10000 ||
  74                 boot_cpu_type() == CPU_R12000 ||
  75                 boot_cpu_type() == CPU_BMIPS5000);
  76 }
  77
  78 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  79 {
  80         gfp_t dma_flag;
  81
  82         /* ignore region specifiers */
  83         gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  84
  85 #ifdef CONFIG_ISA
  86         if (dev == NULL)
  87                 dma_flag = __GFP_DMA;
  88         else
  89 #endif
  90 #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
  91              if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  92                         dma_flag = __GFP_DMA;
  93         else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  94                         dma_flag = __GFP_DMA32;
  95         else
  96 #endif
  97 #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
  98              if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  99                 dma_flag = __GFP_DMA32;
 100         else
 101 #endif
 102 #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
 103              if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
 104                 dma_flag = __GFP_DMA;
 105         else
 106 #endif
 107                 dma_flag = 0;
 108
 109         /* Don't invoke OOM killer */
 110         gfp |= __GFP_NORETRY;
 111
 112         return gfp | dma_flag;
 113 }
 114
 115 void *dma_alloc_noncoherent(struct device *dev, size_t size,
 116         dma_addr_t * dma_handle, gfp_t gfp)
 117 {
 118         void *ret;
 119
 120         gfp = massage_gfp_flags(dev, gfp);
 121
 122         ret = (void *) __get_free_pages(gfp, get_order(size));
 123
 124         if (ret != NULL) {
 125                 memset(ret, 0, size);
 126                 *dma_handle = plat_map_dma_mem(dev, ret, size);
 127         }
 128
 129         return ret;
 130 }
 131 EXPORT_SYMBOL(dma_alloc_noncoherent);
 132
 133 static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 134         dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
 135 {
 136         void *ret;
 137         struct page *page = NULL;
 138         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 139
 140         gfp = massage_gfp_flags(dev, gfp);
 141
 142         if (IS_ENABLED(CONFIG_DMA_CMA) && !(gfp & GFP_ATOMIC))
 143                 page = dma_alloc_from_contiguous(dev,
 144                                         count, get_order(size));
 145         if (!page)
 146                 page = alloc_pages(gfp, get_order(size));
 147
 148         if (!page)
 149                 return NULL;
 150
 151         ret = page_address(page);
 152         memset(ret, 0, size);
 153         *dma_handle = plat_map_dma_mem(dev, ret, size);
 154         if (!plat_device_is_coherent(dev)) {
 155                 dma_cache_wback_inv((unsigned long) ret, size);
 156                 if (!hw_coherentio)
 157                         ret = UNCAC_ADDR(ret);
 158         }
 159
 160         return ret;
 161 }
 162
 163
 164 void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
 165         dma_addr_t dma_handle)
 166 {
 167         plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
 168         free_pages((unsigned long) vaddr, get_order(size));
 169 }
 170 EXPORT_SYMBOL(dma_free_noncoherent);
 171
 172 static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 173         dma_addr_t dma_handle, struct dma_attrs *attrs)
 174 {
 175         unsigned long addr = (unsigned long) vaddr;
 176         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 177         struct page *page = NULL;
 178
 179         plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
 180
 181         if (!plat_device_is_coherent(dev) && !hw_coherentio)
 182                 addr = CAC_ADDR(addr);
 183
 184         page = virt_to_page((void *) addr);
 185
 186         if (!dma_release_from_contiguous(dev, page, count))
 187                 __free_pages(page, get_order(size));
 188 }
 189
 190 static int mips_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 191         void *cpu_addr, dma_addr_t dma_addr, size_t size,
 192         struct dma_attrs *attrs)
 193 {
 194         unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
 195         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 196         unsigned long addr = (unsigned long)cpu_addr;
 197         unsigned long off = vma->vm_pgoff;
 198         unsigned long pfn;
 199         int ret = -ENXIO;
 200
 201         if (!plat_device_is_coherent(dev) && !hw_coherentio)
 202                 addr = CAC_ADDR(addr);
 203
 204         pfn = page_to_pfn(virt_to_page((void *)addr));
 205
 206         if (dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs))
 207                 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 208         else
 209                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 210
 211         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 212                 return ret;
 213
 214         if (off < count && user_count <= (count - off)) {
 215                 ret = remap_pfn_range(vma, vma->vm_start,
 216                                       pfn + off,
 217                                       user_count << PAGE_SHIFT,
 218                                       vma->vm_page_prot);
 219         }
 220
 221         return ret;
 222 }
 223
 224 static inline void __dma_sync_virtual(void *addr, size_t size,
 225         enum dma_data_direction direction)
 226 {
 227         switch (direction) {
 228         case DMA_TO_DEVICE:
 229                 dma_cache_wback((unsigned long)addr, size);
 230                 break;
 231
 232         case DMA_FROM_DEVICE:
 233                 dma_cache_inv((unsigned long)addr, size);
 234                 break;
 235
 236         case DMA_BIDIRECTIONAL:
 237                 dma_cache_wback_inv((unsigned long)addr, size);
 238                 break;
 239
 240         default:
 241                 BUG();
 242         }
 243 }
 244
 245 /*
 246  * A single sg entry may refer to multiple physically contiguous
 247  * pages. But we still need to process highmem pages individually.
 248  * If highmem is not configured then the bulk of this loop gets
 249  * optimized out.
 250  */
 251 static inline void __dma_sync(struct page *page,
 252         unsigned long offset, size_t size, enum dma_data_direction direction)
 253 {
 254         size_t left = size;
 255
 256         do {
 257                 size_t len = left;
 258
 259                 if (PageHighMem(page)) {
 260                         void *addr;
 261
 262                         if (offset + len > PAGE_SIZE) {
 263                                 if (offset >= PAGE_SIZE) {
 264                                         page += offset >> PAGE_SHIFT;
 265                                         offset &= ~PAGE_MASK;
 266                                 }
 267                                 len = PAGE_SIZE - offset;
 268                         }
 269
 270                         addr = kmap_atomic(page);
 271                         __dma_sync_virtual(addr + offset, len, direction);
 272                         kunmap_atomic(addr);
 273                 } else
 274                         __dma_sync_virtual(page_address(page) + offset,
 275                                            size, direction);
 276                 offset = 0;
 277                 page++;
 278                 left -= len;
 279         } while (left);
 280 }
 281
 282 static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
 283         size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
 284 {
 285         if (cpu_needs_post_dma_flush(dev))
 286                 __dma_sync(dma_addr_to_page(dev, dma_addr),
 287                            dma_addr & ~PAGE_MASK, size, direction);
 288         plat_post_dma_flush(dev);
 289         plat_unmap_dma_mem(dev, dma_addr, size, direction);
 290 }
 291
 292 static int mips_dma_map_sg(struct device *dev, struct scatterlist *sglist,
 293         int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
 294 {
 295         int i;
 296         struct scatterlist *sg;
 297
 298         for_each_sg(sglist, sg, nents, i) {
 299                 if (!plat_device_is_coherent(dev))
 300                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 301                                    direction);
 302 #ifdef CONFIG_NEED_SG_DMA_LENGTH
 303                 sg->dma_length = sg->length;
 304 #endif
 305                 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
 306                                   sg->offset;
 307         }
 308
 309         return nents;
 310 }
 311
 312 static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
 313         unsigned long offset, size_t size, enum dma_data_direction direction,
 314         struct dma_attrs *attrs)
 315 {
 316         if (!plat_device_is_coherent(dev))
 317                 __dma_sync(page, offset, size, direction);
 318
 319         return plat_map_dma_mem_page(dev, page) + offset;
 320 }
 321
 322 static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
 323         int nhwentries, enum dma_data_direction direction,
 324         struct dma_attrs *attrs)
 325 {
 326         int i;
 327         struct scatterlist *sg;
 328
 329         for_each_sg(sglist, sg, nhwentries, i) {
 330                 if (!plat_device_is_coherent(dev) &&
 331                     direction != DMA_TO_DEVICE)
 332                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 333                                    direction);
 334                 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
 335         }
 336 }
 337
 338 static void mips_dma_sync_single_for_cpu(struct device *dev,
 339         dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 340 {
 341         if (cpu_needs_post_dma_flush(dev))
 342                 __dma_sync(dma_addr_to_page(dev, dma_handle),
 343                            dma_handle & ~PAGE_MASK, size, direction);
 344         plat_post_dma_flush(dev);
 345 }
 346
 347 static void mips_dma_sync_single_for_device(struct device *dev,
 348         dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 349 {
 350         if (!plat_device_is_coherent(dev))
 351                 __dma_sync(dma_addr_to_page(dev, dma_handle),
 352                            dma_handle & ~PAGE_MASK, size, direction);
 353 }
 354
 355 static void mips_dma_sync_sg_for_cpu(struct device *dev,
 356         struct scatterlist *sglist, int nelems,
 357         enum dma_data_direction direction)
 358 {
 359         int i;
 360         struct scatterlist *sg;
 361
 362         if (cpu_needs_post_dma_flush(dev)) {
 363                 for_each_sg(sglist, sg, nelems, i) {
 364                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 365                                    direction);
 366                 }
 367         }
 368         plat_post_dma_flush(dev);
 369 }
 370
 371 static void mips_dma_sync_sg_for_device(struct device *dev,
 372         struct scatterlist *sglist, int nelems,
 373         enum dma_data_direction direction)
 374 {
 375         int i;
 376         struct scatterlist *sg;
 377
 378         if (!plat_device_is_coherent(dev)) {
 379                 for_each_sg(sglist, sg, nelems, i) {
 380                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 381                                    direction);
 382                 }
 383         }
 384 }
 385
 386 int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 387 {
 388         return 0;
 389 }
 390
 391 int mips_dma_supported(struct device *dev, u64 mask)
 392 {
 393         return plat_dma_supported(dev, mask);
 394 }
 395
 396 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 397                          enum dma_data_direction direction)
 398 {
 399         BUG_ON(direction == DMA_NONE);
 400
 401         if (!plat_device_is_coherent(dev))
 402                 __dma_sync_virtual(vaddr, size, direction);
 403 }
 404
 405 EXPORT_SYMBOL(dma_cache_sync);
 406
 407 static struct dma_map_ops mips_default_dma_map_ops = {
 408         .alloc = mips_dma_alloc_coherent,
 409         .free = mips_dma_free_coherent,
 410         .mmap = mips_dma_mmap,
 411         .map_page = mips_dma_map_page,
 412         .unmap_page = mips_dma_unmap_page,
 413         .map_sg = mips_dma_map_sg,
 414         .unmap_sg = mips_dma_unmap_sg,
 415         .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
 416         .sync_single_for_device = mips_dma_sync_single_for_device,
 417         .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
 418         .sync_sg_for_device = mips_dma_sync_sg_for_device,
 419         .mapping_error = mips_dma_mapping_error,
 420         .dma_supported = mips_dma_supported
 421 };
 422
 423 struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
 424 EXPORT_SYMBOL(mips_dma_map_ops);
 425
 426 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
 427
 428 static int __init mips_dma_init(void)
 429 {
 430         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 431
 432         return 0;
 433 }
 434 fs_initcall(mips_dma_init);