arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31 #include <asm/smp.h>
  32
  33 static struct device_node *allnodes;
  34
  35 /* use when traversing tree through the allnext, child, sibling,
  36  * or parent members of struct device_node.
  37  */
  38 static DEFINE_RWLOCK(devtree_lock);
  39
  40 int of_device_is_compatible(const struct device_node *device,
  41                             const char *compat)
  42 {
  43         const char* cp;
  44         int cplen, l;
  45
  46         cp = of_get_property(device, "compatible", &cplen);
  47         if (cp == NULL)
  48                 return 0;
  49         while (cplen > 0) {
  50                 if (strncmp(cp, compat, strlen(compat)) == 0)
  51                         return 1;
  52                 l = strlen(cp) + 1;
  53                 cp += l;
  54                 cplen -= l;
  55         }
  56
  57         return 0;
  58 }
  59 EXPORT_SYMBOL(of_device_is_compatible);
  60
  61 struct device_node *of_get_parent(const struct device_node *node)
  62 {
  63         struct device_node *np;
  64
  65         if (!node)
  66                 return NULL;
  67
  68         np = node->parent;
  69
  70         return np;
  71 }
  72 EXPORT_SYMBOL(of_get_parent);
  73
  74 struct device_node *of_get_next_child(const struct device_node *node,
  75         struct device_node *prev)
  76 {
  77         struct device_node *next;
  78
  79         next = prev ? prev->sibling : node->child;
  80         for (; next != 0; next = next->sibling) {
  81                 break;
  82         }
  83
  84         return next;
  85 }
  86 EXPORT_SYMBOL(of_get_next_child);
  87
  88 struct device_node *of_find_node_by_path(const char *path)
  89 {
  90         struct device_node *np = allnodes;
  91
  92         for (; np != 0; np = np->allnext) {
  93                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  94                         break;
  95         }
  96
  97         return np;
  98 }
  99 EXPORT_SYMBOL(of_find_node_by_path);
 100
 101 struct device_node *of_find_node_by_phandle(phandle handle)
 102 {
 103         struct device_node *np;
 104
 105         for (np = allnodes; np != 0; np = np->allnext)
 106                 if (np->node == handle)
 107                         break;
 108
 109         return np;
 110 }
 111 EXPORT_SYMBOL(of_find_node_by_phandle);
 112
 113 struct device_node *of_find_node_by_name(struct device_node *from,
 114         const char *name)
 115 {
 116         struct device_node *np;
 117
 118         np = from ? from->allnext : allnodes;
 119         for (; np != NULL; np = np->allnext)
 120                 if (np->name != NULL && strcmp(np->name, name) == 0)
 121                         break;
 122
 123         return np;
 124 }
 125 EXPORT_SYMBOL(of_find_node_by_name);
 126
 127 struct device_node *of_find_node_by_type(struct device_node *from,
 128         const char *type)
 129 {
 130         struct device_node *np;
 131
 132         np = from ? from->allnext : allnodes;
 133         for (; np != 0; np = np->allnext)
 134                 if (np->type != 0 && strcmp(np->type, type) == 0)
 135                         break;
 136
 137         return np;
 138 }
 139 EXPORT_SYMBOL(of_find_node_by_type);
 140
 141 struct device_node *of_find_compatible_node(struct device_node *from,
 142         const char *type, const char *compatible)
 143 {
 144         struct device_node *np;
 145
 146         np = from ? from->allnext : allnodes;
 147         for (; np != 0; np = np->allnext) {
 148                 if (type != NULL
 149                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 150                         continue;
 151                 if (of_device_is_compatible(np, compatible))
 152                         break;
 153         }
 154
 155         return np;
 156 }
 157 EXPORT_SYMBOL(of_find_compatible_node);
 158
 159 struct property *of_find_property(const struct device_node *np,
 160                                   const char *name,
 161                                   int *lenp)
 162 {
 163         struct property *pp;
 164
 165         for (pp = np->properties; pp != 0; pp = pp->next) {
 166                 if (strcasecmp(pp->name, name) == 0) {
 167                         if (lenp != 0)
 168                                 *lenp = pp->length;
 169                         break;
 170                 }
 171         }
 172         return pp;
 173 }
 174 EXPORT_SYMBOL(of_find_property);
 175
 176 int of_getintprop_default(struct device_node *np, const char *name, int def)
 177 {
 178         struct property *prop;
 179         int len;
 180
 181         prop = of_find_property(np, name, &len);
 182         if (!prop || len != 4)
 183                 return def;
 184
 185         return *(int *) prop->value;
 186 }
 187 EXPORT_SYMBOL(of_getintprop_default);
 188
 189 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 190 {
 191         struct property **prevp;
 192         void *new_val;
 193         int err;
 194
 195         new_val = kmalloc(len, GFP_KERNEL);
 196         if (!new_val)
 197                 return -ENOMEM;
 198
 199         memcpy(new_val, val, len);
 200
 201         err = -ENODEV;
 202
 203         write_lock(&devtree_lock);
 204         prevp = &dp->properties;
 205         while (*prevp) {
 206                 struct property *prop = *prevp;
 207
 208                 if (!strcasecmp(prop->name, name)) {
 209                         void *old_val = prop->value;
 210                         int ret;
 211
 212                         ret = prom_setprop(dp->node, name, val, len);
 213                         err = -EINVAL;
 214                         if (ret >= 0) {
 215                                 prop->value = new_val;
 216                                 prop->length = len;
 217
 218                                 if (OF_IS_DYNAMIC(prop))
 219                                         kfree(old_val);
 220
 221                                 OF_MARK_DYNAMIC(prop);
 222
 223                                 err = 0;
 224                         }
 225                         break;
 226                 }
 227                 prevp = &(*prevp)->next;
 228         }
 229         write_unlock(&devtree_lock);
 230
 231         /* XXX Upate procfs if necessary... */
 232
 233         return err;
 234 }
 235 EXPORT_SYMBOL(of_set_property);
 236
 237 static unsigned int prom_early_allocated;
 238
 239 static void * __init prom_early_alloc(unsigned long size)
 240 {
 241         void *ret;
 242
 243         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 244         if (ret != NULL)
 245                 memset(ret, 0, size);
 246
 247         prom_early_allocated += size;
 248
 249         return ret;
 250 }
 251
 252 #ifdef CONFIG_PCI
 253 /* PSYCHO interrupt mapping support. */
 254 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 255 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 256 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 257 {
 258         unsigned int bus =  (ino & 0x10) >> 4;
 259         unsigned int slot = (ino & 0x0c) >> 2;
 260
 261         if (bus == 0)
 262                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 263         else
 264                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 265 }
 266
 267 #define PSYCHO_IMAP_SCSI        0x1000UL
 268 #define PSYCHO_IMAP_ETH         0x1008UL
 269 #define PSYCHO_IMAP_BPP         0x1010UL
 270 #define PSYCHO_IMAP_AU_REC      0x1018UL
 271 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 272 #define PSYCHO_IMAP_PFAIL       0x1028UL
 273 #define PSYCHO_IMAP_KMS         0x1030UL
 274 #define PSYCHO_IMAP_FLPY        0x1038UL
 275 #define PSYCHO_IMAP_SHW         0x1040UL
 276 #define PSYCHO_IMAP_KBD         0x1048UL
 277 #define PSYCHO_IMAP_MS          0x1050UL
 278 #define PSYCHO_IMAP_SER         0x1058UL
 279 #define PSYCHO_IMAP_TIM0        0x1060UL
 280 #define PSYCHO_IMAP_TIM1        0x1068UL
 281 #define PSYCHO_IMAP_UE          0x1070UL
 282 #define PSYCHO_IMAP_CE          0x1078UL
 283 #define PSYCHO_IMAP_A_ERR       0x1080UL
 284 #define PSYCHO_IMAP_B_ERR       0x1088UL
 285 #define PSYCHO_IMAP_PMGMT       0x1090UL
 286 #define PSYCHO_IMAP_GFX         0x1098UL
 287 #define PSYCHO_IMAP_EUPA        0x10a0UL
 288
 289 static unsigned long __psycho_onboard_imap_off[] = {
 290 /*0x20*/        PSYCHO_IMAP_SCSI,
 291 /*0x21*/        PSYCHO_IMAP_ETH,
 292 /*0x22*/        PSYCHO_IMAP_BPP,
 293 /*0x23*/        PSYCHO_IMAP_AU_REC,
 294 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 295 /*0x25*/        PSYCHO_IMAP_PFAIL,
 296 /*0x26*/        PSYCHO_IMAP_KMS,
 297 /*0x27*/        PSYCHO_IMAP_FLPY,
 298 /*0x28*/        PSYCHO_IMAP_SHW,
 299 /*0x29*/        PSYCHO_IMAP_KBD,
 300 /*0x2a*/        PSYCHO_IMAP_MS,
 301 /*0x2b*/        PSYCHO_IMAP_SER,
 302 /*0x2c*/        PSYCHO_IMAP_TIM0,
 303 /*0x2d*/        PSYCHO_IMAP_TIM1,
 304 /*0x2e*/        PSYCHO_IMAP_UE,
 305 /*0x2f*/        PSYCHO_IMAP_CE,
 306 /*0x30*/        PSYCHO_IMAP_A_ERR,
 307 /*0x31*/        PSYCHO_IMAP_B_ERR,
 308 /*0x32*/        PSYCHO_IMAP_PMGMT,
 309 /*0x33*/        PSYCHO_IMAP_GFX,
 310 /*0x34*/        PSYCHO_IMAP_EUPA,
 311 };
 312 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 313 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 314 #define psycho_onboard_imap_offset(__ino) \
 315         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 316
 317 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 318 #define PSYCHO_ICLR_SCSI        0x1800UL
 319
 320 #define psycho_iclr_offset(ino)                                       \
 321         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 322                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 323
 324 static unsigned int psycho_irq_build(struct device_node *dp,
 325                                      unsigned int ino,
 326                                      void *_data)
 327 {
 328         unsigned long controller_regs = (unsigned long) _data;
 329         unsigned long imap, iclr;
 330         unsigned long imap_off, iclr_off;
 331         int inofixup = 0;
 332
 333         ino &= 0x3f;
 334         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 335                 /* PCI slot */
 336                 imap_off = psycho_pcislot_imap_offset(ino);
 337         } else {
 338                 /* Onboard device */
 339                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 340                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 341                         prom_halt();
 342                 }
 343                 imap_off = psycho_onboard_imap_offset(ino);
 344         }
 345
 346         /* Now build the IRQ bucket. */
 347         imap = controller_regs + imap_off;
 348
 349         iclr_off = psycho_iclr_offset(ino);
 350         iclr = controller_regs + iclr_off;
 351
 352         if ((ino & 0x20) == 0)
 353                 inofixup = ino & 0x03;
 354
 355         return build_irq(inofixup, iclr, imap);
 356 }
 357
 358 static void __init psycho_irq_trans_init(struct device_node *dp)
 359 {
 360         const struct linux_prom64_registers *regs;
 361
 362         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 363         dp->irq_trans->irq_build = psycho_irq_build;
 364
 365         regs = of_get_property(dp, "reg", NULL);
 366         dp->irq_trans->data = (void *) regs[2].phys_addr;
 367 }
 368
 369 #define sabre_read(__reg) \
 370 ({      u64 __ret; \
 371         __asm__ __volatile__("ldxa [%1] %2, %0" \
 372                              : "=r" (__ret) \
 373                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 374                              : "memory"); \
 375         __ret; \
 376 })
 377
 378 struct sabre_irq_data {
 379         unsigned long controller_regs;
 380         unsigned int pci_first_busno;
 381 };
 382 #define SABRE_CONFIGSPACE       0x001000000UL
 383 #define SABRE_WRSYNC            0x1c20UL
 384
 385 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 386         (CONFIG_SPACE | (1UL << 24))
 387 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 388         (((unsigned long)(BUS)   << 16) |       \
 389          ((unsigned long)(DEVFN) << 8)  |       \
 390          ((unsigned long)(REG)))
 391
 392 /* When a device lives behind a bridge deeper in the PCI bus topology
 393  * than APB, a special sequence must run to make sure all pending DMA
 394  * transfers at the time of IRQ delivery are visible in the coherency
 395  * domain by the cpu.  This sequence is to perform a read on the far
 396  * side of the non-APB bridge, then perform a read of Sabre's DMA
 397  * write-sync register.
 398  */
 399 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 400 {
 401         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 402         struct sabre_irq_data *irq_data = _arg2;
 403         unsigned long controller_regs = irq_data->controller_regs;
 404         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 405         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 406         unsigned int bus, devfn;
 407         u16 _unused;
 408
 409         config_space = SABRE_CONFIG_BASE(config_space);
 410
 411         bus = (phys_hi >> 16) & 0xff;
 412         devfn = (phys_hi >> 8) & 0xff;
 413
 414         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 415
 416         __asm__ __volatile__("membar #Sync\n\t"
 417                              "lduha [%1] %2, %0\n\t"
 418                              "membar #Sync"
 419                              : "=r" (_unused)
 420                              : "r" ((u16 *) config_space),
 421                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 422                              : "memory");
 423
 424         sabre_read(sync_reg);
 425 }
 426
 427 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 428 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 429 #define SABRE_IMAP_SCSI         0x1000UL
 430 #define SABRE_IMAP_ETH          0x1008UL
 431 #define SABRE_IMAP_BPP          0x1010UL
 432 #define SABRE_IMAP_AU_REC       0x1018UL
 433 #define SABRE_IMAP_AU_PLAY      0x1020UL
 434 #define SABRE_IMAP_PFAIL        0x1028UL
 435 #define SABRE_IMAP_KMS          0x1030UL
 436 #define SABRE_IMAP_FLPY         0x1038UL
 437 #define SABRE_IMAP_SHW          0x1040UL
 438 #define SABRE_IMAP_KBD          0x1048UL
 439 #define SABRE_IMAP_MS           0x1050UL
 440 #define SABRE_IMAP_SER          0x1058UL
 441 #define SABRE_IMAP_UE           0x1070UL
 442 #define SABRE_IMAP_CE           0x1078UL
 443 #define SABRE_IMAP_PCIERR       0x1080UL
 444 #define SABRE_IMAP_GFX          0x1098UL
 445 #define SABRE_IMAP_EUPA         0x10a0UL
 446 #define SABRE_ICLR_A_SLOT0      0x1400UL
 447 #define SABRE_ICLR_B_SLOT0      0x1480UL
 448 #define SABRE_ICLR_SCSI         0x1800UL
 449 #define SABRE_ICLR_ETH          0x1808UL
 450 #define SABRE_ICLR_BPP          0x1810UL
 451 #define SABRE_ICLR_AU_REC       0x1818UL
 452 #define SABRE_ICLR_AU_PLAY      0x1820UL
 453 #define SABRE_ICLR_PFAIL        0x1828UL
 454 #define SABRE_ICLR_KMS          0x1830UL
 455 #define SABRE_ICLR_FLPY         0x1838UL
 456 #define SABRE_ICLR_SHW          0x1840UL
 457 #define SABRE_ICLR_KBD          0x1848UL
 458 #define SABRE_ICLR_MS           0x1850UL
 459 #define SABRE_ICLR_SER          0x1858UL
 460 #define SABRE_ICLR_UE           0x1870UL
 461 #define SABRE_ICLR_CE           0x1878UL
 462 #define SABRE_ICLR_PCIERR       0x1880UL
 463
 464 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 465 {
 466         unsigned int bus =  (ino & 0x10) >> 4;
 467         unsigned int slot = (ino & 0x0c) >> 2;
 468
 469         if (bus == 0)
 470                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 471         else
 472                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 473 }
 474
 475 static unsigned long __sabre_onboard_imap_off[] = {
 476 /*0x20*/        SABRE_IMAP_SCSI,
 477 /*0x21*/        SABRE_IMAP_ETH,
 478 /*0x22*/        SABRE_IMAP_BPP,
 479 /*0x23*/        SABRE_IMAP_AU_REC,
 480 /*0x24*/        SABRE_IMAP_AU_PLAY,
 481 /*0x25*/        SABRE_IMAP_PFAIL,
 482 /*0x26*/        SABRE_IMAP_KMS,
 483 /*0x27*/        SABRE_IMAP_FLPY,
 484 /*0x28*/        SABRE_IMAP_SHW,
 485 /*0x29*/        SABRE_IMAP_KBD,
 486 /*0x2a*/        SABRE_IMAP_MS,
 487 /*0x2b*/        SABRE_IMAP_SER,
 488 /*0x2c*/        0 /* reserved */,
 489 /*0x2d*/        0 /* reserved */,
 490 /*0x2e*/        SABRE_IMAP_UE,
 491 /*0x2f*/        SABRE_IMAP_CE,
 492 /*0x30*/        SABRE_IMAP_PCIERR,
 493 /*0x31*/        0 /* reserved */,
 494 /*0x32*/        0 /* reserved */,
 495 /*0x33*/        SABRE_IMAP_GFX,
 496 /*0x34*/        SABRE_IMAP_EUPA,
 497 };
 498 #define SABRE_ONBOARD_IRQ_BASE          0x20
 499 #define SABRE_ONBOARD_IRQ_LAST          0x30
 500 #define sabre_onboard_imap_offset(__ino) \
 501         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 502
 503 #define sabre_iclr_offset(ino)                                        \
 504         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 505                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 506
 507 static int sabre_device_needs_wsync(struct device_node *dp)
 508 {
 509         struct device_node *parent = dp->parent;
 510         const char *parent_model, *parent_compat;
 511
 512         /* This traversal up towards the root is meant to
 513          * handle two cases:
 514          *
 515          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 516          * 2) the PCI controller interrupts themselves, which
 517          *    will use the sabre_irq_build but do not need
 518          *    the DMA synchronization handling
 519          */
 520         while (parent) {
 521                 if (!strcmp(parent->type, "pci"))
 522                         break;
 523                 parent = parent->parent;
 524         }
 525
 526         if (!parent)
 527                 return 0;
 528
 529         parent_model = of_get_property(parent,
 530                                        "model", NULL);
 531         if (parent_model &&
 532             (!strcmp(parent_model, "SUNW,sabre") ||
 533              !strcmp(parent_model, "SUNW,simba")))
 534                 return 0;
 535
 536         parent_compat = of_get_property(parent,
 537                                         "compatible", NULL);
 538         if (parent_compat &&
 539             (!strcmp(parent_compat, "pci108e,a000") ||
 540              !strcmp(parent_compat, "pci108e,a001")))
 541                 return 0;
 542
 543         return 1;
 544 }
 545
 546 static unsigned int sabre_irq_build(struct device_node *dp,
 547                                     unsigned int ino,
 548                                     void *_data)
 549 {
 550         struct sabre_irq_data *irq_data = _data;
 551         unsigned long controller_regs = irq_data->controller_regs;
 552         const struct linux_prom_pci_registers *regs;
 553         unsigned long imap, iclr;
 554         unsigned long imap_off, iclr_off;
 555         int inofixup = 0;
 556         int virt_irq;
 557
 558         ino &= 0x3f;
 559         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 560                 /* PCI slot */
 561                 imap_off = sabre_pcislot_imap_offset(ino);
 562         } else {
 563                 /* onboard device */
 564                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 565                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 566                         prom_halt();
 567                 }
 568                 imap_off = sabre_onboard_imap_offset(ino);
 569         }
 570
 571         /* Now build the IRQ bucket. */
 572         imap = controller_regs + imap_off;
 573
 574         iclr_off = sabre_iclr_offset(ino);
 575         iclr = controller_regs + iclr_off;
 576
 577         if ((ino & 0x20) == 0)
 578                 inofixup = ino & 0x03;
 579
 580         virt_irq = build_irq(inofixup, iclr, imap);
 581
 582         /* If the parent device is a PCI<->PCI bridge other than
 583          * APB, we have to install a pre-handler to ensure that
 584          * all pending DMA is drained before the interrupt handler
 585          * is run.
 586          */
 587         regs = of_get_property(dp, "reg", NULL);
 588         if (regs && sabre_device_needs_wsync(dp)) {
 589                 irq_install_pre_handler(virt_irq,
 590                                         sabre_wsync_handler,
 591                                         (void *) (long) regs->phys_hi,
 592                                         (void *) irq_data);
 593         }
 594
 595         return virt_irq;
 596 }
 597
 598 static void __init sabre_irq_trans_init(struct device_node *dp)
 599 {
 600         const struct linux_prom64_registers *regs;
 601         struct sabre_irq_data *irq_data;
 602         const u32 *busrange;
 603
 604         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 605         dp->irq_trans->irq_build = sabre_irq_build;
 606
 607         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 608
 609         regs = of_get_property(dp, "reg", NULL);
 610         irq_data->controller_regs = regs[0].phys_addr;
 611
 612         busrange = of_get_property(dp, "bus-range", NULL);
 613         irq_data->pci_first_busno = busrange[0];
 614
 615         dp->irq_trans->data = irq_data;
 616 }
 617
 618 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 619  * imap/iclr registers are per-PBM.
 620  */
 621 #define SCHIZO_IMAP_BASE        0x1000UL
 622 #define SCHIZO_ICLR_BASE        0x1400UL
 623
 624 static unsigned long schizo_imap_offset(unsigned long ino)
 625 {
 626         return SCHIZO_IMAP_BASE + (ino * 8UL);
 627 }
 628
 629 static unsigned long schizo_iclr_offset(unsigned long ino)
 630 {
 631         return SCHIZO_ICLR_BASE + (ino * 8UL);
 632 }
 633
 634 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 635                                         unsigned int ino)
 636 {
 637
 638         return pbm_regs + schizo_iclr_offset(ino);
 639 }
 640
 641 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 642                                         unsigned int ino)
 643 {
 644         return pbm_regs + schizo_imap_offset(ino);
 645 }
 646
 647 #define schizo_read(__reg) \
 648 ({      u64 __ret; \
 649         __asm__ __volatile__("ldxa [%1] %2, %0" \
 650                              : "=r" (__ret) \
 651                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 652                              : "memory"); \
 653         __ret; \
 654 })
 655 #define schizo_write(__reg, __val) \
 656         __asm__ __volatile__("stxa %0, [%1] %2" \
 657                              : /* no outputs */ \
 658                              : "r" (__val), "r" (__reg), \
 659                                "i" (ASI_PHYS_BYPASS_EC_E) \
 660                              : "memory")
 661
 662 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 663 {
 664         unsigned long sync_reg = (unsigned long) _arg2;
 665         u64 mask = 1UL << (ino & IMAP_INO);
 666         u64 val;
 667         int limit;
 668
 669         schizo_write(sync_reg, mask);
 670
 671         limit = 100000;
 672         val = 0;
 673         while (--limit) {
 674                 val = schizo_read(sync_reg);
 675                 if (!(val & mask))
 676                         break;
 677         }
 678         if (limit <= 0) {
 679                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 680                        val, mask);
 681         }
 682
 683         if (_arg1) {
 684                 static unsigned char cacheline[64]
 685                         __attribute__ ((aligned (64)));
 686
 687                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 688                                      "or %0, %4, %1\n\t"
 689                                      "wr %1, 0x0, %%fprs\n\t"
 690                                      "stda %%f0, [%5] %6\n\t"
 691                                      "wr %0, 0x0, %%fprs\n\t"
 692                                      "membar #Sync"
 693                                      : "=&r" (mask), "=&r" (val)
 694                                      : "0" (mask), "1" (val),
 695                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 696                                      "i" (ASI_BLK_COMMIT_P));
 697         }
 698 }
 699
 700 struct schizo_irq_data {
 701         unsigned long pbm_regs;
 702         unsigned long sync_reg;
 703         u32 portid;
 704         int chip_version;
 705 };
 706
 707 static unsigned int schizo_irq_build(struct device_node *dp,
 708                                      unsigned int ino,
 709                                      void *_data)
 710 {
 711         struct schizo_irq_data *irq_data = _data;
 712         unsigned long pbm_regs = irq_data->pbm_regs;
 713         unsigned long imap, iclr;
 714         int ign_fixup;
 715         int virt_irq;
 716         int is_tomatillo;
 717
 718         ino &= 0x3f;
 719
 720         /* Now build the IRQ bucket. */
 721         imap = schizo_ino_to_imap(pbm_regs, ino);
 722         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 723
 724         /* On Schizo, no inofixup occurs.  This is because each
 725          * INO has it's own IMAP register.  On Psycho and Sabre
 726          * there is only one IMAP register for each PCI slot even
 727          * though four different INOs can be generated by each
 728          * PCI slot.
 729          *
 730          * But, for JBUS variants (essentially, Tomatillo), we have
 731          * to fixup the lowest bit of the interrupt group number.
 732          */
 733         ign_fixup = 0;
 734
 735         is_tomatillo = (irq_data->sync_reg != 0UL);
 736
 737         if (is_tomatillo) {
 738                 if (irq_data->portid & 1)
 739                         ign_fixup = (1 << 6);
 740         }
 741
 742         virt_irq = build_irq(ign_fixup, iclr, imap);
 743
 744         if (is_tomatillo) {
 745                 irq_install_pre_handler(virt_irq,
 746                                         tomatillo_wsync_handler,
 747                                         ((irq_data->chip_version <= 4) ?
 748                                          (void *) 1 : (void *) 0),
 749                                         (void *) irq_data->sync_reg);
 750         }
 751
 752         return virt_irq;
 753 }
 754
 755 static void __init __schizo_irq_trans_init(struct device_node *dp,
 756                                            int is_tomatillo)
 757 {
 758         const struct linux_prom64_registers *regs;
 759         struct schizo_irq_data *irq_data;
 760
 761         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 762         dp->irq_trans->irq_build = schizo_irq_build;
 763
 764         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 765
 766         regs = of_get_property(dp, "reg", NULL);
 767         dp->irq_trans->data = irq_data;
 768
 769         irq_data->pbm_regs = regs[0].phys_addr;
 770         if (is_tomatillo)
 771                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 772         else
 773                 irq_data->sync_reg = 0UL;
 774         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 775         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 776 }
 777
 778 static void __init schizo_irq_trans_init(struct device_node *dp)
 779 {
 780         __schizo_irq_trans_init(dp, 0);
 781 }
 782
 783 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 784 {
 785         __schizo_irq_trans_init(dp, 1);
 786 }
 787
 788 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 789                                         unsigned int devino,
 790                                         void *_data)
 791 {
 792         u32 devhandle = (u32) (unsigned long) _data;
 793
 794         return sun4v_build_irq(devhandle, devino);
 795 }
 796
 797 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 798 {
 799         const struct linux_prom64_registers *regs;
 800
 801         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 802         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 803
 804         regs = of_get_property(dp, "reg", NULL);
 805         dp->irq_trans->data = (void *) (unsigned long)
 806                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 807 }
 808
 809 struct fire_irq_data {
 810         unsigned long pbm_regs;
 811         u32 portid;
 812 };
 813
 814 #define FIRE_IMAP_BASE  0x001000
 815 #define FIRE_ICLR_BASE  0x001400
 816
 817 static unsigned long fire_imap_offset(unsigned long ino)
 818 {
 819         return FIRE_IMAP_BASE + (ino * 8UL);
 820 }
 821
 822 static unsigned long fire_iclr_offset(unsigned long ino)
 823 {
 824         return FIRE_ICLR_BASE + (ino * 8UL);
 825 }
 826
 827 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 828                                             unsigned int ino)
 829 {
 830         return pbm_regs + fire_iclr_offset(ino);
 831 }
 832
 833 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 834                                             unsigned int ino)
 835 {
 836         return pbm_regs + fire_imap_offset(ino);
 837 }
 838
 839 static unsigned int fire_irq_build(struct device_node *dp,
 840                                          unsigned int ino,
 841                                          void *_data)
 842 {
 843         struct fire_irq_data *irq_data = _data;
 844         unsigned long pbm_regs = irq_data->pbm_regs;
 845         unsigned long imap, iclr;
 846         unsigned long int_ctrlr;
 847
 848         ino &= 0x3f;
 849
 850         /* Now build the IRQ bucket. */
 851         imap = fire_ino_to_imap(pbm_regs, ino);
 852         iclr = fire_ino_to_iclr(pbm_regs, ino);
 853
 854         /* Set the interrupt controller number.  */
 855         int_ctrlr = 1 << 6;
 856         upa_writeq(int_ctrlr, imap);
 857
 858         /* The interrupt map registers do not have an INO field
 859          * like other chips do.  They return zero in the INO
 860          * field, and the interrupt controller number is controlled
 861          * in bits 6 to 9.  So in order for build_irq() to get
 862          * the INO right we pass it in as part of the fixup
 863          * which will get added to the map register zero value
 864          * read by build_irq().
 865          */
 866         ino |= (irq_data->portid << 6);
 867         ino -= int_ctrlr;
 868         return build_irq(ino, iclr, imap);
 869 }
 870
 871 static void __init fire_irq_trans_init(struct device_node *dp)
 872 {
 873         const struct linux_prom64_registers *regs;
 874         struct fire_irq_data *irq_data;
 875
 876         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 877         dp->irq_trans->irq_build = fire_irq_build;
 878
 879         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 880
 881         regs = of_get_property(dp, "reg", NULL);
 882         dp->irq_trans->data = irq_data;
 883
 884         irq_data->pbm_regs = regs[0].phys_addr;
 885         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 886 }
 887 #endif /* CONFIG_PCI */
 888
 889 #ifdef CONFIG_SBUS
 890 /* INO number to IMAP register offset for SYSIO external IRQ's.
 891  * This should conform to both Sunfire/Wildfire server and Fusion
 892  * desktop designs.
 893  */
 894 #define SYSIO_IMAP_SLOT0        0x2c00UL
 895 #define SYSIO_IMAP_SLOT1        0x2c08UL
 896 #define SYSIO_IMAP_SLOT2        0x2c10UL
 897 #define SYSIO_IMAP_SLOT3        0x2c18UL
 898 #define SYSIO_IMAP_SCSI         0x3000UL
 899 #define SYSIO_IMAP_ETH          0x3008UL
 900 #define SYSIO_IMAP_BPP          0x3010UL
 901 #define SYSIO_IMAP_AUDIO        0x3018UL
 902 #define SYSIO_IMAP_PFAIL        0x3020UL
 903 #define SYSIO_IMAP_KMS          0x3028UL
 904 #define SYSIO_IMAP_FLPY         0x3030UL
 905 #define SYSIO_IMAP_SHW          0x3038UL
 906 #define SYSIO_IMAP_KBD          0x3040UL
 907 #define SYSIO_IMAP_MS           0x3048UL
 908 #define SYSIO_IMAP_SER          0x3050UL
 909 #define SYSIO_IMAP_TIM0         0x3060UL
 910 #define SYSIO_IMAP_TIM1         0x3068UL
 911 #define SYSIO_IMAP_UE           0x3070UL
 912 #define SYSIO_IMAP_CE           0x3078UL
 913 #define SYSIO_IMAP_SBERR        0x3080UL
 914 #define SYSIO_IMAP_PMGMT        0x3088UL
 915 #define SYSIO_IMAP_GFX          0x3090UL
 916 #define SYSIO_IMAP_EUPA         0x3098UL
 917
 918 #define bogon     ((unsigned long) -1)
 919 static unsigned long sysio_irq_offsets[] = {
 920         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 921         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 922         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 923         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 924         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 925         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 926         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 927         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 928         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 929
 930         /* Onboard devices (not relevant/used on SunFire). */
 931         SYSIO_IMAP_SCSI,
 932         SYSIO_IMAP_ETH,
 933         SYSIO_IMAP_BPP,
 934         bogon,
 935         SYSIO_IMAP_AUDIO,
 936         SYSIO_IMAP_PFAIL,
 937         bogon,
 938         bogon,
 939         SYSIO_IMAP_KMS,
 940         SYSIO_IMAP_FLPY,
 941         SYSIO_IMAP_SHW,
 942         SYSIO_IMAP_KBD,
 943         SYSIO_IMAP_MS,
 944         SYSIO_IMAP_SER,
 945         bogon,
 946         bogon,
 947         SYSIO_IMAP_TIM0,
 948         SYSIO_IMAP_TIM1,
 949         bogon,
 950         bogon,
 951         SYSIO_IMAP_UE,
 952         SYSIO_IMAP_CE,
 953         SYSIO_IMAP_SBERR,
 954         SYSIO_IMAP_PMGMT,
 955         SYSIO_IMAP_GFX,
 956         SYSIO_IMAP_EUPA,
 957 };
 958
 959 #undef bogon
 960
 961 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 962
 963 /* Convert Interrupt Mapping register pointer to associated
 964  * Interrupt Clear register pointer, SYSIO specific version.
 965  */
 966 #define SYSIO_ICLR_UNUSED0      0x3400UL
 967 #define SYSIO_ICLR_SLOT0        0x3408UL
 968 #define SYSIO_ICLR_SLOT1        0x3448UL
 969 #define SYSIO_ICLR_SLOT2        0x3488UL
 970 #define SYSIO_ICLR_SLOT3        0x34c8UL
 971 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 972 {
 973         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 974         return imap + diff;
 975 }
 976
 977 static unsigned int sbus_of_build_irq(struct device_node *dp,
 978                                       unsigned int ino,
 979                                       void *_data)
 980 {
 981         unsigned long reg_base = (unsigned long) _data;
 982         const struct linux_prom_registers *regs;
 983         unsigned long imap, iclr;
 984         int sbus_slot = 0;
 985         int sbus_level = 0;
 986
 987         ino &= 0x3f;
 988
 989         regs = of_get_property(dp, "reg", NULL);
 990         if (regs)
 991                 sbus_slot = regs->which_io;
 992
 993         if (ino < 0x20)
 994                 ino += (sbus_slot * 8);
 995
 996         imap = sysio_irq_offsets[ino];
 997         if (imap == ((unsigned long)-1)) {
 998                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 999                             ino);
1000                 prom_halt();
1001         }
1002         imap += reg_base;
1003
1004         /* SYSIO inconsistency.  For external SLOTS, we have to select
1005          * the right ICLR register based upon the lower SBUS irq level
1006          * bits.
1007          */
1008         if (ino >= 0x20) {
1009                 iclr = sysio_imap_to_iclr(imap);
1010         } else {
1011                 sbus_level = ino & 0x7;
1012
1013                 switch(sbus_slot) {
1014                 case 0:
1015                         iclr = reg_base + SYSIO_ICLR_SLOT0;
1016                         break;
1017                 case 1:
1018                         iclr = reg_base + SYSIO_ICLR_SLOT1;
1019                         break;
1020                 case 2:
1021                         iclr = reg_base + SYSIO_ICLR_SLOT2;
1022                         break;
1023                 default:
1024                 case 3:
1025                         iclr = reg_base + SYSIO_ICLR_SLOT3;
1026                         break;
1027                 };
1028
1029                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
1030         }
1031         return build_irq(sbus_level, iclr, imap);
1032 }
1033
1034 static void __init sbus_irq_trans_init(struct device_node *dp)
1035 {
1036         const struct linux_prom64_registers *regs;
1037
1038         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1039         dp->irq_trans->irq_build = sbus_of_build_irq;
1040
1041         regs = of_get_property(dp, "reg", NULL);
1042         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1043 }
1044 #endif /* CONFIG_SBUS */
1045
1046
1047 static unsigned int central_build_irq(struct device_node *dp,
1048                                       unsigned int ino,
1049                                       void *_data)
1050 {
1051         struct device_node *central_dp = _data;
1052         struct of_device *central_op = of_find_device_by_node(central_dp);
1053         struct resource *res;
1054         unsigned long imap, iclr;
1055         u32 tmp;
1056
1057         if (!strcmp(dp->name, "eeprom")) {
1058                 res = &central_op->resource[5];
1059         } else if (!strcmp(dp->name, "zs")) {
1060                 res = &central_op->resource[4];
1061         } else if (!strcmp(dp->name, "clock-board")) {
1062                 res = &central_op->resource[3];
1063         } else {
1064                 return ino;
1065         }
1066
1067         imap = res->start + 0x00UL;
1068         iclr = res->start + 0x10UL;
1069
1070         /* Set the INO state to idle, and disable.  */
1071         upa_writel(0, iclr);
1072         upa_readl(iclr);
1073
1074         tmp = upa_readl(imap);
1075         tmp &= ~0x80000000;
1076         upa_writel(tmp, imap);
1077
1078         return build_irq(0, iclr, imap);
1079 }
1080
1081 static void __init central_irq_trans_init(struct device_node *dp)
1082 {
1083         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1084         dp->irq_trans->irq_build = central_build_irq;
1085
1086         dp->irq_trans->data = dp;
1087 }
1088
1089 struct irq_trans {
1090         const char *name;
1091         void (*init)(struct device_node *);
1092 };
1093
1094 #ifdef CONFIG_PCI
1095 static struct irq_trans __initdata pci_irq_trans_table[] = {
1096         { "SUNW,sabre", sabre_irq_trans_init },
1097         { "pci108e,a000", sabre_irq_trans_init },
1098         { "pci108e,a001", sabre_irq_trans_init },
1099         { "SUNW,psycho", psycho_irq_trans_init },
1100         { "pci108e,8000", psycho_irq_trans_init },
1101         { "SUNW,schizo", schizo_irq_trans_init },
1102         { "pci108e,8001", schizo_irq_trans_init },
1103         { "SUNW,schizo+", schizo_irq_trans_init },
1104         { "pci108e,8002", schizo_irq_trans_init },
1105         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1106         { "pci108e,a801", tomatillo_irq_trans_init },
1107         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1108         { "pciex108e,80f0", fire_irq_trans_init },
1109 };
1110 #endif
1111
1112 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1113                                          unsigned int devino,
1114                                          void *_data)
1115 {
1116         u32 devhandle = (u32) (unsigned long) _data;
1117
1118         return sun4v_build_irq(devhandle, devino);
1119 }
1120
1121 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1122 {
1123         const struct linux_prom64_registers *regs;
1124
1125         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1126         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1127
1128         regs = of_get_property(dp, "reg", NULL);
1129         dp->irq_trans->data = (void *) (unsigned long)
1130                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1131 }
1132
1133 static void __init irq_trans_init(struct device_node *dp)
1134 {
1135 #ifdef CONFIG_PCI
1136         const char *model;
1137         int i;
1138 #endif
1139
1140 #ifdef CONFIG_PCI
1141         model = of_get_property(dp, "model", NULL);
1142         if (!model)
1143                 model = of_get_property(dp, "compatible", NULL);
1144         if (model) {
1145                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1146                         struct irq_trans *t = &pci_irq_trans_table[i];
1147
1148                         if (!strcmp(model, t->name))
1149                                 return t->init(dp);
1150                 }
1151         }
1152 #endif
1153 #ifdef CONFIG_SBUS
1154         if (!strcmp(dp->name, "sbus") ||
1155             !strcmp(dp->name, "sbi"))
1156                 return sbus_irq_trans_init(dp);
1157 #endif
1158         if (!strcmp(dp->name, "fhc") &&
1159             !strcmp(dp->parent->name, "central"))
1160                 return central_irq_trans_init(dp);
1161         if (!strcmp(dp->name, "virtual-devices"))
1162                 return sun4v_vdev_irq_trans_init(dp);
1163 }
1164
1165 static int is_root_node(const struct device_node *dp)
1166 {
1167         if (!dp)
1168                 return 0;
1169
1170         return (dp->parent == NULL);
1171 }
1172
1173 /* The following routines deal with the black magic of fully naming a
1174  * node.
1175  *
1176  * Certain well known named nodes are just the simple name string.
1177  *
1178  * Actual devices have an address specifier appended to the base name
1179  * string, like this "foo@addr".  The "addr" can be in any number of
1180  * formats, and the platform plus the type of the node determine the
1181  * format and how it is constructed.
1182  *
1183  * For children of the ROOT node, the naming convention is fixed and
1184  * determined by whether this is a sun4u or sun4v system.
1185  *
1186  * For children of other nodes, it is bus type specific.  So
1187  * we walk up the tree until we discover a "device_type" property
1188  * we recognize and we go from there.
1189  *
1190  * As an example, the boot device on my workstation has a full path:
1191  *
1192  *      /pci@1e,600000/ide@d/disk@0,0:c
1193  */
1194 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1195 {
1196         struct linux_prom64_registers *regs;
1197         struct property *rprop;
1198         u32 high_bits, low_bits, type;
1199
1200         rprop = of_find_property(dp, "reg", NULL);
1201         if (!rprop)
1202                 return;
1203
1204         regs = rprop->value;
1205         if (!is_root_node(dp->parent)) {
1206                 sprintf(tmp_buf, "%s@%x,%x",
1207                         dp->name,
1208                         (unsigned int) (regs->phys_addr >> 32UL),
1209                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1210                 return;
1211         }
1212
1213         type = regs->phys_addr >> 60UL;
1214         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1215         low_bits = (regs->phys_addr & 0xffffffffUL);
1216
1217         if (type == 0 || type == 8) {
1218                 const char *prefix = (type == 0) ? "m" : "i";
1219
1220                 if (low_bits)
1221                         sprintf(tmp_buf, "%s@%s%x,%x",
1222                                 dp->name, prefix,
1223                                 high_bits, low_bits);
1224                 else
1225                         sprintf(tmp_buf, "%s@%s%x",
1226                                 dp->name,
1227                                 prefix,
1228                                 high_bits);
1229         } else if (type == 12) {
1230                 sprintf(tmp_buf, "%s@%x",
1231                         dp->name, high_bits);
1232         }
1233 }
1234
1235 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1236 {
1237         struct linux_prom64_registers *regs;
1238         struct property *prop;
1239
1240         prop = of_find_property(dp, "reg", NULL);
1241         if (!prop)
1242                 return;
1243
1244         regs = prop->value;
1245         if (!is_root_node(dp->parent)) {
1246                 sprintf(tmp_buf, "%s@%x,%x",
1247                         dp->name,
1248                         (unsigned int) (regs->phys_addr >> 32UL),
1249                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1250                 return;
1251         }
1252
1253         prop = of_find_property(dp, "upa-portid", NULL);
1254         if (!prop)
1255                 prop = of_find_property(dp, "portid", NULL);
1256         if (prop) {
1257                 unsigned long mask = 0xffffffffUL;
1258
1259                 if (tlb_type >= cheetah)
1260                         mask = 0x7fffff;
1261
1262                 sprintf(tmp_buf, "%s@%x,%x",
1263                         dp->name,
1264                         *(u32 *)prop->value,
1265                         (unsigned int) (regs->phys_addr & mask));
1266         }
1267 }
1268
1269 /* "name@slot,offset"  */
1270 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1271 {
1272         struct linux_prom_registers *regs;
1273         struct property *prop;
1274
1275         prop = of_find_property(dp, "reg", NULL);
1276         if (!prop)
1277                 return;
1278
1279         regs = prop->value;
1280         sprintf(tmp_buf, "%s@%x,%x",
1281                 dp->name,
1282                 regs->which_io,
1283                 regs->phys_addr);
1284 }
1285
1286 /* "name@devnum[,func]" */
1287 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1288 {
1289         struct linux_prom_pci_registers *regs;
1290         struct property *prop;
1291         unsigned int devfn;
1292
1293         prop = of_find_property(dp, "reg", NULL);
1294         if (!prop)
1295                 return;
1296
1297         regs = prop->value;
1298         devfn = (regs->phys_hi >> 8) & 0xff;
1299         if (devfn & 0x07) {
1300                 sprintf(tmp_buf, "%s@%x,%x",
1301                         dp->name,
1302                         devfn >> 3,
1303                         devfn & 0x07);
1304         } else {
1305                 sprintf(tmp_buf, "%s@%x",
1306                         dp->name,
1307                         devfn >> 3);
1308         }
1309 }
1310
1311 /* "name@UPA_PORTID,offset" */
1312 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1313 {
1314         struct linux_prom64_registers *regs;
1315         struct property *prop;
1316
1317         prop = of_find_property(dp, "reg", NULL);
1318         if (!prop)
1319                 return;
1320
1321         regs = prop->value;
1322
1323         prop = of_find_property(dp, "upa-portid", NULL);
1324         if (!prop)
1325                 return;
1326
1327         sprintf(tmp_buf, "%s@%x,%x",
1328                 dp->name,
1329                 *(u32 *) prop->value,
1330                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1331 }
1332
1333 /* "name@reg" */
1334 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1335 {
1336         struct property *prop;
1337         u32 *regs;
1338
1339         prop = of_find_property(dp, "reg", NULL);
1340         if (!prop)
1341                 return;
1342
1343         regs = prop->value;
1344
1345         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1346 }
1347
1348 /* "name@addrhi,addrlo" */
1349 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1350 {
1351         struct linux_prom64_registers *regs;
1352         struct property *prop;
1353
1354         prop = of_find_property(dp, "reg", NULL);
1355         if (!prop)
1356                 return;
1357
1358         regs = prop->value;
1359
1360         sprintf(tmp_buf, "%s@%x,%x",
1361                 dp->name,
1362                 (unsigned int) (regs->phys_addr >> 32UL),
1363                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1364 }
1365
1366 /* "name@bus,addr" */
1367 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1368 {
1369         struct property *prop;
1370         u32 *regs;
1371
1372         prop = of_find_property(dp, "reg", NULL);
1373         if (!prop)
1374                 return;
1375
1376         regs = prop->value;
1377
1378         /* This actually isn't right... should look at the #address-cells
1379          * property of the i2c bus node etc. etc.
1380          */
1381         sprintf(tmp_buf, "%s@%x,%x",
1382                 dp->name, regs[0], regs[1]);
1383 }
1384
1385 /* "name@reg0[,reg1]" */
1386 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1387 {
1388         struct property *prop;
1389         u32 *regs;
1390
1391         prop = of_find_property(dp, "reg", NULL);
1392         if (!prop)
1393                 return;
1394
1395         regs = prop->value;
1396
1397         if (prop->length == sizeof(u32) || regs[1] == 1) {
1398                 sprintf(tmp_buf, "%s@%x",
1399                         dp->name, regs[0]);
1400         } else {
1401                 sprintf(tmp_buf, "%s@%x,%x",
1402                         dp->name, regs[0], regs[1]);
1403         }
1404 }
1405
1406 /* "name@reg0reg1[,reg2reg3]" */
1407 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1408 {
1409         struct property *prop;
1410         u32 *regs;
1411
1412         prop = of_find_property(dp, "reg", NULL);
1413         if (!prop)
1414                 return;
1415
1416         regs = prop->value;
1417
1418         if (regs[2] || regs[3]) {
1419                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1420                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1421         } else {
1422                 sprintf(tmp_buf, "%s@%08x%08x",
1423                         dp->name, regs[0], regs[1]);
1424         }
1425 }
1426
1427 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1428 {
1429         struct device_node *parent = dp->parent;
1430
1431         if (parent != NULL) {
1432                 if (!strcmp(parent->type, "pci") ||
1433                     !strcmp(parent->type, "pciex"))
1434                         return pci_path_component(dp, tmp_buf);
1435                 if (!strcmp(parent->type, "sbus"))
1436                         return sbus_path_component(dp, tmp_buf);
1437                 if (!strcmp(parent->type, "upa"))
1438                         return upa_path_component(dp, tmp_buf);
1439                 if (!strcmp(parent->type, "ebus"))
1440                         return ebus_path_component(dp, tmp_buf);
1441                 if (!strcmp(parent->name, "usb") ||
1442                     !strcmp(parent->name, "hub"))
1443                         return usb_path_component(dp, tmp_buf);
1444                 if (!strcmp(parent->type, "i2c"))
1445                         return i2c_path_component(dp, tmp_buf);
1446                 if (!strcmp(parent->type, "firewire"))
1447                         return ieee1394_path_component(dp, tmp_buf);
1448                 if (!strcmp(parent->type, "virtual-devices"))
1449                         return vdev_path_component(dp, tmp_buf);
1450
1451                 /* "isa" is handled with platform naming */
1452         }
1453
1454         /* Use platform naming convention.  */
1455         if (tlb_type == hypervisor)
1456                 return sun4v_path_component(dp, tmp_buf);
1457         else
1458                 return sun4u_path_component(dp, tmp_buf);
1459 }
1460
1461 static char * __init build_path_component(struct device_node *dp)
1462 {
1463         char tmp_buf[64], *n;
1464
1465         tmp_buf[0] = '\0';
1466         __build_path_component(dp, tmp_buf);
1467         if (tmp_buf[0] == '\0')
1468                 strcpy(tmp_buf, dp->name);
1469
1470         n = prom_early_alloc(strlen(tmp_buf) + 1);
1471         strcpy(n, tmp_buf);
1472
1473         return n;
1474 }
1475
1476 static char * __init build_full_name(struct device_node *dp)
1477 {
1478         int len, ourlen, plen;
1479         char *n;
1480
1481         plen = strlen(dp->parent->full_name);
1482         ourlen = strlen(dp->path_component_name);
1483         len = ourlen + plen + 2;
1484
1485         n = prom_early_alloc(len);
1486         strcpy(n, dp->parent->full_name);
1487         if (!is_root_node(dp->parent)) {
1488                 strcpy(n + plen, "/");
1489                 plen++;
1490         }
1491         strcpy(n + plen, dp->path_component_name);
1492
1493         return n;
1494 }
1495
1496 static unsigned int unique_id;
1497
1498 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1499 {
1500         static struct property *tmp = NULL;
1501         struct property *p;
1502
1503         if (tmp) {
1504                 p = tmp;
1505                 memset(p, 0, sizeof(*p) + 32);
1506                 tmp = NULL;
1507         } else {
1508                 p = prom_early_alloc(sizeof(struct property) + 32);
1509                 p->unique_id = unique_id++;
1510         }
1511
1512         p->name = (char *) (p + 1);
1513         if (special_name) {
1514                 strcpy(p->name, special_name);
1515                 p->length = special_len;
1516                 p->value = prom_early_alloc(special_len);
1517                 memcpy(p->value, special_val, special_len);
1518         } else {
1519                 if (prev == NULL) {
1520                         prom_firstprop(node, p->name);
1521                 } else {
1522                         prom_nextprop(node, prev, p->name);
1523                 }
1524                 if (strlen(p->name) == 0) {
1525                         tmp = p;
1526                         return NULL;
1527                 }
1528                 p->length = prom_getproplen(node, p->name);
1529                 if (p->length <= 0) {
1530                         p->length = 0;
1531                 } else {
1532                         p->value = prom_early_alloc(p->length + 1);
1533                         prom_getproperty(node, p->name, p->value, p->length);
1534                         ((unsigned char *)p->value)[p->length] = '\0';
1535                 }
1536         }
1537         return p;
1538 }
1539
1540 static struct property * __init build_prop_list(phandle node)
1541 {
1542         struct property *head, *tail;
1543
1544         head = tail = build_one_prop(node, NULL,
1545                                      ".node", &node, sizeof(node));
1546
1547         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1548         tail = tail->next;
1549         while(tail) {
1550                 tail->next = build_one_prop(node, tail->name,
1551                                             NULL, NULL, 0);
1552                 tail = tail->next;
1553         }
1554
1555         return head;
1556 }
1557
1558 static char * __init get_one_property(phandle node, const char *name)
1559 {
1560         char *buf = "<NULL>";
1561         int len;
1562
1563         len = prom_getproplen(node, name);
1564         if (len > 0) {
1565                 buf = prom_early_alloc(len);
1566                 prom_getproperty(node, name, buf, len);
1567         }
1568
1569         return buf;
1570 }
1571
1572 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1573 {
1574         struct device_node *dp;
1575
1576         if (!node)
1577                 return NULL;
1578
1579         dp = prom_early_alloc(sizeof(*dp));
1580         dp->unique_id = unique_id++;
1581         dp->parent = parent;
1582
1583         kref_init(&dp->kref);
1584
1585         dp->name = get_one_property(node, "name");
1586         dp->type = get_one_property(node, "device_type");
1587         dp->node = node;
1588
1589         dp->properties = build_prop_list(node);
1590
1591         irq_trans_init(dp);
1592
1593         return dp;
1594 }
1595
1596 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1597 {
1598         struct device_node *ret = NULL, *prev_sibling = NULL;
1599         struct device_node *dp;
1600
1601         while (1) {
1602                 dp = create_node(node, parent);
1603                 if (!dp)
1604                         break;
1605
1606                 if (prev_sibling)
1607                         prev_sibling->sibling = dp;
1608
1609                 if (!ret)
1610                         ret = dp;
1611                 prev_sibling = dp;
1612
1613                 *(*nextp) = dp;
1614                 *nextp = &dp->allnext;
1615
1616                 dp->path_component_name = build_path_component(dp);
1617                 dp->full_name = build_full_name(dp);
1618
1619                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1620
1621                 node = prom_getsibling(node);
1622         }
1623
1624         return ret;
1625 }
1626
1627 static const char *get_mid_prop(void)
1628 {
1629         return (tlb_type == spitfire ? "upa-portid" : "portid");
1630 }
1631
1632 struct device_node *of_find_node_by_cpuid(int cpuid)
1633 {
1634         struct device_node *dp;
1635         const char *mid_prop = get_mid_prop();
1636
1637         for_each_node_by_type(dp, "cpu") {
1638                 int id = of_getintprop_default(dp, mid_prop, -1);
1639                 const char *this_mid_prop = mid_prop;
1640
1641                 if (id < 0) {
1642                         this_mid_prop = "cpuid";
1643                         id = of_getintprop_default(dp, this_mid_prop, -1);
1644                 }
1645
1646                 if (id < 0) {
1647                         prom_printf("OF: Serious problem, cpu lacks "
1648                                     "%s property", this_mid_prop);
1649                         prom_halt();
1650                 }
1651                 if (cpuid == id)
1652                         return dp;
1653         }
1654         return NULL;
1655 }
1656
1657 static void __init of_fill_in_cpu_data(void)
1658 {
1659         struct device_node *dp;
1660         const char *mid_prop = get_mid_prop();
1661
1662         ncpus_probed = 0;
1663         for_each_node_by_type(dp, "cpu") {
1664                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1665                 const char *this_mid_prop = mid_prop;
1666                 struct device_node *portid_parent;
1667                 int portid = -1;
1668
1669                 portid_parent = NULL;
1670                 if (cpuid < 0) {
1671                         this_mid_prop = "cpuid";
1672                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1673                         if (cpuid >= 0) {
1674                                 int limit = 2;
1675
1676                                 portid_parent = dp;
1677                                 while (limit--) {
1678                                         portid_parent = portid_parent->parent;
1679                                         if (!portid_parent)
1680                                                 break;
1681                                         portid = of_getintprop_default(portid_parent,
1682                                                                        "portid", -1);
1683                                         if (portid >= 0)
1684                                                 break;
1685                                 }
1686                         }
1687                 }
1688
1689                 if (cpuid < 0) {
1690                         prom_printf("OF: Serious problem, cpu lacks "
1691                                     "%s property", this_mid_prop);
1692                         prom_halt();
1693                 }
1694
1695                 ncpus_probed++;
1696
1697 #ifdef CONFIG_SMP
1698                 if (cpuid >= NR_CPUS)
1699                         continue;
1700 #else
1701                 /* On uniprocessor we only want the values for the
1702                  * real physical cpu the kernel booted onto, however
1703                  * cpu_data() only has one entry at index 0.
1704                  */
1705                 if (cpuid != real_hard_smp_processor_id())
1706                         continue;
1707                 cpuid = 0;
1708 #endif
1709
1710                 cpu_data(cpuid).clock_tick =
1711                         of_getintprop_default(dp, "clock-frequency", 0);
1712
1713                 if (portid_parent) {
1714                         cpu_data(cpuid).dcache_size =
1715                                 of_getintprop_default(dp, "l1-dcache-size",
1716                                                       16 * 1024);
1717                         cpu_data(cpuid).dcache_line_size =
1718                                 of_getintprop_default(dp, "l1-dcache-line-size",
1719                                                       32);
1720                         cpu_data(cpuid).icache_size =
1721                                 of_getintprop_default(dp, "l1-icache-size",
1722                                                       8 * 1024);
1723                         cpu_data(cpuid).icache_line_size =
1724                                 of_getintprop_default(dp, "l1-icache-line-size",
1725                                                       32);
1726                         cpu_data(cpuid).ecache_size =
1727                                 of_getintprop_default(dp, "l2-cache-size", 0);
1728                         cpu_data(cpuid).ecache_line_size =
1729                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1730                         if (!cpu_data(cpuid).ecache_size ||
1731                             !cpu_data(cpuid).ecache_line_size) {
1732                                 cpu_data(cpuid).ecache_size =
1733                                         of_getintprop_default(portid_parent,
1734                                                               "l2-cache-size",
1735                                                               (4 * 1024 * 1024));
1736                                 cpu_data(cpuid).ecache_line_size =
1737                                         of_getintprop_default(portid_parent,
1738                                                               "l2-cache-line-size", 64);
1739                         }
1740
1741                         cpu_data(cpuid).core_id = portid + 1;
1742                         cpu_data(cpuid).proc_id = portid;
1743 #ifdef CONFIG_SMP
1744                         sparc64_multi_core = 1;
1745 #endif
1746                 } else {
1747                         cpu_data(cpuid).dcache_size =
1748                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1749                         cpu_data(cpuid).dcache_line_size =
1750                                 of_getintprop_default(dp, "dcache-line-size", 32);
1751
1752                         cpu_data(cpuid).icache_size =
1753                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1754                         cpu_data(cpuid).icache_line_size =
1755                                 of_getintprop_default(dp, "icache-line-size", 32);
1756
1757                         cpu_data(cpuid).ecache_size =
1758                                 of_getintprop_default(dp, "ecache-size",
1759                                                       (4 * 1024 * 1024));
1760                         cpu_data(cpuid).ecache_line_size =
1761                                 of_getintprop_default(dp, "ecache-line-size", 64);
1762
1763                         cpu_data(cpuid).core_id = 0;
1764                         cpu_data(cpuid).proc_id = -1;
1765                 }
1766
1767 #ifdef CONFIG_SMP
1768                 cpu_set(cpuid, cpu_present_map);
1769                 cpu_set(cpuid, cpu_possible_map);
1770 #endif
1771         }
1772
1773         smp_fill_in_sib_core_maps();
1774 }
1775
1776 void __init prom_build_devicetree(void)
1777 {
1778         struct device_node **nextp;
1779
1780         allnodes = create_node(prom_root_node, NULL);
1781         allnodes->path_component_name = "";
1782         allnodes->full_name = "/";
1783
1784         nextp = &allnodes->allnext;
1785         allnodes->child = build_tree(allnodes,
1786                                      prom_getchild(allnodes->node),
1787                                      &nextp);
1788         printk("PROM: Built device tree with %u bytes of memory.\n",
1789                prom_early_allocated);
1790
1791         if (tlb_type != hypervisor)
1792                 of_fill_in_cpu_data();
1793 }