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1 /*
2  * xsave/xrstor support.
3  *
4  * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5  */
6 #include <linux/compat.h>
7 #include <linux/cpu.h>
8
9 #include <asm/fpu/api.h>
10 #include <asm/fpu/internal.h>
11 #include <asm/fpu/signal.h>
12 #include <asm/fpu/regset.h>
13
14 #include <asm/tlbflush.h>
15
16 static const char *xfeature_names[] =
17 {
18         "x87 floating point registers"  ,
19         "SSE registers"                 ,
20         "AVX registers"                 ,
21         "MPX bounds registers"          ,
22         "MPX CSR"                       ,
23         "AVX-512 opmask"                ,
24         "AVX-512 Hi256"                 ,
25         "AVX-512 ZMM_Hi256"             ,
26         "unknown xstate feature"        ,
27 };
28
29 /*
30  * Mask of xstate features supported by the CPU and the kernel:
31  */
32 u64 xfeatures_mask __read_mostly;
33
34 static unsigned int xstate_offsets[XFEATURES_NR_MAX] = { [ 0 ... XFEATURES_NR_MAX - 1] = -1};
35 static unsigned int xstate_sizes[XFEATURES_NR_MAX]   = { [ 0 ... XFEATURES_NR_MAX - 1] = -1};
36 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
37
38 /* The number of supported xfeatures in xfeatures_mask: */
39 static unsigned int xfeatures_nr;
40
41 /*
42  * Return whether the system supports a given xfeature.
43  *
44  * Also return the name of the (most advanced) feature that the caller requested:
45  */
46 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
47 {
48         u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
49
50         if (unlikely(feature_name)) {
51                 long xfeature_idx, max_idx;
52                 u64 xfeatures_print;
53                 /*
54                  * So we use FLS here to be able to print the most advanced
55                  * feature that was requested but is missing. So if a driver
56                  * asks about "XSTATE_SSE | XSTATE_YMM" we'll print the
57                  * missing AVX feature - this is the most informative message
58                  * to users:
59                  */
60                 if (xfeatures_missing)
61                         xfeatures_print = xfeatures_missing;
62                 else
63                         xfeatures_print = xfeatures_needed;
64
65                 xfeature_idx = fls64(xfeatures_print)-1;
66                 max_idx = ARRAY_SIZE(xfeature_names)-1;
67                 xfeature_idx = min(xfeature_idx, max_idx);
68
69                 *feature_name = xfeature_names[xfeature_idx];
70         }
71
72         if (xfeatures_missing)
73                 return 0;
74
75         return 1;
76 }
77 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
78
79 /*
80  * When executing XSAVEOPT (or other optimized XSAVE instructions), if
81  * a processor implementation detects that an FPU state component is still
82  * (or is again) in its initialized state, it may clear the corresponding
83  * bit in the header.xfeatures field, and can skip the writeout of registers
84  * to the corresponding memory layout.
85  *
86  * This means that when the bit is zero, the state component might still contain
87  * some previous - non-initialized register state.
88  *
89  * Before writing xstate information to user-space we sanitize those components,
90  * to always ensure that the memory layout of a feature will be in the init state
91  * if the corresponding header bit is zero. This is to ensure that user-space doesn't
92  * see some stale state in the memory layout during signal handling, debugging etc.
93  */
94 void fpstate_sanitize_xstate(struct fpu *fpu)
95 {
96         struct fxregs_state *fx = &fpu->state.fxsave;
97         int feature_bit;
98         u64 xfeatures;
99
100         if (!use_xsaveopt())
101                 return;
102
103         xfeatures = fpu->state.xsave.header.xfeatures;
104
105         /*
106          * None of the feature bits are in init state. So nothing else
107          * to do for us, as the memory layout is up to date.
108          */
109         if ((xfeatures & xfeatures_mask) == xfeatures_mask)
110                 return;
111
112         /*
113          * FP is in init state
114          */
115         if (!(xfeatures & XSTATE_FP)) {
116                 fx->cwd = 0x37f;
117                 fx->swd = 0;
118                 fx->twd = 0;
119                 fx->fop = 0;
120                 fx->rip = 0;
121                 fx->rdp = 0;
122                 memset(&fx->st_space[0], 0, 128);
123         }
124
125         /*
126          * SSE is in init state
127          */
128         if (!(xfeatures & XSTATE_SSE))
129                 memset(&fx->xmm_space[0], 0, 256);
130
131         /*
132          * First two features are FPU and SSE, which above we handled
133          * in a special way already:
134          */
135         feature_bit = 0x2;
136         xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
137
138         /*
139          * Update all the remaining memory layouts according to their
140          * standard xstate layout, if their header bit is in the init
141          * state:
142          */
143         while (xfeatures) {
144                 if (xfeatures & 0x1) {
145                         int offset = xstate_offsets[feature_bit];
146                         int size = xstate_sizes[feature_bit];
147
148                         memcpy((void *)fx + offset,
149                                (void *)&init_fpstate.xsave + offset,
150                                size);
151                 }
152
153                 xfeatures >>= 1;
154                 feature_bit++;
155         }
156 }
157
158 /*
159  * Enable the extended processor state save/restore feature.
160  * Called once per CPU onlining.
161  */
162 void fpu__init_cpu_xstate(void)
163 {
164         if (!cpu_has_xsave || !xfeatures_mask)
165                 return;
166
167         cr4_set_bits(X86_CR4_OSXSAVE);
168         xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
169 }
170
171 /*
172  * Record the offsets and sizes of various xstates contained
173  * in the XSAVE state memory layout.
174  *
175  * ( Note that certain features might be non-present, for them
176  *   we'll have 0 offset and 0 size. )
177  */
178 static void __init setup_xstate_features(void)
179 {
180         u32 eax, ebx, ecx, edx, leaf;
181
182         xfeatures_nr = fls64(xfeatures_mask);
183
184         for (leaf = 2; leaf < xfeatures_nr; leaf++) {
185                 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
186
187                 xstate_offsets[leaf] = ebx;
188                 xstate_sizes[leaf] = eax;
189
190                 printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", leaf, ebx, leaf, eax);
191         }
192 }
193
194 static void __init print_xstate_feature(u64 xstate_mask)
195 {
196         const char *feature_name;
197
198         if (cpu_has_xfeatures(xstate_mask, &feature_name))
199                 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
200 }
201
202 /*
203  * Print out all the supported xstate features:
204  */
205 static void __init print_xstate_features(void)
206 {
207         print_xstate_feature(XSTATE_FP);
208         print_xstate_feature(XSTATE_SSE);
209         print_xstate_feature(XSTATE_YMM);
210         print_xstate_feature(XSTATE_BNDREGS);
211         print_xstate_feature(XSTATE_BNDCSR);
212         print_xstate_feature(XSTATE_OPMASK);
213         print_xstate_feature(XSTATE_ZMM_Hi256);
214         print_xstate_feature(XSTATE_Hi16_ZMM);
215 }
216
217 /*
218  * This function sets up offsets and sizes of all extended states in
219  * xsave area. This supports both standard format and compacted format
220  * of the xsave aread.
221  */
222 static void __init setup_xstate_comp(void)
223 {
224         unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
225         int i;
226
227         /*
228          * The FP xstates and SSE xstates are legacy states. They are always
229          * in the fixed offsets in the xsave area in either compacted form
230          * or standard form.
231          */
232         xstate_comp_offsets[0] = 0;
233         xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
234
235         if (!cpu_has_xsaves) {
236                 for (i = 2; i < xfeatures_nr; i++) {
237                         if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
238                                 xstate_comp_offsets[i] = xstate_offsets[i];
239                                 xstate_comp_sizes[i] = xstate_sizes[i];
240                         }
241                 }
242                 return;
243         }
244
245         xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;
246
247         for (i = 2; i < xfeatures_nr; i++) {
248                 if (test_bit(i, (unsigned long *)&xfeatures_mask))
249                         xstate_comp_sizes[i] = xstate_sizes[i];
250                 else
251                         xstate_comp_sizes[i] = 0;
252
253                 if (i > 2)
254                         xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
255                                         + xstate_comp_sizes[i-1];
256
257         }
258 }
259
260 /*
261  * setup the xstate image representing the init state
262  */
263 static void __init setup_init_fpu_buf(void)
264 {
265         static int on_boot_cpu = 1;
266
267         WARN_ON_FPU(!on_boot_cpu);
268         on_boot_cpu = 0;
269
270         if (!cpu_has_xsave)
271                 return;
272
273         setup_xstate_features();
274         print_xstate_features();
275
276         if (cpu_has_xsaves) {
277                 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
278                 init_fpstate.xsave.header.xfeatures = xfeatures_mask;
279         }
280
281         /*
282          * Init all the features state with header_bv being 0x0
283          */
284         copy_kernel_to_xregs_booting(&init_fpstate.xsave);
285
286         /*
287          * Dump the init state again. This is to identify the init state
288          * of any feature which is not represented by all zero's.
289          */
290         copy_xregs_to_kernel_booting(&init_fpstate.xsave);
291 }
292
293 /*
294  * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
295  */
296 static void __init init_xstate_size(void)
297 {
298         unsigned int eax, ebx, ecx, edx;
299         int i;
300
301         if (!cpu_has_xsaves) {
302                 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
303                 xstate_size = ebx;
304                 return;
305         }
306
307         xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
308         for (i = 2; i < 64; i++) {
309                 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
310                         cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
311                         xstate_size += eax;
312                 }
313         }
314 }
315
316 /*
317  * Enable and initialize the xsave feature.
318  * Called once per system bootup.
319  */
320 void __init fpu__init_system_xstate(void)
321 {
322         unsigned int eax, ebx, ecx, edx;
323         static int on_boot_cpu = 1;
324
325         WARN_ON_FPU(!on_boot_cpu);
326         on_boot_cpu = 0;
327
328         if (!cpu_has_xsave) {
329                 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
330                 return;
331         }
332
333         if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
334                 WARN_ON_FPU(1);
335                 return;
336         }
337
338         cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
339         xfeatures_mask = eax + ((u64)edx << 32);
340
341         if ((xfeatures_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
342                 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
343                 BUG();
344         }
345
346         /* Support only the state known to the OS: */
347         xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
348
349         /* Enable xstate instructions to be able to continue with initialization: */
350         fpu__init_cpu_xstate();
351
352         /* Recompute the context size for enabled features: */
353         init_xstate_size();
354
355         update_regset_xstate_info(xstate_size, xfeatures_mask);
356         fpu__init_prepare_fx_sw_frame();
357         setup_init_fpu_buf();
358         setup_xstate_comp();
359
360         pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
361                 xfeatures_mask,
362                 xstate_size,
363                 cpu_has_xsaves ? "compacted" : "standard");
364 }
365
366 /*
367  * Restore minimal FPU state after suspend:
368  */
369 void fpu__resume_cpu(void)
370 {
371         /*
372          * Restore XCR0 on xsave capable CPUs:
373          */
374         if (cpu_has_xsave)
375                 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
376 }
377
378 /*
379  * Given the xsave area and a state inside, this function returns the
380  * address of the state.
381  *
382  * This is the API that is called to get xstate address in either
383  * standard format or compacted format of xsave area.
384  *
385  * Note that if there is no data for the field in the xsave buffer
386  * this will return NULL.
387  *
388  * Inputs:
389  *      xstate: the thread's storage area for all FPU data
390  *      xstate_feature: state which is defined in xsave.h (e.g.
391  *      XSTATE_FP, XSTATE_SSE, etc...)
392  * Output:
393  *      address of the state in the xsave area, or NULL if the
394  *      field is not present in the xsave buffer.
395  */
396 void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
397 {
398         int feature_nr = fls64(xstate_feature) - 1;
399         /*
400          * Do we even *have* xsave state?
401          */
402         if (!boot_cpu_has(X86_FEATURE_XSAVE))
403                 return NULL;
404
405         xsave = &current->thread.fpu.state.xsave;
406         /*
407          * We should not ever be requesting features that we
408          * have not enabled.  Remember that pcntxt_mask is
409          * what we write to the XCR0 register.
410          */
411         WARN_ONCE(!(xfeatures_mask & xstate_feature),
412                   "get of unsupported state");
413         /*
414          * This assumes the last 'xsave*' instruction to
415          * have requested that 'xstate_feature' be saved.
416          * If it did not, we might be seeing and old value
417          * of the field in the buffer.
418          *
419          * This can happen because the last 'xsave' did not
420          * request that this feature be saved (unlikely)
421          * or because the "init optimization" caused it
422          * to not be saved.
423          */
424         if (!(xsave->header.xfeatures & xstate_feature))
425                 return NULL;
426
427         return (void *)xsave + xstate_comp_offsets[feature_nr];
428 }
429 EXPORT_SYMBOL_GPL(get_xsave_addr);
430
431 /*
432  * This wraps up the common operations that need to occur when retrieving
433  * data from xsave state.  It first ensures that the current task was
434  * using the FPU and retrieves the data in to a buffer.  It then calculates
435  * the offset of the requested field in the buffer.
436  *
437  * This function is safe to call whether the FPU is in use or not.
438  *
439  * Note that this only works on the current task.
440  *
441  * Inputs:
442  *      @xsave_state: state which is defined in xsave.h (e.g. XSTATE_FP,
443  *      XSTATE_SSE, etc...)
444  * Output:
445  *      address of the state in the xsave area or NULL if the state
446  *      is not present or is in its 'init state'.
447  */
448 const void *get_xsave_field_ptr(int xsave_state)
449 {
450         struct fpu *fpu = &current->thread.fpu;
451
452         if (!fpu->fpstate_active)
453                 return NULL;
454         /*
455          * fpu__save() takes the CPU's xstate registers
456          * and saves them off to the 'fpu memory buffer.
457          */
458         fpu__save(fpu);
459
460         return get_xsave_addr(&fpu->state.xsave, xsave_state);
461 }