arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31
  32 #include <linux/clocksource.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/kvm.h>
  35 #include <linux/fs.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/module.h>
  38 #include <linux/mman.h>
  39 #include <linux/highmem.h>
  40 #include <linux/iommu.h>
  41 #include <linux/intel-iommu.h>
  42 #include <linux/cpufreq.h>
  43 #include <linux/user-return-notifier.h>
  44 #include <linux/srcu.h>
  45 #include <linux/slab.h>
  46 #include <linux/perf_event.h>
  47 #include <linux/uaccess.h>
  48 #include <linux/hash.h>
  49 #include <linux/pci.h>
  50 #include <linux/timekeeper_internal.h>
  51 #include <linux/pvclock_gtod.h>
  52 #include <trace/events/kvm.h>
  53
  54 #define CREATE_TRACE_POINTS
  55 #include "trace.h"
  56
  57 #include <asm/debugreg.h>
  58 #include <asm/msr.h>
  59 #include <asm/desc.h>
  60 #include <asm/mtrr.h>
  61 #include <asm/mce.h>
  62 #include <asm/i387.h>
  63 #include <asm/fpu-internal.h> /* Ugh! */
  64 #include <asm/xcr.h>
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 153         { "hypercalls", VCPU_STAT(hypercalls) },
 154         { "request_irq", VCPU_STAT(request_irq_exits) },
 155         { "irq_exits", VCPU_STAT(irq_exits) },
 156         { "host_state_reload", VCPU_STAT(host_state_reload) },
 157         { "efer_reload", VCPU_STAT(efer_reload) },
 158         { "fpu_reload", VCPU_STAT(fpu_reload) },
 159         { "insn_emulation", VCPU_STAT(insn_emulation) },
 160         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 161         { "irq_injections", VCPU_STAT(irq_injections) },
 162         { "nmi_injections", VCPU_STAT(nmi_injections) },
 163         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 164         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 165         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 166         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 167         { "mmu_flooded", VM_STAT(mmu_flooded) },
 168         { "mmu_recycled", VM_STAT(mmu_recycled) },
 169         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 170         { "mmu_unsync", VM_STAT(mmu_unsync) },
 171         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 172         { "largepages", VM_STAT(lpages) },
 173         { NULL }
 174 };
 175
 176 u64 __read_mostly host_xcr0;
 177
 178 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 179
 180 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 181 {
 182         int i;
 183         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 184                 vcpu->arch.apf.gfns[i] = ~0;
 185 }
 186
 187 static void kvm_on_user_return(struct user_return_notifier *urn)
 188 {
 189         unsigned slot;
 190         struct kvm_shared_msrs *locals
 191                 = container_of(urn, struct kvm_shared_msrs, urn);
 192         struct kvm_shared_msr_values *values;
 193
 194         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 195                 values = &locals->values[slot];
 196                 if (values->host != values->curr) {
 197                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 198                         values->curr = values->host;
 199                 }
 200         }
 201         locals->registered = false;
 202         user_return_notifier_unregister(urn);
 203 }
 204
 205 static void shared_msr_update(unsigned slot, u32 msr)
 206 {
 207         u64 value;
 208         unsigned int cpu = smp_processor_id();
 209         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 210
 211         /* only read, and nobody should modify it at this time,
 212          * so don't need lock */
 213         if (slot >= shared_msrs_global.nr) {
 214                 printk(KERN_ERR "kvm: invalid MSR slot!");
 215                 return;
 216         }
 217         rdmsrl_safe(msr, &value);
 218         smsr->values[slot].host = value;
 219         smsr->values[slot].curr = value;
 220 }
 221
 222 void kvm_define_shared_msr(unsigned slot, u32 msr)
 223 {
 224         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 225         if (slot >= shared_msrs_global.nr)
 226                 shared_msrs_global.nr = slot + 1;
 227         shared_msrs_global.msrs[slot] = msr;
 228         /* we need ensured the shared_msr_global have been updated */
 229         smp_wmb();
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 232
 233 static void kvm_shared_msr_cpu_online(void)
 234 {
 235         unsigned i;
 236
 237         for (i = 0; i < shared_msrs_global.nr; ++i)
 238                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 239 }
 240
 241 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 242 {
 243         unsigned int cpu = smp_processor_id();
 244         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 245         int err;
 246
 247         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 248                 return 0;
 249         smsr->values[slot].curr = value;
 250         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 251         if (err)
 252                 return 1;
 253
 254         if (!smsr->registered) {
 255                 smsr->urn.on_user_return = kvm_on_user_return;
 256                 user_return_notifier_register(&smsr->urn);
 257                 smsr->registered = true;
 258         }
 259         return 0;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 262
 263 static void drop_user_return_notifiers(void)
 264 {
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         if (smsr->registered)
 269                 kvm_on_user_return(&smsr->urn);
 270 }
 271
 272 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 273 {
 274         return vcpu->arch.apic_base;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 277
 278 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 279 {
 280         u64 old_state = vcpu->arch.apic_base &
 281                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 282         u64 new_state = msr_info->data &
 283                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 284         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 285                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 286
 287         if (!msr_info->host_initiated &&
 288             ((msr_info->data & reserved_bits) != 0 ||
 289              new_state == X2APIC_ENABLE ||
 290              (new_state == MSR_IA32_APICBASE_ENABLE &&
 291               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 292              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 293               old_state == 0)))
 294                 return 1;
 295
 296         kvm_lapic_set_base(vcpu, msr_info->data);
 297         return 0;
 298 }
 299 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 300
 301 asmlinkage __visible void kvm_spurious_fault(void)
 302 {
 303         /* Fault while not rebooting.  We want the trace. */
 304         BUG();
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 307
 308 #define EXCPT_BENIGN            0
 309 #define EXCPT_CONTRIBUTORY      1
 310 #define EXCPT_PF                2
 311
 312 static int exception_class(int vector)
 313 {
 314         switch (vector) {
 315         case PF_VECTOR:
 316                 return EXCPT_PF;
 317         case DE_VECTOR:
 318         case TS_VECTOR:
 319         case NP_VECTOR:
 320         case SS_VECTOR:
 321         case GP_VECTOR:
 322                 return EXCPT_CONTRIBUTORY;
 323         default:
 324                 break;
 325         }
 326         return EXCPT_BENIGN;
 327 }
 328
 329 #define EXCPT_FAULT             0
 330 #define EXCPT_TRAP              1
 331 #define EXCPT_ABORT             2
 332 #define EXCPT_INTERRUPT         3
 333
 334 static int exception_type(int vector)
 335 {
 336         unsigned int mask;
 337
 338         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 339                 return EXCPT_INTERRUPT;
 340
 341         mask = 1 << vector;
 342
 343         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 344         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 345                 return EXCPT_TRAP;
 346
 347         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 348                 return EXCPT_ABORT;
 349
 350         /* Reserved exceptions will result in fault */
 351         return EXCPT_FAULT;
 352 }
 353
 354 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 355                 unsigned nr, bool has_error, u32 error_code,
 356                 bool reinject)
 357 {
 358         u32 prev_nr;
 359         int class1, class2;
 360
 361         kvm_make_request(KVM_REQ_EVENT, vcpu);
 362
 363         if (!vcpu->arch.exception.pending) {
 364         queue:
 365                 if (has_error && !is_protmode(vcpu))
 366                         has_error = false;
 367                 vcpu->arch.exception.pending = true;
 368                 vcpu->arch.exception.has_error_code = has_error;
 369                 vcpu->arch.exception.nr = nr;
 370                 vcpu->arch.exception.error_code = error_code;
 371                 vcpu->arch.exception.reinject = reinject;
 372                 return;
 373         }
 374
 375         /* to check exception */
 376         prev_nr = vcpu->arch.exception.nr;
 377         if (prev_nr == DF_VECTOR) {
 378                 /* triple fault -> shutdown */
 379                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 380                 return;
 381         }
 382         class1 = exception_class(prev_nr);
 383         class2 = exception_class(nr);
 384         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 385                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 386                 /* generate double fault per SDM Table 5-5 */
 387                 vcpu->arch.exception.pending = true;
 388                 vcpu->arch.exception.has_error_code = true;
 389                 vcpu->arch.exception.nr = DF_VECTOR;
 390                 vcpu->arch.exception.error_code = 0;
 391         } else
 392                 /* replace previous exception with a new one in a hope
 393                    that instruction re-execution will regenerate lost
 394                    exception */
 395                 goto queue;
 396 }
 397
 398 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 399 {
 400         kvm_multiple_exception(vcpu, nr, false, 0, false);
 401 }
 402 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 403
 404 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 405 {
 406         kvm_multiple_exception(vcpu, nr, false, 0, true);
 407 }
 408 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 409
 410 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 411 {
 412         if (err)
 413                 kvm_inject_gp(vcpu, 0);
 414         else
 415                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 418
 419 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 420 {
 421         ++vcpu->stat.pf_guest;
 422         vcpu->arch.cr2 = fault->address;
 423         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 426
 427 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 428 {
 429         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 430                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 431         else
 432                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 433
 434         return fault->nested_page_fault;
 435 }
 436
 437 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 438 {
 439         atomic_inc(&vcpu->arch.nmi_queued);
 440         kvm_make_request(KVM_REQ_NMI, vcpu);
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 443
 444 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 445 {
 446         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 449
 450 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 451 {
 452         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 455
 456 /*
 457  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 458  * a #GP and return false.
 459  */
 460 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 461 {
 462         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 463                 return true;
 464         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 465         return false;
 466 }
 467 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 468
 469 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 470 {
 471         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 472                 return true;
 473
 474         kvm_queue_exception(vcpu, UD_VECTOR);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_dr);
 478
 479 /*
 480  * This function will be used to read from the physical memory of the currently
 481  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 482  * can read from guest physical or from the guest's guest physical memory.
 483  */
 484 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 485                             gfn_t ngfn, void *data, int offset, int len,
 486                             u32 access)
 487 {
 488         struct x86_exception exception;
 489         gfn_t real_gfn;
 490         gpa_t ngpa;
 491
 492         ngpa     = gfn_to_gpa(ngfn);
 493         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 494         if (real_gfn == UNMAPPED_GVA)
 495                 return -EFAULT;
 496
 497         real_gfn = gpa_to_gfn(real_gfn);
 498
 499         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 500 }
 501 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 502
 503 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 504                                void *data, int offset, int len, u32 access)
 505 {
 506         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 507                                        data, offset, len, access);
 508 }
 509
 510 /*
 511  * Load the pae pdptrs.  Return true is they are all valid.
 512  */
 513 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 514 {
 515         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 516         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 517         int i;
 518         int ret;
 519         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 520
 521         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 522                                       offset * sizeof(u64), sizeof(pdpte),
 523                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 524         if (ret < 0) {
 525                 ret = 0;
 526                 goto out;
 527         }
 528         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 529                 if (is_present_gpte(pdpte[i]) &&
 530                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 531                         ret = 0;
 532                         goto out;
 533                 }
 534         }
 535         ret = 1;
 536
 537         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 538         __set_bit(VCPU_EXREG_PDPTR,
 539                   (unsigned long *)&vcpu->arch.regs_avail);
 540         __set_bit(VCPU_EXREG_PDPTR,
 541                   (unsigned long *)&vcpu->arch.regs_dirty);
 542 out:
 543
 544         return ret;
 545 }
 546 EXPORT_SYMBOL_GPL(load_pdptrs);
 547
 548 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 549 {
 550         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 551         bool changed = true;
 552         int offset;
 553         gfn_t gfn;
 554         int r;
 555
 556         if (is_long_mode(vcpu) || !is_pae(vcpu))
 557                 return false;
 558
 559         if (!test_bit(VCPU_EXREG_PDPTR,
 560                       (unsigned long *)&vcpu->arch.regs_avail))
 561                 return true;
 562
 563         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 564         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 565         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 566                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 567         if (r < 0)
 568                 goto out;
 569         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 570 out:
 571
 572         return changed;
 573 }
 574
 575 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 576 {
 577         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 578         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 579
 580         cr0 |= X86_CR0_ET;
 581
 582 #ifdef CONFIG_X86_64
 583         if (cr0 & 0xffffffff00000000UL)
 584                 return 1;
 585 #endif
 586
 587         cr0 &= ~CR0_RESERVED_BITS;
 588
 589         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 590                 return 1;
 591
 592         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 593                 return 1;
 594
 595         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 596 #ifdef CONFIG_X86_64
 597                 if ((vcpu->arch.efer & EFER_LME)) {
 598                         int cs_db, cs_l;
 599
 600                         if (!is_pae(vcpu))
 601                                 return 1;
 602                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 603                         if (cs_l)
 604                                 return 1;
 605                 } else
 606 #endif
 607                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 608                                                  kvm_read_cr3(vcpu)))
 609                         return 1;
 610         }
 611
 612         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr0(vcpu, cr0);
 616
 617         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 618                 kvm_clear_async_pf_completion_queue(vcpu);
 619                 kvm_async_pf_hash_reset(vcpu);
 620         }
 621
 622         if ((cr0 ^ old_cr0) & update_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624         return 0;
 625 }
 626 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 627
 628 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 629 {
 630         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 631 }
 632 EXPORT_SYMBOL_GPL(kvm_lmsw);
 633
 634 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 635 {
 636         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 637                         !vcpu->guest_xcr0_loaded) {
 638                 /* kvm_set_xcr() also depends on this */
 639                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 640                 vcpu->guest_xcr0_loaded = 1;
 641         }
 642 }
 643
 644 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 645 {
 646         if (vcpu->guest_xcr0_loaded) {
 647                 if (vcpu->arch.xcr0 != host_xcr0)
 648                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 649                 vcpu->guest_xcr0_loaded = 0;
 650         }
 651 }
 652
 653 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 654 {
 655         u64 xcr0 = xcr;
 656         u64 old_xcr0 = vcpu->arch.xcr0;
 657         u64 valid_bits;
 658
 659         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 660         if (index != XCR_XFEATURE_ENABLED_MASK)
 661                 return 1;
 662         if (!(xcr0 & XSTATE_FP))
 663                 return 1;
 664         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 665                 return 1;
 666
 667         /*
 668          * Do not allow the guest to set bits that we do not support
 669          * saving.  However, xcr0 bit 0 is always set, even if the
 670          * emulated CPU does not support XSAVE (see fx_init).
 671          */
 672         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 673         if (xcr0 & ~valid_bits)
 674                 return 1;
 675
 676         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 677                 return 1;
 678
 679         if (xcr0 & XSTATE_AVX512) {
 680                 if (!(xcr0 & XSTATE_YMM))
 681                         return 1;
 682                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 683                         return 1;
 684         }
 685         kvm_put_guest_xcr0(vcpu);
 686         vcpu->arch.xcr0 = xcr0;
 687
 688         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 689                 kvm_update_cpuid(vcpu);
 690         return 0;
 691 }
 692
 693 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 694 {
 695         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 696             __kvm_set_xcr(vcpu, index, xcr)) {
 697                 kvm_inject_gp(vcpu, 0);
 698                 return 1;
 699         }
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 703
 704 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 705 {
 706         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 707         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 708                                    X86_CR4_SMEP | X86_CR4_SMAP;
 709
 710         if (cr4 & CR4_RESERVED_BITS)
 711                 return 1;
 712
 713         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 714                 return 1;
 715
 716         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 717                 return 1;
 718
 719         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 720                 return 1;
 721
 722         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 723                 return 1;
 724
 725         if (is_long_mode(vcpu)) {
 726                 if (!(cr4 & X86_CR4_PAE))
 727                         return 1;
 728         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 729                    && ((cr4 ^ old_cr4) & pdptr_bits)
 730                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 731                                    kvm_read_cr3(vcpu)))
 732                 return 1;
 733
 734         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 735                 if (!guest_cpuid_has_pcid(vcpu))
 736                         return 1;
 737
 738                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 739                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 740                         return 1;
 741         }
 742
 743         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 744                 return 1;
 745
 746         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 747             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 748                 kvm_mmu_reset_context(vcpu);
 749
 750         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 751                 kvm_update_cpuid(vcpu);
 752
 753         return 0;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 756
 757 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 758 {
 759 #ifdef CONFIG_X86_64
 760         cr3 &= ~CR3_PCID_INVD;
 761 #endif
 762
 763         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 764                 kvm_mmu_sync_roots(vcpu);
 765                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 766                 return 0;
 767         }
 768
 769         if (is_long_mode(vcpu)) {
 770                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 771                         return 1;
 772         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 773                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 774                 return 1;
 775
 776         vcpu->arch.cr3 = cr3;
 777         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 778         kvm_mmu_new_cr3(vcpu);
 779         return 0;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 782
 783 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 784 {
 785         if (cr8 & CR8_RESERVED_BITS)
 786                 return 1;
 787         if (irqchip_in_kernel(vcpu->kvm))
 788                 kvm_lapic_set_tpr(vcpu, cr8);
 789         else
 790                 vcpu->arch.cr8 = cr8;
 791         return 0;
 792 }
 793 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 794
 795 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 796 {
 797         if (irqchip_in_kernel(vcpu->kvm))
 798                 return kvm_lapic_get_cr8(vcpu);
 799         else
 800                 return vcpu->arch.cr8;
 801 }
 802 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 803
 804 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 805 {
 806         int i;
 807
 808         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 809                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 810                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 811                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 812         }
 813 }
 814
 815 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 816 {
 817         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 818                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 819 }
 820
 821 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 822 {
 823         unsigned long dr7;
 824
 825         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 826                 dr7 = vcpu->arch.guest_debug_dr7;
 827         else
 828                 dr7 = vcpu->arch.dr7;
 829         kvm_x86_ops->set_dr7(vcpu, dr7);
 830         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 831         if (dr7 & DR7_BP_EN_MASK)
 832                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 833 }
 834
 835 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 836 {
 837         u64 fixed = DR6_FIXED_1;
 838
 839         if (!guest_cpuid_has_rtm(vcpu))
 840                 fixed |= DR6_RTM;
 841         return fixed;
 842 }
 843
 844 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 845 {
 846         switch (dr) {
 847         case 0 ... 3:
 848                 vcpu->arch.db[dr] = val;
 849                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 850                         vcpu->arch.eff_db[dr] = val;
 851                 break;
 852         case 4:
 853                 /* fall through */
 854         case 6:
 855                 if (val & 0xffffffff00000000ULL)
 856                         return -1; /* #GP */
 857                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 858                 kvm_update_dr6(vcpu);
 859                 break;
 860         case 5:
 861                 /* fall through */
 862         default: /* 7 */
 863                 if (val & 0xffffffff00000000ULL)
 864                         return -1; /* #GP */
 865                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 866                 kvm_update_dr7(vcpu);
 867                 break;
 868         }
 869
 870         return 0;
 871 }
 872
 873 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 874 {
 875         if (__kvm_set_dr(vcpu, dr, val)) {
 876                 kvm_inject_gp(vcpu, 0);
 877                 return 1;
 878         }
 879         return 0;
 880 }
 881 EXPORT_SYMBOL_GPL(kvm_set_dr);
 882
 883 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 884 {
 885         switch (dr) {
 886         case 0 ... 3:
 887                 *val = vcpu->arch.db[dr];
 888                 break;
 889         case 4:
 890                 /* fall through */
 891         case 6:
 892                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 893                         *val = vcpu->arch.dr6;
 894                 else
 895                         *val = kvm_x86_ops->get_dr6(vcpu);
 896                 break;
 897         case 5:
 898                 /* fall through */
 899         default: /* 7 */
 900                 *val = vcpu->arch.dr7;
 901                 break;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_get_dr);
 906
 907 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 908 {
 909         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 910         u64 data;
 911         int err;
 912
 913         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 914         if (err)
 915                 return err;
 916         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 917         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 918         return err;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 921
 922 /*
 923  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 924  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 925  *
 926  * This list is modified at module load time to reflect the
 927  * capabilities of the host cpu. This capabilities test skips MSRs that are
 928  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 929  * may depend on host virtualization features rather than host cpu features.
 930  */
 931
 932 static u32 msrs_to_save[] = {
 933         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 934         MSR_STAR,
 935 #ifdef CONFIG_X86_64
 936         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 937 #endif
 938         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 939         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 940 };
 941
 942 static unsigned num_msrs_to_save;
 943
 944 static u32 emulated_msrs[] = {
 945         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 946         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 947         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 948         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 949         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 950         MSR_KVM_PV_EOI_EN,
 951
 952         MSR_IA32_TSC_ADJUST,
 953         MSR_IA32_TSCDEADLINE,
 954         MSR_IA32_MISC_ENABLE,
 955         MSR_IA32_MCG_STATUS,
 956         MSR_IA32_MCG_CTL,
 957         MSR_IA32_SMBASE,
 958 };
 959
 960 static unsigned num_emulated_msrs;
 961
 962 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 963 {
 964         if (efer & efer_reserved_bits)
 965                 return false;
 966
 967         if (efer & EFER_FFXSR) {
 968                 struct kvm_cpuid_entry2 *feat;
 969
 970                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 971                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 972                         return false;
 973         }
 974
 975         if (efer & EFER_SVME) {
 976                 struct kvm_cpuid_entry2 *feat;
 977
 978                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 979                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 980                         return false;
 981         }
 982
 983         return true;
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 986
 987 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 988 {
 989         u64 old_efer = vcpu->arch.efer;
 990
 991         if (!kvm_valid_efer(vcpu, efer))
 992                 return 1;
 993
 994         if (is_paging(vcpu)
 995             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 996                 return 1;
 997
 998         efer &= ~EFER_LMA;
 999         efer |= vcpu->arch.efer & EFER_LMA;
1000
1001         kvm_x86_ops->set_efer(vcpu, efer);
1002
1003         /* Update reserved bits */
1004         if ((efer ^ old_efer) & EFER_NX)
1005                 kvm_mmu_reset_context(vcpu);
1006
1007         return 0;
1008 }
1009
1010 void kvm_enable_efer_bits(u64 mask)
1011 {
1012        efer_reserved_bits &= ~mask;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1015
1016 /*
1017  * Writes msr value into into the appropriate "register".
1018  * Returns 0 on success, non-0 otherwise.
1019  * Assumes vcpu_load() was already called.
1020  */
1021 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1022 {
1023         switch (msr->index) {
1024         case MSR_FS_BASE:
1025         case MSR_GS_BASE:
1026         case MSR_KERNEL_GS_BASE:
1027         case MSR_CSTAR:
1028         case MSR_LSTAR:
1029                 if (is_noncanonical_address(msr->data))
1030                         return 1;
1031                 break;
1032         case MSR_IA32_SYSENTER_EIP:
1033         case MSR_IA32_SYSENTER_ESP:
1034                 /*
1035                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1036                  * non-canonical address is written on Intel but not on
1037                  * AMD (which ignores the top 32-bits, because it does
1038                  * not implement 64-bit SYSENTER).
1039                  *
1040                  * 64-bit code should hence be able to write a non-canonical
1041                  * value on AMD.  Making the address canonical ensures that
1042                  * vmentry does not fail on Intel after writing a non-canonical
1043                  * value, and that something deterministic happens if the guest
1044                  * invokes 64-bit SYSENTER.
1045                  */
1046                 msr->data = get_canonical(msr->data);
1047         }
1048         return kvm_x86_ops->set_msr(vcpu, msr);
1049 }
1050 EXPORT_SYMBOL_GPL(kvm_set_msr);
1051
1052 /*
1053  * Adapt set_msr() to msr_io()'s calling convention
1054  */
1055 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1056 {
1057         struct msr_data msr;
1058         int r;
1059
1060         msr.index = index;
1061         msr.host_initiated = true;
1062         r = kvm_get_msr(vcpu, &msr);
1063         if (r)
1064                 return r;
1065
1066         *data = msr.data;
1067         return 0;
1068 }
1069
1070 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1071 {
1072         struct msr_data msr;
1073
1074         msr.data = *data;
1075         msr.index = index;
1076         msr.host_initiated = true;
1077         return kvm_set_msr(vcpu, &msr);
1078 }
1079
1080 #ifdef CONFIG_X86_64
1081 struct pvclock_gtod_data {
1082         seqcount_t      seq;
1083
1084         struct { /* extract of a clocksource struct */
1085                 int vclock_mode;
1086                 cycle_t cycle_last;
1087                 cycle_t mask;
1088                 u32     mult;
1089                 u32     shift;
1090         } clock;
1091
1092         u64             boot_ns;
1093         u64             nsec_base;
1094 };
1095
1096 static struct pvclock_gtod_data pvclock_gtod_data;
1097
1098 static void update_pvclock_gtod(struct timekeeper *tk)
1099 {
1100         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1101         u64 boot_ns;
1102
1103         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1104
1105         write_seqcount_begin(&vdata->seq);
1106
1107         /* copy pvclock gtod data */
1108         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1109         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1110         vdata->clock.mask               = tk->tkr_mono.mask;
1111         vdata->clock.mult               = tk->tkr_mono.mult;
1112         vdata->clock.shift              = tk->tkr_mono.shift;
1113
1114         vdata->boot_ns                  = boot_ns;
1115         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1116
1117         write_seqcount_end(&vdata->seq);
1118 }
1119 #endif
1120
1121 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1122 {
1123         /*
1124          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1125          * vcpu_enter_guest.  This function is only called from
1126          * the physical CPU that is running vcpu.
1127          */
1128         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1129 }
1130
1131 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1132 {
1133         int version;
1134         int r;
1135         struct pvclock_wall_clock wc;
1136         struct timespec boot;
1137
1138         if (!wall_clock)
1139                 return;
1140
1141         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1142         if (r)
1143                 return;
1144
1145         if (version & 1)
1146                 ++version;  /* first time write, random junk */
1147
1148         ++version;
1149
1150         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1151
1152         /*
1153          * The guest calculates current wall clock time by adding
1154          * system time (updated by kvm_guest_time_update below) to the
1155          * wall clock specified here.  guest system time equals host
1156          * system time for us, thus we must fill in host boot time here.
1157          */
1158         getboottime(&boot);
1159
1160         if (kvm->arch.kvmclock_offset) {
1161                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1162                 boot = timespec_sub(boot, ts);
1163         }
1164         wc.sec = boot.tv_sec;
1165         wc.nsec = boot.tv_nsec;
1166         wc.version = version;
1167
1168         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1169
1170         version++;
1171         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1172 }
1173
1174 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1175 {
1176         uint32_t quotient, remainder;
1177
1178         /* Don't try to replace with do_div(), this one calculates
1179          * "(dividend << 32) / divisor" */
1180         __asm__ ( "divl %4"
1181                   : "=a" (quotient), "=d" (remainder)
1182                   : "0" (0), "1" (dividend), "r" (divisor) );
1183         return quotient;
1184 }
1185
1186 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1187                                s8 *pshift, u32 *pmultiplier)
1188 {
1189         uint64_t scaled64;
1190         int32_t  shift = 0;
1191         uint64_t tps64;
1192         uint32_t tps32;
1193
1194         tps64 = base_khz * 1000LL;
1195         scaled64 = scaled_khz * 1000LL;
1196         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1197                 tps64 >>= 1;
1198                 shift--;
1199         }
1200
1201         tps32 = (uint32_t)tps64;
1202         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1203                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1204                         scaled64 >>= 1;
1205                 else
1206                         tps32 <<= 1;
1207                 shift++;
1208         }
1209
1210         *pshift = shift;
1211         *pmultiplier = div_frac(scaled64, tps32);
1212
1213         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1214                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1215 }
1216
1217 static inline u64 get_kernel_ns(void)
1218 {
1219         return ktime_get_boot_ns();
1220 }
1221
1222 #ifdef CONFIG_X86_64
1223 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1224 #endif
1225
1226 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1227 static unsigned long max_tsc_khz;
1228
1229 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1230 {
1231         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1232                                    vcpu->arch.virtual_tsc_shift);
1233 }
1234
1235 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1236 {
1237         u64 v = (u64)khz * (1000000 + ppm);
1238         do_div(v, 1000000);
1239         return v;
1240 }
1241
1242 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1243 {
1244         u32 thresh_lo, thresh_hi;
1245         int use_scaling = 0;
1246
1247         /* tsc_khz can be zero if TSC calibration fails */
1248         if (this_tsc_khz == 0)
1249                 return;
1250
1251         /* Compute a scale to convert nanoseconds in TSC cycles */
1252         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1253                            &vcpu->arch.virtual_tsc_shift,
1254                            &vcpu->arch.virtual_tsc_mult);
1255         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1256
1257         /*
1258          * Compute the variation in TSC rate which is acceptable
1259          * within the range of tolerance and decide if the
1260          * rate being applied is within that bounds of the hardware
1261          * rate.  If so, no scaling or compensation need be done.
1262          */
1263         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1264         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1265         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1266                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1267                 use_scaling = 1;
1268         }
1269         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1270 }
1271
1272 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1273 {
1274         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1275                                       vcpu->arch.virtual_tsc_mult,
1276                                       vcpu->arch.virtual_tsc_shift);
1277         tsc += vcpu->arch.this_tsc_write;
1278         return tsc;
1279 }
1280
1281 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1282 {
1283 #ifdef CONFIG_X86_64
1284         bool vcpus_matched;
1285         struct kvm_arch *ka = &vcpu->kvm->arch;
1286         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1287
1288         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1289                          atomic_read(&vcpu->kvm->online_vcpus));
1290
1291         /*
1292          * Once the masterclock is enabled, always perform request in
1293          * order to update it.
1294          *
1295          * In order to enable masterclock, the host clocksource must be TSC
1296          * and the vcpus need to have matched TSCs.  When that happens,
1297          * perform request to enable masterclock.
1298          */
1299         if (ka->use_master_clock ||
1300             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1301                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1302
1303         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1304                             atomic_read(&vcpu->kvm->online_vcpus),
1305                             ka->use_master_clock, gtod->clock.vclock_mode);
1306 #endif
1307 }
1308
1309 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1310 {
1311         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1312         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1313 }
1314
1315 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1316 {
1317         struct kvm *kvm = vcpu->kvm;
1318         u64 offset, ns, elapsed;
1319         unsigned long flags;
1320         s64 usdiff;
1321         bool matched;
1322         bool already_matched;
1323         u64 data = msr->data;
1324
1325         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1326         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1327         ns = get_kernel_ns();
1328         elapsed = ns - kvm->arch.last_tsc_nsec;
1329
1330         if (vcpu->arch.virtual_tsc_khz) {
1331                 int faulted = 0;
1332
1333                 /* n.b - signed multiplication and division required */
1334                 usdiff = data - kvm->arch.last_tsc_write;
1335 #ifdef CONFIG_X86_64
1336                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1337 #else
1338                 /* do_div() only does unsigned */
1339                 asm("1: idivl %[divisor]\n"
1340                     "2: xor %%edx, %%edx\n"
1341                     "   movl $0, %[faulted]\n"
1342                     "3:\n"
1343                     ".section .fixup,\"ax\"\n"
1344                     "4: movl $1, %[faulted]\n"
1345                     "   jmp  3b\n"
1346                     ".previous\n"
1347
1348                 _ASM_EXTABLE(1b, 4b)
1349
1350                 : "=A"(usdiff), [faulted] "=r" (faulted)
1351                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1352
1353 #endif
1354                 do_div(elapsed, 1000);
1355                 usdiff -= elapsed;
1356                 if (usdiff < 0)
1357                         usdiff = -usdiff;
1358
1359                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1360                 if (faulted)
1361                         usdiff = USEC_PER_SEC;
1362         } else
1363                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1364
1365         /*
1366          * Special case: TSC write with a small delta (1 second) of virtual
1367          * cycle time against real time is interpreted as an attempt to
1368          * synchronize the CPU.
1369          *
1370          * For a reliable TSC, we can match TSC offsets, and for an unstable
1371          * TSC, we add elapsed time in this computation.  We could let the
1372          * compensation code attempt to catch up if we fall behind, but
1373          * it's better to try to match offsets from the beginning.
1374          */
1375         if (usdiff < USEC_PER_SEC &&
1376             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1377                 if (!check_tsc_unstable()) {
1378                         offset = kvm->arch.cur_tsc_offset;
1379                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1380                 } else {
1381                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1382                         data += delta;
1383                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1384                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1385                 }
1386                 matched = true;
1387                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1388         } else {
1389                 /*
1390                  * We split periods of matched TSC writes into generations.
1391                  * For each generation, we track the original measured
1392                  * nanosecond time, offset, and write, so if TSCs are in
1393                  * sync, we can match exact offset, and if not, we can match
1394                  * exact software computation in compute_guest_tsc()
1395                  *
1396                  * These values are tracked in kvm->arch.cur_xxx variables.
1397                  */
1398                 kvm->arch.cur_tsc_generation++;
1399                 kvm->arch.cur_tsc_nsec = ns;
1400                 kvm->arch.cur_tsc_write = data;
1401                 kvm->arch.cur_tsc_offset = offset;
1402                 matched = false;
1403                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1404                          kvm->arch.cur_tsc_generation, data);
1405         }
1406
1407         /*
1408          * We also track th most recent recorded KHZ, write and time to
1409          * allow the matching interval to be extended at each write.
1410          */
1411         kvm->arch.last_tsc_nsec = ns;
1412         kvm->arch.last_tsc_write = data;
1413         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1414
1415         vcpu->arch.last_guest_tsc = data;
1416
1417         /* Keep track of which generation this VCPU has synchronized to */
1418         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1419         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1420         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1421
1422         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1423                 update_ia32_tsc_adjust_msr(vcpu, offset);
1424         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1425         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1426
1427         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1428         if (!matched) {
1429                 kvm->arch.nr_vcpus_matched_tsc = 0;
1430         } else if (!already_matched) {
1431                 kvm->arch.nr_vcpus_matched_tsc++;
1432         }
1433
1434         kvm_track_tsc_matching(vcpu);
1435         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1436 }
1437
1438 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1439
1440 #ifdef CONFIG_X86_64
1441
1442 static cycle_t read_tsc(void)
1443 {
1444         cycle_t ret;
1445         u64 last;
1446
1447         /*
1448          * Empirically, a fence (of type that depends on the CPU)
1449          * before rdtsc is enough to ensure that rdtsc is ordered
1450          * with respect to loads.  The various CPU manuals are unclear
1451          * as to whether rdtsc can be reordered with later loads,
1452          * but no one has ever seen it happen.
1453          */
1454         rdtsc_barrier();
1455         ret = (cycle_t)vget_cycles();
1456
1457         last = pvclock_gtod_data.clock.cycle_last;
1458
1459         if (likely(ret >= last))
1460                 return ret;
1461
1462         /*
1463          * GCC likes to generate cmov here, but this branch is extremely
1464          * predictable (it's just a funciton of time and the likely is
1465          * very likely) and there's a data dependence, so force GCC
1466          * to generate a branch instead.  I don't barrier() because
1467          * we don't actually need a barrier, and if this function
1468          * ever gets inlined it will generate worse code.
1469          */
1470         asm volatile ("");
1471         return last;
1472 }
1473
1474 static inline u64 vgettsc(cycle_t *cycle_now)
1475 {
1476         long v;
1477         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1478
1479         *cycle_now = read_tsc();
1480
1481         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1482         return v * gtod->clock.mult;
1483 }
1484
1485 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1486 {
1487         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1488         unsigned long seq;
1489         int mode;
1490         u64 ns;
1491
1492         do {
1493                 seq = read_seqcount_begin(&gtod->seq);
1494                 mode = gtod->clock.vclock_mode;
1495                 ns = gtod->nsec_base;
1496                 ns += vgettsc(cycle_now);
1497                 ns >>= gtod->clock.shift;
1498                 ns += gtod->boot_ns;
1499         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1500         *t = ns;
1501
1502         return mode;
1503 }
1504
1505 /* returns true if host is using tsc clocksource */
1506 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1507 {
1508         /* checked again under seqlock below */
1509         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1510                 return false;
1511
1512         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1513 }
1514 #endif
1515
1516 /*
1517  *
1518  * Assuming a stable TSC across physical CPUS, and a stable TSC
1519  * across virtual CPUs, the following condition is possible.
1520  * Each numbered line represents an event visible to both
1521  * CPUs at the next numbered event.
1522  *
1523  * "timespecX" represents host monotonic time. "tscX" represents
1524  * RDTSC value.
1525  *
1526  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1527  *
1528  * 1.  read timespec0,tsc0
1529  * 2.                                   | timespec1 = timespec0 + N
1530  *                                      | tsc1 = tsc0 + M
1531  * 3. transition to guest               | transition to guest
1532  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1533  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1534  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1535  *
1536  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1537  *
1538  *      - ret0 < ret1
1539  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1540  *              ...
1541  *      - 0 < N - M => M < N
1542  *
1543  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1544  * always the case (the difference between two distinct xtime instances
1545  * might be smaller then the difference between corresponding TSC reads,
1546  * when updating guest vcpus pvclock areas).
1547  *
1548  * To avoid that problem, do not allow visibility of distinct
1549  * system_timestamp/tsc_timestamp values simultaneously: use a master
1550  * copy of host monotonic time values. Update that master copy
1551  * in lockstep.
1552  *
1553  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1554  *
1555  */
1556
1557 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1558 {
1559 #ifdef CONFIG_X86_64
1560         struct kvm_arch *ka = &kvm->arch;
1561         int vclock_mode;
1562         bool host_tsc_clocksource, vcpus_matched;
1563
1564         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1565                         atomic_read(&kvm->online_vcpus));
1566
1567         /*
1568          * If the host uses TSC clock, then passthrough TSC as stable
1569          * to the guest.
1570          */
1571         host_tsc_clocksource = kvm_get_time_and_clockread(
1572                                         &ka->master_kernel_ns,
1573                                         &ka->master_cycle_now);
1574
1575         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1576                                 && !backwards_tsc_observed
1577                                 && !ka->boot_vcpu_runs_old_kvmclock;
1578
1579         if (ka->use_master_clock)
1580                 atomic_set(&kvm_guest_has_master_clock, 1);
1581
1582         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1583         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1584                                         vcpus_matched);
1585 #endif
1586 }
1587
1588 static void kvm_gen_update_masterclock(struct kvm *kvm)
1589 {
1590 #ifdef CONFIG_X86_64
1591         int i;
1592         struct kvm_vcpu *vcpu;
1593         struct kvm_arch *ka = &kvm->arch;
1594
1595         spin_lock(&ka->pvclock_gtod_sync_lock);
1596         kvm_make_mclock_inprogress_request(kvm);
1597         /* no guest entries from this point */
1598         pvclock_update_vm_gtod_copy(kvm);
1599
1600         kvm_for_each_vcpu(i, vcpu, kvm)
1601                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1602
1603         /* guest entries allowed */
1604         kvm_for_each_vcpu(i, vcpu, kvm)
1605                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1606
1607         spin_unlock(&ka->pvclock_gtod_sync_lock);
1608 #endif
1609 }
1610
1611 static int kvm_guest_time_update(struct kvm_vcpu *v)
1612 {
1613         unsigned long flags, this_tsc_khz;
1614         struct kvm_vcpu_arch *vcpu = &v->arch;
1615         struct kvm_arch *ka = &v->kvm->arch;
1616         s64 kernel_ns;
1617         u64 tsc_timestamp, host_tsc;
1618         struct pvclock_vcpu_time_info guest_hv_clock;
1619         u8 pvclock_flags;
1620         bool use_master_clock;
1621
1622         kernel_ns = 0;
1623         host_tsc = 0;
1624
1625         /*
1626          * If the host uses TSC clock, then passthrough TSC as stable
1627          * to the guest.
1628          */
1629         spin_lock(&ka->pvclock_gtod_sync_lock);
1630         use_master_clock = ka->use_master_clock;
1631         if (use_master_clock) {
1632                 host_tsc = ka->master_cycle_now;
1633                 kernel_ns = ka->master_kernel_ns;
1634         }
1635         spin_unlock(&ka->pvclock_gtod_sync_lock);
1636
1637         /* Keep irq disabled to prevent changes to the clock */
1638         local_irq_save(flags);
1639         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1640         if (unlikely(this_tsc_khz == 0)) {
1641                 local_irq_restore(flags);
1642                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1643                 return 1;
1644         }
1645         if (!use_master_clock) {
1646                 host_tsc = native_read_tsc();
1647                 kernel_ns = get_kernel_ns();
1648         }
1649
1650         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1651
1652         /*
1653          * We may have to catch up the TSC to match elapsed wall clock
1654          * time for two reasons, even if kvmclock is used.
1655          *   1) CPU could have been running below the maximum TSC rate
1656          *   2) Broken TSC compensation resets the base at each VCPU
1657          *      entry to avoid unknown leaps of TSC even when running
1658          *      again on the same CPU.  This may cause apparent elapsed
1659          *      time to disappear, and the guest to stand still or run
1660          *      very slowly.
1661          */
1662         if (vcpu->tsc_catchup) {
1663                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1664                 if (tsc > tsc_timestamp) {
1665                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1666                         tsc_timestamp = tsc;
1667                 }
1668         }
1669
1670         local_irq_restore(flags);
1671
1672         if (!vcpu->pv_time_enabled)
1673                 return 0;
1674
1675         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1676                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1677                                    &vcpu->hv_clock.tsc_shift,
1678                                    &vcpu->hv_clock.tsc_to_system_mul);
1679                 vcpu->hw_tsc_khz = this_tsc_khz;
1680         }
1681
1682         /* With all the info we got, fill in the values */
1683         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1684         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1685         vcpu->last_guest_tsc = tsc_timestamp;
1686
1687         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1688                 &guest_hv_clock, sizeof(guest_hv_clock))))
1689                 return 0;
1690
1691         /* This VCPU is paused, but it's legal for a guest to read another
1692          * VCPU's kvmclock, so we really have to follow the specification where
1693          * it says that version is odd if data is being modified, and even after
1694          * it is consistent.
1695          *
1696          * Version field updates must be kept separate.  This is because
1697          * kvm_write_guest_cached might use a "rep movs" instruction, and
1698          * writes within a string instruction are weakly ordered.  So there
1699          * are three writes overall.
1700          *
1701          * As a small optimization, only write the version field in the first
1702          * and third write.  The vcpu->pv_time cache is still valid, because the
1703          * version field is the first in the struct.
1704          */
1705         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1706
1707         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1708         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1709                                 &vcpu->hv_clock,
1710                                 sizeof(vcpu->hv_clock.version));
1711
1712         smp_wmb();
1713
1714         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1715         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1716
1717         if (vcpu->pvclock_set_guest_stopped_request) {
1718                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1719                 vcpu->pvclock_set_guest_stopped_request = false;
1720         }
1721
1722         pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;
1723
1724         /* If the host uses TSC clocksource, then it is stable */
1725         if (use_master_clock)
1726                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1727
1728         vcpu->hv_clock.flags = pvclock_flags;
1729
1730         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1731
1732         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1733                                 &vcpu->hv_clock,
1734                                 sizeof(vcpu->hv_clock));
1735
1736         smp_wmb();
1737
1738         vcpu->hv_clock.version++;
1739         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1740                                 &vcpu->hv_clock,
1741                                 sizeof(vcpu->hv_clock.version));
1742         return 0;
1743 }
1744
1745 /*
1746  * kvmclock updates which are isolated to a given vcpu, such as
1747  * vcpu->cpu migration, should not allow system_timestamp from
1748  * the rest of the vcpus to remain static. Otherwise ntp frequency
1749  * correction applies to one vcpu's system_timestamp but not
1750  * the others.
1751  *
1752  * So in those cases, request a kvmclock update for all vcpus.
1753  * We need to rate-limit these requests though, as they can
1754  * considerably slow guests that have a large number of vcpus.
1755  * The time for a remote vcpu to update its kvmclock is bound
1756  * by the delay we use to rate-limit the updates.
1757  */
1758
1759 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1760
1761 static void kvmclock_update_fn(struct work_struct *work)
1762 {
1763         int i;
1764         struct delayed_work *dwork = to_delayed_work(work);
1765         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1766                                            kvmclock_update_work);
1767         struct kvm *kvm = container_of(ka, struct kvm, arch);
1768         struct kvm_vcpu *vcpu;
1769
1770         kvm_for_each_vcpu(i, vcpu, kvm) {
1771                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1772                 kvm_vcpu_kick(vcpu);
1773         }
1774 }
1775
1776 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1777 {
1778         struct kvm *kvm = v->kvm;
1779
1780         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1781         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1782                                         KVMCLOCK_UPDATE_DELAY);
1783 }
1784
1785 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1786
1787 static void kvmclock_sync_fn(struct work_struct *work)
1788 {
1789         struct delayed_work *dwork = to_delayed_work(work);
1790         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1791                                            kvmclock_sync_work);
1792         struct kvm *kvm = container_of(ka, struct kvm, arch);
1793
1794         if (!kvmclock_periodic_sync)
1795                 return;
1796
1797         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1798         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1799                                         KVMCLOCK_SYNC_PERIOD);
1800 }
1801
1802 static bool msr_mtrr_valid(unsigned msr)
1803 {
1804         switch (msr) {
1805         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1806         case MSR_MTRRfix64K_00000:
1807         case MSR_MTRRfix16K_80000:
1808         case MSR_MTRRfix16K_A0000:
1809         case MSR_MTRRfix4K_C0000:
1810         case MSR_MTRRfix4K_C8000:
1811         case MSR_MTRRfix4K_D0000:
1812         case MSR_MTRRfix4K_D8000:
1813         case MSR_MTRRfix4K_E0000:
1814         case MSR_MTRRfix4K_E8000:
1815         case MSR_MTRRfix4K_F0000:
1816         case MSR_MTRRfix4K_F8000:
1817         case MSR_MTRRdefType:
1818         case MSR_IA32_CR_PAT:
1819                 return true;
1820         case 0x2f8:
1821                 return true;
1822         }
1823         return false;
1824 }
1825
1826 static bool valid_pat_type(unsigned t)
1827 {
1828         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1829 }
1830
1831 static bool valid_mtrr_type(unsigned t)
1832 {
1833         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1834 }
1835
1836 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1837 {
1838         int i;
1839         u64 mask;
1840
1841         if (!msr_mtrr_valid(msr))
1842                 return false;
1843
1844         if (msr == MSR_IA32_CR_PAT) {
1845                 for (i = 0; i < 8; i++)
1846                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1847                                 return false;
1848                 return true;
1849         } else if (msr == MSR_MTRRdefType) {
1850                 if (data & ~0xcff)
1851                         return false;
1852                 return valid_mtrr_type(data & 0xff);
1853         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1854                 for (i = 0; i < 8 ; i++)
1855                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1856                                 return false;
1857                 return true;
1858         }
1859
1860         /* variable MTRRs */
1861         WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
1862
1863         mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
1864         if ((msr & 1) == 0) {
1865                 /* MTRR base */
1866                 if (!valid_mtrr_type(data & 0xff))
1867                         return false;
1868                 mask |= 0xf00;
1869         } else
1870                 /* MTRR mask */
1871                 mask |= 0x7ff;
1872         if (data & mask) {
1873                 kvm_inject_gp(vcpu, 0);
1874                 return false;
1875         }
1876
1877         return true;
1878 }
1879 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
1880
1881 static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
1882 {
1883         struct mtrr_state_type *mtrr_state = &vcpu->arch.mtrr_state;
1884         unsigned char mtrr_enabled = mtrr_state->enabled;
1885         gfn_t start, end, mask;
1886         int index;
1887         bool is_fixed = true;
1888
1889         if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
1890               !kvm_arch_has_noncoherent_dma(vcpu->kvm))
1891                 return;
1892
1893         if (!(mtrr_enabled & 0x2) && msr != MSR_MTRRdefType)
1894                 return;
1895
1896         switch (msr) {
1897         case MSR_MTRRfix64K_00000:
1898                 start = 0x0;
1899                 end = 0x80000;
1900                 break;
1901         case MSR_MTRRfix16K_80000:
1902                 start = 0x80000;
1903                 end = 0xa0000;
1904                 break;
1905         case MSR_MTRRfix16K_A0000:
1906                 start = 0xa0000;
1907                 end = 0xc0000;
1908                 break;
1909         case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
1910                 index = msr - MSR_MTRRfix4K_C0000;
1911                 start = 0xc0000 + index * (32 << 10);
1912                 end = start + (32 << 10);
1913                 break;
1914         case MSR_MTRRdefType:
1915                 is_fixed = false;
1916                 start = 0x0;
1917                 end = ~0ULL;
1918                 break;
1919         default:
1920                 /* variable range MTRRs. */
1921                 is_fixed = false;
1922                 index = (msr - 0x200) / 2;
1923                 start = (((u64)mtrr_state->var_ranges[index].base_hi) << 32) +
1924                        (mtrr_state->var_ranges[index].base_lo & PAGE_MASK);
1925                 mask = (((u64)mtrr_state->var_ranges[index].mask_hi) << 32) +
1926                        (mtrr_state->var_ranges[index].mask_lo & PAGE_MASK);
1927                 mask |= ~0ULL << cpuid_maxphyaddr(vcpu);
1928
1929                 end = ((start & mask) | ~mask) + 1;
1930         }
1931
1932         if (is_fixed && !(mtrr_enabled & 0x1))
1933                 return;
1934
1935         kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
1936 }
1937
1938 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1939 {
1940         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1941
1942         if (!kvm_mtrr_valid(vcpu, msr, data))
1943                 return 1;
1944
1945         if (msr == MSR_MTRRdefType) {
1946                 vcpu->arch.mtrr_state.def_type = data;
1947                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1948         } else if (msr == MSR_MTRRfix64K_00000)
1949                 p[0] = data;
1950         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1951                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1952         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1953                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1954         else if (msr == MSR_IA32_CR_PAT)
1955                 vcpu->arch.pat = data;
1956         else {  /* Variable MTRRs */
1957                 int idx, is_mtrr_mask;
1958                 u64 *pt;
1959
1960                 idx = (msr - 0x200) / 2;
1961                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1962                 if (!is_mtrr_mask)
1963                         pt =
1964                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1965                 else
1966                         pt =
1967                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1968                 *pt = data;
1969         }
1970
1971         update_mtrr(vcpu, msr);
1972         return 0;
1973 }
1974
1975 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1976 {
1977         u64 mcg_cap = vcpu->arch.mcg_cap;
1978         unsigned bank_num = mcg_cap & 0xff;
1979
1980         switch (msr) {
1981         case MSR_IA32_MCG_STATUS:
1982                 vcpu->arch.mcg_status = data;
1983                 break;
1984         case MSR_IA32_MCG_CTL:
1985                 if (!(mcg_cap & MCG_CTL_P))
1986                         return 1;
1987                 if (data != 0 && data != ~(u64)0)
1988                         return -1;
1989                 vcpu->arch.mcg_ctl = data;
1990                 break;
1991         default:
1992                 if (msr >= MSR_IA32_MC0_CTL &&
1993                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1994                         u32 offset = msr - MSR_IA32_MC0_CTL;
1995                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1996                          * some Linux kernels though clear bit 10 in bank 4 to
1997                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1998                          * this to avoid an uncatched #GP in the guest
1999                          */
2000                         if ((offset & 0x3) == 0 &&
2001                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2002                                 return -1;
2003                         vcpu->arch.mce_banks[offset] = data;
2004                         break;
2005                 }
2006                 return 1;
2007         }
2008         return 0;
2009 }
2010
2011 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2012 {
2013         struct kvm *kvm = vcpu->kvm;
2014         int lm = is_long_mode(vcpu);
2015         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2016                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2017         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2018                 : kvm->arch.xen_hvm_config.blob_size_32;
2019         u32 page_num = data & ~PAGE_MASK;
2020         u64 page_addr = data & PAGE_MASK;
2021         u8 *page;
2022         int r;
2023
2024         r = -E2BIG;
2025         if (page_num >= blob_size)
2026                 goto out;
2027         r = -ENOMEM;
2028         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2029         if (IS_ERR(page)) {
2030                 r = PTR_ERR(page);
2031                 goto out;
2032         }
2033         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2034                 goto out_free;
2035         r = 0;
2036 out_free:
2037         kfree(page);
2038 out:
2039         return r;
2040 }
2041
2042 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
2043 {
2044         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
2045 }
2046
2047 static bool kvm_hv_msr_partition_wide(u32 msr)
2048 {
2049         bool r = false;
2050         switch (msr) {
2051         case HV_X64_MSR_GUEST_OS_ID:
2052         case HV_X64_MSR_HYPERCALL:
2053         case HV_X64_MSR_REFERENCE_TSC:
2054         case HV_X64_MSR_TIME_REF_COUNT:
2055                 r = true;
2056                 break;
2057         }
2058
2059         return r;
2060 }
2061
2062 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2063 {
2064         struct kvm *kvm = vcpu->kvm;
2065
2066         switch (msr) {
2067         case HV_X64_MSR_GUEST_OS_ID:
2068                 kvm->arch.hv_guest_os_id = data;
2069                 /* setting guest os id to zero disables hypercall page */
2070                 if (!kvm->arch.hv_guest_os_id)
2071                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
2072                 break;
2073         case HV_X64_MSR_HYPERCALL: {
2074                 u64 gfn;
2075                 unsigned long addr;
2076                 u8 instructions[4];
2077
2078                 /* if guest os id is not set hypercall should remain disabled */
2079                 if (!kvm->arch.hv_guest_os_id)
2080                         break;
2081                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
2082                         kvm->arch.hv_hypercall = data;
2083                         break;
2084                 }
2085                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
2086                 addr = gfn_to_hva(kvm, gfn);
2087                 if (kvm_is_error_hva(addr))
2088                         return 1;
2089                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
2090                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
2091                 if (__copy_to_user((void __user *)addr, instructions, 4))
2092                         return 1;
2093                 kvm->arch.hv_hypercall = data;
2094                 mark_page_dirty(kvm, gfn);
2095                 break;
2096         }
2097         case HV_X64_MSR_REFERENCE_TSC: {
2098                 u64 gfn;
2099                 HV_REFERENCE_TSC_PAGE tsc_ref;
2100                 memset(&tsc_ref, 0, sizeof(tsc_ref));
2101                 kvm->arch.hv_tsc_page = data;
2102                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
2103                         break;
2104                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
2105                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
2106                         &tsc_ref, sizeof(tsc_ref)))
2107                         return 1;
2108                 mark_page_dirty(kvm, gfn);
2109                 break;
2110         }
2111         default:
2112                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2113                             "data 0x%llx\n", msr, data);
2114                 return 1;
2115         }
2116         return 0;
2117 }
2118
2119 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2120 {
2121         switch (msr) {
2122         case HV_X64_MSR_APIC_ASSIST_PAGE: {
2123                 u64 gfn;
2124                 unsigned long addr;
2125
2126                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
2127                         vcpu->arch.hv_vapic = data;
2128                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
2129                                 return 1;
2130                         break;
2131                 }
2132                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
2133                 addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
2134                 if (kvm_is_error_hva(addr))
2135                         return 1;
2136                 if (__clear_user((void __user *)addr, PAGE_SIZE))
2137                         return 1;
2138                 vcpu->arch.hv_vapic = data;
2139                 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2140                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
2141                         return 1;
2142                 break;
2143         }
2144         case HV_X64_MSR_EOI:
2145                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
2146         case HV_X64_MSR_ICR:
2147                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
2148         case HV_X64_MSR_TPR:
2149                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
2150         default:
2151                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2152                             "data 0x%llx\n", msr, data);
2153                 return 1;
2154         }
2155
2156         return 0;
2157 }
2158
2159 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2160 {
2161         gpa_t gpa = data & ~0x3f;
2162
2163         /* Bits 2:5 are reserved, Should be zero */
2164         if (data & 0x3c)
2165                 return 1;
2166
2167         vcpu->arch.apf.msr_val = data;
2168
2169         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2170                 kvm_clear_async_pf_completion_queue(vcpu);
2171                 kvm_async_pf_hash_reset(vcpu);
2172                 return 0;
2173         }
2174
2175         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2176                                         sizeof(u32)))
2177                 return 1;
2178
2179         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2180         kvm_async_pf_wakeup_all(vcpu);
2181         return 0;
2182 }
2183
2184 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2185 {
2186         vcpu->arch.pv_time_enabled = false;
2187 }
2188
2189 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2190 {
2191         u64 delta;
2192
2193         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2194                 return;
2195
2196         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2197         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2198         vcpu->arch.st.accum_steal = delta;
2199 }
2200
2201 static void record_steal_time(struct kvm_vcpu *vcpu)
2202 {
2203         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2204                 return;
2205
2206         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2207                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2208                 return;
2209
2210         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2211         vcpu->arch.st.steal.version += 2;
2212         vcpu->arch.st.accum_steal = 0;
2213
2214         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2215                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2216 }
2217
2218 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2219 {
2220         bool pr = false;
2221         u32 msr = msr_info->index;
2222         u64 data = msr_info->data;
2223
2224         switch (msr) {
2225         case MSR_AMD64_NB_CFG:
2226         case MSR_IA32_UCODE_REV:
2227         case MSR_IA32_UCODE_WRITE:
2228         case MSR_VM_HSAVE_PA:
2229         case MSR_AMD64_PATCH_LOADER:
2230         case MSR_AMD64_BU_CFG2:
2231                 break;
2232
2233         case MSR_EFER:
2234                 return set_efer(vcpu, data);
2235         case MSR_K7_HWCR:
2236                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2237                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2238                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2239                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2240                 if (data != 0) {
2241                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2242                                     data);
2243                         return 1;
2244                 }
2245                 break;
2246         case MSR_FAM10H_MMIO_CONF_BASE:
2247                 if (data != 0) {
2248                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2249                                     "0x%llx\n", data);
2250                         return 1;
2251                 }
2252                 break;
2253         case MSR_IA32_DEBUGCTLMSR:
2254                 if (!data) {
2255                         /* We support the non-activated case already */
2256                         break;
2257                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2258                         /* Values other than LBR and BTF are vendor-specific,
2259                            thus reserved and should throw a #GP */
2260                         return 1;
2261                 }
2262                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2263                             __func__, data);
2264                 break;
2265         case 0x200 ... 0x2ff:
2266                 return set_msr_mtrr(vcpu, msr, data);
2267         case MSR_IA32_APICBASE:
2268                 return kvm_set_apic_base(vcpu, msr_info);
2269         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2270                 return kvm_x2apic_msr_write(vcpu, msr, data);
2271         case MSR_IA32_TSCDEADLINE:
2272                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2273                 break;
2274         case MSR_IA32_TSC_ADJUST:
2275                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2276                         if (!msr_info->host_initiated) {
2277                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2278                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2279                         }
2280                         vcpu->arch.ia32_tsc_adjust_msr = data;
2281                 }
2282                 break;
2283         case MSR_IA32_MISC_ENABLE:
2284                 vcpu->arch.ia32_misc_enable_msr = data;
2285                 break;
2286         case MSR_IA32_SMBASE:
2287                 if (!msr_info->host_initiated)
2288                         return 1;
2289                 vcpu->arch.smbase = data;
2290                 break;
2291         case MSR_KVM_WALL_CLOCK_NEW:
2292         case MSR_KVM_WALL_CLOCK:
2293                 vcpu->kvm->arch.wall_clock = data;
2294                 kvm_write_wall_clock(vcpu->kvm, data);
2295                 break;
2296         case MSR_KVM_SYSTEM_TIME_NEW:
2297         case MSR_KVM_SYSTEM_TIME: {
2298                 u64 gpa_offset;
2299                 struct kvm_arch *ka = &vcpu->kvm->arch;
2300
2301                 kvmclock_reset(vcpu);
2302
2303                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2304                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2305
2306                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2307                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2308                                         &vcpu->requests);
2309
2310                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2311
2312                         ka->kvmclock_offset = -get_kernel_ns();
2313                 }
2314
2315                 vcpu->arch.time = data;
2316                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2317
2318                 /* we verify if the enable bit is set... */
2319                 if (!(data & 1))
2320                         break;
2321
2322                 gpa_offset = data & ~(PAGE_MASK | 1);
2323
2324                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2325                      &vcpu->arch.pv_time, data & ~1ULL,
2326                      sizeof(struct pvclock_vcpu_time_info)))
2327                         vcpu->arch.pv_time_enabled = false;
2328                 else
2329                         vcpu->arch.pv_time_enabled = true;
2330
2331                 break;
2332         }
2333         case MSR_KVM_ASYNC_PF_EN:
2334                 if (kvm_pv_enable_async_pf(vcpu, data))
2335                         return 1;
2336                 break;
2337         case MSR_KVM_STEAL_TIME:
2338
2339                 if (unlikely(!sched_info_on()))
2340                         return 1;
2341
2342                 if (data & KVM_STEAL_RESERVED_MASK)
2343                         return 1;
2344
2345                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2346                                                 data & KVM_STEAL_VALID_BITS,
2347                                                 sizeof(struct kvm_steal_time)))
2348                         return 1;
2349
2350                 vcpu->arch.st.msr_val = data;
2351
2352                 if (!(data & KVM_MSR_ENABLED))
2353                         break;
2354
2355                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2356
2357                 preempt_disable();
2358                 accumulate_steal_time(vcpu);
2359                 preempt_enable();
2360
2361                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2362
2363                 break;
2364         case MSR_KVM_PV_EOI_EN:
2365                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2366                         return 1;
2367                 break;
2368
2369         case MSR_IA32_MCG_CTL:
2370         case MSR_IA32_MCG_STATUS:
2371         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2372                 return set_msr_mce(vcpu, msr, data);
2373
2374         /* Performance counters are not protected by a CPUID bit,
2375          * so we should check all of them in the generic path for the sake of
2376          * cross vendor migration.
2377          * Writing a zero into the event select MSRs disables them,
2378          * which we perfectly emulate ;-). Any other value should be at least
2379          * reported, some guests depend on them.
2380          */
2381         case MSR_K7_EVNTSEL0:
2382         case MSR_K7_EVNTSEL1:
2383         case MSR_K7_EVNTSEL2:
2384         case MSR_K7_EVNTSEL3:
2385                 if (data != 0)
2386                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2387                                     "0x%x data 0x%llx\n", msr, data);
2388                 break;
2389         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2390          * so we ignore writes to make it happy.
2391          */
2392         case MSR_K7_PERFCTR0:
2393         case MSR_K7_PERFCTR1:
2394         case MSR_K7_PERFCTR2:
2395         case MSR_K7_PERFCTR3:
2396                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2397                             "0x%x data 0x%llx\n", msr, data);
2398                 break;
2399         case MSR_P6_PERFCTR0:
2400         case MSR_P6_PERFCTR1:
2401                 pr = true;
2402         case MSR_P6_EVNTSEL0:
2403         case MSR_P6_EVNTSEL1:
2404                 if (kvm_pmu_msr(vcpu, msr))
2405                         return kvm_pmu_set_msr(vcpu, msr_info);
2406
2407                 if (pr || data != 0)
2408                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2409                                     "0x%x data 0x%llx\n", msr, data);
2410                 break;
2411         case MSR_K7_CLK_CTL:
2412                 /*
2413                  * Ignore all writes to this no longer documented MSR.
2414                  * Writes are only relevant for old K7 processors,
2415                  * all pre-dating SVM, but a recommended workaround from
2416                  * AMD for these chips. It is possible to specify the
2417                  * affected processor models on the command line, hence
2418                  * the need to ignore the workaround.
2419                  */
2420                 break;
2421         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2422                 if (kvm_hv_msr_partition_wide(msr)) {
2423                         int r;
2424                         mutex_lock(&vcpu->kvm->lock);
2425                         r = set_msr_hyperv_pw(vcpu, msr, data);
2426                         mutex_unlock(&vcpu->kvm->lock);
2427                         return r;
2428                 } else
2429                         return set_msr_hyperv(vcpu, msr, data);
2430                 break;
2431         case MSR_IA32_BBL_CR_CTL3:
2432                 /* Drop writes to this legacy MSR -- see rdmsr
2433                  * counterpart for further detail.
2434                  */
2435                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2436                 break;
2437         case MSR_AMD64_OSVW_ID_LENGTH:
2438                 if (!guest_cpuid_has_osvw(vcpu))
2439                         return 1;
2440                 vcpu->arch.osvw.length = data;
2441                 break;
2442         case MSR_AMD64_OSVW_STATUS:
2443                 if (!guest_cpuid_has_osvw(vcpu))
2444                         return 1;
2445                 vcpu->arch.osvw.status = data;
2446                 break;
2447         default:
2448                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2449                         return xen_hvm_config(vcpu, data);
2450                 if (kvm_pmu_msr(vcpu, msr))
2451                         return kvm_pmu_set_msr(vcpu, msr_info);
2452                 if (!ignore_msrs) {
2453                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2454                                     msr, data);
2455                         return 1;
2456                 } else {
2457                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2458                                     msr, data);
2459                         break;
2460                 }
2461         }
2462         return 0;
2463 }
2464 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2465
2466
2467 /*
2468  * Reads an msr value (of 'msr_index') into 'pdata'.
2469  * Returns 0 on success, non-0 otherwise.
2470  * Assumes vcpu_load() was already called.
2471  */
2472 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2473 {
2474         return kvm_x86_ops->get_msr(vcpu, msr);
2475 }
2476 EXPORT_SYMBOL_GPL(kvm_get_msr);
2477
2478 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2479 {
2480         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2481
2482         if (!msr_mtrr_valid(msr))
2483                 return 1;
2484
2485         if (msr == MSR_MTRRdefType)
2486                 *pdata = vcpu->arch.mtrr_state.def_type +
2487                          (vcpu->arch.mtrr_state.enabled << 10);
2488         else if (msr == MSR_MTRRfix64K_00000)
2489                 *pdata = p[0];
2490         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2491                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2492         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2493                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2494         else if (msr == MSR_IA32_CR_PAT)
2495                 *pdata = vcpu->arch.pat;
2496         else {  /* Variable MTRRs */
2497                 int idx, is_mtrr_mask;
2498                 u64 *pt;
2499
2500                 idx = (msr - 0x200) / 2;
2501                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2502                 if (!is_mtrr_mask)
2503                         pt =
2504                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2505                 else
2506                         pt =
2507                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2508                 *pdata = *pt;
2509         }
2510
2511         return 0;
2512 }
2513
2514 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2515 {
2516         u64 data;
2517         u64 mcg_cap = vcpu->arch.mcg_cap;
2518         unsigned bank_num = mcg_cap & 0xff;
2519
2520         switch (msr) {
2521         case MSR_IA32_P5_MC_ADDR:
2522         case MSR_IA32_P5_MC_TYPE:
2523                 data = 0;
2524                 break;
2525         case MSR_IA32_MCG_CAP:
2526                 data = vcpu->arch.mcg_cap;
2527                 break;
2528         case MSR_IA32_MCG_CTL:
2529                 if (!(mcg_cap & MCG_CTL_P))
2530                         return 1;
2531                 data = vcpu->arch.mcg_ctl;
2532                 break;
2533         case MSR_IA32_MCG_STATUS:
2534                 data = vcpu->arch.mcg_status;
2535                 break;
2536         default:
2537                 if (msr >= MSR_IA32_MC0_CTL &&
2538                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2539                         u32 offset = msr - MSR_IA32_MC0_CTL;
2540                         data = vcpu->arch.mce_banks[offset];
2541                         break;
2542                 }
2543                 return 1;
2544         }
2545         *pdata = data;
2546         return 0;
2547 }
2548
2549 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2550 {
2551         u64 data = 0;
2552         struct kvm *kvm = vcpu->kvm;
2553
2554         switch (msr) {
2555         case HV_X64_MSR_GUEST_OS_ID:
2556                 data = kvm->arch.hv_guest_os_id;
2557                 break;
2558         case HV_X64_MSR_HYPERCALL:
2559                 data = kvm->arch.hv_hypercall;
2560                 break;
2561         case HV_X64_MSR_TIME_REF_COUNT: {
2562                 data =
2563                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2564                 break;
2565         }
2566         case HV_X64_MSR_REFERENCE_TSC:
2567                 data = kvm->arch.hv_tsc_page;
2568                 break;
2569         default:
2570                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2571                 return 1;
2572         }
2573
2574         *pdata = data;
2575         return 0;
2576 }
2577
2578 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2579 {
2580         u64 data = 0;
2581
2582         switch (msr) {
2583         case HV_X64_MSR_VP_INDEX: {
2584                 int r;
2585                 struct kvm_vcpu *v;
2586                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2587                         if (v == vcpu) {
2588                                 data = r;
2589                                 break;
2590                         }
2591                 }
2592                 break;
2593         }
2594         case HV_X64_MSR_EOI:
2595                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2596         case HV_X64_MSR_ICR:
2597                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2598         case HV_X64_MSR_TPR:
2599                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2600         case HV_X64_MSR_APIC_ASSIST_PAGE:
2601                 data = vcpu->arch.hv_vapic;
2602                 break;
2603         default:
2604                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2605                 return 1;
2606         }
2607         *pdata = data;
2608         return 0;
2609 }
2610
2611 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2612 {
2613         u64 data;
2614
2615         switch (msr_info->index) {
2616         case MSR_IA32_PLATFORM_ID:
2617         case MSR_IA32_EBL_CR_POWERON:
2618         case MSR_IA32_DEBUGCTLMSR:
2619         case MSR_IA32_LASTBRANCHFROMIP:
2620         case MSR_IA32_LASTBRANCHTOIP:
2621         case MSR_IA32_LASTINTFROMIP:
2622         case MSR_IA32_LASTINTTOIP:
2623         case MSR_K8_SYSCFG:
2624         case MSR_K7_HWCR:
2625         case MSR_VM_HSAVE_PA:
2626         case MSR_K7_EVNTSEL0:
2627         case MSR_K7_EVNTSEL1:
2628         case MSR_K7_EVNTSEL2:
2629         case MSR_K7_EVNTSEL3:
2630         case MSR_K7_PERFCTR0:
2631         case MSR_K7_PERFCTR1:
2632         case MSR_K7_PERFCTR2:
2633         case MSR_K7_PERFCTR3:
2634         case MSR_K8_INT_PENDING_MSG:
2635         case MSR_AMD64_NB_CFG:
2636         case MSR_FAM10H_MMIO_CONF_BASE:
2637         case MSR_AMD64_BU_CFG2:
2638                 msr_info->data = 0;
2639                 break;
2640         case MSR_P6_PERFCTR0:
2641         case MSR_P6_PERFCTR1:
2642         case MSR_P6_EVNTSEL0:
2643         case MSR_P6_EVNTSEL1:
2644                 if (kvm_pmu_msr(vcpu, msr_info->index))
2645                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2646                 msr_info->data = 0;
2647                 break;
2648         case MSR_IA32_UCODE_REV:
2649                 msr_info->data = 0x100000000ULL;
2650                 break;
2651         case MSR_MTRRcap:
2652                 msr_info->data = 0x500 | KVM_NR_VAR_MTRR;
2653                 break;
2654         case 0x200 ... 0x2ff:
2655                 return get_msr_mtrr(vcpu, msr_info->index, &msr_info->data);
2656         case 0xcd: /* fsb frequency */
2657                 msr_info->data = 3;
2658                 break;
2659                 /*
2660                  * MSR_EBC_FREQUENCY_ID
2661                  * Conservative value valid for even the basic CPU models.
2662                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2663                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2664                  * and 266MHz for model 3, or 4. Set Core Clock
2665                  * Frequency to System Bus Frequency Ratio to 1 (bits
2666                  * 31:24) even though these are only valid for CPU
2667                  * models > 2, however guests may end up dividing or
2668                  * multiplying by zero otherwise.
2669                  */
2670         case MSR_EBC_FREQUENCY_ID:
2671                 msr_info->data = 1 << 24;
2672                 break;
2673         case MSR_IA32_APICBASE:
2674                 msr_info->data = kvm_get_apic_base(vcpu);
2675                 break;
2676         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2677                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2678                 break;
2679         case MSR_IA32_TSCDEADLINE:
2680                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2681                 break;
2682         case MSR_IA32_TSC_ADJUST:
2683                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2684                 break;
2685         case MSR_IA32_MISC_ENABLE:
2686                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2687                 break;
2688         case MSR_IA32_SMBASE:
2689                 if (!msr_info->host_initiated)
2690                         return 1;
2691                 msr_info->data = vcpu->arch.smbase;
2692                 break;
2693         case MSR_IA32_PERF_STATUS:
2694                 /* TSC increment by tick */
2695                 msr_info->data = 1000ULL;
2696                 /* CPU multiplier */
2697                 data |= (((uint64_t)4ULL) << 40);
2698                 break;
2699         case MSR_EFER:
2700                 msr_info->data = vcpu->arch.efer;
2701                 break;
2702         case MSR_KVM_WALL_CLOCK:
2703         case MSR_KVM_WALL_CLOCK_NEW:
2704                 msr_info->data = vcpu->kvm->arch.wall_clock;
2705                 break;
2706         case MSR_KVM_SYSTEM_TIME:
2707         case MSR_KVM_SYSTEM_TIME_NEW:
2708                 msr_info->data = vcpu->arch.time;
2709                 break;
2710         case MSR_KVM_ASYNC_PF_EN:
2711                 msr_info->data = vcpu->arch.apf.msr_val;
2712                 break;
2713         case MSR_KVM_STEAL_TIME:
2714                 msr_info->data = vcpu->arch.st.msr_val;
2715                 break;
2716         case MSR_KVM_PV_EOI_EN:
2717                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2718                 break;
2719         case MSR_IA32_P5_MC_ADDR:
2720         case MSR_IA32_P5_MC_TYPE:
2721         case MSR_IA32_MCG_CAP:
2722         case MSR_IA32_MCG_CTL:
2723         case MSR_IA32_MCG_STATUS:
2724         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2725                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2726         case MSR_K7_CLK_CTL:
2727                 /*
2728                  * Provide expected ramp-up count for K7. All other
2729                  * are set to zero, indicating minimum divisors for
2730                  * every field.
2731                  *
2732                  * This prevents guest kernels on AMD host with CPU
2733                  * type 6, model 8 and higher from exploding due to
2734                  * the rdmsr failing.
2735                  */
2736                 msr_info->data = 0x20000000;
2737                 break;
2738         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2739                 if (kvm_hv_msr_partition_wide(msr_info->index)) {
2740                         int r;
2741                         mutex_lock(&vcpu->kvm->lock);
2742                         r = get_msr_hyperv_pw(vcpu, msr_info->index, &msr_info->data);
2743                         mutex_unlock(&vcpu->kvm->lock);
2744                         return r;
2745                 } else
2746                         return get_msr_hyperv(vcpu, msr_info->index, &msr_info->data);
2747                 break;
2748         case MSR_IA32_BBL_CR_CTL3:
2749                 /* This legacy MSR exists but isn't fully documented in current
2750                  * silicon.  It is however accessed by winxp in very narrow
2751                  * scenarios where it sets bit #19, itself documented as
2752                  * a "reserved" bit.  Best effort attempt to source coherent
2753                  * read data here should the balance of the register be
2754                  * interpreted by the guest:
2755                  *
2756                  * L2 cache control register 3: 64GB range, 256KB size,
2757                  * enabled, latency 0x1, configured
2758                  */
2759                 msr_info->data = 0xbe702111;
2760                 break;
2761         case MSR_AMD64_OSVW_ID_LENGTH:
2762                 if (!guest_cpuid_has_osvw(vcpu))
2763                         return 1;
2764                 msr_info->data = vcpu->arch.osvw.length;
2765                 break;
2766         case MSR_AMD64_OSVW_STATUS:
2767                 if (!guest_cpuid_has_osvw(vcpu))
2768                         return 1;
2769                 msr_info->data = vcpu->arch.osvw.status;
2770                 break;
2771         default:
2772                 if (kvm_pmu_msr(vcpu, msr_info->index))
2773                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2774                 if (!ignore_msrs) {
2775                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2776                         return 1;
2777                 } else {
2778                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2779                         msr_info->data = 0;
2780                 }
2781                 break;
2782         }
2783         return 0;
2784 }
2785 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2786
2787 /*
2788  * Read or write a bunch of msrs. All parameters are kernel addresses.
2789  *
2790  * @return number of msrs set successfully.
2791  */
2792 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2793                     struct kvm_msr_entry *entries,
2794                     int (*do_msr)(struct kvm_vcpu *vcpu,
2795                                   unsigned index, u64 *data))
2796 {
2797         int i, idx;
2798
2799         idx = srcu_read_lock(&vcpu->kvm->srcu);
2800         for (i = 0; i < msrs->nmsrs; ++i)
2801                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2802                         break;
2803         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2804
2805         return i;
2806 }
2807
2808 /*
2809  * Read or write a bunch of msrs. Parameters are user addresses.
2810  *
2811  * @return number of msrs set successfully.
2812  */
2813 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2814                   int (*do_msr)(struct kvm_vcpu *vcpu,
2815                                 unsigned index, u64 *data),
2816                   int writeback)
2817 {
2818         struct kvm_msrs msrs;
2819         struct kvm_msr_entry *entries;
2820         int r, n;
2821         unsigned size;
2822
2823         r = -EFAULT;
2824         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2825                 goto out;
2826
2827         r = -E2BIG;
2828         if (msrs.nmsrs >= MAX_IO_MSRS)
2829                 goto out;
2830
2831         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2832         entries = memdup_user(user_msrs->entries, size);
2833         if (IS_ERR(entries)) {
2834                 r = PTR_ERR(entries);
2835                 goto out;
2836         }
2837
2838         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2839         if (r < 0)
2840                 goto out_free;
2841
2842         r = -EFAULT;
2843         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2844                 goto out_free;
2845
2846         r = n;
2847
2848 out_free:
2849         kfree(entries);
2850 out:
2851         return r;
2852 }
2853
2854 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2855 {
2856         int r;
2857
2858         switch (ext) {
2859         case KVM_CAP_IRQCHIP:
2860         case KVM_CAP_HLT:
2861         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2862         case KVM_CAP_SET_TSS_ADDR:
2863         case KVM_CAP_EXT_CPUID:
2864         case KVM_CAP_EXT_EMUL_CPUID:
2865         case KVM_CAP_CLOCKSOURCE:
2866         case KVM_CAP_PIT:
2867         case KVM_CAP_NOP_IO_DELAY:
2868         case KVM_CAP_MP_STATE:
2869         case KVM_CAP_SYNC_MMU:
2870         case KVM_CAP_USER_NMI:
2871         case KVM_CAP_REINJECT_CONTROL:
2872         case KVM_CAP_IRQ_INJECT_STATUS:
2873         case KVM_CAP_IOEVENTFD:
2874         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2875         case KVM_CAP_PIT2:
2876         case KVM_CAP_PIT_STATE2:
2877         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2878         case KVM_CAP_XEN_HVM:
2879         case KVM_CAP_ADJUST_CLOCK:
2880         case KVM_CAP_VCPU_EVENTS:
2881         case KVM_CAP_HYPERV:
2882         case KVM_CAP_HYPERV_VAPIC:
2883         case KVM_CAP_HYPERV_SPIN:
2884         case KVM_CAP_PCI_SEGMENT:
2885         case KVM_CAP_DEBUGREGS:
2886         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2887         case KVM_CAP_XSAVE:
2888         case KVM_CAP_ASYNC_PF:
2889         case KVM_CAP_GET_TSC_KHZ:
2890         case KVM_CAP_KVMCLOCK_CTRL:
2891         case KVM_CAP_READONLY_MEM:
2892         case KVM_CAP_HYPERV_TIME:
2893         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2894         case KVM_CAP_TSC_DEADLINE_TIMER:
2895         case KVM_CAP_ENABLE_CAP_VM:
2896         case KVM_CAP_DISABLE_QUIRKS:
2897 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2898         case KVM_CAP_ASSIGN_DEV_IRQ:
2899         case KVM_CAP_PCI_2_3:
2900 #endif
2901                 r = 1;
2902                 break;
2903         case KVM_CAP_X86_SMM:
2904                 /* SMBASE is usually relocated above 1M on modern chipsets,
2905                  * and SMM handlers might indeed rely on 4G segment limits,
2906                  * so do not report SMM to be available if real mode is
2907                  * emulated via vm86 mode.  Still, do not go to great lengths
2908                  * to avoid userspace's usage of the feature, because it is a
2909                  * fringe case that is not enabled except via specific settings
2910                  * of the module parameters.
2911                  */
2912                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2913                 break;
2914         case KVM_CAP_COALESCED_MMIO:
2915                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2916                 break;
2917         case KVM_CAP_VAPIC:
2918                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2919                 break;
2920         case KVM_CAP_NR_VCPUS:
2921                 r = KVM_SOFT_MAX_VCPUS;
2922                 break;
2923         case KVM_CAP_MAX_VCPUS:
2924                 r = KVM_MAX_VCPUS;
2925                 break;
2926         case KVM_CAP_NR_MEMSLOTS:
2927                 r = KVM_USER_MEM_SLOTS;
2928                 break;
2929         case KVM_CAP_PV_MMU:    /* obsolete */
2930                 r = 0;
2931                 break;
2932 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2933         case KVM_CAP_IOMMU:
2934                 r = iommu_present(&pci_bus_type);
2935                 break;
2936 #endif
2937         case KVM_CAP_MCE:
2938                 r = KVM_MAX_MCE_BANKS;
2939                 break;
2940         case KVM_CAP_XCRS:
2941                 r = cpu_has_xsave;
2942                 break;
2943         case KVM_CAP_TSC_CONTROL:
2944                 r = kvm_has_tsc_control;
2945                 break;
2946         default:
2947                 r = 0;
2948                 break;
2949         }
2950         return r;
2951
2952 }
2953
2954 long kvm_arch_dev_ioctl(struct file *filp,
2955                         unsigned int ioctl, unsigned long arg)
2956 {
2957         void __user *argp = (void __user *)arg;
2958         long r;
2959
2960         switch (ioctl) {
2961         case KVM_GET_MSR_INDEX_LIST: {
2962                 struct kvm_msr_list __user *user_msr_list = argp;
2963                 struct kvm_msr_list msr_list;
2964                 unsigned n;
2965
2966                 r = -EFAULT;
2967                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2968                         goto out;
2969                 n = msr_list.nmsrs;
2970                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2971                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2972                         goto out;
2973                 r = -E2BIG;
2974                 if (n < msr_list.nmsrs)
2975                         goto out;
2976                 r = -EFAULT;
2977                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2978                                  num_msrs_to_save * sizeof(u32)))
2979                         goto out;
2980                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2981                                  &emulated_msrs,
2982                                  num_emulated_msrs * sizeof(u32)))
2983                         goto out;
2984                 r = 0;
2985                 break;
2986         }
2987         case KVM_GET_SUPPORTED_CPUID:
2988         case KVM_GET_EMULATED_CPUID: {
2989                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2990                 struct kvm_cpuid2 cpuid;
2991
2992                 r = -EFAULT;
2993                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2994                         goto out;
2995
2996                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2997                                             ioctl);
2998                 if (r)
2999                         goto out;
3000
3001                 r = -EFAULT;
3002                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3003                         goto out;
3004                 r = 0;
3005                 break;
3006         }
3007         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3008                 u64 mce_cap;
3009
3010                 mce_cap = KVM_MCE_CAP_SUPPORTED;
3011                 r = -EFAULT;
3012                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
3013                         goto out;
3014                 r = 0;
3015                 break;
3016         }
3017         default:
3018                 r = -EINVAL;
3019         }
3020 out:
3021         return r;
3022 }
3023
3024 static void wbinvd_ipi(void *garbage)
3025 {
3026         wbinvd();
3027 }
3028
3029 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3030 {
3031         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3032 }
3033
3034 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3035 {
3036         /* Address WBINVD may be executed by guest */
3037         if (need_emulate_wbinvd(vcpu)) {
3038                 if (kvm_x86_ops->has_wbinvd_exit())
3039                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3040                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3041                         smp_call_function_single(vcpu->cpu,
3042                                         wbinvd_ipi, NULL, 1);
3043         }
3044
3045         kvm_x86_ops->vcpu_load(vcpu, cpu);
3046
3047         /* Apply any externally detected TSC adjustments (due to suspend) */
3048         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3049                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3050                 vcpu->arch.tsc_offset_adjustment = 0;
3051                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3052         }
3053
3054         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
3055                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3056                                 native_read_tsc() - vcpu->arch.last_host_tsc;
3057                 if (tsc_delta < 0)
3058                         mark_tsc_unstable("KVM discovered backwards TSC");
3059                 if (check_tsc_unstable()) {
3060                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
3061                                                 vcpu->arch.last_guest_tsc);
3062                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
3063                         vcpu->arch.tsc_catchup = 1;
3064                 }
3065                 /*
3066                  * On a host with synchronized TSC, there is no need to update
3067                  * kvmclock on vcpu->cpu migration
3068                  */
3069                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3070                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3071                 if (vcpu->cpu != cpu)
3072                         kvm_migrate_timers(vcpu);
3073                 vcpu->cpu = cpu;
3074         }
3075
3076         accumulate_steal_time(vcpu);
3077         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3078 }
3079
3080 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3081 {
3082         kvm_x86_ops->vcpu_put(vcpu);
3083         kvm_put_guest_fpu(vcpu);
3084         vcpu->arch.last_host_tsc = native_read_tsc();
3085 }
3086
3087 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3088                                     struct kvm_lapic_state *s)
3089 {
3090         kvm_x86_ops->sync_pir_to_irr(vcpu);
3091         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
3092
3093         return 0;
3094 }
3095
3096 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3097                                     struct kvm_lapic_state *s)
3098 {
3099         kvm_apic_post_state_restore(vcpu, s);
3100         update_cr8_intercept(vcpu);
3101
3102         return 0;
3103 }
3104
3105 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3106                                     struct kvm_interrupt *irq)
3107 {
3108         if (irq->irq >= KVM_NR_INTERRUPTS)
3109                 return -EINVAL;
3110         if (irqchip_in_kernel(vcpu->kvm))
3111                 return -ENXIO;
3112
3113         kvm_queue_interrupt(vcpu, irq->irq, false);
3114         kvm_make_request(KVM_REQ_EVENT, vcpu);
3115
3116         return 0;
3117 }
3118
3119 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3120 {
3121         kvm_inject_nmi(vcpu);
3122
3123         return 0;
3124 }
3125
3126 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3127 {
3128         kvm_make_request(KVM_REQ_SMI, vcpu);
3129
3130         return 0;
3131 }
3132
3133 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3134                                            struct kvm_tpr_access_ctl *tac)
3135 {
3136         if (tac->flags)
3137                 return -EINVAL;
3138         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3139         return 0;
3140 }
3141
3142 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3143                                         u64 mcg_cap)
3144 {
3145         int r;
3146         unsigned bank_num = mcg_cap & 0xff, bank;
3147
3148         r = -EINVAL;
3149         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3150                 goto out;
3151         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
3152                 goto out;
3153         r = 0;
3154         vcpu->arch.mcg_cap = mcg_cap;
3155         /* Init IA32_MCG_CTL to all 1s */
3156         if (mcg_cap & MCG_CTL_P)
3157                 vcpu->arch.mcg_ctl = ~(u64)0;
3158         /* Init IA32_MCi_CTL to all 1s */
3159         for (bank = 0; bank < bank_num; bank++)
3160                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3161 out:
3162         return r;
3163 }
3164
3165 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3166                                       struct kvm_x86_mce *mce)
3167 {
3168         u64 mcg_cap = vcpu->arch.mcg_cap;
3169         unsigned bank_num = mcg_cap & 0xff;
3170         u64 *banks = vcpu->arch.mce_banks;
3171
3172         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3173                 return -EINVAL;
3174         /*
3175          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3176          * reporting is disabled
3177          */
3178         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3179             vcpu->arch.mcg_ctl != ~(u64)0)
3180                 return 0;
3181         banks += 4 * mce->bank;
3182         /*
3183          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3184          * reporting is disabled for the bank
3185          */
3186         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3187                 return 0;
3188         if (mce->status & MCI_STATUS_UC) {
3189                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3190                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3191                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3192                         return 0;
3193                 }
3194                 if (banks[1] & MCI_STATUS_VAL)
3195                         mce->status |= MCI_STATUS_OVER;
3196                 banks[2] = mce->addr;
3197                 banks[3] = mce->misc;
3198                 vcpu->arch.mcg_status = mce->mcg_status;
3199                 banks[1] = mce->status;
3200                 kvm_queue_exception(vcpu, MC_VECTOR);
3201         } else if (!(banks[1] & MCI_STATUS_VAL)
3202                    || !(banks[1] & MCI_STATUS_UC)) {
3203                 if (banks[1] & MCI_STATUS_VAL)
3204                         mce->status |= MCI_STATUS_OVER;
3205                 banks[2] = mce->addr;
3206                 banks[3] = mce->misc;
3207                 banks[1] = mce->status;
3208         } else
3209                 banks[1] |= MCI_STATUS_OVER;
3210         return 0;
3211 }
3212
3213 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3214                                                struct kvm_vcpu_events *events)
3215 {
3216         process_nmi(vcpu);
3217         events->exception.injected =
3218                 vcpu->arch.exception.pending &&
3219                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3220         events->exception.nr = vcpu->arch.exception.nr;
3221         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3222         events->exception.pad = 0;
3223         events->exception.error_code = vcpu->arch.exception.error_code;
3224
3225         events->interrupt.injected =
3226                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3227         events->interrupt.nr = vcpu->arch.interrupt.nr;
3228         events->interrupt.soft = 0;
3229         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3230
3231         events->nmi.injected = vcpu->arch.nmi_injected;
3232         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3233         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3234         events->nmi.pad = 0;
3235
3236         events->sipi_vector = 0; /* never valid when reporting to user space */
3237
3238         events->smi.smm = is_smm(vcpu);
3239         events->smi.pending = vcpu->arch.smi_pending;
3240         events->smi.smm_inside_nmi =
3241                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3242         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3243
3244         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3245                          | KVM_VCPUEVENT_VALID_SHADOW
3246                          | KVM_VCPUEVENT_VALID_SMM);
3247         memset(&events->reserved, 0, sizeof(events->reserved));
3248 }
3249
3250 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3251                                               struct kvm_vcpu_events *events)
3252 {
3253         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3254                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3255                               | KVM_VCPUEVENT_VALID_SHADOW
3256                               | KVM_VCPUEVENT_VALID_SMM))
3257                 return -EINVAL;
3258
3259         process_nmi(vcpu);
3260         vcpu->arch.exception.pending = events->exception.injected;
3261         vcpu->arch.exception.nr = events->exception.nr;
3262         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3263         vcpu->arch.exception.error_code = events->exception.error_code;
3264
3265         vcpu->arch.interrupt.pending = events->interrupt.injected;
3266         vcpu->arch.interrupt.nr = events->interrupt.nr;
3267         vcpu->arch.interrupt.soft = events->interrupt.soft;
3268         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3269                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3270                                                   events->interrupt.shadow);
3271
3272         vcpu->arch.nmi_injected = events->nmi.injected;
3273         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3274                 vcpu->arch.nmi_pending = events->nmi.pending;
3275         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3276
3277         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3278             kvm_vcpu_has_lapic(vcpu))
3279                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3280
3281         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3282                 if (events->smi.smm)
3283                         vcpu->arch.hflags |= HF_SMM_MASK;
3284                 else
3285                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3286                 vcpu->arch.smi_pending = events->smi.pending;
3287                 if (events->smi.smm_inside_nmi)
3288                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3289                 else
3290                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3291                 if (kvm_vcpu_has_lapic(vcpu)) {
3292                         if (events->smi.latched_init)
3293                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3294                         else
3295                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3296                 }
3297         }
3298
3299         kvm_make_request(KVM_REQ_EVENT, vcpu);
3300
3301         return 0;
3302 }
3303
3304 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3305                                              struct kvm_debugregs *dbgregs)
3306 {
3307         unsigned long val;
3308
3309         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3310         kvm_get_dr(vcpu, 6, &val);
3311         dbgregs->dr6 = val;
3312         dbgregs->dr7 = vcpu->arch.dr7;
3313         dbgregs->flags = 0;
3314         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3315 }
3316
3317 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3318                                             struct kvm_debugregs *dbgregs)
3319 {
3320         if (dbgregs->flags)
3321                 return -EINVAL;
3322
3323         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3324         kvm_update_dr0123(vcpu);
3325         vcpu->arch.dr6 = dbgregs->dr6;
3326         kvm_update_dr6(vcpu);
3327         vcpu->arch.dr7 = dbgregs->dr7;
3328         kvm_update_dr7(vcpu);
3329
3330         return 0;
3331 }
3332
3333 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3334
3335 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3336 {
3337         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3338         u64 xstate_bv = xsave->xsave_hdr.xstate_bv;
3339         u64 valid;
3340
3341         /*
3342          * Copy legacy XSAVE area, to avoid complications with CPUID
3343          * leaves 0 and 1 in the loop below.
3344          */
3345         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3346
3347         /* Set XSTATE_BV */
3348         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3349
3350         /*
3351          * Copy each region from the possibly compacted offset to the
3352          * non-compacted offset.
3353          */
3354         valid = xstate_bv & ~XSTATE_FPSSE;
3355         while (valid) {
3356                 u64 feature = valid & -valid;
3357                 int index = fls64(feature) - 1;
3358                 void *src = get_xsave_addr(xsave, feature);
3359
3360                 if (src) {
3361                         u32 size, offset, ecx, edx;
3362                         cpuid_count(XSTATE_CPUID, index,
3363                                     &size, &offset, &ecx, &edx);
3364                         memcpy(dest + offset, src, size);
3365                 }
3366
3367                 valid -= feature;
3368         }
3369 }
3370
3371 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3372 {
3373         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3374         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3375         u64 valid;
3376
3377         /*
3378          * Copy legacy XSAVE area, to avoid complications with CPUID
3379          * leaves 0 and 1 in the loop below.
3380          */
3381         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3382
3383         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3384         xsave->xsave_hdr.xstate_bv = xstate_bv;
3385         if (cpu_has_xsaves)
3386                 xsave->xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3387
3388         /*
3389          * Copy each region from the non-compacted offset to the
3390          * possibly compacted offset.
3391          */
3392         valid = xstate_bv & ~XSTATE_FPSSE;
3393         while (valid) {
3394                 u64 feature = valid & -valid;
3395                 int index = fls64(feature) - 1;
3396                 void *dest = get_xsave_addr(xsave, feature);
3397
3398                 if (dest) {
3399                         u32 size, offset, ecx, edx;
3400                         cpuid_count(XSTATE_CPUID, index,
3401                                     &size, &offset, &ecx, &edx);
3402                         memcpy(dest, src + offset, size);
3403                 } else
3404                         WARN_ON_ONCE(1);
3405
3406                 valid -= feature;
3407         }
3408 }
3409
3410 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3411                                          struct kvm_xsave *guest_xsave)
3412 {
3413         if (cpu_has_xsave) {
3414                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3415                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3416         } else {
3417                 memcpy(guest_xsave->region,
3418                         &vcpu->arch.guest_fpu.state->fxsave,
3419                         sizeof(struct i387_fxsave_struct));
3420                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3421                         XSTATE_FPSSE;
3422         }
3423 }
3424
3425 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3426                                         struct kvm_xsave *guest_xsave)
3427 {
3428         u64 xstate_bv =
3429                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3430
3431         if (cpu_has_xsave) {
3432                 /*
3433                  * Here we allow setting states that are not present in
3434                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3435                  * with old userspace.
3436                  */
3437                 if (xstate_bv & ~kvm_supported_xcr0())
3438                         return -EINVAL;
3439                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3440         } else {
3441                 if (xstate_bv & ~XSTATE_FPSSE)
3442                         return -EINVAL;
3443                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3444                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3445         }
3446         return 0;
3447 }
3448
3449 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3450                                         struct kvm_xcrs *guest_xcrs)
3451 {
3452         if (!cpu_has_xsave) {
3453                 guest_xcrs->nr_xcrs = 0;
3454                 return;
3455         }
3456
3457         guest_xcrs->nr_xcrs = 1;
3458         guest_xcrs->flags = 0;
3459         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3460         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3461 }
3462
3463 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3464                                        struct kvm_xcrs *guest_xcrs)
3465 {
3466         int i, r = 0;
3467
3468         if (!cpu_has_xsave)
3469                 return -EINVAL;
3470
3471         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3472                 return -EINVAL;
3473
3474         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3475                 /* Only support XCR0 currently */
3476                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3477                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3478                                 guest_xcrs->xcrs[i].value);
3479                         break;
3480                 }
3481         if (r)
3482                 r = -EINVAL;
3483         return r;
3484 }
3485
3486 /*
3487  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3488  * stopped by the hypervisor.  This function will be called from the host only.
3489  * EINVAL is returned when the host attempts to set the flag for a guest that
3490  * does not support pv clocks.
3491  */
3492 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3493 {
3494         if (!vcpu->arch.pv_time_enabled)
3495                 return -EINVAL;
3496         vcpu->arch.pvclock_set_guest_stopped_request = true;
3497         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3498         return 0;
3499 }
3500
3501 long kvm_arch_vcpu_ioctl(struct file *filp,
3502                          unsigned int ioctl, unsigned long arg)
3503 {
3504         struct kvm_vcpu *vcpu = filp->private_data;
3505         void __user *argp = (void __user *)arg;
3506         int r;
3507         union {
3508                 struct kvm_lapic_state *lapic;
3509                 struct kvm_xsave *xsave;
3510                 struct kvm_xcrs *xcrs;
3511                 void *buffer;
3512         } u;
3513
3514         u.buffer = NULL;
3515         switch (ioctl) {
3516         case KVM_GET_LAPIC: {
3517                 r = -EINVAL;
3518                 if (!vcpu->arch.apic)
3519                         goto out;
3520                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3521
3522                 r = -ENOMEM;
3523                 if (!u.lapic)
3524                         goto out;
3525                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3526                 if (r)
3527                         goto out;
3528                 r = -EFAULT;
3529                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3530                         goto out;
3531                 r = 0;
3532                 break;
3533         }
3534         case KVM_SET_LAPIC: {
3535                 r = -EINVAL;
3536                 if (!vcpu->arch.apic)
3537                         goto out;
3538                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3539                 if (IS_ERR(u.lapic))
3540                         return PTR_ERR(u.lapic);
3541
3542                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3543                 break;
3544         }
3545         case KVM_INTERRUPT: {
3546                 struct kvm_interrupt irq;
3547
3548                 r = -EFAULT;
3549                 if (copy_from_user(&irq, argp, sizeof irq))
3550                         goto out;
3551                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3552                 break;
3553         }
3554         case KVM_NMI: {
3555                 r = kvm_vcpu_ioctl_nmi(vcpu);
3556                 break;
3557         }
3558         case KVM_SMI: {
3559                 r = kvm_vcpu_ioctl_smi(vcpu);
3560                 break;
3561         }
3562         case KVM_SET_CPUID: {
3563                 struct kvm_cpuid __user *cpuid_arg = argp;
3564                 struct kvm_cpuid cpuid;
3565
3566                 r = -EFAULT;
3567                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3568                         goto out;
3569                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3570                 break;
3571         }
3572         case KVM_SET_CPUID2: {
3573                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3574                 struct kvm_cpuid2 cpuid;
3575
3576                 r = -EFAULT;
3577                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3578                         goto out;
3579                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3580                                               cpuid_arg->entries);
3581                 break;
3582         }
3583         case KVM_GET_CPUID2: {
3584                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3585                 struct kvm_cpuid2 cpuid;
3586
3587                 r = -EFAULT;
3588                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3589                         goto out;
3590                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3591                                               cpuid_arg->entries);
3592                 if (r)
3593                         goto out;
3594                 r = -EFAULT;
3595                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3596                         goto out;
3597                 r = 0;
3598                 break;
3599         }
3600         case KVM_GET_MSRS:
3601                 r = msr_io(vcpu, argp, do_get_msr, 1);
3602                 break;
3603         case KVM_SET_MSRS:
3604                 r = msr_io(vcpu, argp, do_set_msr, 0);
3605                 break;
3606         case KVM_TPR_ACCESS_REPORTING: {
3607                 struct kvm_tpr_access_ctl tac;
3608
3609                 r = -EFAULT;
3610                 if (copy_from_user(&tac, argp, sizeof tac))
3611                         goto out;
3612                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3613                 if (r)
3614                         goto out;
3615                 r = -EFAULT;
3616                 if (copy_to_user(argp, &tac, sizeof tac))
3617                         goto out;
3618                 r = 0;
3619                 break;
3620         };
3621         case KVM_SET_VAPIC_ADDR: {
3622                 struct kvm_vapic_addr va;
3623
3624                 r = -EINVAL;
3625                 if (!irqchip_in_kernel(vcpu->kvm))
3626                         goto out;
3627                 r = -EFAULT;
3628                 if (copy_from_user(&va, argp, sizeof va))
3629                         goto out;
3630                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3631                 break;
3632         }
3633         case KVM_X86_SETUP_MCE: {
3634                 u64 mcg_cap;
3635
3636                 r = -EFAULT;
3637                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3638                         goto out;
3639                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3640                 break;
3641         }
3642         case KVM_X86_SET_MCE: {
3643                 struct kvm_x86_mce mce;
3644
3645                 r = -EFAULT;
3646                 if (copy_from_user(&mce, argp, sizeof mce))
3647                         goto out;
3648                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3649                 break;
3650         }
3651         case KVM_GET_VCPU_EVENTS: {
3652                 struct kvm_vcpu_events events;
3653
3654                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3655
3656                 r = -EFAULT;
3657                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3658                         break;
3659                 r = 0;
3660                 break;
3661         }
3662         case KVM_SET_VCPU_EVENTS: {
3663                 struct kvm_vcpu_events events;
3664
3665                 r = -EFAULT;
3666                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3667                         break;
3668
3669                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3670                 break;
3671         }
3672         case KVM_GET_DEBUGREGS: {
3673                 struct kvm_debugregs dbgregs;
3674
3675                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3676
3677                 r = -EFAULT;
3678                 if (copy_to_user(argp, &dbgregs,
3679                                  sizeof(struct kvm_debugregs)))
3680                         break;
3681                 r = 0;
3682                 break;
3683         }
3684         case KVM_SET_DEBUGREGS: {
3685                 struct kvm_debugregs dbgregs;
3686
3687                 r = -EFAULT;
3688                 if (copy_from_user(&dbgregs, argp,
3689                                    sizeof(struct kvm_debugregs)))
3690                         break;
3691
3692                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3693                 break;
3694         }
3695         case KVM_GET_XSAVE: {
3696                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3697                 r = -ENOMEM;
3698                 if (!u.xsave)
3699                         break;
3700
3701                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3702
3703                 r = -EFAULT;
3704                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3705                         break;
3706                 r = 0;
3707                 break;
3708         }
3709         case KVM_SET_XSAVE: {
3710                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3711                 if (IS_ERR(u.xsave))
3712                         return PTR_ERR(u.xsave);
3713
3714                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3715                 break;
3716         }
3717         case KVM_GET_XCRS: {
3718                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3719                 r = -ENOMEM;
3720                 if (!u.xcrs)
3721                         break;
3722
3723                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3724
3725                 r = -EFAULT;
3726                 if (copy_to_user(argp, u.xcrs,
3727                                  sizeof(struct kvm_xcrs)))
3728                         break;
3729                 r = 0;
3730                 break;
3731         }
3732         case KVM_SET_XCRS: {
3733                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3734                 if (IS_ERR(u.xcrs))
3735                         return PTR_ERR(u.xcrs);
3736
3737                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3738                 break;
3739         }
3740         case KVM_SET_TSC_KHZ: {
3741                 u32 user_tsc_khz;
3742
3743                 r = -EINVAL;
3744                 user_tsc_khz = (u32)arg;
3745
3746                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3747                         goto out;
3748
3749                 if (user_tsc_khz == 0)
3750                         user_tsc_khz = tsc_khz;
3751
3752                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3753
3754                 r = 0;
3755                 goto out;
3756         }
3757         case KVM_GET_TSC_KHZ: {
3758                 r = vcpu->arch.virtual_tsc_khz;
3759                 goto out;
3760         }
3761         case KVM_KVMCLOCK_CTRL: {
3762                 r = kvm_set_guest_paused(vcpu);
3763                 goto out;
3764         }
3765         default:
3766                 r = -EINVAL;
3767         }
3768 out:
3769         kfree(u.buffer);
3770         return r;
3771 }
3772
3773 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3774 {
3775         return VM_FAULT_SIGBUS;
3776 }
3777
3778 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3779 {
3780         int ret;
3781
3782         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3783                 return -EINVAL;
3784         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3785         return ret;
3786 }
3787
3788 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3789                                               u64 ident_addr)
3790 {
3791         kvm->arch.ept_identity_map_addr = ident_addr;
3792         return 0;
3793 }
3794
3795 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3796                                           u32 kvm_nr_mmu_pages)
3797 {
3798         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3799                 return -EINVAL;
3800
3801         mutex_lock(&kvm->slots_lock);
3802
3803         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3804         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3805
3806         mutex_unlock(&kvm->slots_lock);
3807         return 0;
3808 }
3809
3810 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3811 {
3812         return kvm->arch.n_max_mmu_pages;
3813 }
3814
3815 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3816 {
3817         int r;
3818
3819         r = 0;
3820         switch (chip->chip_id) {
3821         case KVM_IRQCHIP_PIC_MASTER:
3822                 memcpy(&chip->chip.pic,
3823                         &pic_irqchip(kvm)->pics[0],
3824                         sizeof(struct kvm_pic_state));
3825                 break;
3826         case KVM_IRQCHIP_PIC_SLAVE:
3827                 memcpy(&chip->chip.pic,
3828                         &pic_irqchip(kvm)->pics[1],
3829                         sizeof(struct kvm_pic_state));
3830                 break;
3831         case KVM_IRQCHIP_IOAPIC:
3832                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3833                 break;
3834         default:
3835                 r = -EINVAL;
3836                 break;
3837         }
3838         return r;
3839 }
3840
3841 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3842 {
3843         int r;
3844
3845         r = 0;
3846         switch (chip->chip_id) {
3847         case KVM_IRQCHIP_PIC_MASTER:
3848                 spin_lock(&pic_irqchip(kvm)->lock);
3849                 memcpy(&pic_irqchip(kvm)->pics[0],
3850                         &chip->chip.pic,
3851                         sizeof(struct kvm_pic_state));
3852                 spin_unlock(&pic_irqchip(kvm)->lock);
3853                 break;
3854         case KVM_IRQCHIP_PIC_SLAVE:
3855                 spin_lock(&pic_irqchip(kvm)->lock);
3856                 memcpy(&pic_irqchip(kvm)->pics[1],
3857                         &chip->chip.pic,
3858                         sizeof(struct kvm_pic_state));
3859                 spin_unlock(&pic_irqchip(kvm)->lock);
3860                 break;
3861         case KVM_IRQCHIP_IOAPIC:
3862                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3863                 break;
3864         default:
3865                 r = -EINVAL;
3866                 break;
3867         }
3868         kvm_pic_update_irq(pic_irqchip(kvm));
3869         return r;
3870 }
3871
3872 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3873 {
3874         int r = 0;
3875
3876         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3877         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3878         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3879         return r;
3880 }
3881
3882 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3883 {
3884         int r = 0;
3885
3886         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3887         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3888         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3889         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3890         return r;
3891 }
3892
3893 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3894 {
3895         int r = 0;
3896
3897         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3898         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3899                 sizeof(ps->channels));
3900         ps->flags = kvm->arch.vpit->pit_state.flags;
3901         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3902         memset(&ps->reserved, 0, sizeof(ps->reserved));
3903         return r;
3904 }
3905
3906 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3907 {
3908         int r = 0, start = 0;
3909         u32 prev_legacy, cur_legacy;
3910         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3911         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3912         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3913         if (!prev_legacy && cur_legacy)
3914                 start = 1;
3915         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3916                sizeof(kvm->arch.vpit->pit_state.channels));
3917         kvm->arch.vpit->pit_state.flags = ps->flags;
3918         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3919         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3920         return r;
3921 }
3922
3923 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3924                                  struct kvm_reinject_control *control)
3925 {
3926         if (!kvm->arch.vpit)
3927                 return -ENXIO;
3928         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3929         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3930         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3931         return 0;
3932 }
3933
3934 /**
3935  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3936  * @kvm: kvm instance
3937  * @log: slot id and address to which we copy the log
3938  *
3939  * Steps 1-4 below provide general overview of dirty page logging. See
3940  * kvm_get_dirty_log_protect() function description for additional details.
3941  *
3942  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3943  * always flush the TLB (step 4) even if previous step failed  and the dirty
3944  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3945  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3946  * writes will be marked dirty for next log read.
3947  *
3948  *   1. Take a snapshot of the bit and clear it if needed.
3949  *   2. Write protect the corresponding page.
3950  *   3. Copy the snapshot to the userspace.
3951  *   4. Flush TLB's if needed.
3952  */
3953 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3954 {
3955         bool is_dirty = false;
3956         int r;
3957
3958         mutex_lock(&kvm->slots_lock);
3959
3960         /*
3961          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3962          */
3963         if (kvm_x86_ops->flush_log_dirty)
3964                 kvm_x86_ops->flush_log_dirty(kvm);
3965
3966         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3967
3968         /*
3969          * All the TLBs can be flushed out of mmu lock, see the comments in
3970          * kvm_mmu_slot_remove_write_access().
3971          */
3972         lockdep_assert_held(&kvm->slots_lock);
3973         if (is_dirty)
3974                 kvm_flush_remote_tlbs(kvm);
3975
3976         mutex_unlock(&kvm->slots_lock);
3977         return r;
3978 }
3979
3980 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3981                         bool line_status)
3982 {
3983         if (!irqchip_in_kernel(kvm))
3984                 return -ENXIO;
3985
3986         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3987                                         irq_event->irq, irq_event->level,
3988                                         line_status);
3989         return 0;
3990 }
3991
3992 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3993                                    struct kvm_enable_cap *cap)
3994 {
3995         int r;
3996
3997         if (cap->flags)
3998                 return -EINVAL;
3999
4000         switch (cap->cap) {
4001         case KVM_CAP_DISABLE_QUIRKS:
4002                 kvm->arch.disabled_quirks = cap->args[0];
4003                 r = 0;
4004                 break;
4005         default:
4006                 r = -EINVAL;
4007                 break;
4008         }
4009         return r;
4010 }
4011
4012 long kvm_arch_vm_ioctl(struct file *filp,
4013                        unsigned int ioctl, unsigned long arg)
4014 {
4015         struct kvm *kvm = filp->private_data;
4016         void __user *argp = (void __user *)arg;
4017         int r = -ENOTTY;
4018         /*
4019          * This union makes it completely explicit to gcc-3.x
4020          * that these two variables' stack usage should be
4021          * combined, not added together.
4022          */
4023         union {
4024                 struct kvm_pit_state ps;
4025                 struct kvm_pit_state2 ps2;
4026                 struct kvm_pit_config pit_config;
4027         } u;
4028
4029         switch (ioctl) {
4030         case KVM_SET_TSS_ADDR:
4031                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4032                 break;
4033         case KVM_SET_IDENTITY_MAP_ADDR: {
4034                 u64 ident_addr;
4035
4036                 r = -EFAULT;
4037                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4038                         goto out;
4039                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4040                 break;
4041         }
4042         case KVM_SET_NR_MMU_PAGES:
4043                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4044                 break;
4045         case KVM_GET_NR_MMU_PAGES:
4046                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4047                 break;
4048         case KVM_CREATE_IRQCHIP: {
4049                 struct kvm_pic *vpic;
4050
4051                 mutex_lock(&kvm->lock);
4052                 r = -EEXIST;
4053                 if (kvm->arch.vpic)
4054                         goto create_irqchip_unlock;
4055                 r = -EINVAL;
4056                 if (atomic_read(&kvm->online_vcpus))
4057                         goto create_irqchip_unlock;
4058                 r = -ENOMEM;
4059                 vpic = kvm_create_pic(kvm);
4060                 if (vpic) {
4061                         r = kvm_ioapic_init(kvm);
4062                         if (r) {
4063                                 mutex_lock(&kvm->slots_lock);
4064                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
4065                                                           &vpic->dev_master);
4066                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
4067                                                           &vpic->dev_slave);
4068                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
4069                                                           &vpic->dev_eclr);
4070                                 mutex_unlock(&kvm->slots_lock);
4071                                 kfree(vpic);
4072                                 goto create_irqchip_unlock;
4073                         }
4074                 } else
4075                         goto create_irqchip_unlock;
4076                 smp_wmb();
4077                 kvm->arch.vpic = vpic;
4078                 smp_wmb();
4079                 r = kvm_setup_default_irq_routing(kvm);
4080                 if (r) {
4081                         mutex_lock(&kvm->slots_lock);
4082                         mutex_lock(&kvm->irq_lock);
4083                         kvm_ioapic_destroy(kvm);
4084                         kvm_destroy_pic(kvm);
4085                         mutex_unlock(&kvm->irq_lock);
4086                         mutex_unlock(&kvm->slots_lock);
4087                 }
4088         create_irqchip_unlock:
4089                 mutex_unlock(&kvm->lock);
4090                 break;
4091         }
4092         case KVM_CREATE_PIT:
4093                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4094                 goto create_pit;
4095         case KVM_CREATE_PIT2:
4096                 r = -EFAULT;
4097                 if (copy_from_user(&u.pit_config, argp,
4098                                    sizeof(struct kvm_pit_config)))
4099                         goto out;
4100         create_pit:
4101                 mutex_lock(&kvm->slots_lock);
4102                 r = -EEXIST;
4103                 if (kvm->arch.vpit)
4104                         goto create_pit_unlock;
4105                 r = -ENOMEM;
4106                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4107                 if (kvm->arch.vpit)
4108                         r = 0;
4109         create_pit_unlock:
4110                 mutex_unlock(&kvm->slots_lock);
4111                 break;
4112         case KVM_GET_IRQCHIP: {
4113                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4114                 struct kvm_irqchip *chip;
4115
4116                 chip = memdup_user(argp, sizeof(*chip));
4117                 if (IS_ERR(chip)) {
4118                         r = PTR_ERR(chip);
4119                         goto out;
4120                 }
4121
4122                 r = -ENXIO;
4123                 if (!irqchip_in_kernel(kvm))
4124                         goto get_irqchip_out;
4125                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4126                 if (r)
4127                         goto get_irqchip_out;
4128                 r = -EFAULT;
4129                 if (copy_to_user(argp, chip, sizeof *chip))
4130                         goto get_irqchip_out;
4131                 r = 0;
4132         get_irqchip_out:
4133                 kfree(chip);
4134                 break;
4135         }
4136         case KVM_SET_IRQCHIP: {
4137                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4138                 struct kvm_irqchip *chip;
4139
4140                 chip = memdup_user(argp, sizeof(*chip));
4141                 if (IS_ERR(chip)) {
4142                         r = PTR_ERR(chip);
4143                         goto out;
4144                 }
4145
4146                 r = -ENXIO;
4147                 if (!irqchip_in_kernel(kvm))
4148                         goto set_irqchip_out;
4149                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4150                 if (r)
4151                         goto set_irqchip_out;
4152                 r = 0;
4153         set_irqchip_out:
4154                 kfree(chip);
4155                 break;
4156         }
4157         case KVM_GET_PIT: {
4158                 r = -EFAULT;
4159                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4160                         goto out;
4161                 r = -ENXIO;
4162                 if (!kvm->arch.vpit)
4163                         goto out;
4164                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4165                 if (r)
4166                         goto out;
4167                 r = -EFAULT;
4168                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4169                         goto out;
4170                 r = 0;
4171                 break;
4172         }
4173         case KVM_SET_PIT: {
4174                 r = -EFAULT;
4175                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4176                         goto out;
4177                 r = -ENXIO;
4178                 if (!kvm->arch.vpit)
4179                         goto out;
4180                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4181                 break;
4182         }
4183         case KVM_GET_PIT2: {
4184                 r = -ENXIO;
4185                 if (!kvm->arch.vpit)
4186                         goto out;
4187                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4188                 if (r)
4189                         goto out;
4190                 r = -EFAULT;
4191                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4192                         goto out;
4193                 r = 0;
4194                 break;
4195         }
4196         case KVM_SET_PIT2: {
4197                 r = -EFAULT;
4198                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4199                         goto out;
4200                 r = -ENXIO;
4201                 if (!kvm->arch.vpit)
4202                         goto out;
4203                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4204                 break;
4205         }
4206         case KVM_REINJECT_CONTROL: {
4207                 struct kvm_reinject_control control;
4208                 r =  -EFAULT;
4209                 if (copy_from_user(&control, argp, sizeof(control)))
4210                         goto out;
4211                 r = kvm_vm_ioctl_reinject(kvm, &control);
4212                 break;
4213         }
4214         case KVM_XEN_HVM_CONFIG: {
4215                 r = -EFAULT;
4216                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4217                                    sizeof(struct kvm_xen_hvm_config)))
4218                         goto out;
4219                 r = -EINVAL;
4220                 if (kvm->arch.xen_hvm_config.flags)
4221                         goto out;
4222                 r = 0;
4223                 break;
4224         }
4225         case KVM_SET_CLOCK: {
4226                 struct kvm_clock_data user_ns;
4227                 u64 now_ns;
4228                 s64 delta;
4229
4230                 r = -EFAULT;
4231                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4232                         goto out;
4233
4234                 r = -EINVAL;
4235                 if (user_ns.flags)
4236                         goto out;
4237
4238                 r = 0;
4239                 local_irq_disable();
4240                 now_ns = get_kernel_ns();
4241                 delta = user_ns.clock - now_ns;
4242                 local_irq_enable();
4243                 kvm->arch.kvmclock_offset = delta;
4244                 kvm_gen_update_masterclock(kvm);
4245                 break;
4246         }
4247         case KVM_GET_CLOCK: {
4248                 struct kvm_clock_data user_ns;
4249                 u64 now_ns;
4250
4251                 local_irq_disable();
4252                 now_ns = get_kernel_ns();
4253                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4254                 local_irq_enable();
4255                 user_ns.flags = 0;
4256                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4257
4258                 r = -EFAULT;
4259                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4260                         goto out;
4261                 r = 0;
4262                 break;
4263         }
4264         case KVM_ENABLE_CAP: {
4265                 struct kvm_enable_cap cap;
4266
4267                 r = -EFAULT;
4268                 if (copy_from_user(&cap, argp, sizeof(cap)))
4269                         goto out;
4270                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4271                 break;
4272         }
4273         default:
4274                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4275         }
4276 out:
4277         return r;
4278 }
4279
4280 static void kvm_init_msr_list(void)
4281 {
4282         u32 dummy[2];
4283         unsigned i, j;
4284
4285         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4286                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4287                         continue;
4288
4289                 /*
4290                  * Even MSRs that are valid in the host may not be exposed
4291                  * to the guests in some cases.  We could work around this
4292                  * in VMX with the generic MSR save/load machinery, but it
4293                  * is not really worthwhile since it will really only
4294                  * happen with nested virtualization.
4295                  */
4296                 switch (msrs_to_save[i]) {
4297                 case MSR_IA32_BNDCFGS:
4298                         if (!kvm_x86_ops->mpx_supported())
4299                                 continue;
4300                         break;
4301                 default:
4302                         break;
4303                 }
4304
4305                 if (j < i)
4306                         msrs_to_save[j] = msrs_to_save[i];
4307                 j++;
4308         }
4309         num_msrs_to_save = j;
4310
4311         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4312                 switch (emulated_msrs[i]) {
4313                 case MSR_IA32_SMBASE:
4314                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4315                                 continue;
4316                         break;
4317                 default:
4318                         break;
4319                 }
4320
4321                 if (j < i)
4322                         emulated_msrs[j] = emulated_msrs[i];
4323                 j++;
4324         }
4325         num_emulated_msrs = j;
4326 }
4327
4328 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4329                            const void *v)
4330 {
4331         int handled = 0;
4332         int n;
4333
4334         do {
4335                 n = min(len, 8);
4336                 if (!(vcpu->arch.apic &&
4337                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4338                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4339                         break;
4340                 handled += n;
4341                 addr += n;
4342                 len -= n;
4343                 v += n;
4344         } while (len);
4345
4346         return handled;
4347 }
4348
4349 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4350 {
4351         int handled = 0;
4352         int n;
4353
4354         do {
4355                 n = min(len, 8);
4356                 if (!(vcpu->arch.apic &&
4357                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4358                                          addr, n, v))
4359                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4360                         break;
4361                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4362                 handled += n;
4363                 addr += n;
4364                 len -= n;
4365                 v += n;
4366         } while (len);
4367
4368         return handled;
4369 }
4370
4371 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4372                         struct kvm_segment *var, int seg)
4373 {
4374         kvm_x86_ops->set_segment(vcpu, var, seg);
4375 }
4376
4377 void kvm_get_segment(struct kvm_vcpu *vcpu,
4378                      struct kvm_segment *var, int seg)
4379 {
4380         kvm_x86_ops->get_segment(vcpu, var, seg);
4381 }
4382
4383 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4384                            struct x86_exception *exception)
4385 {
4386         gpa_t t_gpa;
4387
4388         BUG_ON(!mmu_is_nested(vcpu));
4389
4390         /* NPT walks are always user-walks */
4391         access |= PFERR_USER_MASK;
4392         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4393
4394         return t_gpa;
4395 }
4396
4397 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4398                               struct x86_exception *exception)
4399 {
4400         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4401         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4402 }
4403
4404  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4405                                 struct x86_exception *exception)
4406 {
4407         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4408         access |= PFERR_FETCH_MASK;
4409         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4410 }
4411
4412 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4413                                struct x86_exception *exception)
4414 {
4415         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4416         access |= PFERR_WRITE_MASK;
4417         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4418 }
4419
4420 /* uses this to access any guest's mapped memory without checking CPL */
4421 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4422                                 struct x86_exception *exception)
4423 {
4424         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4425 }
4426
4427 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4428                                       struct kvm_vcpu *vcpu, u32 access,
4429                                       struct x86_exception *exception)
4430 {
4431         void *data = val;
4432         int r = X86EMUL_CONTINUE;
4433
4434         while (bytes) {
4435                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4436                                                             exception);
4437                 unsigned offset = addr & (PAGE_SIZE-1);
4438                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4439                 int ret;
4440
4441                 if (gpa == UNMAPPED_GVA)
4442                         return X86EMUL_PROPAGATE_FAULT;
4443                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4444                                                offset, toread);
4445                 if (ret < 0) {
4446                         r = X86EMUL_IO_NEEDED;
4447                         goto out;
4448                 }
4449
4450                 bytes -= toread;
4451                 data += toread;
4452                 addr += toread;
4453         }
4454 out:
4455         return r;
4456 }
4457
4458 /* used for instruction fetching */
4459 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4460                                 gva_t addr, void *val, unsigned int bytes,
4461                                 struct x86_exception *exception)
4462 {
4463         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4464         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4465         unsigned offset;
4466         int ret;
4467
4468         /* Inline kvm_read_guest_virt_helper for speed.  */
4469         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4470                                                     exception);
4471         if (unlikely(gpa == UNMAPPED_GVA))
4472                 return X86EMUL_PROPAGATE_FAULT;
4473
4474         offset = addr & (PAGE_SIZE-1);
4475         if (WARN_ON(offset + bytes > PAGE_SIZE))
4476                 bytes = (unsigned)PAGE_SIZE - offset;
4477         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4478                                        offset, bytes);
4479         if (unlikely(ret < 0))
4480                 return X86EMUL_IO_NEEDED;
4481
4482         return X86EMUL_CONTINUE;
4483 }
4484
4485 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4486                                gva_t addr, void *val, unsigned int bytes,
4487                                struct x86_exception *exception)
4488 {
4489         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4490         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4491
4492         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4493                                           exception);
4494 }
4495 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4496
4497 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4498                                       gva_t addr, void *val, unsigned int bytes,
4499                                       struct x86_exception *exception)
4500 {
4501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4502         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4503 }
4504
4505 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4506                                        gva_t addr, void *val,
4507                                        unsigned int bytes,
4508                                        struct x86_exception *exception)
4509 {
4510         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4511         void *data = val;
4512         int r = X86EMUL_CONTINUE;
4513
4514         while (bytes) {
4515                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4516                                                              PFERR_WRITE_MASK,
4517                                                              exception);
4518                 unsigned offset = addr & (PAGE_SIZE-1);
4519                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4520                 int ret;
4521
4522                 if (gpa == UNMAPPED_GVA)
4523                         return X86EMUL_PROPAGATE_FAULT;
4524                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4525                 if (ret < 0) {
4526                         r = X86EMUL_IO_NEEDED;
4527                         goto out;
4528                 }
4529
4530                 bytes -= towrite;
4531                 data += towrite;
4532                 addr += towrite;
4533         }
4534 out:
4535         return r;
4536 }
4537 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4538
4539 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4540                                 gpa_t *gpa, struct x86_exception *exception,
4541                                 bool write)
4542 {
4543         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4544                 | (write ? PFERR_WRITE_MASK : 0);
4545
4546         if (vcpu_match_mmio_gva(vcpu, gva)
4547             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4548                                  vcpu->arch.access, access)) {
4549                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4550                                         (gva & (PAGE_SIZE - 1));
4551                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4552                 return 1;
4553         }
4554
4555         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4556
4557         if (*gpa == UNMAPPED_GVA)
4558                 return -1;
4559
4560         /* For APIC access vmexit */
4561         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4562                 return 1;
4563
4564         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4565                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4566                 return 1;
4567         }
4568
4569         return 0;
4570 }
4571
4572 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4573                         const void *val, int bytes)
4574 {
4575         int ret;
4576
4577         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4578         if (ret < 0)
4579                 return 0;
4580         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4581         return 1;
4582 }
4583
4584 struct read_write_emulator_ops {
4585         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4586                                   int bytes);
4587         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4588                                   void *val, int bytes);
4589         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4590                                int bytes, void *val);
4591         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4592                                     void *val, int bytes);
4593         bool write;
4594 };
4595
4596 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4597 {
4598         if (vcpu->mmio_read_completed) {
4599                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4600                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4601                 vcpu->mmio_read_completed = 0;
4602                 return 1;
4603         }
4604
4605         return 0;
4606 }
4607
4608 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4609                         void *val, int bytes)
4610 {
4611         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4612 }
4613
4614 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4615                          void *val, int bytes)
4616 {
4617         return emulator_write_phys(vcpu, gpa, val, bytes);
4618 }
4619
4620 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4621 {
4622         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4623         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4624 }
4625
4626 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4627                           void *val, int bytes)
4628 {
4629         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4630         return X86EMUL_IO_NEEDED;
4631 }
4632
4633 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4634                            void *val, int bytes)
4635 {
4636         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4637
4638         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4639         return X86EMUL_CONTINUE;
4640 }
4641
4642 static const struct read_write_emulator_ops read_emultor = {
4643         .read_write_prepare = read_prepare,
4644         .read_write_emulate = read_emulate,
4645         .read_write_mmio = vcpu_mmio_read,
4646         .read_write_exit_mmio = read_exit_mmio,
4647 };
4648
4649 static const struct read_write_emulator_ops write_emultor = {
4650         .read_write_emulate = write_emulate,
4651         .read_write_mmio = write_mmio,
4652         .read_write_exit_mmio = write_exit_mmio,
4653         .write = true,
4654 };
4655
4656 static int emulator_read_write_onepage(unsigned long addr, void *val,
4657                                        unsigned int bytes,
4658                                        struct x86_exception *exception,
4659                                        struct kvm_vcpu *vcpu,
4660                                        const struct read_write_emulator_ops *ops)
4661 {
4662         gpa_t gpa;
4663         int handled, ret;
4664         bool write = ops->write;
4665         struct kvm_mmio_fragment *frag;
4666
4667         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4668
4669         if (ret < 0)
4670                 return X86EMUL_PROPAGATE_FAULT;
4671
4672         /* For APIC access vmexit */
4673         if (ret)
4674                 goto mmio;
4675
4676         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4677                 return X86EMUL_CONTINUE;
4678
4679 mmio:
4680         /*
4681          * Is this MMIO handled locally?
4682          */
4683         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4684         if (handled == bytes)
4685                 return X86EMUL_CONTINUE;
4686
4687         gpa += handled;
4688         bytes -= handled;
4689         val += handled;
4690
4691         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4692         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4693         frag->gpa = gpa;
4694         frag->data = val;
4695         frag->len = bytes;
4696         return X86EMUL_CONTINUE;
4697 }
4698
4699 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4700                         unsigned long addr,
4701                         void *val, unsigned int bytes,
4702                         struct x86_exception *exception,
4703                         const struct read_write_emulator_ops *ops)
4704 {
4705         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4706         gpa_t gpa;
4707         int rc;
4708
4709         if (ops->read_write_prepare &&
4710                   ops->read_write_prepare(vcpu, val, bytes))
4711                 return X86EMUL_CONTINUE;
4712
4713         vcpu->mmio_nr_fragments = 0;
4714
4715         /* Crossing a page boundary? */
4716         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4717                 int now;
4718
4719                 now = -addr & ~PAGE_MASK;
4720                 rc = emulator_read_write_onepage(addr, val, now, exception,
4721                                                  vcpu, ops);
4722
4723                 if (rc != X86EMUL_CONTINUE)
4724                         return rc;
4725                 addr += now;
4726                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4727                         addr = (u32)addr;
4728                 val += now;
4729                 bytes -= now;
4730         }
4731
4732         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4733                                          vcpu, ops);
4734         if (rc != X86EMUL_CONTINUE)
4735                 return rc;
4736
4737         if (!vcpu->mmio_nr_fragments)
4738                 return rc;
4739
4740         gpa = vcpu->mmio_fragments[0].gpa;
4741
4742         vcpu->mmio_needed = 1;
4743         vcpu->mmio_cur_fragment = 0;
4744
4745         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4746         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4747         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4748         vcpu->run->mmio.phys_addr = gpa;
4749
4750         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4751 }
4752
4753 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4754                                   unsigned long addr,
4755                                   void *val,
4756                                   unsigned int bytes,
4757                                   struct x86_exception *exception)
4758 {
4759         return emulator_read_write(ctxt, addr, val, bytes,
4760                                    exception, &read_emultor);
4761 }
4762
4763 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4764                             unsigned long addr,
4765                             const void *val,
4766                             unsigned int bytes,
4767                             struct x86_exception *exception)
4768 {
4769         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4770                                    exception, &write_emultor);
4771 }
4772
4773 #define CMPXCHG_TYPE(t, ptr, old, new) \
4774         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4775
4776 #ifdef CONFIG_X86_64
4777 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4778 #else
4779 #  define CMPXCHG64(ptr, old, new) \
4780         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4781 #endif
4782
4783 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4784                                      unsigned long addr,
4785                                      const void *old,
4786                                      const void *new,
4787                                      unsigned int bytes,
4788                                      struct x86_exception *exception)
4789 {
4790         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4791         gpa_t gpa;
4792         struct page *page;
4793         char *kaddr;
4794         bool exchanged;
4795
4796         /* guests cmpxchg8b have to be emulated atomically */
4797         if (bytes > 8 || (bytes & (bytes - 1)))
4798                 goto emul_write;
4799
4800         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4801
4802         if (gpa == UNMAPPED_GVA ||
4803             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4804                 goto emul_write;
4805
4806         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4807                 goto emul_write;
4808
4809         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4810         if (is_error_page(page))
4811                 goto emul_write;
4812
4813         kaddr = kmap_atomic(page);
4814         kaddr += offset_in_page(gpa);
4815         switch (bytes) {
4816         case 1:
4817                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4818                 break;
4819         case 2:
4820                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4821                 break;
4822         case 4:
4823                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4824                 break;
4825         case 8:
4826                 exchanged = CMPXCHG64(kaddr, old, new);
4827                 break;
4828         default:
4829                 BUG();
4830         }
4831         kunmap_atomic(kaddr);
4832         kvm_release_page_dirty(page);
4833
4834         if (!exchanged)
4835                 return X86EMUL_CMPXCHG_FAILED;
4836
4837         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4838         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4839
4840         return X86EMUL_CONTINUE;
4841
4842 emul_write:
4843         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4844
4845         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4846 }
4847
4848 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4849 {
4850         /* TODO: String I/O for in kernel device */
4851         int r;
4852
4853         if (vcpu->arch.pio.in)
4854                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4855                                     vcpu->arch.pio.size, pd);
4856         else
4857                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4858                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4859                                      pd);
4860         return r;
4861 }
4862
4863 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4864                                unsigned short port, void *val,
4865                                unsigned int count, bool in)
4866 {
4867         vcpu->arch.pio.port = port;
4868         vcpu->arch.pio.in = in;
4869         vcpu->arch.pio.count  = count;
4870         vcpu->arch.pio.size = size;
4871
4872         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4873                 vcpu->arch.pio.count = 0;
4874                 return 1;
4875         }
4876
4877         vcpu->run->exit_reason = KVM_EXIT_IO;
4878         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4879         vcpu->run->io.size = size;
4880         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4881         vcpu->run->io.count = count;
4882         vcpu->run->io.port = port;
4883
4884         return 0;
4885 }
4886
4887 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4888                                     int size, unsigned short port, void *val,
4889                                     unsigned int count)
4890 {
4891         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4892         int ret;
4893
4894         if (vcpu->arch.pio.count)
4895                 goto data_avail;
4896
4897         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4898         if (ret) {
4899 data_avail:
4900                 memcpy(val, vcpu->arch.pio_data, size * count);
4901                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4902                 vcpu->arch.pio.count = 0;
4903                 return 1;
4904         }
4905
4906         return 0;
4907 }
4908
4909 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4910                                      int size, unsigned short port,
4911                                      const void *val, unsigned int count)
4912 {
4913         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4914
4915         memcpy(vcpu->arch.pio_data, val, size * count);
4916         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4917         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4918 }
4919
4920 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4921 {
4922         return kvm_x86_ops->get_segment_base(vcpu, seg);
4923 }
4924
4925 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4926 {
4927         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4928 }
4929
4930 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4931 {
4932         if (!need_emulate_wbinvd(vcpu))
4933                 return X86EMUL_CONTINUE;
4934
4935         if (kvm_x86_ops->has_wbinvd_exit()) {
4936                 int cpu = get_cpu();
4937
4938                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4939                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4940                                 wbinvd_ipi, NULL, 1);
4941                 put_cpu();
4942                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4943         } else
4944                 wbinvd();
4945         return X86EMUL_CONTINUE;
4946 }
4947
4948 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4949 {
4950         kvm_x86_ops->skip_emulated_instruction(vcpu);
4951         return kvm_emulate_wbinvd_noskip(vcpu);
4952 }
4953 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4954
4955
4956
4957 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4958 {
4959         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4960 }
4961
4962 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4963                            unsigned long *dest)
4964 {
4965         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4966 }
4967
4968 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4969                            unsigned long value)
4970 {
4971
4972         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4973 }
4974
4975 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4976 {
4977         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4978 }
4979
4980 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4981 {
4982         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4983         unsigned long value;
4984
4985         switch (cr) {
4986         case 0:
4987                 value = kvm_read_cr0(vcpu);
4988                 break;
4989         case 2:
4990                 value = vcpu->arch.cr2;
4991                 break;
4992         case 3:
4993                 value = kvm_read_cr3(vcpu);
4994                 break;
4995         case 4:
4996                 value = kvm_read_cr4(vcpu);
4997                 break;
4998         case 8:
4999                 value = kvm_get_cr8(vcpu);
5000                 break;
5001         default:
5002                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5003                 return 0;
5004         }
5005
5006         return value;
5007 }
5008
5009 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5010 {
5011         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5012         int res = 0;
5013
5014         switch (cr) {
5015         case 0:
5016                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5017                 break;
5018         case 2:
5019                 vcpu->arch.cr2 = val;
5020                 break;
5021         case 3:
5022                 res = kvm_set_cr3(vcpu, val);
5023                 break;
5024         case 4:
5025                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5026                 break;
5027         case 8:
5028                 res = kvm_set_cr8(vcpu, val);
5029                 break;
5030         default:
5031                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5032                 res = -1;
5033         }
5034
5035         return res;
5036 }
5037
5038 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5039 {
5040         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5041 }
5042
5043 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5044 {
5045         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5046 }
5047
5048 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5049 {
5050         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5051 }
5052
5053 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5054 {
5055         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5056 }
5057
5058 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5059 {
5060         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5061 }
5062
5063 static unsigned long emulator_get_cached_segment_base(
5064         struct x86_emulate_ctxt *ctxt, int seg)
5065 {
5066         return get_segment_base(emul_to_vcpu(ctxt), seg);
5067 }
5068
5069 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5070                                  struct desc_struct *desc, u32 *base3,
5071                                  int seg)
5072 {
5073         struct kvm_segment var;
5074
5075         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5076         *selector = var.selector;
5077
5078         if (var.unusable) {
5079                 memset(desc, 0, sizeof(*desc));
5080                 return false;
5081         }
5082
5083         if (var.g)
5084                 var.limit >>= 12;
5085         set_desc_limit(desc, var.limit);
5086         set_desc_base(desc, (unsigned long)var.base);
5087 #ifdef CONFIG_X86_64
5088         if (base3)
5089                 *base3 = var.base >> 32;
5090 #endif
5091         desc->type = var.type;
5092         desc->s = var.s;
5093         desc->dpl = var.dpl;
5094         desc->p = var.present;
5095         desc->avl = var.avl;
5096         desc->l = var.l;
5097         desc->d = var.db;
5098         desc->g = var.g;
5099
5100         return true;
5101 }
5102
5103 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5104                                  struct desc_struct *desc, u32 base3,
5105                                  int seg)
5106 {
5107         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5108         struct kvm_segment var;
5109
5110         var.selector = selector;
5111         var.base = get_desc_base(desc);
5112 #ifdef CONFIG_X86_64
5113         var.base |= ((u64)base3) << 32;
5114 #endif
5115         var.limit = get_desc_limit(desc);
5116         if (desc->g)
5117                 var.limit = (var.limit << 12) | 0xfff;
5118         var.type = desc->type;
5119         var.dpl = desc->dpl;
5120         var.db = desc->d;
5121         var.s = desc->s;
5122         var.l = desc->l;
5123         var.g = desc->g;
5124         var.avl = desc->avl;
5125         var.present = desc->p;
5126         var.unusable = !var.present;
5127         var.padding = 0;
5128
5129         kvm_set_segment(vcpu, &var, seg);
5130         return;
5131 }
5132
5133 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5134                             u32 msr_index, u64 *pdata)
5135 {
5136         struct msr_data msr;
5137         int r;
5138
5139         msr.index = msr_index;
5140         msr.host_initiated = false;
5141         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5142         if (r)
5143                 return r;
5144
5145         *pdata = msr.data;
5146         return 0;
5147 }
5148
5149 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5150                             u32 msr_index, u64 data)
5151 {
5152         struct msr_data msr;
5153
5154         msr.data = data;
5155         msr.index = msr_index;
5156         msr.host_initiated = false;
5157         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5158 }
5159
5160 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5161 {
5162         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5163
5164         return vcpu->arch.smbase;
5165 }
5166
5167 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5168 {
5169         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5170
5171         vcpu->arch.smbase = smbase;
5172 }
5173
5174 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5175                               u32 pmc)
5176 {
5177         return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
5178 }
5179
5180 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5181                              u32 pmc, u64 *pdata)
5182 {
5183         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
5184 }
5185
5186 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5187 {
5188         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5189 }
5190
5191 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5192 {
5193         preempt_disable();
5194         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5195         /*
5196          * CR0.TS may reference the host fpu state, not the guest fpu state,
5197          * so it may be clear at this point.
5198          */
5199         clts();
5200 }
5201
5202 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5203 {
5204         preempt_enable();
5205 }
5206
5207 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5208                               struct x86_instruction_info *info,
5209                               enum x86_intercept_stage stage)
5210 {
5211         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5212 }
5213
5214 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5215                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5216 {
5217         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5218 }
5219
5220 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5221 {
5222         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5223 }
5224
5225 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5226 {
5227         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5228 }
5229
5230 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5231 {
5232         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5233 }
5234
5235 static const struct x86_emulate_ops emulate_ops = {
5236         .read_gpr            = emulator_read_gpr,
5237         .write_gpr           = emulator_write_gpr,
5238         .read_std            = kvm_read_guest_virt_system,
5239         .write_std           = kvm_write_guest_virt_system,
5240         .fetch               = kvm_fetch_guest_virt,
5241         .read_emulated       = emulator_read_emulated,
5242         .write_emulated      = emulator_write_emulated,
5243         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5244         .invlpg              = emulator_invlpg,
5245         .pio_in_emulated     = emulator_pio_in_emulated,
5246         .pio_out_emulated    = emulator_pio_out_emulated,
5247         .get_segment         = emulator_get_segment,
5248         .set_segment         = emulator_set_segment,
5249         .get_cached_segment_base = emulator_get_cached_segment_base,
5250         .get_gdt             = emulator_get_gdt,
5251         .get_idt             = emulator_get_idt,
5252         .set_gdt             = emulator_set_gdt,
5253         .set_idt             = emulator_set_idt,
5254         .get_cr              = emulator_get_cr,
5255         .set_cr              = emulator_set_cr,
5256         .cpl                 = emulator_get_cpl,
5257         .get_dr              = emulator_get_dr,
5258         .set_dr              = emulator_set_dr,
5259         .get_smbase          = emulator_get_smbase,
5260         .set_smbase          = emulator_set_smbase,
5261         .set_msr             = emulator_set_msr,
5262         .get_msr             = emulator_get_msr,
5263         .check_pmc           = emulator_check_pmc,
5264         .read_pmc            = emulator_read_pmc,
5265         .halt                = emulator_halt,
5266         .wbinvd              = emulator_wbinvd,
5267         .fix_hypercall       = emulator_fix_hypercall,
5268         .get_fpu             = emulator_get_fpu,
5269         .put_fpu             = emulator_put_fpu,
5270         .intercept           = emulator_intercept,
5271         .get_cpuid           = emulator_get_cpuid,
5272         .set_nmi_mask        = emulator_set_nmi_mask,
5273 };
5274
5275 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5276 {
5277         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5278         /*
5279          * an sti; sti; sequence only disable interrupts for the first
5280          * instruction. So, if the last instruction, be it emulated or
5281          * not, left the system with the INT_STI flag enabled, it
5282          * means that the last instruction is an sti. We should not
5283          * leave the flag on in this case. The same goes for mov ss
5284          */
5285         if (int_shadow & mask)
5286                 mask = 0;
5287         if (unlikely(int_shadow || mask)) {
5288                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5289                 if (!mask)
5290                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5291         }
5292 }
5293
5294 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5295 {
5296         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5297         if (ctxt->exception.vector == PF_VECTOR)
5298                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5299
5300         if (ctxt->exception.error_code_valid)
5301                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5302                                       ctxt->exception.error_code);
5303         else
5304                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5305         return false;
5306 }
5307
5308 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5309 {
5310         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5311         int cs_db, cs_l;
5312
5313         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5314
5315         ctxt->eflags = kvm_get_rflags(vcpu);
5316         ctxt->eip = kvm_rip_read(vcpu);
5317         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5318                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5319                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5320                      cs_db                              ? X86EMUL_MODE_PROT32 :
5321                                                           X86EMUL_MODE_PROT16;
5322         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5323         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5324         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5325         ctxt->emul_flags = vcpu->arch.hflags;
5326
5327         init_decode_cache(ctxt);
5328         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5329 }
5330
5331 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5332 {
5333         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5334         int ret;
5335
5336         init_emulate_ctxt(vcpu);
5337
5338         ctxt->op_bytes = 2;
5339         ctxt->ad_bytes = 2;
5340         ctxt->_eip = ctxt->eip + inc_eip;
5341         ret = emulate_int_real(ctxt, irq);
5342
5343         if (ret != X86EMUL_CONTINUE)
5344                 return EMULATE_FAIL;
5345
5346         ctxt->eip = ctxt->_eip;
5347         kvm_rip_write(vcpu, ctxt->eip);
5348         kvm_set_rflags(vcpu, ctxt->eflags);
5349
5350         if (irq == NMI_VECTOR)
5351                 vcpu->arch.nmi_pending = 0;
5352         else
5353                 vcpu->arch.interrupt.pending = false;
5354
5355         return EMULATE_DONE;
5356 }
5357 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5358
5359 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5360 {
5361         int r = EMULATE_DONE;
5362
5363         ++vcpu->stat.insn_emulation_fail;
5364         trace_kvm_emulate_insn_failed(vcpu);
5365         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5366                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5367                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5368                 vcpu->run->internal.ndata = 0;
5369                 r = EMULATE_FAIL;
5370         }
5371         kvm_queue_exception(vcpu, UD_VECTOR);
5372
5373         return r;
5374 }
5375
5376 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5377                                   bool write_fault_to_shadow_pgtable,
5378                                   int emulation_type)
5379 {
5380         gpa_t gpa = cr2;
5381         pfn_t pfn;
5382
5383         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5384                 return false;
5385
5386         if (!vcpu->arch.mmu.direct_map) {
5387                 /*
5388                  * Write permission should be allowed since only
5389                  * write access need to be emulated.
5390                  */
5391                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5392
5393                 /*
5394                  * If the mapping is invalid in guest, let cpu retry
5395                  * it to generate fault.
5396                  */
5397                 if (gpa == UNMAPPED_GVA)
5398                         return true;
5399         }
5400
5401         /*
5402          * Do not retry the unhandleable instruction if it faults on the
5403          * readonly host memory, otherwise it will goto a infinite loop:
5404          * retry instruction -> write #PF -> emulation fail -> retry
5405          * instruction -> ...
5406          */
5407         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5408
5409         /*
5410          * If the instruction failed on the error pfn, it can not be fixed,
5411          * report the error to userspace.
5412          */
5413         if (is_error_noslot_pfn(pfn))
5414                 return false;
5415
5416         kvm_release_pfn_clean(pfn);
5417
5418         /* The instructions are well-emulated on direct mmu. */
5419         if (vcpu->arch.mmu.direct_map) {
5420                 unsigned int indirect_shadow_pages;
5421
5422                 spin_lock(&vcpu->kvm->mmu_lock);
5423                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5424                 spin_unlock(&vcpu->kvm->mmu_lock);
5425
5426                 if (indirect_shadow_pages)
5427                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5428
5429                 return true;
5430         }
5431
5432         /*
5433          * if emulation was due to access to shadowed page table
5434          * and it failed try to unshadow page and re-enter the
5435          * guest to let CPU execute the instruction.
5436          */
5437         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5438
5439         /*
5440          * If the access faults on its page table, it can not
5441          * be fixed by unprotecting shadow page and it should
5442          * be reported to userspace.
5443          */
5444         return !write_fault_to_shadow_pgtable;
5445 }
5446
5447 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5448                               unsigned long cr2,  int emulation_type)
5449 {
5450         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5451         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5452
5453         last_retry_eip = vcpu->arch.last_retry_eip;
5454         last_retry_addr = vcpu->arch.last_retry_addr;
5455
5456         /*
5457          * If the emulation is caused by #PF and it is non-page_table
5458          * writing instruction, it means the VM-EXIT is caused by shadow
5459          * page protected, we can zap the shadow page and retry this
5460          * instruction directly.
5461          *
5462          * Note: if the guest uses a non-page-table modifying instruction
5463          * on the PDE that points to the instruction, then we will unmap
5464          * the instruction and go to an infinite loop. So, we cache the
5465          * last retried eip and the last fault address, if we meet the eip
5466          * and the address again, we can break out of the potential infinite
5467          * loop.
5468          */
5469         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5470
5471         if (!(emulation_type & EMULTYPE_RETRY))
5472                 return false;
5473
5474         if (x86_page_table_writing_insn(ctxt))
5475                 return false;
5476
5477         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5478                 return false;
5479
5480         vcpu->arch.last_retry_eip = ctxt->eip;
5481         vcpu->arch.last_retry_addr = cr2;
5482
5483         if (!vcpu->arch.mmu.direct_map)
5484                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5485
5486         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5487
5488         return true;
5489 }
5490
5491 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5492 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5493
5494 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5495 {
5496         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5497                 /* This is a good place to trace that we are exiting SMM.  */
5498                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5499
5500                 if (unlikely(vcpu->arch.smi_pending)) {
5501                         kvm_make_request(KVM_REQ_SMI, vcpu);
5502                         vcpu->arch.smi_pending = 0;
5503                 } else {
5504                         /* Process a latched INIT, if any.  */
5505                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5506                 }
5507         }
5508
5509         kvm_mmu_reset_context(vcpu);
5510 }
5511
5512 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5513 {
5514         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5515
5516         vcpu->arch.hflags = emul_flags;
5517
5518         if (changed & HF_SMM_MASK)
5519                 kvm_smm_changed(vcpu);
5520 }
5521
5522 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5523                                 unsigned long *db)
5524 {
5525         u32 dr6 = 0;
5526         int i;
5527         u32 enable, rwlen;
5528
5529         enable = dr7;
5530         rwlen = dr7 >> 16;
5531         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5532                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5533                         dr6 |= (1 << i);
5534         return dr6;
5535 }
5536
5537 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5538 {
5539         struct kvm_run *kvm_run = vcpu->run;
5540
5541         /*
5542          * rflags is the old, "raw" value of the flags.  The new value has
5543          * not been saved yet.
5544          *
5545          * This is correct even for TF set by the guest, because "the
5546          * processor will not generate this exception after the instruction
5547          * that sets the TF flag".
5548          */
5549         if (unlikely(rflags & X86_EFLAGS_TF)) {
5550                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5551                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5552                                                   DR6_RTM;
5553                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5554                         kvm_run->debug.arch.exception = DB_VECTOR;
5555                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5556                         *r = EMULATE_USER_EXIT;
5557                 } else {
5558                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5559                         /*
5560                          * "Certain debug exceptions may clear bit 0-3.  The
5561                          * remaining contents of the DR6 register are never
5562                          * cleared by the processor".
5563                          */
5564                         vcpu->arch.dr6 &= ~15;
5565                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5566                         kvm_queue_exception(vcpu, DB_VECTOR);
5567                 }
5568         }
5569 }
5570
5571 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5572 {
5573         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5574             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5575                 struct kvm_run *kvm_run = vcpu->run;
5576                 unsigned long eip = kvm_get_linear_rip(vcpu);
5577                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5578                                            vcpu->arch.guest_debug_dr7,
5579                                            vcpu->arch.eff_db);
5580
5581                 if (dr6 != 0) {
5582                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5583                         kvm_run->debug.arch.pc = eip;
5584                         kvm_run->debug.arch.exception = DB_VECTOR;
5585                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5586                         *r = EMULATE_USER_EXIT;
5587                         return true;
5588                 }
5589         }
5590
5591         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5592             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5593                 unsigned long eip = kvm_get_linear_rip(vcpu);
5594                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5595                                            vcpu->arch.dr7,
5596                                            vcpu->arch.db);
5597
5598                 if (dr6 != 0) {
5599                         vcpu->arch.dr6 &= ~15;
5600                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5601                         kvm_queue_exception(vcpu, DB_VECTOR);
5602                         *r = EMULATE_DONE;
5603                         return true;
5604                 }
5605         }
5606
5607         return false;
5608 }
5609
5610 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5611                             unsigned long cr2,
5612                             int emulation_type,
5613                             void *insn,
5614                             int insn_len)
5615 {
5616         int r;
5617         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5618         bool writeback = true;
5619         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5620
5621         /*
5622          * Clear write_fault_to_shadow_pgtable here to ensure it is
5623          * never reused.
5624          */
5625         vcpu->arch.write_fault_to_shadow_pgtable = false;
5626         kvm_clear_exception_queue(vcpu);
5627
5628         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5629                 init_emulate_ctxt(vcpu);
5630
5631                 /*
5632                  * We will reenter on the same instruction since
5633                  * we do not set complete_userspace_io.  This does not
5634                  * handle watchpoints yet, those would be handled in
5635                  * the emulate_ops.
5636                  */
5637                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5638                         return r;
5639
5640                 ctxt->interruptibility = 0;
5641                 ctxt->have_exception = false;
5642                 ctxt->exception.vector = -1;
5643                 ctxt->perm_ok = false;
5644
5645                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5646
5647                 r = x86_decode_insn(ctxt, insn, insn_len);
5648
5649                 trace_kvm_emulate_insn_start(vcpu);
5650                 ++vcpu->stat.insn_emulation;
5651                 if (r != EMULATION_OK)  {
5652                         if (emulation_type & EMULTYPE_TRAP_UD)
5653                                 return EMULATE_FAIL;
5654                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5655                                                 emulation_type))
5656                                 return EMULATE_DONE;
5657                         if (emulation_type & EMULTYPE_SKIP)
5658                                 return EMULATE_FAIL;
5659                         return handle_emulation_failure(vcpu);
5660                 }
5661         }
5662
5663         if (emulation_type & EMULTYPE_SKIP) {
5664                 kvm_rip_write(vcpu, ctxt->_eip);
5665                 if (ctxt->eflags & X86_EFLAGS_RF)
5666                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5667                 return EMULATE_DONE;
5668         }
5669
5670         if (retry_instruction(ctxt, cr2, emulation_type))
5671                 return EMULATE_DONE;
5672
5673         /* this is needed for vmware backdoor interface to work since it
5674            changes registers values  during IO operation */
5675         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5676                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5677                 emulator_invalidate_register_cache(ctxt);
5678         }
5679
5680 restart:
5681         r = x86_emulate_insn(ctxt);
5682
5683         if (r == EMULATION_INTERCEPTED)
5684                 return EMULATE_DONE;
5685
5686         if (r == EMULATION_FAILED) {
5687                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5688                                         emulation_type))
5689                         return EMULATE_DONE;
5690
5691                 return handle_emulation_failure(vcpu);
5692         }
5693
5694         if (ctxt->have_exception) {
5695                 r = EMULATE_DONE;
5696                 if (inject_emulated_exception(vcpu))
5697                         return r;
5698         } else if (vcpu->arch.pio.count) {
5699                 if (!vcpu->arch.pio.in) {
5700                         /* FIXME: return into emulator if single-stepping.  */
5701                         vcpu->arch.pio.count = 0;
5702                 } else {
5703                         writeback = false;
5704                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5705                 }
5706                 r = EMULATE_USER_EXIT;
5707         } else if (vcpu->mmio_needed) {
5708                 if (!vcpu->mmio_is_write)
5709                         writeback = false;
5710                 r = EMULATE_USER_EXIT;
5711                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5712         } else if (r == EMULATION_RESTART)
5713                 goto restart;
5714         else
5715                 r = EMULATE_DONE;
5716
5717         if (writeback) {
5718                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5719                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5720                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5721                 if (vcpu->arch.hflags != ctxt->emul_flags)
5722                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5723                 kvm_rip_write(vcpu, ctxt->eip);
5724                 if (r == EMULATE_DONE)
5725                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5726                 if (!ctxt->have_exception ||
5727                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5728                         __kvm_set_rflags(vcpu, ctxt->eflags);
5729
5730                 /*
5731                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5732                  * do nothing, and it will be requested again as soon as
5733                  * the shadow expires.  But we still need to check here,
5734                  * because POPF has no interrupt shadow.
5735                  */
5736                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5737                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5738         } else
5739                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5740
5741         return r;
5742 }
5743 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5744
5745 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5746 {
5747         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5748         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5749                                             size, port, &val, 1);
5750         /* do not return to emulator after return from userspace */
5751         vcpu->arch.pio.count = 0;
5752         return ret;
5753 }
5754 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5755
5756 static void tsc_bad(void *info)
5757 {
5758         __this_cpu_write(cpu_tsc_khz, 0);
5759 }
5760
5761 static void tsc_khz_changed(void *data)
5762 {
5763         struct cpufreq_freqs *freq = data;
5764         unsigned long khz = 0;
5765
5766         if (data)
5767                 khz = freq->new;
5768         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5769                 khz = cpufreq_quick_get(raw_smp_processor_id());
5770         if (!khz)
5771                 khz = tsc_khz;
5772         __this_cpu_write(cpu_tsc_khz, khz);
5773 }
5774
5775 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5776                                      void *data)
5777 {
5778         struct cpufreq_freqs *freq = data;
5779         struct kvm *kvm;
5780         struct kvm_vcpu *vcpu;
5781         int i, send_ipi = 0;
5782
5783         /*
5784          * We allow guests to temporarily run on slowing clocks,
5785          * provided we notify them after, or to run on accelerating
5786          * clocks, provided we notify them before.  Thus time never
5787          * goes backwards.
5788          *
5789          * However, we have a problem.  We can't atomically update
5790          * the frequency of a given CPU from this function; it is
5791          * merely a notifier, which can be called from any CPU.
5792          * Changing the TSC frequency at arbitrary points in time
5793          * requires a recomputation of local variables related to
5794          * the TSC for each VCPU.  We must flag these local variables
5795          * to be updated and be sure the update takes place with the
5796          * new frequency before any guests proceed.
5797          *
5798          * Unfortunately, the combination of hotplug CPU and frequency
5799          * change creates an intractable locking scenario; the order
5800          * of when these callouts happen is undefined with respect to
5801          * CPU hotplug, and they can race with each other.  As such,
5802          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5803          * undefined; you can actually have a CPU frequency change take
5804          * place in between the computation of X and the setting of the
5805          * variable.  To protect against this problem, all updates of
5806          * the per_cpu tsc_khz variable are done in an interrupt
5807          * protected IPI, and all callers wishing to update the value
5808          * must wait for a synchronous IPI to complete (which is trivial
5809          * if the caller is on the CPU already).  This establishes the
5810          * necessary total order on variable updates.
5811          *
5812          * Note that because a guest time update may take place
5813          * anytime after the setting of the VCPU's request bit, the
5814          * correct TSC value must be set before the request.  However,
5815          * to ensure the update actually makes it to any guest which
5816          * starts running in hardware virtualization between the set
5817          * and the acquisition of the spinlock, we must also ping the
5818          * CPU after setting the request bit.
5819          *
5820          */
5821
5822         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5823                 return 0;
5824         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5825                 return 0;
5826
5827         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5828
5829         spin_lock(&kvm_lock);
5830         list_for_each_entry(kvm, &vm_list, vm_list) {
5831                 kvm_for_each_vcpu(i, vcpu, kvm) {
5832                         if (vcpu->cpu != freq->cpu)
5833                                 continue;
5834                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5835                         if (vcpu->cpu != smp_processor_id())
5836                                 send_ipi = 1;
5837                 }
5838         }
5839         spin_unlock(&kvm_lock);
5840
5841         if (freq->old < freq->new && send_ipi) {
5842                 /*
5843                  * We upscale the frequency.  Must make the guest
5844                  * doesn't see old kvmclock values while running with
5845                  * the new frequency, otherwise we risk the guest sees
5846                  * time go backwards.
5847                  *
5848                  * In case we update the frequency for another cpu
5849                  * (which might be in guest context) send an interrupt
5850                  * to kick the cpu out of guest context.  Next time
5851                  * guest context is entered kvmclock will be updated,
5852                  * so the guest will not see stale values.
5853                  */
5854                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5855         }
5856         return 0;
5857 }
5858
5859 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5860         .notifier_call  = kvmclock_cpufreq_notifier
5861 };
5862
5863 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5864                                         unsigned long action, void *hcpu)
5865 {
5866         unsigned int cpu = (unsigned long)hcpu;
5867
5868         switch (action) {
5869                 case CPU_ONLINE:
5870                 case CPU_DOWN_FAILED:
5871                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5872                         break;
5873                 case CPU_DOWN_PREPARE:
5874                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5875                         break;
5876         }
5877         return NOTIFY_OK;
5878 }
5879
5880 static struct notifier_block kvmclock_cpu_notifier_block = {
5881         .notifier_call  = kvmclock_cpu_notifier,
5882         .priority = -INT_MAX
5883 };
5884
5885 static void kvm_timer_init(void)
5886 {
5887         int cpu;
5888
5889         max_tsc_khz = tsc_khz;
5890
5891         cpu_notifier_register_begin();
5892         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5893 #ifdef CONFIG_CPU_FREQ
5894                 struct cpufreq_policy policy;
5895                 memset(&policy, 0, sizeof(policy));
5896                 cpu = get_cpu();
5897                 cpufreq_get_policy(&policy, cpu);
5898                 if (policy.cpuinfo.max_freq)
5899                         max_tsc_khz = policy.cpuinfo.max_freq;
5900                 put_cpu();
5901 #endif
5902                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5903                                           CPUFREQ_TRANSITION_NOTIFIER);
5904         }
5905         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5906         for_each_online_cpu(cpu)
5907                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5908
5909         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5910         cpu_notifier_register_done();
5911
5912 }
5913
5914 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5915
5916 int kvm_is_in_guest(void)
5917 {
5918         return __this_cpu_read(current_vcpu) != NULL;
5919 }
5920
5921 static int kvm_is_user_mode(void)
5922 {
5923         int user_mode = 3;
5924
5925         if (__this_cpu_read(current_vcpu))
5926                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5927
5928         return user_mode != 0;
5929 }
5930
5931 static unsigned long kvm_get_guest_ip(void)
5932 {
5933         unsigned long ip = 0;
5934
5935         if (__this_cpu_read(current_vcpu))
5936                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5937
5938         return ip;
5939 }
5940
5941 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5942         .is_in_guest            = kvm_is_in_guest,
5943         .is_user_mode           = kvm_is_user_mode,
5944         .get_guest_ip           = kvm_get_guest_ip,
5945 };
5946
5947 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5948 {
5949         __this_cpu_write(current_vcpu, vcpu);
5950 }
5951 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5952
5953 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5954 {
5955         __this_cpu_write(current_vcpu, NULL);
5956 }
5957 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5958
5959 static void kvm_set_mmio_spte_mask(void)
5960 {
5961         u64 mask;
5962         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5963
5964         /*
5965          * Set the reserved bits and the present bit of an paging-structure
5966          * entry to generate page fault with PFER.RSV = 1.
5967          */
5968          /* Mask the reserved physical address bits. */
5969         mask = rsvd_bits(maxphyaddr, 51);
5970
5971         /* Bit 62 is always reserved for 32bit host. */
5972         mask |= 0x3ull << 62;
5973
5974         /* Set the present bit. */
5975         mask |= 1ull;
5976
5977 #ifdef CONFIG_X86_64
5978         /*
5979          * If reserved bit is not supported, clear the present bit to disable
5980          * mmio page fault.
5981          */
5982         if (maxphyaddr == 52)
5983                 mask &= ~1ull;
5984 #endif
5985
5986         kvm_mmu_set_mmio_spte_mask(mask);
5987 }
5988
5989 #ifdef CONFIG_X86_64
5990 static void pvclock_gtod_update_fn(struct work_struct *work)
5991 {
5992         struct kvm *kvm;
5993
5994         struct kvm_vcpu *vcpu;
5995         int i;
5996
5997         spin_lock(&kvm_lock);
5998         list_for_each_entry(kvm, &vm_list, vm_list)
5999                 kvm_for_each_vcpu(i, vcpu, kvm)
6000                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6001         atomic_set(&kvm_guest_has_master_clock, 0);
6002         spin_unlock(&kvm_lock);
6003 }
6004
6005 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6006
6007 /*
6008  * Notification about pvclock gtod data update.
6009  */
6010 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6011                                void *priv)
6012 {
6013         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6014         struct timekeeper *tk = priv;
6015
6016         update_pvclock_gtod(tk);
6017
6018         /* disable master clock if host does not trust, or does not
6019          * use, TSC clocksource
6020          */
6021         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6022             atomic_read(&kvm_guest_has_master_clock) != 0)
6023                 queue_work(system_long_wq, &pvclock_gtod_work);
6024
6025         return 0;
6026 }
6027
6028 static struct notifier_block pvclock_gtod_notifier = {
6029         .notifier_call = pvclock_gtod_notify,
6030 };
6031 #endif
6032
6033 int kvm_arch_init(void *opaque)
6034 {
6035         int r;
6036         struct kvm_x86_ops *ops = opaque;
6037
6038         if (kvm_x86_ops) {
6039                 printk(KERN_ERR "kvm: already loaded the other module\n");
6040                 r = -EEXIST;
6041                 goto out;
6042         }
6043
6044         if (!ops->cpu_has_kvm_support()) {
6045                 printk(KERN_ERR "kvm: no hardware support\n");
6046                 r = -EOPNOTSUPP;
6047                 goto out;
6048         }
6049         if (ops->disabled_by_bios()) {
6050                 printk(KERN_ERR "kvm: disabled by bios\n");
6051                 r = -EOPNOTSUPP;
6052                 goto out;
6053         }
6054
6055         r = -ENOMEM;
6056         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6057         if (!shared_msrs) {
6058                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6059                 goto out;
6060         }
6061
6062         r = kvm_mmu_module_init();
6063         if (r)
6064                 goto out_free_percpu;
6065
6066         kvm_set_mmio_spte_mask();
6067
6068         kvm_x86_ops = ops;
6069
6070         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6071                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
6072
6073         kvm_timer_init();
6074
6075         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6076
6077         if (cpu_has_xsave)
6078                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6079
6080         kvm_lapic_init();
6081 #ifdef CONFIG_X86_64
6082         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6083 #endif
6084
6085         return 0;
6086
6087 out_free_percpu:
6088         free_percpu(shared_msrs);
6089 out:
6090         return r;
6091 }
6092
6093 void kvm_arch_exit(void)
6094 {
6095         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6096
6097         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6098                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6099                                             CPUFREQ_TRANSITION_NOTIFIER);
6100         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
6101 #ifdef CONFIG_X86_64
6102         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6103 #endif
6104         kvm_x86_ops = NULL;
6105         kvm_mmu_module_exit();
6106         free_percpu(shared_msrs);
6107 }
6108
6109 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6110 {
6111         ++vcpu->stat.halt_exits;
6112         if (irqchip_in_kernel(vcpu->kvm)) {
6113                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6114                 return 1;
6115         } else {
6116                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6117                 return 0;
6118         }
6119 }
6120 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6121
6122 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6123 {
6124         kvm_x86_ops->skip_emulated_instruction(vcpu);
6125         return kvm_vcpu_halt(vcpu);
6126 }
6127 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6128
6129 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
6130 {
6131         u64 param, ingpa, outgpa, ret;
6132         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
6133         bool fast, longmode;
6134
6135         /*
6136          * hypercall generates UD from non zero cpl and real mode
6137          * per HYPER-V spec
6138          */
6139         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
6140                 kvm_queue_exception(vcpu, UD_VECTOR);
6141                 return 0;
6142         }
6143
6144         longmode = is_64_bit_mode(vcpu);
6145
6146         if (!longmode) {
6147                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
6148                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
6149                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
6150                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
6151                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
6152                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
6153         }
6154 #ifdef CONFIG_X86_64
6155         else {
6156                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
6157                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
6158                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
6159         }
6160 #endif
6161
6162         code = param & 0xffff;
6163         fast = (param >> 16) & 0x1;
6164         rep_cnt = (param >> 32) & 0xfff;
6165         rep_idx = (param >> 48) & 0xfff;
6166
6167         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
6168
6169         switch (code) {
6170         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
6171                 kvm_vcpu_on_spin(vcpu);
6172                 break;
6173         default:
6174                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
6175                 break;
6176         }
6177
6178         ret = res | (((u64)rep_done & 0xfff) << 32);
6179         if (longmode) {
6180                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6181         } else {
6182                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
6183                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
6184         }
6185
6186         return 1;
6187 }
6188
6189 /*
6190  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6191  *
6192  * @apicid - apicid of vcpu to be kicked.
6193  */
6194 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6195 {
6196         struct kvm_lapic_irq lapic_irq;
6197
6198         lapic_irq.shorthand = 0;
6199         lapic_irq.dest_mode = 0;
6200         lapic_irq.dest_id = apicid;
6201         lapic_irq.msi_redir_hint = false;
6202
6203         lapic_irq.delivery_mode = APIC_DM_REMRD;
6204         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6205 }
6206
6207 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6208 {
6209         unsigned long nr, a0, a1, a2, a3, ret;
6210         int op_64_bit, r = 1;
6211
6212         kvm_x86_ops->skip_emulated_instruction(vcpu);
6213
6214         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6215                 return kvm_hv_hypercall(vcpu);
6216
6217         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6218         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6219         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6220         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6221         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6222
6223         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6224
6225         op_64_bit = is_64_bit_mode(vcpu);
6226         if (!op_64_bit) {
6227                 nr &= 0xFFFFFFFF;
6228                 a0 &= 0xFFFFFFFF;
6229                 a1 &= 0xFFFFFFFF;
6230                 a2 &= 0xFFFFFFFF;
6231                 a3 &= 0xFFFFFFFF;
6232         }
6233
6234         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6235                 ret = -KVM_EPERM;
6236                 goto out;
6237         }
6238
6239         switch (nr) {
6240         case KVM_HC_VAPIC_POLL_IRQ:
6241                 ret = 0;
6242                 break;
6243         case KVM_HC_KICK_CPU:
6244                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6245                 ret = 0;
6246                 break;
6247         default:
6248                 ret = -KVM_ENOSYS;
6249                 break;
6250         }
6251 out:
6252         if (!op_64_bit)
6253                 ret = (u32)ret;
6254         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6255         ++vcpu->stat.hypercalls;
6256         return r;
6257 }
6258 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6259
6260 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6261 {
6262         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6263         char instruction[3];
6264         unsigned long rip = kvm_rip_read(vcpu);
6265
6266         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6267
6268         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6269 }
6270
6271 /*
6272  * Check if userspace requested an interrupt window, and that the
6273  * interrupt window is open.
6274  *
6275  * No need to exit to userspace if we already have an interrupt queued.
6276  */
6277 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6278 {
6279         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
6280                 vcpu->run->request_interrupt_window &&
6281                 kvm_arch_interrupt_allowed(vcpu));
6282 }
6283
6284 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6285 {
6286         struct kvm_run *kvm_run = vcpu->run;
6287
6288         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6289         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6290         kvm_run->cr8 = kvm_get_cr8(vcpu);
6291         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6292         if (irqchip_in_kernel(vcpu->kvm))
6293                 kvm_run->ready_for_interrupt_injection = 1;
6294         else
6295                 kvm_run->ready_for_interrupt_injection =
6296                         kvm_arch_interrupt_allowed(vcpu) &&
6297                         !kvm_cpu_has_interrupt(vcpu) &&
6298                         !kvm_event_needs_reinjection(vcpu);
6299 }
6300
6301 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6302 {
6303         int max_irr, tpr;
6304
6305         if (!kvm_x86_ops->update_cr8_intercept)
6306                 return;
6307
6308         if (!vcpu->arch.apic)
6309                 return;
6310
6311         if (!vcpu->arch.apic->vapic_addr)
6312                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6313         else
6314                 max_irr = -1;
6315
6316         if (max_irr != -1)
6317                 max_irr >>= 4;
6318
6319         tpr = kvm_lapic_get_cr8(vcpu);
6320
6321         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6322 }
6323
6324 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6325 {
6326         int r;
6327
6328         /* try to reinject previous events if any */
6329         if (vcpu->arch.exception.pending) {
6330                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6331                                         vcpu->arch.exception.has_error_code,
6332                                         vcpu->arch.exception.error_code);
6333
6334                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6335                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6336                                              X86_EFLAGS_RF);
6337
6338                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6339                     (vcpu->arch.dr7 & DR7_GD)) {
6340                         vcpu->arch.dr7 &= ~DR7_GD;
6341                         kvm_update_dr7(vcpu);
6342                 }
6343
6344                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6345                                           vcpu->arch.exception.has_error_code,
6346                                           vcpu->arch.exception.error_code,
6347                                           vcpu->arch.exception.reinject);
6348                 return 0;
6349         }
6350
6351         if (vcpu->arch.nmi_injected) {
6352                 kvm_x86_ops->set_nmi(vcpu);
6353                 return 0;
6354         }
6355
6356         if (vcpu->arch.interrupt.pending) {
6357                 kvm_x86_ops->set_irq(vcpu);
6358                 return 0;
6359         }
6360
6361         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6362                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6363                 if (r != 0)
6364                         return r;
6365         }
6366
6367         /* try to inject new event if pending */
6368         if (vcpu->arch.nmi_pending) {
6369                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6370                         --vcpu->arch.nmi_pending;
6371                         vcpu->arch.nmi_injected = true;
6372                         kvm_x86_ops->set_nmi(vcpu);
6373                 }
6374         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6375                 /*
6376                  * Because interrupts can be injected asynchronously, we are
6377                  * calling check_nested_events again here to avoid a race condition.
6378                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6379                  * proposal and current concerns.  Perhaps we should be setting
6380                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6381                  */
6382                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6383                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6384                         if (r != 0)
6385                                 return r;
6386                 }
6387                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6388                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6389                                             false);
6390                         kvm_x86_ops->set_irq(vcpu);
6391                 }
6392         }
6393         return 0;
6394 }
6395
6396 static void process_nmi(struct kvm_vcpu *vcpu)
6397 {
6398         unsigned limit = 2;
6399
6400         /*
6401          * x86 is limited to one NMI running, and one NMI pending after it.
6402          * If an NMI is already in progress, limit further NMIs to just one.
6403          * Otherwise, allow two (and we'll inject the first one immediately).
6404          */
6405         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6406                 limit = 1;
6407
6408         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6409         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6410         kvm_make_request(KVM_REQ_EVENT, vcpu);
6411 }
6412
6413 #define put_smstate(type, buf, offset, val)                       \
6414         *(type *)((buf) + (offset) - 0x7e00) = val
6415
6416 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6417 {
6418         u32 flags = 0;
6419         flags |= seg->g       << 23;
6420         flags |= seg->db      << 22;
6421         flags |= seg->l       << 21;
6422         flags |= seg->avl     << 20;
6423         flags |= seg->present << 15;
6424         flags |= seg->dpl     << 13;
6425         flags |= seg->s       << 12;
6426         flags |= seg->type    << 8;
6427         return flags;
6428 }
6429
6430 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6431 {
6432         struct kvm_segment seg;
6433         int offset;
6434
6435         kvm_get_segment(vcpu, &seg, n);
6436         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6437
6438         if (n < 3)
6439                 offset = 0x7f84 + n * 12;
6440         else
6441                 offset = 0x7f2c + (n - 3) * 12;
6442
6443         put_smstate(u32, buf, offset + 8, seg.base);
6444         put_smstate(u32, buf, offset + 4, seg.limit);
6445         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6446 }
6447
6448 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6449 {
6450         struct kvm_segment seg;
6451         int offset;
6452         u16 flags;
6453
6454         kvm_get_segment(vcpu, &seg, n);
6455         offset = 0x7e00 + n * 16;
6456
6457         flags = process_smi_get_segment_flags(&seg) >> 8;
6458         put_smstate(u16, buf, offset, seg.selector);
6459         put_smstate(u16, buf, offset + 2, flags);
6460         put_smstate(u32, buf, offset + 4, seg.limit);
6461         put_smstate(u64, buf, offset + 8, seg.base);
6462 }
6463
6464 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6465 {
6466         struct desc_ptr dt;
6467         struct kvm_segment seg;
6468         unsigned long val;
6469         int i;
6470
6471         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6472         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6473         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6474         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6475
6476         for (i = 0; i < 8; i++)
6477                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6478
6479         kvm_get_dr(vcpu, 6, &val);
6480         put_smstate(u32, buf, 0x7fcc, (u32)val);
6481         kvm_get_dr(vcpu, 7, &val);
6482         put_smstate(u32, buf, 0x7fc8, (u32)val);
6483
6484         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6485         put_smstate(u32, buf, 0x7fc4, seg.selector);
6486         put_smstate(u32, buf, 0x7f64, seg.base);
6487         put_smstate(u32, buf, 0x7f60, seg.limit);
6488         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6489
6490         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6491         put_smstate(u32, buf, 0x7fc0, seg.selector);
6492         put_smstate(u32, buf, 0x7f80, seg.base);
6493         put_smstate(u32, buf, 0x7f7c, seg.limit);
6494         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6495
6496         kvm_x86_ops->get_gdt(vcpu, &dt);
6497         put_smstate(u32, buf, 0x7f74, dt.address);
6498         put_smstate(u32, buf, 0x7f70, dt.size);
6499
6500         kvm_x86_ops->get_idt(vcpu, &dt);
6501         put_smstate(u32, buf, 0x7f58, dt.address);
6502         put_smstate(u32, buf, 0x7f54, dt.size);
6503
6504         for (i = 0; i < 6; i++)
6505                 process_smi_save_seg_32(vcpu, buf, i);
6506
6507         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6508
6509         /* revision id */
6510         put_smstate(u32, buf, 0x7efc, 0x00020000);
6511         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6512 }
6513
6514 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6515 {
6516 #ifdef CONFIG_X86_64
6517         struct desc_ptr dt;
6518         struct kvm_segment seg;
6519         unsigned long val;
6520         int i;
6521
6522         for (i = 0; i < 16; i++)
6523                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6524
6525         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6526         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6527
6528         kvm_get_dr(vcpu, 6, &val);
6529         put_smstate(u64, buf, 0x7f68, val);
6530         kvm_get_dr(vcpu, 7, &val);
6531         put_smstate(u64, buf, 0x7f60, val);
6532
6533         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6534         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6535         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6536
6537         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6538
6539         /* revision id */
6540         put_smstate(u32, buf, 0x7efc, 0x00020064);
6541
6542         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6543
6544         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6545         put_smstate(u16, buf, 0x7e90, seg.selector);
6546         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6547         put_smstate(u32, buf, 0x7e94, seg.limit);
6548         put_smstate(u64, buf, 0x7e98, seg.base);
6549
6550         kvm_x86_ops->get_idt(vcpu, &dt);
6551         put_smstate(u32, buf, 0x7e84, dt.size);
6552         put_smstate(u64, buf, 0x7e88, dt.address);
6553
6554         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6555         put_smstate(u16, buf, 0x7e70, seg.selector);
6556         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6557         put_smstate(u32, buf, 0x7e74, seg.limit);
6558         put_smstate(u64, buf, 0x7e78, seg.base);
6559
6560         kvm_x86_ops->get_gdt(vcpu, &dt);
6561         put_smstate(u32, buf, 0x7e64, dt.size);
6562         put_smstate(u64, buf, 0x7e68, dt.address);
6563
6564         for (i = 0; i < 6; i++)
6565                 process_smi_save_seg_64(vcpu, buf, i);
6566 #else
6567         WARN_ON_ONCE(1);
6568 #endif
6569 }
6570
6571 static void process_smi(struct kvm_vcpu *vcpu)
6572 {
6573         struct kvm_segment cs, ds;
6574         char buf[512];
6575         u32 cr0;
6576
6577         if (is_smm(vcpu)) {
6578                 vcpu->arch.smi_pending = true;
6579                 return;
6580         }
6581
6582         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6583         vcpu->arch.hflags |= HF_SMM_MASK;
6584         memset(buf, 0, 512);
6585         if (guest_cpuid_has_longmode(vcpu))
6586                 process_smi_save_state_64(vcpu, buf);
6587         else
6588                 process_smi_save_state_32(vcpu, buf);
6589
6590         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6591
6592         if (kvm_x86_ops->get_nmi_mask(vcpu))
6593                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6594         else
6595                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6596
6597         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6598         kvm_rip_write(vcpu, 0x8000);
6599
6600         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6601         kvm_x86_ops->set_cr0(vcpu, cr0);
6602         vcpu->arch.cr0 = cr0;
6603
6604         kvm_x86_ops->set_cr4(vcpu, 0);
6605
6606         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6607
6608         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6609         cs.base = vcpu->arch.smbase;
6610
6611         ds.selector = 0;
6612         ds.base = 0;
6613
6614         cs.limit    = ds.limit = 0xffffffff;
6615         cs.type     = ds.type = 0x3;
6616         cs.dpl      = ds.dpl = 0;
6617         cs.db       = ds.db = 0;
6618         cs.s        = ds.s = 1;
6619         cs.l        = ds.l = 0;
6620         cs.g        = ds.g = 1;
6621         cs.avl      = ds.avl = 0;
6622         cs.present  = ds.present = 1;
6623         cs.unusable = ds.unusable = 0;
6624         cs.padding  = ds.padding = 0;
6625
6626         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6627         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6628         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6629         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6630         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6631         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6632
6633         if (guest_cpuid_has_longmode(vcpu))
6634                 kvm_x86_ops->set_efer(vcpu, 0);
6635
6636         kvm_update_cpuid(vcpu);
6637         kvm_mmu_reset_context(vcpu);
6638 }
6639
6640 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6641 {
6642         u64 eoi_exit_bitmap[4];
6643         u32 tmr[8];
6644
6645         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6646                 return;
6647
6648         memset(eoi_exit_bitmap, 0, 32);
6649         memset(tmr, 0, 32);
6650
6651         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6652         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6653         kvm_apic_update_tmr(vcpu, tmr);
6654 }
6655
6656 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6657 {
6658         ++vcpu->stat.tlb_flush;
6659         kvm_x86_ops->tlb_flush(vcpu);
6660 }
6661
6662 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6663 {
6664         struct page *page = NULL;
6665
6666         if (!irqchip_in_kernel(vcpu->kvm))
6667                 return;
6668
6669         if (!kvm_x86_ops->set_apic_access_page_addr)
6670                 return;
6671
6672         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6673         if (is_error_page(page))
6674                 return;
6675         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6676
6677         /*
6678          * Do not pin apic access page in memory, the MMU notifier
6679          * will call us again if it is migrated or swapped out.
6680          */
6681         put_page(page);
6682 }
6683 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6684
6685 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6686                                            unsigned long address)
6687 {
6688         /*
6689          * The physical address of apic access page is stored in the VMCS.
6690          * Update it when it becomes invalid.
6691          */
6692         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6693                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6694 }
6695
6696 /*
6697  * Returns 1 to let vcpu_run() continue the guest execution loop without
6698  * exiting to the userspace.  Otherwise, the value will be returned to the
6699  * userspace.
6700  */
6701 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6702 {
6703         int r;
6704         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6705                 vcpu->run->request_interrupt_window;
6706         bool req_immediate_exit = false;
6707
6708         if (vcpu->requests) {
6709                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6710                         kvm_mmu_unload(vcpu);
6711                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6712                         __kvm_migrate_timers(vcpu);
6713                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6714                         kvm_gen_update_masterclock(vcpu->kvm);
6715                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6716                         kvm_gen_kvmclock_update(vcpu);
6717                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6718                         r = kvm_guest_time_update(vcpu);
6719                         if (unlikely(r))
6720                                 goto out;
6721                 }
6722                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6723                         kvm_mmu_sync_roots(vcpu);
6724                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6725                         kvm_vcpu_flush_tlb(vcpu);
6726                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6727                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6728                         r = 0;
6729                         goto out;
6730                 }
6731                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6732                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6733                         r = 0;
6734                         goto out;
6735                 }
6736                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6737                         vcpu->fpu_active = 0;
6738                         kvm_x86_ops->fpu_deactivate(vcpu);
6739                 }
6740                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6741                         /* Page is swapped out. Do synthetic halt */
6742                         vcpu->arch.apf.halted = true;
6743                         r = 1;
6744                         goto out;
6745                 }
6746                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6747                         record_steal_time(vcpu);
6748                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6749                         process_smi(vcpu);
6750                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6751                         process_nmi(vcpu);
6752                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6753                         kvm_handle_pmu_event(vcpu);
6754                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6755                         kvm_deliver_pmi(vcpu);
6756                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6757                         vcpu_scan_ioapic(vcpu);
6758                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6759                         kvm_vcpu_reload_apic_access_page(vcpu);
6760         }
6761
6762         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6763                 kvm_apic_accept_events(vcpu);
6764                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6765                         r = 1;
6766                         goto out;
6767                 }
6768
6769                 if (inject_pending_event(vcpu, req_int_win) != 0)
6770                         req_immediate_exit = true;
6771                 /* enable NMI/IRQ window open exits if needed */
6772                 else if (vcpu->arch.nmi_pending)
6773                         kvm_x86_ops->enable_nmi_window(vcpu);
6774                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6775                         kvm_x86_ops->enable_irq_window(vcpu);
6776
6777                 if (kvm_lapic_enabled(vcpu)) {
6778                         /*
6779                          * Update architecture specific hints for APIC
6780                          * virtual interrupt delivery.
6781                          */
6782                         if (kvm_x86_ops->hwapic_irr_update)
6783                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6784                                         kvm_lapic_find_highest_irr(vcpu));
6785                         update_cr8_intercept(vcpu);
6786                         kvm_lapic_sync_to_vapic(vcpu);
6787                 }
6788         }
6789
6790         r = kvm_mmu_reload(vcpu);
6791         if (unlikely(r)) {
6792                 goto cancel_injection;
6793         }
6794
6795         preempt_disable();
6796
6797         kvm_x86_ops->prepare_guest_switch(vcpu);
6798         if (vcpu->fpu_active)
6799                 kvm_load_guest_fpu(vcpu);
6800         kvm_load_guest_xcr0(vcpu);
6801
6802         vcpu->mode = IN_GUEST_MODE;
6803
6804         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6805
6806         /* We should set ->mode before check ->requests,
6807          * see the comment in make_all_cpus_request.
6808          */
6809         smp_mb__after_srcu_read_unlock();
6810
6811         local_irq_disable();
6812
6813         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6814             || need_resched() || signal_pending(current)) {
6815                 vcpu->mode = OUTSIDE_GUEST_MODE;
6816                 smp_wmb();
6817                 local_irq_enable();
6818                 preempt_enable();
6819                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6820                 r = 1;
6821                 goto cancel_injection;
6822         }
6823
6824         if (req_immediate_exit)
6825                 smp_send_reschedule(vcpu->cpu);
6826
6827         __kvm_guest_enter();
6828
6829         if (unlikely(vcpu->arch.switch_db_regs)) {
6830                 set_debugreg(0, 7);
6831                 set_debugreg(vcpu->arch.eff_db[0], 0);
6832                 set_debugreg(vcpu->arch.eff_db[1], 1);
6833                 set_debugreg(vcpu->arch.eff_db[2], 2);
6834                 set_debugreg(vcpu->arch.eff_db[3], 3);
6835                 set_debugreg(vcpu->arch.dr6, 6);
6836                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6837         }
6838
6839         trace_kvm_entry(vcpu->vcpu_id);
6840         wait_lapic_expire(vcpu);
6841         kvm_x86_ops->run(vcpu);
6842
6843         /*
6844          * Do this here before restoring debug registers on the host.  And
6845          * since we do this before handling the vmexit, a DR access vmexit
6846          * can (a) read the correct value of the debug registers, (b) set
6847          * KVM_DEBUGREG_WONT_EXIT again.
6848          */
6849         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6850                 int i;
6851
6852                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6853                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6854                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6855                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6856         }
6857
6858         /*
6859          * If the guest has used debug registers, at least dr7
6860          * will be disabled while returning to the host.
6861          * If we don't have active breakpoints in the host, we don't
6862          * care about the messed up debug address registers. But if
6863          * we have some of them active, restore the old state.
6864          */
6865         if (hw_breakpoint_active())
6866                 hw_breakpoint_restore();
6867
6868         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6869                                                            native_read_tsc());
6870
6871         vcpu->mode = OUTSIDE_GUEST_MODE;
6872         smp_wmb();
6873
6874         /* Interrupt is enabled by handle_external_intr() */
6875         kvm_x86_ops->handle_external_intr(vcpu);
6876
6877         ++vcpu->stat.exits;
6878
6879         /*
6880          * We must have an instruction between local_irq_enable() and
6881          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6882          * the interrupt shadow.  The stat.exits increment will do nicely.
6883          * But we need to prevent reordering, hence this barrier():
6884          */
6885         barrier();
6886
6887         kvm_guest_exit();
6888
6889         preempt_enable();
6890
6891         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6892
6893         /*
6894          * Profile KVM exit RIPs:
6895          */
6896         if (unlikely(prof_on == KVM_PROFILING)) {
6897                 unsigned long rip = kvm_rip_read(vcpu);
6898                 profile_hit(KVM_PROFILING, (void *)rip);
6899         }
6900
6901         if (unlikely(vcpu->arch.tsc_always_catchup))
6902                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6903
6904         if (vcpu->arch.apic_attention)
6905                 kvm_lapic_sync_from_vapic(vcpu);
6906
6907         r = kvm_x86_ops->handle_exit(vcpu);
6908         return r;
6909
6910 cancel_injection:
6911         kvm_x86_ops->cancel_injection(vcpu);
6912         if (unlikely(vcpu->arch.apic_attention))
6913                 kvm_lapic_sync_from_vapic(vcpu);
6914 out:
6915         return r;
6916 }
6917
6918 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6919 {
6920         if (!kvm_arch_vcpu_runnable(vcpu)) {
6921                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6922                 kvm_vcpu_block(vcpu);
6923                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6924                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6925                         return 1;
6926         }
6927
6928         kvm_apic_accept_events(vcpu);
6929         switch(vcpu->arch.mp_state) {
6930         case KVM_MP_STATE_HALTED:
6931                 vcpu->arch.pv.pv_unhalted = false;
6932                 vcpu->arch.mp_state =
6933                         KVM_MP_STATE_RUNNABLE;
6934         case KVM_MP_STATE_RUNNABLE:
6935                 vcpu->arch.apf.halted = false;
6936                 break;
6937         case KVM_MP_STATE_INIT_RECEIVED:
6938                 break;
6939         default:
6940                 return -EINTR;
6941                 break;
6942         }
6943         return 1;
6944 }
6945
6946 static int vcpu_run(struct kvm_vcpu *vcpu)
6947 {
6948         int r;
6949         struct kvm *kvm = vcpu->kvm;
6950
6951         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6952
6953         for (;;) {
6954                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6955                     !vcpu->arch.apf.halted)
6956                         r = vcpu_enter_guest(vcpu);
6957                 else
6958                         r = vcpu_block(kvm, vcpu);
6959                 if (r <= 0)
6960                         break;
6961
6962                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6963                 if (kvm_cpu_has_pending_timer(vcpu))
6964                         kvm_inject_pending_timer_irqs(vcpu);
6965
6966                 if (dm_request_for_irq_injection(vcpu)) {
6967                         r = -EINTR;
6968                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6969                         ++vcpu->stat.request_irq_exits;
6970                         break;
6971                 }
6972
6973                 kvm_check_async_pf_completion(vcpu);
6974
6975                 if (signal_pending(current)) {
6976                         r = -EINTR;
6977                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6978                         ++vcpu->stat.signal_exits;
6979                         break;
6980                 }
6981                 if (need_resched()) {
6982                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6983                         cond_resched();
6984                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6985                 }
6986         }
6987
6988         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6989
6990         return r;
6991 }
6992
6993 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6994 {
6995         int r;
6996         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6997         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6998         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6999         if (r != EMULATE_DONE)
7000                 return 0;
7001         return 1;
7002 }
7003
7004 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7005 {
7006         BUG_ON(!vcpu->arch.pio.count);
7007
7008         return complete_emulated_io(vcpu);
7009 }
7010
7011 /*
7012  * Implements the following, as a state machine:
7013  *
7014  * read:
7015  *   for each fragment
7016  *     for each mmio piece in the fragment
7017  *       write gpa, len
7018  *       exit
7019  *       copy data
7020  *   execute insn
7021  *
7022  * write:
7023  *   for each fragment
7024  *     for each mmio piece in the fragment
7025  *       write gpa, len
7026  *       copy data
7027  *       exit
7028  */
7029 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7030 {
7031         struct kvm_run *run = vcpu->run;
7032         struct kvm_mmio_fragment *frag;
7033         unsigned len;
7034
7035         BUG_ON(!vcpu->mmio_needed);
7036
7037         /* Complete previous fragment */
7038         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7039         len = min(8u, frag->len);
7040         if (!vcpu->mmio_is_write)
7041                 memcpy(frag->data, run->mmio.data, len);
7042
7043         if (frag->len <= 8) {
7044                 /* Switch to the next fragment. */
7045                 frag++;
7046                 vcpu->mmio_cur_fragment++;
7047         } else {
7048                 /* Go forward to the next mmio piece. */
7049                 frag->data += len;
7050                 frag->gpa += len;
7051                 frag->len -= len;
7052         }
7053
7054         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7055                 vcpu->mmio_needed = 0;
7056
7057                 /* FIXME: return into emulator if single-stepping.  */
7058                 if (vcpu->mmio_is_write)
7059                         return 1;
7060                 vcpu->mmio_read_completed = 1;
7061                 return complete_emulated_io(vcpu);
7062         }
7063
7064         run->exit_reason = KVM_EXIT_MMIO;
7065         run->mmio.phys_addr = frag->gpa;
7066         if (vcpu->mmio_is_write)
7067                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7068         run->mmio.len = min(8u, frag->len);
7069         run->mmio.is_write = vcpu->mmio_is_write;
7070         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7071         return 0;
7072 }
7073
7074
7075 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7076 {
7077         int r;
7078         sigset_t sigsaved;
7079
7080         if (!tsk_used_math(current) && init_fpu(current))
7081                 return -ENOMEM;
7082
7083         if (vcpu->sigset_active)
7084                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7085
7086         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7087                 kvm_vcpu_block(vcpu);
7088                 kvm_apic_accept_events(vcpu);
7089                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7090                 r = -EAGAIN;
7091                 goto out;
7092         }
7093
7094         /* re-sync apic's tpr */
7095         if (!irqchip_in_kernel(vcpu->kvm)) {
7096                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7097                         r = -EINVAL;
7098                         goto out;
7099                 }
7100         }
7101
7102         if (unlikely(vcpu->arch.complete_userspace_io)) {
7103                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7104                 vcpu->arch.complete_userspace_io = NULL;
7105                 r = cui(vcpu);
7106                 if (r <= 0)
7107                         goto out;
7108         } else
7109                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7110
7111         r = vcpu_run(vcpu);
7112
7113 out:
7114         post_kvm_run_save(vcpu);
7115         if (vcpu->sigset_active)
7116                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7117
7118         return r;
7119 }
7120
7121 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7122 {
7123         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7124                 /*
7125                  * We are here if userspace calls get_regs() in the middle of
7126                  * instruction emulation. Registers state needs to be copied
7127                  * back from emulation context to vcpu. Userspace shouldn't do
7128                  * that usually, but some bad designed PV devices (vmware
7129                  * backdoor interface) need this to work
7130                  */
7131                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7132                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7133         }
7134         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7135         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7136         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7137         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7138         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7139         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7140         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7141         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7142 #ifdef CONFIG_X86_64
7143         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7144         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7145         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7146         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7147         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7148         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7149         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7150         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7151 #endif
7152
7153         regs->rip = kvm_rip_read(vcpu);
7154         regs->rflags = kvm_get_rflags(vcpu);
7155
7156         return 0;
7157 }
7158
7159 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7160 {
7161         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7162         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7163
7164         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7165         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7166         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7167         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7168         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7169         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7170         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7171         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7172 #ifdef CONFIG_X86_64
7173         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7174         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7175         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7176         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7177         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7178         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7179         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7180         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7181 #endif
7182
7183         kvm_rip_write(vcpu, regs->rip);
7184         kvm_set_rflags(vcpu, regs->rflags);
7185
7186         vcpu->arch.exception.pending = false;
7187
7188         kvm_make_request(KVM_REQ_EVENT, vcpu);
7189
7190         return 0;
7191 }
7192
7193 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7194 {
7195         struct kvm_segment cs;
7196
7197         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7198         *db = cs.db;
7199         *l = cs.l;
7200 }
7201 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7202
7203 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7204                                   struct kvm_sregs *sregs)
7205 {
7206         struct desc_ptr dt;
7207
7208         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7209         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7210         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7211         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7212         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7213         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7214
7215         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7216         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7217
7218         kvm_x86_ops->get_idt(vcpu, &dt);
7219         sregs->idt.limit = dt.size;
7220         sregs->idt.base = dt.address;
7221         kvm_x86_ops->get_gdt(vcpu, &dt);
7222         sregs->gdt.limit = dt.size;
7223         sregs->gdt.base = dt.address;
7224
7225         sregs->cr0 = kvm_read_cr0(vcpu);
7226         sregs->cr2 = vcpu->arch.cr2;
7227         sregs->cr3 = kvm_read_cr3(vcpu);
7228         sregs->cr4 = kvm_read_cr4(vcpu);
7229         sregs->cr8 = kvm_get_cr8(vcpu);
7230         sregs->efer = vcpu->arch.efer;
7231         sregs->apic_base = kvm_get_apic_base(vcpu);
7232
7233         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7234
7235         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7236                 set_bit(vcpu->arch.interrupt.nr,
7237                         (unsigned long *)sregs->interrupt_bitmap);
7238
7239         return 0;
7240 }
7241
7242 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7243                                     struct kvm_mp_state *mp_state)
7244 {
7245         kvm_apic_accept_events(vcpu);
7246         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7247                                         vcpu->arch.pv.pv_unhalted)
7248                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7249         else
7250                 mp_state->mp_state = vcpu->arch.mp_state;
7251
7252         return 0;
7253 }
7254
7255 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7256                                     struct kvm_mp_state *mp_state)
7257 {
7258         if (!kvm_vcpu_has_lapic(vcpu) &&
7259             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7260                 return -EINVAL;
7261
7262         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7263                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7264                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7265         } else
7266                 vcpu->arch.mp_state = mp_state->mp_state;
7267         kvm_make_request(KVM_REQ_EVENT, vcpu);
7268         return 0;
7269 }
7270
7271 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7272                     int reason, bool has_error_code, u32 error_code)
7273 {
7274         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7275         int ret;
7276
7277         init_emulate_ctxt(vcpu);
7278
7279         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7280                                    has_error_code, error_code);
7281
7282         if (ret)
7283                 return EMULATE_FAIL;
7284
7285         kvm_rip_write(vcpu, ctxt->eip);
7286         kvm_set_rflags(vcpu, ctxt->eflags);
7287         kvm_make_request(KVM_REQ_EVENT, vcpu);
7288         return EMULATE_DONE;
7289 }
7290 EXPORT_SYMBOL_GPL(kvm_task_switch);
7291
7292 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7293                                   struct kvm_sregs *sregs)
7294 {
7295         struct msr_data apic_base_msr;
7296         int mmu_reset_needed = 0;
7297         int pending_vec, max_bits, idx;
7298         struct desc_ptr dt;
7299
7300         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7301                 return -EINVAL;
7302
7303         dt.size = sregs->idt.limit;
7304         dt.address = sregs->idt.base;
7305         kvm_x86_ops->set_idt(vcpu, &dt);
7306         dt.size = sregs->gdt.limit;
7307         dt.address = sregs->gdt.base;
7308         kvm_x86_ops->set_gdt(vcpu, &dt);
7309
7310         vcpu->arch.cr2 = sregs->cr2;
7311         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7312         vcpu->arch.cr3 = sregs->cr3;
7313         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7314
7315         kvm_set_cr8(vcpu, sregs->cr8);
7316
7317         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7318         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7319         apic_base_msr.data = sregs->apic_base;
7320         apic_base_msr.host_initiated = true;
7321         kvm_set_apic_base(vcpu, &apic_base_msr);
7322
7323         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7324         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7325         vcpu->arch.cr0 = sregs->cr0;
7326
7327         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7328         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7329         if (sregs->cr4 & X86_CR4_OSXSAVE)
7330                 kvm_update_cpuid(vcpu);
7331
7332         idx = srcu_read_lock(&vcpu->kvm->srcu);
7333         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7334                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7335                 mmu_reset_needed = 1;
7336         }
7337         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7338
7339         if (mmu_reset_needed)
7340                 kvm_mmu_reset_context(vcpu);
7341
7342         max_bits = KVM_NR_INTERRUPTS;
7343         pending_vec = find_first_bit(
7344                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7345         if (pending_vec < max_bits) {
7346                 kvm_queue_interrupt(vcpu, pending_vec, false);
7347                 pr_debug("Set back pending irq %d\n", pending_vec);
7348         }
7349
7350         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7351         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7352         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7353         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7354         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7355         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7356
7357         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7358         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7359
7360         update_cr8_intercept(vcpu);
7361
7362         /* Older userspace won't unhalt the vcpu on reset. */
7363         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7364             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7365             !is_protmode(vcpu))
7366                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7367
7368         kvm_make_request(KVM_REQ_EVENT, vcpu);
7369
7370         return 0;
7371 }
7372
7373 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7374                                         struct kvm_guest_debug *dbg)
7375 {
7376         unsigned long rflags;
7377         int i, r;
7378
7379         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7380                 r = -EBUSY;
7381                 if (vcpu->arch.exception.pending)
7382                         goto out;
7383                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7384                         kvm_queue_exception(vcpu, DB_VECTOR);
7385                 else
7386                         kvm_queue_exception(vcpu, BP_VECTOR);
7387         }
7388
7389         /*
7390          * Read rflags as long as potentially injected trace flags are still
7391          * filtered out.
7392          */
7393         rflags = kvm_get_rflags(vcpu);
7394
7395         vcpu->guest_debug = dbg->control;
7396         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7397                 vcpu->guest_debug = 0;
7398
7399         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7400                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7401                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7402                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7403         } else {
7404                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7405                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7406         }
7407         kvm_update_dr7(vcpu);
7408
7409         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7410                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7411                         get_segment_base(vcpu, VCPU_SREG_CS);
7412
7413         /*
7414          * Trigger an rflags update that will inject or remove the trace
7415          * flags.
7416          */
7417         kvm_set_rflags(vcpu, rflags);
7418
7419         kvm_x86_ops->update_db_bp_intercept(vcpu);
7420
7421         r = 0;
7422
7423 out:
7424
7425         return r;
7426 }
7427
7428 /*
7429  * Translate a guest virtual address to a guest physical address.
7430  */
7431 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7432                                     struct kvm_translation *tr)
7433 {
7434         unsigned long vaddr = tr->linear_address;
7435         gpa_t gpa;
7436         int idx;
7437
7438         idx = srcu_read_lock(&vcpu->kvm->srcu);
7439         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7440         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7441         tr->physical_address = gpa;
7442         tr->valid = gpa != UNMAPPED_GVA;
7443         tr->writeable = 1;
7444         tr->usermode = 0;
7445
7446         return 0;
7447 }
7448
7449 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7450 {
7451         struct i387_fxsave_struct *fxsave =
7452                         &vcpu->arch.guest_fpu.state->fxsave;
7453
7454         memcpy(fpu->fpr, fxsave->st_space, 128);
7455         fpu->fcw = fxsave->cwd;
7456         fpu->fsw = fxsave->swd;
7457         fpu->ftwx = fxsave->twd;
7458         fpu->last_opcode = fxsave->fop;
7459         fpu->last_ip = fxsave->rip;
7460         fpu->last_dp = fxsave->rdp;
7461         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7462
7463         return 0;
7464 }
7465
7466 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7467 {
7468         struct i387_fxsave_struct *fxsave =
7469                         &vcpu->arch.guest_fpu.state->fxsave;
7470
7471         memcpy(fxsave->st_space, fpu->fpr, 128);
7472         fxsave->cwd = fpu->fcw;
7473         fxsave->swd = fpu->fsw;
7474         fxsave->twd = fpu->ftwx;
7475         fxsave->fop = fpu->last_opcode;
7476         fxsave->rip = fpu->last_ip;
7477         fxsave->rdp = fpu->last_dp;
7478         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7479
7480         return 0;
7481 }
7482
7483 int fx_init(struct kvm_vcpu *vcpu, bool init_event)
7484 {
7485         int err;
7486
7487         err = fpu_alloc(&vcpu->arch.guest_fpu);
7488         if (err)
7489                 return err;
7490
7491         if (!init_event)
7492                 fpu_finit(&vcpu->arch.guest_fpu);
7493
7494         if (cpu_has_xsaves)
7495                 vcpu->arch.guest_fpu.state->xsave.xsave_hdr.xcomp_bv =
7496                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7497
7498         /*
7499          * Ensure guest xcr0 is valid for loading
7500          */
7501         vcpu->arch.xcr0 = XSTATE_FP;
7502
7503         vcpu->arch.cr0 |= X86_CR0_ET;
7504
7505         return 0;
7506 }
7507 EXPORT_SYMBOL_GPL(fx_init);
7508
7509 static void fx_free(struct kvm_vcpu *vcpu)
7510 {
7511         fpu_free(&vcpu->arch.guest_fpu);
7512 }
7513
7514 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7515 {
7516         if (vcpu->guest_fpu_loaded)
7517                 return;
7518
7519         /*
7520          * Restore all possible states in the guest,
7521          * and assume host would use all available bits.
7522          * Guest xcr0 would be loaded later.
7523          */
7524         kvm_put_guest_xcr0(vcpu);
7525         vcpu->guest_fpu_loaded = 1;
7526         __kernel_fpu_begin();
7527         fpu_restore_checking(&vcpu->arch.guest_fpu);
7528         trace_kvm_fpu(1);
7529 }
7530
7531 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7532 {
7533         kvm_put_guest_xcr0(vcpu);
7534
7535         if (!vcpu->guest_fpu_loaded) {
7536                 vcpu->fpu_counter = 0;
7537                 return;
7538         }
7539
7540         vcpu->guest_fpu_loaded = 0;
7541         fpu_save_init(&vcpu->arch.guest_fpu);
7542         __kernel_fpu_end();
7543         ++vcpu->stat.fpu_reload;
7544         /*
7545          * If using eager FPU mode, or if the guest is a frequent user
7546          * of the FPU, just leave the FPU active for next time.
7547          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7548          * the FPU in bursts will revert to loading it on demand.
7549          */
7550         if (!vcpu->arch.eager_fpu) {
7551                 if (++vcpu->fpu_counter < 5)
7552                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7553         }
7554         trace_kvm_fpu(0);
7555 }
7556
7557 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7558 {
7559         kvmclock_reset(vcpu);
7560
7561         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7562         fx_free(vcpu);
7563         kvm_x86_ops->vcpu_free(vcpu);
7564 }
7565
7566 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7567                                                 unsigned int id)
7568 {
7569         struct kvm_vcpu *vcpu;
7570
7571         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7572                 printk_once(KERN_WARNING
7573                 "kvm: SMP vm created on host with unstable TSC; "
7574                 "guest TSC will not be reliable\n");
7575
7576         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7577
7578         /*
7579          * Activate fpu unconditionally in case the guest needs eager FPU.  It will be
7580          * deactivated soon if it doesn't.
7581          */
7582         kvm_x86_ops->fpu_activate(vcpu);
7583         return vcpu;
7584 }
7585
7586 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7587 {
7588         int r;
7589
7590         vcpu->arch.mtrr_state.have_fixed = 1;
7591         r = vcpu_load(vcpu);
7592         if (r)
7593                 return r;
7594         kvm_vcpu_reset(vcpu, false);
7595         kvm_mmu_setup(vcpu);
7596         vcpu_put(vcpu);
7597
7598         return r;
7599 }
7600
7601 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7602 {
7603         struct msr_data msr;
7604         struct kvm *kvm = vcpu->kvm;
7605
7606         if (vcpu_load(vcpu))
7607                 return;
7608         msr.data = 0x0;
7609         msr.index = MSR_IA32_TSC;
7610         msr.host_initiated = true;
7611         kvm_write_tsc(vcpu, &msr);
7612         vcpu_put(vcpu);
7613
7614         if (!kvmclock_periodic_sync)
7615                 return;
7616
7617         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7618                                         KVMCLOCK_SYNC_PERIOD);
7619 }
7620
7621 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7622 {
7623         int r;
7624         vcpu->arch.apf.msr_val = 0;
7625
7626         r = vcpu_load(vcpu);
7627         BUG_ON(r);
7628         kvm_mmu_unload(vcpu);
7629         vcpu_put(vcpu);
7630
7631         fx_free(vcpu);
7632         kvm_x86_ops->vcpu_free(vcpu);
7633 }
7634
7635 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7636 {
7637         vcpu->arch.hflags = 0;
7638
7639         atomic_set(&vcpu->arch.nmi_queued, 0);
7640         vcpu->arch.nmi_pending = 0;
7641         vcpu->arch.nmi_injected = false;
7642         kvm_clear_interrupt_queue(vcpu);
7643         kvm_clear_exception_queue(vcpu);
7644
7645         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7646         kvm_update_dr0123(vcpu);
7647         vcpu->arch.dr6 = DR6_INIT;
7648         kvm_update_dr6(vcpu);
7649         vcpu->arch.dr7 = DR7_FIXED_1;
7650         kvm_update_dr7(vcpu);
7651
7652         vcpu->arch.cr2 = 0;
7653
7654         kvm_make_request(KVM_REQ_EVENT, vcpu);
7655         vcpu->arch.apf.msr_val = 0;
7656         vcpu->arch.st.msr_val = 0;
7657
7658         kvmclock_reset(vcpu);
7659
7660         kvm_clear_async_pf_completion_queue(vcpu);
7661         kvm_async_pf_hash_reset(vcpu);
7662         vcpu->arch.apf.halted = false;
7663
7664         if (!init_event) {
7665                 kvm_pmu_reset(vcpu);
7666                 vcpu->arch.smbase = 0x30000;
7667         }
7668
7669         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7670         vcpu->arch.regs_avail = ~0;
7671         vcpu->arch.regs_dirty = ~0;
7672
7673         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7674 }
7675
7676 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7677 {
7678         struct kvm_segment cs;
7679
7680         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7681         cs.selector = vector << 8;
7682         cs.base = vector << 12;
7683         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7684         kvm_rip_write(vcpu, 0);
7685 }
7686
7687 int kvm_arch_hardware_enable(void)
7688 {
7689         struct kvm *kvm;
7690         struct kvm_vcpu *vcpu;
7691         int i;
7692         int ret;
7693         u64 local_tsc;
7694         u64 max_tsc = 0;
7695         bool stable, backwards_tsc = false;
7696
7697         kvm_shared_msr_cpu_online();
7698         ret = kvm_x86_ops->hardware_enable();
7699         if (ret != 0)
7700                 return ret;
7701
7702         local_tsc = native_read_tsc();
7703         stable = !check_tsc_unstable();
7704         list_for_each_entry(kvm, &vm_list, vm_list) {
7705                 kvm_for_each_vcpu(i, vcpu, kvm) {
7706                         if (!stable && vcpu->cpu == smp_processor_id())
7707                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7708                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7709                                 backwards_tsc = true;
7710                                 if (vcpu->arch.last_host_tsc > max_tsc)
7711                                         max_tsc = vcpu->arch.last_host_tsc;
7712                         }
7713                 }
7714         }
7715
7716         /*
7717          * Sometimes, even reliable TSCs go backwards.  This happens on
7718          * platforms that reset TSC during suspend or hibernate actions, but
7719          * maintain synchronization.  We must compensate.  Fortunately, we can
7720          * detect that condition here, which happens early in CPU bringup,
7721          * before any KVM threads can be running.  Unfortunately, we can't
7722          * bring the TSCs fully up to date with real time, as we aren't yet far
7723          * enough into CPU bringup that we know how much real time has actually
7724          * elapsed; our helper function, get_kernel_ns() will be using boot
7725          * variables that haven't been updated yet.
7726          *
7727          * So we simply find the maximum observed TSC above, then record the
7728          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7729          * the adjustment will be applied.  Note that we accumulate
7730          * adjustments, in case multiple suspend cycles happen before some VCPU
7731          * gets a chance to run again.  In the event that no KVM threads get a
7732          * chance to run, we will miss the entire elapsed period, as we'll have
7733          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7734          * loose cycle time.  This isn't too big a deal, since the loss will be
7735          * uniform across all VCPUs (not to mention the scenario is extremely
7736          * unlikely). It is possible that a second hibernate recovery happens
7737          * much faster than a first, causing the observed TSC here to be
7738          * smaller; this would require additional padding adjustment, which is
7739          * why we set last_host_tsc to the local tsc observed here.
7740          *
7741          * N.B. - this code below runs only on platforms with reliable TSC,
7742          * as that is the only way backwards_tsc is set above.  Also note
7743          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7744          * have the same delta_cyc adjustment applied if backwards_tsc
7745          * is detected.  Note further, this adjustment is only done once,
7746          * as we reset last_host_tsc on all VCPUs to stop this from being
7747          * called multiple times (one for each physical CPU bringup).
7748          *
7749          * Platforms with unreliable TSCs don't have to deal with this, they
7750          * will be compensated by the logic in vcpu_load, which sets the TSC to
7751          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7752          * guarantee that they stay in perfect synchronization.
7753          */
7754         if (backwards_tsc) {
7755                 u64 delta_cyc = max_tsc - local_tsc;
7756                 backwards_tsc_observed = true;
7757                 list_for_each_entry(kvm, &vm_list, vm_list) {
7758                         kvm_for_each_vcpu(i, vcpu, kvm) {
7759                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7760                                 vcpu->arch.last_host_tsc = local_tsc;
7761                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7762                         }
7763
7764                         /*
7765                          * We have to disable TSC offset matching.. if you were
7766                          * booting a VM while issuing an S4 host suspend....
7767                          * you may have some problem.  Solving this issue is
7768                          * left as an exercise to the reader.
7769                          */
7770                         kvm->arch.last_tsc_nsec = 0;
7771                         kvm->arch.last_tsc_write = 0;
7772                 }
7773
7774         }
7775         return 0;
7776 }
7777
7778 void kvm_arch_hardware_disable(void)
7779 {
7780         kvm_x86_ops->hardware_disable();
7781         drop_user_return_notifiers();
7782 }
7783
7784 int kvm_arch_hardware_setup(void)
7785 {
7786         int r;
7787
7788         r = kvm_x86_ops->hardware_setup();
7789         if (r != 0)
7790                 return r;
7791
7792         kvm_init_msr_list();
7793         return 0;
7794 }
7795
7796 void kvm_arch_hardware_unsetup(void)
7797 {
7798         kvm_x86_ops->hardware_unsetup();
7799 }
7800
7801 void kvm_arch_check_processor_compat(void *rtn)
7802 {
7803         kvm_x86_ops->check_processor_compatibility(rtn);
7804 }
7805
7806 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7807 {
7808         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7809 }
7810
7811 struct static_key kvm_no_apic_vcpu __read_mostly;
7812
7813 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7814 {
7815         struct page *page;
7816         struct kvm *kvm;
7817         int r;
7818
7819         BUG_ON(vcpu->kvm == NULL);
7820         kvm = vcpu->kvm;
7821
7822         vcpu->arch.pv.pv_unhalted = false;
7823         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7824         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7825                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7826         else
7827                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7828
7829         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7830         if (!page) {
7831                 r = -ENOMEM;
7832                 goto fail;
7833         }
7834         vcpu->arch.pio_data = page_address(page);
7835
7836         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7837
7838         r = kvm_mmu_create(vcpu);
7839         if (r < 0)
7840                 goto fail_free_pio_data;
7841
7842         if (irqchip_in_kernel(kvm)) {
7843                 r = kvm_create_lapic(vcpu);
7844                 if (r < 0)
7845                         goto fail_mmu_destroy;
7846         } else
7847                 static_key_slow_inc(&kvm_no_apic_vcpu);
7848
7849         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7850                                        GFP_KERNEL);
7851         if (!vcpu->arch.mce_banks) {
7852                 r = -ENOMEM;
7853                 goto fail_free_lapic;
7854         }
7855         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7856
7857         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7858                 r = -ENOMEM;
7859                 goto fail_free_mce_banks;
7860         }
7861
7862         r = fx_init(vcpu, false);
7863         if (r)
7864                 goto fail_free_wbinvd_dirty_mask;
7865
7866         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7867         vcpu->arch.pv_time_enabled = false;
7868
7869         vcpu->arch.guest_supported_xcr0 = 0;
7870         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7871
7872         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7873
7874         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7875
7876         kvm_async_pf_hash_reset(vcpu);
7877         kvm_pmu_init(vcpu);
7878
7879         return 0;
7880 fail_free_wbinvd_dirty_mask:
7881         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7882 fail_free_mce_banks:
7883         kfree(vcpu->arch.mce_banks);
7884 fail_free_lapic:
7885         kvm_free_lapic(vcpu);
7886 fail_mmu_destroy:
7887         kvm_mmu_destroy(vcpu);
7888 fail_free_pio_data:
7889         free_page((unsigned long)vcpu->arch.pio_data);
7890 fail:
7891         return r;
7892 }
7893
7894 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7895 {
7896         int idx;
7897
7898         kvm_pmu_destroy(vcpu);
7899         kfree(vcpu->arch.mce_banks);
7900         kvm_free_lapic(vcpu);
7901         idx = srcu_read_lock(&vcpu->kvm->srcu);
7902         kvm_mmu_destroy(vcpu);
7903         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7904         free_page((unsigned long)vcpu->arch.pio_data);
7905         if (!irqchip_in_kernel(vcpu->kvm))
7906                 static_key_slow_dec(&kvm_no_apic_vcpu);
7907 }
7908
7909 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7910 {
7911         kvm_x86_ops->sched_in(vcpu, cpu);
7912 }
7913
7914 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7915 {
7916         if (type)
7917                 return -EINVAL;
7918
7919         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7920         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7921         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7922         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7923         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7924
7925         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7926         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7927         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7928         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7929                 &kvm->arch.irq_sources_bitmap);
7930
7931         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7932         mutex_init(&kvm->arch.apic_map_lock);
7933         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7934
7935         pvclock_update_vm_gtod_copy(kvm);
7936
7937         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7938         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7939
7940         return 0;
7941 }
7942
7943 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7944 {
7945         int r;
7946         r = vcpu_load(vcpu);
7947         BUG_ON(r);
7948         kvm_mmu_unload(vcpu);
7949         vcpu_put(vcpu);
7950 }
7951
7952 static void kvm_free_vcpus(struct kvm *kvm)
7953 {
7954         unsigned int i;
7955         struct kvm_vcpu *vcpu;
7956
7957         /*
7958          * Unpin any mmu pages first.
7959          */
7960         kvm_for_each_vcpu(i, vcpu, kvm) {
7961                 kvm_clear_async_pf_completion_queue(vcpu);
7962                 kvm_unload_vcpu_mmu(vcpu);
7963         }
7964         kvm_for_each_vcpu(i, vcpu, kvm)
7965                 kvm_arch_vcpu_free(vcpu);
7966
7967         mutex_lock(&kvm->lock);
7968         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7969                 kvm->vcpus[i] = NULL;
7970
7971         atomic_set(&kvm->online_vcpus, 0);
7972         mutex_unlock(&kvm->lock);
7973 }
7974
7975 void kvm_arch_sync_events(struct kvm *kvm)
7976 {
7977         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7978         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7979         kvm_free_all_assigned_devices(kvm);
7980         kvm_free_pit(kvm);
7981 }
7982
7983 int __x86_set_memory_region(struct kvm *kvm,
7984                             const struct kvm_userspace_memory_region *mem)
7985 {
7986         int i, r;
7987
7988         /* Called with kvm->slots_lock held.  */
7989         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7990
7991         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7992                 struct kvm_userspace_memory_region m = *mem;
7993
7994                 m.slot |= i << 16;
7995                 r = __kvm_set_memory_region(kvm, &m);
7996                 if (r < 0)
7997                         return r;
7998         }
7999
8000         return 0;
8001 }
8002 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8003
8004 int x86_set_memory_region(struct kvm *kvm,
8005                           const struct kvm_userspace_memory_region *mem)
8006 {
8007         int r;
8008
8009         mutex_lock(&kvm->slots_lock);
8010         r = __x86_set_memory_region(kvm, mem);
8011         mutex_unlock(&kvm->slots_lock);
8012
8013         return r;
8014 }
8015 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8016
8017 void kvm_arch_destroy_vm(struct kvm *kvm)
8018 {
8019         if (current->mm == kvm->mm) {
8020                 /*
8021                  * Free memory regions allocated on behalf of userspace,
8022                  * unless the the memory map has changed due to process exit
8023                  * or fd copying.
8024                  */
8025                 struct kvm_userspace_memory_region mem;
8026                 memset(&mem, 0, sizeof(mem));
8027                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
8028                 x86_set_memory_region(kvm, &mem);
8029
8030                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
8031                 x86_set_memory_region(kvm, &mem);
8032
8033                 mem.slot = TSS_PRIVATE_MEMSLOT;
8034                 x86_set_memory_region(kvm, &mem);
8035         }
8036         kvm_iommu_unmap_guest(kvm);
8037         kfree(kvm->arch.vpic);
8038         kfree(kvm->arch.vioapic);
8039         kvm_free_vcpus(kvm);
8040         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8041 }
8042
8043 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8044                            struct kvm_memory_slot *dont)
8045 {
8046         int i;
8047
8048         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8049                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8050                         kvfree(free->arch.rmap[i]);
8051                         free->arch.rmap[i] = NULL;
8052                 }
8053                 if (i == 0)
8054                         continue;
8055
8056                 if (!dont || free->arch.lpage_info[i - 1] !=
8057                              dont->arch.lpage_info[i - 1]) {
8058                         kvfree(free->arch.lpage_info[i - 1]);
8059                         free->arch.lpage_info[i - 1] = NULL;
8060                 }
8061         }
8062 }
8063
8064 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8065                             unsigned long npages)
8066 {
8067         int i;
8068
8069         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8070                 unsigned long ugfn;
8071                 int lpages;
8072                 int level = i + 1;
8073
8074                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8075                                       slot->base_gfn, level) + 1;
8076
8077                 slot->arch.rmap[i] =
8078                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8079                 if (!slot->arch.rmap[i])
8080                         goto out_free;
8081                 if (i == 0)
8082                         continue;
8083
8084                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
8085                                         sizeof(*slot->arch.lpage_info[i - 1]));
8086                 if (!slot->arch.lpage_info[i - 1])
8087                         goto out_free;
8088
8089                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8090                         slot->arch.lpage_info[i - 1][0].write_count = 1;
8091                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8092                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
8093                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8094                 /*
8095                  * If the gfn and userspace address are not aligned wrt each
8096                  * other, or if explicitly asked to, disable large page
8097                  * support for this slot
8098                  */
8099                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8100                     !kvm_largepages_enabled()) {
8101                         unsigned long j;
8102
8103                         for (j = 0; j < lpages; ++j)
8104                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
8105                 }
8106         }
8107
8108         return 0;
8109
8110 out_free:
8111         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8112                 kvfree(slot->arch.rmap[i]);
8113                 slot->arch.rmap[i] = NULL;
8114                 if (i == 0)
8115                         continue;
8116
8117                 kvfree(slot->arch.lpage_info[i - 1]);
8118                 slot->arch.lpage_info[i - 1] = NULL;
8119         }
8120         return -ENOMEM;
8121 }
8122
8123 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8124 {
8125         /*
8126          * memslots->generation has been incremented.
8127          * mmio generation may have reached its maximum value.
8128          */
8129         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8130 }
8131
8132 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8133                                 struct kvm_memory_slot *memslot,
8134                                 const struct kvm_userspace_memory_region *mem,
8135                                 enum kvm_mr_change change)
8136 {
8137         /*
8138          * Only private memory slots need to be mapped here since
8139          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
8140          */
8141         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
8142                 unsigned long userspace_addr;
8143
8144                 /*
8145                  * MAP_SHARED to prevent internal slot pages from being moved
8146                  * by fork()/COW.
8147                  */
8148                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
8149                                          PROT_READ | PROT_WRITE,
8150                                          MAP_SHARED | MAP_ANONYMOUS, 0);
8151
8152                 if (IS_ERR((void *)userspace_addr))
8153                         return PTR_ERR((void *)userspace_addr);
8154
8155                 memslot->userspace_addr = userspace_addr;
8156         }
8157
8158         return 0;
8159 }
8160
8161 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8162                                      struct kvm_memory_slot *new)
8163 {
8164         /* Still write protect RO slot */
8165         if (new->flags & KVM_MEM_READONLY) {
8166                 kvm_mmu_slot_remove_write_access(kvm, new);
8167                 return;
8168         }
8169
8170         /*
8171          * Call kvm_x86_ops dirty logging hooks when they are valid.
8172          *
8173          * kvm_x86_ops->slot_disable_log_dirty is called when:
8174          *
8175          *  - KVM_MR_CREATE with dirty logging is disabled
8176          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8177          *
8178          * The reason is, in case of PML, we need to set D-bit for any slots
8179          * with dirty logging disabled in order to eliminate unnecessary GPA
8180          * logging in PML buffer (and potential PML buffer full VMEXT). This
8181          * guarantees leaving PML enabled during guest's lifetime won't have
8182          * any additonal overhead from PML when guest is running with dirty
8183          * logging disabled for memory slots.
8184          *
8185          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8186          * to dirty logging mode.
8187          *
8188          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8189          *
8190          * In case of write protect:
8191          *
8192          * Write protect all pages for dirty logging.
8193          *
8194          * All the sptes including the large sptes which point to this
8195          * slot are set to readonly. We can not create any new large
8196          * spte on this slot until the end of the logging.
8197          *
8198          * See the comments in fast_page_fault().
8199          */
8200         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8201                 if (kvm_x86_ops->slot_enable_log_dirty)
8202                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8203                 else
8204                         kvm_mmu_slot_remove_write_access(kvm, new);
8205         } else {
8206                 if (kvm_x86_ops->slot_disable_log_dirty)
8207                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8208         }
8209 }
8210
8211 void kvm_arch_commit_memory_region(struct kvm *kvm,
8212                                 const struct kvm_userspace_memory_region *mem,
8213                                 const struct kvm_memory_slot *old,
8214                                 const struct kvm_memory_slot *new,
8215                                 enum kvm_mr_change change)
8216 {
8217         int nr_mmu_pages = 0;
8218
8219         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
8220                 int ret;
8221
8222                 ret = vm_munmap(old->userspace_addr,
8223                                 old->npages * PAGE_SIZE);
8224                 if (ret < 0)
8225                         printk(KERN_WARNING
8226                                "kvm_vm_ioctl_set_memory_region: "
8227                                "failed to munmap memory\n");
8228         }
8229
8230         if (!kvm->arch.n_requested_mmu_pages)
8231                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8232
8233         if (nr_mmu_pages)
8234                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8235
8236         /*
8237          * Dirty logging tracks sptes in 4k granularity, meaning that large
8238          * sptes have to be split.  If live migration is successful, the guest
8239          * in the source machine will be destroyed and large sptes will be
8240          * created in the destination. However, if the guest continues to run
8241          * in the source machine (for example if live migration fails), small
8242          * sptes will remain around and cause bad performance.
8243          *
8244          * Scan sptes if dirty logging has been stopped, dropping those
8245          * which can be collapsed into a single large-page spte.  Later
8246          * page faults will create the large-page sptes.
8247          */
8248         if ((change != KVM_MR_DELETE) &&
8249                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8250                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8251                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8252
8253         /*
8254          * Set up write protection and/or dirty logging for the new slot.
8255          *
8256          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8257          * been zapped so no dirty logging staff is needed for old slot. For
8258          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8259          * new and it's also covered when dealing with the new slot.
8260          *
8261          * FIXME: const-ify all uses of struct kvm_memory_slot.
8262          */
8263         if (change != KVM_MR_DELETE)
8264                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8265 }
8266
8267 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8268 {
8269         kvm_mmu_invalidate_zap_all_pages(kvm);
8270 }
8271
8272 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8273                                    struct kvm_memory_slot *slot)
8274 {
8275         kvm_mmu_invalidate_zap_all_pages(kvm);
8276 }
8277
8278 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8279 {
8280         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8281                 kvm_x86_ops->check_nested_events(vcpu, false);
8282
8283         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8284                 !vcpu->arch.apf.halted)
8285                 || !list_empty_careful(&vcpu->async_pf.done)
8286                 || kvm_apic_has_events(vcpu)
8287                 || vcpu->arch.pv.pv_unhalted
8288                 || atomic_read(&vcpu->arch.nmi_queued) ||
8289                 (kvm_arch_interrupt_allowed(vcpu) &&
8290                  kvm_cpu_has_interrupt(vcpu));
8291 }
8292
8293 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8294 {
8295         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8296 }
8297
8298 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8299 {
8300         return kvm_x86_ops->interrupt_allowed(vcpu);
8301 }
8302
8303 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8304 {
8305         if (is_64_bit_mode(vcpu))
8306                 return kvm_rip_read(vcpu);
8307         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8308                      kvm_rip_read(vcpu));
8309 }
8310 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8311
8312 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8313 {
8314         return kvm_get_linear_rip(vcpu) == linear_rip;
8315 }
8316 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8317
8318 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8319 {
8320         unsigned long rflags;
8321
8322         rflags = kvm_x86_ops->get_rflags(vcpu);
8323         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8324                 rflags &= ~X86_EFLAGS_TF;
8325         return rflags;
8326 }
8327 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8328
8329 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8330 {
8331         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8332             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8333                 rflags |= X86_EFLAGS_TF;
8334         kvm_x86_ops->set_rflags(vcpu, rflags);
8335 }
8336
8337 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8338 {
8339         __kvm_set_rflags(vcpu, rflags);
8340         kvm_make_request(KVM_REQ_EVENT, vcpu);
8341 }
8342 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8343
8344 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8345 {
8346         int r;
8347
8348         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8349               work->wakeup_all)
8350                 return;
8351
8352         r = kvm_mmu_reload(vcpu);
8353         if (unlikely(r))
8354                 return;
8355
8356         if (!vcpu->arch.mmu.direct_map &&
8357               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8358                 return;
8359
8360         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8361 }
8362
8363 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8364 {
8365         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8366 }
8367
8368 static inline u32 kvm_async_pf_next_probe(u32 key)
8369 {
8370         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8371 }
8372
8373 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8374 {
8375         u32 key = kvm_async_pf_hash_fn(gfn);
8376
8377         while (vcpu->arch.apf.gfns[key] != ~0)
8378                 key = kvm_async_pf_next_probe(key);
8379
8380         vcpu->arch.apf.gfns[key] = gfn;
8381 }
8382
8383 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8384 {
8385         int i;
8386         u32 key = kvm_async_pf_hash_fn(gfn);
8387
8388         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8389                      (vcpu->arch.apf.gfns[key] != gfn &&
8390                       vcpu->arch.apf.gfns[key] != ~0); i++)
8391                 key = kvm_async_pf_next_probe(key);
8392
8393         return key;
8394 }
8395
8396 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8397 {
8398         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8399 }
8400
8401 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8402 {
8403         u32 i, j, k;
8404
8405         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8406         while (true) {
8407                 vcpu->arch.apf.gfns[i] = ~0;
8408                 do {
8409                         j = kvm_async_pf_next_probe(j);
8410                         if (vcpu->arch.apf.gfns[j] == ~0)
8411                                 return;
8412                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8413                         /*
8414                          * k lies cyclically in ]i,j]
8415                          * |    i.k.j |
8416                          * |....j i.k.| or  |.k..j i...|
8417                          */
8418                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8419                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8420                 i = j;
8421         }
8422 }
8423
8424 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8425 {
8426
8427         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8428                                       sizeof(val));
8429 }
8430
8431 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8432                                      struct kvm_async_pf *work)
8433 {
8434         struct x86_exception fault;
8435
8436         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8437         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8438
8439         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8440             (vcpu->arch.apf.send_user_only &&
8441              kvm_x86_ops->get_cpl(vcpu) == 0))
8442                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8443         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8444                 fault.vector = PF_VECTOR;
8445                 fault.error_code_valid = true;
8446                 fault.error_code = 0;
8447                 fault.nested_page_fault = false;
8448                 fault.address = work->arch.token;
8449                 kvm_inject_page_fault(vcpu, &fault);
8450         }
8451 }
8452
8453 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8454                                  struct kvm_async_pf *work)
8455 {
8456         struct x86_exception fault;
8457
8458         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8459         if (work->wakeup_all)
8460                 work->arch.token = ~0; /* broadcast wakeup */
8461         else
8462                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8463
8464         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8465             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8466                 fault.vector = PF_VECTOR;
8467                 fault.error_code_valid = true;
8468                 fault.error_code = 0;
8469                 fault.nested_page_fault = false;
8470                 fault.address = work->arch.token;
8471                 kvm_inject_page_fault(vcpu, &fault);
8472         }
8473         vcpu->arch.apf.halted = false;
8474         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8475 }
8476
8477 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8478 {
8479         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8480                 return true;
8481         else
8482                 return !kvm_event_needs_reinjection(vcpu) &&
8483                         kvm_x86_ops->interrupt_allowed(vcpu);
8484 }
8485
8486 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8487 {
8488         atomic_inc(&kvm->arch.noncoherent_dma_count);
8489 }
8490 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8491
8492 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8493 {
8494         atomic_dec(&kvm->arch.noncoherent_dma_count);
8495 }
8496 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8497
8498 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8499 {
8500         return atomic_read(&kvm->arch.noncoherent_dma_count);
8501 }
8502 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8503
8504 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8505 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8506 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8507 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8508 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8509 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8510 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8511 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8512 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8513 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8514 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8515 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8516 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8517 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8518 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);