arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31
  32 #include <linux/clocksource.h>
  33 #include <linux/interrupt.h>
  34 #include <linux/kvm.h>
  35 #include <linux/fs.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/module.h>
  38 #include <linux/mman.h>
  39 #include <linux/highmem.h>
  40 #include <linux/iommu.h>
  41 #include <linux/intel-iommu.h>
  42 #include <linux/cpufreq.h>
  43 #include <linux/user-return-notifier.h>
  44 #include <linux/srcu.h>
  45 #include <linux/slab.h>
  46 #include <linux/perf_event.h>
  47 #include <linux/uaccess.h>
  48 #include <linux/hash.h>
  49 #include <linux/pci.h>
  50 #include <linux/timekeeper_internal.h>
  51 #include <linux/pvclock_gtod.h>
  52 #include <trace/events/kvm.h>
  53
  54 #define CREATE_TRACE_POINTS
  55 #include "trace.h"
  56
  57 #include <asm/debugreg.h>
  58 #include <asm/msr.h>
  59 #include <asm/desc.h>
  60 #include <asm/mtrr.h>
  61 #include <asm/mce.h>
  62 #include <asm/i387.h>
  63 #include <asm/fpu-internal.h> /* Ugh! */
  64 #include <asm/xcr.h>
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 153         { "hypercalls", VCPU_STAT(hypercalls) },
 154         { "request_irq", VCPU_STAT(request_irq_exits) },
 155         { "irq_exits", VCPU_STAT(irq_exits) },
 156         { "host_state_reload", VCPU_STAT(host_state_reload) },
 157         { "efer_reload", VCPU_STAT(efer_reload) },
 158         { "fpu_reload", VCPU_STAT(fpu_reload) },
 159         { "insn_emulation", VCPU_STAT(insn_emulation) },
 160         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 161         { "irq_injections", VCPU_STAT(irq_injections) },
 162         { "nmi_injections", VCPU_STAT(nmi_injections) },
 163         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 164         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 165         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 166         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 167         { "mmu_flooded", VM_STAT(mmu_flooded) },
 168         { "mmu_recycled", VM_STAT(mmu_recycled) },
 169         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 170         { "mmu_unsync", VM_STAT(mmu_unsync) },
 171         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 172         { "largepages", VM_STAT(lpages) },
 173         { NULL }
 174 };
 175
 176 u64 __read_mostly host_xcr0;
 177
 178 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 179
 180 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 181 {
 182         int i;
 183         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 184                 vcpu->arch.apf.gfns[i] = ~0;
 185 }
 186
 187 static void kvm_on_user_return(struct user_return_notifier *urn)
 188 {
 189         unsigned slot;
 190         struct kvm_shared_msrs *locals
 191                 = container_of(urn, struct kvm_shared_msrs, urn);
 192         struct kvm_shared_msr_values *values;
 193
 194         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 195                 values = &locals->values[slot];
 196                 if (values->host != values->curr) {
 197                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 198                         values->curr = values->host;
 199                 }
 200         }
 201         locals->registered = false;
 202         user_return_notifier_unregister(urn);
 203 }
 204
 205 static void shared_msr_update(unsigned slot, u32 msr)
 206 {
 207         u64 value;
 208         unsigned int cpu = smp_processor_id();
 209         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 210
 211         /* only read, and nobody should modify it at this time,
 212          * so don't need lock */
 213         if (slot >= shared_msrs_global.nr) {
 214                 printk(KERN_ERR "kvm: invalid MSR slot!");
 215                 return;
 216         }
 217         rdmsrl_safe(msr, &value);
 218         smsr->values[slot].host = value;
 219         smsr->values[slot].curr = value;
 220 }
 221
 222 void kvm_define_shared_msr(unsigned slot, u32 msr)
 223 {
 224         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 225         if (slot >= shared_msrs_global.nr)
 226                 shared_msrs_global.nr = slot + 1;
 227         shared_msrs_global.msrs[slot] = msr;
 228         /* we need ensured the shared_msr_global have been updated */
 229         smp_wmb();
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 232
 233 static void kvm_shared_msr_cpu_online(void)
 234 {
 235         unsigned i;
 236
 237         for (i = 0; i < shared_msrs_global.nr; ++i)
 238                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 239 }
 240
 241 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 242 {
 243         unsigned int cpu = smp_processor_id();
 244         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 245         int err;
 246
 247         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 248                 return 0;
 249         smsr->values[slot].curr = value;
 250         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 251         if (err)
 252                 return 1;
 253
 254         if (!smsr->registered) {
 255                 smsr->urn.on_user_return = kvm_on_user_return;
 256                 user_return_notifier_register(&smsr->urn);
 257                 smsr->registered = true;
 258         }
 259         return 0;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 262
 263 static void drop_user_return_notifiers(void)
 264 {
 265         unsigned int cpu = smp_processor_id();
 266         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 267
 268         if (smsr->registered)
 269                 kvm_on_user_return(&smsr->urn);
 270 }
 271
 272 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 273 {
 274         return vcpu->arch.apic_base;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 277
 278 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 279 {
 280         u64 old_state = vcpu->arch.apic_base &
 281                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 282         u64 new_state = msr_info->data &
 283                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 284         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 285                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 286
 287         if (!msr_info->host_initiated &&
 288             ((msr_info->data & reserved_bits) != 0 ||
 289              new_state == X2APIC_ENABLE ||
 290              (new_state == MSR_IA32_APICBASE_ENABLE &&
 291               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 292              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 293               old_state == 0)))
 294                 return 1;
 295
 296         kvm_lapic_set_base(vcpu, msr_info->data);
 297         return 0;
 298 }
 299 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 300
 301 asmlinkage __visible void kvm_spurious_fault(void)
 302 {
 303         /* Fault while not rebooting.  We want the trace. */
 304         BUG();
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 307
 308 #define EXCPT_BENIGN            0
 309 #define EXCPT_CONTRIBUTORY      1
 310 #define EXCPT_PF                2
 311
 312 static int exception_class(int vector)
 313 {
 314         switch (vector) {
 315         case PF_VECTOR:
 316                 return EXCPT_PF;
 317         case DE_VECTOR:
 318         case TS_VECTOR:
 319         case NP_VECTOR:
 320         case SS_VECTOR:
 321         case GP_VECTOR:
 322                 return EXCPT_CONTRIBUTORY;
 323         default:
 324                 break;
 325         }
 326         return EXCPT_BENIGN;
 327 }
 328
 329 #define EXCPT_FAULT             0
 330 #define EXCPT_TRAP              1
 331 #define EXCPT_ABORT             2
 332 #define EXCPT_INTERRUPT         3
 333
 334 static int exception_type(int vector)
 335 {
 336         unsigned int mask;
 337
 338         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 339                 return EXCPT_INTERRUPT;
 340
 341         mask = 1 << vector;
 342
 343         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 344         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 345                 return EXCPT_TRAP;
 346
 347         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 348                 return EXCPT_ABORT;
 349
 350         /* Reserved exceptions will result in fault */
 351         return EXCPT_FAULT;
 352 }
 353
 354 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 355                 unsigned nr, bool has_error, u32 error_code,
 356                 bool reinject)
 357 {
 358         u32 prev_nr;
 359         int class1, class2;
 360
 361         kvm_make_request(KVM_REQ_EVENT, vcpu);
 362
 363         if (!vcpu->arch.exception.pending) {
 364         queue:
 365                 if (has_error && !is_protmode(vcpu))
 366                         has_error = false;
 367                 vcpu->arch.exception.pending = true;
 368                 vcpu->arch.exception.has_error_code = has_error;
 369                 vcpu->arch.exception.nr = nr;
 370                 vcpu->arch.exception.error_code = error_code;
 371                 vcpu->arch.exception.reinject = reinject;
 372                 return;
 373         }
 374
 375         /* to check exception */
 376         prev_nr = vcpu->arch.exception.nr;
 377         if (prev_nr == DF_VECTOR) {
 378                 /* triple fault -> shutdown */
 379                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 380                 return;
 381         }
 382         class1 = exception_class(prev_nr);
 383         class2 = exception_class(nr);
 384         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 385                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 386                 /* generate double fault per SDM Table 5-5 */
 387                 vcpu->arch.exception.pending = true;
 388                 vcpu->arch.exception.has_error_code = true;
 389                 vcpu->arch.exception.nr = DF_VECTOR;
 390                 vcpu->arch.exception.error_code = 0;
 391         } else
 392                 /* replace previous exception with a new one in a hope
 393                    that instruction re-execution will regenerate lost
 394                    exception */
 395                 goto queue;
 396 }
 397
 398 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 399 {
 400         kvm_multiple_exception(vcpu, nr, false, 0, false);
 401 }
 402 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 403
 404 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 405 {
 406         kvm_multiple_exception(vcpu, nr, false, 0, true);
 407 }
 408 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 409
 410 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 411 {
 412         if (err)
 413                 kvm_inject_gp(vcpu, 0);
 414         else
 415                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 418
 419 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 420 {
 421         ++vcpu->stat.pf_guest;
 422         vcpu->arch.cr2 = fault->address;
 423         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 426
 427 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 428 {
 429         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 430                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 431         else
 432                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 433
 434         return fault->nested_page_fault;
 435 }
 436
 437 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 438 {
 439         atomic_inc(&vcpu->arch.nmi_queued);
 440         kvm_make_request(KVM_REQ_NMI, vcpu);
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 443
 444 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 445 {
 446         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 449
 450 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 451 {
 452         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 455
 456 /*
 457  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 458  * a #GP and return false.
 459  */
 460 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 461 {
 462         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 463                 return true;
 464         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 465         return false;
 466 }
 467 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 468
 469 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 470 {
 471         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 472                 return true;
 473
 474         kvm_queue_exception(vcpu, UD_VECTOR);
 475         return false;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_require_dr);
 478
 479 /*
 480  * This function will be used to read from the physical memory of the currently
 481  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 482  * can read from guest physical or from the guest's guest physical memory.
 483  */
 484 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 485                             gfn_t ngfn, void *data, int offset, int len,
 486                             u32 access)
 487 {
 488         struct x86_exception exception;
 489         gfn_t real_gfn;
 490         gpa_t ngpa;
 491
 492         ngpa     = gfn_to_gpa(ngfn);
 493         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 494         if (real_gfn == UNMAPPED_GVA)
 495                 return -EFAULT;
 496
 497         real_gfn = gpa_to_gfn(real_gfn);
 498
 499         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 500 }
 501 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 502
 503 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 504                                void *data, int offset, int len, u32 access)
 505 {
 506         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 507                                        data, offset, len, access);
 508 }
 509
 510 /*
 511  * Load the pae pdptrs.  Return true is they are all valid.
 512  */
 513 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 514 {
 515         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 516         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 517         int i;
 518         int ret;
 519         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 520
 521         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 522                                       offset * sizeof(u64), sizeof(pdpte),
 523                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 524         if (ret < 0) {
 525                 ret = 0;
 526                 goto out;
 527         }
 528         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 529                 if (is_present_gpte(pdpte[i]) &&
 530                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 531                         ret = 0;
 532                         goto out;
 533                 }
 534         }
 535         ret = 1;
 536
 537         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 538         __set_bit(VCPU_EXREG_PDPTR,
 539                   (unsigned long *)&vcpu->arch.regs_avail);
 540         __set_bit(VCPU_EXREG_PDPTR,
 541                   (unsigned long *)&vcpu->arch.regs_dirty);
 542 out:
 543
 544         return ret;
 545 }
 546 EXPORT_SYMBOL_GPL(load_pdptrs);
 547
 548 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 549 {
 550         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 551         bool changed = true;
 552         int offset;
 553         gfn_t gfn;
 554         int r;
 555
 556         if (is_long_mode(vcpu) || !is_pae(vcpu))
 557                 return false;
 558
 559         if (!test_bit(VCPU_EXREG_PDPTR,
 560                       (unsigned long *)&vcpu->arch.regs_avail))
 561                 return true;
 562
 563         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 564         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 565         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 566                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 567         if (r < 0)
 568                 goto out;
 569         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 570 out:
 571
 572         return changed;
 573 }
 574
 575 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 576 {
 577         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 578         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 579
 580         cr0 |= X86_CR0_ET;
 581
 582 #ifdef CONFIG_X86_64
 583         if (cr0 & 0xffffffff00000000UL)
 584                 return 1;
 585 #endif
 586
 587         cr0 &= ~CR0_RESERVED_BITS;
 588
 589         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 590                 return 1;
 591
 592         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 593                 return 1;
 594
 595         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 596 #ifdef CONFIG_X86_64
 597                 if ((vcpu->arch.efer & EFER_LME)) {
 598                         int cs_db, cs_l;
 599
 600                         if (!is_pae(vcpu))
 601                                 return 1;
 602                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 603                         if (cs_l)
 604                                 return 1;
 605                 } else
 606 #endif
 607                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 608                                                  kvm_read_cr3(vcpu)))
 609                         return 1;
 610         }
 611
 612         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr0(vcpu, cr0);
 616
 617         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 618                 kvm_clear_async_pf_completion_queue(vcpu);
 619                 kvm_async_pf_hash_reset(vcpu);
 620         }
 621
 622         if ((cr0 ^ old_cr0) & update_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624         return 0;
 625 }
 626 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 627
 628 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 629 {
 630         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 631 }
 632 EXPORT_SYMBOL_GPL(kvm_lmsw);
 633
 634 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 635 {
 636         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 637                         !vcpu->guest_xcr0_loaded) {
 638                 /* kvm_set_xcr() also depends on this */
 639                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 640                 vcpu->guest_xcr0_loaded = 1;
 641         }
 642 }
 643
 644 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 645 {
 646         if (vcpu->guest_xcr0_loaded) {
 647                 if (vcpu->arch.xcr0 != host_xcr0)
 648                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 649                 vcpu->guest_xcr0_loaded = 0;
 650         }
 651 }
 652
 653 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 654 {
 655         u64 xcr0 = xcr;
 656         u64 old_xcr0 = vcpu->arch.xcr0;
 657         u64 valid_bits;
 658
 659         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 660         if (index != XCR_XFEATURE_ENABLED_MASK)
 661                 return 1;
 662         if (!(xcr0 & XSTATE_FP))
 663                 return 1;
 664         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 665                 return 1;
 666
 667         /*
 668          * Do not allow the guest to set bits that we do not support
 669          * saving.  However, xcr0 bit 0 is always set, even if the
 670          * emulated CPU does not support XSAVE (see fx_init).
 671          */
 672         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 673         if (xcr0 & ~valid_bits)
 674                 return 1;
 675
 676         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 677                 return 1;
 678
 679         if (xcr0 & XSTATE_AVX512) {
 680                 if (!(xcr0 & XSTATE_YMM))
 681                         return 1;
 682                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 683                         return 1;
 684         }
 685         kvm_put_guest_xcr0(vcpu);
 686         vcpu->arch.xcr0 = xcr0;
 687
 688         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 689                 kvm_update_cpuid(vcpu);
 690         return 0;
 691 }
 692
 693 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 694 {
 695         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 696             __kvm_set_xcr(vcpu, index, xcr)) {
 697                 kvm_inject_gp(vcpu, 0);
 698                 return 1;
 699         }
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 703
 704 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 705 {
 706         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 707         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 708                                    X86_CR4_SMEP | X86_CR4_SMAP;
 709
 710         if (cr4 & CR4_RESERVED_BITS)
 711                 return 1;
 712
 713         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 714                 return 1;
 715
 716         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 717                 return 1;
 718
 719         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 720                 return 1;
 721
 722         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 723                 return 1;
 724
 725         if (is_long_mode(vcpu)) {
 726                 if (!(cr4 & X86_CR4_PAE))
 727                         return 1;
 728         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 729                    && ((cr4 ^ old_cr4) & pdptr_bits)
 730                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 731                                    kvm_read_cr3(vcpu)))
 732                 return 1;
 733
 734         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 735                 if (!guest_cpuid_has_pcid(vcpu))
 736                         return 1;
 737
 738                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 739                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 740                         return 1;
 741         }
 742
 743         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 744                 return 1;
 745
 746         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 747             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 748                 kvm_mmu_reset_context(vcpu);
 749
 750         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 751                 kvm_update_cpuid(vcpu);
 752
 753         return 0;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 756
 757 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 758 {
 759 #ifdef CONFIG_X86_64
 760         cr3 &= ~CR3_PCID_INVD;
 761 #endif
 762
 763         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 764                 kvm_mmu_sync_roots(vcpu);
 765                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 766                 return 0;
 767         }
 768
 769         if (is_long_mode(vcpu)) {
 770                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 771                         return 1;
 772         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 773                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 774                 return 1;
 775
 776         vcpu->arch.cr3 = cr3;
 777         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 778         kvm_mmu_new_cr3(vcpu);
 779         return 0;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 782
 783 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 784 {
 785         if (cr8 & CR8_RESERVED_BITS)
 786                 return 1;
 787         if (irqchip_in_kernel(vcpu->kvm))
 788                 kvm_lapic_set_tpr(vcpu, cr8);
 789         else
 790                 vcpu->arch.cr8 = cr8;
 791         return 0;
 792 }
 793 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 794
 795 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 796 {
 797         if (irqchip_in_kernel(vcpu->kvm))
 798                 return kvm_lapic_get_cr8(vcpu);
 799         else
 800                 return vcpu->arch.cr8;
 801 }
 802 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 803
 804 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 805 {
 806         int i;
 807
 808         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 809                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 810                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 811                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 812         }
 813 }
 814
 815 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 816 {
 817         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 818                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 819 }
 820
 821 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 822 {
 823         unsigned long dr7;
 824
 825         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 826                 dr7 = vcpu->arch.guest_debug_dr7;
 827         else
 828                 dr7 = vcpu->arch.dr7;
 829         kvm_x86_ops->set_dr7(vcpu, dr7);
 830         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 831         if (dr7 & DR7_BP_EN_MASK)
 832                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 833 }
 834
 835 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 836 {
 837         u64 fixed = DR6_FIXED_1;
 838
 839         if (!guest_cpuid_has_rtm(vcpu))
 840                 fixed |= DR6_RTM;
 841         return fixed;
 842 }
 843
 844 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 845 {
 846         switch (dr) {
 847         case 0 ... 3:
 848                 vcpu->arch.db[dr] = val;
 849                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 850                         vcpu->arch.eff_db[dr] = val;
 851                 break;
 852         case 4:
 853                 /* fall through */
 854         case 6:
 855                 if (val & 0xffffffff00000000ULL)
 856                         return -1; /* #GP */
 857                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 858                 kvm_update_dr6(vcpu);
 859                 break;
 860         case 5:
 861                 /* fall through */
 862         default: /* 7 */
 863                 if (val & 0xffffffff00000000ULL)
 864                         return -1; /* #GP */
 865                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 866                 kvm_update_dr7(vcpu);
 867                 break;
 868         }
 869
 870         return 0;
 871 }
 872
 873 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 874 {
 875         if (__kvm_set_dr(vcpu, dr, val)) {
 876                 kvm_inject_gp(vcpu, 0);
 877                 return 1;
 878         }
 879         return 0;
 880 }
 881 EXPORT_SYMBOL_GPL(kvm_set_dr);
 882
 883 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 884 {
 885         switch (dr) {
 886         case 0 ... 3:
 887                 *val = vcpu->arch.db[dr];
 888                 break;
 889         case 4:
 890                 /* fall through */
 891         case 6:
 892                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 893                         *val = vcpu->arch.dr6;
 894                 else
 895                         *val = kvm_x86_ops->get_dr6(vcpu);
 896                 break;
 897         case 5:
 898                 /* fall through */
 899         default: /* 7 */
 900                 *val = vcpu->arch.dr7;
 901                 break;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_get_dr);
 906
 907 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 908 {
 909         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 910         u64 data;
 911         int err;
 912
 913         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 914         if (err)
 915                 return err;
 916         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 917         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 918         return err;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 921
 922 /*
 923  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 924  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 925  *
 926  * This list is modified at module load time to reflect the
 927  * capabilities of the host cpu. This capabilities test skips MSRs that are
 928  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 929  * may depend on host virtualization features rather than host cpu features.
 930  */
 931
 932 static u32 msrs_to_save[] = {
 933         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 934         MSR_STAR,
 935 #ifdef CONFIG_X86_64
 936         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 937 #endif
 938         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 939         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 940 };
 941
 942 static unsigned num_msrs_to_save;
 943
 944 static u32 emulated_msrs[] = {
 945         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 946         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 947         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 948         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 949         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 950         MSR_KVM_PV_EOI_EN,
 951
 952         MSR_IA32_TSC_ADJUST,
 953         MSR_IA32_TSCDEADLINE,
 954         MSR_IA32_MISC_ENABLE,
 955         MSR_IA32_MCG_STATUS,
 956         MSR_IA32_MCG_CTL,
 957         MSR_IA32_SMBASE,
 958 };
 959
 960 static unsigned num_emulated_msrs;
 961
 962 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 963 {
 964         if (efer & efer_reserved_bits)
 965                 return false;
 966
 967         if (efer & EFER_FFXSR) {
 968                 struct kvm_cpuid_entry2 *feat;
 969
 970                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 971                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 972                         return false;
 973         }
 974
 975         if (efer & EFER_SVME) {
 976                 struct kvm_cpuid_entry2 *feat;
 977
 978                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 979                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 980                         return false;
 981         }
 982
 983         return true;
 984 }
 985 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 986
 987 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 988 {
 989         u64 old_efer = vcpu->arch.efer;
 990
 991         if (!kvm_valid_efer(vcpu, efer))
 992                 return 1;
 993
 994         if (is_paging(vcpu)
 995             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 996                 return 1;
 997
 998         efer &= ~EFER_LMA;
 999         efer |= vcpu->arch.efer & EFER_LMA;
1000
1001         kvm_x86_ops->set_efer(vcpu, efer);
1002
1003         /* Update reserved bits */
1004         if ((efer ^ old_efer) & EFER_NX)
1005                 kvm_mmu_reset_context(vcpu);
1006
1007         return 0;
1008 }
1009
1010 void kvm_enable_efer_bits(u64 mask)
1011 {
1012        efer_reserved_bits &= ~mask;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1015
1016 /*
1017  * Writes msr value into into the appropriate "register".
1018  * Returns 0 on success, non-0 otherwise.
1019  * Assumes vcpu_load() was already called.
1020  */
1021 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1022 {
1023         switch (msr->index) {
1024         case MSR_FS_BASE:
1025         case MSR_GS_BASE:
1026         case MSR_KERNEL_GS_BASE:
1027         case MSR_CSTAR:
1028         case MSR_LSTAR:
1029                 if (is_noncanonical_address(msr->data))
1030                         return 1;
1031                 break;
1032         case MSR_IA32_SYSENTER_EIP:
1033         case MSR_IA32_SYSENTER_ESP:
1034                 /*
1035                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1036                  * non-canonical address is written on Intel but not on
1037                  * AMD (which ignores the top 32-bits, because it does
1038                  * not implement 64-bit SYSENTER).
1039                  *
1040                  * 64-bit code should hence be able to write a non-canonical
1041                  * value on AMD.  Making the address canonical ensures that
1042                  * vmentry does not fail on Intel after writing a non-canonical
1043                  * value, and that something deterministic happens if the guest
1044                  * invokes 64-bit SYSENTER.
1045                  */
1046                 msr->data = get_canonical(msr->data);
1047         }
1048         return kvm_x86_ops->set_msr(vcpu, msr);
1049 }
1050 EXPORT_SYMBOL_GPL(kvm_set_msr);
1051
1052 /*
1053  * Adapt set_msr() to msr_io()'s calling convention
1054  */
1055 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1056 {
1057         struct msr_data msr;
1058         int r;
1059
1060         msr.index = index;
1061         msr.host_initiated = true;
1062         r = kvm_get_msr(vcpu, &msr);
1063         if (r)
1064                 return r;
1065
1066         *data = msr.data;
1067         return 0;
1068 }
1069
1070 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1071 {
1072         struct msr_data msr;
1073
1074         msr.data = *data;
1075         msr.index = index;
1076         msr.host_initiated = true;
1077         return kvm_set_msr(vcpu, &msr);
1078 }
1079
1080 #ifdef CONFIG_X86_64
1081 struct pvclock_gtod_data {
1082         seqcount_t      seq;
1083
1084         struct { /* extract of a clocksource struct */
1085                 int vclock_mode;
1086                 cycle_t cycle_last;
1087                 cycle_t mask;
1088                 u32     mult;
1089                 u32     shift;
1090         } clock;
1091
1092         u64             boot_ns;
1093         u64             nsec_base;
1094 };
1095
1096 static struct pvclock_gtod_data pvclock_gtod_data;
1097
1098 static void update_pvclock_gtod(struct timekeeper *tk)
1099 {
1100         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1101         u64 boot_ns;
1102
1103         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1104
1105         write_seqcount_begin(&vdata->seq);
1106
1107         /* copy pvclock gtod data */
1108         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1109         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1110         vdata->clock.mask               = tk->tkr_mono.mask;
1111         vdata->clock.mult               = tk->tkr_mono.mult;
1112         vdata->clock.shift              = tk->tkr_mono.shift;
1113
1114         vdata->boot_ns                  = boot_ns;
1115         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1116
1117         write_seqcount_end(&vdata->seq);
1118 }
1119 #endif
1120
1121 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1122 {
1123         /*
1124          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1125          * vcpu_enter_guest.  This function is only called from
1126          * the physical CPU that is running vcpu.
1127          */
1128         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1129 }
1130
1131 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1132 {
1133         int version;
1134         int r;
1135         struct pvclock_wall_clock wc;
1136         struct timespec boot;
1137
1138         if (!wall_clock)
1139                 return;
1140
1141         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1142         if (r)
1143                 return;
1144
1145         if (version & 1)
1146                 ++version;  /* first time write, random junk */
1147
1148         ++version;
1149
1150         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1151
1152         /*
1153          * The guest calculates current wall clock time by adding
1154          * system time (updated by kvm_guest_time_update below) to the
1155          * wall clock specified here.  guest system time equals host
1156          * system time for us, thus we must fill in host boot time here.
1157          */
1158         getboottime(&boot);
1159
1160         if (kvm->arch.kvmclock_offset) {
1161                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1162                 boot = timespec_sub(boot, ts);
1163         }
1164         wc.sec = boot.tv_sec;
1165         wc.nsec = boot.tv_nsec;
1166         wc.version = version;
1167
1168         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1169
1170         version++;
1171         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1172 }
1173
1174 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1175 {
1176         uint32_t quotient, remainder;
1177
1178         /* Don't try to replace with do_div(), this one calculates
1179          * "(dividend << 32) / divisor" */
1180         __asm__ ( "divl %4"
1181                   : "=a" (quotient), "=d" (remainder)
1182                   : "0" (0), "1" (dividend), "r" (divisor) );
1183         return quotient;
1184 }
1185
1186 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1187                                s8 *pshift, u32 *pmultiplier)
1188 {
1189         uint64_t scaled64;
1190         int32_t  shift = 0;
1191         uint64_t tps64;
1192         uint32_t tps32;
1193
1194         tps64 = base_khz * 1000LL;
1195         scaled64 = scaled_khz * 1000LL;
1196         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1197                 tps64 >>= 1;
1198                 shift--;
1199         }
1200
1201         tps32 = (uint32_t)tps64;
1202         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1203                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1204                         scaled64 >>= 1;
1205                 else
1206                         tps32 <<= 1;
1207                 shift++;
1208         }
1209
1210         *pshift = shift;
1211         *pmultiplier = div_frac(scaled64, tps32);
1212
1213         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1214                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1215 }
1216
1217 static inline u64 get_kernel_ns(void)
1218 {
1219         return ktime_get_boot_ns();
1220 }
1221
1222 #ifdef CONFIG_X86_64
1223 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1224 #endif
1225
1226 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1227 static unsigned long max_tsc_khz;
1228
1229 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1230 {
1231         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1232                                    vcpu->arch.virtual_tsc_shift);
1233 }
1234
1235 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1236 {
1237         u64 v = (u64)khz * (1000000 + ppm);
1238         do_div(v, 1000000);
1239         return v;
1240 }
1241
1242 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1243 {
1244         u32 thresh_lo, thresh_hi;
1245         int use_scaling = 0;
1246
1247         /* tsc_khz can be zero if TSC calibration fails */
1248         if (this_tsc_khz == 0)
1249                 return;
1250
1251         /* Compute a scale to convert nanoseconds in TSC cycles */
1252         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1253                            &vcpu->arch.virtual_tsc_shift,
1254                            &vcpu->arch.virtual_tsc_mult);
1255         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1256
1257         /*
1258          * Compute the variation in TSC rate which is acceptable
1259          * within the range of tolerance and decide if the
1260          * rate being applied is within that bounds of the hardware
1261          * rate.  If so, no scaling or compensation need be done.
1262          */
1263         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1264         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1265         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1266                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1267                 use_scaling = 1;
1268         }
1269         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1270 }
1271
1272 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1273 {
1274         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1275                                       vcpu->arch.virtual_tsc_mult,
1276                                       vcpu->arch.virtual_tsc_shift);
1277         tsc += vcpu->arch.this_tsc_write;
1278         return tsc;
1279 }
1280
1281 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1282 {
1283 #ifdef CONFIG_X86_64
1284         bool vcpus_matched;
1285         struct kvm_arch *ka = &vcpu->kvm->arch;
1286         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1287
1288         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1289                          atomic_read(&vcpu->kvm->online_vcpus));
1290
1291         /*
1292          * Once the masterclock is enabled, always perform request in
1293          * order to update it.
1294          *
1295          * In order to enable masterclock, the host clocksource must be TSC
1296          * and the vcpus need to have matched TSCs.  When that happens,
1297          * perform request to enable masterclock.
1298          */
1299         if (ka->use_master_clock ||
1300             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1301                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1302
1303         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1304                             atomic_read(&vcpu->kvm->online_vcpus),
1305                             ka->use_master_clock, gtod->clock.vclock_mode);
1306 #endif
1307 }
1308
1309 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1310 {
1311         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1312         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1313 }
1314
1315 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1316 {
1317         struct kvm *kvm = vcpu->kvm;
1318         u64 offset, ns, elapsed;
1319         unsigned long flags;
1320         s64 usdiff;
1321         bool matched;
1322         bool already_matched;
1323         u64 data = msr->data;
1324
1325         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1326         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1327         ns = get_kernel_ns();
1328         elapsed = ns - kvm->arch.last_tsc_nsec;
1329
1330         if (vcpu->arch.virtual_tsc_khz) {
1331                 int faulted = 0;
1332
1333                 /* n.b - signed multiplication and division required */
1334                 usdiff = data - kvm->arch.last_tsc_write;
1335 #ifdef CONFIG_X86_64
1336                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1337 #else
1338                 /* do_div() only does unsigned */
1339                 asm("1: idivl %[divisor]\n"
1340                     "2: xor %%edx, %%edx\n"
1341                     "   movl $0, %[faulted]\n"
1342                     "3:\n"
1343                     ".section .fixup,\"ax\"\n"
1344                     "4: movl $1, %[faulted]\n"
1345                     "   jmp  3b\n"
1346                     ".previous\n"
1347
1348                 _ASM_EXTABLE(1b, 4b)
1349
1350                 : "=A"(usdiff), [faulted] "=r" (faulted)
1351                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1352
1353 #endif
1354                 do_div(elapsed, 1000);
1355                 usdiff -= elapsed;
1356                 if (usdiff < 0)
1357                         usdiff = -usdiff;
1358
1359                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1360                 if (faulted)
1361                         usdiff = USEC_PER_SEC;
1362         } else
1363                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1364
1365         /*
1366          * Special case: TSC write with a small delta (1 second) of virtual
1367          * cycle time against real time is interpreted as an attempt to
1368          * synchronize the CPU.
1369          *
1370          * For a reliable TSC, we can match TSC offsets, and for an unstable
1371          * TSC, we add elapsed time in this computation.  We could let the
1372          * compensation code attempt to catch up if we fall behind, but
1373          * it's better to try to match offsets from the beginning.
1374          */
1375         if (usdiff < USEC_PER_SEC &&
1376             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1377                 if (!check_tsc_unstable()) {
1378                         offset = kvm->arch.cur_tsc_offset;
1379                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1380                 } else {
1381                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1382                         data += delta;
1383                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1384                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1385                 }
1386                 matched = true;
1387                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1388         } else {
1389                 /*
1390                  * We split periods of matched TSC writes into generations.
1391                  * For each generation, we track the original measured
1392                  * nanosecond time, offset, and write, so if TSCs are in
1393                  * sync, we can match exact offset, and if not, we can match
1394                  * exact software computation in compute_guest_tsc()
1395                  *
1396                  * These values are tracked in kvm->arch.cur_xxx variables.
1397                  */
1398                 kvm->arch.cur_tsc_generation++;
1399                 kvm->arch.cur_tsc_nsec = ns;
1400                 kvm->arch.cur_tsc_write = data;
1401                 kvm->arch.cur_tsc_offset = offset;
1402                 matched = false;
1403                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1404                          kvm->arch.cur_tsc_generation, data);
1405         }
1406
1407         /*
1408          * We also track th most recent recorded KHZ, write and time to
1409          * allow the matching interval to be extended at each write.
1410          */
1411         kvm->arch.last_tsc_nsec = ns;
1412         kvm->arch.last_tsc_write = data;
1413         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1414
1415         vcpu->arch.last_guest_tsc = data;
1416
1417         /* Keep track of which generation this VCPU has synchronized to */
1418         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1419         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1420         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1421
1422         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1423                 update_ia32_tsc_adjust_msr(vcpu, offset);
1424         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1425         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1426
1427         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1428         if (!matched) {
1429                 kvm->arch.nr_vcpus_matched_tsc = 0;
1430         } else if (!already_matched) {
1431                 kvm->arch.nr_vcpus_matched_tsc++;
1432         }
1433
1434         kvm_track_tsc_matching(vcpu);
1435         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1436 }
1437
1438 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1439
1440 #ifdef CONFIG_X86_64
1441
1442 static cycle_t read_tsc(void)
1443 {
1444         cycle_t ret;
1445         u64 last;
1446
1447         /*
1448          * Empirically, a fence (of type that depends on the CPU)
1449          * before rdtsc is enough to ensure that rdtsc is ordered
1450          * with respect to loads.  The various CPU manuals are unclear
1451          * as to whether rdtsc can be reordered with later loads,
1452          * but no one has ever seen it happen.
1453          */
1454         rdtsc_barrier();
1455         ret = (cycle_t)vget_cycles();
1456
1457         last = pvclock_gtod_data.clock.cycle_last;
1458
1459         if (likely(ret >= last))
1460                 return ret;
1461
1462         /*
1463          * GCC likes to generate cmov here, but this branch is extremely
1464          * predictable (it's just a funciton of time and the likely is
1465          * very likely) and there's a data dependence, so force GCC
1466          * to generate a branch instead.  I don't barrier() because
1467          * we don't actually need a barrier, and if this function
1468          * ever gets inlined it will generate worse code.
1469          */
1470         asm volatile ("");
1471         return last;
1472 }
1473
1474 static inline u64 vgettsc(cycle_t *cycle_now)
1475 {
1476         long v;
1477         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1478
1479         *cycle_now = read_tsc();
1480
1481         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1482         return v * gtod->clock.mult;
1483 }
1484
1485 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1486 {
1487         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1488         unsigned long seq;
1489         int mode;
1490         u64 ns;
1491
1492         do {
1493                 seq = read_seqcount_begin(&gtod->seq);
1494                 mode = gtod->clock.vclock_mode;
1495                 ns = gtod->nsec_base;
1496                 ns += vgettsc(cycle_now);
1497                 ns >>= gtod->clock.shift;
1498                 ns += gtod->boot_ns;
1499         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1500         *t = ns;
1501
1502         return mode;
1503 }
1504
1505 /* returns true if host is using tsc clocksource */
1506 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1507 {
1508         /* checked again under seqlock below */
1509         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1510                 return false;
1511
1512         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1513 }
1514 #endif
1515
1516 /*
1517  *
1518  * Assuming a stable TSC across physical CPUS, and a stable TSC
1519  * across virtual CPUs, the following condition is possible.
1520  * Each numbered line represents an event visible to both
1521  * CPUs at the next numbered event.
1522  *
1523  * "timespecX" represents host monotonic time. "tscX" represents
1524  * RDTSC value.
1525  *
1526  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1527  *
1528  * 1.  read timespec0,tsc0
1529  * 2.                                   | timespec1 = timespec0 + N
1530  *                                      | tsc1 = tsc0 + M
1531  * 3. transition to guest               | transition to guest
1532  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1533  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1534  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1535  *
1536  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1537  *
1538  *      - ret0 < ret1
1539  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1540  *              ...
1541  *      - 0 < N - M => M < N
1542  *
1543  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1544  * always the case (the difference between two distinct xtime instances
1545  * might be smaller then the difference between corresponding TSC reads,
1546  * when updating guest vcpus pvclock areas).
1547  *
1548  * To avoid that problem, do not allow visibility of distinct
1549  * system_timestamp/tsc_timestamp values simultaneously: use a master
1550  * copy of host monotonic time values. Update that master copy
1551  * in lockstep.
1552  *
1553  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1554  *
1555  */
1556
1557 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1558 {
1559 #ifdef CONFIG_X86_64
1560         struct kvm_arch *ka = &kvm->arch;
1561         int vclock_mode;
1562         bool host_tsc_clocksource, vcpus_matched;
1563
1564         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1565                         atomic_read(&kvm->online_vcpus));
1566
1567         /*
1568          * If the host uses TSC clock, then passthrough TSC as stable
1569          * to the guest.
1570          */
1571         host_tsc_clocksource = kvm_get_time_and_clockread(
1572                                         &ka->master_kernel_ns,
1573                                         &ka->master_cycle_now);
1574
1575         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1576                                 && !backwards_tsc_observed
1577                                 && !ka->boot_vcpu_runs_old_kvmclock;
1578
1579         if (ka->use_master_clock)
1580                 atomic_set(&kvm_guest_has_master_clock, 1);
1581
1582         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1583         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1584                                         vcpus_matched);
1585 #endif
1586 }
1587
1588 static void kvm_gen_update_masterclock(struct kvm *kvm)
1589 {
1590 #ifdef CONFIG_X86_64
1591         int i;
1592         struct kvm_vcpu *vcpu;
1593         struct kvm_arch *ka = &kvm->arch;
1594
1595         spin_lock(&ka->pvclock_gtod_sync_lock);
1596         kvm_make_mclock_inprogress_request(kvm);
1597         /* no guest entries from this point */
1598         pvclock_update_vm_gtod_copy(kvm);
1599
1600         kvm_for_each_vcpu(i, vcpu, kvm)
1601                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1602
1603         /* guest entries allowed */
1604         kvm_for_each_vcpu(i, vcpu, kvm)
1605                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1606
1607         spin_unlock(&ka->pvclock_gtod_sync_lock);
1608 #endif
1609 }
1610
1611 static int kvm_guest_time_update(struct kvm_vcpu *v)
1612 {
1613         unsigned long flags, this_tsc_khz;
1614         struct kvm_vcpu_arch *vcpu = &v->arch;
1615         struct kvm_arch *ka = &v->kvm->arch;
1616         s64 kernel_ns;
1617         u64 tsc_timestamp, host_tsc;
1618         struct pvclock_vcpu_time_info guest_hv_clock;
1619         u8 pvclock_flags;
1620         bool use_master_clock;
1621
1622         kernel_ns = 0;
1623         host_tsc = 0;
1624
1625         /*
1626          * If the host uses TSC clock, then passthrough TSC as stable
1627          * to the guest.
1628          */
1629         spin_lock(&ka->pvclock_gtod_sync_lock);
1630         use_master_clock = ka->use_master_clock;
1631         if (use_master_clock) {
1632                 host_tsc = ka->master_cycle_now;
1633                 kernel_ns = ka->master_kernel_ns;
1634         }
1635         spin_unlock(&ka->pvclock_gtod_sync_lock);
1636
1637         /* Keep irq disabled to prevent changes to the clock */
1638         local_irq_save(flags);
1639         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1640         if (unlikely(this_tsc_khz == 0)) {
1641                 local_irq_restore(flags);
1642                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1643                 return 1;
1644         }
1645         if (!use_master_clock) {
1646                 host_tsc = native_read_tsc();
1647                 kernel_ns = get_kernel_ns();
1648         }
1649
1650         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1651
1652         /*
1653          * We may have to catch up the TSC to match elapsed wall clock
1654          * time for two reasons, even if kvmclock is used.
1655          *   1) CPU could have been running below the maximum TSC rate
1656          *   2) Broken TSC compensation resets the base at each VCPU
1657          *      entry to avoid unknown leaps of TSC even when running
1658          *      again on the same CPU.  This may cause apparent elapsed
1659          *      time to disappear, and the guest to stand still or run
1660          *      very slowly.
1661          */
1662         if (vcpu->tsc_catchup) {
1663                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1664                 if (tsc > tsc_timestamp) {
1665                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1666                         tsc_timestamp = tsc;
1667                 }
1668         }
1669
1670         local_irq_restore(flags);
1671
1672         if (!vcpu->pv_time_enabled)
1673                 return 0;
1674
1675         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1676                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1677                                    &vcpu->hv_clock.tsc_shift,
1678                                    &vcpu->hv_clock.tsc_to_system_mul);
1679                 vcpu->hw_tsc_khz = this_tsc_khz;
1680         }
1681
1682         /* With all the info we got, fill in the values */
1683         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1684         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1685         vcpu->last_guest_tsc = tsc_timestamp;
1686
1687         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1688                 &guest_hv_clock, sizeof(guest_hv_clock))))
1689                 return 0;
1690
1691         /* This VCPU is paused, but it's legal for a guest to read another
1692          * VCPU's kvmclock, so we really have to follow the specification where
1693          * it says that version is odd if data is being modified, and even after
1694          * it is consistent.
1695          *
1696          * Version field updates must be kept separate.  This is because
1697          * kvm_write_guest_cached might use a "rep movs" instruction, and
1698          * writes within a string instruction are weakly ordered.  So there
1699          * are three writes overall.
1700          *
1701          * As a small optimization, only write the version field in the first
1702          * and third write.  The vcpu->pv_time cache is still valid, because the
1703          * version field is the first in the struct.
1704          */
1705         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1706
1707         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1708         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1709                                 &vcpu->hv_clock,
1710                                 sizeof(vcpu->hv_clock.version));
1711
1712         smp_wmb();
1713
1714         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1715         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1716
1717         if (vcpu->pvclock_set_guest_stopped_request) {
1718                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1719                 vcpu->pvclock_set_guest_stopped_request = false;
1720         }
1721
1722         pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;
1723
1724         /* If the host uses TSC clocksource, then it is stable */
1725         if (use_master_clock)
1726                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1727
1728         vcpu->hv_clock.flags = pvclock_flags;
1729
1730         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1731
1732         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1733                                 &vcpu->hv_clock,
1734                                 sizeof(vcpu->hv_clock));
1735
1736         smp_wmb();
1737
1738         vcpu->hv_clock.version++;
1739         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1740                                 &vcpu->hv_clock,
1741                                 sizeof(vcpu->hv_clock.version));
1742         return 0;
1743 }
1744
1745 /*
1746  * kvmclock updates which are isolated to a given vcpu, such as
1747  * vcpu->cpu migration, should not allow system_timestamp from
1748  * the rest of the vcpus to remain static. Otherwise ntp frequency
1749  * correction applies to one vcpu's system_timestamp but not
1750  * the others.
1751  *
1752  * So in those cases, request a kvmclock update for all vcpus.
1753  * We need to rate-limit these requests though, as they can
1754  * considerably slow guests that have a large number of vcpus.
1755  * The time for a remote vcpu to update its kvmclock is bound
1756  * by the delay we use to rate-limit the updates.
1757  */
1758
1759 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1760
1761 static void kvmclock_update_fn(struct work_struct *work)
1762 {
1763         int i;
1764         struct delayed_work *dwork = to_delayed_work(work);
1765         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1766                                            kvmclock_update_work);
1767         struct kvm *kvm = container_of(ka, struct kvm, arch);
1768         struct kvm_vcpu *vcpu;
1769
1770         kvm_for_each_vcpu(i, vcpu, kvm) {
1771                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1772                 kvm_vcpu_kick(vcpu);
1773         }
1774 }
1775
1776 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1777 {
1778         struct kvm *kvm = v->kvm;
1779
1780         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1781         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1782                                         KVMCLOCK_UPDATE_DELAY);
1783 }
1784
1785 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1786
1787 static void kvmclock_sync_fn(struct work_struct *work)
1788 {
1789         struct delayed_work *dwork = to_delayed_work(work);
1790         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1791                                            kvmclock_sync_work);
1792         struct kvm *kvm = container_of(ka, struct kvm, arch);
1793
1794         if (!kvmclock_periodic_sync)
1795                 return;
1796
1797         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1798         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1799                                         KVMCLOCK_SYNC_PERIOD);
1800 }
1801
1802 static bool msr_mtrr_valid(unsigned msr)
1803 {
1804         switch (msr) {
1805         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1806         case MSR_MTRRfix64K_00000:
1807         case MSR_MTRRfix16K_80000:
1808         case MSR_MTRRfix16K_A0000:
1809         case MSR_MTRRfix4K_C0000:
1810         case MSR_MTRRfix4K_C8000:
1811         case MSR_MTRRfix4K_D0000:
1812         case MSR_MTRRfix4K_D8000:
1813         case MSR_MTRRfix4K_E0000:
1814         case MSR_MTRRfix4K_E8000:
1815         case MSR_MTRRfix4K_F0000:
1816         case MSR_MTRRfix4K_F8000:
1817         case MSR_MTRRdefType:
1818         case MSR_IA32_CR_PAT:
1819                 return true;
1820         case 0x2f8:
1821                 return true;
1822         }
1823         return false;
1824 }
1825
1826 static bool valid_pat_type(unsigned t)
1827 {
1828         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1829 }
1830
1831 static bool valid_mtrr_type(unsigned t)
1832 {
1833         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1834 }
1835
1836 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1837 {
1838         int i;
1839         u64 mask;
1840
1841         if (!msr_mtrr_valid(msr))
1842                 return false;
1843
1844         if (msr == MSR_IA32_CR_PAT) {
1845                 for (i = 0; i < 8; i++)
1846                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1847                                 return false;
1848                 return true;
1849         } else if (msr == MSR_MTRRdefType) {
1850                 if (data & ~0xcff)
1851                         return false;
1852                 return valid_mtrr_type(data & 0xff);
1853         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1854                 for (i = 0; i < 8 ; i++)
1855                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1856                                 return false;
1857                 return true;
1858         }
1859
1860         /* variable MTRRs */
1861         WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
1862
1863         mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
1864         if ((msr & 1) == 0) {
1865                 /* MTRR base */
1866                 if (!valid_mtrr_type(data & 0xff))
1867                         return false;
1868                 mask |= 0xf00;
1869         } else
1870                 /* MTRR mask */
1871                 mask |= 0x7ff;
1872         if (data & mask) {
1873                 kvm_inject_gp(vcpu, 0);
1874                 return false;
1875         }
1876
1877         return true;
1878 }
1879 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
1880
1881 static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
1882 {
1883         struct mtrr_state_type *mtrr_state = &vcpu->arch.mtrr_state;
1884         unsigned char mtrr_enabled = mtrr_state->enabled;
1885         gfn_t start, end, mask;
1886         int index;
1887         bool is_fixed = true;
1888
1889         if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
1890               !kvm_arch_has_noncoherent_dma(vcpu->kvm))
1891                 return;
1892
1893         if (!(mtrr_enabled & 0x2) && msr != MSR_MTRRdefType)
1894                 return;
1895
1896         switch (msr) {
1897         case MSR_MTRRfix64K_00000:
1898                 start = 0x0;
1899                 end = 0x80000;
1900                 break;
1901         case MSR_MTRRfix16K_80000:
1902                 start = 0x80000;
1903                 end = 0xa0000;
1904                 break;
1905         case MSR_MTRRfix16K_A0000:
1906                 start = 0xa0000;
1907                 end = 0xc0000;
1908                 break;
1909         case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
1910                 index = msr - MSR_MTRRfix4K_C0000;
1911                 start = 0xc0000 + index * (32 << 10);
1912                 end = start + (32 << 10);
1913                 break;
1914         case MSR_MTRRdefType:
1915                 is_fixed = false;
1916                 start = 0x0;
1917                 end = ~0ULL;
1918                 break;
1919         default:
1920                 /* variable range MTRRs. */
1921                 is_fixed = false;
1922                 index = (msr - 0x200) / 2;
1923                 start = (((u64)mtrr_state->var_ranges[index].base_hi) << 32) +
1924                        (mtrr_state->var_ranges[index].base_lo & PAGE_MASK);
1925                 mask = (((u64)mtrr_state->var_ranges[index].mask_hi) << 32) +
1926                        (mtrr_state->var_ranges[index].mask_lo & PAGE_MASK);
1927                 mask |= ~0ULL << cpuid_maxphyaddr(vcpu);
1928
1929                 end = ((start & mask) | ~mask) + 1;
1930         }
1931
1932         if (is_fixed && !(mtrr_enabled & 0x1))
1933                 return;
1934
1935         kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
1936 }
1937
1938 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1939 {
1940         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1941
1942         if (!kvm_mtrr_valid(vcpu, msr, data))
1943                 return 1;
1944
1945         if (msr == MSR_MTRRdefType) {
1946                 vcpu->arch.mtrr_state.def_type = data;
1947                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1948         } else if (msr == MSR_MTRRfix64K_00000)
1949                 p[0] = data;
1950         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1951                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1952         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1953                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1954         else if (msr == MSR_IA32_CR_PAT)
1955                 vcpu->arch.pat = data;
1956         else {  /* Variable MTRRs */
1957                 int idx, is_mtrr_mask;
1958                 u64 *pt;
1959
1960                 idx = (msr - 0x200) / 2;
1961                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1962                 if (!is_mtrr_mask)
1963                         pt =
1964                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1965                 else
1966                         pt =
1967                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1968                 *pt = data;
1969         }
1970
1971         update_mtrr(vcpu, msr);
1972         return 0;
1973 }
1974
1975 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1976 {
1977         u64 mcg_cap = vcpu->arch.mcg_cap;
1978         unsigned bank_num = mcg_cap & 0xff;
1979
1980         switch (msr) {
1981         case MSR_IA32_MCG_STATUS:
1982                 vcpu->arch.mcg_status = data;
1983                 break;
1984         case MSR_IA32_MCG_CTL:
1985                 if (!(mcg_cap & MCG_CTL_P))
1986                         return 1;
1987                 if (data != 0 && data != ~(u64)0)
1988                         return -1;
1989                 vcpu->arch.mcg_ctl = data;
1990                 break;
1991         default:
1992                 if (msr >= MSR_IA32_MC0_CTL &&
1993                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1994                         u32 offset = msr - MSR_IA32_MC0_CTL;
1995                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1996                          * some Linux kernels though clear bit 10 in bank 4 to
1997                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1998                          * this to avoid an uncatched #GP in the guest
1999                          */
2000                         if ((offset & 0x3) == 0 &&
2001                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2002                                 return -1;
2003                         vcpu->arch.mce_banks[offset] = data;
2004                         break;
2005                 }
2006                 return 1;
2007         }
2008         return 0;
2009 }
2010
2011 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2012 {
2013         struct kvm *kvm = vcpu->kvm;
2014         int lm = is_long_mode(vcpu);
2015         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2016                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2017         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2018                 : kvm->arch.xen_hvm_config.blob_size_32;
2019         u32 page_num = data & ~PAGE_MASK;
2020         u64 page_addr = data & PAGE_MASK;
2021         u8 *page;
2022         int r;
2023
2024         r = -E2BIG;
2025         if (page_num >= blob_size)
2026                 goto out;
2027         r = -ENOMEM;
2028         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2029         if (IS_ERR(page)) {
2030                 r = PTR_ERR(page);
2031                 goto out;
2032         }
2033         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2034                 goto out_free;
2035         r = 0;
2036 out_free:
2037         kfree(page);
2038 out:
2039         return r;
2040 }
2041
2042 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
2043 {
2044         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
2045 }
2046
2047 static bool kvm_hv_msr_partition_wide(u32 msr)
2048 {
2049         bool r = false;
2050         switch (msr) {
2051         case HV_X64_MSR_GUEST_OS_ID:
2052         case HV_X64_MSR_HYPERCALL:
2053         case HV_X64_MSR_REFERENCE_TSC:
2054         case HV_X64_MSR_TIME_REF_COUNT:
2055                 r = true;
2056                 break;
2057         }
2058
2059         return r;
2060 }
2061
2062 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2063 {
2064         struct kvm *kvm = vcpu->kvm;
2065
2066         switch (msr) {
2067         case HV_X64_MSR_GUEST_OS_ID:
2068                 kvm->arch.hv_guest_os_id = data;
2069                 /* setting guest os id to zero disables hypercall page */
2070                 if (!kvm->arch.hv_guest_os_id)
2071                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
2072                 break;
2073         case HV_X64_MSR_HYPERCALL: {
2074                 u64 gfn;
2075                 unsigned long addr;
2076                 u8 instructions[4];
2077
2078                 /* if guest os id is not set hypercall should remain disabled */
2079                 if (!kvm->arch.hv_guest_os_id)
2080                         break;
2081                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
2082                         kvm->arch.hv_hypercall = data;
2083                         break;
2084                 }
2085                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
2086                 addr = gfn_to_hva(kvm, gfn);
2087                 if (kvm_is_error_hva(addr))
2088                         return 1;
2089                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
2090                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
2091                 if (__copy_to_user((void __user *)addr, instructions, 4))
2092                         return 1;
2093                 kvm->arch.hv_hypercall = data;
2094                 mark_page_dirty(kvm, gfn);
2095                 break;
2096         }
2097         case HV_X64_MSR_REFERENCE_TSC: {
2098                 u64 gfn;
2099                 HV_REFERENCE_TSC_PAGE tsc_ref;
2100                 memset(&tsc_ref, 0, sizeof(tsc_ref));
2101                 kvm->arch.hv_tsc_page = data;
2102                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
2103                         break;
2104                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
2105                 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
2106                         &tsc_ref, sizeof(tsc_ref)))
2107                         return 1;
2108                 mark_page_dirty(kvm, gfn);
2109                 break;
2110         }
2111         default:
2112                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2113                             "data 0x%llx\n", msr, data);
2114                 return 1;
2115         }
2116         return 0;
2117 }
2118
2119 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2120 {
2121         switch (msr) {
2122         case HV_X64_MSR_APIC_ASSIST_PAGE: {
2123                 u64 gfn;
2124                 unsigned long addr;
2125
2126                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
2127                         vcpu->arch.hv_vapic = data;
2128                         if (kvm_lapic_enable_pv_eoi(vcpu, 0))
2129                                 return 1;
2130                         break;
2131                 }
2132                 gfn = data >> HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT;
2133                 addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
2134                 if (kvm_is_error_hva(addr))
2135                         return 1;
2136                 if (__clear_user((void __user *)addr, PAGE_SIZE))
2137                         return 1;
2138                 vcpu->arch.hv_vapic = data;
2139                 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2140                 if (kvm_lapic_enable_pv_eoi(vcpu, gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
2141                         return 1;
2142                 break;
2143         }
2144         case HV_X64_MSR_EOI:
2145                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
2146         case HV_X64_MSR_ICR:
2147                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
2148         case HV_X64_MSR_TPR:
2149                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
2150         default:
2151                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
2152                             "data 0x%llx\n", msr, data);
2153                 return 1;
2154         }
2155
2156         return 0;
2157 }
2158
2159 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2160 {
2161         gpa_t gpa = data & ~0x3f;
2162
2163         /* Bits 2:5 are reserved, Should be zero */
2164         if (data & 0x3c)
2165                 return 1;
2166
2167         vcpu->arch.apf.msr_val = data;
2168
2169         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2170                 kvm_clear_async_pf_completion_queue(vcpu);
2171                 kvm_async_pf_hash_reset(vcpu);
2172                 return 0;
2173         }
2174
2175         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2176                                         sizeof(u32)))
2177                 return 1;
2178
2179         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2180         kvm_async_pf_wakeup_all(vcpu);
2181         return 0;
2182 }
2183
2184 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2185 {
2186         vcpu->arch.pv_time_enabled = false;
2187 }
2188
2189 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2190 {
2191         u64 delta;
2192
2193         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2194                 return;
2195
2196         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2197         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2198         vcpu->arch.st.accum_steal = delta;
2199 }
2200
2201 static void record_steal_time(struct kvm_vcpu *vcpu)
2202 {
2203         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2204                 return;
2205
2206         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2207                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2208                 return;
2209
2210         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2211         vcpu->arch.st.steal.version += 2;
2212         vcpu->arch.st.accum_steal = 0;
2213
2214         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2215                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2216 }
2217
2218 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2219 {
2220         bool pr = false;
2221         u32 msr = msr_info->index;
2222         u64 data = msr_info->data;
2223
2224         switch (msr) {
2225         case MSR_AMD64_NB_CFG:
2226         case MSR_IA32_UCODE_REV:
2227         case MSR_IA32_UCODE_WRITE:
2228         case MSR_VM_HSAVE_PA:
2229         case MSR_AMD64_PATCH_LOADER:
2230         case MSR_AMD64_BU_CFG2:
2231                 break;
2232
2233         case MSR_EFER:
2234                 return set_efer(vcpu, data);
2235         case MSR_K7_HWCR:
2236                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2237                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2238                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2239                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2240                 if (data != 0) {
2241                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2242                                     data);
2243                         return 1;
2244                 }
2245                 break;
2246         case MSR_FAM10H_MMIO_CONF_BASE:
2247                 if (data != 0) {
2248                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2249                                     "0x%llx\n", data);
2250                         return 1;
2251                 }
2252                 break;
2253         case MSR_IA32_DEBUGCTLMSR:
2254                 if (!data) {
2255                         /* We support the non-activated case already */
2256                         break;
2257                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2258                         /* Values other than LBR and BTF are vendor-specific,
2259                            thus reserved and should throw a #GP */
2260                         return 1;
2261                 }
2262                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2263                             __func__, data);
2264                 break;
2265         case 0x200 ... 0x2ff:
2266                 return set_msr_mtrr(vcpu, msr, data);
2267         case MSR_IA32_APICBASE:
2268                 return kvm_set_apic_base(vcpu, msr_info);
2269         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2270                 return kvm_x2apic_msr_write(vcpu, msr, data);
2271         case MSR_IA32_TSCDEADLINE:
2272                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2273                 break;
2274         case MSR_IA32_TSC_ADJUST:
2275                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2276                         if (!msr_info->host_initiated) {
2277                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2278                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2279                         }
2280                         vcpu->arch.ia32_tsc_adjust_msr = data;
2281                 }
2282                 break;
2283         case MSR_IA32_MISC_ENABLE:
2284                 vcpu->arch.ia32_misc_enable_msr = data;
2285                 break;
2286         case MSR_IA32_SMBASE:
2287                 if (!msr_info->host_initiated)
2288                         return 1;
2289                 vcpu->arch.smbase = data;
2290                 break;
2291         case MSR_KVM_WALL_CLOCK_NEW:
2292         case MSR_KVM_WALL_CLOCK:
2293                 vcpu->kvm->arch.wall_clock = data;
2294                 kvm_write_wall_clock(vcpu->kvm, data);
2295                 break;
2296         case MSR_KVM_SYSTEM_TIME_NEW:
2297         case MSR_KVM_SYSTEM_TIME: {
2298                 u64 gpa_offset;
2299                 struct kvm_arch *ka = &vcpu->kvm->arch;
2300
2301                 kvmclock_reset(vcpu);
2302
2303                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2304                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2305
2306                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2307                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2308                                         &vcpu->requests);
2309
2310                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2311
2312                         ka->kvmclock_offset = -get_kernel_ns();
2313                 }
2314
2315                 vcpu->arch.time = data;
2316                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2317
2318                 /* we verify if the enable bit is set... */
2319                 if (!(data & 1))
2320                         break;
2321
2322                 gpa_offset = data & ~(PAGE_MASK | 1);
2323
2324                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2325                      &vcpu->arch.pv_time, data & ~1ULL,
2326                      sizeof(struct pvclock_vcpu_time_info)))
2327                         vcpu->arch.pv_time_enabled = false;
2328                 else
2329                         vcpu->arch.pv_time_enabled = true;
2330
2331                 break;
2332         }
2333         case MSR_KVM_ASYNC_PF_EN:
2334                 if (kvm_pv_enable_async_pf(vcpu, data))
2335                         return 1;
2336                 break;
2337         case MSR_KVM_STEAL_TIME:
2338
2339                 if (unlikely(!sched_info_on()))
2340                         return 1;
2341
2342                 if (data & KVM_STEAL_RESERVED_MASK)
2343                         return 1;
2344
2345                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2346                                                 data & KVM_STEAL_VALID_BITS,
2347                                                 sizeof(struct kvm_steal_time)))
2348                         return 1;
2349
2350                 vcpu->arch.st.msr_val = data;
2351
2352                 if (!(data & KVM_MSR_ENABLED))
2353                         break;
2354
2355                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2356
2357                 preempt_disable();
2358                 accumulate_steal_time(vcpu);
2359                 preempt_enable();
2360
2361                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2362
2363                 break;
2364         case MSR_KVM_PV_EOI_EN:
2365                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2366                         return 1;
2367                 break;
2368
2369         case MSR_IA32_MCG_CTL:
2370         case MSR_IA32_MCG_STATUS:
2371         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2372                 return set_msr_mce(vcpu, msr, data);
2373
2374         /* Performance counters are not protected by a CPUID bit,
2375          * so we should check all of them in the generic path for the sake of
2376          * cross vendor migration.
2377          * Writing a zero into the event select MSRs disables them,
2378          * which we perfectly emulate ;-). Any other value should be at least
2379          * reported, some guests depend on them.
2380          */
2381         case MSR_K7_EVNTSEL0:
2382         case MSR_K7_EVNTSEL1:
2383         case MSR_K7_EVNTSEL2:
2384         case MSR_K7_EVNTSEL3:
2385                 if (data != 0)
2386                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2387                                     "0x%x data 0x%llx\n", msr, data);
2388                 break;
2389         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2390          * so we ignore writes to make it happy.
2391          */
2392         case MSR_K7_PERFCTR0:
2393         case MSR_K7_PERFCTR1:
2394         case MSR_K7_PERFCTR2:
2395         case MSR_K7_PERFCTR3:
2396                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2397                             "0x%x data 0x%llx\n", msr, data);
2398                 break;
2399         case MSR_P6_PERFCTR0:
2400         case MSR_P6_PERFCTR1:
2401                 pr = true;
2402         case MSR_P6_EVNTSEL0:
2403         case MSR_P6_EVNTSEL1:
2404                 if (kvm_pmu_msr(vcpu, msr))
2405                         return kvm_pmu_set_msr(vcpu, msr_info);
2406
2407                 if (pr || data != 0)
2408                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2409                                     "0x%x data 0x%llx\n", msr, data);
2410                 break;
2411         case MSR_K7_CLK_CTL:
2412                 /*
2413                  * Ignore all writes to this no longer documented MSR.
2414                  * Writes are only relevant for old K7 processors,
2415                  * all pre-dating SVM, but a recommended workaround from
2416                  * AMD for these chips. It is possible to specify the
2417                  * affected processor models on the command line, hence
2418                  * the need to ignore the workaround.
2419                  */
2420                 break;
2421         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2422                 if (kvm_hv_msr_partition_wide(msr)) {
2423                         int r;
2424                         mutex_lock(&vcpu->kvm->lock);
2425                         r = set_msr_hyperv_pw(vcpu, msr, data);
2426                         mutex_unlock(&vcpu->kvm->lock);
2427                         return r;
2428                 } else
2429                         return set_msr_hyperv(vcpu, msr, data);
2430                 break;
2431         case MSR_IA32_BBL_CR_CTL3:
2432                 /* Drop writes to this legacy MSR -- see rdmsr
2433                  * counterpart for further detail.
2434                  */
2435                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2436                 break;
2437         case MSR_AMD64_OSVW_ID_LENGTH:
2438                 if (!guest_cpuid_has_osvw(vcpu))
2439                         return 1;
2440                 vcpu->arch.osvw.length = data;
2441                 break;
2442         case MSR_AMD64_OSVW_STATUS:
2443                 if (!guest_cpuid_has_osvw(vcpu))
2444                         return 1;
2445                 vcpu->arch.osvw.status = data;
2446                 break;
2447         default:
2448                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2449                         return xen_hvm_config(vcpu, data);
2450                 if (kvm_pmu_msr(vcpu, msr))
2451                         return kvm_pmu_set_msr(vcpu, msr_info);
2452                 if (!ignore_msrs) {
2453                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2454                                     msr, data);
2455                         return 1;
2456                 } else {
2457                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2458                                     msr, data);
2459                         break;
2460                 }
2461         }
2462         return 0;
2463 }
2464 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2465
2466
2467 /*
2468  * Reads an msr value (of 'msr_index') into 'pdata'.
2469  * Returns 0 on success, non-0 otherwise.
2470  * Assumes vcpu_load() was already called.
2471  */
2472 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2473 {
2474         return kvm_x86_ops->get_msr(vcpu, msr);
2475 }
2476 EXPORT_SYMBOL_GPL(kvm_get_msr);
2477
2478 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2479 {
2480         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2481
2482         if (!msr_mtrr_valid(msr))
2483                 return 1;
2484
2485         if (msr == MSR_MTRRdefType)
2486                 *pdata = vcpu->arch.mtrr_state.def_type +
2487                          (vcpu->arch.mtrr_state.enabled << 10);
2488         else if (msr == MSR_MTRRfix64K_00000)
2489                 *pdata = p[0];
2490         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2491                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2492         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2493                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2494         else if (msr == MSR_IA32_CR_PAT)
2495                 *pdata = vcpu->arch.pat;
2496         else {  /* Variable MTRRs */
2497                 int idx, is_mtrr_mask;
2498                 u64 *pt;
2499
2500                 idx = (msr - 0x200) / 2;
2501                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2502                 if (!is_mtrr_mask)
2503                         pt =
2504                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2505                 else
2506                         pt =
2507                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2508                 *pdata = *pt;
2509         }
2510
2511         return 0;
2512 }
2513
2514 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2515 {
2516         u64 data;
2517         u64 mcg_cap = vcpu->arch.mcg_cap;
2518         unsigned bank_num = mcg_cap & 0xff;
2519
2520         switch (msr) {
2521         case MSR_IA32_P5_MC_ADDR:
2522         case MSR_IA32_P5_MC_TYPE:
2523                 data = 0;
2524                 break;
2525         case MSR_IA32_MCG_CAP:
2526                 data = vcpu->arch.mcg_cap;
2527                 break;
2528         case MSR_IA32_MCG_CTL:
2529                 if (!(mcg_cap & MCG_CTL_P))
2530                         return 1;
2531                 data = vcpu->arch.mcg_ctl;
2532                 break;
2533         case MSR_IA32_MCG_STATUS:
2534                 data = vcpu->arch.mcg_status;
2535                 break;
2536         default:
2537                 if (msr >= MSR_IA32_MC0_CTL &&
2538                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2539                         u32 offset = msr - MSR_IA32_MC0_CTL;
2540                         data = vcpu->arch.mce_banks[offset];
2541                         break;
2542                 }
2543                 return 1;
2544         }
2545         *pdata = data;
2546         return 0;
2547 }
2548
2549 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2550 {
2551         u64 data = 0;
2552         struct kvm *kvm = vcpu->kvm;
2553
2554         switch (msr) {
2555         case HV_X64_MSR_GUEST_OS_ID:
2556                 data = kvm->arch.hv_guest_os_id;
2557                 break;
2558         case HV_X64_MSR_HYPERCALL:
2559                 data = kvm->arch.hv_hypercall;
2560                 break;
2561         case HV_X64_MSR_TIME_REF_COUNT: {
2562                 data =
2563                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2564                 break;
2565         }
2566         case HV_X64_MSR_REFERENCE_TSC:
2567                 data = kvm->arch.hv_tsc_page;
2568                 break;
2569         default:
2570                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2571                 return 1;
2572         }
2573
2574         *pdata = data;
2575         return 0;
2576 }
2577
2578 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2579 {
2580         u64 data = 0;
2581
2582         switch (msr) {
2583         case HV_X64_MSR_VP_INDEX: {
2584                 int r;
2585                 struct kvm_vcpu *v;
2586                 kvm_for_each_vcpu(r, v, vcpu->kvm) {
2587                         if (v == vcpu) {
2588                                 data = r;
2589                                 break;
2590                         }
2591                 }
2592                 break;
2593         }
2594         case HV_X64_MSR_EOI:
2595                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2596         case HV_X64_MSR_ICR:
2597                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2598         case HV_X64_MSR_TPR:
2599                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2600         case HV_X64_MSR_APIC_ASSIST_PAGE:
2601                 data = vcpu->arch.hv_vapic;
2602                 break;
2603         default:
2604                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2605                 return 1;
2606         }
2607         *pdata = data;
2608         return 0;
2609 }
2610
2611 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2612 {
2613         u64 data;
2614
2615         switch (msr_info->index) {
2616         case MSR_IA32_PLATFORM_ID:
2617         case MSR_IA32_EBL_CR_POWERON:
2618         case MSR_IA32_DEBUGCTLMSR:
2619         case MSR_IA32_LASTBRANCHFROMIP:
2620         case MSR_IA32_LASTBRANCHTOIP:
2621         case MSR_IA32_LASTINTFROMIP:
2622         case MSR_IA32_LASTINTTOIP:
2623         case MSR_K8_SYSCFG:
2624         case MSR_K7_HWCR:
2625         case MSR_VM_HSAVE_PA:
2626         case MSR_K7_EVNTSEL0:
2627         case MSR_K7_EVNTSEL1:
2628         case MSR_K7_EVNTSEL2:
2629         case MSR_K7_EVNTSEL3:
2630         case MSR_K7_PERFCTR0:
2631         case MSR_K7_PERFCTR1:
2632         case MSR_K7_PERFCTR2:
2633         case MSR_K7_PERFCTR3:
2634         case MSR_K8_INT_PENDING_MSG:
2635         case MSR_AMD64_NB_CFG:
2636         case MSR_FAM10H_MMIO_CONF_BASE:
2637         case MSR_AMD64_BU_CFG2:
2638                 msr_info->data = 0;
2639                 break;
2640         case MSR_P6_PERFCTR0:
2641         case MSR_P6_PERFCTR1:
2642         case MSR_P6_EVNTSEL0:
2643         case MSR_P6_EVNTSEL1:
2644                 if (kvm_pmu_msr(vcpu, msr_info->index))
2645                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2646                 msr_info->data = 0;
2647                 break;
2648         case MSR_IA32_UCODE_REV:
2649                 msr_info->data = 0x100000000ULL;
2650                 break;
2651         case MSR_MTRRcap:
2652                 msr_info->data = 0x500 | KVM_NR_VAR_MTRR;
2653                 break;
2654         case 0x200 ... 0x2ff:
2655                 return get_msr_mtrr(vcpu, msr_info->index, &msr_info->data);
2656         case 0xcd: /* fsb frequency */
2657                 msr_info->data = 3;
2658                 break;
2659                 /*
2660                  * MSR_EBC_FREQUENCY_ID
2661                  * Conservative value valid for even the basic CPU models.
2662                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2663                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2664                  * and 266MHz for model 3, or 4. Set Core Clock
2665                  * Frequency to System Bus Frequency Ratio to 1 (bits
2666                  * 31:24) even though these are only valid for CPU
2667                  * models > 2, however guests may end up dividing or
2668                  * multiplying by zero otherwise.
2669                  */
2670         case MSR_EBC_FREQUENCY_ID:
2671                 msr_info->data = 1 << 24;
2672                 break;
2673         case MSR_IA32_APICBASE:
2674                 msr_info->data = kvm_get_apic_base(vcpu);
2675                 break;
2676         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2677                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2678                 break;
2679         case MSR_IA32_TSCDEADLINE:
2680                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2681                 break;
2682         case MSR_IA32_TSC_ADJUST:
2683                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2684                 break;
2685         case MSR_IA32_MISC_ENABLE:
2686                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2687                 break;
2688         case MSR_IA32_SMBASE:
2689                 if (!msr_info->host_initiated)
2690                         return 1;
2691                 msr_info->data = vcpu->arch.smbase;
2692                 break;
2693         case MSR_IA32_PERF_STATUS:
2694                 /* TSC increment by tick */
2695                 msr_info->data = 1000ULL;
2696                 /* CPU multiplier */
2697                 data |= (((uint64_t)4ULL) << 40);
2698                 break;
2699         case MSR_EFER:
2700                 msr_info->data = vcpu->arch.efer;
2701                 break;
2702         case MSR_KVM_WALL_CLOCK:
2703         case MSR_KVM_WALL_CLOCK_NEW:
2704                 msr_info->data = vcpu->kvm->arch.wall_clock;
2705                 break;
2706         case MSR_KVM_SYSTEM_TIME:
2707         case MSR_KVM_SYSTEM_TIME_NEW:
2708                 msr_info->data = vcpu->arch.time;
2709                 break;
2710         case MSR_KVM_ASYNC_PF_EN:
2711                 msr_info->data = vcpu->arch.apf.msr_val;
2712                 break;
2713         case MSR_KVM_STEAL_TIME:
2714                 msr_info->data = vcpu->arch.st.msr_val;
2715                 break;
2716         case MSR_KVM_PV_EOI_EN:
2717                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2718                 break;
2719         case MSR_IA32_P5_MC_ADDR:
2720         case MSR_IA32_P5_MC_TYPE:
2721         case MSR_IA32_MCG_CAP:
2722         case MSR_IA32_MCG_CTL:
2723         case MSR_IA32_MCG_STATUS:
2724         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2725                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2726         case MSR_K7_CLK_CTL:
2727                 /*
2728                  * Provide expected ramp-up count for K7. All other
2729                  * are set to zero, indicating minimum divisors for
2730                  * every field.
2731                  *
2732                  * This prevents guest kernels on AMD host with CPU
2733                  * type 6, model 8 and higher from exploding due to
2734                  * the rdmsr failing.
2735                  */
2736                 msr_info->data = 0x20000000;
2737                 break;
2738         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2739                 if (kvm_hv_msr_partition_wide(msr_info->index)) {
2740                         int r;
2741                         mutex_lock(&vcpu->kvm->lock);
2742                         r = get_msr_hyperv_pw(vcpu, msr_info->index, &msr_info->data);
2743                         mutex_unlock(&vcpu->kvm->lock);
2744                         return r;
2745                 } else
2746                         return get_msr_hyperv(vcpu, msr_info->index, &msr_info->data);
2747                 break;
2748         case MSR_IA32_BBL_CR_CTL3:
2749                 /* This legacy MSR exists but isn't fully documented in current
2750                  * silicon.  It is however accessed by winxp in very narrow
2751                  * scenarios where it sets bit #19, itself documented as
2752                  * a "reserved" bit.  Best effort attempt to source coherent
2753                  * read data here should the balance of the register be
2754                  * interpreted by the guest:
2755                  *
2756                  * L2 cache control register 3: 64GB range, 256KB size,
2757                  * enabled, latency 0x1, configured
2758                  */
2759                 msr_info->data = 0xbe702111;
2760                 break;
2761         case MSR_AMD64_OSVW_ID_LENGTH:
2762                 if (!guest_cpuid_has_osvw(vcpu))
2763                         return 1;
2764                 msr_info->data = vcpu->arch.osvw.length;
2765                 break;
2766         case MSR_AMD64_OSVW_STATUS:
2767                 if (!guest_cpuid_has_osvw(vcpu))
2768                         return 1;
2769                 msr_info->data = vcpu->arch.osvw.status;
2770                 break;
2771         default:
2772                 if (kvm_pmu_msr(vcpu, msr_info->index))
2773                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2774                 if (!ignore_msrs) {
2775                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2776                         return 1;
2777                 } else {
2778                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2779                         msr_info->data = 0;
2780                 }
2781                 break;
2782         }
2783         return 0;
2784 }
2785 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2786
2787 /*
2788  * Read or write a bunch of msrs. All parameters are kernel addresses.
2789  *
2790  * @return number of msrs set successfully.
2791  */
2792 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2793                     struct kvm_msr_entry *entries,
2794                     int (*do_msr)(struct kvm_vcpu *vcpu,
2795                                   unsigned index, u64 *data))
2796 {
2797         int i, idx;
2798
2799         idx = srcu_read_lock(&vcpu->kvm->srcu);
2800         for (i = 0; i < msrs->nmsrs; ++i)
2801                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2802                         break;
2803         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2804
2805         return i;
2806 }
2807
2808 /*
2809  * Read or write a bunch of msrs. Parameters are user addresses.
2810  *
2811  * @return number of msrs set successfully.
2812  */
2813 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2814                   int (*do_msr)(struct kvm_vcpu *vcpu,
2815                                 unsigned index, u64 *data),
2816                   int writeback)
2817 {
2818         struct kvm_msrs msrs;
2819         struct kvm_msr_entry *entries;
2820         int r, n;
2821         unsigned size;
2822
2823         r = -EFAULT;
2824         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2825                 goto out;
2826
2827         r = -E2BIG;
2828         if (msrs.nmsrs >= MAX_IO_MSRS)
2829                 goto out;
2830
2831         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2832         entries = memdup_user(user_msrs->entries, size);
2833         if (IS_ERR(entries)) {
2834                 r = PTR_ERR(entries);
2835                 goto out;
2836         }
2837
2838         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2839         if (r < 0)
2840                 goto out_free;
2841
2842         r = -EFAULT;
2843         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2844                 goto out_free;
2845
2846         r = n;
2847
2848 out_free:
2849         kfree(entries);
2850 out:
2851         return r;
2852 }
2853
2854 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2855 {
2856         int r;
2857
2858         switch (ext) {
2859         case KVM_CAP_IRQCHIP:
2860         case KVM_CAP_HLT:
2861         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2862         case KVM_CAP_SET_TSS_ADDR:
2863         case KVM_CAP_EXT_CPUID:
2864         case KVM_CAP_EXT_EMUL_CPUID:
2865         case KVM_CAP_CLOCKSOURCE:
2866         case KVM_CAP_PIT:
2867         case KVM_CAP_NOP_IO_DELAY:
2868         case KVM_CAP_MP_STATE:
2869         case KVM_CAP_SYNC_MMU:
2870         case KVM_CAP_USER_NMI:
2871         case KVM_CAP_REINJECT_CONTROL:
2872         case KVM_CAP_IRQ_INJECT_STATUS:
2873         case KVM_CAP_IOEVENTFD:
2874         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2875         case KVM_CAP_PIT2:
2876         case KVM_CAP_PIT_STATE2:
2877         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2878         case KVM_CAP_XEN_HVM:
2879         case KVM_CAP_ADJUST_CLOCK:
2880         case KVM_CAP_VCPU_EVENTS:
2881         case KVM_CAP_HYPERV:
2882         case KVM_CAP_HYPERV_VAPIC:
2883         case KVM_CAP_HYPERV_SPIN:
2884         case KVM_CAP_PCI_SEGMENT:
2885         case KVM_CAP_DEBUGREGS:
2886         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2887         case KVM_CAP_XSAVE:
2888         case KVM_CAP_ASYNC_PF:
2889         case KVM_CAP_GET_TSC_KHZ:
2890         case KVM_CAP_KVMCLOCK_CTRL:
2891         case KVM_CAP_READONLY_MEM:
2892         case KVM_CAP_HYPERV_TIME:
2893         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2894         case KVM_CAP_TSC_DEADLINE_TIMER:
2895         case KVM_CAP_ENABLE_CAP_VM:
2896         case KVM_CAP_DISABLE_QUIRKS:
2897 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2898         case KVM_CAP_ASSIGN_DEV_IRQ:
2899         case KVM_CAP_PCI_2_3:
2900 #endif
2901                 r = 1;
2902                 break;
2903         case KVM_CAP_COALESCED_MMIO:
2904                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2905                 break;
2906         case KVM_CAP_VAPIC:
2907                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2908                 break;
2909         case KVM_CAP_NR_VCPUS:
2910                 r = KVM_SOFT_MAX_VCPUS;
2911                 break;
2912         case KVM_CAP_MAX_VCPUS:
2913                 r = KVM_MAX_VCPUS;
2914                 break;
2915         case KVM_CAP_NR_MEMSLOTS:
2916                 r = KVM_USER_MEM_SLOTS;
2917                 break;
2918         case KVM_CAP_PV_MMU:    /* obsolete */
2919                 r = 0;
2920                 break;
2921 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2922         case KVM_CAP_IOMMU:
2923                 r = iommu_present(&pci_bus_type);
2924                 break;
2925 #endif
2926         case KVM_CAP_MCE:
2927                 r = KVM_MAX_MCE_BANKS;
2928                 break;
2929         case KVM_CAP_XCRS:
2930                 r = cpu_has_xsave;
2931                 break;
2932         case KVM_CAP_TSC_CONTROL:
2933                 r = kvm_has_tsc_control;
2934                 break;
2935         default:
2936                 r = 0;
2937                 break;
2938         }
2939         return r;
2940
2941 }
2942
2943 long kvm_arch_dev_ioctl(struct file *filp,
2944                         unsigned int ioctl, unsigned long arg)
2945 {
2946         void __user *argp = (void __user *)arg;
2947         long r;
2948
2949         switch (ioctl) {
2950         case KVM_GET_MSR_INDEX_LIST: {
2951                 struct kvm_msr_list __user *user_msr_list = argp;
2952                 struct kvm_msr_list msr_list;
2953                 unsigned n;
2954
2955                 r = -EFAULT;
2956                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2957                         goto out;
2958                 n = msr_list.nmsrs;
2959                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2960                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2961                         goto out;
2962                 r = -E2BIG;
2963                 if (n < msr_list.nmsrs)
2964                         goto out;
2965                 r = -EFAULT;
2966                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2967                                  num_msrs_to_save * sizeof(u32)))
2968                         goto out;
2969                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2970                                  &emulated_msrs,
2971                                  num_emulated_msrs * sizeof(u32)))
2972                         goto out;
2973                 r = 0;
2974                 break;
2975         }
2976         case KVM_GET_SUPPORTED_CPUID:
2977         case KVM_GET_EMULATED_CPUID: {
2978                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2979                 struct kvm_cpuid2 cpuid;
2980
2981                 r = -EFAULT;
2982                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2983                         goto out;
2984
2985                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2986                                             ioctl);
2987                 if (r)
2988                         goto out;
2989
2990                 r = -EFAULT;
2991                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2992                         goto out;
2993                 r = 0;
2994                 break;
2995         }
2996         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2997                 u64 mce_cap;
2998
2999                 mce_cap = KVM_MCE_CAP_SUPPORTED;
3000                 r = -EFAULT;
3001                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
3002                         goto out;
3003                 r = 0;
3004                 break;
3005         }
3006         default:
3007                 r = -EINVAL;
3008         }
3009 out:
3010         return r;
3011 }
3012
3013 static void wbinvd_ipi(void *garbage)
3014 {
3015         wbinvd();
3016 }
3017
3018 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3019 {
3020         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3021 }
3022
3023 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3024 {
3025         /* Address WBINVD may be executed by guest */
3026         if (need_emulate_wbinvd(vcpu)) {
3027                 if (kvm_x86_ops->has_wbinvd_exit())
3028                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3029                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3030                         smp_call_function_single(vcpu->cpu,
3031                                         wbinvd_ipi, NULL, 1);
3032         }
3033
3034         kvm_x86_ops->vcpu_load(vcpu, cpu);
3035
3036         /* Apply any externally detected TSC adjustments (due to suspend) */
3037         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3038                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3039                 vcpu->arch.tsc_offset_adjustment = 0;
3040                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3041         }
3042
3043         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
3044                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3045                                 native_read_tsc() - vcpu->arch.last_host_tsc;
3046                 if (tsc_delta < 0)
3047                         mark_tsc_unstable("KVM discovered backwards TSC");
3048                 if (check_tsc_unstable()) {
3049                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
3050                                                 vcpu->arch.last_guest_tsc);
3051                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
3052                         vcpu->arch.tsc_catchup = 1;
3053                 }
3054                 /*
3055                  * On a host with synchronized TSC, there is no need to update
3056                  * kvmclock on vcpu->cpu migration
3057                  */
3058                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3059                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3060                 if (vcpu->cpu != cpu)
3061                         kvm_migrate_timers(vcpu);
3062                 vcpu->cpu = cpu;
3063         }
3064
3065         accumulate_steal_time(vcpu);
3066         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3067 }
3068
3069 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3070 {
3071         kvm_x86_ops->vcpu_put(vcpu);
3072         kvm_put_guest_fpu(vcpu);
3073         vcpu->arch.last_host_tsc = native_read_tsc();
3074 }
3075
3076 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3077                                     struct kvm_lapic_state *s)
3078 {
3079         kvm_x86_ops->sync_pir_to_irr(vcpu);
3080         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
3081
3082         return 0;
3083 }
3084
3085 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3086                                     struct kvm_lapic_state *s)
3087 {
3088         kvm_apic_post_state_restore(vcpu, s);
3089         update_cr8_intercept(vcpu);
3090
3091         return 0;
3092 }
3093
3094 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3095                                     struct kvm_interrupt *irq)
3096 {
3097         if (irq->irq >= KVM_NR_INTERRUPTS)
3098                 return -EINVAL;
3099         if (irqchip_in_kernel(vcpu->kvm))
3100                 return -ENXIO;
3101
3102         kvm_queue_interrupt(vcpu, irq->irq, false);
3103         kvm_make_request(KVM_REQ_EVENT, vcpu);
3104
3105         return 0;
3106 }
3107
3108 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3109 {
3110         kvm_inject_nmi(vcpu);
3111
3112         return 0;
3113 }
3114
3115 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3116 {
3117         kvm_make_request(KVM_REQ_SMI, vcpu);
3118
3119         return 0;
3120 }
3121
3122 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3123                                            struct kvm_tpr_access_ctl *tac)
3124 {
3125         if (tac->flags)
3126                 return -EINVAL;
3127         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3128         return 0;
3129 }
3130
3131 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3132                                         u64 mcg_cap)
3133 {
3134         int r;
3135         unsigned bank_num = mcg_cap & 0xff, bank;
3136
3137         r = -EINVAL;
3138         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3139                 goto out;
3140         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
3141                 goto out;
3142         r = 0;
3143         vcpu->arch.mcg_cap = mcg_cap;
3144         /* Init IA32_MCG_CTL to all 1s */
3145         if (mcg_cap & MCG_CTL_P)
3146                 vcpu->arch.mcg_ctl = ~(u64)0;
3147         /* Init IA32_MCi_CTL to all 1s */
3148         for (bank = 0; bank < bank_num; bank++)
3149                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3150 out:
3151         return r;
3152 }
3153
3154 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3155                                       struct kvm_x86_mce *mce)
3156 {
3157         u64 mcg_cap = vcpu->arch.mcg_cap;
3158         unsigned bank_num = mcg_cap & 0xff;
3159         u64 *banks = vcpu->arch.mce_banks;
3160
3161         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3162                 return -EINVAL;
3163         /*
3164          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3165          * reporting is disabled
3166          */
3167         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3168             vcpu->arch.mcg_ctl != ~(u64)0)
3169                 return 0;
3170         banks += 4 * mce->bank;
3171         /*
3172          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3173          * reporting is disabled for the bank
3174          */
3175         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3176                 return 0;
3177         if (mce->status & MCI_STATUS_UC) {
3178                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3179                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3180                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3181                         return 0;
3182                 }
3183                 if (banks[1] & MCI_STATUS_VAL)
3184                         mce->status |= MCI_STATUS_OVER;
3185                 banks[2] = mce->addr;
3186                 banks[3] = mce->misc;
3187                 vcpu->arch.mcg_status = mce->mcg_status;
3188                 banks[1] = mce->status;
3189                 kvm_queue_exception(vcpu, MC_VECTOR);
3190         } else if (!(banks[1] & MCI_STATUS_VAL)
3191                    || !(banks[1] & MCI_STATUS_UC)) {
3192                 if (banks[1] & MCI_STATUS_VAL)
3193                         mce->status |= MCI_STATUS_OVER;
3194                 banks[2] = mce->addr;
3195                 banks[3] = mce->misc;
3196                 banks[1] = mce->status;
3197         } else
3198                 banks[1] |= MCI_STATUS_OVER;
3199         return 0;
3200 }
3201
3202 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3203                                                struct kvm_vcpu_events *events)
3204 {
3205         process_nmi(vcpu);
3206         events->exception.injected =
3207                 vcpu->arch.exception.pending &&
3208                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3209         events->exception.nr = vcpu->arch.exception.nr;
3210         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3211         events->exception.pad = 0;
3212         events->exception.error_code = vcpu->arch.exception.error_code;
3213
3214         events->interrupt.injected =
3215                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3216         events->interrupt.nr = vcpu->arch.interrupt.nr;
3217         events->interrupt.soft = 0;
3218         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3219
3220         events->nmi.injected = vcpu->arch.nmi_injected;
3221         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3222         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3223         events->nmi.pad = 0;
3224
3225         events->sipi_vector = 0; /* never valid when reporting to user space */
3226
3227         events->smi.smm = is_smm(vcpu);
3228         events->smi.pending = vcpu->arch.smi_pending;
3229         events->smi.smm_inside_nmi =
3230                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3231         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3232
3233         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3234                          | KVM_VCPUEVENT_VALID_SHADOW
3235                          | KVM_VCPUEVENT_VALID_SMM);
3236         memset(&events->reserved, 0, sizeof(events->reserved));
3237 }
3238
3239 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3240                                               struct kvm_vcpu_events *events)
3241 {
3242         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3243                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3244                               | KVM_VCPUEVENT_VALID_SHADOW
3245                               | KVM_VCPUEVENT_VALID_SMM))
3246                 return -EINVAL;
3247
3248         process_nmi(vcpu);
3249         vcpu->arch.exception.pending = events->exception.injected;
3250         vcpu->arch.exception.nr = events->exception.nr;
3251         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3252         vcpu->arch.exception.error_code = events->exception.error_code;
3253
3254         vcpu->arch.interrupt.pending = events->interrupt.injected;
3255         vcpu->arch.interrupt.nr = events->interrupt.nr;
3256         vcpu->arch.interrupt.soft = events->interrupt.soft;
3257         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3258                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3259                                                   events->interrupt.shadow);
3260
3261         vcpu->arch.nmi_injected = events->nmi.injected;
3262         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3263                 vcpu->arch.nmi_pending = events->nmi.pending;
3264         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3265
3266         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3267             kvm_vcpu_has_lapic(vcpu))
3268                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3269
3270         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3271                 if (events->smi.smm)
3272                         vcpu->arch.hflags |= HF_SMM_MASK;
3273                 else
3274                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3275                 vcpu->arch.smi_pending = events->smi.pending;
3276                 if (events->smi.smm_inside_nmi)
3277                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3278                 else
3279                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3280                 if (kvm_vcpu_has_lapic(vcpu)) {
3281                         if (events->smi.latched_init)
3282                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3283                         else
3284                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3285                 }
3286         }
3287
3288         kvm_make_request(KVM_REQ_EVENT, vcpu);
3289
3290         return 0;
3291 }
3292
3293 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3294                                              struct kvm_debugregs *dbgregs)
3295 {
3296         unsigned long val;
3297
3298         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3299         kvm_get_dr(vcpu, 6, &val);
3300         dbgregs->dr6 = val;
3301         dbgregs->dr7 = vcpu->arch.dr7;
3302         dbgregs->flags = 0;
3303         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3304 }
3305
3306 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3307                                             struct kvm_debugregs *dbgregs)
3308 {
3309         if (dbgregs->flags)
3310                 return -EINVAL;
3311
3312         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3313         kvm_update_dr0123(vcpu);
3314         vcpu->arch.dr6 = dbgregs->dr6;
3315         kvm_update_dr6(vcpu);
3316         vcpu->arch.dr7 = dbgregs->dr7;
3317         kvm_update_dr7(vcpu);
3318
3319         return 0;
3320 }
3321
3322 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3323
3324 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3325 {
3326         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3327         u64 xstate_bv = xsave->xsave_hdr.xstate_bv;
3328         u64 valid;
3329
3330         /*
3331          * Copy legacy XSAVE area, to avoid complications with CPUID
3332          * leaves 0 and 1 in the loop below.
3333          */
3334         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3335
3336         /* Set XSTATE_BV */
3337         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3338
3339         /*
3340          * Copy each region from the possibly compacted offset to the
3341          * non-compacted offset.
3342          */
3343         valid = xstate_bv & ~XSTATE_FPSSE;
3344         while (valid) {
3345                 u64 feature = valid & -valid;
3346                 int index = fls64(feature) - 1;
3347                 void *src = get_xsave_addr(xsave, feature);
3348
3349                 if (src) {
3350                         u32 size, offset, ecx, edx;
3351                         cpuid_count(XSTATE_CPUID, index,
3352                                     &size, &offset, &ecx, &edx);
3353                         memcpy(dest + offset, src, size);
3354                 }
3355
3356                 valid -= feature;
3357         }
3358 }
3359
3360 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3361 {
3362         struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
3363         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3364         u64 valid;
3365
3366         /*
3367          * Copy legacy XSAVE area, to avoid complications with CPUID
3368          * leaves 0 and 1 in the loop below.
3369          */
3370         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3371
3372         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3373         xsave->xsave_hdr.xstate_bv = xstate_bv;
3374         if (cpu_has_xsaves)
3375                 xsave->xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3376
3377         /*
3378          * Copy each region from the non-compacted offset to the
3379          * possibly compacted offset.
3380          */
3381         valid = xstate_bv & ~XSTATE_FPSSE;
3382         while (valid) {
3383                 u64 feature = valid & -valid;
3384                 int index = fls64(feature) - 1;
3385                 void *dest = get_xsave_addr(xsave, feature);
3386
3387                 if (dest) {
3388                         u32 size, offset, ecx, edx;
3389                         cpuid_count(XSTATE_CPUID, index,
3390                                     &size, &offset, &ecx, &edx);
3391                         memcpy(dest, src + offset, size);
3392                 } else
3393                         WARN_ON_ONCE(1);
3394
3395                 valid -= feature;
3396         }
3397 }
3398
3399 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3400                                          struct kvm_xsave *guest_xsave)
3401 {
3402         if (cpu_has_xsave) {
3403                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3404                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3405         } else {
3406                 memcpy(guest_xsave->region,
3407                         &vcpu->arch.guest_fpu.state->fxsave,
3408                         sizeof(struct i387_fxsave_struct));
3409                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3410                         XSTATE_FPSSE;
3411         }
3412 }
3413
3414 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3415                                         struct kvm_xsave *guest_xsave)
3416 {
3417         u64 xstate_bv =
3418                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3419
3420         if (cpu_has_xsave) {
3421                 /*
3422                  * Here we allow setting states that are not present in
3423                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3424                  * with old userspace.
3425                  */
3426                 if (xstate_bv & ~kvm_supported_xcr0())
3427                         return -EINVAL;
3428                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3429         } else {
3430                 if (xstate_bv & ~XSTATE_FPSSE)
3431                         return -EINVAL;
3432                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3433                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3434         }
3435         return 0;
3436 }
3437
3438 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3439                                         struct kvm_xcrs *guest_xcrs)
3440 {
3441         if (!cpu_has_xsave) {
3442                 guest_xcrs->nr_xcrs = 0;
3443                 return;
3444         }
3445
3446         guest_xcrs->nr_xcrs = 1;
3447         guest_xcrs->flags = 0;
3448         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3449         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3450 }
3451
3452 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3453                                        struct kvm_xcrs *guest_xcrs)
3454 {
3455         int i, r = 0;
3456
3457         if (!cpu_has_xsave)
3458                 return -EINVAL;
3459
3460         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3461                 return -EINVAL;
3462
3463         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3464                 /* Only support XCR0 currently */
3465                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3466                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3467                                 guest_xcrs->xcrs[i].value);
3468                         break;
3469                 }
3470         if (r)
3471                 r = -EINVAL;
3472         return r;
3473 }
3474
3475 /*
3476  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3477  * stopped by the hypervisor.  This function will be called from the host only.
3478  * EINVAL is returned when the host attempts to set the flag for a guest that
3479  * does not support pv clocks.
3480  */
3481 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3482 {
3483         if (!vcpu->arch.pv_time_enabled)
3484                 return -EINVAL;
3485         vcpu->arch.pvclock_set_guest_stopped_request = true;
3486         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3487         return 0;
3488 }
3489
3490 long kvm_arch_vcpu_ioctl(struct file *filp,
3491                          unsigned int ioctl, unsigned long arg)
3492 {
3493         struct kvm_vcpu *vcpu = filp->private_data;
3494         void __user *argp = (void __user *)arg;
3495         int r;
3496         union {
3497                 struct kvm_lapic_state *lapic;
3498                 struct kvm_xsave *xsave;
3499                 struct kvm_xcrs *xcrs;
3500                 void *buffer;
3501         } u;
3502
3503         u.buffer = NULL;
3504         switch (ioctl) {
3505         case KVM_GET_LAPIC: {
3506                 r = -EINVAL;
3507                 if (!vcpu->arch.apic)
3508                         goto out;
3509                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3510
3511                 r = -ENOMEM;
3512                 if (!u.lapic)
3513                         goto out;
3514                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3515                 if (r)
3516                         goto out;
3517                 r = -EFAULT;
3518                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3519                         goto out;
3520                 r = 0;
3521                 break;
3522         }
3523         case KVM_SET_LAPIC: {
3524                 r = -EINVAL;
3525                 if (!vcpu->arch.apic)
3526                         goto out;
3527                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3528                 if (IS_ERR(u.lapic))
3529                         return PTR_ERR(u.lapic);
3530
3531                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3532                 break;
3533         }
3534         case KVM_INTERRUPT: {
3535                 struct kvm_interrupt irq;
3536
3537                 r = -EFAULT;
3538                 if (copy_from_user(&irq, argp, sizeof irq))
3539                         goto out;
3540                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3541                 break;
3542         }
3543         case KVM_NMI: {
3544                 r = kvm_vcpu_ioctl_nmi(vcpu);
3545                 break;
3546         }
3547         case KVM_SMI: {
3548                 r = kvm_vcpu_ioctl_smi(vcpu);
3549                 break;
3550         }
3551         case KVM_SET_CPUID: {
3552                 struct kvm_cpuid __user *cpuid_arg = argp;
3553                 struct kvm_cpuid cpuid;
3554
3555                 r = -EFAULT;
3556                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3557                         goto out;
3558                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3559                 break;
3560         }
3561         case KVM_SET_CPUID2: {
3562                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3563                 struct kvm_cpuid2 cpuid;
3564
3565                 r = -EFAULT;
3566                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3567                         goto out;
3568                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3569                                               cpuid_arg->entries);
3570                 break;
3571         }
3572         case KVM_GET_CPUID2: {
3573                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3574                 struct kvm_cpuid2 cpuid;
3575
3576                 r = -EFAULT;
3577                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3578                         goto out;
3579                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3580                                               cpuid_arg->entries);
3581                 if (r)
3582                         goto out;
3583                 r = -EFAULT;
3584                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3585                         goto out;
3586                 r = 0;
3587                 break;
3588         }
3589         case KVM_GET_MSRS:
3590                 r = msr_io(vcpu, argp, do_get_msr, 1);
3591                 break;
3592         case KVM_SET_MSRS:
3593                 r = msr_io(vcpu, argp, do_set_msr, 0);
3594                 break;
3595         case KVM_TPR_ACCESS_REPORTING: {
3596                 struct kvm_tpr_access_ctl tac;
3597
3598                 r = -EFAULT;
3599                 if (copy_from_user(&tac, argp, sizeof tac))
3600                         goto out;
3601                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3602                 if (r)
3603                         goto out;
3604                 r = -EFAULT;
3605                 if (copy_to_user(argp, &tac, sizeof tac))
3606                         goto out;
3607                 r = 0;
3608                 break;
3609         };
3610         case KVM_SET_VAPIC_ADDR: {
3611                 struct kvm_vapic_addr va;
3612
3613                 r = -EINVAL;
3614                 if (!irqchip_in_kernel(vcpu->kvm))
3615                         goto out;
3616                 r = -EFAULT;
3617                 if (copy_from_user(&va, argp, sizeof va))
3618                         goto out;
3619                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3620                 break;
3621         }
3622         case KVM_X86_SETUP_MCE: {
3623                 u64 mcg_cap;
3624
3625                 r = -EFAULT;
3626                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3627                         goto out;
3628                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3629                 break;
3630         }
3631         case KVM_X86_SET_MCE: {
3632                 struct kvm_x86_mce mce;
3633
3634                 r = -EFAULT;
3635                 if (copy_from_user(&mce, argp, sizeof mce))
3636                         goto out;
3637                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3638                 break;
3639         }
3640         case KVM_GET_VCPU_EVENTS: {
3641                 struct kvm_vcpu_events events;
3642
3643                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3644
3645                 r = -EFAULT;
3646                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3647                         break;
3648                 r = 0;
3649                 break;
3650         }
3651         case KVM_SET_VCPU_EVENTS: {
3652                 struct kvm_vcpu_events events;
3653
3654                 r = -EFAULT;
3655                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3656                         break;
3657
3658                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3659                 break;
3660         }
3661         case KVM_GET_DEBUGREGS: {
3662                 struct kvm_debugregs dbgregs;
3663
3664                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3665
3666                 r = -EFAULT;
3667                 if (copy_to_user(argp, &dbgregs,
3668                                  sizeof(struct kvm_debugregs)))
3669                         break;
3670                 r = 0;
3671                 break;
3672         }
3673         case KVM_SET_DEBUGREGS: {
3674                 struct kvm_debugregs dbgregs;
3675
3676                 r = -EFAULT;
3677                 if (copy_from_user(&dbgregs, argp,
3678                                    sizeof(struct kvm_debugregs)))
3679                         break;
3680
3681                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3682                 break;
3683         }
3684         case KVM_GET_XSAVE: {
3685                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3686                 r = -ENOMEM;
3687                 if (!u.xsave)
3688                         break;
3689
3690                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3691
3692                 r = -EFAULT;
3693                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3694                         break;
3695                 r = 0;
3696                 break;
3697         }
3698         case KVM_SET_XSAVE: {
3699                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3700                 if (IS_ERR(u.xsave))
3701                         return PTR_ERR(u.xsave);
3702
3703                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3704                 break;
3705         }
3706         case KVM_GET_XCRS: {
3707                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3708                 r = -ENOMEM;
3709                 if (!u.xcrs)
3710                         break;
3711
3712                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3713
3714                 r = -EFAULT;
3715                 if (copy_to_user(argp, u.xcrs,
3716                                  sizeof(struct kvm_xcrs)))
3717                         break;
3718                 r = 0;
3719                 break;
3720         }
3721         case KVM_SET_XCRS: {
3722                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3723                 if (IS_ERR(u.xcrs))
3724                         return PTR_ERR(u.xcrs);
3725
3726                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3727                 break;
3728         }
3729         case KVM_SET_TSC_KHZ: {
3730                 u32 user_tsc_khz;
3731
3732                 r = -EINVAL;
3733                 user_tsc_khz = (u32)arg;
3734
3735                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3736                         goto out;
3737
3738                 if (user_tsc_khz == 0)
3739                         user_tsc_khz = tsc_khz;
3740
3741                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3742
3743                 r = 0;
3744                 goto out;
3745         }
3746         case KVM_GET_TSC_KHZ: {
3747                 r = vcpu->arch.virtual_tsc_khz;
3748                 goto out;
3749         }
3750         case KVM_KVMCLOCK_CTRL: {
3751                 r = kvm_set_guest_paused(vcpu);
3752                 goto out;
3753         }
3754         default:
3755                 r = -EINVAL;
3756         }
3757 out:
3758         kfree(u.buffer);
3759         return r;
3760 }
3761
3762 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3763 {
3764         return VM_FAULT_SIGBUS;
3765 }
3766
3767 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3768 {
3769         int ret;
3770
3771         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3772                 return -EINVAL;
3773         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3774         return ret;
3775 }
3776
3777 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3778                                               u64 ident_addr)
3779 {
3780         kvm->arch.ept_identity_map_addr = ident_addr;
3781         return 0;
3782 }
3783
3784 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3785                                           u32 kvm_nr_mmu_pages)
3786 {
3787         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3788                 return -EINVAL;
3789
3790         mutex_lock(&kvm->slots_lock);
3791
3792         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3793         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3794
3795         mutex_unlock(&kvm->slots_lock);
3796         return 0;
3797 }
3798
3799 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3800 {
3801         return kvm->arch.n_max_mmu_pages;
3802 }
3803
3804 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3805 {
3806         int r;
3807
3808         r = 0;
3809         switch (chip->chip_id) {
3810         case KVM_IRQCHIP_PIC_MASTER:
3811                 memcpy(&chip->chip.pic,
3812                         &pic_irqchip(kvm)->pics[0],
3813                         sizeof(struct kvm_pic_state));
3814                 break;
3815         case KVM_IRQCHIP_PIC_SLAVE:
3816                 memcpy(&chip->chip.pic,
3817                         &pic_irqchip(kvm)->pics[1],
3818                         sizeof(struct kvm_pic_state));
3819                 break;
3820         case KVM_IRQCHIP_IOAPIC:
3821                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3822                 break;
3823         default:
3824                 r = -EINVAL;
3825                 break;
3826         }
3827         return r;
3828 }
3829
3830 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3831 {
3832         int r;
3833
3834         r = 0;
3835         switch (chip->chip_id) {
3836         case KVM_IRQCHIP_PIC_MASTER:
3837                 spin_lock(&pic_irqchip(kvm)->lock);
3838                 memcpy(&pic_irqchip(kvm)->pics[0],
3839                         &chip->chip.pic,
3840                         sizeof(struct kvm_pic_state));
3841                 spin_unlock(&pic_irqchip(kvm)->lock);
3842                 break;
3843         case KVM_IRQCHIP_PIC_SLAVE:
3844                 spin_lock(&pic_irqchip(kvm)->lock);
3845                 memcpy(&pic_irqchip(kvm)->pics[1],
3846                         &chip->chip.pic,
3847                         sizeof(struct kvm_pic_state));
3848                 spin_unlock(&pic_irqchip(kvm)->lock);
3849                 break;
3850         case KVM_IRQCHIP_IOAPIC:
3851                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3852                 break;
3853         default:
3854                 r = -EINVAL;
3855                 break;
3856         }
3857         kvm_pic_update_irq(pic_irqchip(kvm));
3858         return r;
3859 }
3860
3861 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3862 {
3863         int r = 0;
3864
3865         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3866         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3867         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3868         return r;
3869 }
3870
3871 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3872 {
3873         int r = 0;
3874
3875         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3876         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3877         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3878         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3879         return r;
3880 }
3881
3882 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3883 {
3884         int r = 0;
3885
3886         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3887         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3888                 sizeof(ps->channels));
3889         ps->flags = kvm->arch.vpit->pit_state.flags;
3890         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3891         memset(&ps->reserved, 0, sizeof(ps->reserved));
3892         return r;
3893 }
3894
3895 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3896 {
3897         int r = 0, start = 0;
3898         u32 prev_legacy, cur_legacy;
3899         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3900         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3901         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3902         if (!prev_legacy && cur_legacy)
3903                 start = 1;
3904         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3905                sizeof(kvm->arch.vpit->pit_state.channels));
3906         kvm->arch.vpit->pit_state.flags = ps->flags;
3907         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3908         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3909         return r;
3910 }
3911
3912 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3913                                  struct kvm_reinject_control *control)
3914 {
3915         if (!kvm->arch.vpit)
3916                 return -ENXIO;
3917         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3918         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3919         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3920         return 0;
3921 }
3922
3923 /**
3924  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3925  * @kvm: kvm instance
3926  * @log: slot id and address to which we copy the log
3927  *
3928  * Steps 1-4 below provide general overview of dirty page logging. See
3929  * kvm_get_dirty_log_protect() function description for additional details.
3930  *
3931  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3932  * always flush the TLB (step 4) even if previous step failed  and the dirty
3933  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3934  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3935  * writes will be marked dirty for next log read.
3936  *
3937  *   1. Take a snapshot of the bit and clear it if needed.
3938  *   2. Write protect the corresponding page.
3939  *   3. Copy the snapshot to the userspace.
3940  *   4. Flush TLB's if needed.
3941  */
3942 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3943 {
3944         bool is_dirty = false;
3945         int r;
3946
3947         mutex_lock(&kvm->slots_lock);
3948
3949         /*
3950          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3951          */
3952         if (kvm_x86_ops->flush_log_dirty)
3953                 kvm_x86_ops->flush_log_dirty(kvm);
3954
3955         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3956
3957         /*
3958          * All the TLBs can be flushed out of mmu lock, see the comments in
3959          * kvm_mmu_slot_remove_write_access().
3960          */
3961         lockdep_assert_held(&kvm->slots_lock);
3962         if (is_dirty)
3963                 kvm_flush_remote_tlbs(kvm);
3964
3965         mutex_unlock(&kvm->slots_lock);
3966         return r;
3967 }
3968
3969 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3970                         bool line_status)
3971 {
3972         if (!irqchip_in_kernel(kvm))
3973                 return -ENXIO;
3974
3975         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3976                                         irq_event->irq, irq_event->level,
3977                                         line_status);
3978         return 0;
3979 }
3980
3981 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3982                                    struct kvm_enable_cap *cap)
3983 {
3984         int r;
3985
3986         if (cap->flags)
3987                 return -EINVAL;
3988
3989         switch (cap->cap) {
3990         case KVM_CAP_DISABLE_QUIRKS:
3991                 kvm->arch.disabled_quirks = cap->args[0];
3992                 r = 0;
3993                 break;
3994         default:
3995                 r = -EINVAL;
3996                 break;
3997         }
3998         return r;
3999 }
4000
4001 long kvm_arch_vm_ioctl(struct file *filp,
4002                        unsigned int ioctl, unsigned long arg)
4003 {
4004         struct kvm *kvm = filp->private_data;
4005         void __user *argp = (void __user *)arg;
4006         int r = -ENOTTY;
4007         /*
4008          * This union makes it completely explicit to gcc-3.x
4009          * that these two variables' stack usage should be
4010          * combined, not added together.
4011          */
4012         union {
4013                 struct kvm_pit_state ps;
4014                 struct kvm_pit_state2 ps2;
4015                 struct kvm_pit_config pit_config;
4016         } u;
4017
4018         switch (ioctl) {
4019         case KVM_SET_TSS_ADDR:
4020                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4021                 break;
4022         case KVM_SET_IDENTITY_MAP_ADDR: {
4023                 u64 ident_addr;
4024
4025                 r = -EFAULT;
4026                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4027                         goto out;
4028                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4029                 break;
4030         }
4031         case KVM_SET_NR_MMU_PAGES:
4032                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4033                 break;
4034         case KVM_GET_NR_MMU_PAGES:
4035                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4036                 break;
4037         case KVM_CREATE_IRQCHIP: {
4038                 struct kvm_pic *vpic;
4039
4040                 mutex_lock(&kvm->lock);
4041                 r = -EEXIST;
4042                 if (kvm->arch.vpic)
4043                         goto create_irqchip_unlock;
4044                 r = -EINVAL;
4045                 if (atomic_read(&kvm->online_vcpus))
4046                         goto create_irqchip_unlock;
4047                 r = -ENOMEM;
4048                 vpic = kvm_create_pic(kvm);
4049                 if (vpic) {
4050                         r = kvm_ioapic_init(kvm);
4051                         if (r) {
4052                                 mutex_lock(&kvm->slots_lock);
4053                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
4054                                                           &vpic->dev_master);
4055                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
4056                                                           &vpic->dev_slave);
4057                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
4058                                                           &vpic->dev_eclr);
4059                                 mutex_unlock(&kvm->slots_lock);
4060                                 kfree(vpic);
4061                                 goto create_irqchip_unlock;
4062                         }
4063                 } else
4064                         goto create_irqchip_unlock;
4065                 smp_wmb();
4066                 kvm->arch.vpic = vpic;
4067                 smp_wmb();
4068                 r = kvm_setup_default_irq_routing(kvm);
4069                 if (r) {
4070                         mutex_lock(&kvm->slots_lock);
4071                         mutex_lock(&kvm->irq_lock);
4072                         kvm_ioapic_destroy(kvm);
4073                         kvm_destroy_pic(kvm);
4074                         mutex_unlock(&kvm->irq_lock);
4075                         mutex_unlock(&kvm->slots_lock);
4076                 }
4077         create_irqchip_unlock:
4078                 mutex_unlock(&kvm->lock);
4079                 break;
4080         }
4081         case KVM_CREATE_PIT:
4082                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4083                 goto create_pit;
4084         case KVM_CREATE_PIT2:
4085                 r = -EFAULT;
4086                 if (copy_from_user(&u.pit_config, argp,
4087                                    sizeof(struct kvm_pit_config)))
4088                         goto out;
4089         create_pit:
4090                 mutex_lock(&kvm->slots_lock);
4091                 r = -EEXIST;
4092                 if (kvm->arch.vpit)
4093                         goto create_pit_unlock;
4094                 r = -ENOMEM;
4095                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4096                 if (kvm->arch.vpit)
4097                         r = 0;
4098         create_pit_unlock:
4099                 mutex_unlock(&kvm->slots_lock);
4100                 break;
4101         case KVM_GET_IRQCHIP: {
4102                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4103                 struct kvm_irqchip *chip;
4104
4105                 chip = memdup_user(argp, sizeof(*chip));
4106                 if (IS_ERR(chip)) {
4107                         r = PTR_ERR(chip);
4108                         goto out;
4109                 }
4110
4111                 r = -ENXIO;
4112                 if (!irqchip_in_kernel(kvm))
4113                         goto get_irqchip_out;
4114                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4115                 if (r)
4116                         goto get_irqchip_out;
4117                 r = -EFAULT;
4118                 if (copy_to_user(argp, chip, sizeof *chip))
4119                         goto get_irqchip_out;
4120                 r = 0;
4121         get_irqchip_out:
4122                 kfree(chip);
4123                 break;
4124         }
4125         case KVM_SET_IRQCHIP: {
4126                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4127                 struct kvm_irqchip *chip;
4128
4129                 chip = memdup_user(argp, sizeof(*chip));
4130                 if (IS_ERR(chip)) {
4131                         r = PTR_ERR(chip);
4132                         goto out;
4133                 }
4134
4135                 r = -ENXIO;
4136                 if (!irqchip_in_kernel(kvm))
4137                         goto set_irqchip_out;
4138                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4139                 if (r)
4140                         goto set_irqchip_out;
4141                 r = 0;
4142         set_irqchip_out:
4143                 kfree(chip);
4144                 break;
4145         }
4146         case KVM_GET_PIT: {
4147                 r = -EFAULT;
4148                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4149                         goto out;
4150                 r = -ENXIO;
4151                 if (!kvm->arch.vpit)
4152                         goto out;
4153                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4154                 if (r)
4155                         goto out;
4156                 r = -EFAULT;
4157                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4158                         goto out;
4159                 r = 0;
4160                 break;
4161         }
4162         case KVM_SET_PIT: {
4163                 r = -EFAULT;
4164                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4165                         goto out;
4166                 r = -ENXIO;
4167                 if (!kvm->arch.vpit)
4168                         goto out;
4169                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4170                 break;
4171         }
4172         case KVM_GET_PIT2: {
4173                 r = -ENXIO;
4174                 if (!kvm->arch.vpit)
4175                         goto out;
4176                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4177                 if (r)
4178                         goto out;
4179                 r = -EFAULT;
4180                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4181                         goto out;
4182                 r = 0;
4183                 break;
4184         }
4185         case KVM_SET_PIT2: {
4186                 r = -EFAULT;
4187                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4188                         goto out;
4189                 r = -ENXIO;
4190                 if (!kvm->arch.vpit)
4191                         goto out;
4192                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4193                 break;
4194         }
4195         case KVM_REINJECT_CONTROL: {
4196                 struct kvm_reinject_control control;
4197                 r =  -EFAULT;
4198                 if (copy_from_user(&control, argp, sizeof(control)))
4199                         goto out;
4200                 r = kvm_vm_ioctl_reinject(kvm, &control);
4201                 break;
4202         }
4203         case KVM_XEN_HVM_CONFIG: {
4204                 r = -EFAULT;
4205                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4206                                    sizeof(struct kvm_xen_hvm_config)))
4207                         goto out;
4208                 r = -EINVAL;
4209                 if (kvm->arch.xen_hvm_config.flags)
4210                         goto out;
4211                 r = 0;
4212                 break;
4213         }
4214         case KVM_SET_CLOCK: {
4215                 struct kvm_clock_data user_ns;
4216                 u64 now_ns;
4217                 s64 delta;
4218
4219                 r = -EFAULT;
4220                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4221                         goto out;
4222
4223                 r = -EINVAL;
4224                 if (user_ns.flags)
4225                         goto out;
4226
4227                 r = 0;
4228                 local_irq_disable();
4229                 now_ns = get_kernel_ns();
4230                 delta = user_ns.clock - now_ns;
4231                 local_irq_enable();
4232                 kvm->arch.kvmclock_offset = delta;
4233                 kvm_gen_update_masterclock(kvm);
4234                 break;
4235         }
4236         case KVM_GET_CLOCK: {
4237                 struct kvm_clock_data user_ns;
4238                 u64 now_ns;
4239
4240                 local_irq_disable();
4241                 now_ns = get_kernel_ns();
4242                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4243                 local_irq_enable();
4244                 user_ns.flags = 0;
4245                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4246
4247                 r = -EFAULT;
4248                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4249                         goto out;
4250                 r = 0;
4251                 break;
4252         }
4253         case KVM_ENABLE_CAP: {
4254                 struct kvm_enable_cap cap;
4255
4256                 r = -EFAULT;
4257                 if (copy_from_user(&cap, argp, sizeof(cap)))
4258                         goto out;
4259                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4260                 break;
4261         }
4262         default:
4263                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4264         }
4265 out:
4266         return r;
4267 }
4268
4269 static void kvm_init_msr_list(void)
4270 {
4271         u32 dummy[2];
4272         unsigned i, j;
4273
4274         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4275                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4276                         continue;
4277
4278                 /*
4279                  * Even MSRs that are valid in the host may not be exposed
4280                  * to the guests in some cases.  We could work around this
4281                  * in VMX with the generic MSR save/load machinery, but it
4282                  * is not really worthwhile since it will really only
4283                  * happen with nested virtualization.
4284                  */
4285                 switch (msrs_to_save[i]) {
4286                 case MSR_IA32_BNDCFGS:
4287                         if (!kvm_x86_ops->mpx_supported())
4288                                 continue;
4289                         break;
4290                 default:
4291                         break;
4292                 }
4293
4294                 if (j < i)
4295                         msrs_to_save[j] = msrs_to_save[i];
4296                 j++;
4297         }
4298         num_msrs_to_save = j;
4299
4300         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4301                 switch (emulated_msrs[i]) {
4302                 default:
4303                         break;
4304                 }
4305
4306                 if (j < i)
4307                         emulated_msrs[j] = emulated_msrs[i];
4308                 j++;
4309         }
4310         num_emulated_msrs = j;
4311 }
4312
4313 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4314                            const void *v)
4315 {
4316         int handled = 0;
4317         int n;
4318
4319         do {
4320                 n = min(len, 8);
4321                 if (!(vcpu->arch.apic &&
4322                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4323                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4324                         break;
4325                 handled += n;
4326                 addr += n;
4327                 len -= n;
4328                 v += n;
4329         } while (len);
4330
4331         return handled;
4332 }
4333
4334 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4335 {
4336         int handled = 0;
4337         int n;
4338
4339         do {
4340                 n = min(len, 8);
4341                 if (!(vcpu->arch.apic &&
4342                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4343                                          addr, n, v))
4344                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4345                         break;
4346                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4347                 handled += n;
4348                 addr += n;
4349                 len -= n;
4350                 v += n;
4351         } while (len);
4352
4353         return handled;
4354 }
4355
4356 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4357                         struct kvm_segment *var, int seg)
4358 {
4359         kvm_x86_ops->set_segment(vcpu, var, seg);
4360 }
4361
4362 void kvm_get_segment(struct kvm_vcpu *vcpu,
4363                      struct kvm_segment *var, int seg)
4364 {
4365         kvm_x86_ops->get_segment(vcpu, var, seg);
4366 }
4367
4368 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4369                            struct x86_exception *exception)
4370 {
4371         gpa_t t_gpa;
4372
4373         BUG_ON(!mmu_is_nested(vcpu));
4374
4375         /* NPT walks are always user-walks */
4376         access |= PFERR_USER_MASK;
4377         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4378
4379         return t_gpa;
4380 }
4381
4382 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4383                               struct x86_exception *exception)
4384 {
4385         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4386         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4387 }
4388
4389  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4390                                 struct x86_exception *exception)
4391 {
4392         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4393         access |= PFERR_FETCH_MASK;
4394         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4395 }
4396
4397 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4398                                struct x86_exception *exception)
4399 {
4400         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4401         access |= PFERR_WRITE_MASK;
4402         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4403 }
4404
4405 /* uses this to access any guest's mapped memory without checking CPL */
4406 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4407                                 struct x86_exception *exception)
4408 {
4409         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4410 }
4411
4412 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4413                                       struct kvm_vcpu *vcpu, u32 access,
4414                                       struct x86_exception *exception)
4415 {
4416         void *data = val;
4417         int r = X86EMUL_CONTINUE;
4418
4419         while (bytes) {
4420                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4421                                                             exception);
4422                 unsigned offset = addr & (PAGE_SIZE-1);
4423                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4424                 int ret;
4425
4426                 if (gpa == UNMAPPED_GVA)
4427                         return X86EMUL_PROPAGATE_FAULT;
4428                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4429                                                offset, toread);
4430                 if (ret < 0) {
4431                         r = X86EMUL_IO_NEEDED;
4432                         goto out;
4433                 }
4434
4435                 bytes -= toread;
4436                 data += toread;
4437                 addr += toread;
4438         }
4439 out:
4440         return r;
4441 }
4442
4443 /* used for instruction fetching */
4444 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4445                                 gva_t addr, void *val, unsigned int bytes,
4446                                 struct x86_exception *exception)
4447 {
4448         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4449         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4450         unsigned offset;
4451         int ret;
4452
4453         /* Inline kvm_read_guest_virt_helper for speed.  */
4454         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4455                                                     exception);
4456         if (unlikely(gpa == UNMAPPED_GVA))
4457                 return X86EMUL_PROPAGATE_FAULT;
4458
4459         offset = addr & (PAGE_SIZE-1);
4460         if (WARN_ON(offset + bytes > PAGE_SIZE))
4461                 bytes = (unsigned)PAGE_SIZE - offset;
4462         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4463                                        offset, bytes);
4464         if (unlikely(ret < 0))
4465                 return X86EMUL_IO_NEEDED;
4466
4467         return X86EMUL_CONTINUE;
4468 }
4469
4470 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4471                                gva_t addr, void *val, unsigned int bytes,
4472                                struct x86_exception *exception)
4473 {
4474         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4475         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4476
4477         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4478                                           exception);
4479 }
4480 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4481
4482 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4483                                       gva_t addr, void *val, unsigned int bytes,
4484                                       struct x86_exception *exception)
4485 {
4486         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4487         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4488 }
4489
4490 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4491                                        gva_t addr, void *val,
4492                                        unsigned int bytes,
4493                                        struct x86_exception *exception)
4494 {
4495         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4496         void *data = val;
4497         int r = X86EMUL_CONTINUE;
4498
4499         while (bytes) {
4500                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4501                                                              PFERR_WRITE_MASK,
4502                                                              exception);
4503                 unsigned offset = addr & (PAGE_SIZE-1);
4504                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4505                 int ret;
4506
4507                 if (gpa == UNMAPPED_GVA)
4508                         return X86EMUL_PROPAGATE_FAULT;
4509                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4510                 if (ret < 0) {
4511                         r = X86EMUL_IO_NEEDED;
4512                         goto out;
4513                 }
4514
4515                 bytes -= towrite;
4516                 data += towrite;
4517                 addr += towrite;
4518         }
4519 out:
4520         return r;
4521 }
4522 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4523
4524 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4525                                 gpa_t *gpa, struct x86_exception *exception,
4526                                 bool write)
4527 {
4528         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4529                 | (write ? PFERR_WRITE_MASK : 0);
4530
4531         if (vcpu_match_mmio_gva(vcpu, gva)
4532             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4533                                  vcpu->arch.access, access)) {
4534                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4535                                         (gva & (PAGE_SIZE - 1));
4536                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4537                 return 1;
4538         }
4539
4540         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4541
4542         if (*gpa == UNMAPPED_GVA)
4543                 return -1;
4544
4545         /* For APIC access vmexit */
4546         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4547                 return 1;
4548
4549         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4550                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4551                 return 1;
4552         }
4553
4554         return 0;
4555 }
4556
4557 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4558                         const void *val, int bytes)
4559 {
4560         int ret;
4561
4562         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4563         if (ret < 0)
4564                 return 0;
4565         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4566         return 1;
4567 }
4568
4569 struct read_write_emulator_ops {
4570         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4571                                   int bytes);
4572         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4573                                   void *val, int bytes);
4574         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4575                                int bytes, void *val);
4576         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4577                                     void *val, int bytes);
4578         bool write;
4579 };
4580
4581 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4582 {
4583         if (vcpu->mmio_read_completed) {
4584                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4585                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4586                 vcpu->mmio_read_completed = 0;
4587                 return 1;
4588         }
4589
4590         return 0;
4591 }
4592
4593 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4594                         void *val, int bytes)
4595 {
4596         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4597 }
4598
4599 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4600                          void *val, int bytes)
4601 {
4602         return emulator_write_phys(vcpu, gpa, val, bytes);
4603 }
4604
4605 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4606 {
4607         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4608         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4609 }
4610
4611 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4612                           void *val, int bytes)
4613 {
4614         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4615         return X86EMUL_IO_NEEDED;
4616 }
4617
4618 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4619                            void *val, int bytes)
4620 {
4621         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4622
4623         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4624         return X86EMUL_CONTINUE;
4625 }
4626
4627 static const struct read_write_emulator_ops read_emultor = {
4628         .read_write_prepare = read_prepare,
4629         .read_write_emulate = read_emulate,
4630         .read_write_mmio = vcpu_mmio_read,
4631         .read_write_exit_mmio = read_exit_mmio,
4632 };
4633
4634 static const struct read_write_emulator_ops write_emultor = {
4635         .read_write_emulate = write_emulate,
4636         .read_write_mmio = write_mmio,
4637         .read_write_exit_mmio = write_exit_mmio,
4638         .write = true,
4639 };
4640
4641 static int emulator_read_write_onepage(unsigned long addr, void *val,
4642                                        unsigned int bytes,
4643                                        struct x86_exception *exception,
4644                                        struct kvm_vcpu *vcpu,
4645                                        const struct read_write_emulator_ops *ops)
4646 {
4647         gpa_t gpa;
4648         int handled, ret;
4649         bool write = ops->write;
4650         struct kvm_mmio_fragment *frag;
4651
4652         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4653
4654         if (ret < 0)
4655                 return X86EMUL_PROPAGATE_FAULT;
4656
4657         /* For APIC access vmexit */
4658         if (ret)
4659                 goto mmio;
4660
4661         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4662                 return X86EMUL_CONTINUE;
4663
4664 mmio:
4665         /*
4666          * Is this MMIO handled locally?
4667          */
4668         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4669         if (handled == bytes)
4670                 return X86EMUL_CONTINUE;
4671
4672         gpa += handled;
4673         bytes -= handled;
4674         val += handled;
4675
4676         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4677         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4678         frag->gpa = gpa;
4679         frag->data = val;
4680         frag->len = bytes;
4681         return X86EMUL_CONTINUE;
4682 }
4683
4684 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4685                         unsigned long addr,
4686                         void *val, unsigned int bytes,
4687                         struct x86_exception *exception,
4688                         const struct read_write_emulator_ops *ops)
4689 {
4690         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4691         gpa_t gpa;
4692         int rc;
4693
4694         if (ops->read_write_prepare &&
4695                   ops->read_write_prepare(vcpu, val, bytes))
4696                 return X86EMUL_CONTINUE;
4697
4698         vcpu->mmio_nr_fragments = 0;
4699
4700         /* Crossing a page boundary? */
4701         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4702                 int now;
4703
4704                 now = -addr & ~PAGE_MASK;
4705                 rc = emulator_read_write_onepage(addr, val, now, exception,
4706                                                  vcpu, ops);
4707
4708                 if (rc != X86EMUL_CONTINUE)
4709                         return rc;
4710                 addr += now;
4711                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4712                         addr = (u32)addr;
4713                 val += now;
4714                 bytes -= now;
4715         }
4716
4717         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4718                                          vcpu, ops);
4719         if (rc != X86EMUL_CONTINUE)
4720                 return rc;
4721
4722         if (!vcpu->mmio_nr_fragments)
4723                 return rc;
4724
4725         gpa = vcpu->mmio_fragments[0].gpa;
4726
4727         vcpu->mmio_needed = 1;
4728         vcpu->mmio_cur_fragment = 0;
4729
4730         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4731         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4732         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4733         vcpu->run->mmio.phys_addr = gpa;
4734
4735         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4736 }
4737
4738 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4739                                   unsigned long addr,
4740                                   void *val,
4741                                   unsigned int bytes,
4742                                   struct x86_exception *exception)
4743 {
4744         return emulator_read_write(ctxt, addr, val, bytes,
4745                                    exception, &read_emultor);
4746 }
4747
4748 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4749                             unsigned long addr,
4750                             const void *val,
4751                             unsigned int bytes,
4752                             struct x86_exception *exception)
4753 {
4754         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4755                                    exception, &write_emultor);
4756 }
4757
4758 #define CMPXCHG_TYPE(t, ptr, old, new) \
4759         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4760
4761 #ifdef CONFIG_X86_64
4762 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4763 #else
4764 #  define CMPXCHG64(ptr, old, new) \
4765         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4766 #endif
4767
4768 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4769                                      unsigned long addr,
4770                                      const void *old,
4771                                      const void *new,
4772                                      unsigned int bytes,
4773                                      struct x86_exception *exception)
4774 {
4775         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4776         gpa_t gpa;
4777         struct page *page;
4778         char *kaddr;
4779         bool exchanged;
4780
4781         /* guests cmpxchg8b have to be emulated atomically */
4782         if (bytes > 8 || (bytes & (bytes - 1)))
4783                 goto emul_write;
4784
4785         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4786
4787         if (gpa == UNMAPPED_GVA ||
4788             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4789                 goto emul_write;
4790
4791         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4792                 goto emul_write;
4793
4794         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4795         if (is_error_page(page))
4796                 goto emul_write;
4797
4798         kaddr = kmap_atomic(page);
4799         kaddr += offset_in_page(gpa);
4800         switch (bytes) {
4801         case 1:
4802                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4803                 break;
4804         case 2:
4805                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4806                 break;
4807         case 4:
4808                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4809                 break;
4810         case 8:
4811                 exchanged = CMPXCHG64(kaddr, old, new);
4812                 break;
4813         default:
4814                 BUG();
4815         }
4816         kunmap_atomic(kaddr);
4817         kvm_release_page_dirty(page);
4818
4819         if (!exchanged)
4820                 return X86EMUL_CMPXCHG_FAILED;
4821
4822         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4823         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4824
4825         return X86EMUL_CONTINUE;
4826
4827 emul_write:
4828         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4829
4830         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4831 }
4832
4833 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4834 {
4835         /* TODO: String I/O for in kernel device */
4836         int r;
4837
4838         if (vcpu->arch.pio.in)
4839                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4840                                     vcpu->arch.pio.size, pd);
4841         else
4842                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4843                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4844                                      pd);
4845         return r;
4846 }
4847
4848 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4849                                unsigned short port, void *val,
4850                                unsigned int count, bool in)
4851 {
4852         vcpu->arch.pio.port = port;
4853         vcpu->arch.pio.in = in;
4854         vcpu->arch.pio.count  = count;
4855         vcpu->arch.pio.size = size;
4856
4857         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4858                 vcpu->arch.pio.count = 0;
4859                 return 1;
4860         }
4861
4862         vcpu->run->exit_reason = KVM_EXIT_IO;
4863         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4864         vcpu->run->io.size = size;
4865         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4866         vcpu->run->io.count = count;
4867         vcpu->run->io.port = port;
4868
4869         return 0;
4870 }
4871
4872 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4873                                     int size, unsigned short port, void *val,
4874                                     unsigned int count)
4875 {
4876         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4877         int ret;
4878
4879         if (vcpu->arch.pio.count)
4880                 goto data_avail;
4881
4882         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4883         if (ret) {
4884 data_avail:
4885                 memcpy(val, vcpu->arch.pio_data, size * count);
4886                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4887                 vcpu->arch.pio.count = 0;
4888                 return 1;
4889         }
4890
4891         return 0;
4892 }
4893
4894 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4895                                      int size, unsigned short port,
4896                                      const void *val, unsigned int count)
4897 {
4898         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4899
4900         memcpy(vcpu->arch.pio_data, val, size * count);
4901         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4902         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4903 }
4904
4905 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4906 {
4907         return kvm_x86_ops->get_segment_base(vcpu, seg);
4908 }
4909
4910 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4911 {
4912         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4913 }
4914
4915 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4916 {
4917         if (!need_emulate_wbinvd(vcpu))
4918                 return X86EMUL_CONTINUE;
4919
4920         if (kvm_x86_ops->has_wbinvd_exit()) {
4921                 int cpu = get_cpu();
4922
4923                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4924                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4925                                 wbinvd_ipi, NULL, 1);
4926                 put_cpu();
4927                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4928         } else
4929                 wbinvd();
4930         return X86EMUL_CONTINUE;
4931 }
4932
4933 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4934 {
4935         kvm_x86_ops->skip_emulated_instruction(vcpu);
4936         return kvm_emulate_wbinvd_noskip(vcpu);
4937 }
4938 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4939
4940
4941
4942 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4943 {
4944         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4945 }
4946
4947 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4948                            unsigned long *dest)
4949 {
4950         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4951 }
4952
4953 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4954                            unsigned long value)
4955 {
4956
4957         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4958 }
4959
4960 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4961 {
4962         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4963 }
4964
4965 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4966 {
4967         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4968         unsigned long value;
4969
4970         switch (cr) {
4971         case 0:
4972                 value = kvm_read_cr0(vcpu);
4973                 break;
4974         case 2:
4975                 value = vcpu->arch.cr2;
4976                 break;
4977         case 3:
4978                 value = kvm_read_cr3(vcpu);
4979                 break;
4980         case 4:
4981                 value = kvm_read_cr4(vcpu);
4982                 break;
4983         case 8:
4984                 value = kvm_get_cr8(vcpu);
4985                 break;
4986         default:
4987                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4988                 return 0;
4989         }
4990
4991         return value;
4992 }
4993
4994 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4995 {
4996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4997         int res = 0;
4998
4999         switch (cr) {
5000         case 0:
5001                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5002                 break;
5003         case 2:
5004                 vcpu->arch.cr2 = val;
5005                 break;
5006         case 3:
5007                 res = kvm_set_cr3(vcpu, val);
5008                 break;
5009         case 4:
5010                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5011                 break;
5012         case 8:
5013                 res = kvm_set_cr8(vcpu, val);
5014                 break;
5015         default:
5016                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5017                 res = -1;
5018         }
5019
5020         return res;
5021 }
5022
5023 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5024 {
5025         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5026 }
5027
5028 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5029 {
5030         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5031 }
5032
5033 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5034 {
5035         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5036 }
5037
5038 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5039 {
5040         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5041 }
5042
5043 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5044 {
5045         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5046 }
5047
5048 static unsigned long emulator_get_cached_segment_base(
5049         struct x86_emulate_ctxt *ctxt, int seg)
5050 {
5051         return get_segment_base(emul_to_vcpu(ctxt), seg);
5052 }
5053
5054 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5055                                  struct desc_struct *desc, u32 *base3,
5056                                  int seg)
5057 {
5058         struct kvm_segment var;
5059
5060         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5061         *selector = var.selector;
5062
5063         if (var.unusable) {
5064                 memset(desc, 0, sizeof(*desc));
5065                 return false;
5066         }
5067
5068         if (var.g)
5069                 var.limit >>= 12;
5070         set_desc_limit(desc, var.limit);
5071         set_desc_base(desc, (unsigned long)var.base);
5072 #ifdef CONFIG_X86_64
5073         if (base3)
5074                 *base3 = var.base >> 32;
5075 #endif
5076         desc->type = var.type;
5077         desc->s = var.s;
5078         desc->dpl = var.dpl;
5079         desc->p = var.present;
5080         desc->avl = var.avl;
5081         desc->l = var.l;
5082         desc->d = var.db;
5083         desc->g = var.g;
5084
5085         return true;
5086 }
5087
5088 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5089                                  struct desc_struct *desc, u32 base3,
5090                                  int seg)
5091 {
5092         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5093         struct kvm_segment var;
5094
5095         var.selector = selector;
5096         var.base = get_desc_base(desc);
5097 #ifdef CONFIG_X86_64
5098         var.base |= ((u64)base3) << 32;
5099 #endif
5100         var.limit = get_desc_limit(desc);
5101         if (desc->g)
5102                 var.limit = (var.limit << 12) | 0xfff;
5103         var.type = desc->type;
5104         var.dpl = desc->dpl;
5105         var.db = desc->d;
5106         var.s = desc->s;
5107         var.l = desc->l;
5108         var.g = desc->g;
5109         var.avl = desc->avl;
5110         var.present = desc->p;
5111         var.unusable = !var.present;
5112         var.padding = 0;
5113
5114         kvm_set_segment(vcpu, &var, seg);
5115         return;
5116 }
5117
5118 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5119                             u32 msr_index, u64 *pdata)
5120 {
5121         struct msr_data msr;
5122         int r;
5123
5124         msr.index = msr_index;
5125         msr.host_initiated = false;
5126         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5127         if (r)
5128                 return r;
5129
5130         *pdata = msr.data;
5131         return 0;
5132 }
5133
5134 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5135                             u32 msr_index, u64 data)
5136 {
5137         struct msr_data msr;
5138
5139         msr.data = data;
5140         msr.index = msr_index;
5141         msr.host_initiated = false;
5142         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5143 }
5144
5145 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5146 {
5147         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5148
5149         return vcpu->arch.smbase;
5150 }
5151
5152 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5153 {
5154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5155
5156         vcpu->arch.smbase = smbase;
5157 }
5158
5159 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5160                               u32 pmc)
5161 {
5162         return kvm_pmu_check_pmc(emul_to_vcpu(ctxt), pmc);
5163 }
5164
5165 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5166                              u32 pmc, u64 *pdata)
5167 {
5168         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
5169 }
5170
5171 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5172 {
5173         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5174 }
5175
5176 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5177 {
5178         preempt_disable();
5179         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5180         /*
5181          * CR0.TS may reference the host fpu state, not the guest fpu state,
5182          * so it may be clear at this point.
5183          */
5184         clts();
5185 }
5186
5187 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5188 {
5189         preempt_enable();
5190 }
5191
5192 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5193                               struct x86_instruction_info *info,
5194                               enum x86_intercept_stage stage)
5195 {
5196         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5197 }
5198
5199 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5200                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5201 {
5202         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5203 }
5204
5205 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5206 {
5207         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5208 }
5209
5210 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5211 {
5212         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5213 }
5214
5215 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5216 {
5217         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5218 }
5219
5220 static const struct x86_emulate_ops emulate_ops = {
5221         .read_gpr            = emulator_read_gpr,
5222         .write_gpr           = emulator_write_gpr,
5223         .read_std            = kvm_read_guest_virt_system,
5224         .write_std           = kvm_write_guest_virt_system,
5225         .fetch               = kvm_fetch_guest_virt,
5226         .read_emulated       = emulator_read_emulated,
5227         .write_emulated      = emulator_write_emulated,
5228         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5229         .invlpg              = emulator_invlpg,
5230         .pio_in_emulated     = emulator_pio_in_emulated,
5231         .pio_out_emulated    = emulator_pio_out_emulated,
5232         .get_segment         = emulator_get_segment,
5233         .set_segment         = emulator_set_segment,
5234         .get_cached_segment_base = emulator_get_cached_segment_base,
5235         .get_gdt             = emulator_get_gdt,
5236         .get_idt             = emulator_get_idt,
5237         .set_gdt             = emulator_set_gdt,
5238         .set_idt             = emulator_set_idt,
5239         .get_cr              = emulator_get_cr,
5240         .set_cr              = emulator_set_cr,
5241         .cpl                 = emulator_get_cpl,
5242         .get_dr              = emulator_get_dr,
5243         .set_dr              = emulator_set_dr,
5244         .get_smbase          = emulator_get_smbase,
5245         .set_smbase          = emulator_set_smbase,
5246         .set_msr             = emulator_set_msr,
5247         .get_msr             = emulator_get_msr,
5248         .check_pmc           = emulator_check_pmc,
5249         .read_pmc            = emulator_read_pmc,
5250         .halt                = emulator_halt,
5251         .wbinvd              = emulator_wbinvd,
5252         .fix_hypercall       = emulator_fix_hypercall,
5253         .get_fpu             = emulator_get_fpu,
5254         .put_fpu             = emulator_put_fpu,
5255         .intercept           = emulator_intercept,
5256         .get_cpuid           = emulator_get_cpuid,
5257         .set_nmi_mask        = emulator_set_nmi_mask,
5258 };
5259
5260 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5261 {
5262         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5263         /*
5264          * an sti; sti; sequence only disable interrupts for the first
5265          * instruction. So, if the last instruction, be it emulated or
5266          * not, left the system with the INT_STI flag enabled, it
5267          * means that the last instruction is an sti. We should not
5268          * leave the flag on in this case. The same goes for mov ss
5269          */
5270         if (int_shadow & mask)
5271                 mask = 0;
5272         if (unlikely(int_shadow || mask)) {
5273                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5274                 if (!mask)
5275                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5276         }
5277 }
5278
5279 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5280 {
5281         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5282         if (ctxt->exception.vector == PF_VECTOR)
5283                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5284
5285         if (ctxt->exception.error_code_valid)
5286                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5287                                       ctxt->exception.error_code);
5288         else
5289                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5290         return false;
5291 }
5292
5293 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5294 {
5295         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5296         int cs_db, cs_l;
5297
5298         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5299
5300         ctxt->eflags = kvm_get_rflags(vcpu);
5301         ctxt->eip = kvm_rip_read(vcpu);
5302         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5303                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5304                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5305                      cs_db                              ? X86EMUL_MODE_PROT32 :
5306                                                           X86EMUL_MODE_PROT16;
5307         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5308         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5309         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5310         ctxt->emul_flags = vcpu->arch.hflags;
5311
5312         init_decode_cache(ctxt);
5313         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5314 }
5315
5316 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5317 {
5318         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5319         int ret;
5320
5321         init_emulate_ctxt(vcpu);
5322
5323         ctxt->op_bytes = 2;
5324         ctxt->ad_bytes = 2;
5325         ctxt->_eip = ctxt->eip + inc_eip;
5326         ret = emulate_int_real(ctxt, irq);
5327
5328         if (ret != X86EMUL_CONTINUE)
5329                 return EMULATE_FAIL;
5330
5331         ctxt->eip = ctxt->_eip;
5332         kvm_rip_write(vcpu, ctxt->eip);
5333         kvm_set_rflags(vcpu, ctxt->eflags);
5334
5335         if (irq == NMI_VECTOR)
5336                 vcpu->arch.nmi_pending = 0;
5337         else
5338                 vcpu->arch.interrupt.pending = false;
5339
5340         return EMULATE_DONE;
5341 }
5342 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5343
5344 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5345 {
5346         int r = EMULATE_DONE;
5347
5348         ++vcpu->stat.insn_emulation_fail;
5349         trace_kvm_emulate_insn_failed(vcpu);
5350         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5351                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5352                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5353                 vcpu->run->internal.ndata = 0;
5354                 r = EMULATE_FAIL;
5355         }
5356         kvm_queue_exception(vcpu, UD_VECTOR);
5357
5358         return r;
5359 }
5360
5361 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5362                                   bool write_fault_to_shadow_pgtable,
5363                                   int emulation_type)
5364 {
5365         gpa_t gpa = cr2;
5366         pfn_t pfn;
5367
5368         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5369                 return false;
5370
5371         if (!vcpu->arch.mmu.direct_map) {
5372                 /*
5373                  * Write permission should be allowed since only
5374                  * write access need to be emulated.
5375                  */
5376                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5377
5378                 /*
5379                  * If the mapping is invalid in guest, let cpu retry
5380                  * it to generate fault.
5381                  */
5382                 if (gpa == UNMAPPED_GVA)
5383                         return true;
5384         }
5385
5386         /*
5387          * Do not retry the unhandleable instruction if it faults on the
5388          * readonly host memory, otherwise it will goto a infinite loop:
5389          * retry instruction -> write #PF -> emulation fail -> retry
5390          * instruction -> ...
5391          */
5392         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5393
5394         /*
5395          * If the instruction failed on the error pfn, it can not be fixed,
5396          * report the error to userspace.
5397          */
5398         if (is_error_noslot_pfn(pfn))
5399                 return false;
5400
5401         kvm_release_pfn_clean(pfn);
5402
5403         /* The instructions are well-emulated on direct mmu. */
5404         if (vcpu->arch.mmu.direct_map) {
5405                 unsigned int indirect_shadow_pages;
5406
5407                 spin_lock(&vcpu->kvm->mmu_lock);
5408                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5409                 spin_unlock(&vcpu->kvm->mmu_lock);
5410
5411                 if (indirect_shadow_pages)
5412                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5413
5414                 return true;
5415         }
5416
5417         /*
5418          * if emulation was due to access to shadowed page table
5419          * and it failed try to unshadow page and re-enter the
5420          * guest to let CPU execute the instruction.
5421          */
5422         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5423
5424         /*
5425          * If the access faults on its page table, it can not
5426          * be fixed by unprotecting shadow page and it should
5427          * be reported to userspace.
5428          */
5429         return !write_fault_to_shadow_pgtable;
5430 }
5431
5432 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5433                               unsigned long cr2,  int emulation_type)
5434 {
5435         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5436         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5437
5438         last_retry_eip = vcpu->arch.last_retry_eip;
5439         last_retry_addr = vcpu->arch.last_retry_addr;
5440
5441         /*
5442          * If the emulation is caused by #PF and it is non-page_table
5443          * writing instruction, it means the VM-EXIT is caused by shadow
5444          * page protected, we can zap the shadow page and retry this
5445          * instruction directly.
5446          *
5447          * Note: if the guest uses a non-page-table modifying instruction
5448          * on the PDE that points to the instruction, then we will unmap
5449          * the instruction and go to an infinite loop. So, we cache the
5450          * last retried eip and the last fault address, if we meet the eip
5451          * and the address again, we can break out of the potential infinite
5452          * loop.
5453          */
5454         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5455
5456         if (!(emulation_type & EMULTYPE_RETRY))
5457                 return false;
5458
5459         if (x86_page_table_writing_insn(ctxt))
5460                 return false;
5461
5462         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5463                 return false;
5464
5465         vcpu->arch.last_retry_eip = ctxt->eip;
5466         vcpu->arch.last_retry_addr = cr2;
5467
5468         if (!vcpu->arch.mmu.direct_map)
5469                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5470
5471         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5472
5473         return true;
5474 }
5475
5476 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5477 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5478
5479 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5480 {
5481         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5482                 /* This is a good place to trace that we are exiting SMM.  */
5483                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5484
5485                 if (unlikely(vcpu->arch.smi_pending)) {
5486                         kvm_make_request(KVM_REQ_SMI, vcpu);
5487                         vcpu->arch.smi_pending = 0;
5488                 } else {
5489                         /* Process a latched INIT, if any.  */
5490                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5491                 }
5492         }
5493
5494         kvm_mmu_reset_context(vcpu);
5495 }
5496
5497 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5498 {
5499         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5500
5501         vcpu->arch.hflags = emul_flags;
5502
5503         if (changed & HF_SMM_MASK)
5504                 kvm_smm_changed(vcpu);
5505 }
5506
5507 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5508                                 unsigned long *db)
5509 {
5510         u32 dr6 = 0;
5511         int i;
5512         u32 enable, rwlen;
5513
5514         enable = dr7;
5515         rwlen = dr7 >> 16;
5516         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5517                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5518                         dr6 |= (1 << i);
5519         return dr6;
5520 }
5521
5522 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5523 {
5524         struct kvm_run *kvm_run = vcpu->run;
5525
5526         /*
5527          * rflags is the old, "raw" value of the flags.  The new value has
5528          * not been saved yet.
5529          *
5530          * This is correct even for TF set by the guest, because "the
5531          * processor will not generate this exception after the instruction
5532          * that sets the TF flag".
5533          */
5534         if (unlikely(rflags & X86_EFLAGS_TF)) {
5535                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5536                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5537                                                   DR6_RTM;
5538                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5539                         kvm_run->debug.arch.exception = DB_VECTOR;
5540                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5541                         *r = EMULATE_USER_EXIT;
5542                 } else {
5543                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5544                         /*
5545                          * "Certain debug exceptions may clear bit 0-3.  The
5546                          * remaining contents of the DR6 register are never
5547                          * cleared by the processor".
5548                          */
5549                         vcpu->arch.dr6 &= ~15;
5550                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5551                         kvm_queue_exception(vcpu, DB_VECTOR);
5552                 }
5553         }
5554 }
5555
5556 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5557 {
5558         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5559             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5560                 struct kvm_run *kvm_run = vcpu->run;
5561                 unsigned long eip = kvm_get_linear_rip(vcpu);
5562                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5563                                            vcpu->arch.guest_debug_dr7,
5564                                            vcpu->arch.eff_db);
5565
5566                 if (dr6 != 0) {
5567                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5568                         kvm_run->debug.arch.pc = eip;
5569                         kvm_run->debug.arch.exception = DB_VECTOR;
5570                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5571                         *r = EMULATE_USER_EXIT;
5572                         return true;
5573                 }
5574         }
5575
5576         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5577             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5578                 unsigned long eip = kvm_get_linear_rip(vcpu);
5579                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5580                                            vcpu->arch.dr7,
5581                                            vcpu->arch.db);
5582
5583                 if (dr6 != 0) {
5584                         vcpu->arch.dr6 &= ~15;
5585                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5586                         kvm_queue_exception(vcpu, DB_VECTOR);
5587                         *r = EMULATE_DONE;
5588                         return true;
5589                 }
5590         }
5591
5592         return false;
5593 }
5594
5595 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5596                             unsigned long cr2,
5597                             int emulation_type,
5598                             void *insn,
5599                             int insn_len)
5600 {
5601         int r;
5602         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5603         bool writeback = true;
5604         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5605
5606         /*
5607          * Clear write_fault_to_shadow_pgtable here to ensure it is
5608          * never reused.
5609          */
5610         vcpu->arch.write_fault_to_shadow_pgtable = false;
5611         kvm_clear_exception_queue(vcpu);
5612
5613         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5614                 init_emulate_ctxt(vcpu);
5615
5616                 /*
5617                  * We will reenter on the same instruction since
5618                  * we do not set complete_userspace_io.  This does not
5619                  * handle watchpoints yet, those would be handled in
5620                  * the emulate_ops.
5621                  */
5622                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5623                         return r;
5624
5625                 ctxt->interruptibility = 0;
5626                 ctxt->have_exception = false;
5627                 ctxt->exception.vector = -1;
5628                 ctxt->perm_ok = false;
5629
5630                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5631
5632                 r = x86_decode_insn(ctxt, insn, insn_len);
5633
5634                 trace_kvm_emulate_insn_start(vcpu);
5635                 ++vcpu->stat.insn_emulation;
5636                 if (r != EMULATION_OK)  {
5637                         if (emulation_type & EMULTYPE_TRAP_UD)
5638                                 return EMULATE_FAIL;
5639                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5640                                                 emulation_type))
5641                                 return EMULATE_DONE;
5642                         if (emulation_type & EMULTYPE_SKIP)
5643                                 return EMULATE_FAIL;
5644                         return handle_emulation_failure(vcpu);
5645                 }
5646         }
5647
5648         if (emulation_type & EMULTYPE_SKIP) {
5649                 kvm_rip_write(vcpu, ctxt->_eip);
5650                 if (ctxt->eflags & X86_EFLAGS_RF)
5651                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5652                 return EMULATE_DONE;
5653         }
5654
5655         if (retry_instruction(ctxt, cr2, emulation_type))
5656                 return EMULATE_DONE;
5657
5658         /* this is needed for vmware backdoor interface to work since it
5659            changes registers values  during IO operation */
5660         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5661                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5662                 emulator_invalidate_register_cache(ctxt);
5663         }
5664
5665 restart:
5666         r = x86_emulate_insn(ctxt);
5667
5668         if (r == EMULATION_INTERCEPTED)
5669                 return EMULATE_DONE;
5670
5671         if (r == EMULATION_FAILED) {
5672                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5673                                         emulation_type))
5674                         return EMULATE_DONE;
5675
5676                 return handle_emulation_failure(vcpu);
5677         }
5678
5679         if (ctxt->have_exception) {
5680                 r = EMULATE_DONE;
5681                 if (inject_emulated_exception(vcpu))
5682                         return r;
5683         } else if (vcpu->arch.pio.count) {
5684                 if (!vcpu->arch.pio.in) {
5685                         /* FIXME: return into emulator if single-stepping.  */
5686                         vcpu->arch.pio.count = 0;
5687                 } else {
5688                         writeback = false;
5689                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5690                 }
5691                 r = EMULATE_USER_EXIT;
5692         } else if (vcpu->mmio_needed) {
5693                 if (!vcpu->mmio_is_write)
5694                         writeback = false;
5695                 r = EMULATE_USER_EXIT;
5696                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5697         } else if (r == EMULATION_RESTART)
5698                 goto restart;
5699         else
5700                 r = EMULATE_DONE;
5701
5702         if (writeback) {
5703                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5704                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5705                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5706                 if (vcpu->arch.hflags != ctxt->emul_flags)
5707                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5708                 kvm_rip_write(vcpu, ctxt->eip);
5709                 if (r == EMULATE_DONE)
5710                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5711                 if (!ctxt->have_exception ||
5712                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5713                         __kvm_set_rflags(vcpu, ctxt->eflags);
5714
5715                 /*
5716                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5717                  * do nothing, and it will be requested again as soon as
5718                  * the shadow expires.  But we still need to check here,
5719                  * because POPF has no interrupt shadow.
5720                  */
5721                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5722                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5723         } else
5724                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5725
5726         return r;
5727 }
5728 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5729
5730 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5731 {
5732         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5733         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5734                                             size, port, &val, 1);
5735         /* do not return to emulator after return from userspace */
5736         vcpu->arch.pio.count = 0;
5737         return ret;
5738 }
5739 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5740
5741 static void tsc_bad(void *info)
5742 {
5743         __this_cpu_write(cpu_tsc_khz, 0);
5744 }
5745
5746 static void tsc_khz_changed(void *data)
5747 {
5748         struct cpufreq_freqs *freq = data;
5749         unsigned long khz = 0;
5750
5751         if (data)
5752                 khz = freq->new;
5753         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5754                 khz = cpufreq_quick_get(raw_smp_processor_id());
5755         if (!khz)
5756                 khz = tsc_khz;
5757         __this_cpu_write(cpu_tsc_khz, khz);
5758 }
5759
5760 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5761                                      void *data)
5762 {
5763         struct cpufreq_freqs *freq = data;
5764         struct kvm *kvm;
5765         struct kvm_vcpu *vcpu;
5766         int i, send_ipi = 0;
5767
5768         /*
5769          * We allow guests to temporarily run on slowing clocks,
5770          * provided we notify them after, or to run on accelerating
5771          * clocks, provided we notify them before.  Thus time never
5772          * goes backwards.
5773          *
5774          * However, we have a problem.  We can't atomically update
5775          * the frequency of a given CPU from this function; it is
5776          * merely a notifier, which can be called from any CPU.
5777          * Changing the TSC frequency at arbitrary points in time
5778          * requires a recomputation of local variables related to
5779          * the TSC for each VCPU.  We must flag these local variables
5780          * to be updated and be sure the update takes place with the
5781          * new frequency before any guests proceed.
5782          *
5783          * Unfortunately, the combination of hotplug CPU and frequency
5784          * change creates an intractable locking scenario; the order
5785          * of when these callouts happen is undefined with respect to
5786          * CPU hotplug, and they can race with each other.  As such,
5787          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5788          * undefined; you can actually have a CPU frequency change take
5789          * place in between the computation of X and the setting of the
5790          * variable.  To protect against this problem, all updates of
5791          * the per_cpu tsc_khz variable are done in an interrupt
5792          * protected IPI, and all callers wishing to update the value
5793          * must wait for a synchronous IPI to complete (which is trivial
5794          * if the caller is on the CPU already).  This establishes the
5795          * necessary total order on variable updates.
5796          *
5797          * Note that because a guest time update may take place
5798          * anytime after the setting of the VCPU's request bit, the
5799          * correct TSC value must be set before the request.  However,
5800          * to ensure the update actually makes it to any guest which
5801          * starts running in hardware virtualization between the set
5802          * and the acquisition of the spinlock, we must also ping the
5803          * CPU after setting the request bit.
5804          *
5805          */
5806
5807         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5808                 return 0;
5809         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5810                 return 0;
5811
5812         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5813
5814         spin_lock(&kvm_lock);
5815         list_for_each_entry(kvm, &vm_list, vm_list) {
5816                 kvm_for_each_vcpu(i, vcpu, kvm) {
5817                         if (vcpu->cpu != freq->cpu)
5818                                 continue;
5819                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5820                         if (vcpu->cpu != smp_processor_id())
5821                                 send_ipi = 1;
5822                 }
5823         }
5824         spin_unlock(&kvm_lock);
5825
5826         if (freq->old < freq->new && send_ipi) {
5827                 /*
5828                  * We upscale the frequency.  Must make the guest
5829                  * doesn't see old kvmclock values while running with
5830                  * the new frequency, otherwise we risk the guest sees
5831                  * time go backwards.
5832                  *
5833                  * In case we update the frequency for another cpu
5834                  * (which might be in guest context) send an interrupt
5835                  * to kick the cpu out of guest context.  Next time
5836                  * guest context is entered kvmclock will be updated,
5837                  * so the guest will not see stale values.
5838                  */
5839                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5840         }
5841         return 0;
5842 }
5843
5844 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5845         .notifier_call  = kvmclock_cpufreq_notifier
5846 };
5847
5848 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5849                                         unsigned long action, void *hcpu)
5850 {
5851         unsigned int cpu = (unsigned long)hcpu;
5852
5853         switch (action) {
5854                 case CPU_ONLINE:
5855                 case CPU_DOWN_FAILED:
5856                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5857                         break;
5858                 case CPU_DOWN_PREPARE:
5859                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5860                         break;
5861         }
5862         return NOTIFY_OK;
5863 }
5864
5865 static struct notifier_block kvmclock_cpu_notifier_block = {
5866         .notifier_call  = kvmclock_cpu_notifier,
5867         .priority = -INT_MAX
5868 };
5869
5870 static void kvm_timer_init(void)
5871 {
5872         int cpu;
5873
5874         max_tsc_khz = tsc_khz;
5875
5876         cpu_notifier_register_begin();
5877         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5878 #ifdef CONFIG_CPU_FREQ
5879                 struct cpufreq_policy policy;
5880                 memset(&policy, 0, sizeof(policy));
5881                 cpu = get_cpu();
5882                 cpufreq_get_policy(&policy, cpu);
5883                 if (policy.cpuinfo.max_freq)
5884                         max_tsc_khz = policy.cpuinfo.max_freq;
5885                 put_cpu();
5886 #endif
5887                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5888                                           CPUFREQ_TRANSITION_NOTIFIER);
5889         }
5890         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5891         for_each_online_cpu(cpu)
5892                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5893
5894         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5895         cpu_notifier_register_done();
5896
5897 }
5898
5899 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5900
5901 int kvm_is_in_guest(void)
5902 {
5903         return __this_cpu_read(current_vcpu) != NULL;
5904 }
5905
5906 static int kvm_is_user_mode(void)
5907 {
5908         int user_mode = 3;
5909
5910         if (__this_cpu_read(current_vcpu))
5911                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5912
5913         return user_mode != 0;
5914 }
5915
5916 static unsigned long kvm_get_guest_ip(void)
5917 {
5918         unsigned long ip = 0;
5919
5920         if (__this_cpu_read(current_vcpu))
5921                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5922
5923         return ip;
5924 }
5925
5926 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5927         .is_in_guest            = kvm_is_in_guest,
5928         .is_user_mode           = kvm_is_user_mode,
5929         .get_guest_ip           = kvm_get_guest_ip,
5930 };
5931
5932 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5933 {
5934         __this_cpu_write(current_vcpu, vcpu);
5935 }
5936 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5937
5938 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5939 {
5940         __this_cpu_write(current_vcpu, NULL);
5941 }
5942 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5943
5944 static void kvm_set_mmio_spte_mask(void)
5945 {
5946         u64 mask;
5947         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5948
5949         /*
5950          * Set the reserved bits and the present bit of an paging-structure
5951          * entry to generate page fault with PFER.RSV = 1.
5952          */
5953          /* Mask the reserved physical address bits. */
5954         mask = rsvd_bits(maxphyaddr, 51);
5955
5956         /* Bit 62 is always reserved for 32bit host. */
5957         mask |= 0x3ull << 62;
5958
5959         /* Set the present bit. */
5960         mask |= 1ull;
5961
5962 #ifdef CONFIG_X86_64
5963         /*
5964          * If reserved bit is not supported, clear the present bit to disable
5965          * mmio page fault.
5966          */
5967         if (maxphyaddr == 52)
5968                 mask &= ~1ull;
5969 #endif
5970
5971         kvm_mmu_set_mmio_spte_mask(mask);
5972 }
5973
5974 #ifdef CONFIG_X86_64
5975 static void pvclock_gtod_update_fn(struct work_struct *work)
5976 {
5977         struct kvm *kvm;
5978
5979         struct kvm_vcpu *vcpu;
5980         int i;
5981
5982         spin_lock(&kvm_lock);
5983         list_for_each_entry(kvm, &vm_list, vm_list)
5984                 kvm_for_each_vcpu(i, vcpu, kvm)
5985                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5986         atomic_set(&kvm_guest_has_master_clock, 0);
5987         spin_unlock(&kvm_lock);
5988 }
5989
5990 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5991
5992 /*
5993  * Notification about pvclock gtod data update.
5994  */
5995 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5996                                void *priv)
5997 {
5998         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5999         struct timekeeper *tk = priv;
6000
6001         update_pvclock_gtod(tk);
6002
6003         /* disable master clock if host does not trust, or does not
6004          * use, TSC clocksource
6005          */
6006         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6007             atomic_read(&kvm_guest_has_master_clock) != 0)
6008                 queue_work(system_long_wq, &pvclock_gtod_work);
6009
6010         return 0;
6011 }
6012
6013 static struct notifier_block pvclock_gtod_notifier = {
6014         .notifier_call = pvclock_gtod_notify,
6015 };
6016 #endif
6017
6018 int kvm_arch_init(void *opaque)
6019 {
6020         int r;
6021         struct kvm_x86_ops *ops = opaque;
6022
6023         if (kvm_x86_ops) {
6024                 printk(KERN_ERR "kvm: already loaded the other module\n");
6025                 r = -EEXIST;
6026                 goto out;
6027         }
6028
6029         if (!ops->cpu_has_kvm_support()) {
6030                 printk(KERN_ERR "kvm: no hardware support\n");
6031                 r = -EOPNOTSUPP;
6032                 goto out;
6033         }
6034         if (ops->disabled_by_bios()) {
6035                 printk(KERN_ERR "kvm: disabled by bios\n");
6036                 r = -EOPNOTSUPP;
6037                 goto out;
6038         }
6039
6040         r = -ENOMEM;
6041         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6042         if (!shared_msrs) {
6043                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6044                 goto out;
6045         }
6046
6047         r = kvm_mmu_module_init();
6048         if (r)
6049                 goto out_free_percpu;
6050
6051         kvm_set_mmio_spte_mask();
6052
6053         kvm_x86_ops = ops;
6054
6055         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6056                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
6057
6058         kvm_timer_init();
6059
6060         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6061
6062         if (cpu_has_xsave)
6063                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6064
6065         kvm_lapic_init();
6066 #ifdef CONFIG_X86_64
6067         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6068 #endif
6069
6070         return 0;
6071
6072 out_free_percpu:
6073         free_percpu(shared_msrs);
6074 out:
6075         return r;
6076 }
6077
6078 void kvm_arch_exit(void)
6079 {
6080         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6081
6082         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6083                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6084                                             CPUFREQ_TRANSITION_NOTIFIER);
6085         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
6086 #ifdef CONFIG_X86_64
6087         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6088 #endif
6089         kvm_x86_ops = NULL;
6090         kvm_mmu_module_exit();
6091         free_percpu(shared_msrs);
6092 }
6093
6094 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6095 {
6096         ++vcpu->stat.halt_exits;
6097         if (irqchip_in_kernel(vcpu->kvm)) {
6098                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6099                 return 1;
6100         } else {
6101                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6102                 return 0;
6103         }
6104 }
6105 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6106
6107 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6108 {
6109         kvm_x86_ops->skip_emulated_instruction(vcpu);
6110         return kvm_vcpu_halt(vcpu);
6111 }
6112 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6113
6114 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
6115 {
6116         u64 param, ingpa, outgpa, ret;
6117         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
6118         bool fast, longmode;
6119
6120         /*
6121          * hypercall generates UD from non zero cpl and real mode
6122          * per HYPER-V spec
6123          */
6124         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
6125                 kvm_queue_exception(vcpu, UD_VECTOR);
6126                 return 0;
6127         }
6128
6129         longmode = is_64_bit_mode(vcpu);
6130
6131         if (!longmode) {
6132                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
6133                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
6134                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
6135                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
6136                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
6137                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
6138         }
6139 #ifdef CONFIG_X86_64
6140         else {
6141                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
6142                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
6143                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
6144         }
6145 #endif
6146
6147         code = param & 0xffff;
6148         fast = (param >> 16) & 0x1;
6149         rep_cnt = (param >> 32) & 0xfff;
6150         rep_idx = (param >> 48) & 0xfff;
6151
6152         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
6153
6154         switch (code) {
6155         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
6156                 kvm_vcpu_on_spin(vcpu);
6157                 break;
6158         default:
6159                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
6160                 break;
6161         }
6162
6163         ret = res | (((u64)rep_done & 0xfff) << 32);
6164         if (longmode) {
6165                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6166         } else {
6167                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
6168                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
6169         }
6170
6171         return 1;
6172 }
6173
6174 /*
6175  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6176  *
6177  * @apicid - apicid of vcpu to be kicked.
6178  */
6179 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6180 {
6181         struct kvm_lapic_irq lapic_irq;
6182
6183         lapic_irq.shorthand = 0;
6184         lapic_irq.dest_mode = 0;
6185         lapic_irq.dest_id = apicid;
6186         lapic_irq.msi_redir_hint = false;
6187
6188         lapic_irq.delivery_mode = APIC_DM_REMRD;
6189         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6190 }
6191
6192 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6193 {
6194         unsigned long nr, a0, a1, a2, a3, ret;
6195         int op_64_bit, r = 1;
6196
6197         kvm_x86_ops->skip_emulated_instruction(vcpu);
6198
6199         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6200                 return kvm_hv_hypercall(vcpu);
6201
6202         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6203         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6204         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6205         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6206         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6207
6208         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6209
6210         op_64_bit = is_64_bit_mode(vcpu);
6211         if (!op_64_bit) {
6212                 nr &= 0xFFFFFFFF;
6213                 a0 &= 0xFFFFFFFF;
6214                 a1 &= 0xFFFFFFFF;
6215                 a2 &= 0xFFFFFFFF;
6216                 a3 &= 0xFFFFFFFF;
6217         }
6218
6219         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6220                 ret = -KVM_EPERM;
6221                 goto out;
6222         }
6223
6224         switch (nr) {
6225         case KVM_HC_VAPIC_POLL_IRQ:
6226                 ret = 0;
6227                 break;
6228         case KVM_HC_KICK_CPU:
6229                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6230                 ret = 0;
6231                 break;
6232         default:
6233                 ret = -KVM_ENOSYS;
6234                 break;
6235         }
6236 out:
6237         if (!op_64_bit)
6238                 ret = (u32)ret;
6239         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6240         ++vcpu->stat.hypercalls;
6241         return r;
6242 }
6243 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6244
6245 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6246 {
6247         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6248         char instruction[3];
6249         unsigned long rip = kvm_rip_read(vcpu);
6250
6251         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6252
6253         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6254 }
6255
6256 /*
6257  * Check if userspace requested an interrupt window, and that the
6258  * interrupt window is open.
6259  *
6260  * No need to exit to userspace if we already have an interrupt queued.
6261  */
6262 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6263 {
6264         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
6265                 vcpu->run->request_interrupt_window &&
6266                 kvm_arch_interrupt_allowed(vcpu));
6267 }
6268
6269 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6270 {
6271         struct kvm_run *kvm_run = vcpu->run;
6272
6273         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6274         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6275         kvm_run->cr8 = kvm_get_cr8(vcpu);
6276         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6277         if (irqchip_in_kernel(vcpu->kvm))
6278                 kvm_run->ready_for_interrupt_injection = 1;
6279         else
6280                 kvm_run->ready_for_interrupt_injection =
6281                         kvm_arch_interrupt_allowed(vcpu) &&
6282                         !kvm_cpu_has_interrupt(vcpu) &&
6283                         !kvm_event_needs_reinjection(vcpu);
6284 }
6285
6286 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6287 {
6288         int max_irr, tpr;
6289
6290         if (!kvm_x86_ops->update_cr8_intercept)
6291                 return;
6292
6293         if (!vcpu->arch.apic)
6294                 return;
6295
6296         if (!vcpu->arch.apic->vapic_addr)
6297                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6298         else
6299                 max_irr = -1;
6300
6301         if (max_irr != -1)
6302                 max_irr >>= 4;
6303
6304         tpr = kvm_lapic_get_cr8(vcpu);
6305
6306         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6307 }
6308
6309 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6310 {
6311         int r;
6312
6313         /* try to reinject previous events if any */
6314         if (vcpu->arch.exception.pending) {
6315                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6316                                         vcpu->arch.exception.has_error_code,
6317                                         vcpu->arch.exception.error_code);
6318
6319                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6320                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6321                                              X86_EFLAGS_RF);
6322
6323                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6324                     (vcpu->arch.dr7 & DR7_GD)) {
6325                         vcpu->arch.dr7 &= ~DR7_GD;
6326                         kvm_update_dr7(vcpu);
6327                 }
6328
6329                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6330                                           vcpu->arch.exception.has_error_code,
6331                                           vcpu->arch.exception.error_code,
6332                                           vcpu->arch.exception.reinject);
6333                 return 0;
6334         }
6335
6336         if (vcpu->arch.nmi_injected) {
6337                 kvm_x86_ops->set_nmi(vcpu);
6338                 return 0;
6339         }
6340
6341         if (vcpu->arch.interrupt.pending) {
6342                 kvm_x86_ops->set_irq(vcpu);
6343                 return 0;
6344         }
6345
6346         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6347                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6348                 if (r != 0)
6349                         return r;
6350         }
6351
6352         /* try to inject new event if pending */
6353         if (vcpu->arch.nmi_pending) {
6354                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6355                         --vcpu->arch.nmi_pending;
6356                         vcpu->arch.nmi_injected = true;
6357                         kvm_x86_ops->set_nmi(vcpu);
6358                 }
6359         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6360                 /*
6361                  * Because interrupts can be injected asynchronously, we are
6362                  * calling check_nested_events again here to avoid a race condition.
6363                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6364                  * proposal and current concerns.  Perhaps we should be setting
6365                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6366                  */
6367                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6368                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6369                         if (r != 0)
6370                                 return r;
6371                 }
6372                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6373                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6374                                             false);
6375                         kvm_x86_ops->set_irq(vcpu);
6376                 }
6377         }
6378         return 0;
6379 }
6380
6381 static void process_nmi(struct kvm_vcpu *vcpu)
6382 {
6383         unsigned limit = 2;
6384
6385         /*
6386          * x86 is limited to one NMI running, and one NMI pending after it.
6387          * If an NMI is already in progress, limit further NMIs to just one.
6388          * Otherwise, allow two (and we'll inject the first one immediately).
6389          */
6390         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6391                 limit = 1;
6392
6393         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6394         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6395         kvm_make_request(KVM_REQ_EVENT, vcpu);
6396 }
6397
6398 #define put_smstate(type, buf, offset, val)                       \
6399         *(type *)((buf) + (offset) - 0x7e00) = val
6400
6401 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6402 {
6403         u32 flags = 0;
6404         flags |= seg->g       << 23;
6405         flags |= seg->db      << 22;
6406         flags |= seg->l       << 21;
6407         flags |= seg->avl     << 20;
6408         flags |= seg->present << 15;
6409         flags |= seg->dpl     << 13;
6410         flags |= seg->s       << 12;
6411         flags |= seg->type    << 8;
6412         return flags;
6413 }
6414
6415 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6416 {
6417         struct kvm_segment seg;
6418         int offset;
6419
6420         kvm_get_segment(vcpu, &seg, n);
6421         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6422
6423         if (n < 3)
6424                 offset = 0x7f84 + n * 12;
6425         else
6426                 offset = 0x7f2c + (n - 3) * 12;
6427
6428         put_smstate(u32, buf, offset + 8, seg.base);
6429         put_smstate(u32, buf, offset + 4, seg.limit);
6430         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6431 }
6432
6433 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6434 {
6435         struct kvm_segment seg;
6436         int offset;
6437         u16 flags;
6438
6439         kvm_get_segment(vcpu, &seg, n);
6440         offset = 0x7e00 + n * 16;
6441
6442         flags = process_smi_get_segment_flags(&seg) >> 8;
6443         put_smstate(u16, buf, offset, seg.selector);
6444         put_smstate(u16, buf, offset + 2, flags);
6445         put_smstate(u32, buf, offset + 4, seg.limit);
6446         put_smstate(u64, buf, offset + 8, seg.base);
6447 }
6448
6449 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6450 {
6451         struct desc_ptr dt;
6452         struct kvm_segment seg;
6453         unsigned long val;
6454         int i;
6455
6456         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6457         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6458         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6459         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6460
6461         for (i = 0; i < 8; i++)
6462                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6463
6464         kvm_get_dr(vcpu, 6, &val);
6465         put_smstate(u32, buf, 0x7fcc, (u32)val);
6466         kvm_get_dr(vcpu, 7, &val);
6467         put_smstate(u32, buf, 0x7fc8, (u32)val);
6468
6469         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6470         put_smstate(u32, buf, 0x7fc4, seg.selector);
6471         put_smstate(u32, buf, 0x7f64, seg.base);
6472         put_smstate(u32, buf, 0x7f60, seg.limit);
6473         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6474
6475         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6476         put_smstate(u32, buf, 0x7fc0, seg.selector);
6477         put_smstate(u32, buf, 0x7f80, seg.base);
6478         put_smstate(u32, buf, 0x7f7c, seg.limit);
6479         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6480
6481         kvm_x86_ops->get_gdt(vcpu, &dt);
6482         put_smstate(u32, buf, 0x7f74, dt.address);
6483         put_smstate(u32, buf, 0x7f70, dt.size);
6484
6485         kvm_x86_ops->get_idt(vcpu, &dt);
6486         put_smstate(u32, buf, 0x7f58, dt.address);
6487         put_smstate(u32, buf, 0x7f54, dt.size);
6488
6489         for (i = 0; i < 6; i++)
6490                 process_smi_save_seg_32(vcpu, buf, i);
6491
6492         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6493
6494         /* revision id */
6495         put_smstate(u32, buf, 0x7efc, 0x00020000);
6496         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6497 }
6498
6499 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6500 {
6501 #ifdef CONFIG_X86_64
6502         struct desc_ptr dt;
6503         struct kvm_segment seg;
6504         unsigned long val;
6505         int i;
6506
6507         for (i = 0; i < 16; i++)
6508                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6509
6510         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6511         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6512
6513         kvm_get_dr(vcpu, 6, &val);
6514         put_smstate(u64, buf, 0x7f68, val);
6515         kvm_get_dr(vcpu, 7, &val);
6516         put_smstate(u64, buf, 0x7f60, val);
6517
6518         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6519         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6520         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6521
6522         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6523
6524         /* revision id */
6525         put_smstate(u32, buf, 0x7efc, 0x00020064);
6526
6527         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6528
6529         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6530         put_smstate(u16, buf, 0x7e90, seg.selector);
6531         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6532         put_smstate(u32, buf, 0x7e94, seg.limit);
6533         put_smstate(u64, buf, 0x7e98, seg.base);
6534
6535         kvm_x86_ops->get_idt(vcpu, &dt);
6536         put_smstate(u32, buf, 0x7e84, dt.size);
6537         put_smstate(u64, buf, 0x7e88, dt.address);
6538
6539         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6540         put_smstate(u16, buf, 0x7e70, seg.selector);
6541         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6542         put_smstate(u32, buf, 0x7e74, seg.limit);
6543         put_smstate(u64, buf, 0x7e78, seg.base);
6544
6545         kvm_x86_ops->get_gdt(vcpu, &dt);
6546         put_smstate(u32, buf, 0x7e64, dt.size);
6547         put_smstate(u64, buf, 0x7e68, dt.address);
6548
6549         for (i = 0; i < 6; i++)
6550                 process_smi_save_seg_64(vcpu, buf, i);
6551 #else
6552         WARN_ON_ONCE(1);
6553 #endif
6554 }
6555
6556 static void process_smi(struct kvm_vcpu *vcpu)
6557 {
6558         struct kvm_segment cs, ds;
6559         char buf[512];
6560         u32 cr0;
6561
6562         if (is_smm(vcpu)) {
6563                 vcpu->arch.smi_pending = true;
6564                 return;
6565         }
6566
6567         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6568         vcpu->arch.hflags |= HF_SMM_MASK;
6569         memset(buf, 0, 512);
6570         if (guest_cpuid_has_longmode(vcpu))
6571                 process_smi_save_state_64(vcpu, buf);
6572         else
6573                 process_smi_save_state_32(vcpu, buf);
6574
6575         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6576
6577         if (kvm_x86_ops->get_nmi_mask(vcpu))
6578                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6579         else
6580                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6581
6582         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6583         kvm_rip_write(vcpu, 0x8000);
6584
6585         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6586         kvm_x86_ops->set_cr0(vcpu, cr0);
6587         vcpu->arch.cr0 = cr0;
6588
6589         kvm_x86_ops->set_cr4(vcpu, 0);
6590
6591         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6592
6593         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6594         cs.base = vcpu->arch.smbase;
6595
6596         ds.selector = 0;
6597         ds.base = 0;
6598
6599         cs.limit    = ds.limit = 0xffffffff;
6600         cs.type     = ds.type = 0x3;
6601         cs.dpl      = ds.dpl = 0;
6602         cs.db       = ds.db = 0;
6603         cs.s        = ds.s = 1;
6604         cs.l        = ds.l = 0;
6605         cs.g        = ds.g = 1;
6606         cs.avl      = ds.avl = 0;
6607         cs.present  = ds.present = 1;
6608         cs.unusable = ds.unusable = 0;
6609         cs.padding  = ds.padding = 0;
6610
6611         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6612         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6613         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6614         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6615         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6616         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6617
6618         if (guest_cpuid_has_longmode(vcpu))
6619                 kvm_x86_ops->set_efer(vcpu, 0);
6620
6621         kvm_update_cpuid(vcpu);
6622         kvm_mmu_reset_context(vcpu);
6623 }
6624
6625 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6626 {
6627         u64 eoi_exit_bitmap[4];
6628         u32 tmr[8];
6629
6630         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6631                 return;
6632
6633         memset(eoi_exit_bitmap, 0, 32);
6634         memset(tmr, 0, 32);
6635
6636         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6637         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6638         kvm_apic_update_tmr(vcpu, tmr);
6639 }
6640
6641 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6642 {
6643         ++vcpu->stat.tlb_flush;
6644         kvm_x86_ops->tlb_flush(vcpu);
6645 }
6646
6647 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6648 {
6649         struct page *page = NULL;
6650
6651         if (!irqchip_in_kernel(vcpu->kvm))
6652                 return;
6653
6654         if (!kvm_x86_ops->set_apic_access_page_addr)
6655                 return;
6656
6657         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6658         if (is_error_page(page))
6659                 return;
6660         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6661
6662         /*
6663          * Do not pin apic access page in memory, the MMU notifier
6664          * will call us again if it is migrated or swapped out.
6665          */
6666         put_page(page);
6667 }
6668 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6669
6670 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6671                                            unsigned long address)
6672 {
6673         /*
6674          * The physical address of apic access page is stored in the VMCS.
6675          * Update it when it becomes invalid.
6676          */
6677         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6678                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6679 }
6680
6681 /*
6682  * Returns 1 to let vcpu_run() continue the guest execution loop without
6683  * exiting to the userspace.  Otherwise, the value will be returned to the
6684  * userspace.
6685  */
6686 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6687 {
6688         int r;
6689         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6690                 vcpu->run->request_interrupt_window;
6691         bool req_immediate_exit = false;
6692
6693         if (vcpu->requests) {
6694                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6695                         kvm_mmu_unload(vcpu);
6696                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6697                         __kvm_migrate_timers(vcpu);
6698                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6699                         kvm_gen_update_masterclock(vcpu->kvm);
6700                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6701                         kvm_gen_kvmclock_update(vcpu);
6702                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6703                         r = kvm_guest_time_update(vcpu);
6704                         if (unlikely(r))
6705                                 goto out;
6706                 }
6707                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6708                         kvm_mmu_sync_roots(vcpu);
6709                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6710                         kvm_vcpu_flush_tlb(vcpu);
6711                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6712                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6713                         r = 0;
6714                         goto out;
6715                 }
6716                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6717                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6718                         r = 0;
6719                         goto out;
6720                 }
6721                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6722                         vcpu->fpu_active = 0;
6723                         kvm_x86_ops->fpu_deactivate(vcpu);
6724                 }
6725                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6726                         /* Page is swapped out. Do synthetic halt */
6727                         vcpu->arch.apf.halted = true;
6728                         r = 1;
6729                         goto out;
6730                 }
6731                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6732                         record_steal_time(vcpu);
6733                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6734                         process_smi(vcpu);
6735                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6736                         process_nmi(vcpu);
6737                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6738                         kvm_handle_pmu_event(vcpu);
6739                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6740                         kvm_deliver_pmi(vcpu);
6741                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6742                         vcpu_scan_ioapic(vcpu);
6743                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6744                         kvm_vcpu_reload_apic_access_page(vcpu);
6745         }
6746
6747         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6748                 kvm_apic_accept_events(vcpu);
6749                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6750                         r = 1;
6751                         goto out;
6752                 }
6753
6754                 if (inject_pending_event(vcpu, req_int_win) != 0)
6755                         req_immediate_exit = true;
6756                 /* enable NMI/IRQ window open exits if needed */
6757                 else if (vcpu->arch.nmi_pending)
6758                         kvm_x86_ops->enable_nmi_window(vcpu);
6759                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6760                         kvm_x86_ops->enable_irq_window(vcpu);
6761
6762                 if (kvm_lapic_enabled(vcpu)) {
6763                         /*
6764                          * Update architecture specific hints for APIC
6765                          * virtual interrupt delivery.
6766                          */
6767                         if (kvm_x86_ops->hwapic_irr_update)
6768                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6769                                         kvm_lapic_find_highest_irr(vcpu));
6770                         update_cr8_intercept(vcpu);
6771                         kvm_lapic_sync_to_vapic(vcpu);
6772                 }
6773         }
6774
6775         r = kvm_mmu_reload(vcpu);
6776         if (unlikely(r)) {
6777                 goto cancel_injection;
6778         }
6779
6780         preempt_disable();
6781
6782         kvm_x86_ops->prepare_guest_switch(vcpu);
6783         if (vcpu->fpu_active)
6784                 kvm_load_guest_fpu(vcpu);
6785         kvm_load_guest_xcr0(vcpu);
6786
6787         vcpu->mode = IN_GUEST_MODE;
6788
6789         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6790
6791         /* We should set ->mode before check ->requests,
6792          * see the comment in make_all_cpus_request.
6793          */
6794         smp_mb__after_srcu_read_unlock();
6795
6796         local_irq_disable();
6797
6798         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6799             || need_resched() || signal_pending(current)) {
6800                 vcpu->mode = OUTSIDE_GUEST_MODE;
6801                 smp_wmb();
6802                 local_irq_enable();
6803                 preempt_enable();
6804                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6805                 r = 1;
6806                 goto cancel_injection;
6807         }
6808
6809         if (req_immediate_exit)
6810                 smp_send_reschedule(vcpu->cpu);
6811
6812         __kvm_guest_enter();
6813
6814         if (unlikely(vcpu->arch.switch_db_regs)) {
6815                 set_debugreg(0, 7);
6816                 set_debugreg(vcpu->arch.eff_db[0], 0);
6817                 set_debugreg(vcpu->arch.eff_db[1], 1);
6818                 set_debugreg(vcpu->arch.eff_db[2], 2);
6819                 set_debugreg(vcpu->arch.eff_db[3], 3);
6820                 set_debugreg(vcpu->arch.dr6, 6);
6821                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6822         }
6823
6824         trace_kvm_entry(vcpu->vcpu_id);
6825         wait_lapic_expire(vcpu);
6826         kvm_x86_ops->run(vcpu);
6827
6828         /*
6829          * Do this here before restoring debug registers on the host.  And
6830          * since we do this before handling the vmexit, a DR access vmexit
6831          * can (a) read the correct value of the debug registers, (b) set
6832          * KVM_DEBUGREG_WONT_EXIT again.
6833          */
6834         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6835                 int i;
6836
6837                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6838                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6839                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6840                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6841         }
6842
6843         /*
6844          * If the guest has used debug registers, at least dr7
6845          * will be disabled while returning to the host.
6846          * If we don't have active breakpoints in the host, we don't
6847          * care about the messed up debug address registers. But if
6848          * we have some of them active, restore the old state.
6849          */
6850         if (hw_breakpoint_active())
6851                 hw_breakpoint_restore();
6852
6853         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6854                                                            native_read_tsc());
6855
6856         vcpu->mode = OUTSIDE_GUEST_MODE;
6857         smp_wmb();
6858
6859         /* Interrupt is enabled by handle_external_intr() */
6860         kvm_x86_ops->handle_external_intr(vcpu);
6861
6862         ++vcpu->stat.exits;
6863
6864         /*
6865          * We must have an instruction between local_irq_enable() and
6866          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6867          * the interrupt shadow.  The stat.exits increment will do nicely.
6868          * But we need to prevent reordering, hence this barrier():
6869          */
6870         barrier();
6871
6872         kvm_guest_exit();
6873
6874         preempt_enable();
6875
6876         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6877
6878         /*
6879          * Profile KVM exit RIPs:
6880          */
6881         if (unlikely(prof_on == KVM_PROFILING)) {
6882                 unsigned long rip = kvm_rip_read(vcpu);
6883                 profile_hit(KVM_PROFILING, (void *)rip);
6884         }
6885
6886         if (unlikely(vcpu->arch.tsc_always_catchup))
6887                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6888
6889         if (vcpu->arch.apic_attention)
6890                 kvm_lapic_sync_from_vapic(vcpu);
6891
6892         r = kvm_x86_ops->handle_exit(vcpu);
6893         return r;
6894
6895 cancel_injection:
6896         kvm_x86_ops->cancel_injection(vcpu);
6897         if (unlikely(vcpu->arch.apic_attention))
6898                 kvm_lapic_sync_from_vapic(vcpu);
6899 out:
6900         return r;
6901 }
6902
6903 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6904 {
6905         if (!kvm_arch_vcpu_runnable(vcpu)) {
6906                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6907                 kvm_vcpu_block(vcpu);
6908                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6909                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6910                         return 1;
6911         }
6912
6913         kvm_apic_accept_events(vcpu);
6914         switch(vcpu->arch.mp_state) {
6915         case KVM_MP_STATE_HALTED:
6916                 vcpu->arch.pv.pv_unhalted = false;
6917                 vcpu->arch.mp_state =
6918                         KVM_MP_STATE_RUNNABLE;
6919         case KVM_MP_STATE_RUNNABLE:
6920                 vcpu->arch.apf.halted = false;
6921                 break;
6922         case KVM_MP_STATE_INIT_RECEIVED:
6923                 break;
6924         default:
6925                 return -EINTR;
6926                 break;
6927         }
6928         return 1;
6929 }
6930
6931 static int vcpu_run(struct kvm_vcpu *vcpu)
6932 {
6933         int r;
6934         struct kvm *kvm = vcpu->kvm;
6935
6936         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6937
6938         for (;;) {
6939                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6940                     !vcpu->arch.apf.halted)
6941                         r = vcpu_enter_guest(vcpu);
6942                 else
6943                         r = vcpu_block(kvm, vcpu);
6944                 if (r <= 0)
6945                         break;
6946
6947                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6948                 if (kvm_cpu_has_pending_timer(vcpu))
6949                         kvm_inject_pending_timer_irqs(vcpu);
6950
6951                 if (dm_request_for_irq_injection(vcpu)) {
6952                         r = -EINTR;
6953                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6954                         ++vcpu->stat.request_irq_exits;
6955                         break;
6956                 }
6957
6958                 kvm_check_async_pf_completion(vcpu);
6959
6960                 if (signal_pending(current)) {
6961                         r = -EINTR;
6962                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6963                         ++vcpu->stat.signal_exits;
6964                         break;
6965                 }
6966                 if (need_resched()) {
6967                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6968                         cond_resched();
6969                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6970                 }
6971         }
6972
6973         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6974
6975         return r;
6976 }
6977
6978 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6979 {
6980         int r;
6981         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6982         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6983         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6984         if (r != EMULATE_DONE)
6985                 return 0;
6986         return 1;
6987 }
6988
6989 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6990 {
6991         BUG_ON(!vcpu->arch.pio.count);
6992
6993         return complete_emulated_io(vcpu);
6994 }
6995
6996 /*
6997  * Implements the following, as a state machine:
6998  *
6999  * read:
7000  *   for each fragment
7001  *     for each mmio piece in the fragment
7002  *       write gpa, len
7003  *       exit
7004  *       copy data
7005  *   execute insn
7006  *
7007  * write:
7008  *   for each fragment
7009  *     for each mmio piece in the fragment
7010  *       write gpa, len
7011  *       copy data
7012  *       exit
7013  */
7014 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7015 {
7016         struct kvm_run *run = vcpu->run;
7017         struct kvm_mmio_fragment *frag;
7018         unsigned len;
7019
7020         BUG_ON(!vcpu->mmio_needed);
7021
7022         /* Complete previous fragment */
7023         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7024         len = min(8u, frag->len);
7025         if (!vcpu->mmio_is_write)
7026                 memcpy(frag->data, run->mmio.data, len);
7027
7028         if (frag->len <= 8) {
7029                 /* Switch to the next fragment. */
7030                 frag++;
7031                 vcpu->mmio_cur_fragment++;
7032         } else {
7033                 /* Go forward to the next mmio piece. */
7034                 frag->data += len;
7035                 frag->gpa += len;
7036                 frag->len -= len;
7037         }
7038
7039         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7040                 vcpu->mmio_needed = 0;
7041
7042                 /* FIXME: return into emulator if single-stepping.  */
7043                 if (vcpu->mmio_is_write)
7044                         return 1;
7045                 vcpu->mmio_read_completed = 1;
7046                 return complete_emulated_io(vcpu);
7047         }
7048
7049         run->exit_reason = KVM_EXIT_MMIO;
7050         run->mmio.phys_addr = frag->gpa;
7051         if (vcpu->mmio_is_write)
7052                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7053         run->mmio.len = min(8u, frag->len);
7054         run->mmio.is_write = vcpu->mmio_is_write;
7055         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7056         return 0;
7057 }
7058
7059
7060 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7061 {
7062         int r;
7063         sigset_t sigsaved;
7064
7065         if (!tsk_used_math(current) && init_fpu(current))
7066                 return -ENOMEM;
7067
7068         if (vcpu->sigset_active)
7069                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7070
7071         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7072                 kvm_vcpu_block(vcpu);
7073                 kvm_apic_accept_events(vcpu);
7074                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7075                 r = -EAGAIN;
7076                 goto out;
7077         }
7078
7079         /* re-sync apic's tpr */
7080         if (!irqchip_in_kernel(vcpu->kvm)) {
7081                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7082                         r = -EINVAL;
7083                         goto out;
7084                 }
7085         }
7086
7087         if (unlikely(vcpu->arch.complete_userspace_io)) {
7088                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7089                 vcpu->arch.complete_userspace_io = NULL;
7090                 r = cui(vcpu);
7091                 if (r <= 0)
7092                         goto out;
7093         } else
7094                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7095
7096         r = vcpu_run(vcpu);
7097
7098 out:
7099         post_kvm_run_save(vcpu);
7100         if (vcpu->sigset_active)
7101                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7102
7103         return r;
7104 }
7105
7106 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7107 {
7108         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7109                 /*
7110                  * We are here if userspace calls get_regs() in the middle of
7111                  * instruction emulation. Registers state needs to be copied
7112                  * back from emulation context to vcpu. Userspace shouldn't do
7113                  * that usually, but some bad designed PV devices (vmware
7114                  * backdoor interface) need this to work
7115                  */
7116                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7117                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7118         }
7119         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7120         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7121         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7122         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7123         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7124         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7125         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7126         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7127 #ifdef CONFIG_X86_64
7128         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7129         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7130         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7131         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7132         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7133         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7134         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7135         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7136 #endif
7137
7138         regs->rip = kvm_rip_read(vcpu);
7139         regs->rflags = kvm_get_rflags(vcpu);
7140
7141         return 0;
7142 }
7143
7144 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7145 {
7146         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7147         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7148
7149         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7150         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7151         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7152         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7153         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7154         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7155         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7156         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7157 #ifdef CONFIG_X86_64
7158         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7159         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7160         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7161         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7162         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7163         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7164         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7165         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7166 #endif
7167
7168         kvm_rip_write(vcpu, regs->rip);
7169         kvm_set_rflags(vcpu, regs->rflags);
7170
7171         vcpu->arch.exception.pending = false;
7172
7173         kvm_make_request(KVM_REQ_EVENT, vcpu);
7174
7175         return 0;
7176 }
7177
7178 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7179 {
7180         struct kvm_segment cs;
7181
7182         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7183         *db = cs.db;
7184         *l = cs.l;
7185 }
7186 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7187
7188 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7189                                   struct kvm_sregs *sregs)
7190 {
7191         struct desc_ptr dt;
7192
7193         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7194         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7195         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7196         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7197         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7198         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7199
7200         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7201         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7202
7203         kvm_x86_ops->get_idt(vcpu, &dt);
7204         sregs->idt.limit = dt.size;
7205         sregs->idt.base = dt.address;
7206         kvm_x86_ops->get_gdt(vcpu, &dt);
7207         sregs->gdt.limit = dt.size;
7208         sregs->gdt.base = dt.address;
7209
7210         sregs->cr0 = kvm_read_cr0(vcpu);
7211         sregs->cr2 = vcpu->arch.cr2;
7212         sregs->cr3 = kvm_read_cr3(vcpu);
7213         sregs->cr4 = kvm_read_cr4(vcpu);
7214         sregs->cr8 = kvm_get_cr8(vcpu);
7215         sregs->efer = vcpu->arch.efer;
7216         sregs->apic_base = kvm_get_apic_base(vcpu);
7217
7218         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7219
7220         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7221                 set_bit(vcpu->arch.interrupt.nr,
7222                         (unsigned long *)sregs->interrupt_bitmap);
7223
7224         return 0;
7225 }
7226
7227 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7228                                     struct kvm_mp_state *mp_state)
7229 {
7230         kvm_apic_accept_events(vcpu);
7231         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7232                                         vcpu->arch.pv.pv_unhalted)
7233                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7234         else
7235                 mp_state->mp_state = vcpu->arch.mp_state;
7236
7237         return 0;
7238 }
7239
7240 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7241                                     struct kvm_mp_state *mp_state)
7242 {
7243         if (!kvm_vcpu_has_lapic(vcpu) &&
7244             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7245                 return -EINVAL;
7246
7247         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7248                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7249                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7250         } else
7251                 vcpu->arch.mp_state = mp_state->mp_state;
7252         kvm_make_request(KVM_REQ_EVENT, vcpu);
7253         return 0;
7254 }
7255
7256 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7257                     int reason, bool has_error_code, u32 error_code)
7258 {
7259         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7260         int ret;
7261
7262         init_emulate_ctxt(vcpu);
7263
7264         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7265                                    has_error_code, error_code);
7266
7267         if (ret)
7268                 return EMULATE_FAIL;
7269
7270         kvm_rip_write(vcpu, ctxt->eip);
7271         kvm_set_rflags(vcpu, ctxt->eflags);
7272         kvm_make_request(KVM_REQ_EVENT, vcpu);
7273         return EMULATE_DONE;
7274 }
7275 EXPORT_SYMBOL_GPL(kvm_task_switch);
7276
7277 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7278                                   struct kvm_sregs *sregs)
7279 {
7280         struct msr_data apic_base_msr;
7281         int mmu_reset_needed = 0;
7282         int pending_vec, max_bits, idx;
7283         struct desc_ptr dt;
7284
7285         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7286                 return -EINVAL;
7287
7288         dt.size = sregs->idt.limit;
7289         dt.address = sregs->idt.base;
7290         kvm_x86_ops->set_idt(vcpu, &dt);
7291         dt.size = sregs->gdt.limit;
7292         dt.address = sregs->gdt.base;
7293         kvm_x86_ops->set_gdt(vcpu, &dt);
7294
7295         vcpu->arch.cr2 = sregs->cr2;
7296         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7297         vcpu->arch.cr3 = sregs->cr3;
7298         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7299
7300         kvm_set_cr8(vcpu, sregs->cr8);
7301
7302         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7303         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7304         apic_base_msr.data = sregs->apic_base;
7305         apic_base_msr.host_initiated = true;
7306         kvm_set_apic_base(vcpu, &apic_base_msr);
7307
7308         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7309         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7310         vcpu->arch.cr0 = sregs->cr0;
7311
7312         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7313         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7314         if (sregs->cr4 & X86_CR4_OSXSAVE)
7315                 kvm_update_cpuid(vcpu);
7316
7317         idx = srcu_read_lock(&vcpu->kvm->srcu);
7318         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7319                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7320                 mmu_reset_needed = 1;
7321         }
7322         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7323
7324         if (mmu_reset_needed)
7325                 kvm_mmu_reset_context(vcpu);
7326
7327         max_bits = KVM_NR_INTERRUPTS;
7328         pending_vec = find_first_bit(
7329                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7330         if (pending_vec < max_bits) {
7331                 kvm_queue_interrupt(vcpu, pending_vec, false);
7332                 pr_debug("Set back pending irq %d\n", pending_vec);
7333         }
7334
7335         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7336         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7337         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7338         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7339         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7340         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7341
7342         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7343         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7344
7345         update_cr8_intercept(vcpu);
7346
7347         /* Older userspace won't unhalt the vcpu on reset. */
7348         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7349             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7350             !is_protmode(vcpu))
7351                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7352
7353         kvm_make_request(KVM_REQ_EVENT, vcpu);
7354
7355         return 0;
7356 }
7357
7358 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7359                                         struct kvm_guest_debug *dbg)
7360 {
7361         unsigned long rflags;
7362         int i, r;
7363
7364         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7365                 r = -EBUSY;
7366                 if (vcpu->arch.exception.pending)
7367                         goto out;
7368                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7369                         kvm_queue_exception(vcpu, DB_VECTOR);
7370                 else
7371                         kvm_queue_exception(vcpu, BP_VECTOR);
7372         }
7373
7374         /*
7375          * Read rflags as long as potentially injected trace flags are still
7376          * filtered out.
7377          */
7378         rflags = kvm_get_rflags(vcpu);
7379
7380         vcpu->guest_debug = dbg->control;
7381         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7382                 vcpu->guest_debug = 0;
7383
7384         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7385                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7386                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7387                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7388         } else {
7389                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7390                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7391         }
7392         kvm_update_dr7(vcpu);
7393
7394         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7395                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7396                         get_segment_base(vcpu, VCPU_SREG_CS);
7397
7398         /*
7399          * Trigger an rflags update that will inject or remove the trace
7400          * flags.
7401          */
7402         kvm_set_rflags(vcpu, rflags);
7403
7404         kvm_x86_ops->update_db_bp_intercept(vcpu);
7405
7406         r = 0;
7407
7408 out:
7409
7410         return r;
7411 }
7412
7413 /*
7414  * Translate a guest virtual address to a guest physical address.
7415  */
7416 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7417                                     struct kvm_translation *tr)
7418 {
7419         unsigned long vaddr = tr->linear_address;
7420         gpa_t gpa;
7421         int idx;
7422
7423         idx = srcu_read_lock(&vcpu->kvm->srcu);
7424         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7425         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7426         tr->physical_address = gpa;
7427         tr->valid = gpa != UNMAPPED_GVA;
7428         tr->writeable = 1;
7429         tr->usermode = 0;
7430
7431         return 0;
7432 }
7433
7434 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7435 {
7436         struct i387_fxsave_struct *fxsave =
7437                         &vcpu->arch.guest_fpu.state->fxsave;
7438
7439         memcpy(fpu->fpr, fxsave->st_space, 128);
7440         fpu->fcw = fxsave->cwd;
7441         fpu->fsw = fxsave->swd;
7442         fpu->ftwx = fxsave->twd;
7443         fpu->last_opcode = fxsave->fop;
7444         fpu->last_ip = fxsave->rip;
7445         fpu->last_dp = fxsave->rdp;
7446         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7447
7448         return 0;
7449 }
7450
7451 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7452 {
7453         struct i387_fxsave_struct *fxsave =
7454                         &vcpu->arch.guest_fpu.state->fxsave;
7455
7456         memcpy(fxsave->st_space, fpu->fpr, 128);
7457         fxsave->cwd = fpu->fcw;
7458         fxsave->swd = fpu->fsw;
7459         fxsave->twd = fpu->ftwx;
7460         fxsave->fop = fpu->last_opcode;
7461         fxsave->rip = fpu->last_ip;
7462         fxsave->rdp = fpu->last_dp;
7463         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7464
7465         return 0;
7466 }
7467
7468 int fx_init(struct kvm_vcpu *vcpu, bool init_event)
7469 {
7470         int err;
7471
7472         err = fpu_alloc(&vcpu->arch.guest_fpu);
7473         if (err)
7474                 return err;
7475
7476         if (!init_event)
7477                 fpu_finit(&vcpu->arch.guest_fpu);
7478
7479         if (cpu_has_xsaves)
7480                 vcpu->arch.guest_fpu.state->xsave.xsave_hdr.xcomp_bv =
7481                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7482
7483         /*
7484          * Ensure guest xcr0 is valid for loading
7485          */
7486         vcpu->arch.xcr0 = XSTATE_FP;
7487
7488         vcpu->arch.cr0 |= X86_CR0_ET;
7489
7490         return 0;
7491 }
7492 EXPORT_SYMBOL_GPL(fx_init);
7493
7494 static void fx_free(struct kvm_vcpu *vcpu)
7495 {
7496         fpu_free(&vcpu->arch.guest_fpu);
7497 }
7498
7499 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7500 {
7501         if (vcpu->guest_fpu_loaded)
7502                 return;
7503
7504         /*
7505          * Restore all possible states in the guest,
7506          * and assume host would use all available bits.
7507          * Guest xcr0 would be loaded later.
7508          */
7509         kvm_put_guest_xcr0(vcpu);
7510         vcpu->guest_fpu_loaded = 1;
7511         __kernel_fpu_begin();
7512         fpu_restore_checking(&vcpu->arch.guest_fpu);
7513         trace_kvm_fpu(1);
7514 }
7515
7516 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7517 {
7518         kvm_put_guest_xcr0(vcpu);
7519
7520         if (!vcpu->guest_fpu_loaded) {
7521                 vcpu->fpu_counter = 0;
7522                 return;
7523         }
7524
7525         vcpu->guest_fpu_loaded = 0;
7526         fpu_save_init(&vcpu->arch.guest_fpu);
7527         __kernel_fpu_end();
7528         ++vcpu->stat.fpu_reload;
7529         /*
7530          * If using eager FPU mode, or if the guest is a frequent user
7531          * of the FPU, just leave the FPU active for next time.
7532          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7533          * the FPU in bursts will revert to loading it on demand.
7534          */
7535         if (!vcpu->arch.eager_fpu) {
7536                 if (++vcpu->fpu_counter < 5)
7537                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7538         }
7539         trace_kvm_fpu(0);
7540 }
7541
7542 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7543 {
7544         kvmclock_reset(vcpu);
7545
7546         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7547         fx_free(vcpu);
7548         kvm_x86_ops->vcpu_free(vcpu);
7549 }
7550
7551 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7552                                                 unsigned int id)
7553 {
7554         struct kvm_vcpu *vcpu;
7555
7556         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7557                 printk_once(KERN_WARNING
7558                 "kvm: SMP vm created on host with unstable TSC; "
7559                 "guest TSC will not be reliable\n");
7560
7561         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7562
7563         /*
7564          * Activate fpu unconditionally in case the guest needs eager FPU.  It will be
7565          * deactivated soon if it doesn't.
7566          */
7567         kvm_x86_ops->fpu_activate(vcpu);
7568         return vcpu;
7569 }
7570
7571 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7572 {
7573         int r;
7574
7575         vcpu->arch.mtrr_state.have_fixed = 1;
7576         r = vcpu_load(vcpu);
7577         if (r)
7578                 return r;
7579         kvm_vcpu_reset(vcpu, false);
7580         kvm_mmu_setup(vcpu);
7581         vcpu_put(vcpu);
7582
7583         return r;
7584 }
7585
7586 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7587 {
7588         struct msr_data msr;
7589         struct kvm *kvm = vcpu->kvm;
7590
7591         if (vcpu_load(vcpu))
7592                 return;
7593         msr.data = 0x0;
7594         msr.index = MSR_IA32_TSC;
7595         msr.host_initiated = true;
7596         kvm_write_tsc(vcpu, &msr);
7597         vcpu_put(vcpu);
7598
7599         if (!kvmclock_periodic_sync)
7600                 return;
7601
7602         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7603                                         KVMCLOCK_SYNC_PERIOD);
7604 }
7605
7606 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7607 {
7608         int r;
7609         vcpu->arch.apf.msr_val = 0;
7610
7611         r = vcpu_load(vcpu);
7612         BUG_ON(r);
7613         kvm_mmu_unload(vcpu);
7614         vcpu_put(vcpu);
7615
7616         fx_free(vcpu);
7617         kvm_x86_ops->vcpu_free(vcpu);
7618 }
7619
7620 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7621 {
7622         vcpu->arch.hflags = 0;
7623
7624         atomic_set(&vcpu->arch.nmi_queued, 0);
7625         vcpu->arch.nmi_pending = 0;
7626         vcpu->arch.nmi_injected = false;
7627         kvm_clear_interrupt_queue(vcpu);
7628         kvm_clear_exception_queue(vcpu);
7629
7630         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7631         kvm_update_dr0123(vcpu);
7632         vcpu->arch.dr6 = DR6_INIT;
7633         kvm_update_dr6(vcpu);
7634         vcpu->arch.dr7 = DR7_FIXED_1;
7635         kvm_update_dr7(vcpu);
7636
7637         vcpu->arch.cr2 = 0;
7638
7639         kvm_make_request(KVM_REQ_EVENT, vcpu);
7640         vcpu->arch.apf.msr_val = 0;
7641         vcpu->arch.st.msr_val = 0;
7642
7643         kvmclock_reset(vcpu);
7644
7645         kvm_clear_async_pf_completion_queue(vcpu);
7646         kvm_async_pf_hash_reset(vcpu);
7647         vcpu->arch.apf.halted = false;
7648
7649         if (!init_event) {
7650                 kvm_pmu_reset(vcpu);
7651                 vcpu->arch.smbase = 0x30000;
7652         }
7653
7654         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7655         vcpu->arch.regs_avail = ~0;
7656         vcpu->arch.regs_dirty = ~0;
7657
7658         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7659 }
7660
7661 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7662 {
7663         struct kvm_segment cs;
7664
7665         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7666         cs.selector = vector << 8;
7667         cs.base = vector << 12;
7668         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7669         kvm_rip_write(vcpu, 0);
7670 }
7671
7672 int kvm_arch_hardware_enable(void)
7673 {
7674         struct kvm *kvm;
7675         struct kvm_vcpu *vcpu;
7676         int i;
7677         int ret;
7678         u64 local_tsc;
7679         u64 max_tsc = 0;
7680         bool stable, backwards_tsc = false;
7681
7682         kvm_shared_msr_cpu_online();
7683         ret = kvm_x86_ops->hardware_enable();
7684         if (ret != 0)
7685                 return ret;
7686
7687         local_tsc = native_read_tsc();
7688         stable = !check_tsc_unstable();
7689         list_for_each_entry(kvm, &vm_list, vm_list) {
7690                 kvm_for_each_vcpu(i, vcpu, kvm) {
7691                         if (!stable && vcpu->cpu == smp_processor_id())
7692                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7693                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7694                                 backwards_tsc = true;
7695                                 if (vcpu->arch.last_host_tsc > max_tsc)
7696                                         max_tsc = vcpu->arch.last_host_tsc;
7697                         }
7698                 }
7699         }
7700
7701         /*
7702          * Sometimes, even reliable TSCs go backwards.  This happens on
7703          * platforms that reset TSC during suspend or hibernate actions, but
7704          * maintain synchronization.  We must compensate.  Fortunately, we can
7705          * detect that condition here, which happens early in CPU bringup,
7706          * before any KVM threads can be running.  Unfortunately, we can't
7707          * bring the TSCs fully up to date with real time, as we aren't yet far
7708          * enough into CPU bringup that we know how much real time has actually
7709          * elapsed; our helper function, get_kernel_ns() will be using boot
7710          * variables that haven't been updated yet.
7711          *
7712          * So we simply find the maximum observed TSC above, then record the
7713          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7714          * the adjustment will be applied.  Note that we accumulate
7715          * adjustments, in case multiple suspend cycles happen before some VCPU
7716          * gets a chance to run again.  In the event that no KVM threads get a
7717          * chance to run, we will miss the entire elapsed period, as we'll have
7718          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7719          * loose cycle time.  This isn't too big a deal, since the loss will be
7720          * uniform across all VCPUs (not to mention the scenario is extremely
7721          * unlikely). It is possible that a second hibernate recovery happens
7722          * much faster than a first, causing the observed TSC here to be
7723          * smaller; this would require additional padding adjustment, which is
7724          * why we set last_host_tsc to the local tsc observed here.
7725          *
7726          * N.B. - this code below runs only on platforms with reliable TSC,
7727          * as that is the only way backwards_tsc is set above.  Also note
7728          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7729          * have the same delta_cyc adjustment applied if backwards_tsc
7730          * is detected.  Note further, this adjustment is only done once,
7731          * as we reset last_host_tsc on all VCPUs to stop this from being
7732          * called multiple times (one for each physical CPU bringup).
7733          *
7734          * Platforms with unreliable TSCs don't have to deal with this, they
7735          * will be compensated by the logic in vcpu_load, which sets the TSC to
7736          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7737          * guarantee that they stay in perfect synchronization.
7738          */
7739         if (backwards_tsc) {
7740                 u64 delta_cyc = max_tsc - local_tsc;
7741                 backwards_tsc_observed = true;
7742                 list_for_each_entry(kvm, &vm_list, vm_list) {
7743                         kvm_for_each_vcpu(i, vcpu, kvm) {
7744                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7745                                 vcpu->arch.last_host_tsc = local_tsc;
7746                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7747                         }
7748
7749                         /*
7750                          * We have to disable TSC offset matching.. if you were
7751                          * booting a VM while issuing an S4 host suspend....
7752                          * you may have some problem.  Solving this issue is
7753                          * left as an exercise to the reader.
7754                          */
7755                         kvm->arch.last_tsc_nsec = 0;
7756                         kvm->arch.last_tsc_write = 0;
7757                 }
7758
7759         }
7760         return 0;
7761 }
7762
7763 void kvm_arch_hardware_disable(void)
7764 {
7765         kvm_x86_ops->hardware_disable();
7766         drop_user_return_notifiers();
7767 }
7768
7769 int kvm_arch_hardware_setup(void)
7770 {
7771         int r;
7772
7773         r = kvm_x86_ops->hardware_setup();
7774         if (r != 0)
7775                 return r;
7776
7777         kvm_init_msr_list();
7778         return 0;
7779 }
7780
7781 void kvm_arch_hardware_unsetup(void)
7782 {
7783         kvm_x86_ops->hardware_unsetup();
7784 }
7785
7786 void kvm_arch_check_processor_compat(void *rtn)
7787 {
7788         kvm_x86_ops->check_processor_compatibility(rtn);
7789 }
7790
7791 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7792 {
7793         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7794 }
7795
7796 struct static_key kvm_no_apic_vcpu __read_mostly;
7797
7798 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7799 {
7800         struct page *page;
7801         struct kvm *kvm;
7802         int r;
7803
7804         BUG_ON(vcpu->kvm == NULL);
7805         kvm = vcpu->kvm;
7806
7807         vcpu->arch.pv.pv_unhalted = false;
7808         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7809         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7810                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7811         else
7812                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7813
7814         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7815         if (!page) {
7816                 r = -ENOMEM;
7817                 goto fail;
7818         }
7819         vcpu->arch.pio_data = page_address(page);
7820
7821         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7822
7823         r = kvm_mmu_create(vcpu);
7824         if (r < 0)
7825                 goto fail_free_pio_data;
7826
7827         if (irqchip_in_kernel(kvm)) {
7828                 r = kvm_create_lapic(vcpu);
7829                 if (r < 0)
7830                         goto fail_mmu_destroy;
7831         } else
7832                 static_key_slow_inc(&kvm_no_apic_vcpu);
7833
7834         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7835                                        GFP_KERNEL);
7836         if (!vcpu->arch.mce_banks) {
7837                 r = -ENOMEM;
7838                 goto fail_free_lapic;
7839         }
7840         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7841
7842         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7843                 r = -ENOMEM;
7844                 goto fail_free_mce_banks;
7845         }
7846
7847         r = fx_init(vcpu, false);
7848         if (r)
7849                 goto fail_free_wbinvd_dirty_mask;
7850
7851         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7852         vcpu->arch.pv_time_enabled = false;
7853
7854         vcpu->arch.guest_supported_xcr0 = 0;
7855         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7856
7857         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7858
7859         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7860
7861         kvm_async_pf_hash_reset(vcpu);
7862         kvm_pmu_init(vcpu);
7863
7864         return 0;
7865 fail_free_wbinvd_dirty_mask:
7866         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7867 fail_free_mce_banks:
7868         kfree(vcpu->arch.mce_banks);
7869 fail_free_lapic:
7870         kvm_free_lapic(vcpu);
7871 fail_mmu_destroy:
7872         kvm_mmu_destroy(vcpu);
7873 fail_free_pio_data:
7874         free_page((unsigned long)vcpu->arch.pio_data);
7875 fail:
7876         return r;
7877 }
7878
7879 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7880 {
7881         int idx;
7882
7883         kvm_pmu_destroy(vcpu);
7884         kfree(vcpu->arch.mce_banks);
7885         kvm_free_lapic(vcpu);
7886         idx = srcu_read_lock(&vcpu->kvm->srcu);
7887         kvm_mmu_destroy(vcpu);
7888         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7889         free_page((unsigned long)vcpu->arch.pio_data);
7890         if (!irqchip_in_kernel(vcpu->kvm))
7891                 static_key_slow_dec(&kvm_no_apic_vcpu);
7892 }
7893
7894 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7895 {
7896         kvm_x86_ops->sched_in(vcpu, cpu);
7897 }
7898
7899 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7900 {
7901         if (type)
7902                 return -EINVAL;
7903
7904         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7905         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7906         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7907         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7908         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7909
7910         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7911         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7912         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7913         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7914                 &kvm->arch.irq_sources_bitmap);
7915
7916         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7917         mutex_init(&kvm->arch.apic_map_lock);
7918         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7919
7920         pvclock_update_vm_gtod_copy(kvm);
7921
7922         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7923         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7924
7925         return 0;
7926 }
7927
7928 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7929 {
7930         int r;
7931         r = vcpu_load(vcpu);
7932         BUG_ON(r);
7933         kvm_mmu_unload(vcpu);
7934         vcpu_put(vcpu);
7935 }
7936
7937 static void kvm_free_vcpus(struct kvm *kvm)
7938 {
7939         unsigned int i;
7940         struct kvm_vcpu *vcpu;
7941
7942         /*
7943          * Unpin any mmu pages first.
7944          */
7945         kvm_for_each_vcpu(i, vcpu, kvm) {
7946                 kvm_clear_async_pf_completion_queue(vcpu);
7947                 kvm_unload_vcpu_mmu(vcpu);
7948         }
7949         kvm_for_each_vcpu(i, vcpu, kvm)
7950                 kvm_arch_vcpu_free(vcpu);
7951
7952         mutex_lock(&kvm->lock);
7953         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7954                 kvm->vcpus[i] = NULL;
7955
7956         atomic_set(&kvm->online_vcpus, 0);
7957         mutex_unlock(&kvm->lock);
7958 }
7959
7960 void kvm_arch_sync_events(struct kvm *kvm)
7961 {
7962         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7963         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7964         kvm_free_all_assigned_devices(kvm);
7965         kvm_free_pit(kvm);
7966 }
7967
7968 int __x86_set_memory_region(struct kvm *kvm,
7969                             const struct kvm_userspace_memory_region *mem)
7970 {
7971         int i, r;
7972
7973         /* Called with kvm->slots_lock held.  */
7974         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7975
7976         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7977                 struct kvm_userspace_memory_region m = *mem;
7978
7979                 m.slot |= i << 16;
7980                 r = __kvm_set_memory_region(kvm, &m);
7981                 if (r < 0)
7982                         return r;
7983         }
7984
7985         return 0;
7986 }
7987 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7988
7989 int x86_set_memory_region(struct kvm *kvm,
7990                           const struct kvm_userspace_memory_region *mem)
7991 {
7992         int r;
7993
7994         mutex_lock(&kvm->slots_lock);
7995         r = __x86_set_memory_region(kvm, mem);
7996         mutex_unlock(&kvm->slots_lock);
7997
7998         return r;
7999 }
8000 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8001
8002 void kvm_arch_destroy_vm(struct kvm *kvm)
8003 {
8004         if (current->mm == kvm->mm) {
8005                 /*
8006                  * Free memory regions allocated on behalf of userspace,
8007                  * unless the the memory map has changed due to process exit
8008                  * or fd copying.
8009                  */
8010                 struct kvm_userspace_memory_region mem;
8011                 memset(&mem, 0, sizeof(mem));
8012                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
8013                 x86_set_memory_region(kvm, &mem);
8014
8015                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
8016                 x86_set_memory_region(kvm, &mem);
8017
8018                 mem.slot = TSS_PRIVATE_MEMSLOT;
8019                 x86_set_memory_region(kvm, &mem);
8020         }
8021         kvm_iommu_unmap_guest(kvm);
8022         kfree(kvm->arch.vpic);
8023         kfree(kvm->arch.vioapic);
8024         kvm_free_vcpus(kvm);
8025         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8026 }
8027
8028 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8029                            struct kvm_memory_slot *dont)
8030 {
8031         int i;
8032
8033         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8034                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8035                         kvfree(free->arch.rmap[i]);
8036                         free->arch.rmap[i] = NULL;
8037                 }
8038                 if (i == 0)
8039                         continue;
8040
8041                 if (!dont || free->arch.lpage_info[i - 1] !=
8042                              dont->arch.lpage_info[i - 1]) {
8043                         kvfree(free->arch.lpage_info[i - 1]);
8044                         free->arch.lpage_info[i - 1] = NULL;
8045                 }
8046         }
8047 }
8048
8049 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8050                             unsigned long npages)
8051 {
8052         int i;
8053
8054         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8055                 unsigned long ugfn;
8056                 int lpages;
8057                 int level = i + 1;
8058
8059                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8060                                       slot->base_gfn, level) + 1;
8061
8062                 slot->arch.rmap[i] =
8063                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8064                 if (!slot->arch.rmap[i])
8065                         goto out_free;
8066                 if (i == 0)
8067                         continue;
8068
8069                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
8070                                         sizeof(*slot->arch.lpage_info[i - 1]));
8071                 if (!slot->arch.lpage_info[i - 1])
8072                         goto out_free;
8073
8074                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8075                         slot->arch.lpage_info[i - 1][0].write_count = 1;
8076                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8077                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
8078                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8079                 /*
8080                  * If the gfn and userspace address are not aligned wrt each
8081                  * other, or if explicitly asked to, disable large page
8082                  * support for this slot
8083                  */
8084                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8085                     !kvm_largepages_enabled()) {
8086                         unsigned long j;
8087
8088                         for (j = 0; j < lpages; ++j)
8089                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
8090                 }
8091         }
8092
8093         return 0;
8094
8095 out_free:
8096         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8097                 kvfree(slot->arch.rmap[i]);
8098                 slot->arch.rmap[i] = NULL;
8099                 if (i == 0)
8100                         continue;
8101
8102                 kvfree(slot->arch.lpage_info[i - 1]);
8103                 slot->arch.lpage_info[i - 1] = NULL;
8104         }
8105         return -ENOMEM;
8106 }
8107
8108 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8109 {
8110         /*
8111          * memslots->generation has been incremented.
8112          * mmio generation may have reached its maximum value.
8113          */
8114         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8115 }
8116
8117 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8118                                 struct kvm_memory_slot *memslot,
8119                                 const struct kvm_userspace_memory_region *mem,
8120                                 enum kvm_mr_change change)
8121 {
8122         /*
8123          * Only private memory slots need to be mapped here since
8124          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
8125          */
8126         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
8127                 unsigned long userspace_addr;
8128
8129                 /*
8130                  * MAP_SHARED to prevent internal slot pages from being moved
8131                  * by fork()/COW.
8132                  */
8133                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
8134                                          PROT_READ | PROT_WRITE,
8135                                          MAP_SHARED | MAP_ANONYMOUS, 0);
8136
8137                 if (IS_ERR((void *)userspace_addr))
8138                         return PTR_ERR((void *)userspace_addr);
8139
8140                 memslot->userspace_addr = userspace_addr;
8141         }
8142
8143         return 0;
8144 }
8145
8146 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8147                                      struct kvm_memory_slot *new)
8148 {
8149         /* Still write protect RO slot */
8150         if (new->flags & KVM_MEM_READONLY) {
8151                 kvm_mmu_slot_remove_write_access(kvm, new);
8152                 return;
8153         }
8154
8155         /*
8156          * Call kvm_x86_ops dirty logging hooks when they are valid.
8157          *
8158          * kvm_x86_ops->slot_disable_log_dirty is called when:
8159          *
8160          *  - KVM_MR_CREATE with dirty logging is disabled
8161          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8162          *
8163          * The reason is, in case of PML, we need to set D-bit for any slots
8164          * with dirty logging disabled in order to eliminate unnecessary GPA
8165          * logging in PML buffer (and potential PML buffer full VMEXT). This
8166          * guarantees leaving PML enabled during guest's lifetime won't have
8167          * any additonal overhead from PML when guest is running with dirty
8168          * logging disabled for memory slots.
8169          *
8170          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8171          * to dirty logging mode.
8172          *
8173          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8174          *
8175          * In case of write protect:
8176          *
8177          * Write protect all pages for dirty logging.
8178          *
8179          * All the sptes including the large sptes which point to this
8180          * slot are set to readonly. We can not create any new large
8181          * spte on this slot until the end of the logging.
8182          *
8183          * See the comments in fast_page_fault().
8184          */
8185         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8186                 if (kvm_x86_ops->slot_enable_log_dirty)
8187                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8188                 else
8189                         kvm_mmu_slot_remove_write_access(kvm, new);
8190         } else {
8191                 if (kvm_x86_ops->slot_disable_log_dirty)
8192                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8193         }
8194 }
8195
8196 void kvm_arch_commit_memory_region(struct kvm *kvm,
8197                                 const struct kvm_userspace_memory_region *mem,
8198                                 const struct kvm_memory_slot *old,
8199                                 const struct kvm_memory_slot *new,
8200                                 enum kvm_mr_change change)
8201 {
8202         int nr_mmu_pages = 0;
8203
8204         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
8205                 int ret;
8206
8207                 ret = vm_munmap(old->userspace_addr,
8208                                 old->npages * PAGE_SIZE);
8209                 if (ret < 0)
8210                         printk(KERN_WARNING
8211                                "kvm_vm_ioctl_set_memory_region: "
8212                                "failed to munmap memory\n");
8213         }
8214
8215         if (!kvm->arch.n_requested_mmu_pages)
8216                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8217
8218         if (nr_mmu_pages)
8219                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8220
8221         /*
8222          * Dirty logging tracks sptes in 4k granularity, meaning that large
8223          * sptes have to be split.  If live migration is successful, the guest
8224          * in the source machine will be destroyed and large sptes will be
8225          * created in the destination. However, if the guest continues to run
8226          * in the source machine (for example if live migration fails), small
8227          * sptes will remain around and cause bad performance.
8228          *
8229          * Scan sptes if dirty logging has been stopped, dropping those
8230          * which can be collapsed into a single large-page spte.  Later
8231          * page faults will create the large-page sptes.
8232          */
8233         if ((change != KVM_MR_DELETE) &&
8234                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8235                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8236                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8237
8238         /*
8239          * Set up write protection and/or dirty logging for the new slot.
8240          *
8241          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8242          * been zapped so no dirty logging staff is needed for old slot. For
8243          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8244          * new and it's also covered when dealing with the new slot.
8245          *
8246          * FIXME: const-ify all uses of struct kvm_memory_slot.
8247          */
8248         if (change != KVM_MR_DELETE)
8249                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8250 }
8251
8252 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8253 {
8254         kvm_mmu_invalidate_zap_all_pages(kvm);
8255 }
8256
8257 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8258                                    struct kvm_memory_slot *slot)
8259 {
8260         kvm_mmu_invalidate_zap_all_pages(kvm);
8261 }
8262
8263 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8264 {
8265         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8266                 kvm_x86_ops->check_nested_events(vcpu, false);
8267
8268         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8269                 !vcpu->arch.apf.halted)
8270                 || !list_empty_careful(&vcpu->async_pf.done)
8271                 || kvm_apic_has_events(vcpu)
8272                 || vcpu->arch.pv.pv_unhalted
8273                 || atomic_read(&vcpu->arch.nmi_queued) ||
8274                 (kvm_arch_interrupt_allowed(vcpu) &&
8275                  kvm_cpu_has_interrupt(vcpu));
8276 }
8277
8278 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8279 {
8280         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8281 }
8282
8283 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8284 {
8285         return kvm_x86_ops->interrupt_allowed(vcpu);
8286 }
8287
8288 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8289 {
8290         if (is_64_bit_mode(vcpu))
8291                 return kvm_rip_read(vcpu);
8292         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8293                      kvm_rip_read(vcpu));
8294 }
8295 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8296
8297 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8298 {
8299         return kvm_get_linear_rip(vcpu) == linear_rip;
8300 }
8301 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8302
8303 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8304 {
8305         unsigned long rflags;
8306
8307         rflags = kvm_x86_ops->get_rflags(vcpu);
8308         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8309                 rflags &= ~X86_EFLAGS_TF;
8310         return rflags;
8311 }
8312 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8313
8314 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8315 {
8316         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8317             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8318                 rflags |= X86_EFLAGS_TF;
8319         kvm_x86_ops->set_rflags(vcpu, rflags);
8320 }
8321
8322 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8323 {
8324         __kvm_set_rflags(vcpu, rflags);
8325         kvm_make_request(KVM_REQ_EVENT, vcpu);
8326 }
8327 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8328
8329 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8330 {
8331         int r;
8332
8333         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8334               work->wakeup_all)
8335                 return;
8336
8337         r = kvm_mmu_reload(vcpu);
8338         if (unlikely(r))
8339                 return;
8340
8341         if (!vcpu->arch.mmu.direct_map &&
8342               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8343                 return;
8344
8345         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8346 }
8347
8348 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8349 {
8350         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8351 }
8352
8353 static inline u32 kvm_async_pf_next_probe(u32 key)
8354 {
8355         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8356 }
8357
8358 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8359 {
8360         u32 key = kvm_async_pf_hash_fn(gfn);
8361
8362         while (vcpu->arch.apf.gfns[key] != ~0)
8363                 key = kvm_async_pf_next_probe(key);
8364
8365         vcpu->arch.apf.gfns[key] = gfn;
8366 }
8367
8368 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8369 {
8370         int i;
8371         u32 key = kvm_async_pf_hash_fn(gfn);
8372
8373         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8374                      (vcpu->arch.apf.gfns[key] != gfn &&
8375                       vcpu->arch.apf.gfns[key] != ~0); i++)
8376                 key = kvm_async_pf_next_probe(key);
8377
8378         return key;
8379 }
8380
8381 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8382 {
8383         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8384 }
8385
8386 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8387 {
8388         u32 i, j, k;
8389
8390         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8391         while (true) {
8392                 vcpu->arch.apf.gfns[i] = ~0;
8393                 do {
8394                         j = kvm_async_pf_next_probe(j);
8395                         if (vcpu->arch.apf.gfns[j] == ~0)
8396                                 return;
8397                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8398                         /*
8399                          * k lies cyclically in ]i,j]
8400                          * |    i.k.j |
8401                          * |....j i.k.| or  |.k..j i...|
8402                          */
8403                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8404                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8405                 i = j;
8406         }
8407 }
8408
8409 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8410 {
8411
8412         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8413                                       sizeof(val));
8414 }
8415
8416 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8417                                      struct kvm_async_pf *work)
8418 {
8419         struct x86_exception fault;
8420
8421         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8422         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8423
8424         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8425             (vcpu->arch.apf.send_user_only &&
8426              kvm_x86_ops->get_cpl(vcpu) == 0))
8427                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8428         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8429                 fault.vector = PF_VECTOR;
8430                 fault.error_code_valid = true;
8431                 fault.error_code = 0;
8432                 fault.nested_page_fault = false;
8433                 fault.address = work->arch.token;
8434                 kvm_inject_page_fault(vcpu, &fault);
8435         }
8436 }
8437
8438 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8439                                  struct kvm_async_pf *work)
8440 {
8441         struct x86_exception fault;
8442
8443         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8444         if (work->wakeup_all)
8445                 work->arch.token = ~0; /* broadcast wakeup */
8446         else
8447                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8448
8449         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8450             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8451                 fault.vector = PF_VECTOR;
8452                 fault.error_code_valid = true;
8453                 fault.error_code = 0;
8454                 fault.nested_page_fault = false;
8455                 fault.address = work->arch.token;
8456                 kvm_inject_page_fault(vcpu, &fault);
8457         }
8458         vcpu->arch.apf.halted = false;
8459         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8460 }
8461
8462 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8463 {
8464         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8465                 return true;
8466         else
8467                 return !kvm_event_needs_reinjection(vcpu) &&
8468                         kvm_x86_ops->interrupt_allowed(vcpu);
8469 }
8470
8471 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8472 {
8473         atomic_inc(&kvm->arch.noncoherent_dma_count);
8474 }
8475 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8476
8477 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8478 {
8479         atomic_dec(&kvm->arch.noncoherent_dma_count);
8480 }
8481 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8482
8483 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8484 {
8485         return atomic_read(&kvm->arch.noncoherent_dma_count);
8486 }
8487 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8488
8489 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8490 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8491 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8492 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8493 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8494 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8499 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8500 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8501 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8502 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8503 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);