arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <trace/events/kvm.h>
  55
  56 #define CREATE_TRACE_POINTS
  57 #include "trace.h"
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 153         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 154         { "hypercalls", VCPU_STAT(hypercalls) },
 155         { "request_irq", VCPU_STAT(request_irq_exits) },
 156         { "irq_exits", VCPU_STAT(irq_exits) },
 157         { "host_state_reload", VCPU_STAT(host_state_reload) },
 158         { "efer_reload", VCPU_STAT(efer_reload) },
 159         { "fpu_reload", VCPU_STAT(fpu_reload) },
 160         { "insn_emulation", VCPU_STAT(insn_emulation) },
 161         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 162         { "irq_injections", VCPU_STAT(irq_injections) },
 163         { "nmi_injections", VCPU_STAT(nmi_injections) },
 164         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 165         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 166         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 167         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 168         { "mmu_flooded", VM_STAT(mmu_flooded) },
 169         { "mmu_recycled", VM_STAT(mmu_recycled) },
 170         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 171         { "mmu_unsync", VM_STAT(mmu_unsync) },
 172         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 173         { "largepages", VM_STAT(lpages) },
 174         { NULL }
 175 };
 176
 177 u64 __read_mostly host_xcr0;
 178
 179 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 180
 181 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 182 {
 183         int i;
 184         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 185                 vcpu->arch.apf.gfns[i] = ~0;
 186 }
 187
 188 static void kvm_on_user_return(struct user_return_notifier *urn)
 189 {
 190         unsigned slot;
 191         struct kvm_shared_msrs *locals
 192                 = container_of(urn, struct kvm_shared_msrs, urn);
 193         struct kvm_shared_msr_values *values;
 194
 195         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 196                 values = &locals->values[slot];
 197                 if (values->host != values->curr) {
 198                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 199                         values->curr = values->host;
 200                 }
 201         }
 202         locals->registered = false;
 203         user_return_notifier_unregister(urn);
 204 }
 205
 206 static void shared_msr_update(unsigned slot, u32 msr)
 207 {
 208         u64 value;
 209         unsigned int cpu = smp_processor_id();
 210         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 211
 212         /* only read, and nobody should modify it at this time,
 213          * so don't need lock */
 214         if (slot >= shared_msrs_global.nr) {
 215                 printk(KERN_ERR "kvm: invalid MSR slot!");
 216                 return;
 217         }
 218         rdmsrl_safe(msr, &value);
 219         smsr->values[slot].host = value;
 220         smsr->values[slot].curr = value;
 221 }
 222
 223 void kvm_define_shared_msr(unsigned slot, u32 msr)
 224 {
 225         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 226         shared_msrs_global.msrs[slot] = msr;
 227         if (slot >= shared_msrs_global.nr)
 228                 shared_msrs_global.nr = slot + 1;
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 231
 232 static void kvm_shared_msr_cpu_online(void)
 233 {
 234         unsigned i;
 235
 236         for (i = 0; i < shared_msrs_global.nr; ++i)
 237                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 238 }
 239
 240 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 241 {
 242         unsigned int cpu = smp_processor_id();
 243         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 244         int err;
 245
 246         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 247                 return 0;
 248         smsr->values[slot].curr = value;
 249         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 250         if (err)
 251                 return 1;
 252
 253         if (!smsr->registered) {
 254                 smsr->urn.on_user_return = kvm_on_user_return;
 255                 user_return_notifier_register(&smsr->urn);
 256                 smsr->registered = true;
 257         }
 258         return 0;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 261
 262 static void drop_user_return_notifiers(void)
 263 {
 264         unsigned int cpu = smp_processor_id();
 265         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 266
 267         if (smsr->registered)
 268                 kvm_on_user_return(&smsr->urn);
 269 }
 270
 271 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 272 {
 273         return vcpu->arch.apic_base;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 276
 277 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 278 {
 279         u64 old_state = vcpu->arch.apic_base &
 280                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 281         u64 new_state = msr_info->data &
 282                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 283         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 284                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 285
 286         if (!msr_info->host_initiated &&
 287             ((msr_info->data & reserved_bits) != 0 ||
 288              new_state == X2APIC_ENABLE ||
 289              (new_state == MSR_IA32_APICBASE_ENABLE &&
 290               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 291              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 292               old_state == 0)))
 293                 return 1;
 294
 295         kvm_lapic_set_base(vcpu, msr_info->data);
 296         return 0;
 297 }
 298 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 299
 300 asmlinkage __visible void kvm_spurious_fault(void)
 301 {
 302         /* Fault while not rebooting.  We want the trace. */
 303         BUG();
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 306
 307 #define EXCPT_BENIGN            0
 308 #define EXCPT_CONTRIBUTORY      1
 309 #define EXCPT_PF                2
 310
 311 static int exception_class(int vector)
 312 {
 313         switch (vector) {
 314         case PF_VECTOR:
 315                 return EXCPT_PF;
 316         case DE_VECTOR:
 317         case TS_VECTOR:
 318         case NP_VECTOR:
 319         case SS_VECTOR:
 320         case GP_VECTOR:
 321                 return EXCPT_CONTRIBUTORY;
 322         default:
 323                 break;
 324         }
 325         return EXCPT_BENIGN;
 326 }
 327
 328 #define EXCPT_FAULT             0
 329 #define EXCPT_TRAP              1
 330 #define EXCPT_ABORT             2
 331 #define EXCPT_INTERRUPT         3
 332
 333 static int exception_type(int vector)
 334 {
 335         unsigned int mask;
 336
 337         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 338                 return EXCPT_INTERRUPT;
 339
 340         mask = 1 << vector;
 341
 342         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 343         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 344                 return EXCPT_TRAP;
 345
 346         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 347                 return EXCPT_ABORT;
 348
 349         /* Reserved exceptions will result in fault */
 350         return EXCPT_FAULT;
 351 }
 352
 353 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 354                 unsigned nr, bool has_error, u32 error_code,
 355                 bool reinject)
 356 {
 357         u32 prev_nr;
 358         int class1, class2;
 359
 360         kvm_make_request(KVM_REQ_EVENT, vcpu);
 361
 362         if (!vcpu->arch.exception.pending) {
 363         queue:
 364                 if (has_error && !is_protmode(vcpu))
 365                         has_error = false;
 366                 vcpu->arch.exception.pending = true;
 367                 vcpu->arch.exception.has_error_code = has_error;
 368                 vcpu->arch.exception.nr = nr;
 369                 vcpu->arch.exception.error_code = error_code;
 370                 vcpu->arch.exception.reinject = reinject;
 371                 return;
 372         }
 373
 374         /* to check exception */
 375         prev_nr = vcpu->arch.exception.nr;
 376         if (prev_nr == DF_VECTOR) {
 377                 /* triple fault -> shutdown */
 378                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 379                 return;
 380         }
 381         class1 = exception_class(prev_nr);
 382         class2 = exception_class(nr);
 383         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 384                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 385                 /* generate double fault per SDM Table 5-5 */
 386                 vcpu->arch.exception.pending = true;
 387                 vcpu->arch.exception.has_error_code = true;
 388                 vcpu->arch.exception.nr = DF_VECTOR;
 389                 vcpu->arch.exception.error_code = 0;
 390         } else
 391                 /* replace previous exception with a new one in a hope
 392                    that instruction re-execution will regenerate lost
 393                    exception */
 394                 goto queue;
 395 }
 396
 397 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 398 {
 399         kvm_multiple_exception(vcpu, nr, false, 0, false);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 402
 403 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 404 {
 405         kvm_multiple_exception(vcpu, nr, false, 0, true);
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 408
 409 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 410 {
 411         if (err)
 412                 kvm_inject_gp(vcpu, 0);
 413         else
 414                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 415 }
 416 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 417
 418 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 419 {
 420         ++vcpu->stat.pf_guest;
 421         vcpu->arch.cr2 = fault->address;
 422         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 425
 426 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 429                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 430         else
 431                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 432
 433         return fault->nested_page_fault;
 434 }
 435
 436 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 437 {
 438         atomic_inc(&vcpu->arch.nmi_queued);
 439         kvm_make_request(KVM_REQ_NMI, vcpu);
 440 }
 441 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 442
 443 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 444 {
 445         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 448
 449 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 450 {
 451         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 454
 455 /*
 456  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 457  * a #GP and return false.
 458  */
 459 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 460 {
 461         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 462                 return true;
 463         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 464         return false;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 467
 468 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 469 {
 470         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 471                 return true;
 472
 473         kvm_queue_exception(vcpu, UD_VECTOR);
 474         return false;
 475 }
 476 EXPORT_SYMBOL_GPL(kvm_require_dr);
 477
 478 /*
 479  * This function will be used to read from the physical memory of the currently
 480  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 481  * can read from guest physical or from the guest's guest physical memory.
 482  */
 483 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 484                             gfn_t ngfn, void *data, int offset, int len,
 485                             u32 access)
 486 {
 487         struct x86_exception exception;
 488         gfn_t real_gfn;
 489         gpa_t ngpa;
 490
 491         ngpa     = gfn_to_gpa(ngfn);
 492         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 493         if (real_gfn == UNMAPPED_GVA)
 494                 return -EFAULT;
 495
 496         real_gfn = gpa_to_gfn(real_gfn);
 497
 498         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 501
 502 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 503                                void *data, int offset, int len, u32 access)
 504 {
 505         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 506                                        data, offset, len, access);
 507 }
 508
 509 /*
 510  * Load the pae pdptrs.  Return true is they are all valid.
 511  */
 512 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 513 {
 514         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 515         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 516         int i;
 517         int ret;
 518         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 519
 520         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 521                                       offset * sizeof(u64), sizeof(pdpte),
 522                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 523         if (ret < 0) {
 524                 ret = 0;
 525                 goto out;
 526         }
 527         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 528                 if (is_present_gpte(pdpte[i]) &&
 529                     (pdpte[i] &
 530                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 531                         ret = 0;
 532                         goto out;
 533                 }
 534         }
 535         ret = 1;
 536
 537         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 538         __set_bit(VCPU_EXREG_PDPTR,
 539                   (unsigned long *)&vcpu->arch.regs_avail);
 540         __set_bit(VCPU_EXREG_PDPTR,
 541                   (unsigned long *)&vcpu->arch.regs_dirty);
 542 out:
 543
 544         return ret;
 545 }
 546 EXPORT_SYMBOL_GPL(load_pdptrs);
 547
 548 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 549 {
 550         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 551         bool changed = true;
 552         int offset;
 553         gfn_t gfn;
 554         int r;
 555
 556         if (is_long_mode(vcpu) || !is_pae(vcpu))
 557                 return false;
 558
 559         if (!test_bit(VCPU_EXREG_PDPTR,
 560                       (unsigned long *)&vcpu->arch.regs_avail))
 561                 return true;
 562
 563         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 564         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 565         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 566                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 567         if (r < 0)
 568                 goto out;
 569         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 570 out:
 571
 572         return changed;
 573 }
 574
 575 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 576 {
 577         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 578         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 579
 580         cr0 |= X86_CR0_ET;
 581
 582 #ifdef CONFIG_X86_64
 583         if (cr0 & 0xffffffff00000000UL)
 584                 return 1;
 585 #endif
 586
 587         cr0 &= ~CR0_RESERVED_BITS;
 588
 589         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 590                 return 1;
 591
 592         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 593                 return 1;
 594
 595         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 596 #ifdef CONFIG_X86_64
 597                 if ((vcpu->arch.efer & EFER_LME)) {
 598                         int cs_db, cs_l;
 599
 600                         if (!is_pae(vcpu))
 601                                 return 1;
 602                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 603                         if (cs_l)
 604                                 return 1;
 605                 } else
 606 #endif
 607                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 608                                                  kvm_read_cr3(vcpu)))
 609                         return 1;
 610         }
 611
 612         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr0(vcpu, cr0);
 616
 617         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 618                 kvm_clear_async_pf_completion_queue(vcpu);
 619                 kvm_async_pf_hash_reset(vcpu);
 620         }
 621
 622         if ((cr0 ^ old_cr0) & update_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 626                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 627
 628         return 0;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 631
 632 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 633 {
 634         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 635 }
 636 EXPORT_SYMBOL_GPL(kvm_lmsw);
 637
 638 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 639 {
 640         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 641                         !vcpu->guest_xcr0_loaded) {
 642                 /* kvm_set_xcr() also depends on this */
 643                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 644                 vcpu->guest_xcr0_loaded = 1;
 645         }
 646 }
 647
 648 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (vcpu->guest_xcr0_loaded) {
 651                 if (vcpu->arch.xcr0 != host_xcr0)
 652                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 653                 vcpu->guest_xcr0_loaded = 0;
 654         }
 655 }
 656
 657 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 658 {
 659         u64 xcr0 = xcr;
 660         u64 old_xcr0 = vcpu->arch.xcr0;
 661         u64 valid_bits;
 662
 663         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 664         if (index != XCR_XFEATURE_ENABLED_MASK)
 665                 return 1;
 666         if (!(xcr0 & XSTATE_FP))
 667                 return 1;
 668         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 669                 return 1;
 670
 671         /*
 672          * Do not allow the guest to set bits that we do not support
 673          * saving.  However, xcr0 bit 0 is always set, even if the
 674          * emulated CPU does not support XSAVE (see fx_init).
 675          */
 676         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 677         if (xcr0 & ~valid_bits)
 678                 return 1;
 679
 680         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 681                 return 1;
 682
 683         if (xcr0 & XSTATE_AVX512) {
 684                 if (!(xcr0 & XSTATE_YMM))
 685                         return 1;
 686                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 687                         return 1;
 688         }
 689         kvm_put_guest_xcr0(vcpu);
 690         vcpu->arch.xcr0 = xcr0;
 691
 692         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 693                 kvm_update_cpuid(vcpu);
 694         return 0;
 695 }
 696
 697 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 698 {
 699         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 700             __kvm_set_xcr(vcpu, index, xcr)) {
 701                 kvm_inject_gp(vcpu, 0);
 702                 return 1;
 703         }
 704         return 0;
 705 }
 706 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 707
 708 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 709 {
 710         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 711         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 712                                    X86_CR4_SMEP | X86_CR4_SMAP;
 713
 714         if (cr4 & CR4_RESERVED_BITS)
 715                 return 1;
 716
 717         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 718                 return 1;
 719
 720         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 721                 return 1;
 722
 723         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 724                 return 1;
 725
 726         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 727                 return 1;
 728
 729         if (is_long_mode(vcpu)) {
 730                 if (!(cr4 & X86_CR4_PAE))
 731                         return 1;
 732         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 733                    && ((cr4 ^ old_cr4) & pdptr_bits)
 734                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 735                                    kvm_read_cr3(vcpu)))
 736                 return 1;
 737
 738         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 739                 if (!guest_cpuid_has_pcid(vcpu))
 740                         return 1;
 741
 742                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 743                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 744                         return 1;
 745         }
 746
 747         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 748                 return 1;
 749
 750         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 751             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 752                 kvm_mmu_reset_context(vcpu);
 753
 754         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 755                 kvm_update_cpuid(vcpu);
 756
 757         return 0;
 758 }
 759 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 760
 761 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 762 {
 763 #ifdef CONFIG_X86_64
 764         cr3 &= ~CR3_PCID_INVD;
 765 #endif
 766
 767         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 768                 kvm_mmu_sync_roots(vcpu);
 769                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 770                 return 0;
 771         }
 772
 773         if (is_long_mode(vcpu)) {
 774                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 775                         return 1;
 776         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 777                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 778                 return 1;
 779
 780         vcpu->arch.cr3 = cr3;
 781         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 782         kvm_mmu_new_cr3(vcpu);
 783         return 0;
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 786
 787 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 788 {
 789         if (cr8 & CR8_RESERVED_BITS)
 790                 return 1;
 791         if (irqchip_in_kernel(vcpu->kvm))
 792                 kvm_lapic_set_tpr(vcpu, cr8);
 793         else
 794                 vcpu->arch.cr8 = cr8;
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 798
 799 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 800 {
 801         if (irqchip_in_kernel(vcpu->kvm))
 802                 return kvm_lapic_get_cr8(vcpu);
 803         else
 804                 return vcpu->arch.cr8;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 807
 808 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 809 {
 810         int i;
 811
 812         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 813                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 814                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 815                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 816         }
 817 }
 818
 819 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 820 {
 821         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 822                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 823 }
 824
 825 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 826 {
 827         unsigned long dr7;
 828
 829         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 830                 dr7 = vcpu->arch.guest_debug_dr7;
 831         else
 832                 dr7 = vcpu->arch.dr7;
 833         kvm_x86_ops->set_dr7(vcpu, dr7);
 834         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 835         if (dr7 & DR7_BP_EN_MASK)
 836                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 837 }
 838
 839 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 840 {
 841         u64 fixed = DR6_FIXED_1;
 842
 843         if (!guest_cpuid_has_rtm(vcpu))
 844                 fixed |= DR6_RTM;
 845         return fixed;
 846 }
 847
 848 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 849 {
 850         switch (dr) {
 851         case 0 ... 3:
 852                 vcpu->arch.db[dr] = val;
 853                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 854                         vcpu->arch.eff_db[dr] = val;
 855                 break;
 856         case 4:
 857                 /* fall through */
 858         case 6:
 859                 if (val & 0xffffffff00000000ULL)
 860                         return -1; /* #GP */
 861                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 862                 kvm_update_dr6(vcpu);
 863                 break;
 864         case 5:
 865                 /* fall through */
 866         default: /* 7 */
 867                 if (val & 0xffffffff00000000ULL)
 868                         return -1; /* #GP */
 869                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 870                 kvm_update_dr7(vcpu);
 871                 break;
 872         }
 873
 874         return 0;
 875 }
 876
 877 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 878 {
 879         if (__kvm_set_dr(vcpu, dr, val)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_dr);
 886
 887 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 888 {
 889         switch (dr) {
 890         case 0 ... 3:
 891                 *val = vcpu->arch.db[dr];
 892                 break;
 893         case 4:
 894                 /* fall through */
 895         case 6:
 896                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 897                         *val = vcpu->arch.dr6;
 898                 else
 899                         *val = kvm_x86_ops->get_dr6(vcpu);
 900                 break;
 901         case 5:
 902                 /* fall through */
 903         default: /* 7 */
 904                 *val = vcpu->arch.dr7;
 905                 break;
 906         }
 907         return 0;
 908 }
 909 EXPORT_SYMBOL_GPL(kvm_get_dr);
 910
 911 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 912 {
 913         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 914         u64 data;
 915         int err;
 916
 917         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 918         if (err)
 919                 return err;
 920         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 921         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 922         return err;
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 925
 926 /*
 927  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 928  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 929  *
 930  * This list is modified at module load time to reflect the
 931  * capabilities of the host cpu. This capabilities test skips MSRs that are
 932  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 933  * may depend on host virtualization features rather than host cpu features.
 934  */
 935
 936 static u32 msrs_to_save[] = {
 937         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 938         MSR_STAR,
 939 #ifdef CONFIG_X86_64
 940         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 941 #endif
 942         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 943         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 944 };
 945
 946 static unsigned num_msrs_to_save;
 947
 948 static u32 emulated_msrs[] = {
 949         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 950         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 951         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 952         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 953         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 954         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 955         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 956         MSR_KVM_PV_EOI_EN,
 957
 958         MSR_IA32_TSC_ADJUST,
 959         MSR_IA32_TSCDEADLINE,
 960         MSR_IA32_MISC_ENABLE,
 961         MSR_IA32_MCG_STATUS,
 962         MSR_IA32_MCG_CTL,
 963         MSR_IA32_SMBASE,
 964 };
 965
 966 static unsigned num_emulated_msrs;
 967
 968 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 969 {
 970         if (efer & efer_reserved_bits)
 971                 return false;
 972
 973         if (efer & EFER_FFXSR) {
 974                 struct kvm_cpuid_entry2 *feat;
 975
 976                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 977                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 978                         return false;
 979         }
 980
 981         if (efer & EFER_SVME) {
 982                 struct kvm_cpuid_entry2 *feat;
 983
 984                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 985                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 986                         return false;
 987         }
 988
 989         return true;
 990 }
 991 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 992
 993 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 994 {
 995         u64 old_efer = vcpu->arch.efer;
 996
 997         if (!kvm_valid_efer(vcpu, efer))
 998                 return 1;
 999
1000         if (is_paging(vcpu)
1001             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1002                 return 1;
1003
1004         efer &= ~EFER_LMA;
1005         efer |= vcpu->arch.efer & EFER_LMA;
1006
1007         kvm_x86_ops->set_efer(vcpu, efer);
1008
1009         /* Update reserved bits */
1010         if ((efer ^ old_efer) & EFER_NX)
1011                 kvm_mmu_reset_context(vcpu);
1012
1013         return 0;
1014 }
1015
1016 void kvm_enable_efer_bits(u64 mask)
1017 {
1018        efer_reserved_bits &= ~mask;
1019 }
1020 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1021
1022 /*
1023  * Writes msr value into into the appropriate "register".
1024  * Returns 0 on success, non-0 otherwise.
1025  * Assumes vcpu_load() was already called.
1026  */
1027 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1028 {
1029         switch (msr->index) {
1030         case MSR_FS_BASE:
1031         case MSR_GS_BASE:
1032         case MSR_KERNEL_GS_BASE:
1033         case MSR_CSTAR:
1034         case MSR_LSTAR:
1035                 if (is_noncanonical_address(msr->data))
1036                         return 1;
1037                 break;
1038         case MSR_IA32_SYSENTER_EIP:
1039         case MSR_IA32_SYSENTER_ESP:
1040                 /*
1041                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1042                  * non-canonical address is written on Intel but not on
1043                  * AMD (which ignores the top 32-bits, because it does
1044                  * not implement 64-bit SYSENTER).
1045                  *
1046                  * 64-bit code should hence be able to write a non-canonical
1047                  * value on AMD.  Making the address canonical ensures that
1048                  * vmentry does not fail on Intel after writing a non-canonical
1049                  * value, and that something deterministic happens if the guest
1050                  * invokes 64-bit SYSENTER.
1051                  */
1052                 msr->data = get_canonical(msr->data);
1053         }
1054         return kvm_x86_ops->set_msr(vcpu, msr);
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_msr);
1057
1058 /*
1059  * Adapt set_msr() to msr_io()'s calling convention
1060  */
1061 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1062 {
1063         struct msr_data msr;
1064         int r;
1065
1066         msr.index = index;
1067         msr.host_initiated = true;
1068         r = kvm_get_msr(vcpu, &msr);
1069         if (r)
1070                 return r;
1071
1072         *data = msr.data;
1073         return 0;
1074 }
1075
1076 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1077 {
1078         struct msr_data msr;
1079
1080         msr.data = *data;
1081         msr.index = index;
1082         msr.host_initiated = true;
1083         return kvm_set_msr(vcpu, &msr);
1084 }
1085
1086 #ifdef CONFIG_X86_64
1087 struct pvclock_gtod_data {
1088         seqcount_t      seq;
1089
1090         struct { /* extract of a clocksource struct */
1091                 int vclock_mode;
1092                 cycle_t cycle_last;
1093                 cycle_t mask;
1094                 u32     mult;
1095                 u32     shift;
1096         } clock;
1097
1098         u64             boot_ns;
1099         u64             nsec_base;
1100 };
1101
1102 static struct pvclock_gtod_data pvclock_gtod_data;
1103
1104 static void update_pvclock_gtod(struct timekeeper *tk)
1105 {
1106         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1107         u64 boot_ns;
1108
1109         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1110
1111         write_seqcount_begin(&vdata->seq);
1112
1113         /* copy pvclock gtod data */
1114         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1115         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1116         vdata->clock.mask               = tk->tkr_mono.mask;
1117         vdata->clock.mult               = tk->tkr_mono.mult;
1118         vdata->clock.shift              = tk->tkr_mono.shift;
1119
1120         vdata->boot_ns                  = boot_ns;
1121         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1122
1123         write_seqcount_end(&vdata->seq);
1124 }
1125 #endif
1126
1127 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1128 {
1129         /*
1130          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1131          * vcpu_enter_guest.  This function is only called from
1132          * the physical CPU that is running vcpu.
1133          */
1134         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1135 }
1136
1137 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1138 {
1139         int version;
1140         int r;
1141         struct pvclock_wall_clock wc;
1142         struct timespec boot;
1143
1144         if (!wall_clock)
1145                 return;
1146
1147         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1148         if (r)
1149                 return;
1150
1151         if (version & 1)
1152                 ++version;  /* first time write, random junk */
1153
1154         ++version;
1155
1156         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1157
1158         /*
1159          * The guest calculates current wall clock time by adding
1160          * system time (updated by kvm_guest_time_update below) to the
1161          * wall clock specified here.  guest system time equals host
1162          * system time for us, thus we must fill in host boot time here.
1163          */
1164         getboottime(&boot);
1165
1166         if (kvm->arch.kvmclock_offset) {
1167                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1168                 boot = timespec_sub(boot, ts);
1169         }
1170         wc.sec = boot.tv_sec;
1171         wc.nsec = boot.tv_nsec;
1172         wc.version = version;
1173
1174         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1175
1176         version++;
1177         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1178 }
1179
1180 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1181 {
1182         uint32_t quotient, remainder;
1183
1184         /* Don't try to replace with do_div(), this one calculates
1185          * "(dividend << 32) / divisor" */
1186         __asm__ ( "divl %4"
1187                   : "=a" (quotient), "=d" (remainder)
1188                   : "0" (0), "1" (dividend), "r" (divisor) );
1189         return quotient;
1190 }
1191
1192 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1193                                s8 *pshift, u32 *pmultiplier)
1194 {
1195         uint64_t scaled64;
1196         int32_t  shift = 0;
1197         uint64_t tps64;
1198         uint32_t tps32;
1199
1200         tps64 = base_khz * 1000LL;
1201         scaled64 = scaled_khz * 1000LL;
1202         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1203                 tps64 >>= 1;
1204                 shift--;
1205         }
1206
1207         tps32 = (uint32_t)tps64;
1208         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1209                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1210                         scaled64 >>= 1;
1211                 else
1212                         tps32 <<= 1;
1213                 shift++;
1214         }
1215
1216         *pshift = shift;
1217         *pmultiplier = div_frac(scaled64, tps32);
1218
1219         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1220                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1221 }
1222
1223 #ifdef CONFIG_X86_64
1224 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1225 #endif
1226
1227 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1228 static unsigned long max_tsc_khz;
1229
1230 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1231 {
1232         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1233                                    vcpu->arch.virtual_tsc_shift);
1234 }
1235
1236 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1237 {
1238         u64 v = (u64)khz * (1000000 + ppm);
1239         do_div(v, 1000000);
1240         return v;
1241 }
1242
1243 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1244 {
1245         u32 thresh_lo, thresh_hi;
1246         int use_scaling = 0;
1247
1248         /* tsc_khz can be zero if TSC calibration fails */
1249         if (this_tsc_khz == 0)
1250                 return;
1251
1252         /* Compute a scale to convert nanoseconds in TSC cycles */
1253         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1254                            &vcpu->arch.virtual_tsc_shift,
1255                            &vcpu->arch.virtual_tsc_mult);
1256         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1257
1258         /*
1259          * Compute the variation in TSC rate which is acceptable
1260          * within the range of tolerance and decide if the
1261          * rate being applied is within that bounds of the hardware
1262          * rate.  If so, no scaling or compensation need be done.
1263          */
1264         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1265         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1266         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1267                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1268                 use_scaling = 1;
1269         }
1270         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1271 }
1272
1273 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1274 {
1275         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1276                                       vcpu->arch.virtual_tsc_mult,
1277                                       vcpu->arch.virtual_tsc_shift);
1278         tsc += vcpu->arch.this_tsc_write;
1279         return tsc;
1280 }
1281
1282 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1283 {
1284 #ifdef CONFIG_X86_64
1285         bool vcpus_matched;
1286         struct kvm_arch *ka = &vcpu->kvm->arch;
1287         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1288
1289         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1290                          atomic_read(&vcpu->kvm->online_vcpus));
1291
1292         /*
1293          * Once the masterclock is enabled, always perform request in
1294          * order to update it.
1295          *
1296          * In order to enable masterclock, the host clocksource must be TSC
1297          * and the vcpus need to have matched TSCs.  When that happens,
1298          * perform request to enable masterclock.
1299          */
1300         if (ka->use_master_clock ||
1301             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1302                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1303
1304         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1305                             atomic_read(&vcpu->kvm->online_vcpus),
1306                             ka->use_master_clock, gtod->clock.vclock_mode);
1307 #endif
1308 }
1309
1310 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1311 {
1312         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1313         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1314 }
1315
1316 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1317 {
1318         struct kvm *kvm = vcpu->kvm;
1319         u64 offset, ns, elapsed;
1320         unsigned long flags;
1321         s64 usdiff;
1322         bool matched;
1323         bool already_matched;
1324         u64 data = msr->data;
1325
1326         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1327         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1328         ns = get_kernel_ns();
1329         elapsed = ns - kvm->arch.last_tsc_nsec;
1330
1331         if (vcpu->arch.virtual_tsc_khz) {
1332                 int faulted = 0;
1333
1334                 /* n.b - signed multiplication and division required */
1335                 usdiff = data - kvm->arch.last_tsc_write;
1336 #ifdef CONFIG_X86_64
1337                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1338 #else
1339                 /* do_div() only does unsigned */
1340                 asm("1: idivl %[divisor]\n"
1341                     "2: xor %%edx, %%edx\n"
1342                     "   movl $0, %[faulted]\n"
1343                     "3:\n"
1344                     ".section .fixup,\"ax\"\n"
1345                     "4: movl $1, %[faulted]\n"
1346                     "   jmp  3b\n"
1347                     ".previous\n"
1348
1349                 _ASM_EXTABLE(1b, 4b)
1350
1351                 : "=A"(usdiff), [faulted] "=r" (faulted)
1352                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1353
1354 #endif
1355                 do_div(elapsed, 1000);
1356                 usdiff -= elapsed;
1357                 if (usdiff < 0)
1358                         usdiff = -usdiff;
1359
1360                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1361                 if (faulted)
1362                         usdiff = USEC_PER_SEC;
1363         } else
1364                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1365
1366         /*
1367          * Special case: TSC write with a small delta (1 second) of virtual
1368          * cycle time against real time is interpreted as an attempt to
1369          * synchronize the CPU.
1370          *
1371          * For a reliable TSC, we can match TSC offsets, and for an unstable
1372          * TSC, we add elapsed time in this computation.  We could let the
1373          * compensation code attempt to catch up if we fall behind, but
1374          * it's better to try to match offsets from the beginning.
1375          */
1376         if (usdiff < USEC_PER_SEC &&
1377             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1378                 if (!check_tsc_unstable()) {
1379                         offset = kvm->arch.cur_tsc_offset;
1380                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1381                 } else {
1382                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1383                         data += delta;
1384                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1385                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1386                 }
1387                 matched = true;
1388                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1389         } else {
1390                 /*
1391                  * We split periods of matched TSC writes into generations.
1392                  * For each generation, we track the original measured
1393                  * nanosecond time, offset, and write, so if TSCs are in
1394                  * sync, we can match exact offset, and if not, we can match
1395                  * exact software computation in compute_guest_tsc()
1396                  *
1397                  * These values are tracked in kvm->arch.cur_xxx variables.
1398                  */
1399                 kvm->arch.cur_tsc_generation++;
1400                 kvm->arch.cur_tsc_nsec = ns;
1401                 kvm->arch.cur_tsc_write = data;
1402                 kvm->arch.cur_tsc_offset = offset;
1403                 matched = false;
1404                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1405                          kvm->arch.cur_tsc_generation, data);
1406         }
1407
1408         /*
1409          * We also track th most recent recorded KHZ, write and time to
1410          * allow the matching interval to be extended at each write.
1411          */
1412         kvm->arch.last_tsc_nsec = ns;
1413         kvm->arch.last_tsc_write = data;
1414         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1415
1416         vcpu->arch.last_guest_tsc = data;
1417
1418         /* Keep track of which generation this VCPU has synchronized to */
1419         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1420         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1421         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1422
1423         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1424                 update_ia32_tsc_adjust_msr(vcpu, offset);
1425         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1426         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1427
1428         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1429         if (!matched) {
1430                 kvm->arch.nr_vcpus_matched_tsc = 0;
1431         } else if (!already_matched) {
1432                 kvm->arch.nr_vcpus_matched_tsc++;
1433         }
1434
1435         kvm_track_tsc_matching(vcpu);
1436         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1437 }
1438
1439 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1440
1441 #ifdef CONFIG_X86_64
1442
1443 static cycle_t read_tsc(void)
1444 {
1445         cycle_t ret = (cycle_t)rdtsc_ordered();
1446         u64 last = pvclock_gtod_data.clock.cycle_last;
1447
1448         if (likely(ret >= last))
1449                 return ret;
1450
1451         /*
1452          * GCC likes to generate cmov here, but this branch is extremely
1453          * predictable (it's just a funciton of time and the likely is
1454          * very likely) and there's a data dependence, so force GCC
1455          * to generate a branch instead.  I don't barrier() because
1456          * we don't actually need a barrier, and if this function
1457          * ever gets inlined it will generate worse code.
1458          */
1459         asm volatile ("");
1460         return last;
1461 }
1462
1463 static inline u64 vgettsc(cycle_t *cycle_now)
1464 {
1465         long v;
1466         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1467
1468         *cycle_now = read_tsc();
1469
1470         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1471         return v * gtod->clock.mult;
1472 }
1473
1474 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1475 {
1476         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1477         unsigned long seq;
1478         int mode;
1479         u64 ns;
1480
1481         do {
1482                 seq = read_seqcount_begin(&gtod->seq);
1483                 mode = gtod->clock.vclock_mode;
1484                 ns = gtod->nsec_base;
1485                 ns += vgettsc(cycle_now);
1486                 ns >>= gtod->clock.shift;
1487                 ns += gtod->boot_ns;
1488         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1489         *t = ns;
1490
1491         return mode;
1492 }
1493
1494 /* returns true if host is using tsc clocksource */
1495 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1496 {
1497         /* checked again under seqlock below */
1498         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1499                 return false;
1500
1501         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1502 }
1503 #endif
1504
1505 /*
1506  *
1507  * Assuming a stable TSC across physical CPUS, and a stable TSC
1508  * across virtual CPUs, the following condition is possible.
1509  * Each numbered line represents an event visible to both
1510  * CPUs at the next numbered event.
1511  *
1512  * "timespecX" represents host monotonic time. "tscX" represents
1513  * RDTSC value.
1514  *
1515  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1516  *
1517  * 1.  read timespec0,tsc0
1518  * 2.                                   | timespec1 = timespec0 + N
1519  *                                      | tsc1 = tsc0 + M
1520  * 3. transition to guest               | transition to guest
1521  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1522  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1523  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1524  *
1525  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1526  *
1527  *      - ret0 < ret1
1528  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1529  *              ...
1530  *      - 0 < N - M => M < N
1531  *
1532  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1533  * always the case (the difference between two distinct xtime instances
1534  * might be smaller then the difference between corresponding TSC reads,
1535  * when updating guest vcpus pvclock areas).
1536  *
1537  * To avoid that problem, do not allow visibility of distinct
1538  * system_timestamp/tsc_timestamp values simultaneously: use a master
1539  * copy of host monotonic time values. Update that master copy
1540  * in lockstep.
1541  *
1542  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1543  *
1544  */
1545
1546 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1547 {
1548 #ifdef CONFIG_X86_64
1549         struct kvm_arch *ka = &kvm->arch;
1550         int vclock_mode;
1551         bool host_tsc_clocksource, vcpus_matched;
1552
1553         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1554                         atomic_read(&kvm->online_vcpus));
1555
1556         /*
1557          * If the host uses TSC clock, then passthrough TSC as stable
1558          * to the guest.
1559          */
1560         host_tsc_clocksource = kvm_get_time_and_clockread(
1561                                         &ka->master_kernel_ns,
1562                                         &ka->master_cycle_now);
1563
1564         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1565                                 && !backwards_tsc_observed
1566                                 && !ka->boot_vcpu_runs_old_kvmclock;
1567
1568         if (ka->use_master_clock)
1569                 atomic_set(&kvm_guest_has_master_clock, 1);
1570
1571         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1572         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1573                                         vcpus_matched);
1574 #endif
1575 }
1576
1577 static void kvm_gen_update_masterclock(struct kvm *kvm)
1578 {
1579 #ifdef CONFIG_X86_64
1580         int i;
1581         struct kvm_vcpu *vcpu;
1582         struct kvm_arch *ka = &kvm->arch;
1583
1584         spin_lock(&ka->pvclock_gtod_sync_lock);
1585         kvm_make_mclock_inprogress_request(kvm);
1586         /* no guest entries from this point */
1587         pvclock_update_vm_gtod_copy(kvm);
1588
1589         kvm_for_each_vcpu(i, vcpu, kvm)
1590                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1591
1592         /* guest entries allowed */
1593         kvm_for_each_vcpu(i, vcpu, kvm)
1594                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1595
1596         spin_unlock(&ka->pvclock_gtod_sync_lock);
1597 #endif
1598 }
1599
1600 static int kvm_guest_time_update(struct kvm_vcpu *v)
1601 {
1602         unsigned long flags, this_tsc_khz;
1603         struct kvm_vcpu_arch *vcpu = &v->arch;
1604         struct kvm_arch *ka = &v->kvm->arch;
1605         s64 kernel_ns;
1606         u64 tsc_timestamp, host_tsc;
1607         struct pvclock_vcpu_time_info guest_hv_clock;
1608         u8 pvclock_flags;
1609         bool use_master_clock;
1610
1611         kernel_ns = 0;
1612         host_tsc = 0;
1613
1614         /*
1615          * If the host uses TSC clock, then passthrough TSC as stable
1616          * to the guest.
1617          */
1618         spin_lock(&ka->pvclock_gtod_sync_lock);
1619         use_master_clock = ka->use_master_clock;
1620         if (use_master_clock) {
1621                 host_tsc = ka->master_cycle_now;
1622                 kernel_ns = ka->master_kernel_ns;
1623         }
1624         spin_unlock(&ka->pvclock_gtod_sync_lock);
1625
1626         /* Keep irq disabled to prevent changes to the clock */
1627         local_irq_save(flags);
1628         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1629         if (unlikely(this_tsc_khz == 0)) {
1630                 local_irq_restore(flags);
1631                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1632                 return 1;
1633         }
1634         if (!use_master_clock) {
1635                 host_tsc = rdtsc();
1636                 kernel_ns = get_kernel_ns();
1637         }
1638
1639         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1640
1641         /*
1642          * We may have to catch up the TSC to match elapsed wall clock
1643          * time for two reasons, even if kvmclock is used.
1644          *   1) CPU could have been running below the maximum TSC rate
1645          *   2) Broken TSC compensation resets the base at each VCPU
1646          *      entry to avoid unknown leaps of TSC even when running
1647          *      again on the same CPU.  This may cause apparent elapsed
1648          *      time to disappear, and the guest to stand still or run
1649          *      very slowly.
1650          */
1651         if (vcpu->tsc_catchup) {
1652                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1653                 if (tsc > tsc_timestamp) {
1654                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1655                         tsc_timestamp = tsc;
1656                 }
1657         }
1658
1659         local_irq_restore(flags);
1660
1661         if (!vcpu->pv_time_enabled)
1662                 return 0;
1663
1664         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1665                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1666                                    &vcpu->hv_clock.tsc_shift,
1667                                    &vcpu->hv_clock.tsc_to_system_mul);
1668                 vcpu->hw_tsc_khz = this_tsc_khz;
1669         }
1670
1671         /* With all the info we got, fill in the values */
1672         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1673         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1674         vcpu->last_guest_tsc = tsc_timestamp;
1675
1676         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1677                 &guest_hv_clock, sizeof(guest_hv_clock))))
1678                 return 0;
1679
1680         /* This VCPU is paused, but it's legal for a guest to read another
1681          * VCPU's kvmclock, so we really have to follow the specification where
1682          * it says that version is odd if data is being modified, and even after
1683          * it is consistent.
1684          *
1685          * Version field updates must be kept separate.  This is because
1686          * kvm_write_guest_cached might use a "rep movs" instruction, and
1687          * writes within a string instruction are weakly ordered.  So there
1688          * are three writes overall.
1689          *
1690          * As a small optimization, only write the version field in the first
1691          * and third write.  The vcpu->pv_time cache is still valid, because the
1692          * version field is the first in the struct.
1693          */
1694         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1695
1696         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1697         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1698                                 &vcpu->hv_clock,
1699                                 sizeof(vcpu->hv_clock.version));
1700
1701         smp_wmb();
1702
1703         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1704         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1705
1706         if (vcpu->pvclock_set_guest_stopped_request) {
1707                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1708                 vcpu->pvclock_set_guest_stopped_request = false;
1709         }
1710
1711         pvclock_flags |= PVCLOCK_COUNTS_FROM_ZERO;
1712
1713         /* If the host uses TSC clocksource, then it is stable */
1714         if (use_master_clock)
1715                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1716
1717         vcpu->hv_clock.flags = pvclock_flags;
1718
1719         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1720
1721         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1722                                 &vcpu->hv_clock,
1723                                 sizeof(vcpu->hv_clock));
1724
1725         smp_wmb();
1726
1727         vcpu->hv_clock.version++;
1728         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1729                                 &vcpu->hv_clock,
1730                                 sizeof(vcpu->hv_clock.version));
1731         return 0;
1732 }
1733
1734 /*
1735  * kvmclock updates which are isolated to a given vcpu, such as
1736  * vcpu->cpu migration, should not allow system_timestamp from
1737  * the rest of the vcpus to remain static. Otherwise ntp frequency
1738  * correction applies to one vcpu's system_timestamp but not
1739  * the others.
1740  *
1741  * So in those cases, request a kvmclock update for all vcpus.
1742  * We need to rate-limit these requests though, as they can
1743  * considerably slow guests that have a large number of vcpus.
1744  * The time for a remote vcpu to update its kvmclock is bound
1745  * by the delay we use to rate-limit the updates.
1746  */
1747
1748 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1749
1750 static void kvmclock_update_fn(struct work_struct *work)
1751 {
1752         int i;
1753         struct delayed_work *dwork = to_delayed_work(work);
1754         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1755                                            kvmclock_update_work);
1756         struct kvm *kvm = container_of(ka, struct kvm, arch);
1757         struct kvm_vcpu *vcpu;
1758
1759         kvm_for_each_vcpu(i, vcpu, kvm) {
1760                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1761                 kvm_vcpu_kick(vcpu);
1762         }
1763 }
1764
1765 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1766 {
1767         struct kvm *kvm = v->kvm;
1768
1769         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1770         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1771                                         KVMCLOCK_UPDATE_DELAY);
1772 }
1773
1774 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1775
1776 static void kvmclock_sync_fn(struct work_struct *work)
1777 {
1778         struct delayed_work *dwork = to_delayed_work(work);
1779         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1780                                            kvmclock_sync_work);
1781         struct kvm *kvm = container_of(ka, struct kvm, arch);
1782
1783         if (!kvmclock_periodic_sync)
1784                 return;
1785
1786         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1787         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1788                                         KVMCLOCK_SYNC_PERIOD);
1789 }
1790
1791 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1792 {
1793         u64 mcg_cap = vcpu->arch.mcg_cap;
1794         unsigned bank_num = mcg_cap & 0xff;
1795
1796         switch (msr) {
1797         case MSR_IA32_MCG_STATUS:
1798                 vcpu->arch.mcg_status = data;
1799                 break;
1800         case MSR_IA32_MCG_CTL:
1801                 if (!(mcg_cap & MCG_CTL_P))
1802                         return 1;
1803                 if (data != 0 && data != ~(u64)0)
1804                         return -1;
1805                 vcpu->arch.mcg_ctl = data;
1806                 break;
1807         default:
1808                 if (msr >= MSR_IA32_MC0_CTL &&
1809                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1810                         u32 offset = msr - MSR_IA32_MC0_CTL;
1811                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1812                          * some Linux kernels though clear bit 10 in bank 4 to
1813                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1814                          * this to avoid an uncatched #GP in the guest
1815                          */
1816                         if ((offset & 0x3) == 0 &&
1817                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1818                                 return -1;
1819                         vcpu->arch.mce_banks[offset] = data;
1820                         break;
1821                 }
1822                 return 1;
1823         }
1824         return 0;
1825 }
1826
1827 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1828 {
1829         struct kvm *kvm = vcpu->kvm;
1830         int lm = is_long_mode(vcpu);
1831         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1832                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1833         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1834                 : kvm->arch.xen_hvm_config.blob_size_32;
1835         u32 page_num = data & ~PAGE_MASK;
1836         u64 page_addr = data & PAGE_MASK;
1837         u8 *page;
1838         int r;
1839
1840         r = -E2BIG;
1841         if (page_num >= blob_size)
1842                 goto out;
1843         r = -ENOMEM;
1844         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1845         if (IS_ERR(page)) {
1846                 r = PTR_ERR(page);
1847                 goto out;
1848         }
1849         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1850                 goto out_free;
1851         r = 0;
1852 out_free:
1853         kfree(page);
1854 out:
1855         return r;
1856 }
1857
1858 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1859 {
1860         gpa_t gpa = data & ~0x3f;
1861
1862         /* Bits 2:5 are reserved, Should be zero */
1863         if (data & 0x3c)
1864                 return 1;
1865
1866         vcpu->arch.apf.msr_val = data;
1867
1868         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1869                 kvm_clear_async_pf_completion_queue(vcpu);
1870                 kvm_async_pf_hash_reset(vcpu);
1871                 return 0;
1872         }
1873
1874         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1875                                         sizeof(u32)))
1876                 return 1;
1877
1878         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1879         kvm_async_pf_wakeup_all(vcpu);
1880         return 0;
1881 }
1882
1883 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1884 {
1885         vcpu->arch.pv_time_enabled = false;
1886 }
1887
1888 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1889 {
1890         u64 delta;
1891
1892         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1893                 return;
1894
1895         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1896         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1897         vcpu->arch.st.accum_steal = delta;
1898 }
1899
1900 static void record_steal_time(struct kvm_vcpu *vcpu)
1901 {
1902         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1903                 return;
1904
1905         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1906                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1907                 return;
1908
1909         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1910         vcpu->arch.st.steal.version += 2;
1911         vcpu->arch.st.accum_steal = 0;
1912
1913         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1914                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1915 }
1916
1917 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1918 {
1919         bool pr = false;
1920         u32 msr = msr_info->index;
1921         u64 data = msr_info->data;
1922
1923         switch (msr) {
1924         case MSR_AMD64_NB_CFG:
1925         case MSR_IA32_UCODE_REV:
1926         case MSR_IA32_UCODE_WRITE:
1927         case MSR_VM_HSAVE_PA:
1928         case MSR_AMD64_PATCH_LOADER:
1929         case MSR_AMD64_BU_CFG2:
1930                 break;
1931
1932         case MSR_EFER:
1933                 return set_efer(vcpu, data);
1934         case MSR_K7_HWCR:
1935                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1936                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1937                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1938                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1939                 if (data != 0) {
1940                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1941                                     data);
1942                         return 1;
1943                 }
1944                 break;
1945         case MSR_FAM10H_MMIO_CONF_BASE:
1946                 if (data != 0) {
1947                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1948                                     "0x%llx\n", data);
1949                         return 1;
1950                 }
1951                 break;
1952         case MSR_IA32_DEBUGCTLMSR:
1953                 if (!data) {
1954                         /* We support the non-activated case already */
1955                         break;
1956                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1957                         /* Values other than LBR and BTF are vendor-specific,
1958                            thus reserved and should throw a #GP */
1959                         return 1;
1960                 }
1961                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1962                             __func__, data);
1963                 break;
1964         case 0x200 ... 0x2ff:
1965                 return kvm_mtrr_set_msr(vcpu, msr, data);
1966         case MSR_IA32_APICBASE:
1967                 return kvm_set_apic_base(vcpu, msr_info);
1968         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1969                 return kvm_x2apic_msr_write(vcpu, msr, data);
1970         case MSR_IA32_TSCDEADLINE:
1971                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1972                 break;
1973         case MSR_IA32_TSC_ADJUST:
1974                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1975                         if (!msr_info->host_initiated) {
1976                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1977                                 adjust_tsc_offset_guest(vcpu, adj);
1978                         }
1979                         vcpu->arch.ia32_tsc_adjust_msr = data;
1980                 }
1981                 break;
1982         case MSR_IA32_MISC_ENABLE:
1983                 vcpu->arch.ia32_misc_enable_msr = data;
1984                 break;
1985         case MSR_IA32_SMBASE:
1986                 if (!msr_info->host_initiated)
1987                         return 1;
1988                 vcpu->arch.smbase = data;
1989                 break;
1990         case MSR_KVM_WALL_CLOCK_NEW:
1991         case MSR_KVM_WALL_CLOCK:
1992                 vcpu->kvm->arch.wall_clock = data;
1993                 kvm_write_wall_clock(vcpu->kvm, data);
1994                 break;
1995         case MSR_KVM_SYSTEM_TIME_NEW:
1996         case MSR_KVM_SYSTEM_TIME: {
1997                 u64 gpa_offset;
1998                 struct kvm_arch *ka = &vcpu->kvm->arch;
1999
2000                 kvmclock_reset(vcpu);
2001
2002                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2003                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2004
2005                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2006                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2007                                         &vcpu->requests);
2008
2009                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2010
2011                         ka->kvmclock_offset = -get_kernel_ns();
2012                 }
2013
2014                 vcpu->arch.time = data;
2015                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2016
2017                 /* we verify if the enable bit is set... */
2018                 if (!(data & 1))
2019                         break;
2020
2021                 gpa_offset = data & ~(PAGE_MASK | 1);
2022
2023                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2024                      &vcpu->arch.pv_time, data & ~1ULL,
2025                      sizeof(struct pvclock_vcpu_time_info)))
2026                         vcpu->arch.pv_time_enabled = false;
2027                 else
2028                         vcpu->arch.pv_time_enabled = true;
2029
2030                 break;
2031         }
2032         case MSR_KVM_ASYNC_PF_EN:
2033                 if (kvm_pv_enable_async_pf(vcpu, data))
2034                         return 1;
2035                 break;
2036         case MSR_KVM_STEAL_TIME:
2037
2038                 if (unlikely(!sched_info_on()))
2039                         return 1;
2040
2041                 if (data & KVM_STEAL_RESERVED_MASK)
2042                         return 1;
2043
2044                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2045                                                 data & KVM_STEAL_VALID_BITS,
2046                                                 sizeof(struct kvm_steal_time)))
2047                         return 1;
2048
2049                 vcpu->arch.st.msr_val = data;
2050
2051                 if (!(data & KVM_MSR_ENABLED))
2052                         break;
2053
2054                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2055
2056                 preempt_disable();
2057                 accumulate_steal_time(vcpu);
2058                 preempt_enable();
2059
2060                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2061
2062                 break;
2063         case MSR_KVM_PV_EOI_EN:
2064                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2065                         return 1;
2066                 break;
2067
2068         case MSR_IA32_MCG_CTL:
2069         case MSR_IA32_MCG_STATUS:
2070         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2071                 return set_msr_mce(vcpu, msr, data);
2072
2073         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2074         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2075                 pr = true; /* fall through */
2076         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2077         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2078                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2079                         return kvm_pmu_set_msr(vcpu, msr_info);
2080
2081                 if (pr || data != 0)
2082                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2083                                     "0x%x data 0x%llx\n", msr, data);
2084                 break;
2085         case MSR_K7_CLK_CTL:
2086                 /*
2087                  * Ignore all writes to this no longer documented MSR.
2088                  * Writes are only relevant for old K7 processors,
2089                  * all pre-dating SVM, but a recommended workaround from
2090                  * AMD for these chips. It is possible to specify the
2091                  * affected processor models on the command line, hence
2092                  * the need to ignore the workaround.
2093                  */
2094                 break;
2095         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2096         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2097         case HV_X64_MSR_CRASH_CTL:
2098                 return kvm_hv_set_msr_common(vcpu, msr, data,
2099                                              msr_info->host_initiated);
2100         case MSR_IA32_BBL_CR_CTL3:
2101                 /* Drop writes to this legacy MSR -- see rdmsr
2102                  * counterpart for further detail.
2103                  */
2104                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2105                 break;
2106         case MSR_AMD64_OSVW_ID_LENGTH:
2107                 if (!guest_cpuid_has_osvw(vcpu))
2108                         return 1;
2109                 vcpu->arch.osvw.length = data;
2110                 break;
2111         case MSR_AMD64_OSVW_STATUS:
2112                 if (!guest_cpuid_has_osvw(vcpu))
2113                         return 1;
2114                 vcpu->arch.osvw.status = data;
2115                 break;
2116         default:
2117                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2118                         return xen_hvm_config(vcpu, data);
2119                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2120                         return kvm_pmu_set_msr(vcpu, msr_info);
2121                 if (!ignore_msrs) {
2122                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2123                                     msr, data);
2124                         return 1;
2125                 } else {
2126                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2127                                     msr, data);
2128                         break;
2129                 }
2130         }
2131         return 0;
2132 }
2133 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2134
2135
2136 /*
2137  * Reads an msr value (of 'msr_index') into 'pdata'.
2138  * Returns 0 on success, non-0 otherwise.
2139  * Assumes vcpu_load() was already called.
2140  */
2141 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2142 {
2143         return kvm_x86_ops->get_msr(vcpu, msr);
2144 }
2145 EXPORT_SYMBOL_GPL(kvm_get_msr);
2146
2147 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2148 {
2149         u64 data;
2150         u64 mcg_cap = vcpu->arch.mcg_cap;
2151         unsigned bank_num = mcg_cap & 0xff;
2152
2153         switch (msr) {
2154         case MSR_IA32_P5_MC_ADDR:
2155         case MSR_IA32_P5_MC_TYPE:
2156                 data = 0;
2157                 break;
2158         case MSR_IA32_MCG_CAP:
2159                 data = vcpu->arch.mcg_cap;
2160                 break;
2161         case MSR_IA32_MCG_CTL:
2162                 if (!(mcg_cap & MCG_CTL_P))
2163                         return 1;
2164                 data = vcpu->arch.mcg_ctl;
2165                 break;
2166         case MSR_IA32_MCG_STATUS:
2167                 data = vcpu->arch.mcg_status;
2168                 break;
2169         default:
2170                 if (msr >= MSR_IA32_MC0_CTL &&
2171                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2172                         u32 offset = msr - MSR_IA32_MC0_CTL;
2173                         data = vcpu->arch.mce_banks[offset];
2174                         break;
2175                 }
2176                 return 1;
2177         }
2178         *pdata = data;
2179         return 0;
2180 }
2181
2182 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2183 {
2184         switch (msr_info->index) {
2185         case MSR_IA32_PLATFORM_ID:
2186         case MSR_IA32_EBL_CR_POWERON:
2187         case MSR_IA32_DEBUGCTLMSR:
2188         case MSR_IA32_LASTBRANCHFROMIP:
2189         case MSR_IA32_LASTBRANCHTOIP:
2190         case MSR_IA32_LASTINTFROMIP:
2191         case MSR_IA32_LASTINTTOIP:
2192         case MSR_K8_SYSCFG:
2193         case MSR_K8_TSEG_ADDR:
2194         case MSR_K8_TSEG_MASK:
2195         case MSR_K7_HWCR:
2196         case MSR_VM_HSAVE_PA:
2197         case MSR_K8_INT_PENDING_MSG:
2198         case MSR_AMD64_NB_CFG:
2199         case MSR_FAM10H_MMIO_CONF_BASE:
2200         case MSR_AMD64_BU_CFG2:
2201                 msr_info->data = 0;
2202                 break;
2203         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2204         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2205         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2206         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2207                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2208                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2209                 msr_info->data = 0;
2210                 break;
2211         case MSR_IA32_UCODE_REV:
2212                 msr_info->data = 0x100000000ULL;
2213                 break;
2214         case MSR_MTRRcap:
2215         case 0x200 ... 0x2ff:
2216                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2217         case 0xcd: /* fsb frequency */
2218                 msr_info->data = 3;
2219                 break;
2220                 /*
2221                  * MSR_EBC_FREQUENCY_ID
2222                  * Conservative value valid for even the basic CPU models.
2223                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2224                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2225                  * and 266MHz for model 3, or 4. Set Core Clock
2226                  * Frequency to System Bus Frequency Ratio to 1 (bits
2227                  * 31:24) even though these are only valid for CPU
2228                  * models > 2, however guests may end up dividing or
2229                  * multiplying by zero otherwise.
2230                  */
2231         case MSR_EBC_FREQUENCY_ID:
2232                 msr_info->data = 1 << 24;
2233                 break;
2234         case MSR_IA32_APICBASE:
2235                 msr_info->data = kvm_get_apic_base(vcpu);
2236                 break;
2237         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2238                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2239                 break;
2240         case MSR_IA32_TSCDEADLINE:
2241                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2242                 break;
2243         case MSR_IA32_TSC_ADJUST:
2244                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2245                 break;
2246         case MSR_IA32_MISC_ENABLE:
2247                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2248                 break;
2249         case MSR_IA32_SMBASE:
2250                 if (!msr_info->host_initiated)
2251                         return 1;
2252                 msr_info->data = vcpu->arch.smbase;
2253                 break;
2254         case MSR_IA32_PERF_STATUS:
2255                 /* TSC increment by tick */
2256                 msr_info->data = 1000ULL;
2257                 /* CPU multiplier */
2258                 msr_info->data |= (((uint64_t)4ULL) << 40);
2259                 break;
2260         case MSR_EFER:
2261                 msr_info->data = vcpu->arch.efer;
2262                 break;
2263         case MSR_KVM_WALL_CLOCK:
2264         case MSR_KVM_WALL_CLOCK_NEW:
2265                 msr_info->data = vcpu->kvm->arch.wall_clock;
2266                 break;
2267         case MSR_KVM_SYSTEM_TIME:
2268         case MSR_KVM_SYSTEM_TIME_NEW:
2269                 msr_info->data = vcpu->arch.time;
2270                 break;
2271         case MSR_KVM_ASYNC_PF_EN:
2272                 msr_info->data = vcpu->arch.apf.msr_val;
2273                 break;
2274         case MSR_KVM_STEAL_TIME:
2275                 msr_info->data = vcpu->arch.st.msr_val;
2276                 break;
2277         case MSR_KVM_PV_EOI_EN:
2278                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2279                 break;
2280         case MSR_IA32_P5_MC_ADDR:
2281         case MSR_IA32_P5_MC_TYPE:
2282         case MSR_IA32_MCG_CAP:
2283         case MSR_IA32_MCG_CTL:
2284         case MSR_IA32_MCG_STATUS:
2285         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2286                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2287         case MSR_K7_CLK_CTL:
2288                 /*
2289                  * Provide expected ramp-up count for K7. All other
2290                  * are set to zero, indicating minimum divisors for
2291                  * every field.
2292                  *
2293                  * This prevents guest kernels on AMD host with CPU
2294                  * type 6, model 8 and higher from exploding due to
2295                  * the rdmsr failing.
2296                  */
2297                 msr_info->data = 0x20000000;
2298                 break;
2299         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2300         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2301         case HV_X64_MSR_CRASH_CTL:
2302                 return kvm_hv_get_msr_common(vcpu,
2303                                              msr_info->index, &msr_info->data);
2304                 break;
2305         case MSR_IA32_BBL_CR_CTL3:
2306                 /* This legacy MSR exists but isn't fully documented in current
2307                  * silicon.  It is however accessed by winxp in very narrow
2308                  * scenarios where it sets bit #19, itself documented as
2309                  * a "reserved" bit.  Best effort attempt to source coherent
2310                  * read data here should the balance of the register be
2311                  * interpreted by the guest:
2312                  *
2313                  * L2 cache control register 3: 64GB range, 256KB size,
2314                  * enabled, latency 0x1, configured
2315                  */
2316                 msr_info->data = 0xbe702111;
2317                 break;
2318         case MSR_AMD64_OSVW_ID_LENGTH:
2319                 if (!guest_cpuid_has_osvw(vcpu))
2320                         return 1;
2321                 msr_info->data = vcpu->arch.osvw.length;
2322                 break;
2323         case MSR_AMD64_OSVW_STATUS:
2324                 if (!guest_cpuid_has_osvw(vcpu))
2325                         return 1;
2326                 msr_info->data = vcpu->arch.osvw.status;
2327                 break;
2328         default:
2329                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2330                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2331                 if (!ignore_msrs) {
2332                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2333                         return 1;
2334                 } else {
2335                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2336                         msr_info->data = 0;
2337                 }
2338                 break;
2339         }
2340         return 0;
2341 }
2342 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2343
2344 /*
2345  * Read or write a bunch of msrs. All parameters are kernel addresses.
2346  *
2347  * @return number of msrs set successfully.
2348  */
2349 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2350                     struct kvm_msr_entry *entries,
2351                     int (*do_msr)(struct kvm_vcpu *vcpu,
2352                                   unsigned index, u64 *data))
2353 {
2354         int i, idx;
2355
2356         idx = srcu_read_lock(&vcpu->kvm->srcu);
2357         for (i = 0; i < msrs->nmsrs; ++i)
2358                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2359                         break;
2360         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2361
2362         return i;
2363 }
2364
2365 /*
2366  * Read or write a bunch of msrs. Parameters are user addresses.
2367  *
2368  * @return number of msrs set successfully.
2369  */
2370 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2371                   int (*do_msr)(struct kvm_vcpu *vcpu,
2372                                 unsigned index, u64 *data),
2373                   int writeback)
2374 {
2375         struct kvm_msrs msrs;
2376         struct kvm_msr_entry *entries;
2377         int r, n;
2378         unsigned size;
2379
2380         r = -EFAULT;
2381         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2382                 goto out;
2383
2384         r = -E2BIG;
2385         if (msrs.nmsrs >= MAX_IO_MSRS)
2386                 goto out;
2387
2388         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2389         entries = memdup_user(user_msrs->entries, size);
2390         if (IS_ERR(entries)) {
2391                 r = PTR_ERR(entries);
2392                 goto out;
2393         }
2394
2395         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2396         if (r < 0)
2397                 goto out_free;
2398
2399         r = -EFAULT;
2400         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2401                 goto out_free;
2402
2403         r = n;
2404
2405 out_free:
2406         kfree(entries);
2407 out:
2408         return r;
2409 }
2410
2411 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2412 {
2413         int r;
2414
2415         switch (ext) {
2416         case KVM_CAP_IRQCHIP:
2417         case KVM_CAP_HLT:
2418         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2419         case KVM_CAP_SET_TSS_ADDR:
2420         case KVM_CAP_EXT_CPUID:
2421         case KVM_CAP_EXT_EMUL_CPUID:
2422         case KVM_CAP_CLOCKSOURCE:
2423         case KVM_CAP_PIT:
2424         case KVM_CAP_NOP_IO_DELAY:
2425         case KVM_CAP_MP_STATE:
2426         case KVM_CAP_SYNC_MMU:
2427         case KVM_CAP_USER_NMI:
2428         case KVM_CAP_REINJECT_CONTROL:
2429         case KVM_CAP_IRQ_INJECT_STATUS:
2430         case KVM_CAP_IOEVENTFD:
2431         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2432         case KVM_CAP_PIT2:
2433         case KVM_CAP_PIT_STATE2:
2434         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2435         case KVM_CAP_XEN_HVM:
2436         case KVM_CAP_ADJUST_CLOCK:
2437         case KVM_CAP_VCPU_EVENTS:
2438         case KVM_CAP_HYPERV:
2439         case KVM_CAP_HYPERV_VAPIC:
2440         case KVM_CAP_HYPERV_SPIN:
2441         case KVM_CAP_PCI_SEGMENT:
2442         case KVM_CAP_DEBUGREGS:
2443         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2444         case KVM_CAP_XSAVE:
2445         case KVM_CAP_ASYNC_PF:
2446         case KVM_CAP_GET_TSC_KHZ:
2447         case KVM_CAP_KVMCLOCK_CTRL:
2448         case KVM_CAP_READONLY_MEM:
2449         case KVM_CAP_HYPERV_TIME:
2450         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2451         case KVM_CAP_TSC_DEADLINE_TIMER:
2452         case KVM_CAP_ENABLE_CAP_VM:
2453         case KVM_CAP_DISABLE_QUIRKS:
2454         case KVM_CAP_SET_BOOT_CPU_ID:
2455 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2456         case KVM_CAP_ASSIGN_DEV_IRQ:
2457         case KVM_CAP_PCI_2_3:
2458 #endif
2459                 r = 1;
2460                 break;
2461         case KVM_CAP_X86_SMM:
2462                 /* SMBASE is usually relocated above 1M on modern chipsets,
2463                  * and SMM handlers might indeed rely on 4G segment limits,
2464                  * so do not report SMM to be available if real mode is
2465                  * emulated via vm86 mode.  Still, do not go to great lengths
2466                  * to avoid userspace's usage of the feature, because it is a
2467                  * fringe case that is not enabled except via specific settings
2468                  * of the module parameters.
2469                  */
2470                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2471                 break;
2472         case KVM_CAP_COALESCED_MMIO:
2473                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2474                 break;
2475         case KVM_CAP_VAPIC:
2476                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2477                 break;
2478         case KVM_CAP_NR_VCPUS:
2479                 r = KVM_SOFT_MAX_VCPUS;
2480                 break;
2481         case KVM_CAP_MAX_VCPUS:
2482                 r = KVM_MAX_VCPUS;
2483                 break;
2484         case KVM_CAP_NR_MEMSLOTS:
2485                 r = KVM_USER_MEM_SLOTS;
2486                 break;
2487         case KVM_CAP_PV_MMU:    /* obsolete */
2488                 r = 0;
2489                 break;
2490 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2491         case KVM_CAP_IOMMU:
2492                 r = iommu_present(&pci_bus_type);
2493                 break;
2494 #endif
2495         case KVM_CAP_MCE:
2496                 r = KVM_MAX_MCE_BANKS;
2497                 break;
2498         case KVM_CAP_XCRS:
2499                 r = cpu_has_xsave;
2500                 break;
2501         case KVM_CAP_TSC_CONTROL:
2502                 r = kvm_has_tsc_control;
2503                 break;
2504         default:
2505                 r = 0;
2506                 break;
2507         }
2508         return r;
2509
2510 }
2511
2512 long kvm_arch_dev_ioctl(struct file *filp,
2513                         unsigned int ioctl, unsigned long arg)
2514 {
2515         void __user *argp = (void __user *)arg;
2516         long r;
2517
2518         switch (ioctl) {
2519         case KVM_GET_MSR_INDEX_LIST: {
2520                 struct kvm_msr_list __user *user_msr_list = argp;
2521                 struct kvm_msr_list msr_list;
2522                 unsigned n;
2523
2524                 r = -EFAULT;
2525                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2526                         goto out;
2527                 n = msr_list.nmsrs;
2528                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2529                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2530                         goto out;
2531                 r = -E2BIG;
2532                 if (n < msr_list.nmsrs)
2533                         goto out;
2534                 r = -EFAULT;
2535                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2536                                  num_msrs_to_save * sizeof(u32)))
2537                         goto out;
2538                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2539                                  &emulated_msrs,
2540                                  num_emulated_msrs * sizeof(u32)))
2541                         goto out;
2542                 r = 0;
2543                 break;
2544         }
2545         case KVM_GET_SUPPORTED_CPUID:
2546         case KVM_GET_EMULATED_CPUID: {
2547                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2548                 struct kvm_cpuid2 cpuid;
2549
2550                 r = -EFAULT;
2551                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2552                         goto out;
2553
2554                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2555                                             ioctl);
2556                 if (r)
2557                         goto out;
2558
2559                 r = -EFAULT;
2560                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2561                         goto out;
2562                 r = 0;
2563                 break;
2564         }
2565         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2566                 u64 mce_cap;
2567
2568                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2569                 r = -EFAULT;
2570                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2571                         goto out;
2572                 r = 0;
2573                 break;
2574         }
2575         default:
2576                 r = -EINVAL;
2577         }
2578 out:
2579         return r;
2580 }
2581
2582 static void wbinvd_ipi(void *garbage)
2583 {
2584         wbinvd();
2585 }
2586
2587 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2588 {
2589         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2590 }
2591
2592 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2593 {
2594         /* Address WBINVD may be executed by guest */
2595         if (need_emulate_wbinvd(vcpu)) {
2596                 if (kvm_x86_ops->has_wbinvd_exit())
2597                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2598                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2599                         smp_call_function_single(vcpu->cpu,
2600                                         wbinvd_ipi, NULL, 1);
2601         }
2602
2603         kvm_x86_ops->vcpu_load(vcpu, cpu);
2604
2605         /* Apply any externally detected TSC adjustments (due to suspend) */
2606         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2607                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2608                 vcpu->arch.tsc_offset_adjustment = 0;
2609                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2610         }
2611
2612         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2613                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2614                                 rdtsc() - vcpu->arch.last_host_tsc;
2615                 if (tsc_delta < 0)
2616                         mark_tsc_unstable("KVM discovered backwards TSC");
2617                 if (check_tsc_unstable()) {
2618                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2619                                                 vcpu->arch.last_guest_tsc);
2620                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2621                         vcpu->arch.tsc_catchup = 1;
2622                 }
2623                 /*
2624                  * On a host with synchronized TSC, there is no need to update
2625                  * kvmclock on vcpu->cpu migration
2626                  */
2627                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2628                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2629                 if (vcpu->cpu != cpu)
2630                         kvm_migrate_timers(vcpu);
2631                 vcpu->cpu = cpu;
2632         }
2633
2634         accumulate_steal_time(vcpu);
2635         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2636 }
2637
2638 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2639 {
2640         kvm_x86_ops->vcpu_put(vcpu);
2641         kvm_put_guest_fpu(vcpu);
2642         vcpu->arch.last_host_tsc = rdtsc();
2643 }
2644
2645 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2646                                     struct kvm_lapic_state *s)
2647 {
2648         kvm_x86_ops->sync_pir_to_irr(vcpu);
2649         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2650
2651         return 0;
2652 }
2653
2654 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2655                                     struct kvm_lapic_state *s)
2656 {
2657         kvm_apic_post_state_restore(vcpu, s);
2658         update_cr8_intercept(vcpu);
2659
2660         return 0;
2661 }
2662
2663 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2664                                     struct kvm_interrupt *irq)
2665 {
2666         if (irq->irq >= KVM_NR_INTERRUPTS)
2667                 return -EINVAL;
2668         if (irqchip_in_kernel(vcpu->kvm))
2669                 return -ENXIO;
2670
2671         kvm_queue_interrupt(vcpu, irq->irq, false);
2672         kvm_make_request(KVM_REQ_EVENT, vcpu);
2673
2674         return 0;
2675 }
2676
2677 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2678 {
2679         kvm_inject_nmi(vcpu);
2680
2681         return 0;
2682 }
2683
2684 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2685 {
2686         kvm_make_request(KVM_REQ_SMI, vcpu);
2687
2688         return 0;
2689 }
2690
2691 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2692                                            struct kvm_tpr_access_ctl *tac)
2693 {
2694         if (tac->flags)
2695                 return -EINVAL;
2696         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2697         return 0;
2698 }
2699
2700 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2701                                         u64 mcg_cap)
2702 {
2703         int r;
2704         unsigned bank_num = mcg_cap & 0xff, bank;
2705
2706         r = -EINVAL;
2707         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2708                 goto out;
2709         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2710                 goto out;
2711         r = 0;
2712         vcpu->arch.mcg_cap = mcg_cap;
2713         /* Init IA32_MCG_CTL to all 1s */
2714         if (mcg_cap & MCG_CTL_P)
2715                 vcpu->arch.mcg_ctl = ~(u64)0;
2716         /* Init IA32_MCi_CTL to all 1s */
2717         for (bank = 0; bank < bank_num; bank++)
2718                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2719 out:
2720         return r;
2721 }
2722
2723 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2724                                       struct kvm_x86_mce *mce)
2725 {
2726         u64 mcg_cap = vcpu->arch.mcg_cap;
2727         unsigned bank_num = mcg_cap & 0xff;
2728         u64 *banks = vcpu->arch.mce_banks;
2729
2730         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2731                 return -EINVAL;
2732         /*
2733          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2734          * reporting is disabled
2735          */
2736         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2737             vcpu->arch.mcg_ctl != ~(u64)0)
2738                 return 0;
2739         banks += 4 * mce->bank;
2740         /*
2741          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2742          * reporting is disabled for the bank
2743          */
2744         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2745                 return 0;
2746         if (mce->status & MCI_STATUS_UC) {
2747                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2748                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2749                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2750                         return 0;
2751                 }
2752                 if (banks[1] & MCI_STATUS_VAL)
2753                         mce->status |= MCI_STATUS_OVER;
2754                 banks[2] = mce->addr;
2755                 banks[3] = mce->misc;
2756                 vcpu->arch.mcg_status = mce->mcg_status;
2757                 banks[1] = mce->status;
2758                 kvm_queue_exception(vcpu, MC_VECTOR);
2759         } else if (!(banks[1] & MCI_STATUS_VAL)
2760                    || !(banks[1] & MCI_STATUS_UC)) {
2761                 if (banks[1] & MCI_STATUS_VAL)
2762                         mce->status |= MCI_STATUS_OVER;
2763                 banks[2] = mce->addr;
2764                 banks[3] = mce->misc;
2765                 banks[1] = mce->status;
2766         } else
2767                 banks[1] |= MCI_STATUS_OVER;
2768         return 0;
2769 }
2770
2771 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2772                                                struct kvm_vcpu_events *events)
2773 {
2774         process_nmi(vcpu);
2775         events->exception.injected =
2776                 vcpu->arch.exception.pending &&
2777                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2778         events->exception.nr = vcpu->arch.exception.nr;
2779         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2780         events->exception.pad = 0;
2781         events->exception.error_code = vcpu->arch.exception.error_code;
2782
2783         events->interrupt.injected =
2784                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2785         events->interrupt.nr = vcpu->arch.interrupt.nr;
2786         events->interrupt.soft = 0;
2787         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2788
2789         events->nmi.injected = vcpu->arch.nmi_injected;
2790         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2791         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2792         events->nmi.pad = 0;
2793
2794         events->sipi_vector = 0; /* never valid when reporting to user space */
2795
2796         events->smi.smm = is_smm(vcpu);
2797         events->smi.pending = vcpu->arch.smi_pending;
2798         events->smi.smm_inside_nmi =
2799                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2800         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2801
2802         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2803                          | KVM_VCPUEVENT_VALID_SHADOW
2804                          | KVM_VCPUEVENT_VALID_SMM);
2805         memset(&events->reserved, 0, sizeof(events->reserved));
2806 }
2807
2808 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2809                                               struct kvm_vcpu_events *events)
2810 {
2811         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2812                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2813                               | KVM_VCPUEVENT_VALID_SHADOW
2814                               | KVM_VCPUEVENT_VALID_SMM))
2815                 return -EINVAL;
2816
2817         process_nmi(vcpu);
2818         vcpu->arch.exception.pending = events->exception.injected;
2819         vcpu->arch.exception.nr = events->exception.nr;
2820         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2821         vcpu->arch.exception.error_code = events->exception.error_code;
2822
2823         vcpu->arch.interrupt.pending = events->interrupt.injected;
2824         vcpu->arch.interrupt.nr = events->interrupt.nr;
2825         vcpu->arch.interrupt.soft = events->interrupt.soft;
2826         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2827                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2828                                                   events->interrupt.shadow);
2829
2830         vcpu->arch.nmi_injected = events->nmi.injected;
2831         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2832                 vcpu->arch.nmi_pending = events->nmi.pending;
2833         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2834
2835         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2836             kvm_vcpu_has_lapic(vcpu))
2837                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2838
2839         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2840                 if (events->smi.smm)
2841                         vcpu->arch.hflags |= HF_SMM_MASK;
2842                 else
2843                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2844                 vcpu->arch.smi_pending = events->smi.pending;
2845                 if (events->smi.smm_inside_nmi)
2846                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2847                 else
2848                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2849                 if (kvm_vcpu_has_lapic(vcpu)) {
2850                         if (events->smi.latched_init)
2851                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2852                         else
2853                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2854                 }
2855         }
2856
2857         kvm_make_request(KVM_REQ_EVENT, vcpu);
2858
2859         return 0;
2860 }
2861
2862 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2863                                              struct kvm_debugregs *dbgregs)
2864 {
2865         unsigned long val;
2866
2867         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2868         kvm_get_dr(vcpu, 6, &val);
2869         dbgregs->dr6 = val;
2870         dbgregs->dr7 = vcpu->arch.dr7;
2871         dbgregs->flags = 0;
2872         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2873 }
2874
2875 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2876                                             struct kvm_debugregs *dbgregs)
2877 {
2878         if (dbgregs->flags)
2879                 return -EINVAL;
2880
2881         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2882         kvm_update_dr0123(vcpu);
2883         vcpu->arch.dr6 = dbgregs->dr6;
2884         kvm_update_dr6(vcpu);
2885         vcpu->arch.dr7 = dbgregs->dr7;
2886         kvm_update_dr7(vcpu);
2887
2888         return 0;
2889 }
2890
2891 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2892
2893 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2894 {
2895         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2896         u64 xstate_bv = xsave->header.xfeatures;
2897         u64 valid;
2898
2899         /*
2900          * Copy legacy XSAVE area, to avoid complications with CPUID
2901          * leaves 0 and 1 in the loop below.
2902          */
2903         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2904
2905         /* Set XSTATE_BV */
2906         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2907
2908         /*
2909          * Copy each region from the possibly compacted offset to the
2910          * non-compacted offset.
2911          */
2912         valid = xstate_bv & ~XSTATE_FPSSE;
2913         while (valid) {
2914                 u64 feature = valid & -valid;
2915                 int index = fls64(feature) - 1;
2916                 void *src = get_xsave_addr(xsave, feature);
2917
2918                 if (src) {
2919                         u32 size, offset, ecx, edx;
2920                         cpuid_count(XSTATE_CPUID, index,
2921                                     &size, &offset, &ecx, &edx);
2922                         memcpy(dest + offset, src, size);
2923                 }
2924
2925                 valid -= feature;
2926         }
2927 }
2928
2929 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2930 {
2931         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2932         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2933         u64 valid;
2934
2935         /*
2936          * Copy legacy XSAVE area, to avoid complications with CPUID
2937          * leaves 0 and 1 in the loop below.
2938          */
2939         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2940
2941         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2942         xsave->header.xfeatures = xstate_bv;
2943         if (cpu_has_xsaves)
2944                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2945
2946         /*
2947          * Copy each region from the non-compacted offset to the
2948          * possibly compacted offset.
2949          */
2950         valid = xstate_bv & ~XSTATE_FPSSE;
2951         while (valid) {
2952                 u64 feature = valid & -valid;
2953                 int index = fls64(feature) - 1;
2954                 void *dest = get_xsave_addr(xsave, feature);
2955
2956                 if (dest) {
2957                         u32 size, offset, ecx, edx;
2958                         cpuid_count(XSTATE_CPUID, index,
2959                                     &size, &offset, &ecx, &edx);
2960                         memcpy(dest, src + offset, size);
2961                 }
2962
2963                 valid -= feature;
2964         }
2965 }
2966
2967 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2968                                          struct kvm_xsave *guest_xsave)
2969 {
2970         if (cpu_has_xsave) {
2971                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2972                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2973         } else {
2974                 memcpy(guest_xsave->region,
2975                         &vcpu->arch.guest_fpu.state.fxsave,
2976                         sizeof(struct fxregs_state));
2977                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2978                         XSTATE_FPSSE;
2979         }
2980 }
2981
2982 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2983                                         struct kvm_xsave *guest_xsave)
2984 {
2985         u64 xstate_bv =
2986                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2987
2988         if (cpu_has_xsave) {
2989                 /*
2990                  * Here we allow setting states that are not present in
2991                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
2992                  * with old userspace.
2993                  */
2994                 if (xstate_bv & ~kvm_supported_xcr0())
2995                         return -EINVAL;
2996                 load_xsave(vcpu, (u8 *)guest_xsave->region);
2997         } else {
2998                 if (xstate_bv & ~XSTATE_FPSSE)
2999                         return -EINVAL;
3000                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3001                         guest_xsave->region, sizeof(struct fxregs_state));
3002         }
3003         return 0;
3004 }
3005
3006 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3007                                         struct kvm_xcrs *guest_xcrs)
3008 {
3009         if (!cpu_has_xsave) {
3010                 guest_xcrs->nr_xcrs = 0;
3011                 return;
3012         }
3013
3014         guest_xcrs->nr_xcrs = 1;
3015         guest_xcrs->flags = 0;
3016         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3017         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3018 }
3019
3020 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3021                                        struct kvm_xcrs *guest_xcrs)
3022 {
3023         int i, r = 0;
3024
3025         if (!cpu_has_xsave)
3026                 return -EINVAL;
3027
3028         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3029                 return -EINVAL;
3030
3031         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3032                 /* Only support XCR0 currently */
3033                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3034                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3035                                 guest_xcrs->xcrs[i].value);
3036                         break;
3037                 }
3038         if (r)
3039                 r = -EINVAL;
3040         return r;
3041 }
3042
3043 /*
3044  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3045  * stopped by the hypervisor.  This function will be called from the host only.
3046  * EINVAL is returned when the host attempts to set the flag for a guest that
3047  * does not support pv clocks.
3048  */
3049 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3050 {
3051         if (!vcpu->arch.pv_time_enabled)
3052                 return -EINVAL;
3053         vcpu->arch.pvclock_set_guest_stopped_request = true;
3054         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3055         return 0;
3056 }
3057
3058 long kvm_arch_vcpu_ioctl(struct file *filp,
3059                          unsigned int ioctl, unsigned long arg)
3060 {
3061         struct kvm_vcpu *vcpu = filp->private_data;
3062         void __user *argp = (void __user *)arg;
3063         int r;
3064         union {
3065                 struct kvm_lapic_state *lapic;
3066                 struct kvm_xsave *xsave;
3067                 struct kvm_xcrs *xcrs;
3068                 void *buffer;
3069         } u;
3070
3071         u.buffer = NULL;
3072         switch (ioctl) {
3073         case KVM_GET_LAPIC: {
3074                 r = -EINVAL;
3075                 if (!vcpu->arch.apic)
3076                         goto out;
3077                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3078
3079                 r = -ENOMEM;
3080                 if (!u.lapic)
3081                         goto out;
3082                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3083                 if (r)
3084                         goto out;
3085                 r = -EFAULT;
3086                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3087                         goto out;
3088                 r = 0;
3089                 break;
3090         }
3091         case KVM_SET_LAPIC: {
3092                 r = -EINVAL;
3093                 if (!vcpu->arch.apic)
3094                         goto out;
3095                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3096                 if (IS_ERR(u.lapic))
3097                         return PTR_ERR(u.lapic);
3098
3099                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3100                 break;
3101         }
3102         case KVM_INTERRUPT: {
3103                 struct kvm_interrupt irq;
3104
3105                 r = -EFAULT;
3106                 if (copy_from_user(&irq, argp, sizeof irq))
3107                         goto out;
3108                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3109                 break;
3110         }
3111         case KVM_NMI: {
3112                 r = kvm_vcpu_ioctl_nmi(vcpu);
3113                 break;
3114         }
3115         case KVM_SMI: {
3116                 r = kvm_vcpu_ioctl_smi(vcpu);
3117                 break;
3118         }
3119         case KVM_SET_CPUID: {
3120                 struct kvm_cpuid __user *cpuid_arg = argp;
3121                 struct kvm_cpuid cpuid;
3122
3123                 r = -EFAULT;
3124                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3125                         goto out;
3126                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3127                 break;
3128         }
3129         case KVM_SET_CPUID2: {
3130                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3131                 struct kvm_cpuid2 cpuid;
3132
3133                 r = -EFAULT;
3134                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3135                         goto out;
3136                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3137                                               cpuid_arg->entries);
3138                 break;
3139         }
3140         case KVM_GET_CPUID2: {
3141                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3142                 struct kvm_cpuid2 cpuid;
3143
3144                 r = -EFAULT;
3145                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3146                         goto out;
3147                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3148                                               cpuid_arg->entries);
3149                 if (r)
3150                         goto out;
3151                 r = -EFAULT;
3152                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3153                         goto out;
3154                 r = 0;
3155                 break;
3156         }
3157         case KVM_GET_MSRS:
3158                 r = msr_io(vcpu, argp, do_get_msr, 1);
3159                 break;
3160         case KVM_SET_MSRS:
3161                 r = msr_io(vcpu, argp, do_set_msr, 0);
3162                 break;
3163         case KVM_TPR_ACCESS_REPORTING: {
3164                 struct kvm_tpr_access_ctl tac;
3165
3166                 r = -EFAULT;
3167                 if (copy_from_user(&tac, argp, sizeof tac))
3168                         goto out;
3169                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3170                 if (r)
3171                         goto out;
3172                 r = -EFAULT;
3173                 if (copy_to_user(argp, &tac, sizeof tac))
3174                         goto out;
3175                 r = 0;
3176                 break;
3177         };
3178         case KVM_SET_VAPIC_ADDR: {
3179                 struct kvm_vapic_addr va;
3180
3181                 r = -EINVAL;
3182                 if (!irqchip_in_kernel(vcpu->kvm))
3183                         goto out;
3184                 r = -EFAULT;
3185                 if (copy_from_user(&va, argp, sizeof va))
3186                         goto out;
3187                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3188                 break;
3189         }
3190         case KVM_X86_SETUP_MCE: {
3191                 u64 mcg_cap;
3192
3193                 r = -EFAULT;
3194                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3195                         goto out;
3196                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3197                 break;
3198         }
3199         case KVM_X86_SET_MCE: {
3200                 struct kvm_x86_mce mce;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&mce, argp, sizeof mce))
3204                         goto out;
3205                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3206                 break;
3207         }
3208         case KVM_GET_VCPU_EVENTS: {
3209                 struct kvm_vcpu_events events;
3210
3211                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3212
3213                 r = -EFAULT;
3214                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3215                         break;
3216                 r = 0;
3217                 break;
3218         }
3219         case KVM_SET_VCPU_EVENTS: {
3220                 struct kvm_vcpu_events events;
3221
3222                 r = -EFAULT;
3223                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3224                         break;
3225
3226                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3227                 break;
3228         }
3229         case KVM_GET_DEBUGREGS: {
3230                 struct kvm_debugregs dbgregs;
3231
3232                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3233
3234                 r = -EFAULT;
3235                 if (copy_to_user(argp, &dbgregs,
3236                                  sizeof(struct kvm_debugregs)))
3237                         break;
3238                 r = 0;
3239                 break;
3240         }
3241         case KVM_SET_DEBUGREGS: {
3242                 struct kvm_debugregs dbgregs;
3243
3244                 r = -EFAULT;
3245                 if (copy_from_user(&dbgregs, argp,
3246                                    sizeof(struct kvm_debugregs)))
3247                         break;
3248
3249                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3250                 break;
3251         }
3252         case KVM_GET_XSAVE: {
3253                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3254                 r = -ENOMEM;
3255                 if (!u.xsave)
3256                         break;
3257
3258                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3259
3260                 r = -EFAULT;
3261                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3262                         break;
3263                 r = 0;
3264                 break;
3265         }
3266         case KVM_SET_XSAVE: {
3267                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3268                 if (IS_ERR(u.xsave))
3269                         return PTR_ERR(u.xsave);
3270
3271                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3272                 break;
3273         }
3274         case KVM_GET_XCRS: {
3275                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3276                 r = -ENOMEM;
3277                 if (!u.xcrs)
3278                         break;
3279
3280                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3281
3282                 r = -EFAULT;
3283                 if (copy_to_user(argp, u.xcrs,
3284                                  sizeof(struct kvm_xcrs)))
3285                         break;
3286                 r = 0;
3287                 break;
3288         }
3289         case KVM_SET_XCRS: {
3290                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3291                 if (IS_ERR(u.xcrs))
3292                         return PTR_ERR(u.xcrs);
3293
3294                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3295                 break;
3296         }
3297         case KVM_SET_TSC_KHZ: {
3298                 u32 user_tsc_khz;
3299
3300                 r = -EINVAL;
3301                 user_tsc_khz = (u32)arg;
3302
3303                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3304                         goto out;
3305
3306                 if (user_tsc_khz == 0)
3307                         user_tsc_khz = tsc_khz;
3308
3309                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3310
3311                 r = 0;
3312                 goto out;
3313         }
3314         case KVM_GET_TSC_KHZ: {
3315                 r = vcpu->arch.virtual_tsc_khz;
3316                 goto out;
3317         }
3318         case KVM_KVMCLOCK_CTRL: {
3319                 r = kvm_set_guest_paused(vcpu);
3320                 goto out;
3321         }
3322         default:
3323                 r = -EINVAL;
3324         }
3325 out:
3326         kfree(u.buffer);
3327         return r;
3328 }
3329
3330 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3331 {
3332         return VM_FAULT_SIGBUS;
3333 }
3334
3335 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3336 {
3337         int ret;
3338
3339         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3340                 return -EINVAL;
3341         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3342         return ret;
3343 }
3344
3345 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3346                                               u64 ident_addr)
3347 {
3348         kvm->arch.ept_identity_map_addr = ident_addr;
3349         return 0;
3350 }
3351
3352 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3353                                           u32 kvm_nr_mmu_pages)
3354 {
3355         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3356                 return -EINVAL;
3357
3358         mutex_lock(&kvm->slots_lock);
3359
3360         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3361         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3362
3363         mutex_unlock(&kvm->slots_lock);
3364         return 0;
3365 }
3366
3367 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3368 {
3369         return kvm->arch.n_max_mmu_pages;
3370 }
3371
3372 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3373 {
3374         int r;
3375
3376         r = 0;
3377         switch (chip->chip_id) {
3378         case KVM_IRQCHIP_PIC_MASTER:
3379                 memcpy(&chip->chip.pic,
3380                         &pic_irqchip(kvm)->pics[0],
3381                         sizeof(struct kvm_pic_state));
3382                 break;
3383         case KVM_IRQCHIP_PIC_SLAVE:
3384                 memcpy(&chip->chip.pic,
3385                         &pic_irqchip(kvm)->pics[1],
3386                         sizeof(struct kvm_pic_state));
3387                 break;
3388         case KVM_IRQCHIP_IOAPIC:
3389                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3390                 break;
3391         default:
3392                 r = -EINVAL;
3393                 break;
3394         }
3395         return r;
3396 }
3397
3398 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3399 {
3400         int r;
3401
3402         r = 0;
3403         switch (chip->chip_id) {
3404         case KVM_IRQCHIP_PIC_MASTER:
3405                 spin_lock(&pic_irqchip(kvm)->lock);
3406                 memcpy(&pic_irqchip(kvm)->pics[0],
3407                         &chip->chip.pic,
3408                         sizeof(struct kvm_pic_state));
3409                 spin_unlock(&pic_irqchip(kvm)->lock);
3410                 break;
3411         case KVM_IRQCHIP_PIC_SLAVE:
3412                 spin_lock(&pic_irqchip(kvm)->lock);
3413                 memcpy(&pic_irqchip(kvm)->pics[1],
3414                         &chip->chip.pic,
3415                         sizeof(struct kvm_pic_state));
3416                 spin_unlock(&pic_irqchip(kvm)->lock);
3417                 break;
3418         case KVM_IRQCHIP_IOAPIC:
3419                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3420                 break;
3421         default:
3422                 r = -EINVAL;
3423                 break;
3424         }
3425         kvm_pic_update_irq(pic_irqchip(kvm));
3426         return r;
3427 }
3428
3429 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3430 {
3431         int r = 0;
3432
3433         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3434         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3435         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3436         return r;
3437 }
3438
3439 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3440 {
3441         int r = 0;
3442
3443         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3444         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3445         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3446         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3447         return r;
3448 }
3449
3450 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3451 {
3452         int r = 0;
3453
3454         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3455         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3456                 sizeof(ps->channels));
3457         ps->flags = kvm->arch.vpit->pit_state.flags;
3458         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3459         memset(&ps->reserved, 0, sizeof(ps->reserved));
3460         return r;
3461 }
3462
3463 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3464 {
3465         int r = 0, start = 0;
3466         u32 prev_legacy, cur_legacy;
3467         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3468         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3469         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3470         if (!prev_legacy && cur_legacy)
3471                 start = 1;
3472         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3473                sizeof(kvm->arch.vpit->pit_state.channels));
3474         kvm->arch.vpit->pit_state.flags = ps->flags;
3475         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3476         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3477         return r;
3478 }
3479
3480 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3481                                  struct kvm_reinject_control *control)
3482 {
3483         if (!kvm->arch.vpit)
3484                 return -ENXIO;
3485         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3486         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3487         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3488         return 0;
3489 }
3490
3491 /**
3492  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3493  * @kvm: kvm instance
3494  * @log: slot id and address to which we copy the log
3495  *
3496  * Steps 1-4 below provide general overview of dirty page logging. See
3497  * kvm_get_dirty_log_protect() function description for additional details.
3498  *
3499  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3500  * always flush the TLB (step 4) even if previous step failed  and the dirty
3501  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3502  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3503  * writes will be marked dirty for next log read.
3504  *
3505  *   1. Take a snapshot of the bit and clear it if needed.
3506  *   2. Write protect the corresponding page.
3507  *   3. Copy the snapshot to the userspace.
3508  *   4. Flush TLB's if needed.
3509  */
3510 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3511 {
3512         bool is_dirty = false;
3513         int r;
3514
3515         mutex_lock(&kvm->slots_lock);
3516
3517         /*
3518          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3519          */
3520         if (kvm_x86_ops->flush_log_dirty)
3521                 kvm_x86_ops->flush_log_dirty(kvm);
3522
3523         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3524
3525         /*
3526          * All the TLBs can be flushed out of mmu lock, see the comments in
3527          * kvm_mmu_slot_remove_write_access().
3528          */
3529         lockdep_assert_held(&kvm->slots_lock);
3530         if (is_dirty)
3531                 kvm_flush_remote_tlbs(kvm);
3532
3533         mutex_unlock(&kvm->slots_lock);
3534         return r;
3535 }
3536
3537 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3538                         bool line_status)
3539 {
3540         if (!irqchip_in_kernel(kvm))
3541                 return -ENXIO;
3542
3543         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3544                                         irq_event->irq, irq_event->level,
3545                                         line_status);
3546         return 0;
3547 }
3548
3549 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3550                                    struct kvm_enable_cap *cap)
3551 {
3552         int r;
3553
3554         if (cap->flags)
3555                 return -EINVAL;
3556
3557         switch (cap->cap) {
3558         case KVM_CAP_DISABLE_QUIRKS:
3559                 kvm->arch.disabled_quirks = cap->args[0];
3560                 r = 0;
3561                 break;
3562         default:
3563                 r = -EINVAL;
3564                 break;
3565         }
3566         return r;
3567 }
3568
3569 long kvm_arch_vm_ioctl(struct file *filp,
3570                        unsigned int ioctl, unsigned long arg)
3571 {
3572         struct kvm *kvm = filp->private_data;
3573         void __user *argp = (void __user *)arg;
3574         int r = -ENOTTY;
3575         /*
3576          * This union makes it completely explicit to gcc-3.x
3577          * that these two variables' stack usage should be
3578          * combined, not added together.
3579          */
3580         union {
3581                 struct kvm_pit_state ps;
3582                 struct kvm_pit_state2 ps2;
3583                 struct kvm_pit_config pit_config;
3584         } u;
3585
3586         switch (ioctl) {
3587         case KVM_SET_TSS_ADDR:
3588                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3589                 break;
3590         case KVM_SET_IDENTITY_MAP_ADDR: {
3591                 u64 ident_addr;
3592
3593                 r = -EFAULT;
3594                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3595                         goto out;
3596                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3597                 break;
3598         }
3599         case KVM_SET_NR_MMU_PAGES:
3600                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3601                 break;
3602         case KVM_GET_NR_MMU_PAGES:
3603                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3604                 break;
3605         case KVM_CREATE_IRQCHIP: {
3606                 struct kvm_pic *vpic;
3607
3608                 mutex_lock(&kvm->lock);
3609                 r = -EEXIST;
3610                 if (kvm->arch.vpic)
3611                         goto create_irqchip_unlock;
3612                 r = -EINVAL;
3613                 if (atomic_read(&kvm->online_vcpus))
3614                         goto create_irqchip_unlock;
3615                 r = -ENOMEM;
3616                 vpic = kvm_create_pic(kvm);
3617                 if (vpic) {
3618                         r = kvm_ioapic_init(kvm);
3619                         if (r) {
3620                                 mutex_lock(&kvm->slots_lock);
3621                                 kvm_destroy_pic(vpic);
3622                                 mutex_unlock(&kvm->slots_lock);
3623                                 goto create_irqchip_unlock;
3624                         }
3625                 } else
3626                         goto create_irqchip_unlock;
3627                 r = kvm_setup_default_irq_routing(kvm);
3628                 if (r) {
3629                         mutex_lock(&kvm->slots_lock);
3630                         mutex_lock(&kvm->irq_lock);
3631                         kvm_ioapic_destroy(kvm);
3632                         kvm_destroy_pic(vpic);
3633                         mutex_unlock(&kvm->irq_lock);
3634                         mutex_unlock(&kvm->slots_lock);
3635                         goto create_irqchip_unlock;
3636                 }
3637                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3638                 smp_wmb();
3639                 kvm->arch.vpic = vpic;
3640         create_irqchip_unlock:
3641                 mutex_unlock(&kvm->lock);
3642                 break;
3643         }
3644         case KVM_CREATE_PIT:
3645                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3646                 goto create_pit;
3647         case KVM_CREATE_PIT2:
3648                 r = -EFAULT;
3649                 if (copy_from_user(&u.pit_config, argp,
3650                                    sizeof(struct kvm_pit_config)))
3651                         goto out;
3652         create_pit:
3653                 mutex_lock(&kvm->slots_lock);
3654                 r = -EEXIST;
3655                 if (kvm->arch.vpit)
3656                         goto create_pit_unlock;
3657                 r = -ENOMEM;
3658                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3659                 if (kvm->arch.vpit)
3660                         r = 0;
3661         create_pit_unlock:
3662                 mutex_unlock(&kvm->slots_lock);
3663                 break;
3664         case KVM_GET_IRQCHIP: {
3665                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3666                 struct kvm_irqchip *chip;
3667
3668                 chip = memdup_user(argp, sizeof(*chip));
3669                 if (IS_ERR(chip)) {
3670                         r = PTR_ERR(chip);
3671                         goto out;
3672                 }
3673
3674                 r = -ENXIO;
3675                 if (!irqchip_in_kernel(kvm))
3676                         goto get_irqchip_out;
3677                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3678                 if (r)
3679                         goto get_irqchip_out;
3680                 r = -EFAULT;
3681                 if (copy_to_user(argp, chip, sizeof *chip))
3682                         goto get_irqchip_out;
3683                 r = 0;
3684         get_irqchip_out:
3685                 kfree(chip);
3686                 break;
3687         }
3688         case KVM_SET_IRQCHIP: {
3689                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3690                 struct kvm_irqchip *chip;
3691
3692                 chip = memdup_user(argp, sizeof(*chip));
3693                 if (IS_ERR(chip)) {
3694                         r = PTR_ERR(chip);
3695                         goto out;
3696                 }
3697
3698                 r = -ENXIO;
3699                 if (!irqchip_in_kernel(kvm))
3700                         goto set_irqchip_out;
3701                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3702                 if (r)
3703                         goto set_irqchip_out;
3704                 r = 0;
3705         set_irqchip_out:
3706                 kfree(chip);
3707                 break;
3708         }
3709         case KVM_GET_PIT: {
3710                 r = -EFAULT;
3711                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3712                         goto out;
3713                 r = -ENXIO;
3714                 if (!kvm->arch.vpit)
3715                         goto out;
3716                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3717                 if (r)
3718                         goto out;
3719                 r = -EFAULT;
3720                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3721                         goto out;
3722                 r = 0;
3723                 break;
3724         }
3725         case KVM_SET_PIT: {
3726                 r = -EFAULT;
3727                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3728                         goto out;
3729                 r = -ENXIO;
3730                 if (!kvm->arch.vpit)
3731                         goto out;
3732                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3733                 break;
3734         }
3735         case KVM_GET_PIT2: {
3736                 r = -ENXIO;
3737                 if (!kvm->arch.vpit)
3738                         goto out;
3739                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3740                 if (r)
3741                         goto out;
3742                 r = -EFAULT;
3743                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3744                         goto out;
3745                 r = 0;
3746                 break;
3747         }
3748         case KVM_SET_PIT2: {
3749                 r = -EFAULT;
3750                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3751                         goto out;
3752                 r = -ENXIO;
3753                 if (!kvm->arch.vpit)
3754                         goto out;
3755                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3756                 break;
3757         }
3758         case KVM_REINJECT_CONTROL: {
3759                 struct kvm_reinject_control control;
3760                 r =  -EFAULT;
3761                 if (copy_from_user(&control, argp, sizeof(control)))
3762                         goto out;
3763                 r = kvm_vm_ioctl_reinject(kvm, &control);
3764                 break;
3765         }
3766         case KVM_SET_BOOT_CPU_ID:
3767                 r = 0;
3768                 mutex_lock(&kvm->lock);
3769                 if (atomic_read(&kvm->online_vcpus) != 0)
3770                         r = -EBUSY;
3771                 else
3772                         kvm->arch.bsp_vcpu_id = arg;
3773                 mutex_unlock(&kvm->lock);
3774                 break;
3775         case KVM_XEN_HVM_CONFIG: {
3776                 r = -EFAULT;
3777                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3778                                    sizeof(struct kvm_xen_hvm_config)))
3779                         goto out;
3780                 r = -EINVAL;
3781                 if (kvm->arch.xen_hvm_config.flags)
3782                         goto out;
3783                 r = 0;
3784                 break;
3785         }
3786         case KVM_SET_CLOCK: {
3787                 struct kvm_clock_data user_ns;
3788                 u64 now_ns;
3789                 s64 delta;
3790
3791                 r = -EFAULT;
3792                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3793                         goto out;
3794
3795                 r = -EINVAL;
3796                 if (user_ns.flags)
3797                         goto out;
3798
3799                 r = 0;
3800                 local_irq_disable();
3801                 now_ns = get_kernel_ns();
3802                 delta = user_ns.clock - now_ns;
3803                 local_irq_enable();
3804                 kvm->arch.kvmclock_offset = delta;
3805                 kvm_gen_update_masterclock(kvm);
3806                 break;
3807         }
3808         case KVM_GET_CLOCK: {
3809                 struct kvm_clock_data user_ns;
3810                 u64 now_ns;
3811
3812                 local_irq_disable();
3813                 now_ns = get_kernel_ns();
3814                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3815                 local_irq_enable();
3816                 user_ns.flags = 0;
3817                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3818
3819                 r = -EFAULT;
3820                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3821                         goto out;
3822                 r = 0;
3823                 break;
3824         }
3825         case KVM_ENABLE_CAP: {
3826                 struct kvm_enable_cap cap;
3827
3828                 r = -EFAULT;
3829                 if (copy_from_user(&cap, argp, sizeof(cap)))
3830                         goto out;
3831                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3832                 break;
3833         }
3834         default:
3835                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3836         }
3837 out:
3838         return r;
3839 }
3840
3841 static void kvm_init_msr_list(void)
3842 {
3843         u32 dummy[2];
3844         unsigned i, j;
3845
3846         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3847                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3848                         continue;
3849
3850                 /*
3851                  * Even MSRs that are valid in the host may not be exposed
3852                  * to the guests in some cases.  We could work around this
3853                  * in VMX with the generic MSR save/load machinery, but it
3854                  * is not really worthwhile since it will really only
3855                  * happen with nested virtualization.
3856                  */
3857                 switch (msrs_to_save[i]) {
3858                 case MSR_IA32_BNDCFGS:
3859                         if (!kvm_x86_ops->mpx_supported())
3860                                 continue;
3861                         break;
3862                 default:
3863                         break;
3864                 }
3865
3866                 if (j < i)
3867                         msrs_to_save[j] = msrs_to_save[i];
3868                 j++;
3869         }
3870         num_msrs_to_save = j;
3871
3872         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3873                 switch (emulated_msrs[i]) {
3874                 case MSR_IA32_SMBASE:
3875                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3876                                 continue;
3877                         break;
3878                 default:
3879                         break;
3880                 }
3881
3882                 if (j < i)
3883                         emulated_msrs[j] = emulated_msrs[i];
3884                 j++;
3885         }
3886         num_emulated_msrs = j;
3887 }
3888
3889 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3890                            const void *v)
3891 {
3892         int handled = 0;
3893         int n;
3894
3895         do {
3896                 n = min(len, 8);
3897                 if (!(vcpu->arch.apic &&
3898                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3899                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3900                         break;
3901                 handled += n;
3902                 addr += n;
3903                 len -= n;
3904                 v += n;
3905         } while (len);
3906
3907         return handled;
3908 }
3909
3910 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3911 {
3912         int handled = 0;
3913         int n;
3914
3915         do {
3916                 n = min(len, 8);
3917                 if (!(vcpu->arch.apic &&
3918                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3919                                          addr, n, v))
3920                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3921                         break;
3922                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3923                 handled += n;
3924                 addr += n;
3925                 len -= n;
3926                 v += n;
3927         } while (len);
3928
3929         return handled;
3930 }
3931
3932 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3933                         struct kvm_segment *var, int seg)
3934 {
3935         kvm_x86_ops->set_segment(vcpu, var, seg);
3936 }
3937
3938 void kvm_get_segment(struct kvm_vcpu *vcpu,
3939                      struct kvm_segment *var, int seg)
3940 {
3941         kvm_x86_ops->get_segment(vcpu, var, seg);
3942 }
3943
3944 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3945                            struct x86_exception *exception)
3946 {
3947         gpa_t t_gpa;
3948
3949         BUG_ON(!mmu_is_nested(vcpu));
3950
3951         /* NPT walks are always user-walks */
3952         access |= PFERR_USER_MASK;
3953         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3954
3955         return t_gpa;
3956 }
3957
3958 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3959                               struct x86_exception *exception)
3960 {
3961         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3962         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3963 }
3964
3965  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3966                                 struct x86_exception *exception)
3967 {
3968         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3969         access |= PFERR_FETCH_MASK;
3970         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3971 }
3972
3973 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3974                                struct x86_exception *exception)
3975 {
3976         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3977         access |= PFERR_WRITE_MASK;
3978         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3979 }
3980
3981 /* uses this to access any guest's mapped memory without checking CPL */
3982 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3983                                 struct x86_exception *exception)
3984 {
3985         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3986 }
3987
3988 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3989                                       struct kvm_vcpu *vcpu, u32 access,
3990                                       struct x86_exception *exception)
3991 {
3992         void *data = val;
3993         int r = X86EMUL_CONTINUE;
3994
3995         while (bytes) {
3996                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3997                                                             exception);
3998                 unsigned offset = addr & (PAGE_SIZE-1);
3999                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4000                 int ret;
4001
4002                 if (gpa == UNMAPPED_GVA)
4003                         return X86EMUL_PROPAGATE_FAULT;
4004                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4005                                                offset, toread);
4006                 if (ret < 0) {
4007                         r = X86EMUL_IO_NEEDED;
4008                         goto out;
4009                 }
4010
4011                 bytes -= toread;
4012                 data += toread;
4013                 addr += toread;
4014         }
4015 out:
4016         return r;
4017 }
4018
4019 /* used for instruction fetching */
4020 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4021                                 gva_t addr, void *val, unsigned int bytes,
4022                                 struct x86_exception *exception)
4023 {
4024         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4025         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4026         unsigned offset;
4027         int ret;
4028
4029         /* Inline kvm_read_guest_virt_helper for speed.  */
4030         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4031                                                     exception);
4032         if (unlikely(gpa == UNMAPPED_GVA))
4033                 return X86EMUL_PROPAGATE_FAULT;
4034
4035         offset = addr & (PAGE_SIZE-1);
4036         if (WARN_ON(offset + bytes > PAGE_SIZE))
4037                 bytes = (unsigned)PAGE_SIZE - offset;
4038         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4039                                        offset, bytes);
4040         if (unlikely(ret < 0))
4041                 return X86EMUL_IO_NEEDED;
4042
4043         return X86EMUL_CONTINUE;
4044 }
4045
4046 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4047                                gva_t addr, void *val, unsigned int bytes,
4048                                struct x86_exception *exception)
4049 {
4050         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4051         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4052
4053         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4054                                           exception);
4055 }
4056 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4057
4058 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4059                                       gva_t addr, void *val, unsigned int bytes,
4060                                       struct x86_exception *exception)
4061 {
4062         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4063         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4064 }
4065
4066 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4067                                        gva_t addr, void *val,
4068                                        unsigned int bytes,
4069                                        struct x86_exception *exception)
4070 {
4071         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4072         void *data = val;
4073         int r = X86EMUL_CONTINUE;
4074
4075         while (bytes) {
4076                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4077                                                              PFERR_WRITE_MASK,
4078                                                              exception);
4079                 unsigned offset = addr & (PAGE_SIZE-1);
4080                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4081                 int ret;
4082
4083                 if (gpa == UNMAPPED_GVA)
4084                         return X86EMUL_PROPAGATE_FAULT;
4085                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4086                 if (ret < 0) {
4087                         r = X86EMUL_IO_NEEDED;
4088                         goto out;
4089                 }
4090
4091                 bytes -= towrite;
4092                 data += towrite;
4093                 addr += towrite;
4094         }
4095 out:
4096         return r;
4097 }
4098 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4099
4100 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4101                                 gpa_t *gpa, struct x86_exception *exception,
4102                                 bool write)
4103 {
4104         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4105                 | (write ? PFERR_WRITE_MASK : 0);
4106
4107         if (vcpu_match_mmio_gva(vcpu, gva)
4108             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4109                                  vcpu->arch.access, access)) {
4110                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4111                                         (gva & (PAGE_SIZE - 1));
4112                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4113                 return 1;
4114         }
4115
4116         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4117
4118         if (*gpa == UNMAPPED_GVA)
4119                 return -1;
4120
4121         /* For APIC access vmexit */
4122         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4123                 return 1;
4124
4125         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4126                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4127                 return 1;
4128         }
4129
4130         return 0;
4131 }
4132
4133 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4134                         const void *val, int bytes)
4135 {
4136         int ret;
4137
4138         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4139         if (ret < 0)
4140                 return 0;
4141         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4142         return 1;
4143 }
4144
4145 struct read_write_emulator_ops {
4146         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4147                                   int bytes);
4148         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4149                                   void *val, int bytes);
4150         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4151                                int bytes, void *val);
4152         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4153                                     void *val, int bytes);
4154         bool write;
4155 };
4156
4157 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4158 {
4159         if (vcpu->mmio_read_completed) {
4160                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4161                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4162                 vcpu->mmio_read_completed = 0;
4163                 return 1;
4164         }
4165
4166         return 0;
4167 }
4168
4169 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4170                         void *val, int bytes)
4171 {
4172         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4173 }
4174
4175 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4176                          void *val, int bytes)
4177 {
4178         return emulator_write_phys(vcpu, gpa, val, bytes);
4179 }
4180
4181 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4182 {
4183         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4184         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4185 }
4186
4187 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4188                           void *val, int bytes)
4189 {
4190         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4191         return X86EMUL_IO_NEEDED;
4192 }
4193
4194 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4195                            void *val, int bytes)
4196 {
4197         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4198
4199         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4200         return X86EMUL_CONTINUE;
4201 }
4202
4203 static const struct read_write_emulator_ops read_emultor = {
4204         .read_write_prepare = read_prepare,
4205         .read_write_emulate = read_emulate,
4206         .read_write_mmio = vcpu_mmio_read,
4207         .read_write_exit_mmio = read_exit_mmio,
4208 };
4209
4210 static const struct read_write_emulator_ops write_emultor = {
4211         .read_write_emulate = write_emulate,
4212         .read_write_mmio = write_mmio,
4213         .read_write_exit_mmio = write_exit_mmio,
4214         .write = true,
4215 };
4216
4217 static int emulator_read_write_onepage(unsigned long addr, void *val,
4218                                        unsigned int bytes,
4219                                        struct x86_exception *exception,
4220                                        struct kvm_vcpu *vcpu,
4221                                        const struct read_write_emulator_ops *ops)
4222 {
4223         gpa_t gpa;
4224         int handled, ret;
4225         bool write = ops->write;
4226         struct kvm_mmio_fragment *frag;
4227
4228         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4229
4230         if (ret < 0)
4231                 return X86EMUL_PROPAGATE_FAULT;
4232
4233         /* For APIC access vmexit */
4234         if (ret)
4235                 goto mmio;
4236
4237         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4238                 return X86EMUL_CONTINUE;
4239
4240 mmio:
4241         /*
4242          * Is this MMIO handled locally?
4243          */
4244         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4245         if (handled == bytes)
4246                 return X86EMUL_CONTINUE;
4247
4248         gpa += handled;
4249         bytes -= handled;
4250         val += handled;
4251
4252         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4253         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4254         frag->gpa = gpa;
4255         frag->data = val;
4256         frag->len = bytes;
4257         return X86EMUL_CONTINUE;
4258 }
4259
4260 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4261                         unsigned long addr,
4262                         void *val, unsigned int bytes,
4263                         struct x86_exception *exception,
4264                         const struct read_write_emulator_ops *ops)
4265 {
4266         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4267         gpa_t gpa;
4268         int rc;
4269
4270         if (ops->read_write_prepare &&
4271                   ops->read_write_prepare(vcpu, val, bytes))
4272                 return X86EMUL_CONTINUE;
4273
4274         vcpu->mmio_nr_fragments = 0;
4275
4276         /* Crossing a page boundary? */
4277         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4278                 int now;
4279
4280                 now = -addr & ~PAGE_MASK;
4281                 rc = emulator_read_write_onepage(addr, val, now, exception,
4282                                                  vcpu, ops);
4283
4284                 if (rc != X86EMUL_CONTINUE)
4285                         return rc;
4286                 addr += now;
4287                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4288                         addr = (u32)addr;
4289                 val += now;
4290                 bytes -= now;
4291         }
4292
4293         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4294                                          vcpu, ops);
4295         if (rc != X86EMUL_CONTINUE)
4296                 return rc;
4297
4298         if (!vcpu->mmio_nr_fragments)
4299                 return rc;
4300
4301         gpa = vcpu->mmio_fragments[0].gpa;
4302
4303         vcpu->mmio_needed = 1;
4304         vcpu->mmio_cur_fragment = 0;
4305
4306         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4307         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4308         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4309         vcpu->run->mmio.phys_addr = gpa;
4310
4311         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4312 }
4313
4314 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4315                                   unsigned long addr,
4316                                   void *val,
4317                                   unsigned int bytes,
4318                                   struct x86_exception *exception)
4319 {
4320         return emulator_read_write(ctxt, addr, val, bytes,
4321                                    exception, &read_emultor);
4322 }
4323
4324 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4325                             unsigned long addr,
4326                             const void *val,
4327                             unsigned int bytes,
4328                             struct x86_exception *exception)
4329 {
4330         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4331                                    exception, &write_emultor);
4332 }
4333
4334 #define CMPXCHG_TYPE(t, ptr, old, new) \
4335         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4336
4337 #ifdef CONFIG_X86_64
4338 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4339 #else
4340 #  define CMPXCHG64(ptr, old, new) \
4341         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4342 #endif
4343
4344 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4345                                      unsigned long addr,
4346                                      const void *old,
4347                                      const void *new,
4348                                      unsigned int bytes,
4349                                      struct x86_exception *exception)
4350 {
4351         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4352         gpa_t gpa;
4353         struct page *page;
4354         char *kaddr;
4355         bool exchanged;
4356
4357         /* guests cmpxchg8b have to be emulated atomically */
4358         if (bytes > 8 || (bytes & (bytes - 1)))
4359                 goto emul_write;
4360
4361         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4362
4363         if (gpa == UNMAPPED_GVA ||
4364             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4365                 goto emul_write;
4366
4367         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4368                 goto emul_write;
4369
4370         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4371         if (is_error_page(page))
4372                 goto emul_write;
4373
4374         kaddr = kmap_atomic(page);
4375         kaddr += offset_in_page(gpa);
4376         switch (bytes) {
4377         case 1:
4378                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4379                 break;
4380         case 2:
4381                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4382                 break;
4383         case 4:
4384                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4385                 break;
4386         case 8:
4387                 exchanged = CMPXCHG64(kaddr, old, new);
4388                 break;
4389         default:
4390                 BUG();
4391         }
4392         kunmap_atomic(kaddr);
4393         kvm_release_page_dirty(page);
4394
4395         if (!exchanged)
4396                 return X86EMUL_CMPXCHG_FAILED;
4397
4398         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4399         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4400
4401         return X86EMUL_CONTINUE;
4402
4403 emul_write:
4404         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4405
4406         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4407 }
4408
4409 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4410 {
4411         /* TODO: String I/O for in kernel device */
4412         int r;
4413
4414         if (vcpu->arch.pio.in)
4415                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4416                                     vcpu->arch.pio.size, pd);
4417         else
4418                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4419                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4420                                      pd);
4421         return r;
4422 }
4423
4424 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4425                                unsigned short port, void *val,
4426                                unsigned int count, bool in)
4427 {
4428         vcpu->arch.pio.port = port;
4429         vcpu->arch.pio.in = in;
4430         vcpu->arch.pio.count  = count;
4431         vcpu->arch.pio.size = size;
4432
4433         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4434                 vcpu->arch.pio.count = 0;
4435                 return 1;
4436         }
4437
4438         vcpu->run->exit_reason = KVM_EXIT_IO;
4439         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4440         vcpu->run->io.size = size;
4441         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4442         vcpu->run->io.count = count;
4443         vcpu->run->io.port = port;
4444
4445         return 0;
4446 }
4447
4448 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4449                                     int size, unsigned short port, void *val,
4450                                     unsigned int count)
4451 {
4452         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4453         int ret;
4454
4455         if (vcpu->arch.pio.count)
4456                 goto data_avail;
4457
4458         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4459         if (ret) {
4460 data_avail:
4461                 memcpy(val, vcpu->arch.pio_data, size * count);
4462                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4463                 vcpu->arch.pio.count = 0;
4464                 return 1;
4465         }
4466
4467         return 0;
4468 }
4469
4470 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4471                                      int size, unsigned short port,
4472                                      const void *val, unsigned int count)
4473 {
4474         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4475
4476         memcpy(vcpu->arch.pio_data, val, size * count);
4477         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4478         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4479 }
4480
4481 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4482 {
4483         return kvm_x86_ops->get_segment_base(vcpu, seg);
4484 }
4485
4486 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4487 {
4488         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4489 }
4490
4491 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4492 {
4493         if (!need_emulate_wbinvd(vcpu))
4494                 return X86EMUL_CONTINUE;
4495
4496         if (kvm_x86_ops->has_wbinvd_exit()) {
4497                 int cpu = get_cpu();
4498
4499                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4500                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4501                                 wbinvd_ipi, NULL, 1);
4502                 put_cpu();
4503                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4504         } else
4505                 wbinvd();
4506         return X86EMUL_CONTINUE;
4507 }
4508
4509 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4510 {
4511         kvm_x86_ops->skip_emulated_instruction(vcpu);
4512         return kvm_emulate_wbinvd_noskip(vcpu);
4513 }
4514 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4515
4516
4517
4518 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4519 {
4520         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4521 }
4522
4523 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4524                            unsigned long *dest)
4525 {
4526         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4527 }
4528
4529 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4530                            unsigned long value)
4531 {
4532
4533         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4534 }
4535
4536 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4537 {
4538         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4539 }
4540
4541 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4542 {
4543         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4544         unsigned long value;
4545
4546         switch (cr) {
4547         case 0:
4548                 value = kvm_read_cr0(vcpu);
4549                 break;
4550         case 2:
4551                 value = vcpu->arch.cr2;
4552                 break;
4553         case 3:
4554                 value = kvm_read_cr3(vcpu);
4555                 break;
4556         case 4:
4557                 value = kvm_read_cr4(vcpu);
4558                 break;
4559         case 8:
4560                 value = kvm_get_cr8(vcpu);
4561                 break;
4562         default:
4563                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4564                 return 0;
4565         }
4566
4567         return value;
4568 }
4569
4570 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4571 {
4572         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4573         int res = 0;
4574
4575         switch (cr) {
4576         case 0:
4577                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4578                 break;
4579         case 2:
4580                 vcpu->arch.cr2 = val;
4581                 break;
4582         case 3:
4583                 res = kvm_set_cr3(vcpu, val);
4584                 break;
4585         case 4:
4586                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4587                 break;
4588         case 8:
4589                 res = kvm_set_cr8(vcpu, val);
4590                 break;
4591         default:
4592                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4593                 res = -1;
4594         }
4595
4596         return res;
4597 }
4598
4599 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4600 {
4601         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4602 }
4603
4604 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4605 {
4606         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4607 }
4608
4609 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4610 {
4611         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4612 }
4613
4614 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4615 {
4616         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4617 }
4618
4619 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4620 {
4621         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4622 }
4623
4624 static unsigned long emulator_get_cached_segment_base(
4625         struct x86_emulate_ctxt *ctxt, int seg)
4626 {
4627         return get_segment_base(emul_to_vcpu(ctxt), seg);
4628 }
4629
4630 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4631                                  struct desc_struct *desc, u32 *base3,
4632                                  int seg)
4633 {
4634         struct kvm_segment var;
4635
4636         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4637         *selector = var.selector;
4638
4639         if (var.unusable) {
4640                 memset(desc, 0, sizeof(*desc));
4641                 return false;
4642         }
4643
4644         if (var.g)
4645                 var.limit >>= 12;
4646         set_desc_limit(desc, var.limit);
4647         set_desc_base(desc, (unsigned long)var.base);
4648 #ifdef CONFIG_X86_64
4649         if (base3)
4650                 *base3 = var.base >> 32;
4651 #endif
4652         desc->type = var.type;
4653         desc->s = var.s;
4654         desc->dpl = var.dpl;
4655         desc->p = var.present;
4656         desc->avl = var.avl;
4657         desc->l = var.l;
4658         desc->d = var.db;
4659         desc->g = var.g;
4660
4661         return true;
4662 }
4663
4664 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4665                                  struct desc_struct *desc, u32 base3,
4666                                  int seg)
4667 {
4668         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4669         struct kvm_segment var;
4670
4671         var.selector = selector;
4672         var.base = get_desc_base(desc);
4673 #ifdef CONFIG_X86_64
4674         var.base |= ((u64)base3) << 32;
4675 #endif
4676         var.limit = get_desc_limit(desc);
4677         if (desc->g)
4678                 var.limit = (var.limit << 12) | 0xfff;
4679         var.type = desc->type;
4680         var.dpl = desc->dpl;
4681         var.db = desc->d;
4682         var.s = desc->s;
4683         var.l = desc->l;
4684         var.g = desc->g;
4685         var.avl = desc->avl;
4686         var.present = desc->p;
4687         var.unusable = !var.present;
4688         var.padding = 0;
4689
4690         kvm_set_segment(vcpu, &var, seg);
4691         return;
4692 }
4693
4694 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4695                             u32 msr_index, u64 *pdata)
4696 {
4697         struct msr_data msr;
4698         int r;
4699
4700         msr.index = msr_index;
4701         msr.host_initiated = false;
4702         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4703         if (r)
4704                 return r;
4705
4706         *pdata = msr.data;
4707         return 0;
4708 }
4709
4710 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4711                             u32 msr_index, u64 data)
4712 {
4713         struct msr_data msr;
4714
4715         msr.data = data;
4716         msr.index = msr_index;
4717         msr.host_initiated = false;
4718         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4719 }
4720
4721 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4722 {
4723         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4724
4725         return vcpu->arch.smbase;
4726 }
4727
4728 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4729 {
4730         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4731
4732         vcpu->arch.smbase = smbase;
4733 }
4734
4735 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4736                               u32 pmc)
4737 {
4738         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4739 }
4740
4741 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4742                              u32 pmc, u64 *pdata)
4743 {
4744         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4745 }
4746
4747 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4748 {
4749         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4750 }
4751
4752 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4753 {
4754         preempt_disable();
4755         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4756         /*
4757          * CR0.TS may reference the host fpu state, not the guest fpu state,
4758          * so it may be clear at this point.
4759          */
4760         clts();
4761 }
4762
4763 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4764 {
4765         preempt_enable();
4766 }
4767
4768 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4769                               struct x86_instruction_info *info,
4770                               enum x86_intercept_stage stage)
4771 {
4772         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4773 }
4774
4775 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4776                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4777 {
4778         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4779 }
4780
4781 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4782 {
4783         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4784 }
4785
4786 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4787 {
4788         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4789 }
4790
4791 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4792 {
4793         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4794 }
4795
4796 static const struct x86_emulate_ops emulate_ops = {
4797         .read_gpr            = emulator_read_gpr,
4798         .write_gpr           = emulator_write_gpr,
4799         .read_std            = kvm_read_guest_virt_system,
4800         .write_std           = kvm_write_guest_virt_system,
4801         .fetch               = kvm_fetch_guest_virt,
4802         .read_emulated       = emulator_read_emulated,
4803         .write_emulated      = emulator_write_emulated,
4804         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4805         .invlpg              = emulator_invlpg,
4806         .pio_in_emulated     = emulator_pio_in_emulated,
4807         .pio_out_emulated    = emulator_pio_out_emulated,
4808         .get_segment         = emulator_get_segment,
4809         .set_segment         = emulator_set_segment,
4810         .get_cached_segment_base = emulator_get_cached_segment_base,
4811         .get_gdt             = emulator_get_gdt,
4812         .get_idt             = emulator_get_idt,
4813         .set_gdt             = emulator_set_gdt,
4814         .set_idt             = emulator_set_idt,
4815         .get_cr              = emulator_get_cr,
4816         .set_cr              = emulator_set_cr,
4817         .cpl                 = emulator_get_cpl,
4818         .get_dr              = emulator_get_dr,
4819         .set_dr              = emulator_set_dr,
4820         .get_smbase          = emulator_get_smbase,
4821         .set_smbase          = emulator_set_smbase,
4822         .set_msr             = emulator_set_msr,
4823         .get_msr             = emulator_get_msr,
4824         .check_pmc           = emulator_check_pmc,
4825         .read_pmc            = emulator_read_pmc,
4826         .halt                = emulator_halt,
4827         .wbinvd              = emulator_wbinvd,
4828         .fix_hypercall       = emulator_fix_hypercall,
4829         .get_fpu             = emulator_get_fpu,
4830         .put_fpu             = emulator_put_fpu,
4831         .intercept           = emulator_intercept,
4832         .get_cpuid           = emulator_get_cpuid,
4833         .set_nmi_mask        = emulator_set_nmi_mask,
4834 };
4835
4836 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4837 {
4838         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4839         /*
4840          * an sti; sti; sequence only disable interrupts for the first
4841          * instruction. So, if the last instruction, be it emulated or
4842          * not, left the system with the INT_STI flag enabled, it
4843          * means that the last instruction is an sti. We should not
4844          * leave the flag on in this case. The same goes for mov ss
4845          */
4846         if (int_shadow & mask)
4847                 mask = 0;
4848         if (unlikely(int_shadow || mask)) {
4849                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4850                 if (!mask)
4851                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4852         }
4853 }
4854
4855 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4856 {
4857         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4858         if (ctxt->exception.vector == PF_VECTOR)
4859                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4860
4861         if (ctxt->exception.error_code_valid)
4862                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4863                                       ctxt->exception.error_code);
4864         else
4865                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4866         return false;
4867 }
4868
4869 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4870 {
4871         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4872         int cs_db, cs_l;
4873
4874         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4875
4876         ctxt->eflags = kvm_get_rflags(vcpu);
4877         ctxt->eip = kvm_rip_read(vcpu);
4878         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4879                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4880                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4881                      cs_db                              ? X86EMUL_MODE_PROT32 :
4882                                                           X86EMUL_MODE_PROT16;
4883         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4884         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4885         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4886         ctxt->emul_flags = vcpu->arch.hflags;
4887
4888         init_decode_cache(ctxt);
4889         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4890 }
4891
4892 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4893 {
4894         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4895         int ret;
4896
4897         init_emulate_ctxt(vcpu);
4898
4899         ctxt->op_bytes = 2;
4900         ctxt->ad_bytes = 2;
4901         ctxt->_eip = ctxt->eip + inc_eip;
4902         ret = emulate_int_real(ctxt, irq);
4903
4904         if (ret != X86EMUL_CONTINUE)
4905                 return EMULATE_FAIL;
4906
4907         ctxt->eip = ctxt->_eip;
4908         kvm_rip_write(vcpu, ctxt->eip);
4909         kvm_set_rflags(vcpu, ctxt->eflags);
4910
4911         if (irq == NMI_VECTOR)
4912                 vcpu->arch.nmi_pending = 0;
4913         else
4914                 vcpu->arch.interrupt.pending = false;
4915
4916         return EMULATE_DONE;
4917 }
4918 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4919
4920 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4921 {
4922         int r = EMULATE_DONE;
4923
4924         ++vcpu->stat.insn_emulation_fail;
4925         trace_kvm_emulate_insn_failed(vcpu);
4926         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4927                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4928                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4929                 vcpu->run->internal.ndata = 0;
4930                 r = EMULATE_FAIL;
4931         }
4932         kvm_queue_exception(vcpu, UD_VECTOR);
4933
4934         return r;
4935 }
4936
4937 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4938                                   bool write_fault_to_shadow_pgtable,
4939                                   int emulation_type)
4940 {
4941         gpa_t gpa = cr2;
4942         pfn_t pfn;
4943
4944         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4945                 return false;
4946
4947         if (!vcpu->arch.mmu.direct_map) {
4948                 /*
4949                  * Write permission should be allowed since only
4950                  * write access need to be emulated.
4951                  */
4952                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4953
4954                 /*
4955                  * If the mapping is invalid in guest, let cpu retry
4956                  * it to generate fault.
4957                  */
4958                 if (gpa == UNMAPPED_GVA)
4959                         return true;
4960         }
4961
4962         /*
4963          * Do not retry the unhandleable instruction if it faults on the
4964          * readonly host memory, otherwise it will goto a infinite loop:
4965          * retry instruction -> write #PF -> emulation fail -> retry
4966          * instruction -> ...
4967          */
4968         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4969
4970         /*
4971          * If the instruction failed on the error pfn, it can not be fixed,
4972          * report the error to userspace.
4973          */
4974         if (is_error_noslot_pfn(pfn))
4975                 return false;
4976
4977         kvm_release_pfn_clean(pfn);
4978
4979         /* The instructions are well-emulated on direct mmu. */
4980         if (vcpu->arch.mmu.direct_map) {
4981                 unsigned int indirect_shadow_pages;
4982
4983                 spin_lock(&vcpu->kvm->mmu_lock);
4984                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4985                 spin_unlock(&vcpu->kvm->mmu_lock);
4986
4987                 if (indirect_shadow_pages)
4988                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4989
4990                 return true;
4991         }
4992
4993         /*
4994          * if emulation was due to access to shadowed page table
4995          * and it failed try to unshadow page and re-enter the
4996          * guest to let CPU execute the instruction.
4997          */
4998         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4999
5000         /*
5001          * If the access faults on its page table, it can not
5002          * be fixed by unprotecting shadow page and it should
5003          * be reported to userspace.
5004          */
5005         return !write_fault_to_shadow_pgtable;
5006 }
5007
5008 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5009                               unsigned long cr2,  int emulation_type)
5010 {
5011         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5012         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5013
5014         last_retry_eip = vcpu->arch.last_retry_eip;
5015         last_retry_addr = vcpu->arch.last_retry_addr;
5016
5017         /*
5018          * If the emulation is caused by #PF and it is non-page_table
5019          * writing instruction, it means the VM-EXIT is caused by shadow
5020          * page protected, we can zap the shadow page and retry this
5021          * instruction directly.
5022          *
5023          * Note: if the guest uses a non-page-table modifying instruction
5024          * on the PDE that points to the instruction, then we will unmap
5025          * the instruction and go to an infinite loop. So, we cache the
5026          * last retried eip and the last fault address, if we meet the eip
5027          * and the address again, we can break out of the potential infinite
5028          * loop.
5029          */
5030         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5031
5032         if (!(emulation_type & EMULTYPE_RETRY))
5033                 return false;
5034
5035         if (x86_page_table_writing_insn(ctxt))
5036                 return false;
5037
5038         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5039                 return false;
5040
5041         vcpu->arch.last_retry_eip = ctxt->eip;
5042         vcpu->arch.last_retry_addr = cr2;
5043
5044         if (!vcpu->arch.mmu.direct_map)
5045                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5046
5047         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5048
5049         return true;
5050 }
5051
5052 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5053 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5054
5055 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5056 {
5057         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5058                 /* This is a good place to trace that we are exiting SMM.  */
5059                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5060
5061                 if (unlikely(vcpu->arch.smi_pending)) {
5062                         kvm_make_request(KVM_REQ_SMI, vcpu);
5063                         vcpu->arch.smi_pending = 0;
5064                 } else {
5065                         /* Process a latched INIT, if any.  */
5066                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5067                 }
5068         }
5069
5070         kvm_mmu_reset_context(vcpu);
5071 }
5072
5073 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5074 {
5075         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5076
5077         vcpu->arch.hflags = emul_flags;
5078
5079         if (changed & HF_SMM_MASK)
5080                 kvm_smm_changed(vcpu);
5081 }
5082
5083 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5084                                 unsigned long *db)
5085 {
5086         u32 dr6 = 0;
5087         int i;
5088         u32 enable, rwlen;
5089
5090         enable = dr7;
5091         rwlen = dr7 >> 16;
5092         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5093                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5094                         dr6 |= (1 << i);
5095         return dr6;
5096 }
5097
5098 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5099 {
5100         struct kvm_run *kvm_run = vcpu->run;
5101
5102         /*
5103          * rflags is the old, "raw" value of the flags.  The new value has
5104          * not been saved yet.
5105          *
5106          * This is correct even for TF set by the guest, because "the
5107          * processor will not generate this exception after the instruction
5108          * that sets the TF flag".
5109          */
5110         if (unlikely(rflags & X86_EFLAGS_TF)) {
5111                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5112                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5113                                                   DR6_RTM;
5114                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5115                         kvm_run->debug.arch.exception = DB_VECTOR;
5116                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5117                         *r = EMULATE_USER_EXIT;
5118                 } else {
5119                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5120                         /*
5121                          * "Certain debug exceptions may clear bit 0-3.  The
5122                          * remaining contents of the DR6 register are never
5123                          * cleared by the processor".
5124                          */
5125                         vcpu->arch.dr6 &= ~15;
5126                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5127                         kvm_queue_exception(vcpu, DB_VECTOR);
5128                 }
5129         }
5130 }
5131
5132 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5133 {
5134         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5135             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5136                 struct kvm_run *kvm_run = vcpu->run;
5137                 unsigned long eip = kvm_get_linear_rip(vcpu);
5138                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5139                                            vcpu->arch.guest_debug_dr7,
5140                                            vcpu->arch.eff_db);
5141
5142                 if (dr6 != 0) {
5143                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5144                         kvm_run->debug.arch.pc = eip;
5145                         kvm_run->debug.arch.exception = DB_VECTOR;
5146                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5147                         *r = EMULATE_USER_EXIT;
5148                         return true;
5149                 }
5150         }
5151
5152         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5153             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5154                 unsigned long eip = kvm_get_linear_rip(vcpu);
5155                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5156                                            vcpu->arch.dr7,
5157                                            vcpu->arch.db);
5158
5159                 if (dr6 != 0) {
5160                         vcpu->arch.dr6 &= ~15;
5161                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5162                         kvm_queue_exception(vcpu, DB_VECTOR);
5163                         *r = EMULATE_DONE;
5164                         return true;
5165                 }
5166         }
5167
5168         return false;
5169 }
5170
5171 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5172                             unsigned long cr2,
5173                             int emulation_type,
5174                             void *insn,
5175                             int insn_len)
5176 {
5177         int r;
5178         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5179         bool writeback = true;
5180         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5181
5182         /*
5183          * Clear write_fault_to_shadow_pgtable here to ensure it is
5184          * never reused.
5185          */
5186         vcpu->arch.write_fault_to_shadow_pgtable = false;
5187         kvm_clear_exception_queue(vcpu);
5188
5189         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5190                 init_emulate_ctxt(vcpu);
5191
5192                 /*
5193                  * We will reenter on the same instruction since
5194                  * we do not set complete_userspace_io.  This does not
5195                  * handle watchpoints yet, those would be handled in
5196                  * the emulate_ops.
5197                  */
5198                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5199                         return r;
5200
5201                 ctxt->interruptibility = 0;
5202                 ctxt->have_exception = false;
5203                 ctxt->exception.vector = -1;
5204                 ctxt->perm_ok = false;
5205
5206                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5207
5208                 r = x86_decode_insn(ctxt, insn, insn_len);
5209
5210                 trace_kvm_emulate_insn_start(vcpu);
5211                 ++vcpu->stat.insn_emulation;
5212                 if (r != EMULATION_OK)  {
5213                         if (emulation_type & EMULTYPE_TRAP_UD)
5214                                 return EMULATE_FAIL;
5215                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5216                                                 emulation_type))
5217                                 return EMULATE_DONE;
5218                         if (emulation_type & EMULTYPE_SKIP)
5219                                 return EMULATE_FAIL;
5220                         return handle_emulation_failure(vcpu);
5221                 }
5222         }
5223
5224         if (emulation_type & EMULTYPE_SKIP) {
5225                 kvm_rip_write(vcpu, ctxt->_eip);
5226                 if (ctxt->eflags & X86_EFLAGS_RF)
5227                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5228                 return EMULATE_DONE;
5229         }
5230
5231         if (retry_instruction(ctxt, cr2, emulation_type))
5232                 return EMULATE_DONE;
5233
5234         /* this is needed for vmware backdoor interface to work since it
5235            changes registers values  during IO operation */
5236         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5237                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5238                 emulator_invalidate_register_cache(ctxt);
5239         }
5240
5241 restart:
5242         r = x86_emulate_insn(ctxt);
5243
5244         if (r == EMULATION_INTERCEPTED)
5245                 return EMULATE_DONE;
5246
5247         if (r == EMULATION_FAILED) {
5248                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5249                                         emulation_type))
5250                         return EMULATE_DONE;
5251
5252                 return handle_emulation_failure(vcpu);
5253         }
5254
5255         if (ctxt->have_exception) {
5256                 r = EMULATE_DONE;
5257                 if (inject_emulated_exception(vcpu))
5258                         return r;
5259         } else if (vcpu->arch.pio.count) {
5260                 if (!vcpu->arch.pio.in) {
5261                         /* FIXME: return into emulator if single-stepping.  */
5262                         vcpu->arch.pio.count = 0;
5263                 } else {
5264                         writeback = false;
5265                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5266                 }
5267                 r = EMULATE_USER_EXIT;
5268         } else if (vcpu->mmio_needed) {
5269                 if (!vcpu->mmio_is_write)
5270                         writeback = false;
5271                 r = EMULATE_USER_EXIT;
5272                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5273         } else if (r == EMULATION_RESTART)
5274                 goto restart;
5275         else
5276                 r = EMULATE_DONE;
5277
5278         if (writeback) {
5279                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5280                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5281                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5282                 if (vcpu->arch.hflags != ctxt->emul_flags)
5283                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5284                 kvm_rip_write(vcpu, ctxt->eip);
5285                 if (r == EMULATE_DONE)
5286                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5287                 if (!ctxt->have_exception ||
5288                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5289                         __kvm_set_rflags(vcpu, ctxt->eflags);
5290
5291                 /*
5292                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5293                  * do nothing, and it will be requested again as soon as
5294                  * the shadow expires.  But we still need to check here,
5295                  * because POPF has no interrupt shadow.
5296                  */
5297                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5298                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5299         } else
5300                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5301
5302         return r;
5303 }
5304 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5305
5306 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5307 {
5308         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5309         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5310                                             size, port, &val, 1);
5311         /* do not return to emulator after return from userspace */
5312         vcpu->arch.pio.count = 0;
5313         return ret;
5314 }
5315 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5316
5317 static void tsc_bad(void *info)
5318 {
5319         __this_cpu_write(cpu_tsc_khz, 0);
5320 }
5321
5322 static void tsc_khz_changed(void *data)
5323 {
5324         struct cpufreq_freqs *freq = data;
5325         unsigned long khz = 0;
5326
5327         if (data)
5328                 khz = freq->new;
5329         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5330                 khz = cpufreq_quick_get(raw_smp_processor_id());
5331         if (!khz)
5332                 khz = tsc_khz;
5333         __this_cpu_write(cpu_tsc_khz, khz);
5334 }
5335
5336 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5337                                      void *data)
5338 {
5339         struct cpufreq_freqs *freq = data;
5340         struct kvm *kvm;
5341         struct kvm_vcpu *vcpu;
5342         int i, send_ipi = 0;
5343
5344         /*
5345          * We allow guests to temporarily run on slowing clocks,
5346          * provided we notify them after, or to run on accelerating
5347          * clocks, provided we notify them before.  Thus time never
5348          * goes backwards.
5349          *
5350          * However, we have a problem.  We can't atomically update
5351          * the frequency of a given CPU from this function; it is
5352          * merely a notifier, which can be called from any CPU.
5353          * Changing the TSC frequency at arbitrary points in time
5354          * requires a recomputation of local variables related to
5355          * the TSC for each VCPU.  We must flag these local variables
5356          * to be updated and be sure the update takes place with the
5357          * new frequency before any guests proceed.
5358          *
5359          * Unfortunately, the combination of hotplug CPU and frequency
5360          * change creates an intractable locking scenario; the order
5361          * of when these callouts happen is undefined with respect to
5362          * CPU hotplug, and they can race with each other.  As such,
5363          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5364          * undefined; you can actually have a CPU frequency change take
5365          * place in between the computation of X and the setting of the
5366          * variable.  To protect against this problem, all updates of
5367          * the per_cpu tsc_khz variable are done in an interrupt
5368          * protected IPI, and all callers wishing to update the value
5369          * must wait for a synchronous IPI to complete (which is trivial
5370          * if the caller is on the CPU already).  This establishes the
5371          * necessary total order on variable updates.
5372          *
5373          * Note that because a guest time update may take place
5374          * anytime after the setting of the VCPU's request bit, the
5375          * correct TSC value must be set before the request.  However,
5376          * to ensure the update actually makes it to any guest which
5377          * starts running in hardware virtualization between the set
5378          * and the acquisition of the spinlock, we must also ping the
5379          * CPU after setting the request bit.
5380          *
5381          */
5382
5383         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5384                 return 0;
5385         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5386                 return 0;
5387
5388         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5389
5390         spin_lock(&kvm_lock);
5391         list_for_each_entry(kvm, &vm_list, vm_list) {
5392                 kvm_for_each_vcpu(i, vcpu, kvm) {
5393                         if (vcpu->cpu != freq->cpu)
5394                                 continue;
5395                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5396                         if (vcpu->cpu != smp_processor_id())
5397                                 send_ipi = 1;
5398                 }
5399         }
5400         spin_unlock(&kvm_lock);
5401
5402         if (freq->old < freq->new && send_ipi) {
5403                 /*
5404                  * We upscale the frequency.  Must make the guest
5405                  * doesn't see old kvmclock values while running with
5406                  * the new frequency, otherwise we risk the guest sees
5407                  * time go backwards.
5408                  *
5409                  * In case we update the frequency for another cpu
5410                  * (which might be in guest context) send an interrupt
5411                  * to kick the cpu out of guest context.  Next time
5412                  * guest context is entered kvmclock will be updated,
5413                  * so the guest will not see stale values.
5414                  */
5415                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5416         }
5417         return 0;
5418 }
5419
5420 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5421         .notifier_call  = kvmclock_cpufreq_notifier
5422 };
5423
5424 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5425                                         unsigned long action, void *hcpu)
5426 {
5427         unsigned int cpu = (unsigned long)hcpu;
5428
5429         switch (action) {
5430                 case CPU_ONLINE:
5431                 case CPU_DOWN_FAILED:
5432                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5433                         break;
5434                 case CPU_DOWN_PREPARE:
5435                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5436                         break;
5437         }
5438         return NOTIFY_OK;
5439 }
5440
5441 static struct notifier_block kvmclock_cpu_notifier_block = {
5442         .notifier_call  = kvmclock_cpu_notifier,
5443         .priority = -INT_MAX
5444 };
5445
5446 static void kvm_timer_init(void)
5447 {
5448         int cpu;
5449
5450         max_tsc_khz = tsc_khz;
5451
5452         cpu_notifier_register_begin();
5453         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5454 #ifdef CONFIG_CPU_FREQ
5455                 struct cpufreq_policy policy;
5456                 memset(&policy, 0, sizeof(policy));
5457                 cpu = get_cpu();
5458                 cpufreq_get_policy(&policy, cpu);
5459                 if (policy.cpuinfo.max_freq)
5460                         max_tsc_khz = policy.cpuinfo.max_freq;
5461                 put_cpu();
5462 #endif
5463                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5464                                           CPUFREQ_TRANSITION_NOTIFIER);
5465         }
5466         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5467         for_each_online_cpu(cpu)
5468                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5469
5470         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5471         cpu_notifier_register_done();
5472
5473 }
5474
5475 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5476
5477 int kvm_is_in_guest(void)
5478 {
5479         return __this_cpu_read(current_vcpu) != NULL;
5480 }
5481
5482 static int kvm_is_user_mode(void)
5483 {
5484         int user_mode = 3;
5485
5486         if (__this_cpu_read(current_vcpu))
5487                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5488
5489         return user_mode != 0;
5490 }
5491
5492 static unsigned long kvm_get_guest_ip(void)
5493 {
5494         unsigned long ip = 0;
5495
5496         if (__this_cpu_read(current_vcpu))
5497                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5498
5499         return ip;
5500 }
5501
5502 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5503         .is_in_guest            = kvm_is_in_guest,
5504         .is_user_mode           = kvm_is_user_mode,
5505         .get_guest_ip           = kvm_get_guest_ip,
5506 };
5507
5508 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5509 {
5510         __this_cpu_write(current_vcpu, vcpu);
5511 }
5512 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5513
5514 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5515 {
5516         __this_cpu_write(current_vcpu, NULL);
5517 }
5518 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5519
5520 static void kvm_set_mmio_spte_mask(void)
5521 {
5522         u64 mask;
5523         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5524
5525         /*
5526          * Set the reserved bits and the present bit of an paging-structure
5527          * entry to generate page fault with PFER.RSV = 1.
5528          */
5529          /* Mask the reserved physical address bits. */
5530         mask = rsvd_bits(maxphyaddr, 51);
5531
5532         /* Bit 62 is always reserved for 32bit host. */
5533         mask |= 0x3ull << 62;
5534
5535         /* Set the present bit. */
5536         mask |= 1ull;
5537
5538 #ifdef CONFIG_X86_64
5539         /*
5540          * If reserved bit is not supported, clear the present bit to disable
5541          * mmio page fault.
5542          */
5543         if (maxphyaddr == 52)
5544                 mask &= ~1ull;
5545 #endif
5546
5547         kvm_mmu_set_mmio_spte_mask(mask);
5548 }
5549
5550 #ifdef CONFIG_X86_64
5551 static void pvclock_gtod_update_fn(struct work_struct *work)
5552 {
5553         struct kvm *kvm;
5554
5555         struct kvm_vcpu *vcpu;
5556         int i;
5557
5558         spin_lock(&kvm_lock);
5559         list_for_each_entry(kvm, &vm_list, vm_list)
5560                 kvm_for_each_vcpu(i, vcpu, kvm)
5561                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5562         atomic_set(&kvm_guest_has_master_clock, 0);
5563         spin_unlock(&kvm_lock);
5564 }
5565
5566 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5567
5568 /*
5569  * Notification about pvclock gtod data update.
5570  */
5571 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5572                                void *priv)
5573 {
5574         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5575         struct timekeeper *tk = priv;
5576
5577         update_pvclock_gtod(tk);
5578
5579         /* disable master clock if host does not trust, or does not
5580          * use, TSC clocksource
5581          */
5582         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5583             atomic_read(&kvm_guest_has_master_clock) != 0)
5584                 queue_work(system_long_wq, &pvclock_gtod_work);
5585
5586         return 0;
5587 }
5588
5589 static struct notifier_block pvclock_gtod_notifier = {
5590         .notifier_call = pvclock_gtod_notify,
5591 };
5592 #endif
5593
5594 int kvm_arch_init(void *opaque)
5595 {
5596         int r;
5597         struct kvm_x86_ops *ops = opaque;
5598
5599         if (kvm_x86_ops) {
5600                 printk(KERN_ERR "kvm: already loaded the other module\n");
5601                 r = -EEXIST;
5602                 goto out;
5603         }
5604
5605         if (!ops->cpu_has_kvm_support()) {
5606                 printk(KERN_ERR "kvm: no hardware support\n");
5607                 r = -EOPNOTSUPP;
5608                 goto out;
5609         }
5610         if (ops->disabled_by_bios()) {
5611                 printk(KERN_ERR "kvm: disabled by bios\n");
5612                 r = -EOPNOTSUPP;
5613                 goto out;
5614         }
5615
5616         r = -ENOMEM;
5617         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5618         if (!shared_msrs) {
5619                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5620                 goto out;
5621         }
5622
5623         r = kvm_mmu_module_init();
5624         if (r)
5625                 goto out_free_percpu;
5626
5627         kvm_set_mmio_spte_mask();
5628
5629         kvm_x86_ops = ops;
5630
5631         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5632                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5633
5634         kvm_timer_init();
5635
5636         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5637
5638         if (cpu_has_xsave)
5639                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5640
5641         kvm_lapic_init();
5642 #ifdef CONFIG_X86_64
5643         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5644 #endif
5645
5646         return 0;
5647
5648 out_free_percpu:
5649         free_percpu(shared_msrs);
5650 out:
5651         return r;
5652 }
5653
5654 void kvm_arch_exit(void)
5655 {
5656         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5657
5658         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5659                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5660                                             CPUFREQ_TRANSITION_NOTIFIER);
5661         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5662 #ifdef CONFIG_X86_64
5663         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5664 #endif
5665         kvm_x86_ops = NULL;
5666         kvm_mmu_module_exit();
5667         free_percpu(shared_msrs);
5668 }
5669
5670 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5671 {
5672         ++vcpu->stat.halt_exits;
5673         if (irqchip_in_kernel(vcpu->kvm)) {
5674                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5675                 return 1;
5676         } else {
5677                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5678                 return 0;
5679         }
5680 }
5681 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5682
5683 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5684 {
5685         kvm_x86_ops->skip_emulated_instruction(vcpu);
5686         return kvm_vcpu_halt(vcpu);
5687 }
5688 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5689
5690 /*
5691  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5692  *
5693  * @apicid - apicid of vcpu to be kicked.
5694  */
5695 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5696 {
5697         struct kvm_lapic_irq lapic_irq;
5698
5699         lapic_irq.shorthand = 0;
5700         lapic_irq.dest_mode = 0;
5701         lapic_irq.dest_id = apicid;
5702         lapic_irq.msi_redir_hint = false;
5703
5704         lapic_irq.delivery_mode = APIC_DM_REMRD;
5705         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5706 }
5707
5708 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5709 {
5710         unsigned long nr, a0, a1, a2, a3, ret;
5711         int op_64_bit, r = 1;
5712
5713         kvm_x86_ops->skip_emulated_instruction(vcpu);
5714
5715         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5716                 return kvm_hv_hypercall(vcpu);
5717
5718         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5719         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5720         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5721         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5722         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5723
5724         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5725
5726         op_64_bit = is_64_bit_mode(vcpu);
5727         if (!op_64_bit) {
5728                 nr &= 0xFFFFFFFF;
5729                 a0 &= 0xFFFFFFFF;
5730                 a1 &= 0xFFFFFFFF;
5731                 a2 &= 0xFFFFFFFF;
5732                 a3 &= 0xFFFFFFFF;
5733         }
5734
5735         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5736                 ret = -KVM_EPERM;
5737                 goto out;
5738         }
5739
5740         switch (nr) {
5741         case KVM_HC_VAPIC_POLL_IRQ:
5742                 ret = 0;
5743                 break;
5744         case KVM_HC_KICK_CPU:
5745                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5746                 ret = 0;
5747                 break;
5748         default:
5749                 ret = -KVM_ENOSYS;
5750                 break;
5751         }
5752 out:
5753         if (!op_64_bit)
5754                 ret = (u32)ret;
5755         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5756         ++vcpu->stat.hypercalls;
5757         return r;
5758 }
5759 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5760
5761 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5762 {
5763         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5764         char instruction[3];
5765         unsigned long rip = kvm_rip_read(vcpu);
5766
5767         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5768
5769         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5770 }
5771
5772 /*
5773  * Check if userspace requested an interrupt window, and that the
5774  * interrupt window is open.
5775  *
5776  * No need to exit to userspace if we already have an interrupt queued.
5777  */
5778 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5779 {
5780         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5781                 vcpu->run->request_interrupt_window &&
5782                 kvm_arch_interrupt_allowed(vcpu));
5783 }
5784
5785 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5786 {
5787         struct kvm_run *kvm_run = vcpu->run;
5788
5789         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5790         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5791         kvm_run->cr8 = kvm_get_cr8(vcpu);
5792         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5793         if (irqchip_in_kernel(vcpu->kvm))
5794                 kvm_run->ready_for_interrupt_injection = 1;
5795         else
5796                 kvm_run->ready_for_interrupt_injection =
5797                         kvm_arch_interrupt_allowed(vcpu) &&
5798                         !kvm_cpu_has_interrupt(vcpu) &&
5799                         !kvm_event_needs_reinjection(vcpu);
5800 }
5801
5802 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5803 {
5804         int max_irr, tpr;
5805
5806         if (!kvm_x86_ops->update_cr8_intercept)
5807                 return;
5808
5809         if (!vcpu->arch.apic)
5810                 return;
5811
5812         if (!vcpu->arch.apic->vapic_addr)
5813                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5814         else
5815                 max_irr = -1;
5816
5817         if (max_irr != -1)
5818                 max_irr >>= 4;
5819
5820         tpr = kvm_lapic_get_cr8(vcpu);
5821
5822         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5823 }
5824
5825 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5826 {
5827         int r;
5828
5829         /* try to reinject previous events if any */
5830         if (vcpu->arch.exception.pending) {
5831                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5832                                         vcpu->arch.exception.has_error_code,
5833                                         vcpu->arch.exception.error_code);
5834
5835                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5836                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5837                                              X86_EFLAGS_RF);
5838
5839                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5840                     (vcpu->arch.dr7 & DR7_GD)) {
5841                         vcpu->arch.dr7 &= ~DR7_GD;
5842                         kvm_update_dr7(vcpu);
5843                 }
5844
5845                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5846                                           vcpu->arch.exception.has_error_code,
5847                                           vcpu->arch.exception.error_code,
5848                                           vcpu->arch.exception.reinject);
5849                 return 0;
5850         }
5851
5852         if (vcpu->arch.nmi_injected) {
5853                 kvm_x86_ops->set_nmi(vcpu);
5854                 return 0;
5855         }
5856
5857         if (vcpu->arch.interrupt.pending) {
5858                 kvm_x86_ops->set_irq(vcpu);
5859                 return 0;
5860         }
5861
5862         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5863                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5864                 if (r != 0)
5865                         return r;
5866         }
5867
5868         /* try to inject new event if pending */
5869         if (vcpu->arch.nmi_pending) {
5870                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5871                         --vcpu->arch.nmi_pending;
5872                         vcpu->arch.nmi_injected = true;
5873                         kvm_x86_ops->set_nmi(vcpu);
5874                 }
5875         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5876                 /*
5877                  * Because interrupts can be injected asynchronously, we are
5878                  * calling check_nested_events again here to avoid a race condition.
5879                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5880                  * proposal and current concerns.  Perhaps we should be setting
5881                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5882                  */
5883                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5884                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5885                         if (r != 0)
5886                                 return r;
5887                 }
5888                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5889                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5890                                             false);
5891                         kvm_x86_ops->set_irq(vcpu);
5892                 }
5893         }
5894         return 0;
5895 }
5896
5897 static void process_nmi(struct kvm_vcpu *vcpu)
5898 {
5899         unsigned limit = 2;
5900
5901         /*
5902          * x86 is limited to one NMI running, and one NMI pending after it.
5903          * If an NMI is already in progress, limit further NMIs to just one.
5904          * Otherwise, allow two (and we'll inject the first one immediately).
5905          */
5906         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5907                 limit = 1;
5908
5909         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5910         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5911         kvm_make_request(KVM_REQ_EVENT, vcpu);
5912 }
5913
5914 #define put_smstate(type, buf, offset, val)                       \
5915         *(type *)((buf) + (offset) - 0x7e00) = val
5916
5917 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5918 {
5919         u32 flags = 0;
5920         flags |= seg->g       << 23;
5921         flags |= seg->db      << 22;
5922         flags |= seg->l       << 21;
5923         flags |= seg->avl     << 20;
5924         flags |= seg->present << 15;
5925         flags |= seg->dpl     << 13;
5926         flags |= seg->s       << 12;
5927         flags |= seg->type    << 8;
5928         return flags;
5929 }
5930
5931 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5932 {
5933         struct kvm_segment seg;
5934         int offset;
5935
5936         kvm_get_segment(vcpu, &seg, n);
5937         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5938
5939         if (n < 3)
5940                 offset = 0x7f84 + n * 12;
5941         else
5942                 offset = 0x7f2c + (n - 3) * 12;
5943
5944         put_smstate(u32, buf, offset + 8, seg.base);
5945         put_smstate(u32, buf, offset + 4, seg.limit);
5946         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5947 }
5948
5949 #ifdef CONFIG_X86_64
5950 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5951 {
5952         struct kvm_segment seg;
5953         int offset;
5954         u16 flags;
5955
5956         kvm_get_segment(vcpu, &seg, n);
5957         offset = 0x7e00 + n * 16;
5958
5959         flags = process_smi_get_segment_flags(&seg) >> 8;
5960         put_smstate(u16, buf, offset, seg.selector);
5961         put_smstate(u16, buf, offset + 2, flags);
5962         put_smstate(u32, buf, offset + 4, seg.limit);
5963         put_smstate(u64, buf, offset + 8, seg.base);
5964 }
5965 #endif
5966
5967 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
5968 {
5969         struct desc_ptr dt;
5970         struct kvm_segment seg;
5971         unsigned long val;
5972         int i;
5973
5974         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
5975         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
5976         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
5977         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
5978
5979         for (i = 0; i < 8; i++)
5980                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
5981
5982         kvm_get_dr(vcpu, 6, &val);
5983         put_smstate(u32, buf, 0x7fcc, (u32)val);
5984         kvm_get_dr(vcpu, 7, &val);
5985         put_smstate(u32, buf, 0x7fc8, (u32)val);
5986
5987         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
5988         put_smstate(u32, buf, 0x7fc4, seg.selector);
5989         put_smstate(u32, buf, 0x7f64, seg.base);
5990         put_smstate(u32, buf, 0x7f60, seg.limit);
5991         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
5992
5993         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
5994         put_smstate(u32, buf, 0x7fc0, seg.selector);
5995         put_smstate(u32, buf, 0x7f80, seg.base);
5996         put_smstate(u32, buf, 0x7f7c, seg.limit);
5997         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
5998
5999         kvm_x86_ops->get_gdt(vcpu, &dt);
6000         put_smstate(u32, buf, 0x7f74, dt.address);
6001         put_smstate(u32, buf, 0x7f70, dt.size);
6002
6003         kvm_x86_ops->get_idt(vcpu, &dt);
6004         put_smstate(u32, buf, 0x7f58, dt.address);
6005         put_smstate(u32, buf, 0x7f54, dt.size);
6006
6007         for (i = 0; i < 6; i++)
6008                 process_smi_save_seg_32(vcpu, buf, i);
6009
6010         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6011
6012         /* revision id */
6013         put_smstate(u32, buf, 0x7efc, 0x00020000);
6014         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6015 }
6016
6017 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6018 {
6019 #ifdef CONFIG_X86_64
6020         struct desc_ptr dt;
6021         struct kvm_segment seg;
6022         unsigned long val;
6023         int i;
6024
6025         for (i = 0; i < 16; i++)
6026                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6027
6028         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6029         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6030
6031         kvm_get_dr(vcpu, 6, &val);
6032         put_smstate(u64, buf, 0x7f68, val);
6033         kvm_get_dr(vcpu, 7, &val);
6034         put_smstate(u64, buf, 0x7f60, val);
6035
6036         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6037         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6038         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6039
6040         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6041
6042         /* revision id */
6043         put_smstate(u32, buf, 0x7efc, 0x00020064);
6044
6045         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6046
6047         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6048         put_smstate(u16, buf, 0x7e90, seg.selector);
6049         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6050         put_smstate(u32, buf, 0x7e94, seg.limit);
6051         put_smstate(u64, buf, 0x7e98, seg.base);
6052
6053         kvm_x86_ops->get_idt(vcpu, &dt);
6054         put_smstate(u32, buf, 0x7e84, dt.size);
6055         put_smstate(u64, buf, 0x7e88, dt.address);
6056
6057         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6058         put_smstate(u16, buf, 0x7e70, seg.selector);
6059         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6060         put_smstate(u32, buf, 0x7e74, seg.limit);
6061         put_smstate(u64, buf, 0x7e78, seg.base);
6062
6063         kvm_x86_ops->get_gdt(vcpu, &dt);
6064         put_smstate(u32, buf, 0x7e64, dt.size);
6065         put_smstate(u64, buf, 0x7e68, dt.address);
6066
6067         for (i = 0; i < 6; i++)
6068                 process_smi_save_seg_64(vcpu, buf, i);
6069 #else
6070         WARN_ON_ONCE(1);
6071 #endif
6072 }
6073
6074 static void process_smi(struct kvm_vcpu *vcpu)
6075 {
6076         struct kvm_segment cs, ds;
6077         struct desc_ptr dt;
6078         char buf[512];
6079         u32 cr0;
6080
6081         if (is_smm(vcpu)) {
6082                 vcpu->arch.smi_pending = true;
6083                 return;
6084         }
6085
6086         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6087         vcpu->arch.hflags |= HF_SMM_MASK;
6088         memset(buf, 0, 512);
6089         if (guest_cpuid_has_longmode(vcpu))
6090                 process_smi_save_state_64(vcpu, buf);
6091         else
6092                 process_smi_save_state_32(vcpu, buf);
6093
6094         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6095
6096         if (kvm_x86_ops->get_nmi_mask(vcpu))
6097                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6098         else
6099                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6100
6101         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6102         kvm_rip_write(vcpu, 0x8000);
6103
6104         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6105         kvm_x86_ops->set_cr0(vcpu, cr0);
6106         vcpu->arch.cr0 = cr0;
6107
6108         kvm_x86_ops->set_cr4(vcpu, 0);
6109
6110         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6111         dt.address = dt.size = 0;
6112         kvm_x86_ops->set_idt(vcpu, &dt);
6113
6114         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6115
6116         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6117         cs.base = vcpu->arch.smbase;
6118
6119         ds.selector = 0;
6120         ds.base = 0;
6121
6122         cs.limit    = ds.limit = 0xffffffff;
6123         cs.type     = ds.type = 0x3;
6124         cs.dpl      = ds.dpl = 0;
6125         cs.db       = ds.db = 0;
6126         cs.s        = ds.s = 1;
6127         cs.l        = ds.l = 0;
6128         cs.g        = ds.g = 1;
6129         cs.avl      = ds.avl = 0;
6130         cs.present  = ds.present = 1;
6131         cs.unusable = ds.unusable = 0;
6132         cs.padding  = ds.padding = 0;
6133
6134         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6135         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6136         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6137         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6138         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6139         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6140
6141         if (guest_cpuid_has_longmode(vcpu))
6142                 kvm_x86_ops->set_efer(vcpu, 0);
6143
6144         kvm_update_cpuid(vcpu);
6145         kvm_mmu_reset_context(vcpu);
6146 }
6147
6148 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6149 {
6150         u64 eoi_exit_bitmap[4];
6151         u32 tmr[8];
6152
6153         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6154                 return;
6155
6156         memset(eoi_exit_bitmap, 0, 32);
6157         memset(tmr, 0, 32);
6158
6159         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
6160         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6161         kvm_apic_update_tmr(vcpu, tmr);
6162 }
6163
6164 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6165 {
6166         ++vcpu->stat.tlb_flush;
6167         kvm_x86_ops->tlb_flush(vcpu);
6168 }
6169
6170 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6171 {
6172         struct page *page = NULL;
6173
6174         if (!irqchip_in_kernel(vcpu->kvm))
6175                 return;
6176
6177         if (!kvm_x86_ops->set_apic_access_page_addr)
6178                 return;
6179
6180         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6181         if (is_error_page(page))
6182                 return;
6183         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6184
6185         /*
6186          * Do not pin apic access page in memory, the MMU notifier
6187          * will call us again if it is migrated or swapped out.
6188          */
6189         put_page(page);
6190 }
6191 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6192
6193 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6194                                            unsigned long address)
6195 {
6196         /*
6197          * The physical address of apic access page is stored in the VMCS.
6198          * Update it when it becomes invalid.
6199          */
6200         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6201                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6202 }
6203
6204 /*
6205  * Returns 1 to let vcpu_run() continue the guest execution loop without
6206  * exiting to the userspace.  Otherwise, the value will be returned to the
6207  * userspace.
6208  */
6209 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6210 {
6211         int r;
6212         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
6213                 vcpu->run->request_interrupt_window;
6214         bool req_immediate_exit = false;
6215
6216         if (vcpu->requests) {
6217                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6218                         kvm_mmu_unload(vcpu);
6219                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6220                         __kvm_migrate_timers(vcpu);
6221                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6222                         kvm_gen_update_masterclock(vcpu->kvm);
6223                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6224                         kvm_gen_kvmclock_update(vcpu);
6225                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6226                         r = kvm_guest_time_update(vcpu);
6227                         if (unlikely(r))
6228                                 goto out;
6229                 }
6230                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6231                         kvm_mmu_sync_roots(vcpu);
6232                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6233                         kvm_vcpu_flush_tlb(vcpu);
6234                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6235                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6236                         r = 0;
6237                         goto out;
6238                 }
6239                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6240                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6241                         r = 0;
6242                         goto out;
6243                 }
6244                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6245                         vcpu->fpu_active = 0;
6246                         kvm_x86_ops->fpu_deactivate(vcpu);
6247                 }
6248                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6249                         /* Page is swapped out. Do synthetic halt */
6250                         vcpu->arch.apf.halted = true;
6251                         r = 1;
6252                         goto out;
6253                 }
6254                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6255                         record_steal_time(vcpu);
6256                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6257                         process_smi(vcpu);
6258                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6259                         process_nmi(vcpu);
6260                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6261                         kvm_pmu_handle_event(vcpu);
6262                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6263                         kvm_pmu_deliver_pmi(vcpu);
6264                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6265                         vcpu_scan_ioapic(vcpu);
6266                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6267                         kvm_vcpu_reload_apic_access_page(vcpu);
6268                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6269                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6270                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6271                         r = 0;
6272                         goto out;
6273                 }
6274         }
6275
6276         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6277                 kvm_apic_accept_events(vcpu);
6278                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6279                         r = 1;
6280                         goto out;
6281                 }
6282
6283                 if (inject_pending_event(vcpu, req_int_win) != 0)
6284                         req_immediate_exit = true;
6285                 /* enable NMI/IRQ window open exits if needed */
6286                 else if (vcpu->arch.nmi_pending)
6287                         kvm_x86_ops->enable_nmi_window(vcpu);
6288                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6289                         kvm_x86_ops->enable_irq_window(vcpu);
6290
6291                 if (kvm_lapic_enabled(vcpu)) {
6292                         /*
6293                          * Update architecture specific hints for APIC
6294                          * virtual interrupt delivery.
6295                          */
6296                         if (kvm_x86_ops->hwapic_irr_update)
6297                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6298                                         kvm_lapic_find_highest_irr(vcpu));
6299                         update_cr8_intercept(vcpu);
6300                         kvm_lapic_sync_to_vapic(vcpu);
6301                 }
6302         }
6303
6304         r = kvm_mmu_reload(vcpu);
6305         if (unlikely(r)) {
6306                 goto cancel_injection;
6307         }
6308
6309         preempt_disable();
6310
6311         kvm_x86_ops->prepare_guest_switch(vcpu);
6312         if (vcpu->fpu_active)
6313                 kvm_load_guest_fpu(vcpu);
6314         kvm_load_guest_xcr0(vcpu);
6315
6316         vcpu->mode = IN_GUEST_MODE;
6317
6318         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6319
6320         /* We should set ->mode before check ->requests,
6321          * see the comment in make_all_cpus_request.
6322          */
6323         smp_mb__after_srcu_read_unlock();
6324
6325         local_irq_disable();
6326
6327         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6328             || need_resched() || signal_pending(current)) {
6329                 vcpu->mode = OUTSIDE_GUEST_MODE;
6330                 smp_wmb();
6331                 local_irq_enable();
6332                 preempt_enable();
6333                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6334                 r = 1;
6335                 goto cancel_injection;
6336         }
6337
6338         if (req_immediate_exit)
6339                 smp_send_reschedule(vcpu->cpu);
6340
6341         __kvm_guest_enter();
6342
6343         if (unlikely(vcpu->arch.switch_db_regs)) {
6344                 set_debugreg(0, 7);
6345                 set_debugreg(vcpu->arch.eff_db[0], 0);
6346                 set_debugreg(vcpu->arch.eff_db[1], 1);
6347                 set_debugreg(vcpu->arch.eff_db[2], 2);
6348                 set_debugreg(vcpu->arch.eff_db[3], 3);
6349                 set_debugreg(vcpu->arch.dr6, 6);
6350                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6351         }
6352
6353         trace_kvm_entry(vcpu->vcpu_id);
6354         wait_lapic_expire(vcpu);
6355         kvm_x86_ops->run(vcpu);
6356
6357         /*
6358          * Do this here before restoring debug registers on the host.  And
6359          * since we do this before handling the vmexit, a DR access vmexit
6360          * can (a) read the correct value of the debug registers, (b) set
6361          * KVM_DEBUGREG_WONT_EXIT again.
6362          */
6363         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6364                 int i;
6365
6366                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6367                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6368                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6369                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6370         }
6371
6372         /*
6373          * If the guest has used debug registers, at least dr7
6374          * will be disabled while returning to the host.
6375          * If we don't have active breakpoints in the host, we don't
6376          * care about the messed up debug address registers. But if
6377          * we have some of them active, restore the old state.
6378          */
6379         if (hw_breakpoint_active())
6380                 hw_breakpoint_restore();
6381
6382         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6383                                                            rdtsc());
6384
6385         vcpu->mode = OUTSIDE_GUEST_MODE;
6386         smp_wmb();
6387
6388         /* Interrupt is enabled by handle_external_intr() */
6389         kvm_x86_ops->handle_external_intr(vcpu);
6390
6391         ++vcpu->stat.exits;
6392
6393         /*
6394          * We must have an instruction between local_irq_enable() and
6395          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6396          * the interrupt shadow.  The stat.exits increment will do nicely.
6397          * But we need to prevent reordering, hence this barrier():
6398          */
6399         barrier();
6400
6401         kvm_guest_exit();
6402
6403         preempt_enable();
6404
6405         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6406
6407         /*
6408          * Profile KVM exit RIPs:
6409          */
6410         if (unlikely(prof_on == KVM_PROFILING)) {
6411                 unsigned long rip = kvm_rip_read(vcpu);
6412                 profile_hit(KVM_PROFILING, (void *)rip);
6413         }
6414
6415         if (unlikely(vcpu->arch.tsc_always_catchup))
6416                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6417
6418         if (vcpu->arch.apic_attention)
6419                 kvm_lapic_sync_from_vapic(vcpu);
6420
6421         r = kvm_x86_ops->handle_exit(vcpu);
6422         return r;
6423
6424 cancel_injection:
6425         kvm_x86_ops->cancel_injection(vcpu);
6426         if (unlikely(vcpu->arch.apic_attention))
6427                 kvm_lapic_sync_from_vapic(vcpu);
6428 out:
6429         return r;
6430 }
6431
6432 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6433 {
6434         if (!kvm_arch_vcpu_runnable(vcpu)) {
6435                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6436                 kvm_vcpu_block(vcpu);
6437                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6438                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6439                         return 1;
6440         }
6441
6442         kvm_apic_accept_events(vcpu);
6443         switch(vcpu->arch.mp_state) {
6444         case KVM_MP_STATE_HALTED:
6445                 vcpu->arch.pv.pv_unhalted = false;
6446                 vcpu->arch.mp_state =
6447                         KVM_MP_STATE_RUNNABLE;
6448         case KVM_MP_STATE_RUNNABLE:
6449                 vcpu->arch.apf.halted = false;
6450                 break;
6451         case KVM_MP_STATE_INIT_RECEIVED:
6452                 break;
6453         default:
6454                 return -EINTR;
6455                 break;
6456         }
6457         return 1;
6458 }
6459
6460 static int vcpu_run(struct kvm_vcpu *vcpu)
6461 {
6462         int r;
6463         struct kvm *kvm = vcpu->kvm;
6464
6465         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6466
6467         for (;;) {
6468                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6469                     !vcpu->arch.apf.halted)
6470                         r = vcpu_enter_guest(vcpu);
6471                 else
6472                         r = vcpu_block(kvm, vcpu);
6473                 if (r <= 0)
6474                         break;
6475
6476                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6477                 if (kvm_cpu_has_pending_timer(vcpu))
6478                         kvm_inject_pending_timer_irqs(vcpu);
6479
6480                 if (dm_request_for_irq_injection(vcpu)) {
6481                         r = -EINTR;
6482                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6483                         ++vcpu->stat.request_irq_exits;
6484                         break;
6485                 }
6486
6487                 kvm_check_async_pf_completion(vcpu);
6488
6489                 if (signal_pending(current)) {
6490                         r = -EINTR;
6491                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6492                         ++vcpu->stat.signal_exits;
6493                         break;
6494                 }
6495                 if (need_resched()) {
6496                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6497                         cond_resched();
6498                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6499                 }
6500         }
6501
6502         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6503
6504         return r;
6505 }
6506
6507 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6508 {
6509         int r;
6510         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6511         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6512         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6513         if (r != EMULATE_DONE)
6514                 return 0;
6515         return 1;
6516 }
6517
6518 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6519 {
6520         BUG_ON(!vcpu->arch.pio.count);
6521
6522         return complete_emulated_io(vcpu);
6523 }
6524
6525 /*
6526  * Implements the following, as a state machine:
6527  *
6528  * read:
6529  *   for each fragment
6530  *     for each mmio piece in the fragment
6531  *       write gpa, len
6532  *       exit
6533  *       copy data
6534  *   execute insn
6535  *
6536  * write:
6537  *   for each fragment
6538  *     for each mmio piece in the fragment
6539  *       write gpa, len
6540  *       copy data
6541  *       exit
6542  */
6543 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6544 {
6545         struct kvm_run *run = vcpu->run;
6546         struct kvm_mmio_fragment *frag;
6547         unsigned len;
6548
6549         BUG_ON(!vcpu->mmio_needed);
6550
6551         /* Complete previous fragment */
6552         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6553         len = min(8u, frag->len);
6554         if (!vcpu->mmio_is_write)
6555                 memcpy(frag->data, run->mmio.data, len);
6556
6557         if (frag->len <= 8) {
6558                 /* Switch to the next fragment. */
6559                 frag++;
6560                 vcpu->mmio_cur_fragment++;
6561         } else {
6562                 /* Go forward to the next mmio piece. */
6563                 frag->data += len;
6564                 frag->gpa += len;
6565                 frag->len -= len;
6566         }
6567
6568         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6569                 vcpu->mmio_needed = 0;
6570
6571                 /* FIXME: return into emulator if single-stepping.  */
6572                 if (vcpu->mmio_is_write)
6573                         return 1;
6574                 vcpu->mmio_read_completed = 1;
6575                 return complete_emulated_io(vcpu);
6576         }
6577
6578         run->exit_reason = KVM_EXIT_MMIO;
6579         run->mmio.phys_addr = frag->gpa;
6580         if (vcpu->mmio_is_write)
6581                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6582         run->mmio.len = min(8u, frag->len);
6583         run->mmio.is_write = vcpu->mmio_is_write;
6584         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6585         return 0;
6586 }
6587
6588
6589 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6590 {
6591         struct fpu *fpu = &current->thread.fpu;
6592         int r;
6593         sigset_t sigsaved;
6594
6595         fpu__activate_curr(fpu);
6596
6597         if (vcpu->sigset_active)
6598                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6599
6600         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6601                 kvm_vcpu_block(vcpu);
6602                 kvm_apic_accept_events(vcpu);
6603                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6604                 r = -EAGAIN;
6605                 goto out;
6606         }
6607
6608         /* re-sync apic's tpr */
6609         if (!irqchip_in_kernel(vcpu->kvm)) {
6610                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6611                         r = -EINVAL;
6612                         goto out;
6613                 }
6614         }
6615
6616         if (unlikely(vcpu->arch.complete_userspace_io)) {
6617                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6618                 vcpu->arch.complete_userspace_io = NULL;
6619                 r = cui(vcpu);
6620                 if (r <= 0)
6621                         goto out;
6622         } else
6623                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6624
6625         r = vcpu_run(vcpu);
6626
6627 out:
6628         post_kvm_run_save(vcpu);
6629         if (vcpu->sigset_active)
6630                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6631
6632         return r;
6633 }
6634
6635 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6636 {
6637         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6638                 /*
6639                  * We are here if userspace calls get_regs() in the middle of
6640                  * instruction emulation. Registers state needs to be copied
6641                  * back from emulation context to vcpu. Userspace shouldn't do
6642                  * that usually, but some bad designed PV devices (vmware
6643                  * backdoor interface) need this to work
6644                  */
6645                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6646                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6647         }
6648         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6649         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6650         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6651         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6652         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6653         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6654         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6655         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6656 #ifdef CONFIG_X86_64
6657         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6658         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6659         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6660         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6661         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6662         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6663         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6664         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6665 #endif
6666
6667         regs->rip = kvm_rip_read(vcpu);
6668         regs->rflags = kvm_get_rflags(vcpu);
6669
6670         return 0;
6671 }
6672
6673 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6674 {
6675         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6676         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6677
6678         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6679         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6680         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6681         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6682         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6683         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6684         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6685         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6686 #ifdef CONFIG_X86_64
6687         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6688         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6689         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6690         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6691         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6692         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6693         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6694         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6695 #endif
6696
6697         kvm_rip_write(vcpu, regs->rip);
6698         kvm_set_rflags(vcpu, regs->rflags);
6699
6700         vcpu->arch.exception.pending = false;
6701
6702         kvm_make_request(KVM_REQ_EVENT, vcpu);
6703
6704         return 0;
6705 }
6706
6707 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6708 {
6709         struct kvm_segment cs;
6710
6711         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6712         *db = cs.db;
6713         *l = cs.l;
6714 }
6715 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6716
6717 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6718                                   struct kvm_sregs *sregs)
6719 {
6720         struct desc_ptr dt;
6721
6722         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6723         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6724         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6725         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6726         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6727         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6728
6729         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6730         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6731
6732         kvm_x86_ops->get_idt(vcpu, &dt);
6733         sregs->idt.limit = dt.size;
6734         sregs->idt.base = dt.address;
6735         kvm_x86_ops->get_gdt(vcpu, &dt);
6736         sregs->gdt.limit = dt.size;
6737         sregs->gdt.base = dt.address;
6738
6739         sregs->cr0 = kvm_read_cr0(vcpu);
6740         sregs->cr2 = vcpu->arch.cr2;
6741         sregs->cr3 = kvm_read_cr3(vcpu);
6742         sregs->cr4 = kvm_read_cr4(vcpu);
6743         sregs->cr8 = kvm_get_cr8(vcpu);
6744         sregs->efer = vcpu->arch.efer;
6745         sregs->apic_base = kvm_get_apic_base(vcpu);
6746
6747         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6748
6749         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6750                 set_bit(vcpu->arch.interrupt.nr,
6751                         (unsigned long *)sregs->interrupt_bitmap);
6752
6753         return 0;
6754 }
6755
6756 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6757                                     struct kvm_mp_state *mp_state)
6758 {
6759         kvm_apic_accept_events(vcpu);
6760         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6761                                         vcpu->arch.pv.pv_unhalted)
6762                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6763         else
6764                 mp_state->mp_state = vcpu->arch.mp_state;
6765
6766         return 0;
6767 }
6768
6769 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6770                                     struct kvm_mp_state *mp_state)
6771 {
6772         if (!kvm_vcpu_has_lapic(vcpu) &&
6773             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6774                 return -EINVAL;
6775
6776         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6777                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6778                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6779         } else
6780                 vcpu->arch.mp_state = mp_state->mp_state;
6781         kvm_make_request(KVM_REQ_EVENT, vcpu);
6782         return 0;
6783 }
6784
6785 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6786                     int reason, bool has_error_code, u32 error_code)
6787 {
6788         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6789         int ret;
6790
6791         init_emulate_ctxt(vcpu);
6792
6793         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6794                                    has_error_code, error_code);
6795
6796         if (ret)
6797                 return EMULATE_FAIL;
6798
6799         kvm_rip_write(vcpu, ctxt->eip);
6800         kvm_set_rflags(vcpu, ctxt->eflags);
6801         kvm_make_request(KVM_REQ_EVENT, vcpu);
6802         return EMULATE_DONE;
6803 }
6804 EXPORT_SYMBOL_GPL(kvm_task_switch);
6805
6806 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6807                                   struct kvm_sregs *sregs)
6808 {
6809         struct msr_data apic_base_msr;
6810         int mmu_reset_needed = 0;
6811         int pending_vec, max_bits, idx;
6812         struct desc_ptr dt;
6813
6814         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6815                 return -EINVAL;
6816
6817         dt.size = sregs->idt.limit;
6818         dt.address = sregs->idt.base;
6819         kvm_x86_ops->set_idt(vcpu, &dt);
6820         dt.size = sregs->gdt.limit;
6821         dt.address = sregs->gdt.base;
6822         kvm_x86_ops->set_gdt(vcpu, &dt);
6823
6824         vcpu->arch.cr2 = sregs->cr2;
6825         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6826         vcpu->arch.cr3 = sregs->cr3;
6827         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6828
6829         kvm_set_cr8(vcpu, sregs->cr8);
6830
6831         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6832         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6833         apic_base_msr.data = sregs->apic_base;
6834         apic_base_msr.host_initiated = true;
6835         kvm_set_apic_base(vcpu, &apic_base_msr);
6836
6837         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6838         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6839         vcpu->arch.cr0 = sregs->cr0;
6840
6841         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6842         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6843         if (sregs->cr4 & X86_CR4_OSXSAVE)
6844                 kvm_update_cpuid(vcpu);
6845
6846         idx = srcu_read_lock(&vcpu->kvm->srcu);
6847         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6848                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6849                 mmu_reset_needed = 1;
6850         }
6851         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6852
6853         if (mmu_reset_needed)
6854                 kvm_mmu_reset_context(vcpu);
6855
6856         max_bits = KVM_NR_INTERRUPTS;
6857         pending_vec = find_first_bit(
6858                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6859         if (pending_vec < max_bits) {
6860                 kvm_queue_interrupt(vcpu, pending_vec, false);
6861                 pr_debug("Set back pending irq %d\n", pending_vec);
6862         }
6863
6864         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6865         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6866         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6867         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6868         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6869         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6870
6871         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6872         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6873
6874         update_cr8_intercept(vcpu);
6875
6876         /* Older userspace won't unhalt the vcpu on reset. */
6877         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6878             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6879             !is_protmode(vcpu))
6880                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6881
6882         kvm_make_request(KVM_REQ_EVENT, vcpu);
6883
6884         return 0;
6885 }
6886
6887 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6888                                         struct kvm_guest_debug *dbg)
6889 {
6890         unsigned long rflags;
6891         int i, r;
6892
6893         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6894                 r = -EBUSY;
6895                 if (vcpu->arch.exception.pending)
6896                         goto out;
6897                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6898                         kvm_queue_exception(vcpu, DB_VECTOR);
6899                 else
6900                         kvm_queue_exception(vcpu, BP_VECTOR);
6901         }
6902
6903         /*
6904          * Read rflags as long as potentially injected trace flags are still
6905          * filtered out.
6906          */
6907         rflags = kvm_get_rflags(vcpu);
6908
6909         vcpu->guest_debug = dbg->control;
6910         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6911                 vcpu->guest_debug = 0;
6912
6913         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6914                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6915                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6916                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6917         } else {
6918                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6919                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6920         }
6921         kvm_update_dr7(vcpu);
6922
6923         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6924                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6925                         get_segment_base(vcpu, VCPU_SREG_CS);
6926
6927         /*
6928          * Trigger an rflags update that will inject or remove the trace
6929          * flags.
6930          */
6931         kvm_set_rflags(vcpu, rflags);
6932
6933         kvm_x86_ops->update_db_bp_intercept(vcpu);
6934
6935         r = 0;
6936
6937 out:
6938
6939         return r;
6940 }
6941
6942 /*
6943  * Translate a guest virtual address to a guest physical address.
6944  */
6945 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6946                                     struct kvm_translation *tr)
6947 {
6948         unsigned long vaddr = tr->linear_address;
6949         gpa_t gpa;
6950         int idx;
6951
6952         idx = srcu_read_lock(&vcpu->kvm->srcu);
6953         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6954         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6955         tr->physical_address = gpa;
6956         tr->valid = gpa != UNMAPPED_GVA;
6957         tr->writeable = 1;
6958         tr->usermode = 0;
6959
6960         return 0;
6961 }
6962
6963 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6964 {
6965         struct fxregs_state *fxsave =
6966                         &vcpu->arch.guest_fpu.state.fxsave;
6967
6968         memcpy(fpu->fpr, fxsave->st_space, 128);
6969         fpu->fcw = fxsave->cwd;
6970         fpu->fsw = fxsave->swd;
6971         fpu->ftwx = fxsave->twd;
6972         fpu->last_opcode = fxsave->fop;
6973         fpu->last_ip = fxsave->rip;
6974         fpu->last_dp = fxsave->rdp;
6975         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6976
6977         return 0;
6978 }
6979
6980 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6981 {
6982         struct fxregs_state *fxsave =
6983                         &vcpu->arch.guest_fpu.state.fxsave;
6984
6985         memcpy(fxsave->st_space, fpu->fpr, 128);
6986         fxsave->cwd = fpu->fcw;
6987         fxsave->swd = fpu->fsw;
6988         fxsave->twd = fpu->ftwx;
6989         fxsave->fop = fpu->last_opcode;
6990         fxsave->rip = fpu->last_ip;
6991         fxsave->rdp = fpu->last_dp;
6992         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6993
6994         return 0;
6995 }
6996
6997 static void fx_init(struct kvm_vcpu *vcpu)
6998 {
6999         fpstate_init(&vcpu->arch.guest_fpu.state);
7000         if (cpu_has_xsaves)
7001                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7002                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7003
7004         /*
7005          * Ensure guest xcr0 is valid for loading
7006          */
7007         vcpu->arch.xcr0 = XSTATE_FP;
7008
7009         vcpu->arch.cr0 |= X86_CR0_ET;
7010 }
7011
7012 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7013 {
7014         if (vcpu->guest_fpu_loaded)
7015                 return;
7016
7017         /*
7018          * Restore all possible states in the guest,
7019          * and assume host would use all available bits.
7020          * Guest xcr0 would be loaded later.
7021          */
7022         kvm_put_guest_xcr0(vcpu);
7023         vcpu->guest_fpu_loaded = 1;
7024         __kernel_fpu_begin();
7025         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7026         trace_kvm_fpu(1);
7027 }
7028
7029 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7030 {
7031         kvm_put_guest_xcr0(vcpu);
7032
7033         if (!vcpu->guest_fpu_loaded) {
7034                 vcpu->fpu_counter = 0;
7035                 return;
7036         }
7037
7038         vcpu->guest_fpu_loaded = 0;
7039         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7040         __kernel_fpu_end();
7041         ++vcpu->stat.fpu_reload;
7042         /*
7043          * If using eager FPU mode, or if the guest is a frequent user
7044          * of the FPU, just leave the FPU active for next time.
7045          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7046          * the FPU in bursts will revert to loading it on demand.
7047          */
7048         if (!vcpu->arch.eager_fpu) {
7049                 if (++vcpu->fpu_counter < 5)
7050                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7051         }
7052         trace_kvm_fpu(0);
7053 }
7054
7055 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7056 {
7057         kvmclock_reset(vcpu);
7058
7059         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7060         kvm_x86_ops->vcpu_free(vcpu);
7061 }
7062
7063 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7064                                                 unsigned int id)
7065 {
7066         struct kvm_vcpu *vcpu;
7067
7068         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7069                 printk_once(KERN_WARNING
7070                 "kvm: SMP vm created on host with unstable TSC; "
7071                 "guest TSC will not be reliable\n");
7072
7073         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7074
7075         return vcpu;
7076 }
7077
7078 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7079 {
7080         int r;
7081
7082         kvm_vcpu_mtrr_init(vcpu);
7083         r = vcpu_load(vcpu);
7084         if (r)
7085                 return r;
7086         kvm_vcpu_reset(vcpu, false);
7087         kvm_mmu_setup(vcpu);
7088         vcpu_put(vcpu);
7089         return r;
7090 }
7091
7092 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7093 {
7094         struct msr_data msr;
7095         struct kvm *kvm = vcpu->kvm;
7096
7097         if (vcpu_load(vcpu))
7098                 return;
7099         msr.data = 0x0;
7100         msr.index = MSR_IA32_TSC;
7101         msr.host_initiated = true;
7102         kvm_write_tsc(vcpu, &msr);
7103         vcpu_put(vcpu);
7104
7105         if (!kvmclock_periodic_sync)
7106                 return;
7107
7108         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7109                                         KVMCLOCK_SYNC_PERIOD);
7110 }
7111
7112 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7113 {
7114         int r;
7115         vcpu->arch.apf.msr_val = 0;
7116
7117         r = vcpu_load(vcpu);
7118         BUG_ON(r);
7119         kvm_mmu_unload(vcpu);
7120         vcpu_put(vcpu);
7121
7122         kvm_x86_ops->vcpu_free(vcpu);
7123 }
7124
7125 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7126 {
7127         vcpu->arch.hflags = 0;
7128
7129         atomic_set(&vcpu->arch.nmi_queued, 0);
7130         vcpu->arch.nmi_pending = 0;
7131         vcpu->arch.nmi_injected = false;
7132         kvm_clear_interrupt_queue(vcpu);
7133         kvm_clear_exception_queue(vcpu);
7134
7135         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7136         kvm_update_dr0123(vcpu);
7137         vcpu->arch.dr6 = DR6_INIT;
7138         kvm_update_dr6(vcpu);
7139         vcpu->arch.dr7 = DR7_FIXED_1;
7140         kvm_update_dr7(vcpu);
7141
7142         vcpu->arch.cr2 = 0;
7143
7144         kvm_make_request(KVM_REQ_EVENT, vcpu);
7145         vcpu->arch.apf.msr_val = 0;
7146         vcpu->arch.st.msr_val = 0;
7147
7148         kvmclock_reset(vcpu);
7149
7150         kvm_clear_async_pf_completion_queue(vcpu);
7151         kvm_async_pf_hash_reset(vcpu);
7152         vcpu->arch.apf.halted = false;
7153
7154         if (!init_event) {
7155                 kvm_pmu_reset(vcpu);
7156                 vcpu->arch.smbase = 0x30000;
7157         }
7158
7159         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7160         vcpu->arch.regs_avail = ~0;
7161         vcpu->arch.regs_dirty = ~0;
7162
7163         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7164 }
7165
7166 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7167 {
7168         struct kvm_segment cs;
7169
7170         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7171         cs.selector = vector << 8;
7172         cs.base = vector << 12;
7173         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7174         kvm_rip_write(vcpu, 0);
7175 }
7176
7177 int kvm_arch_hardware_enable(void)
7178 {
7179         struct kvm *kvm;
7180         struct kvm_vcpu *vcpu;
7181         int i;
7182         int ret;
7183         u64 local_tsc;
7184         u64 max_tsc = 0;
7185         bool stable, backwards_tsc = false;
7186
7187         kvm_shared_msr_cpu_online();
7188         ret = kvm_x86_ops->hardware_enable();
7189         if (ret != 0)
7190                 return ret;
7191
7192         local_tsc = rdtsc();
7193         stable = !check_tsc_unstable();
7194         list_for_each_entry(kvm, &vm_list, vm_list) {
7195                 kvm_for_each_vcpu(i, vcpu, kvm) {
7196                         if (!stable && vcpu->cpu == smp_processor_id())
7197                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7198                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7199                                 backwards_tsc = true;
7200                                 if (vcpu->arch.last_host_tsc > max_tsc)
7201                                         max_tsc = vcpu->arch.last_host_tsc;
7202                         }
7203                 }
7204         }
7205
7206         /*
7207          * Sometimes, even reliable TSCs go backwards.  This happens on
7208          * platforms that reset TSC during suspend or hibernate actions, but
7209          * maintain synchronization.  We must compensate.  Fortunately, we can
7210          * detect that condition here, which happens early in CPU bringup,
7211          * before any KVM threads can be running.  Unfortunately, we can't
7212          * bring the TSCs fully up to date with real time, as we aren't yet far
7213          * enough into CPU bringup that we know how much real time has actually
7214          * elapsed; our helper function, get_kernel_ns() will be using boot
7215          * variables that haven't been updated yet.
7216          *
7217          * So we simply find the maximum observed TSC above, then record the
7218          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7219          * the adjustment will be applied.  Note that we accumulate
7220          * adjustments, in case multiple suspend cycles happen before some VCPU
7221          * gets a chance to run again.  In the event that no KVM threads get a
7222          * chance to run, we will miss the entire elapsed period, as we'll have
7223          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7224          * loose cycle time.  This isn't too big a deal, since the loss will be
7225          * uniform across all VCPUs (not to mention the scenario is extremely
7226          * unlikely). It is possible that a second hibernate recovery happens
7227          * much faster than a first, causing the observed TSC here to be
7228          * smaller; this would require additional padding adjustment, which is
7229          * why we set last_host_tsc to the local tsc observed here.
7230          *
7231          * N.B. - this code below runs only on platforms with reliable TSC,
7232          * as that is the only way backwards_tsc is set above.  Also note
7233          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7234          * have the same delta_cyc adjustment applied if backwards_tsc
7235          * is detected.  Note further, this adjustment is only done once,
7236          * as we reset last_host_tsc on all VCPUs to stop this from being
7237          * called multiple times (one for each physical CPU bringup).
7238          *
7239          * Platforms with unreliable TSCs don't have to deal with this, they
7240          * will be compensated by the logic in vcpu_load, which sets the TSC to
7241          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7242          * guarantee that they stay in perfect synchronization.
7243          */
7244         if (backwards_tsc) {
7245                 u64 delta_cyc = max_tsc - local_tsc;
7246                 backwards_tsc_observed = true;
7247                 list_for_each_entry(kvm, &vm_list, vm_list) {
7248                         kvm_for_each_vcpu(i, vcpu, kvm) {
7249                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7250                                 vcpu->arch.last_host_tsc = local_tsc;
7251                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7252                         }
7253
7254                         /*
7255                          * We have to disable TSC offset matching.. if you were
7256                          * booting a VM while issuing an S4 host suspend....
7257                          * you may have some problem.  Solving this issue is
7258                          * left as an exercise to the reader.
7259                          */
7260                         kvm->arch.last_tsc_nsec = 0;
7261                         kvm->arch.last_tsc_write = 0;
7262                 }
7263
7264         }
7265         return 0;
7266 }
7267
7268 void kvm_arch_hardware_disable(void)
7269 {
7270         kvm_x86_ops->hardware_disable();
7271         drop_user_return_notifiers();
7272 }
7273
7274 int kvm_arch_hardware_setup(void)
7275 {
7276         int r;
7277
7278         r = kvm_x86_ops->hardware_setup();
7279         if (r != 0)
7280                 return r;
7281
7282         kvm_init_msr_list();
7283         return 0;
7284 }
7285
7286 void kvm_arch_hardware_unsetup(void)
7287 {
7288         kvm_x86_ops->hardware_unsetup();
7289 }
7290
7291 void kvm_arch_check_processor_compat(void *rtn)
7292 {
7293         kvm_x86_ops->check_processor_compatibility(rtn);
7294 }
7295
7296 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7297 {
7298         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7299 }
7300 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7301
7302 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7303 {
7304         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7305 }
7306
7307 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7308 {
7309         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
7310 }
7311
7312 struct static_key kvm_no_apic_vcpu __read_mostly;
7313
7314 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7315 {
7316         struct page *page;
7317         struct kvm *kvm;
7318         int r;
7319
7320         BUG_ON(vcpu->kvm == NULL);
7321         kvm = vcpu->kvm;
7322
7323         vcpu->arch.pv.pv_unhalted = false;
7324         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7325         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7326                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7327         else
7328                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7329
7330         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7331         if (!page) {
7332                 r = -ENOMEM;
7333                 goto fail;
7334         }
7335         vcpu->arch.pio_data = page_address(page);
7336
7337         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7338
7339         r = kvm_mmu_create(vcpu);
7340         if (r < 0)
7341                 goto fail_free_pio_data;
7342
7343         if (irqchip_in_kernel(kvm)) {
7344                 r = kvm_create_lapic(vcpu);
7345                 if (r < 0)
7346                         goto fail_mmu_destroy;
7347         } else
7348                 static_key_slow_inc(&kvm_no_apic_vcpu);
7349
7350         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7351                                        GFP_KERNEL);
7352         if (!vcpu->arch.mce_banks) {
7353                 r = -ENOMEM;
7354                 goto fail_free_lapic;
7355         }
7356         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7357
7358         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7359                 r = -ENOMEM;
7360                 goto fail_free_mce_banks;
7361         }
7362
7363         fx_init(vcpu);
7364
7365         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7366         vcpu->arch.pv_time_enabled = false;
7367
7368         vcpu->arch.guest_supported_xcr0 = 0;
7369         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7370
7371         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7372
7373         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7374
7375         kvm_async_pf_hash_reset(vcpu);
7376         kvm_pmu_init(vcpu);
7377
7378         return 0;
7379
7380 fail_free_mce_banks:
7381         kfree(vcpu->arch.mce_banks);
7382 fail_free_lapic:
7383         kvm_free_lapic(vcpu);
7384 fail_mmu_destroy:
7385         kvm_mmu_destroy(vcpu);
7386 fail_free_pio_data:
7387         free_page((unsigned long)vcpu->arch.pio_data);
7388 fail:
7389         return r;
7390 }
7391
7392 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7393 {
7394         int idx;
7395
7396         kvm_pmu_destroy(vcpu);
7397         kfree(vcpu->arch.mce_banks);
7398         kvm_free_lapic(vcpu);
7399         idx = srcu_read_lock(&vcpu->kvm->srcu);
7400         kvm_mmu_destroy(vcpu);
7401         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7402         free_page((unsigned long)vcpu->arch.pio_data);
7403         if (!irqchip_in_kernel(vcpu->kvm))
7404                 static_key_slow_dec(&kvm_no_apic_vcpu);
7405 }
7406
7407 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7408 {
7409         kvm_x86_ops->sched_in(vcpu, cpu);
7410 }
7411
7412 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7413 {
7414         if (type)
7415                 return -EINVAL;
7416
7417         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7418         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7419         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7420         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7421         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7422
7423         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7424         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7425         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7426         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7427                 &kvm->arch.irq_sources_bitmap);
7428
7429         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7430         mutex_init(&kvm->arch.apic_map_lock);
7431         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7432
7433         pvclock_update_vm_gtod_copy(kvm);
7434
7435         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7436         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7437
7438         return 0;
7439 }
7440
7441 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7442 {
7443         int r;
7444         r = vcpu_load(vcpu);
7445         BUG_ON(r);
7446         kvm_mmu_unload(vcpu);
7447         vcpu_put(vcpu);
7448 }
7449
7450 static void kvm_free_vcpus(struct kvm *kvm)
7451 {
7452         unsigned int i;
7453         struct kvm_vcpu *vcpu;
7454
7455         /*
7456          * Unpin any mmu pages first.
7457          */
7458         kvm_for_each_vcpu(i, vcpu, kvm) {
7459                 kvm_clear_async_pf_completion_queue(vcpu);
7460                 kvm_unload_vcpu_mmu(vcpu);
7461         }
7462         kvm_for_each_vcpu(i, vcpu, kvm)
7463                 kvm_arch_vcpu_free(vcpu);
7464
7465         mutex_lock(&kvm->lock);
7466         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7467                 kvm->vcpus[i] = NULL;
7468
7469         atomic_set(&kvm->online_vcpus, 0);
7470         mutex_unlock(&kvm->lock);
7471 }
7472
7473 void kvm_arch_sync_events(struct kvm *kvm)
7474 {
7475         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7476         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7477         kvm_free_all_assigned_devices(kvm);
7478         kvm_free_pit(kvm);
7479 }
7480
7481 int __x86_set_memory_region(struct kvm *kvm,
7482                             const struct kvm_userspace_memory_region *mem)
7483 {
7484         int i, r;
7485
7486         /* Called with kvm->slots_lock held.  */
7487         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7488
7489         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7490                 struct kvm_userspace_memory_region m = *mem;
7491
7492                 m.slot |= i << 16;
7493                 r = __kvm_set_memory_region(kvm, &m);
7494                 if (r < 0)
7495                         return r;
7496         }
7497
7498         return 0;
7499 }
7500 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7501
7502 int x86_set_memory_region(struct kvm *kvm,
7503                           const struct kvm_userspace_memory_region *mem)
7504 {
7505         int r;
7506
7507         mutex_lock(&kvm->slots_lock);
7508         r = __x86_set_memory_region(kvm, mem);
7509         mutex_unlock(&kvm->slots_lock);
7510
7511         return r;
7512 }
7513 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7514
7515 void kvm_arch_destroy_vm(struct kvm *kvm)
7516 {
7517         if (current->mm == kvm->mm) {
7518                 /*
7519                  * Free memory regions allocated on behalf of userspace,
7520                  * unless the the memory map has changed due to process exit
7521                  * or fd copying.
7522                  */
7523                 struct kvm_userspace_memory_region mem;
7524                 memset(&mem, 0, sizeof(mem));
7525                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7526                 x86_set_memory_region(kvm, &mem);
7527
7528                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7529                 x86_set_memory_region(kvm, &mem);
7530
7531                 mem.slot = TSS_PRIVATE_MEMSLOT;
7532                 x86_set_memory_region(kvm, &mem);
7533         }
7534         kvm_iommu_unmap_guest(kvm);
7535         kfree(kvm->arch.vpic);
7536         kfree(kvm->arch.vioapic);
7537         kvm_free_vcpus(kvm);
7538         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7539 }
7540
7541 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7542                            struct kvm_memory_slot *dont)
7543 {
7544         int i;
7545
7546         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7547                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7548                         kvfree(free->arch.rmap[i]);
7549                         free->arch.rmap[i] = NULL;
7550                 }
7551                 if (i == 0)
7552                         continue;
7553
7554                 if (!dont || free->arch.lpage_info[i - 1] !=
7555                              dont->arch.lpage_info[i - 1]) {
7556                         kvfree(free->arch.lpage_info[i - 1]);
7557                         free->arch.lpage_info[i - 1] = NULL;
7558                 }
7559         }
7560 }
7561
7562 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7563                             unsigned long npages)
7564 {
7565         int i;
7566
7567         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7568                 unsigned long ugfn;
7569                 int lpages;
7570                 int level = i + 1;
7571
7572                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7573                                       slot->base_gfn, level) + 1;
7574
7575                 slot->arch.rmap[i] =
7576                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7577                 if (!slot->arch.rmap[i])
7578                         goto out_free;
7579                 if (i == 0)
7580                         continue;
7581
7582                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7583                                         sizeof(*slot->arch.lpage_info[i - 1]));
7584                 if (!slot->arch.lpage_info[i - 1])
7585                         goto out_free;
7586
7587                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7588                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7589                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7590                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7591                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7592                 /*
7593                  * If the gfn and userspace address are not aligned wrt each
7594                  * other, or if explicitly asked to, disable large page
7595                  * support for this slot
7596                  */
7597                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7598                     !kvm_largepages_enabled()) {
7599                         unsigned long j;
7600
7601                         for (j = 0; j < lpages; ++j)
7602                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7603                 }
7604         }
7605
7606         return 0;
7607
7608 out_free:
7609         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7610                 kvfree(slot->arch.rmap[i]);
7611                 slot->arch.rmap[i] = NULL;
7612                 if (i == 0)
7613                         continue;
7614
7615                 kvfree(slot->arch.lpage_info[i - 1]);
7616                 slot->arch.lpage_info[i - 1] = NULL;
7617         }
7618         return -ENOMEM;
7619 }
7620
7621 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7622 {
7623         /*
7624          * memslots->generation has been incremented.
7625          * mmio generation may have reached its maximum value.
7626          */
7627         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7628 }
7629
7630 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7631                                 struct kvm_memory_slot *memslot,
7632                                 const struct kvm_userspace_memory_region *mem,
7633                                 enum kvm_mr_change change)
7634 {
7635         /*
7636          * Only private memory slots need to be mapped here since
7637          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7638          */
7639         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7640                 unsigned long userspace_addr;
7641
7642                 /*
7643                  * MAP_SHARED to prevent internal slot pages from being moved
7644                  * by fork()/COW.
7645                  */
7646                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7647                                          PROT_READ | PROT_WRITE,
7648                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7649
7650                 if (IS_ERR((void *)userspace_addr))
7651                         return PTR_ERR((void *)userspace_addr);
7652
7653                 memslot->userspace_addr = userspace_addr;
7654         }
7655
7656         return 0;
7657 }
7658
7659 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7660                                      struct kvm_memory_slot *new)
7661 {
7662         /* Still write protect RO slot */
7663         if (new->flags & KVM_MEM_READONLY) {
7664                 kvm_mmu_slot_remove_write_access(kvm, new);
7665                 return;
7666         }
7667
7668         /*
7669          * Call kvm_x86_ops dirty logging hooks when they are valid.
7670          *
7671          * kvm_x86_ops->slot_disable_log_dirty is called when:
7672          *
7673          *  - KVM_MR_CREATE with dirty logging is disabled
7674          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7675          *
7676          * The reason is, in case of PML, we need to set D-bit for any slots
7677          * with dirty logging disabled in order to eliminate unnecessary GPA
7678          * logging in PML buffer (and potential PML buffer full VMEXT). This
7679          * guarantees leaving PML enabled during guest's lifetime won't have
7680          * any additonal overhead from PML when guest is running with dirty
7681          * logging disabled for memory slots.
7682          *
7683          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7684          * to dirty logging mode.
7685          *
7686          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7687          *
7688          * In case of write protect:
7689          *
7690          * Write protect all pages for dirty logging.
7691          *
7692          * All the sptes including the large sptes which point to this
7693          * slot are set to readonly. We can not create any new large
7694          * spte on this slot until the end of the logging.
7695          *
7696          * See the comments in fast_page_fault().
7697          */
7698         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7699                 if (kvm_x86_ops->slot_enable_log_dirty)
7700                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7701                 else
7702                         kvm_mmu_slot_remove_write_access(kvm, new);
7703         } else {
7704                 if (kvm_x86_ops->slot_disable_log_dirty)
7705                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7706         }
7707 }
7708
7709 void kvm_arch_commit_memory_region(struct kvm *kvm,
7710                                 const struct kvm_userspace_memory_region *mem,
7711                                 const struct kvm_memory_slot *old,
7712                                 const struct kvm_memory_slot *new,
7713                                 enum kvm_mr_change change)
7714 {
7715         int nr_mmu_pages = 0;
7716
7717         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
7718                 int ret;
7719
7720                 ret = vm_munmap(old->userspace_addr,
7721                                 old->npages * PAGE_SIZE);
7722                 if (ret < 0)
7723                         printk(KERN_WARNING
7724                                "kvm_vm_ioctl_set_memory_region: "
7725                                "failed to munmap memory\n");
7726         }
7727
7728         if (!kvm->arch.n_requested_mmu_pages)
7729                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7730
7731         if (nr_mmu_pages)
7732                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7733
7734         /*
7735          * Dirty logging tracks sptes in 4k granularity, meaning that large
7736          * sptes have to be split.  If live migration is successful, the guest
7737          * in the source machine will be destroyed and large sptes will be
7738          * created in the destination. However, if the guest continues to run
7739          * in the source machine (for example if live migration fails), small
7740          * sptes will remain around and cause bad performance.
7741          *
7742          * Scan sptes if dirty logging has been stopped, dropping those
7743          * which can be collapsed into a single large-page spte.  Later
7744          * page faults will create the large-page sptes.
7745          */
7746         if ((change != KVM_MR_DELETE) &&
7747                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7748                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7749                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7750
7751         /*
7752          * Set up write protection and/or dirty logging for the new slot.
7753          *
7754          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7755          * been zapped so no dirty logging staff is needed for old slot. For
7756          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7757          * new and it's also covered when dealing with the new slot.
7758          *
7759          * FIXME: const-ify all uses of struct kvm_memory_slot.
7760          */
7761         if (change != KVM_MR_DELETE)
7762                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7763 }
7764
7765 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7766 {
7767         kvm_mmu_invalidate_zap_all_pages(kvm);
7768 }
7769
7770 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7771                                    struct kvm_memory_slot *slot)
7772 {
7773         kvm_mmu_invalidate_zap_all_pages(kvm);
7774 }
7775
7776 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7777 {
7778         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7779                 kvm_x86_ops->check_nested_events(vcpu, false);
7780
7781         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7782                 !vcpu->arch.apf.halted)
7783                 || !list_empty_careful(&vcpu->async_pf.done)
7784                 || kvm_apic_has_events(vcpu)
7785                 || vcpu->arch.pv.pv_unhalted
7786                 || atomic_read(&vcpu->arch.nmi_queued) ||
7787                 (kvm_arch_interrupt_allowed(vcpu) &&
7788                  kvm_cpu_has_interrupt(vcpu));
7789 }
7790
7791 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7792 {
7793         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7794 }
7795
7796 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7797 {
7798         return kvm_x86_ops->interrupt_allowed(vcpu);
7799 }
7800
7801 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7802 {
7803         if (is_64_bit_mode(vcpu))
7804                 return kvm_rip_read(vcpu);
7805         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7806                      kvm_rip_read(vcpu));
7807 }
7808 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7809
7810 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7811 {
7812         return kvm_get_linear_rip(vcpu) == linear_rip;
7813 }
7814 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7815
7816 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7817 {
7818         unsigned long rflags;
7819
7820         rflags = kvm_x86_ops->get_rflags(vcpu);
7821         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7822                 rflags &= ~X86_EFLAGS_TF;
7823         return rflags;
7824 }
7825 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7826
7827 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7828 {
7829         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7830             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7831                 rflags |= X86_EFLAGS_TF;
7832         kvm_x86_ops->set_rflags(vcpu, rflags);
7833 }
7834
7835 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7836 {
7837         __kvm_set_rflags(vcpu, rflags);
7838         kvm_make_request(KVM_REQ_EVENT, vcpu);
7839 }
7840 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7841
7842 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7843 {
7844         int r;
7845
7846         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7847               work->wakeup_all)
7848                 return;
7849
7850         r = kvm_mmu_reload(vcpu);
7851         if (unlikely(r))
7852                 return;
7853
7854         if (!vcpu->arch.mmu.direct_map &&
7855               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7856                 return;
7857
7858         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7859 }
7860
7861 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7862 {
7863         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7864 }
7865
7866 static inline u32 kvm_async_pf_next_probe(u32 key)
7867 {
7868         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7869 }
7870
7871 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7872 {
7873         u32 key = kvm_async_pf_hash_fn(gfn);
7874
7875         while (vcpu->arch.apf.gfns[key] != ~0)
7876                 key = kvm_async_pf_next_probe(key);
7877
7878         vcpu->arch.apf.gfns[key] = gfn;
7879 }
7880
7881 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7882 {
7883         int i;
7884         u32 key = kvm_async_pf_hash_fn(gfn);
7885
7886         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7887                      (vcpu->arch.apf.gfns[key] != gfn &&
7888                       vcpu->arch.apf.gfns[key] != ~0); i++)
7889                 key = kvm_async_pf_next_probe(key);
7890
7891         return key;
7892 }
7893
7894 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7895 {
7896         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7897 }
7898
7899 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7900 {
7901         u32 i, j, k;
7902
7903         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7904         while (true) {
7905                 vcpu->arch.apf.gfns[i] = ~0;
7906                 do {
7907                         j = kvm_async_pf_next_probe(j);
7908                         if (vcpu->arch.apf.gfns[j] == ~0)
7909                                 return;
7910                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7911                         /*
7912                          * k lies cyclically in ]i,j]
7913                          * |    i.k.j |
7914                          * |....j i.k.| or  |.k..j i...|
7915                          */
7916                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7917                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7918                 i = j;
7919         }
7920 }
7921
7922 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7923 {
7924
7925         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7926                                       sizeof(val));
7927 }
7928
7929 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7930                                      struct kvm_async_pf *work)
7931 {
7932         struct x86_exception fault;
7933
7934         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7935         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7936
7937         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7938             (vcpu->arch.apf.send_user_only &&
7939              kvm_x86_ops->get_cpl(vcpu) == 0))
7940                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7941         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7942                 fault.vector = PF_VECTOR;
7943                 fault.error_code_valid = true;
7944                 fault.error_code = 0;
7945                 fault.nested_page_fault = false;
7946                 fault.address = work->arch.token;
7947                 kvm_inject_page_fault(vcpu, &fault);
7948         }
7949 }
7950
7951 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7952                                  struct kvm_async_pf *work)
7953 {
7954         struct x86_exception fault;
7955
7956         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7957         if (work->wakeup_all)
7958                 work->arch.token = ~0; /* broadcast wakeup */
7959         else
7960                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7961
7962         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7963             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7964                 fault.vector = PF_VECTOR;
7965                 fault.error_code_valid = true;
7966                 fault.error_code = 0;
7967                 fault.nested_page_fault = false;
7968                 fault.address = work->arch.token;
7969                 kvm_inject_page_fault(vcpu, &fault);
7970         }
7971         vcpu->arch.apf.halted = false;
7972         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7973 }
7974
7975 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7976 {
7977         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7978                 return true;
7979         else
7980                 return !kvm_event_needs_reinjection(vcpu) &&
7981                         kvm_x86_ops->interrupt_allowed(vcpu);
7982 }
7983
7984 void kvm_arch_start_assignment(struct kvm *kvm)
7985 {
7986         atomic_inc(&kvm->arch.assigned_device_count);
7987 }
7988 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
7989
7990 void kvm_arch_end_assignment(struct kvm *kvm)
7991 {
7992         atomic_dec(&kvm->arch.assigned_device_count);
7993 }
7994 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
7995
7996 bool kvm_arch_has_assigned_device(struct kvm *kvm)
7997 {
7998         return atomic_read(&kvm->arch.assigned_device_count);
7999 }
8000 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8001
8002 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8003 {
8004         atomic_inc(&kvm->arch.noncoherent_dma_count);
8005 }
8006 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8007
8008 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8009 {
8010         atomic_dec(&kvm->arch.noncoherent_dma_count);
8011 }
8012 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8013
8014 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8015 {
8016         return atomic_read(&kvm->arch.noncoherent_dma_count);
8017 }
8018 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8019
8020 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8021 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8022 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8023 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8024 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8025 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8026 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8027 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8028 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8029 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8031 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8032 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8033 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8034 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);