drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/list_sort.h>
  33 #include <linux/mm.h>
  34 #include <linux/module.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/pci.h>
  37 #include <linux/poison.h>
  38 #include <linux/ptrace.h>
  39 #include <linux/sched.h>
  40 #include <linux/slab.h>
  41 #include <linux/t10-pi.h>
  42 #include <linux/types.h>
  43 #include <scsi/sg.h>
  44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  45
  46 #define NVME_MINORS             (1U << MINORBITS)
  47 #define NVME_Q_DEPTH            1024
  48 #define NVME_AQ_DEPTH           256
  49 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  50 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  51 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  52 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  53
  54 static unsigned char admin_timeout = 60;
  55 module_param(admin_timeout, byte, 0644);
  56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  57
  58 unsigned char nvme_io_timeout = 30;
  59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  61
  62 static unsigned char shutdown_timeout = 5;
  63 module_param(shutdown_timeout, byte, 0644);
  64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  65
  66 static int nvme_major;
  67 module_param(nvme_major, int, 0);
  68
  69 static int nvme_char_major;
  70 module_param(nvme_char_major, int, 0);
  71
  72 static int use_threaded_interrupts;
  73 module_param(use_threaded_interrupts, int, 0);
  74
  75 static bool use_cmb_sqes = true;
  76 module_param(use_cmb_sqes, bool, 0644);
  77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
  78
  79 static DEFINE_SPINLOCK(dev_list_lock);
  80 static LIST_HEAD(dev_list);
  81 static struct task_struct *nvme_thread;
  82 static struct workqueue_struct *nvme_workq;
  83 static wait_queue_head_t nvme_kthread_wait;
  84
  85 static struct class *nvme_class;
  86
  87 static void nvme_reset_failed_dev(struct work_struct *ws);
  88 static int nvme_reset(struct nvme_dev *dev);
  89 static int nvme_process_cq(struct nvme_queue *nvmeq);
  90
  91 struct async_cmd_info {
  92         struct kthread_work work;
  93         struct kthread_worker *worker;
  94         struct request *req;
  95         u32 result;
  96         int status;
  97         void *ctx;
  98 };
  99
 100 /*
 101  * An NVM Express queue.  Each device has at least two (one for admin
 102  * commands and one for I/O commands).
 103  */
 104 struct nvme_queue {
 105         struct device *q_dmadev;
 106         struct nvme_dev *dev;
 107         char irqname[24];       /* nvme4294967295-65535\0 */
 108         spinlock_t q_lock;
 109         struct nvme_command *sq_cmds;
 110         struct nvme_command __iomem *sq_cmds_io;
 111         volatile struct nvme_completion *cqes;
 112         struct blk_mq_tags **tags;
 113         dma_addr_t sq_dma_addr;
 114         dma_addr_t cq_dma_addr;
 115         u32 __iomem *q_db;
 116         u16 q_depth;
 117         s16 cq_vector;
 118         u16 sq_head;
 119         u16 sq_tail;
 120         u16 cq_head;
 121         u16 qid;
 122         u8 cq_phase;
 123         u8 cqe_seen;
 124         struct async_cmd_info cmdinfo;
 125 };
 126
 127 /*
 128  * Check we didin't inadvertently grow the command struct
 129  */
 130 static inline void _nvme_check_size(void)
 131 {
 132         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 134         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 135         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 137         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 139         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 140         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 141         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 142         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 143         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 144 }
 145
 146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 147                                                 struct nvme_completion *);
 148
 149 struct nvme_cmd_info {
 150         nvme_completion_fn fn;
 151         void *ctx;
 152         int aborted;
 153         struct nvme_queue *nvmeq;
 154         struct nvme_iod iod[0];
 155 };
 156
 157 /*
 158  * Max size of iod being embedded in the request payload
 159  */
 160 #define NVME_INT_PAGES          2
 161 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 162 #define NVME_INT_MASK           0x01
 163
 164 /*
 165  * Will slightly overestimate the number of pages needed.  This is OK
 166  * as it only leads to a small amount of wasted memory for the lifetime of
 167  * the I/O.
 168  */
 169 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 170 {
 171         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 172         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 173 }
 174
 175 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 176 {
 177         unsigned int ret = sizeof(struct nvme_cmd_info);
 178
 179         ret += sizeof(struct nvme_iod);
 180         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 181         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 182
 183         return ret;
 184 }
 185
 186 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 187                                 unsigned int hctx_idx)
 188 {
 189         struct nvme_dev *dev = data;
 190         struct nvme_queue *nvmeq = dev->queues[0];
 191
 192         WARN_ON(hctx_idx != 0);
 193         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
 194         WARN_ON(nvmeq->tags);
 195
 196         hctx->driver_data = nvmeq;
 197         nvmeq->tags = &dev->admin_tagset.tags[0];
 198         return 0;
 199 }
 200
 201 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 202 {
 203         struct nvme_queue *nvmeq = hctx->driver_data;
 204
 205         nvmeq->tags = NULL;
 206 }
 207
 208 static int nvme_admin_init_request(void *data, struct request *req,
 209                                 unsigned int hctx_idx, unsigned int rq_idx,
 210                                 unsigned int numa_node)
 211 {
 212         struct nvme_dev *dev = data;
 213         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 214         struct nvme_queue *nvmeq = dev->queues[0];
 215
 216         BUG_ON(!nvmeq);
 217         cmd->nvmeq = nvmeq;
 218         return 0;
 219 }
 220
 221 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 222                           unsigned int hctx_idx)
 223 {
 224         struct nvme_dev *dev = data;
 225         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 226
 227         if (!nvmeq->tags)
 228                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
 229
 230         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
 231         hctx->driver_data = nvmeq;
 232         return 0;
 233 }
 234
 235 static int nvme_init_request(void *data, struct request *req,
 236                                 unsigned int hctx_idx, unsigned int rq_idx,
 237                                 unsigned int numa_node)
 238 {
 239         struct nvme_dev *dev = data;
 240         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 241         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 242
 243         BUG_ON(!nvmeq);
 244         cmd->nvmeq = nvmeq;
 245         return 0;
 246 }
 247
 248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 249                                 nvme_completion_fn handler)
 250 {
 251         cmd->fn = handler;
 252         cmd->ctx = ctx;
 253         cmd->aborted = 0;
 254         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 255 }
 256
 257 static void *iod_get_private(struct nvme_iod *iod)
 258 {
 259         return (void *) (iod->private & ~0x1UL);
 260 }
 261
 262 /*
 263  * If bit 0 is set, the iod is embedded in the request payload.
 264  */
 265 static bool iod_should_kfree(struct nvme_iod *iod)
 266 {
 267         return (iod->private & NVME_INT_MASK) == 0;
 268 }
 269
 270 /* Special values must be less than 0x1000 */
 271 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 272 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 273 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 274 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 275
 276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 277                                                 struct nvme_completion *cqe)
 278 {
 279         if (ctx == CMD_CTX_CANCELLED)
 280                 return;
 281         if (ctx == CMD_CTX_COMPLETED) {
 282                 dev_warn(nvmeq->q_dmadev,
 283                                 "completed id %d twice on queue %d\n",
 284                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 285                 return;
 286         }
 287         if (ctx == CMD_CTX_INVALID) {
 288                 dev_warn(nvmeq->q_dmadev,
 289                                 "invalid id %d completed on queue %d\n",
 290                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 291                 return;
 292         }
 293         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 294 }
 295
 296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 297 {
 298         void *ctx;
 299
 300         if (fn)
 301                 *fn = cmd->fn;
 302         ctx = cmd->ctx;
 303         cmd->fn = special_completion;
 304         cmd->ctx = CMD_CTX_CANCELLED;
 305         return ctx;
 306 }
 307
 308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 309                                                 struct nvme_completion *cqe)
 310 {
 311         u32 result = le32_to_cpup(&cqe->result);
 312         u16 status = le16_to_cpup(&cqe->status) >> 1;
 313
 314         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 315                 ++nvmeq->dev->event_limit;
 316         if (status != NVME_SC_SUCCESS)
 317                 return;
 318
 319         switch (result & 0xff07) {
 320         case NVME_AER_NOTICE_NS_CHANGED:
 321                 dev_info(nvmeq->q_dmadev, "rescanning\n");
 322                 schedule_work(&nvmeq->dev->scan_work);
 323         default:
 324                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
 325         }
 326 }
 327
 328 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 329                                                 struct nvme_completion *cqe)
 330 {
 331         struct request *req = ctx;
 332
 333         u16 status = le16_to_cpup(&cqe->status) >> 1;
 334         u32 result = le32_to_cpup(&cqe->result);
 335
 336         blk_mq_free_request(req);
 337
 338         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 339         ++nvmeq->dev->abort_limit;
 340 }
 341
 342 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 343                                                 struct nvme_completion *cqe)
 344 {
 345         struct async_cmd_info *cmdinfo = ctx;
 346         cmdinfo->result = le32_to_cpup(&cqe->result);
 347         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 348         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 349         blk_mq_free_request(cmdinfo->req);
 350 }
 351
 352 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 353                                   unsigned int tag)
 354 {
 355         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
 356
 357         return blk_mq_rq_to_pdu(req);
 358 }
 359
 360 /*
 361  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 362  */
 363 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 364                                                 nvme_completion_fn *fn)
 365 {
 366         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 367         void *ctx;
 368         if (tag >= nvmeq->q_depth) {
 369                 *fn = special_completion;
 370                 return CMD_CTX_INVALID;
 371         }
 372         if (fn)
 373                 *fn = cmd->fn;
 374         ctx = cmd->ctx;
 375         cmd->fn = special_completion;
 376         cmd->ctx = CMD_CTX_COMPLETED;
 377         return ctx;
 378 }
 379
 380 /**
 381  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 382  * @nvmeq: The queue to use
 383  * @cmd: The command to send
 384  *
 385  * Safe to use from interrupt context
 386  */
 387 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
 388                                                 struct nvme_command *cmd)
 389 {
 390         u16 tail = nvmeq->sq_tail;
 391
 392         if (nvmeq->sq_cmds_io)
 393                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
 394         else
 395                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 396
 397         if (++tail == nvmeq->q_depth)
 398                 tail = 0;
 399         writel(tail, nvmeq->q_db);
 400         nvmeq->sq_tail = tail;
 401 }
 402
 403 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 404 {
 405         unsigned long flags;
 406         spin_lock_irqsave(&nvmeq->q_lock, flags);
 407         __nvme_submit_cmd(nvmeq, cmd);
 408         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 409 }
 410
 411 static __le64 **iod_list(struct nvme_iod *iod)
 412 {
 413         return ((void *)iod) + iod->offset;
 414 }
 415
 416 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 417                             unsigned nseg, unsigned long private)
 418 {
 419         iod->private = private;
 420         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 421         iod->npages = -1;
 422         iod->length = nbytes;
 423         iod->nents = 0;
 424 }
 425
 426 static struct nvme_iod *
 427 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 428                  unsigned long priv, gfp_t gfp)
 429 {
 430         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 431                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 432                                 sizeof(struct scatterlist) * nseg, gfp);
 433
 434         if (iod)
 435                 iod_init(iod, bytes, nseg, priv);
 436
 437         return iod;
 438 }
 439
 440 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 441                                        gfp_t gfp)
 442 {
 443         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 444                                                 sizeof(struct nvme_dsm_range);
 445         struct nvme_iod *iod;
 446
 447         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 448             size <= NVME_INT_BYTES(dev)) {
 449                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 450
 451                 iod = cmd->iod;
 452                 iod_init(iod, size, rq->nr_phys_segments,
 453                                 (unsigned long) rq | NVME_INT_MASK);
 454                 return iod;
 455         }
 456
 457         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 458                                 (unsigned long) rq, gfp);
 459 }
 460
 461 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 462 {
 463         const int last_prp = dev->page_size / 8 - 1;
 464         int i;
 465         __le64 **list = iod_list(iod);
 466         dma_addr_t prp_dma = iod->first_dma;
 467
 468         if (iod->npages == 0)
 469                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 470         for (i = 0; i < iod->npages; i++) {
 471                 __le64 *prp_list = list[i];
 472                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 473                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 474                 prp_dma = next_prp_dma;
 475         }
 476
 477         if (iod_should_kfree(iod))
 478                 kfree(iod);
 479 }
 480
 481 static int nvme_error_status(u16 status)
 482 {
 483         switch (status & 0x7ff) {
 484         case NVME_SC_SUCCESS:
 485                 return 0;
 486         case NVME_SC_CAP_EXCEEDED:
 487                 return -ENOSPC;
 488         default:
 489                 return -EIO;
 490         }
 491 }
 492
 493 #ifdef CONFIG_BLK_DEV_INTEGRITY
 494 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 495 {
 496         if (be32_to_cpu(pi->ref_tag) == v)
 497                 pi->ref_tag = cpu_to_be32(p);
 498 }
 499
 500 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 501 {
 502         if (be32_to_cpu(pi->ref_tag) == p)
 503                 pi->ref_tag = cpu_to_be32(v);
 504 }
 505
 506 /**
 507  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 508  *
 509  * The virtual start sector is the one that was originally submitted by the
 510  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 511  * start sector may be different. Remap protection information to match the
 512  * physical LBA on writes, and back to the original seed on reads.
 513  *
 514  * Type 0 and 3 do not have a ref tag, so no remapping required.
 515  */
 516 static void nvme_dif_remap(struct request *req,
 517                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 518 {
 519         struct nvme_ns *ns = req->rq_disk->private_data;
 520         struct bio_integrity_payload *bip;
 521         struct t10_pi_tuple *pi;
 522         void *p, *pmap;
 523         u32 i, nlb, ts, phys, virt;
 524
 525         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 526                 return;
 527
 528         bip = bio_integrity(req->bio);
 529         if (!bip)
 530                 return;
 531
 532         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 533
 534         p = pmap;
 535         virt = bip_get_seed(bip);
 536         phys = nvme_block_nr(ns, blk_rq_pos(req));
 537         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 538         ts = ns->disk->integrity->tuple_size;
 539
 540         for (i = 0; i < nlb; i++, virt++, phys++) {
 541                 pi = (struct t10_pi_tuple *)p;
 542                 dif_swap(phys, virt, pi);
 543                 p += ts;
 544         }
 545         kunmap_atomic(pmap);
 546 }
 547
 548 static int nvme_noop_verify(struct blk_integrity_iter *iter)
 549 {
 550         return 0;
 551 }
 552
 553 static int nvme_noop_generate(struct blk_integrity_iter *iter)
 554 {
 555         return 0;
 556 }
 557
 558 struct blk_integrity nvme_meta_noop = {
 559         .name                   = "NVME_META_NOOP",
 560         .generate_fn            = nvme_noop_generate,
 561         .verify_fn              = nvme_noop_verify,
 562 };
 563
 564 static void nvme_init_integrity(struct nvme_ns *ns)
 565 {
 566         struct blk_integrity integrity;
 567
 568         switch (ns->pi_type) {
 569         case NVME_NS_DPS_PI_TYPE3:
 570                 integrity = t10_pi_type3_crc;
 571                 break;
 572         case NVME_NS_DPS_PI_TYPE1:
 573         case NVME_NS_DPS_PI_TYPE2:
 574                 integrity = t10_pi_type1_crc;
 575                 break;
 576         default:
 577                 integrity = nvme_meta_noop;
 578                 break;
 579         }
 580         integrity.tuple_size = ns->ms;
 581         blk_integrity_register(ns->disk, &integrity);
 582         blk_queue_max_integrity_segments(ns->queue, 1);
 583 }
 584 #else /* CONFIG_BLK_DEV_INTEGRITY */
 585 static void nvme_dif_remap(struct request *req,
 586                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 587 {
 588 }
 589 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 590 {
 591 }
 592 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 593 {
 594 }
 595 static void nvme_init_integrity(struct nvme_ns *ns)
 596 {
 597 }
 598 #endif
 599
 600 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 601                                                 struct nvme_completion *cqe)
 602 {
 603         struct nvme_iod *iod = ctx;
 604         struct request *req = iod_get_private(iod);
 605         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 606
 607         u16 status = le16_to_cpup(&cqe->status) >> 1;
 608
 609         if (unlikely(status)) {
 610                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 611                     && (jiffies - req->start_time) < req->timeout) {
 612                         unsigned long flags;
 613
 614                         blk_mq_requeue_request(req);
 615                         spin_lock_irqsave(req->q->queue_lock, flags);
 616                         if (!blk_queue_stopped(req->q))
 617                                 blk_mq_kick_requeue_list(req->q);
 618                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 619                         return;
 620                 }
 621                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 622                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
 623                                 req->errors = -EINTR;
 624                         else
 625                                 req->errors = status;
 626                 } else {
 627                         req->errors = nvme_error_status(status);
 628                 }
 629         } else
 630                 req->errors = 0;
 631         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 632                 u32 result = le32_to_cpup(&cqe->result);
 633                 req->special = (void *)(uintptr_t)result;
 634         }
 635
 636         if (cmd_rq->aborted)
 637                 dev_warn(nvmeq->dev->dev,
 638                         "completing aborted command with status:%04x\n",
 639                         status);
 640
 641         if (iod->nents) {
 642                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 643                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 644                 if (blk_integrity_rq(req)) {
 645                         if (!rq_data_dir(req))
 646                                 nvme_dif_remap(req, nvme_dif_complete);
 647                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 648                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 649                 }
 650         }
 651         nvme_free_iod(nvmeq->dev, iod);
 652
 653         blk_mq_complete_request(req);
 654 }
 655
 656 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 657 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 658                 int total_len, gfp_t gfp)
 659 {
 660         struct dma_pool *pool;
 661         int length = total_len;
 662         struct scatterlist *sg = iod->sg;
 663         int dma_len = sg_dma_len(sg);
 664         u64 dma_addr = sg_dma_address(sg);
 665         u32 page_size = dev->page_size;
 666         int offset = dma_addr & (page_size - 1);
 667         __le64 *prp_list;
 668         __le64 **list = iod_list(iod);
 669         dma_addr_t prp_dma;
 670         int nprps, i;
 671
 672         length -= (page_size - offset);
 673         if (length <= 0)
 674                 return total_len;
 675
 676         dma_len -= (page_size - offset);
 677         if (dma_len) {
 678                 dma_addr += (page_size - offset);
 679         } else {
 680                 sg = sg_next(sg);
 681                 dma_addr = sg_dma_address(sg);
 682                 dma_len = sg_dma_len(sg);
 683         }
 684
 685         if (length <= page_size) {
 686                 iod->first_dma = dma_addr;
 687                 return total_len;
 688         }
 689
 690         nprps = DIV_ROUND_UP(length, page_size);
 691         if (nprps <= (256 / 8)) {
 692                 pool = dev->prp_small_pool;
 693                 iod->npages = 0;
 694         } else {
 695                 pool = dev->prp_page_pool;
 696                 iod->npages = 1;
 697         }
 698
 699         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 700         if (!prp_list) {
 701                 iod->first_dma = dma_addr;
 702                 iod->npages = -1;
 703                 return (total_len - length) + page_size;
 704         }
 705         list[0] = prp_list;
 706         iod->first_dma = prp_dma;
 707         i = 0;
 708         for (;;) {
 709                 if (i == page_size >> 3) {
 710                         __le64 *old_prp_list = prp_list;
 711                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 712                         if (!prp_list)
 713                                 return total_len - length;
 714                         list[iod->npages++] = prp_list;
 715                         prp_list[0] = old_prp_list[i - 1];
 716                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 717                         i = 1;
 718                 }
 719                 prp_list[i++] = cpu_to_le64(dma_addr);
 720                 dma_len -= page_size;
 721                 dma_addr += page_size;
 722                 length -= page_size;
 723                 if (length <= 0)
 724                         break;
 725                 if (dma_len > 0)
 726                         continue;
 727                 BUG_ON(dma_len < 0);
 728                 sg = sg_next(sg);
 729                 dma_addr = sg_dma_address(sg);
 730                 dma_len = sg_dma_len(sg);
 731         }
 732
 733         return total_len;
 734 }
 735
 736 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 737                 struct nvme_iod *iod)
 738 {
 739         struct nvme_command cmnd;
 740
 741         memcpy(&cmnd, req->cmd, sizeof(cmnd));
 742         cmnd.rw.command_id = req->tag;
 743         if (req->nr_phys_segments) {
 744                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 745                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 746         }
 747
 748         __nvme_submit_cmd(nvmeq, &cmnd);
 749 }
 750
 751 /*
 752  * We reuse the small pool to allocate the 16-byte range here as it is not
 753  * worth having a special pool for these or additional cases to handle freeing
 754  * the iod.
 755  */
 756 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 757                 struct request *req, struct nvme_iod *iod)
 758 {
 759         struct nvme_dsm_range *range =
 760                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 761         struct nvme_command cmnd;
 762
 763         range->cattr = cpu_to_le32(0);
 764         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 765         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 766
 767         memset(&cmnd, 0, sizeof(cmnd));
 768         cmnd.dsm.opcode = nvme_cmd_dsm;
 769         cmnd.dsm.command_id = req->tag;
 770         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
 771         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
 772         cmnd.dsm.nr = 0;
 773         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 774
 775         __nvme_submit_cmd(nvmeq, &cmnd);
 776 }
 777
 778 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 779                                                                 int cmdid)
 780 {
 781         struct nvme_command cmnd;
 782
 783         memset(&cmnd, 0, sizeof(cmnd));
 784         cmnd.common.opcode = nvme_cmd_flush;
 785         cmnd.common.command_id = cmdid;
 786         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
 787
 788         __nvme_submit_cmd(nvmeq, &cmnd);
 789 }
 790
 791 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 792                                                         struct nvme_ns *ns)
 793 {
 794         struct request *req = iod_get_private(iod);
 795         struct nvme_command cmnd;
 796         u16 control = 0;
 797         u32 dsmgmt = 0;
 798
 799         if (req->cmd_flags & REQ_FUA)
 800                 control |= NVME_RW_FUA;
 801         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 802                 control |= NVME_RW_LR;
 803
 804         if (req->cmd_flags & REQ_RAHEAD)
 805                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 806
 807         memset(&cmnd, 0, sizeof(cmnd));
 808         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 809         cmnd.rw.command_id = req->tag;
 810         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
 811         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 812         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 813         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 814         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 815
 816         if (ns->ms) {
 817                 switch (ns->pi_type) {
 818                 case NVME_NS_DPS_PI_TYPE3:
 819                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 820                         break;
 821                 case NVME_NS_DPS_PI_TYPE1:
 822                 case NVME_NS_DPS_PI_TYPE2:
 823                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 824                                         NVME_RW_PRINFO_PRCHK_REF;
 825                         cmnd.rw.reftag = cpu_to_le32(
 826                                         nvme_block_nr(ns, blk_rq_pos(req)));
 827                         break;
 828                 }
 829                 if (blk_integrity_rq(req))
 830                         cmnd.rw.metadata =
 831                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
 832                 else
 833                         control |= NVME_RW_PRINFO_PRACT;
 834         }
 835
 836         cmnd.rw.control = cpu_to_le16(control);
 837         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
 838
 839         __nvme_submit_cmd(nvmeq, &cmnd);
 840
 841         return 0;
 842 }
 843
 844 /*
 845  * NOTE: ns is NULL when called on the admin queue.
 846  */
 847 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 848                          const struct blk_mq_queue_data *bd)
 849 {
 850         struct nvme_ns *ns = hctx->queue->queuedata;
 851         struct nvme_queue *nvmeq = hctx->driver_data;
 852         struct nvme_dev *dev = nvmeq->dev;
 853         struct request *req = bd->rq;
 854         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 855         struct nvme_iod *iod;
 856         enum dma_data_direction dma_dir;
 857
 858         /*
 859          * If formated with metadata, require the block layer provide a buffer
 860          * unless this namespace is formated such that the metadata can be
 861          * stripped/generated by the controller with PRACT=1.
 862          */
 863         if (ns && ns->ms && !blk_integrity_rq(req)) {
 864                 if (!(ns->pi_type && ns->ms == 8) &&
 865                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
 866                         req->errors = -EFAULT;
 867                         blk_mq_complete_request(req);
 868                         return BLK_MQ_RQ_QUEUE_OK;
 869                 }
 870         }
 871
 872         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 873         if (!iod)
 874                 return BLK_MQ_RQ_QUEUE_BUSY;
 875
 876         if (req->cmd_flags & REQ_DISCARD) {
 877                 void *range;
 878                 /*
 879                  * We reuse the small pool to allocate the 16-byte range here
 880                  * as it is not worth having a special pool for these or
 881                  * additional cases to handle freeing the iod.
 882                  */
 883                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 884                                                 &iod->first_dma);
 885                 if (!range)
 886                         goto retry_cmd;
 887                 iod_list(iod)[0] = (__le64 *)range;
 888                 iod->npages = 0;
 889         } else if (req->nr_phys_segments) {
 890                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 891
 892                 sg_init_table(iod->sg, req->nr_phys_segments);
 893                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 894                 if (!iod->nents)
 895                         goto error_cmd;
 896
 897                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 898                         goto retry_cmd;
 899
 900                 if (blk_rq_bytes(req) !=
 901                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 902                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 903                         goto retry_cmd;
 904                 }
 905                 if (blk_integrity_rq(req)) {
 906                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 907                                 goto error_cmd;
 908
 909                         sg_init_table(iod->meta_sg, 1);
 910                         if (blk_rq_map_integrity_sg(
 911                                         req->q, req->bio, iod->meta_sg) != 1)
 912                                 goto error_cmd;
 913
 914                         if (rq_data_dir(req))
 915                                 nvme_dif_remap(req, nvme_dif_prep);
 916
 917                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 918                                 goto error_cmd;
 919                 }
 920         }
 921
 922         nvme_set_info(cmd, iod, req_completion);
 923         spin_lock_irq(&nvmeq->q_lock);
 924         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 925                 nvme_submit_priv(nvmeq, req, iod);
 926         else if (req->cmd_flags & REQ_DISCARD)
 927                 nvme_submit_discard(nvmeq, ns, req, iod);
 928         else if (req->cmd_flags & REQ_FLUSH)
 929                 nvme_submit_flush(nvmeq, ns, req->tag);
 930         else
 931                 nvme_submit_iod(nvmeq, iod, ns);
 932
 933         nvme_process_cq(nvmeq);
 934         spin_unlock_irq(&nvmeq->q_lock);
 935         return BLK_MQ_RQ_QUEUE_OK;
 936
 937  error_cmd:
 938         nvme_free_iod(dev, iod);
 939         return BLK_MQ_RQ_QUEUE_ERROR;
 940  retry_cmd:
 941         nvme_free_iod(dev, iod);
 942         return BLK_MQ_RQ_QUEUE_BUSY;
 943 }
 944
 945 static int nvme_process_cq(struct nvme_queue *nvmeq)
 946 {
 947         u16 head, phase;
 948
 949         head = nvmeq->cq_head;
 950         phase = nvmeq->cq_phase;
 951
 952         for (;;) {
 953                 void *ctx;
 954                 nvme_completion_fn fn;
 955                 struct nvme_completion cqe = nvmeq->cqes[head];
 956                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 957                         break;
 958                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 959                 if (++head == nvmeq->q_depth) {
 960                         head = 0;
 961                         phase = !phase;
 962                 }
 963                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 964                 fn(nvmeq, ctx, &cqe);
 965         }
 966
 967         /* If the controller ignores the cq head doorbell and continuously
 968          * writes to the queue, it is theoretically possible to wrap around
 969          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 970          * requires that 0.1% of your interrupts are handled, so this isn't
 971          * a big problem.
 972          */
 973         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 974                 return 0;
 975
 976         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 977         nvmeq->cq_head = head;
 978         nvmeq->cq_phase = phase;
 979
 980         nvmeq->cqe_seen = 1;
 981         return 1;
 982 }
 983
 984 static irqreturn_t nvme_irq(int irq, void *data)
 985 {
 986         irqreturn_t result;
 987         struct nvme_queue *nvmeq = data;
 988         spin_lock(&nvmeq->q_lock);
 989         nvme_process_cq(nvmeq);
 990         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 991         nvmeq->cqe_seen = 0;
 992         spin_unlock(&nvmeq->q_lock);
 993         return result;
 994 }
 995
 996 static irqreturn_t nvme_irq_check(int irq, void *data)
 997 {
 998         struct nvme_queue *nvmeq = data;
 999         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
1000         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1001                 return IRQ_NONE;
1002         return IRQ_WAKE_THREAD;
1003 }
1004
1005 /*
1006  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1007  * if the result is positive, it's an NVM Express status code
1008  */
1009 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1010                 void *buffer, void __user *ubuffer, unsigned bufflen,
1011                 u32 *result, unsigned timeout)
1012 {
1013         bool write = cmd->common.opcode & 1;
1014         struct bio *bio = NULL;
1015         struct request *req;
1016         int ret;
1017
1018         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1019         if (IS_ERR(req))
1020                 return PTR_ERR(req);
1021
1022         req->cmd_type = REQ_TYPE_DRV_PRIV;
1023         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1024         req->__data_len = 0;
1025         req->__sector = (sector_t) -1;
1026         req->bio = req->biotail = NULL;
1027
1028         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1029
1030         req->cmd = (unsigned char *)cmd;
1031         req->cmd_len = sizeof(struct nvme_command);
1032         req->special = (void *)0;
1033
1034         if (buffer && bufflen) {
1035                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1036                 if (ret)
1037                         goto out;
1038         } else if (ubuffer && bufflen) {
1039                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1040                 if (ret)
1041                         goto out;
1042                 bio = req->bio;
1043         }
1044
1045         blk_execute_rq(req->q, NULL, req, 0);
1046         if (bio)
1047                 blk_rq_unmap_user(bio);
1048         if (result)
1049                 *result = (u32)(uintptr_t)req->special;
1050         ret = req->errors;
1051  out:
1052         blk_mq_free_request(req);
1053         return ret;
1054 }
1055
1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1057                 void *buffer, unsigned bufflen)
1058 {
1059         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1060 }
1061
1062 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1063 {
1064         struct nvme_queue *nvmeq = dev->queues[0];
1065         struct nvme_command c;
1066         struct nvme_cmd_info *cmd_info;
1067         struct request *req;
1068
1069         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1070         if (IS_ERR(req))
1071                 return PTR_ERR(req);
1072
1073         req->cmd_flags |= REQ_NO_TIMEOUT;
1074         cmd_info = blk_mq_rq_to_pdu(req);
1075         nvme_set_info(cmd_info, NULL, async_req_completion);
1076
1077         memset(&c, 0, sizeof(c));
1078         c.common.opcode = nvme_admin_async_event;
1079         c.common.command_id = req->tag;
1080
1081         blk_mq_free_request(req);
1082         __nvme_submit_cmd(nvmeq, &c);
1083         return 0;
1084 }
1085
1086 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1087                         struct nvme_command *cmd,
1088                         struct async_cmd_info *cmdinfo, unsigned timeout)
1089 {
1090         struct nvme_queue *nvmeq = dev->queues[0];
1091         struct request *req;
1092         struct nvme_cmd_info *cmd_rq;
1093
1094         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1095         if (IS_ERR(req))
1096                 return PTR_ERR(req);
1097
1098         req->timeout = timeout;
1099         cmd_rq = blk_mq_rq_to_pdu(req);
1100         cmdinfo->req = req;
1101         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1102         cmdinfo->status = -EINTR;
1103
1104         cmd->common.command_id = req->tag;
1105
1106         nvme_submit_cmd(nvmeq, cmd);
1107         return 0;
1108 }
1109
1110 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1111 {
1112         struct nvme_command c;
1113
1114         memset(&c, 0, sizeof(c));
1115         c.delete_queue.opcode = opcode;
1116         c.delete_queue.qid = cpu_to_le16(id);
1117
1118         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1119 }
1120
1121 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1122                                                 struct nvme_queue *nvmeq)
1123 {
1124         struct nvme_command c;
1125         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1126
1127         /*
1128          * Note: we (ab)use the fact the the prp fields survive if no data
1129          * is attached to the request.
1130          */
1131         memset(&c, 0, sizeof(c));
1132         c.create_cq.opcode = nvme_admin_create_cq;
1133         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1134         c.create_cq.cqid = cpu_to_le16(qid);
1135         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1136         c.create_cq.cq_flags = cpu_to_le16(flags);
1137         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1138
1139         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1140 }
1141
1142 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1143                                                 struct nvme_queue *nvmeq)
1144 {
1145         struct nvme_command c;
1146         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1147
1148         /*
1149          * Note: we (ab)use the fact the the prp fields survive if no data
1150          * is attached to the request.
1151          */
1152         memset(&c, 0, sizeof(c));
1153         c.create_sq.opcode = nvme_admin_create_sq;
1154         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1155         c.create_sq.sqid = cpu_to_le16(qid);
1156         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1157         c.create_sq.sq_flags = cpu_to_le16(flags);
1158         c.create_sq.cqid = cpu_to_le16(qid);
1159
1160         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1161 }
1162
1163 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1164 {
1165         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1166 }
1167
1168 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1169 {
1170         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1171 }
1172
1173 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1174 {
1175         struct nvme_command c = { };
1176         int error;
1177
1178         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1179         c.identify.opcode = nvme_admin_identify;
1180         c.identify.cns = cpu_to_le32(1);
1181
1182         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1183         if (!*id)
1184                 return -ENOMEM;
1185
1186         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1187                         sizeof(struct nvme_id_ctrl));
1188         if (error)
1189                 kfree(*id);
1190         return error;
1191 }
1192
1193 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1194                 struct nvme_id_ns **id)
1195 {
1196         struct nvme_command c = { };
1197         int error;
1198
1199         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1200         c.identify.opcode = nvme_admin_identify,
1201         c.identify.nsid = cpu_to_le32(nsid),
1202
1203         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1204         if (!*id)
1205                 return -ENOMEM;
1206
1207         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1208                         sizeof(struct nvme_id_ns));
1209         if (error)
1210                 kfree(*id);
1211         return error;
1212 }
1213
1214 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1215                                         dma_addr_t dma_addr, u32 *result)
1216 {
1217         struct nvme_command c;
1218
1219         memset(&c, 0, sizeof(c));
1220         c.features.opcode = nvme_admin_get_features;
1221         c.features.nsid = cpu_to_le32(nsid);
1222         c.features.prp1 = cpu_to_le64(dma_addr);
1223         c.features.fid = cpu_to_le32(fid);
1224
1225         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1226                         result, 0);
1227 }
1228
1229 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1230                                         dma_addr_t dma_addr, u32 *result)
1231 {
1232         struct nvme_command c;
1233
1234         memset(&c, 0, sizeof(c));
1235         c.features.opcode = nvme_admin_set_features;
1236         c.features.prp1 = cpu_to_le64(dma_addr);
1237         c.features.fid = cpu_to_le32(fid);
1238         c.features.dword11 = cpu_to_le32(dword11);
1239
1240         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1241                         result, 0);
1242 }
1243
1244 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1245 {
1246         struct nvme_command c = { };
1247         int error;
1248
1249         c.common.opcode = nvme_admin_get_log_page,
1250         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1251         c.common.cdw10[0] = cpu_to_le32(
1252                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1253                          NVME_LOG_SMART),
1254
1255         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1256         if (!*log)
1257                 return -ENOMEM;
1258
1259         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1260                         sizeof(struct nvme_smart_log));
1261         if (error)
1262                 kfree(*log);
1263         return error;
1264 }
1265
1266 /**
1267  * nvme_abort_req - Attempt aborting a request
1268  *
1269  * Schedule controller reset if the command was already aborted once before and
1270  * still hasn't been returned to the driver, or if this is the admin queue.
1271  */
1272 static void nvme_abort_req(struct request *req)
1273 {
1274         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1275         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1276         struct nvme_dev *dev = nvmeq->dev;
1277         struct request *abort_req;
1278         struct nvme_cmd_info *abort_cmd;
1279         struct nvme_command cmd;
1280
1281         if (!nvmeq->qid || cmd_rq->aborted) {
1282                 unsigned long flags;
1283
1284                 spin_lock_irqsave(&dev_list_lock, flags);
1285                 if (work_busy(&dev->reset_work))
1286                         goto out;
1287                 list_del_init(&dev->node);
1288                 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1289                                                         req->tag, nvmeq->qid);
1290                 dev->reset_workfn = nvme_reset_failed_dev;
1291                 queue_work(nvme_workq, &dev->reset_work);
1292  out:
1293                 spin_unlock_irqrestore(&dev_list_lock, flags);
1294                 return;
1295         }
1296
1297         if (!dev->abort_limit)
1298                 return;
1299
1300         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1301                                                                         false);
1302         if (IS_ERR(abort_req))
1303                 return;
1304
1305         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1306         nvme_set_info(abort_cmd, abort_req, abort_completion);
1307
1308         memset(&cmd, 0, sizeof(cmd));
1309         cmd.abort.opcode = nvme_admin_abort_cmd;
1310         cmd.abort.cid = req->tag;
1311         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1312         cmd.abort.command_id = abort_req->tag;
1313
1314         --dev->abort_limit;
1315         cmd_rq->aborted = 1;
1316
1317         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1318                                                         nvmeq->qid);
1319         nvme_submit_cmd(dev->queues[0], &cmd);
1320 }
1321
1322 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1323 {
1324         struct nvme_queue *nvmeq = data;
1325         void *ctx;
1326         nvme_completion_fn fn;
1327         struct nvme_cmd_info *cmd;
1328         struct nvme_completion cqe;
1329
1330         if (!blk_mq_request_started(req))
1331                 return;
1332
1333         cmd = blk_mq_rq_to_pdu(req);
1334
1335         if (cmd->ctx == CMD_CTX_CANCELLED)
1336                 return;
1337
1338         if (blk_queue_dying(req->q))
1339                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1340         else
1341                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1342
1343
1344         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1345                                                 req->tag, nvmeq->qid);
1346         ctx = cancel_cmd_info(cmd, &fn);
1347         fn(nvmeq, ctx, &cqe);
1348 }
1349
1350 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1351 {
1352         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1353         struct nvme_queue *nvmeq = cmd->nvmeq;
1354
1355         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1356                                                         nvmeq->qid);
1357         spin_lock_irq(&nvmeq->q_lock);
1358         nvme_abort_req(req);
1359         spin_unlock_irq(&nvmeq->q_lock);
1360
1361         /*
1362          * The aborted req will be completed on receiving the abort req.
1363          * We enable the timer again. If hit twice, it'll cause a device reset,
1364          * as the device then is in a faulty state.
1365          */
1366         return BLK_EH_RESET_TIMER;
1367 }
1368
1369 static void nvme_free_queue(struct nvme_queue *nvmeq)
1370 {
1371         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1372                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1373         if (nvmeq->sq_cmds)
1374                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1375                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1376         kfree(nvmeq);
1377 }
1378
1379 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1380 {
1381         int i;
1382
1383         for (i = dev->queue_count - 1; i >= lowest; i--) {
1384                 struct nvme_queue *nvmeq = dev->queues[i];
1385                 dev->queue_count--;
1386                 dev->queues[i] = NULL;
1387                 nvme_free_queue(nvmeq);
1388         }
1389 }
1390
1391 /**
1392  * nvme_suspend_queue - put queue into suspended state
1393  * @nvmeq - queue to suspend
1394  */
1395 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1396 {
1397         int vector;
1398
1399         spin_lock_irq(&nvmeq->q_lock);
1400         if (nvmeq->cq_vector == -1) {
1401                 spin_unlock_irq(&nvmeq->q_lock);
1402                 return 1;
1403         }
1404         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1405         nvmeq->dev->online_queues--;
1406         nvmeq->cq_vector = -1;
1407         spin_unlock_irq(&nvmeq->q_lock);
1408
1409         if (!nvmeq->qid && nvmeq->dev->admin_q)
1410                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1411
1412         irq_set_affinity_hint(vector, NULL);
1413         free_irq(vector, nvmeq);
1414
1415         return 0;
1416 }
1417
1418 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1419 {
1420         spin_lock_irq(&nvmeq->q_lock);
1421         if (nvmeq->tags && *nvmeq->tags)
1422                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1423         spin_unlock_irq(&nvmeq->q_lock);
1424 }
1425
1426 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1427 {
1428         struct nvme_queue *nvmeq = dev->queues[qid];
1429
1430         if (!nvmeq)
1431                 return;
1432         if (nvme_suspend_queue(nvmeq))
1433                 return;
1434
1435         /* Don't tell the adapter to delete the admin queue.
1436          * Don't tell a removed adapter to delete IO queues. */
1437         if (qid && readl(&dev->bar->csts) != -1) {
1438                 adapter_delete_sq(dev, qid);
1439                 adapter_delete_cq(dev, qid);
1440         }
1441
1442         spin_lock_irq(&nvmeq->q_lock);
1443         nvme_process_cq(nvmeq);
1444         spin_unlock_irq(&nvmeq->q_lock);
1445 }
1446
1447 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1448                                 int entry_size)
1449 {
1450         int q_depth = dev->q_depth;
1451         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1452
1453         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1454                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1455                 mem_per_q = round_down(mem_per_q, dev->page_size);
1456                 q_depth = div_u64(mem_per_q, entry_size);
1457
1458                 /*
1459                  * Ensure the reduced q_depth is above some threshold where it
1460                  * would be better to map queues in system memory with the
1461                  * original depth
1462                  */
1463                 if (q_depth < 64)
1464                         return -ENOMEM;
1465         }
1466
1467         return q_depth;
1468 }
1469
1470 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1471                                 int qid, int depth)
1472 {
1473         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1474                 unsigned offset = (qid - 1) *
1475                                         roundup(SQ_SIZE(depth), dev->page_size);
1476                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1477                 nvmeq->sq_cmds_io = dev->cmb + offset;
1478         } else {
1479                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1480                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1481                 if (!nvmeq->sq_cmds)
1482                         return -ENOMEM;
1483         }
1484
1485         return 0;
1486 }
1487
1488 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1489                                                         int depth)
1490 {
1491         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1492         if (!nvmeq)
1493                 return NULL;
1494
1495         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1496                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1497         if (!nvmeq->cqes)
1498                 goto free_nvmeq;
1499
1500         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1501                 goto free_cqdma;
1502
1503         nvmeq->q_dmadev = dev->dev;
1504         nvmeq->dev = dev;
1505         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1506                         dev->instance, qid);
1507         spin_lock_init(&nvmeq->q_lock);
1508         nvmeq->cq_head = 0;
1509         nvmeq->cq_phase = 1;
1510         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1511         nvmeq->q_depth = depth;
1512         nvmeq->qid = qid;
1513         nvmeq->cq_vector = -1;
1514         dev->queues[qid] = nvmeq;
1515
1516         /* make sure queue descriptor is set before queue count, for kthread */
1517         mb();
1518         dev->queue_count++;
1519
1520         return nvmeq;
1521
1522  free_cqdma:
1523         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1524                                                         nvmeq->cq_dma_addr);
1525  free_nvmeq:
1526         kfree(nvmeq);
1527         return NULL;
1528 }
1529
1530 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1531                                                         const char *name)
1532 {
1533         if (use_threaded_interrupts)
1534                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1535                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1536                                         name, nvmeq);
1537         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1538                                 IRQF_SHARED, name, nvmeq);
1539 }
1540
1541 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1542 {
1543         struct nvme_dev *dev = nvmeq->dev;
1544
1545         spin_lock_irq(&nvmeq->q_lock);
1546         nvmeq->sq_tail = 0;
1547         nvmeq->cq_head = 0;
1548         nvmeq->cq_phase = 1;
1549         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1550         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1551         dev->online_queues++;
1552         spin_unlock_irq(&nvmeq->q_lock);
1553 }
1554
1555 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1556 {
1557         struct nvme_dev *dev = nvmeq->dev;
1558         int result;
1559
1560         nvmeq->cq_vector = qid - 1;
1561         result = adapter_alloc_cq(dev, qid, nvmeq);
1562         if (result < 0)
1563                 return result;
1564
1565         result = adapter_alloc_sq(dev, qid, nvmeq);
1566         if (result < 0)
1567                 goto release_cq;
1568
1569         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1570         if (result < 0)
1571                 goto release_sq;
1572
1573         nvme_init_queue(nvmeq, qid);
1574         return result;
1575
1576  release_sq:
1577         adapter_delete_sq(dev, qid);
1578  release_cq:
1579         adapter_delete_cq(dev, qid);
1580         return result;
1581 }
1582
1583 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1584 {
1585         unsigned long timeout;
1586         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1587
1588         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1589
1590         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1591                 msleep(100);
1592                 if (fatal_signal_pending(current))
1593                         return -EINTR;
1594                 if (time_after(jiffies, timeout)) {
1595                         dev_err(dev->dev,
1596                                 "Device not ready; aborting %s\n", enabled ?
1597                                                 "initialisation" : "reset");
1598                         return -ENODEV;
1599                 }
1600         }
1601
1602         return 0;
1603 }
1604
1605 /*
1606  * If the device has been passed off to us in an enabled state, just clear
1607  * the enabled bit.  The spec says we should set the 'shutdown notification
1608  * bits', but doing so may cause the device to complete commands to the
1609  * admin queue ... and we don't know what memory that might be pointing at!
1610  */
1611 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1612 {
1613         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1614         dev->ctrl_config &= ~NVME_CC_ENABLE;
1615         writel(dev->ctrl_config, &dev->bar->cc);
1616
1617         return nvme_wait_ready(dev, cap, false);
1618 }
1619
1620 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1621 {
1622         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1623         dev->ctrl_config |= NVME_CC_ENABLE;
1624         writel(dev->ctrl_config, &dev->bar->cc);
1625
1626         return nvme_wait_ready(dev, cap, true);
1627 }
1628
1629 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1630 {
1631         unsigned long timeout;
1632
1633         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1634         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1635
1636         writel(dev->ctrl_config, &dev->bar->cc);
1637
1638         timeout = SHUTDOWN_TIMEOUT + jiffies;
1639         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1640                                                         NVME_CSTS_SHST_CMPLT) {
1641                 msleep(100);
1642                 if (fatal_signal_pending(current))
1643                         return -EINTR;
1644                 if (time_after(jiffies, timeout)) {
1645                         dev_err(dev->dev,
1646                                 "Device shutdown incomplete; abort shutdown\n");
1647                         return -ENODEV;
1648                 }
1649         }
1650
1651         return 0;
1652 }
1653
1654 static struct blk_mq_ops nvme_mq_admin_ops = {
1655         .queue_rq       = nvme_queue_rq,
1656         .map_queue      = blk_mq_map_queue,
1657         .init_hctx      = nvme_admin_init_hctx,
1658         .exit_hctx      = nvme_admin_exit_hctx,
1659         .init_request   = nvme_admin_init_request,
1660         .timeout        = nvme_timeout,
1661 };
1662
1663 static struct blk_mq_ops nvme_mq_ops = {
1664         .queue_rq       = nvme_queue_rq,
1665         .map_queue      = blk_mq_map_queue,
1666         .init_hctx      = nvme_init_hctx,
1667         .init_request   = nvme_init_request,
1668         .timeout        = nvme_timeout,
1669 };
1670
1671 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1672 {
1673         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1674                 blk_cleanup_queue(dev->admin_q);
1675                 blk_mq_free_tag_set(&dev->admin_tagset);
1676         }
1677 }
1678
1679 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1680 {
1681         if (!dev->admin_q) {
1682                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1683                 dev->admin_tagset.nr_hw_queues = 1;
1684                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1685                 dev->admin_tagset.reserved_tags = 1;
1686                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1687                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1688                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1689                 dev->admin_tagset.driver_data = dev;
1690
1691                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1692                         return -ENOMEM;
1693
1694                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1695                 if (IS_ERR(dev->admin_q)) {
1696                         blk_mq_free_tag_set(&dev->admin_tagset);
1697                         return -ENOMEM;
1698                 }
1699                 if (!blk_get_queue(dev->admin_q)) {
1700                         nvme_dev_remove_admin(dev);
1701                         dev->admin_q = NULL;
1702                         return -ENODEV;
1703                 }
1704         } else
1705                 blk_mq_unfreeze_queue(dev->admin_q);
1706
1707         return 0;
1708 }
1709
1710 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1711 {
1712         int result;
1713         u32 aqa;
1714         u64 cap = readq(&dev->bar->cap);
1715         struct nvme_queue *nvmeq;
1716         unsigned page_shift = PAGE_SHIFT;
1717         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1718         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1719
1720         if (page_shift < dev_page_min) {
1721                 dev_err(dev->dev,
1722                                 "Minimum device page size (%u) too large for "
1723                                 "host (%u)\n", 1 << dev_page_min,
1724                                 1 << page_shift);
1725                 return -ENODEV;
1726         }
1727         if (page_shift > dev_page_max) {
1728                 dev_info(dev->dev,
1729                                 "Device maximum page size (%u) smaller than "
1730                                 "host (%u); enabling work-around\n",
1731                                 1 << dev_page_max, 1 << page_shift);
1732                 page_shift = dev_page_max;
1733         }
1734
1735         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1736                                                 NVME_CAP_NSSRC(cap) : 0;
1737
1738         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1739                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1740
1741         result = nvme_disable_ctrl(dev, cap);
1742         if (result < 0)
1743                 return result;
1744
1745         nvmeq = dev->queues[0];
1746         if (!nvmeq) {
1747                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1748                 if (!nvmeq)
1749                         return -ENOMEM;
1750         }
1751
1752         aqa = nvmeq->q_depth - 1;
1753         aqa |= aqa << 16;
1754
1755         dev->page_size = 1 << page_shift;
1756
1757         dev->ctrl_config = NVME_CC_CSS_NVM;
1758         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1759         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1760         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1761
1762         writel(aqa, &dev->bar->aqa);
1763         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1764         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1765
1766         result = nvme_enable_ctrl(dev, cap);
1767         if (result)
1768                 goto free_nvmeq;
1769
1770         nvmeq->cq_vector = 0;
1771         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1772         if (result) {
1773                 nvmeq->cq_vector = -1;
1774                 goto free_nvmeq;
1775         }
1776
1777         return result;
1778
1779  free_nvmeq:
1780         nvme_free_queues(dev, 0);
1781         return result;
1782 }
1783
1784 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1785 {
1786         struct nvme_dev *dev = ns->dev;
1787         struct nvme_user_io io;
1788         struct nvme_command c;
1789         unsigned length, meta_len;
1790         int status, write;
1791         dma_addr_t meta_dma = 0;
1792         void *meta = NULL;
1793         void __user *metadata;
1794
1795         if (copy_from_user(&io, uio, sizeof(io)))
1796                 return -EFAULT;
1797
1798         switch (io.opcode) {
1799         case nvme_cmd_write:
1800         case nvme_cmd_read:
1801         case nvme_cmd_compare:
1802                 break;
1803         default:
1804                 return -EINVAL;
1805         }
1806
1807         length = (io.nblocks + 1) << ns->lba_shift;
1808         meta_len = (io.nblocks + 1) * ns->ms;
1809         metadata = (void __user *)(unsigned long)io.metadata;
1810         write = io.opcode & 1;
1811
1812         if (ns->ext) {
1813                 length += meta_len;
1814                 meta_len = 0;
1815         }
1816         if (meta_len) {
1817                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1818                         return -EINVAL;
1819
1820                 meta = dma_alloc_coherent(dev->dev, meta_len,
1821                                                 &meta_dma, GFP_KERNEL);
1822
1823                 if (!meta) {
1824                         status = -ENOMEM;
1825                         goto unmap;
1826                 }
1827                 if (write) {
1828                         if (copy_from_user(meta, metadata, meta_len)) {
1829                                 status = -EFAULT;
1830                                 goto unmap;
1831                         }
1832                 }
1833         }
1834
1835         memset(&c, 0, sizeof(c));
1836         c.rw.opcode = io.opcode;
1837         c.rw.flags = io.flags;
1838         c.rw.nsid = cpu_to_le32(ns->ns_id);
1839         c.rw.slba = cpu_to_le64(io.slba);
1840         c.rw.length = cpu_to_le16(io.nblocks);
1841         c.rw.control = cpu_to_le16(io.control);
1842         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1843         c.rw.reftag = cpu_to_le32(io.reftag);
1844         c.rw.apptag = cpu_to_le16(io.apptag);
1845         c.rw.appmask = cpu_to_le16(io.appmask);
1846         c.rw.metadata = cpu_to_le64(meta_dma);
1847
1848         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1849                         (void __user *)io.addr, length, NULL, 0);
1850  unmap:
1851         if (meta) {
1852                 if (status == NVME_SC_SUCCESS && !write) {
1853                         if (copy_to_user(metadata, meta, meta_len))
1854                                 status = -EFAULT;
1855                 }
1856                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1857         }
1858         return status;
1859 }
1860
1861 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1862                         struct nvme_passthru_cmd __user *ucmd)
1863 {
1864         struct nvme_passthru_cmd cmd;
1865         struct nvme_command c;
1866         unsigned timeout = 0;
1867         int status;
1868
1869         if (!capable(CAP_SYS_ADMIN))
1870                 return -EACCES;
1871         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1872                 return -EFAULT;
1873
1874         memset(&c, 0, sizeof(c));
1875         c.common.opcode = cmd.opcode;
1876         c.common.flags = cmd.flags;
1877         c.common.nsid = cpu_to_le32(cmd.nsid);
1878         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1879         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1880         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1881         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1882         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1883         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1884         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1885         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1886
1887         if (cmd.timeout_ms)
1888                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1889
1890         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1891                         NULL, (void __user *)cmd.addr, cmd.data_len,
1892                         &cmd.result, timeout);
1893         if (status >= 0) {
1894                 if (put_user(cmd.result, &ucmd->result))
1895                         return -EFAULT;
1896         }
1897
1898         return status;
1899 }
1900
1901 static int nvme_subsys_reset(struct nvme_dev *dev)
1902 {
1903         if (!dev->subsystem)
1904                 return -ENOTTY;
1905
1906         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1907         return 0;
1908 }
1909
1910 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1911                                                         unsigned long arg)
1912 {
1913         struct nvme_ns *ns = bdev->bd_disk->private_data;
1914
1915         switch (cmd) {
1916         case NVME_IOCTL_ID:
1917                 force_successful_syscall_return();
1918                 return ns->ns_id;
1919         case NVME_IOCTL_ADMIN_CMD:
1920                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1921         case NVME_IOCTL_IO_CMD:
1922                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1923         case NVME_IOCTL_SUBMIT_IO:
1924                 return nvme_submit_io(ns, (void __user *)arg);
1925         case SG_GET_VERSION_NUM:
1926                 return nvme_sg_get_version_num((void __user *)arg);
1927         case SG_IO:
1928                 return nvme_sg_io(ns, (void __user *)arg);
1929         default:
1930                 return -ENOTTY;
1931         }
1932 }
1933
1934 #ifdef CONFIG_COMPAT
1935 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1936                                         unsigned int cmd, unsigned long arg)
1937 {
1938         switch (cmd) {
1939         case SG_IO:
1940                 return -ENOIOCTLCMD;
1941         }
1942         return nvme_ioctl(bdev, mode, cmd, arg);
1943 }
1944 #else
1945 #define nvme_compat_ioctl       NULL
1946 #endif
1947
1948 static int nvme_open(struct block_device *bdev, fmode_t mode)
1949 {
1950         int ret = 0;
1951         struct nvme_ns *ns;
1952
1953         spin_lock(&dev_list_lock);
1954         ns = bdev->bd_disk->private_data;
1955         if (!ns)
1956                 ret = -ENXIO;
1957         else if (!kref_get_unless_zero(&ns->dev->kref))
1958                 ret = -ENXIO;
1959         spin_unlock(&dev_list_lock);
1960
1961         return ret;
1962 }
1963
1964 static void nvme_free_dev(struct kref *kref);
1965
1966 static void nvme_release(struct gendisk *disk, fmode_t mode)
1967 {
1968         struct nvme_ns *ns = disk->private_data;
1969         struct nvme_dev *dev = ns->dev;
1970
1971         kref_put(&dev->kref, nvme_free_dev);
1972 }
1973
1974 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1975 {
1976         /* some standard values */
1977         geo->heads = 1 << 6;
1978         geo->sectors = 1 << 5;
1979         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1980         return 0;
1981 }
1982
1983 static void nvme_config_discard(struct nvme_ns *ns)
1984 {
1985         u32 logical_block_size = queue_logical_block_size(ns->queue);
1986         ns->queue->limits.discard_zeroes_data = 0;
1987         ns->queue->limits.discard_alignment = logical_block_size;
1988         ns->queue->limits.discard_granularity = logical_block_size;
1989         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1990         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1991 }
1992
1993 static int nvme_revalidate_disk(struct gendisk *disk)
1994 {
1995         struct nvme_ns *ns = disk->private_data;
1996         struct nvme_dev *dev = ns->dev;
1997         struct nvme_id_ns *id;
1998         u8 lbaf, pi_type;
1999         u16 old_ms;
2000         unsigned short bs;
2001
2002         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2003                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2004                                                 dev->instance, ns->ns_id);
2005                 return -ENODEV;
2006         }
2007         if (id->ncap == 0) {
2008                 kfree(id);
2009                 return -ENODEV;
2010         }
2011
2012         old_ms = ns->ms;
2013         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2014         ns->lba_shift = id->lbaf[lbaf].ds;
2015         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2016         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2017
2018         /*
2019          * If identify namespace failed, use default 512 byte block size so
2020          * block layer can use before failing read/write for 0 capacity.
2021          */
2022         if (ns->lba_shift == 0)
2023                 ns->lba_shift = 9;
2024         bs = 1 << ns->lba_shift;
2025
2026         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2027         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2028                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2029
2030         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2031                                 ns->ms != old_ms ||
2032                                 bs != queue_logical_block_size(disk->queue) ||
2033                                 (ns->ms && ns->ext)))
2034                 blk_integrity_unregister(disk);
2035
2036         ns->pi_type = pi_type;
2037         blk_queue_logical_block_size(ns->queue, bs);
2038
2039         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2040                                                                 !ns->ext)
2041                 nvme_init_integrity(ns);
2042
2043         if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2044                 set_capacity(disk, 0);
2045         else
2046                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2047
2048         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2049                 nvme_config_discard(ns);
2050
2051         kfree(id);
2052         return 0;
2053 }
2054
2055 static const struct block_device_operations nvme_fops = {
2056         .owner          = THIS_MODULE,
2057         .ioctl          = nvme_ioctl,
2058         .compat_ioctl   = nvme_compat_ioctl,
2059         .open           = nvme_open,
2060         .release        = nvme_release,
2061         .getgeo         = nvme_getgeo,
2062         .revalidate_disk= nvme_revalidate_disk,
2063 };
2064
2065 static int nvme_kthread(void *data)
2066 {
2067         struct nvme_dev *dev, *next;
2068
2069         while (!kthread_should_stop()) {
2070                 set_current_state(TASK_INTERRUPTIBLE);
2071                 spin_lock(&dev_list_lock);
2072                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2073                         int i;
2074                         u32 csts = readl(&dev->bar->csts);
2075
2076                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2077                                                         csts & NVME_CSTS_CFS) {
2078                                 if (work_busy(&dev->reset_work))
2079                                         continue;
2080                                 list_del_init(&dev->node);
2081                                 dev_warn(dev->dev,
2082                                         "Failed status: %x, reset controller\n",
2083                                         readl(&dev->bar->csts));
2084                                 dev->reset_workfn = nvme_reset_failed_dev;
2085                                 queue_work(nvme_workq, &dev->reset_work);
2086                                 continue;
2087                         }
2088                         for (i = 0; i < dev->queue_count; i++) {
2089                                 struct nvme_queue *nvmeq = dev->queues[i];
2090                                 if (!nvmeq)
2091                                         continue;
2092                                 spin_lock_irq(&nvmeq->q_lock);
2093                                 nvme_process_cq(nvmeq);
2094
2095                                 while ((i == 0) && (dev->event_limit > 0)) {
2096                                         if (nvme_submit_async_admin_req(dev))
2097                                                 break;
2098                                         dev->event_limit--;
2099                                 }
2100                                 spin_unlock_irq(&nvmeq->q_lock);
2101                         }
2102                 }
2103                 spin_unlock(&dev_list_lock);
2104                 schedule_timeout(round_jiffies_relative(HZ));
2105         }
2106         return 0;
2107 }
2108
2109 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2110 {
2111         struct nvme_ns *ns;
2112         struct gendisk *disk;
2113         int node = dev_to_node(dev->dev);
2114
2115         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2116         if (!ns)
2117                 return;
2118
2119         ns->queue = blk_mq_init_queue(&dev->tagset);
2120         if (IS_ERR(ns->queue))
2121                 goto out_free_ns;
2122         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2123         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2124         ns->dev = dev;
2125         ns->queue->queuedata = ns;
2126
2127         disk = alloc_disk_node(0, node);
2128         if (!disk)
2129                 goto out_free_queue;
2130
2131         ns->ns_id = nsid;
2132         ns->disk = disk;
2133         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2134         list_add_tail(&ns->list, &dev->namespaces);
2135
2136         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2137         if (dev->max_hw_sectors) {
2138                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2139                 blk_queue_max_segments(ns->queue,
2140                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2141         }
2142         if (dev->stripe_size)
2143                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2144         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2145                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2146         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2147
2148         disk->major = nvme_major;
2149         disk->first_minor = 0;
2150         disk->fops = &nvme_fops;
2151         disk->private_data = ns;
2152         disk->queue = ns->queue;
2153         disk->driverfs_dev = dev->device;
2154         disk->flags = GENHD_FL_EXT_DEVT;
2155         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2156
2157         /*
2158          * Initialize capacity to 0 until we establish the namespace format and
2159          * setup integrity extentions if necessary. The revalidate_disk after
2160          * add_disk allows the driver to register with integrity if the format
2161          * requires it.
2162          */
2163         set_capacity(disk, 0);
2164         if (nvme_revalidate_disk(ns->disk))
2165                 goto out_free_disk;
2166
2167         add_disk(ns->disk);
2168         if (ns->ms) {
2169                 struct block_device *bd = bdget_disk(ns->disk, 0);
2170                 if (!bd)
2171                         return;
2172                 if (blkdev_get(bd, FMODE_READ, NULL)) {
2173                         bdput(bd);
2174                         return;
2175                 }
2176                 blkdev_reread_part(bd);
2177                 blkdev_put(bd, FMODE_READ);
2178         }
2179         return;
2180  out_free_disk:
2181         kfree(disk);
2182         list_del(&ns->list);
2183  out_free_queue:
2184         blk_cleanup_queue(ns->queue);
2185  out_free_ns:
2186         kfree(ns);
2187 }
2188
2189 static void nvme_create_io_queues(struct nvme_dev *dev)
2190 {
2191         unsigned i;
2192
2193         for (i = dev->queue_count; i <= dev->max_qid; i++)
2194                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2195                         break;
2196
2197         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2198                 if (nvme_create_queue(dev->queues[i], i))
2199                         break;
2200 }
2201
2202 static int set_queue_count(struct nvme_dev *dev, int count)
2203 {
2204         int status;
2205         u32 result;
2206         u32 q_count = (count - 1) | ((count - 1) << 16);
2207
2208         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2209                                                                 &result);
2210         if (status < 0)
2211                 return status;
2212         if (status > 0) {
2213                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2214                 return 0;
2215         }
2216         return min(result & 0xffff, result >> 16) + 1;
2217 }
2218
2219 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2220 {
2221         u64 szu, size, offset;
2222         u32 cmbloc;
2223         resource_size_t bar_size;
2224         struct pci_dev *pdev = to_pci_dev(dev->dev);
2225         void __iomem *cmb;
2226         dma_addr_t dma_addr;
2227
2228         if (!use_cmb_sqes)
2229                 return NULL;
2230
2231         dev->cmbsz = readl(&dev->bar->cmbsz);
2232         if (!(NVME_CMB_SZ(dev->cmbsz)))
2233                 return NULL;
2234
2235         cmbloc = readl(&dev->bar->cmbloc);
2236
2237         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2238         size = szu * NVME_CMB_SZ(dev->cmbsz);
2239         offset = szu * NVME_CMB_OFST(cmbloc);
2240         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2241
2242         if (offset > bar_size)
2243                 return NULL;
2244
2245         /*
2246          * Controllers may support a CMB size larger than their BAR,
2247          * for example, due to being behind a bridge. Reduce the CMB to
2248          * the reported size of the BAR
2249          */
2250         if (size > bar_size - offset)
2251                 size = bar_size - offset;
2252
2253         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2254         cmb = ioremap_wc(dma_addr, size);
2255         if (!cmb)
2256                 return NULL;
2257
2258         dev->cmb_dma_addr = dma_addr;
2259         dev->cmb_size = size;
2260         return cmb;
2261 }
2262
2263 static inline void nvme_release_cmb(struct nvme_dev *dev)
2264 {
2265         if (dev->cmb) {
2266                 iounmap(dev->cmb);
2267                 dev->cmb = NULL;
2268         }
2269 }
2270
2271 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2272 {
2273         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2274 }
2275
2276 static int nvme_setup_io_queues(struct nvme_dev *dev)
2277 {
2278         struct nvme_queue *adminq = dev->queues[0];
2279         struct pci_dev *pdev = to_pci_dev(dev->dev);
2280         int result, i, vecs, nr_io_queues, size;
2281
2282         nr_io_queues = num_possible_cpus();
2283         result = set_queue_count(dev, nr_io_queues);
2284         if (result <= 0)
2285                 return result;
2286         if (result < nr_io_queues)
2287                 nr_io_queues = result;
2288
2289         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2290                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2291                                 sizeof(struct nvme_command));
2292                 if (result > 0)
2293                         dev->q_depth = result;
2294                 else
2295                         nvme_release_cmb(dev);
2296         }
2297
2298         size = db_bar_size(dev, nr_io_queues);
2299         if (size > 8192) {
2300                 iounmap(dev->bar);
2301                 do {
2302                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2303                         if (dev->bar)
2304                                 break;
2305                         if (!--nr_io_queues)
2306                                 return -ENOMEM;
2307                         size = db_bar_size(dev, nr_io_queues);
2308                 } while (1);
2309                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2310                 adminq->q_db = dev->dbs;
2311         }
2312
2313         /* Deregister the admin queue's interrupt */
2314         free_irq(dev->entry[0].vector, adminq);
2315
2316         /*
2317          * If we enable msix early due to not intx, disable it again before
2318          * setting up the full range we need.
2319          */
2320         if (!pdev->irq)
2321                 pci_disable_msix(pdev);
2322
2323         for (i = 0; i < nr_io_queues; i++)
2324                 dev->entry[i].entry = i;
2325         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2326         if (vecs < 0) {
2327                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2328                 if (vecs < 0) {
2329                         vecs = 1;
2330                 } else {
2331                         for (i = 0; i < vecs; i++)
2332                                 dev->entry[i].vector = i + pdev->irq;
2333                 }
2334         }
2335
2336         /*
2337          * Should investigate if there's a performance win from allocating
2338          * more queues than interrupt vectors; it might allow the submission
2339          * path to scale better, even if the receive path is limited by the
2340          * number of interrupts.
2341          */
2342         nr_io_queues = vecs;
2343         dev->max_qid = nr_io_queues;
2344
2345         result = queue_request_irq(dev, adminq, adminq->irqname);
2346         if (result) {
2347                 adminq->cq_vector = -1;
2348                 goto free_queues;
2349         }
2350
2351         /* Free previously allocated queues that are no longer usable */
2352         nvme_free_queues(dev, nr_io_queues + 1);
2353         nvme_create_io_queues(dev);
2354
2355         return 0;
2356
2357  free_queues:
2358         nvme_free_queues(dev, 1);
2359         return result;
2360 }
2361
2362 static void nvme_free_namespace(struct nvme_ns *ns)
2363 {
2364         list_del(&ns->list);
2365
2366         spin_lock(&dev_list_lock);
2367         ns->disk->private_data = NULL;
2368         spin_unlock(&dev_list_lock);
2369
2370         put_disk(ns->disk);
2371         kfree(ns);
2372 }
2373
2374 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2375 {
2376         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2377         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2378
2379         return nsa->ns_id - nsb->ns_id;
2380 }
2381
2382 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2383 {
2384         struct nvme_ns *ns;
2385
2386         list_for_each_entry(ns, &dev->namespaces, list) {
2387                 if (ns->ns_id == nsid)
2388                         return ns;
2389                 if (ns->ns_id > nsid)
2390                         break;
2391         }
2392         return NULL;
2393 }
2394
2395 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2396 {
2397         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2398                                                         dev->online_queues < 2);
2399 }
2400
2401 static void nvme_ns_remove(struct nvme_ns *ns)
2402 {
2403         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2404
2405         if (kill)
2406                 blk_set_queue_dying(ns->queue);
2407         if (ns->disk->flags & GENHD_FL_UP) {
2408                 if (blk_get_integrity(ns->disk))
2409                         blk_integrity_unregister(ns->disk);
2410                 del_gendisk(ns->disk);
2411         }
2412         if (kill || !blk_queue_dying(ns->queue)) {
2413                 blk_mq_abort_requeue_list(ns->queue);
2414                 blk_cleanup_queue(ns->queue);
2415         }
2416 }
2417
2418 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2419 {
2420         struct nvme_ns *ns, *next;
2421         unsigned i;
2422
2423         for (i = 1; i <= nn; i++) {
2424                 ns = nvme_find_ns(dev, i);
2425                 if (ns) {
2426                         if (revalidate_disk(ns->disk)) {
2427                                 nvme_ns_remove(ns);
2428                                 nvme_free_namespace(ns);
2429                         }
2430                 } else
2431                         nvme_alloc_ns(dev, i);
2432         }
2433         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2434                 if (ns->ns_id > nn) {
2435                         nvme_ns_remove(ns);
2436                         nvme_free_namespace(ns);
2437                 }
2438         }
2439         list_sort(NULL, &dev->namespaces, ns_cmp);
2440 }
2441
2442 static void nvme_dev_scan(struct work_struct *work)
2443 {
2444         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2445         struct nvme_id_ctrl *ctrl;
2446
2447         if (!dev->tagset.tags)
2448                 return;
2449         if (nvme_identify_ctrl(dev, &ctrl))
2450                 return;
2451         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2452         kfree(ctrl);
2453 }
2454
2455 /*
2456  * Return: error value if an error occurred setting up the queues or calling
2457  * Identify Device.  0 if these succeeded, even if adding some of the
2458  * namespaces failed.  At the moment, these failures are silent.  TBD which
2459  * failures should be reported.
2460  */
2461 static int nvme_dev_add(struct nvme_dev *dev)
2462 {
2463         struct pci_dev *pdev = to_pci_dev(dev->dev);
2464         int res;
2465         struct nvme_id_ctrl *ctrl;
2466         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2467
2468         res = nvme_identify_ctrl(dev, &ctrl);
2469         if (res) {
2470                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2471                 return -EIO;
2472         }
2473
2474         dev->oncs = le16_to_cpup(&ctrl->oncs);
2475         dev->abort_limit = ctrl->acl + 1;
2476         dev->vwc = ctrl->vwc;
2477         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2478         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2479         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2480         if (ctrl->mdts)
2481                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2482         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2483                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2484                 unsigned int max_hw_sectors;
2485
2486                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2487                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2488                 if (dev->max_hw_sectors) {
2489                         dev->max_hw_sectors = min(max_hw_sectors,
2490                                                         dev->max_hw_sectors);
2491                 } else
2492                         dev->max_hw_sectors = max_hw_sectors;
2493         }
2494         kfree(ctrl);
2495
2496         if (!dev->tagset.tags) {
2497                 dev->tagset.ops = &nvme_mq_ops;
2498                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2499                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2500                 dev->tagset.numa_node = dev_to_node(dev->dev);
2501                 dev->tagset.queue_depth =
2502                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2503                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2504                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2505                 dev->tagset.driver_data = dev;
2506
2507                 if (blk_mq_alloc_tag_set(&dev->tagset))
2508                         return 0;
2509         }
2510         schedule_work(&dev->scan_work);
2511         return 0;
2512 }
2513
2514 static int nvme_dev_map(struct nvme_dev *dev)
2515 {
2516         u64 cap;
2517         int bars, result = -ENOMEM;
2518         struct pci_dev *pdev = to_pci_dev(dev->dev);
2519
2520         if (pci_enable_device_mem(pdev))
2521                 return result;
2522
2523         dev->entry[0].vector = pdev->irq;
2524         pci_set_master(pdev);
2525         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2526         if (!bars)
2527                 goto disable_pci;
2528
2529         if (pci_request_selected_regions(pdev, bars, "nvme"))
2530                 goto disable_pci;
2531
2532         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2533             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2534                 goto disable;
2535
2536         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2537         if (!dev->bar)
2538                 goto disable;
2539
2540         if (readl(&dev->bar->csts) == -1) {
2541                 result = -ENODEV;
2542                 goto unmap;
2543         }
2544
2545         /*
2546          * Some devices don't advertse INTx interrupts, pre-enable a single
2547          * MSIX vec for setup. We'll adjust this later.
2548          */
2549         if (!pdev->irq) {
2550                 result = pci_enable_msix(pdev, dev->entry, 1);
2551                 if (result < 0)
2552                         goto unmap;
2553         }
2554
2555         cap = readq(&dev->bar->cap);
2556         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2557         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2558         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2559         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2560                 dev->cmb = nvme_map_cmb(dev);
2561
2562         return 0;
2563
2564  unmap:
2565         iounmap(dev->bar);
2566         dev->bar = NULL;
2567  disable:
2568         pci_release_regions(pdev);
2569  disable_pci:
2570         pci_disable_device(pdev);
2571         return result;
2572 }
2573
2574 static void nvme_dev_unmap(struct nvme_dev *dev)
2575 {
2576         struct pci_dev *pdev = to_pci_dev(dev->dev);
2577
2578         if (pdev->msi_enabled)
2579                 pci_disable_msi(pdev);
2580         else if (pdev->msix_enabled)
2581                 pci_disable_msix(pdev);
2582
2583         if (dev->bar) {
2584                 iounmap(dev->bar);
2585                 dev->bar = NULL;
2586                 pci_release_regions(pdev);
2587         }
2588
2589         if (pci_is_enabled(pdev))
2590                 pci_disable_device(pdev);
2591 }
2592
2593 struct nvme_delq_ctx {
2594         struct task_struct *waiter;
2595         struct kthread_worker *worker;
2596         atomic_t refcount;
2597 };
2598
2599 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2600 {
2601         dq->waiter = current;
2602         mb();
2603
2604         for (;;) {
2605                 set_current_state(TASK_KILLABLE);
2606                 if (!atomic_read(&dq->refcount))
2607                         break;
2608                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2609                                         fatal_signal_pending(current)) {
2610                         /*
2611                          * Disable the controller first since we can't trust it
2612                          * at this point, but leave the admin queue enabled
2613                          * until all queue deletion requests are flushed.
2614                          * FIXME: This may take a while if there are more h/w
2615                          * queues than admin tags.
2616                          */
2617                         set_current_state(TASK_RUNNING);
2618                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2619                         nvme_clear_queue(dev->queues[0]);
2620                         flush_kthread_worker(dq->worker);
2621                         nvme_disable_queue(dev, 0);
2622                         return;
2623                 }
2624         }
2625         set_current_state(TASK_RUNNING);
2626 }
2627
2628 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2629 {
2630         atomic_dec(&dq->refcount);
2631         if (dq->waiter)
2632                 wake_up_process(dq->waiter);
2633 }
2634
2635 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2636 {
2637         atomic_inc(&dq->refcount);
2638         return dq;
2639 }
2640
2641 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2642 {
2643         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2644         nvme_put_dq(dq);
2645 }
2646
2647 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2648                                                 kthread_work_func_t fn)
2649 {
2650         struct nvme_command c;
2651
2652         memset(&c, 0, sizeof(c));
2653         c.delete_queue.opcode = opcode;
2654         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2655
2656         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2657         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2658                                                                 ADMIN_TIMEOUT);
2659 }
2660
2661 static void nvme_del_cq_work_handler(struct kthread_work *work)
2662 {
2663         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2664                                                         cmdinfo.work);
2665         nvme_del_queue_end(nvmeq);
2666 }
2667
2668 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2669 {
2670         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2671                                                 nvme_del_cq_work_handler);
2672 }
2673
2674 static void nvme_del_sq_work_handler(struct kthread_work *work)
2675 {
2676         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2677                                                         cmdinfo.work);
2678         int status = nvmeq->cmdinfo.status;
2679
2680         if (!status)
2681                 status = nvme_delete_cq(nvmeq);
2682         if (status)
2683                 nvme_del_queue_end(nvmeq);
2684 }
2685
2686 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2687 {
2688         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2689                                                 nvme_del_sq_work_handler);
2690 }
2691
2692 static void nvme_del_queue_start(struct kthread_work *work)
2693 {
2694         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2695                                                         cmdinfo.work);
2696         if (nvme_delete_sq(nvmeq))
2697                 nvme_del_queue_end(nvmeq);
2698 }
2699
2700 static void nvme_disable_io_queues(struct nvme_dev *dev)
2701 {
2702         int i;
2703         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2704         struct nvme_delq_ctx dq;
2705         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2706                                         &worker, "nvme%d", dev->instance);
2707
2708         if (IS_ERR(kworker_task)) {
2709                 dev_err(dev->dev,
2710                         "Failed to create queue del task\n");
2711                 for (i = dev->queue_count - 1; i > 0; i--)
2712                         nvme_disable_queue(dev, i);
2713                 return;
2714         }
2715
2716         dq.waiter = NULL;
2717         atomic_set(&dq.refcount, 0);
2718         dq.worker = &worker;
2719         for (i = dev->queue_count - 1; i > 0; i--) {
2720                 struct nvme_queue *nvmeq = dev->queues[i];
2721
2722                 if (nvme_suspend_queue(nvmeq))
2723                         continue;
2724                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2725                 nvmeq->cmdinfo.worker = dq.worker;
2726                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2727                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2728         }
2729         nvme_wait_dq(&dq, dev);
2730         kthread_stop(kworker_task);
2731 }
2732
2733 /*
2734 * Remove the node from the device list and check
2735 * for whether or not we need to stop the nvme_thread.
2736 */
2737 static void nvme_dev_list_remove(struct nvme_dev *dev)
2738 {
2739         struct task_struct *tmp = NULL;
2740
2741         spin_lock(&dev_list_lock);
2742         list_del_init(&dev->node);
2743         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2744                 tmp = nvme_thread;
2745                 nvme_thread = NULL;
2746         }
2747         spin_unlock(&dev_list_lock);
2748
2749         if (tmp)
2750                 kthread_stop(tmp);
2751 }
2752
2753 static void nvme_freeze_queues(struct nvme_dev *dev)
2754 {
2755         struct nvme_ns *ns;
2756
2757         list_for_each_entry(ns, &dev->namespaces, list) {
2758                 blk_mq_freeze_queue_start(ns->queue);
2759
2760                 spin_lock_irq(ns->queue->queue_lock);
2761                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2762                 spin_unlock_irq(ns->queue->queue_lock);
2763
2764                 blk_mq_cancel_requeue_work(ns->queue);
2765                 blk_mq_stop_hw_queues(ns->queue);
2766         }
2767 }
2768
2769 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2770 {
2771         struct nvme_ns *ns;
2772
2773         list_for_each_entry(ns, &dev->namespaces, list) {
2774                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2775                 blk_mq_unfreeze_queue(ns->queue);
2776                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2777                 blk_mq_kick_requeue_list(ns->queue);
2778         }
2779 }
2780
2781 static void nvme_dev_shutdown(struct nvme_dev *dev)
2782 {
2783         int i;
2784         u32 csts = -1;
2785
2786         nvme_dev_list_remove(dev);
2787
2788         if (dev->bar) {
2789                 nvme_freeze_queues(dev);
2790                 csts = readl(&dev->bar->csts);
2791         }
2792         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2793                 for (i = dev->queue_count - 1; i >= 0; i--) {
2794                         struct nvme_queue *nvmeq = dev->queues[i];
2795                         nvme_suspend_queue(nvmeq);
2796                 }
2797         } else {
2798                 nvme_disable_io_queues(dev);
2799                 nvme_shutdown_ctrl(dev);
2800                 nvme_disable_queue(dev, 0);
2801         }
2802         nvme_dev_unmap(dev);
2803
2804         for (i = dev->queue_count - 1; i >= 0; i--)
2805                 nvme_clear_queue(dev->queues[i]);
2806 }
2807
2808 static void nvme_dev_remove(struct nvme_dev *dev)
2809 {
2810         struct nvme_ns *ns;
2811
2812         list_for_each_entry(ns, &dev->namespaces, list)
2813                 nvme_ns_remove(ns);
2814 }
2815
2816 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2817 {
2818         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2819                                                 PAGE_SIZE, PAGE_SIZE, 0);
2820         if (!dev->prp_page_pool)
2821                 return -ENOMEM;
2822
2823         /* Optimisation for I/Os between 4k and 128k */
2824         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2825                                                 256, 256, 0);
2826         if (!dev->prp_small_pool) {
2827                 dma_pool_destroy(dev->prp_page_pool);
2828                 return -ENOMEM;
2829         }
2830         return 0;
2831 }
2832
2833 static void nvme_release_prp_pools(struct nvme_dev *dev)
2834 {
2835         dma_pool_destroy(dev->prp_page_pool);
2836         dma_pool_destroy(dev->prp_small_pool);
2837 }
2838
2839 static DEFINE_IDA(nvme_instance_ida);
2840
2841 static int nvme_set_instance(struct nvme_dev *dev)
2842 {
2843         int instance, error;
2844
2845         do {
2846                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2847                         return -ENODEV;
2848
2849                 spin_lock(&dev_list_lock);
2850                 error = ida_get_new(&nvme_instance_ida, &instance);
2851                 spin_unlock(&dev_list_lock);
2852         } while (error == -EAGAIN);
2853
2854         if (error)
2855                 return -ENODEV;
2856
2857         dev->instance = instance;
2858         return 0;
2859 }
2860
2861 static void nvme_release_instance(struct nvme_dev *dev)
2862 {
2863         spin_lock(&dev_list_lock);
2864         ida_remove(&nvme_instance_ida, dev->instance);
2865         spin_unlock(&dev_list_lock);
2866 }
2867
2868 static void nvme_free_namespaces(struct nvme_dev *dev)
2869 {
2870         struct nvme_ns *ns, *next;
2871
2872         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2873                 nvme_free_namespace(ns);
2874 }
2875
2876 static void nvme_free_dev(struct kref *kref)
2877 {
2878         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2879
2880         put_device(dev->dev);
2881         put_device(dev->device);
2882         nvme_free_namespaces(dev);
2883         nvme_release_instance(dev);
2884         if (dev->tagset.tags)
2885                 blk_mq_free_tag_set(&dev->tagset);
2886         if (dev->admin_q)
2887                 blk_put_queue(dev->admin_q);
2888         kfree(dev->queues);
2889         kfree(dev->entry);
2890         kfree(dev);
2891 }
2892
2893 static int nvme_dev_open(struct inode *inode, struct file *f)
2894 {
2895         struct nvme_dev *dev;
2896         int instance = iminor(inode);
2897         int ret = -ENODEV;
2898
2899         spin_lock(&dev_list_lock);
2900         list_for_each_entry(dev, &dev_list, node) {
2901                 if (dev->instance == instance) {
2902                         if (!dev->admin_q) {
2903                                 ret = -EWOULDBLOCK;
2904                                 break;
2905                         }
2906                         if (!kref_get_unless_zero(&dev->kref))
2907                                 break;
2908                         f->private_data = dev;
2909                         ret = 0;
2910                         break;
2911                 }
2912         }
2913         spin_unlock(&dev_list_lock);
2914
2915         return ret;
2916 }
2917
2918 static int nvme_dev_release(struct inode *inode, struct file *f)
2919 {
2920         struct nvme_dev *dev = f->private_data;
2921         kref_put(&dev->kref, nvme_free_dev);
2922         return 0;
2923 }
2924
2925 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2926 {
2927         struct nvme_dev *dev = f->private_data;
2928         struct nvme_ns *ns;
2929
2930         switch (cmd) {
2931         case NVME_IOCTL_ADMIN_CMD:
2932                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2933         case NVME_IOCTL_IO_CMD:
2934                 if (list_empty(&dev->namespaces))
2935                         return -ENOTTY;
2936                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2937                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2938         case NVME_IOCTL_RESET:
2939                 dev_warn(dev->dev, "resetting controller\n");
2940                 return nvme_reset(dev);
2941         case NVME_IOCTL_SUBSYS_RESET:
2942                 return nvme_subsys_reset(dev);
2943         default:
2944                 return -ENOTTY;
2945         }
2946 }
2947
2948 static const struct file_operations nvme_dev_fops = {
2949         .owner          = THIS_MODULE,
2950         .open           = nvme_dev_open,
2951         .release        = nvme_dev_release,
2952         .unlocked_ioctl = nvme_dev_ioctl,
2953         .compat_ioctl   = nvme_dev_ioctl,
2954 };
2955
2956 static void nvme_set_irq_hints(struct nvme_dev *dev)
2957 {
2958         struct nvme_queue *nvmeq;
2959         int i;
2960
2961         for (i = 0; i < dev->online_queues; i++) {
2962                 nvmeq = dev->queues[i];
2963
2964                 if (!nvmeq->tags || !(*nvmeq->tags))
2965                         continue;
2966
2967                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2968                                         blk_mq_tags_cpumask(*nvmeq->tags));
2969         }
2970 }
2971
2972 static int nvme_dev_start(struct nvme_dev *dev)
2973 {
2974         int result;
2975         bool start_thread = false;
2976
2977         result = nvme_dev_map(dev);
2978         if (result)
2979                 return result;
2980
2981         result = nvme_configure_admin_queue(dev);
2982         if (result)
2983                 goto unmap;
2984
2985         spin_lock(&dev_list_lock);
2986         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2987                 start_thread = true;
2988                 nvme_thread = NULL;
2989         }
2990         list_add(&dev->node, &dev_list);
2991         spin_unlock(&dev_list_lock);
2992
2993         if (start_thread) {
2994                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2995                 wake_up_all(&nvme_kthread_wait);
2996         } else
2997                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2998
2999         if (IS_ERR_OR_NULL(nvme_thread)) {
3000                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3001                 goto disable;
3002         }
3003
3004         nvme_init_queue(dev->queues[0], 0);
3005         result = nvme_alloc_admin_tags(dev);
3006         if (result)
3007                 goto disable;
3008
3009         result = nvme_setup_io_queues(dev);
3010         if (result)
3011                 goto free_tags;
3012
3013         nvme_set_irq_hints(dev);
3014
3015         dev->event_limit = 1;
3016         return result;
3017
3018  free_tags:
3019         nvme_dev_remove_admin(dev);
3020         blk_put_queue(dev->admin_q);
3021         dev->admin_q = NULL;
3022         dev->queues[0]->tags = NULL;
3023  disable:
3024         nvme_disable_queue(dev, 0);
3025         nvme_dev_list_remove(dev);
3026  unmap:
3027         nvme_dev_unmap(dev);
3028         return result;
3029 }
3030
3031 static int nvme_remove_dead_ctrl(void *arg)
3032 {
3033         struct nvme_dev *dev = (struct nvme_dev *)arg;
3034         struct pci_dev *pdev = to_pci_dev(dev->dev);
3035
3036         if (pci_get_drvdata(pdev))
3037                 pci_stop_and_remove_bus_device_locked(pdev);
3038         kref_put(&dev->kref, nvme_free_dev);
3039         return 0;
3040 }
3041
3042 static void nvme_remove_disks(struct work_struct *ws)
3043 {
3044         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3045
3046         nvme_free_queues(dev, 1);
3047         nvme_dev_remove(dev);
3048 }
3049
3050 static int nvme_dev_resume(struct nvme_dev *dev)
3051 {
3052         int ret;
3053
3054         ret = nvme_dev_start(dev);
3055         if (ret)
3056                 return ret;
3057         if (dev->online_queues < 2) {
3058                 spin_lock(&dev_list_lock);
3059                 dev->reset_workfn = nvme_remove_disks;
3060                 queue_work(nvme_workq, &dev->reset_work);
3061                 spin_unlock(&dev_list_lock);
3062         } else {
3063                 nvme_unfreeze_queues(dev);
3064                 nvme_dev_add(dev);
3065                 nvme_set_irq_hints(dev);
3066         }
3067         return 0;
3068 }
3069
3070 static void nvme_dead_ctrl(struct nvme_dev *dev)
3071 {
3072         dev_warn(dev->dev, "Device failed to resume\n");
3073         kref_get(&dev->kref);
3074         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3075                                                 dev->instance))) {
3076                 dev_err(dev->dev,
3077                         "Failed to start controller remove task\n");
3078                 kref_put(&dev->kref, nvme_free_dev);
3079         }
3080 }
3081
3082 static void nvme_dev_reset(struct nvme_dev *dev)
3083 {
3084         bool in_probe = work_busy(&dev->probe_work);
3085
3086         nvme_dev_shutdown(dev);
3087
3088         /* Synchronize with device probe so that work will see failure status
3089          * and exit gracefully without trying to schedule another reset */
3090         flush_work(&dev->probe_work);
3091
3092         /* Fail this device if reset occured during probe to avoid
3093          * infinite initialization loops. */
3094         if (in_probe) {
3095                 nvme_dead_ctrl(dev);
3096                 return;
3097         }
3098         /* Schedule device resume asynchronously so the reset work is available
3099          * to cleanup errors that may occur during reinitialization */
3100         schedule_work(&dev->probe_work);
3101 }
3102
3103 static void nvme_reset_failed_dev(struct work_struct *ws)
3104 {
3105         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3106         nvme_dev_reset(dev);
3107 }
3108
3109 static void nvme_reset_workfn(struct work_struct *work)
3110 {
3111         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
3112         dev->reset_workfn(work);
3113 }
3114
3115 static int nvme_reset(struct nvme_dev *dev)
3116 {
3117         int ret = -EBUSY;
3118
3119         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3120                 return -ENODEV;
3121
3122         spin_lock(&dev_list_lock);
3123         if (!work_pending(&dev->reset_work)) {
3124                 dev->reset_workfn = nvme_reset_failed_dev;
3125                 queue_work(nvme_workq, &dev->reset_work);
3126                 ret = 0;
3127         }
3128         spin_unlock(&dev_list_lock);
3129
3130         if (!ret) {
3131                 flush_work(&dev->reset_work);
3132                 flush_work(&dev->probe_work);
3133                 return 0;
3134         }
3135
3136         return ret;
3137 }
3138
3139 static ssize_t nvme_sysfs_reset(struct device *dev,
3140                                 struct device_attribute *attr, const char *buf,
3141                                 size_t count)
3142 {
3143         struct nvme_dev *ndev = dev_get_drvdata(dev);
3144         int ret;
3145
3146         ret = nvme_reset(ndev);
3147         if (ret < 0)
3148                 return ret;
3149
3150         return count;
3151 }
3152 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3153
3154 static void nvme_async_probe(struct work_struct *work);
3155 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3156 {
3157         int node, result = -ENOMEM;
3158         struct nvme_dev *dev;
3159
3160         node = dev_to_node(&pdev->dev);
3161         if (node == NUMA_NO_NODE)
3162                 set_dev_node(&pdev->dev, 0);
3163
3164         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3165         if (!dev)
3166                 return -ENOMEM;
3167         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3168                                                         GFP_KERNEL, node);
3169         if (!dev->entry)
3170                 goto free;
3171         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3172                                                         GFP_KERNEL, node);
3173         if (!dev->queues)
3174                 goto free;
3175
3176         INIT_LIST_HEAD(&dev->namespaces);
3177         dev->reset_workfn = nvme_reset_failed_dev;
3178         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3179         dev->dev = get_device(&pdev->dev);
3180         pci_set_drvdata(pdev, dev);
3181         result = nvme_set_instance(dev);
3182         if (result)
3183                 goto put_pci;
3184
3185         result = nvme_setup_prp_pools(dev);
3186         if (result)
3187                 goto release;
3188
3189         kref_init(&dev->kref);
3190         dev->device = device_create(nvme_class, &pdev->dev,
3191                                 MKDEV(nvme_char_major, dev->instance),
3192                                 dev, "nvme%d", dev->instance);
3193         if (IS_ERR(dev->device)) {
3194                 result = PTR_ERR(dev->device);
3195                 goto release_pools;
3196         }
3197         get_device(dev->device);
3198         dev_set_drvdata(dev->device, dev);
3199
3200         result = device_create_file(dev->device, &dev_attr_reset_controller);
3201         if (result)
3202                 goto put_dev;
3203
3204         INIT_LIST_HEAD(&dev->node);
3205         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3206         INIT_WORK(&dev->probe_work, nvme_async_probe);
3207         schedule_work(&dev->probe_work);
3208         return 0;
3209
3210  put_dev:
3211         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3212         put_device(dev->device);
3213  release_pools:
3214         nvme_release_prp_pools(dev);
3215  release:
3216         nvme_release_instance(dev);
3217  put_pci:
3218         put_device(dev->dev);
3219  free:
3220         kfree(dev->queues);
3221         kfree(dev->entry);
3222         kfree(dev);
3223         return result;
3224 }
3225
3226 static void nvme_async_probe(struct work_struct *work)
3227 {
3228         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3229
3230         if (nvme_dev_resume(dev) && !work_busy(&dev->reset_work))
3231                 nvme_dead_ctrl(dev);
3232 }
3233
3234 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3235 {
3236         struct nvme_dev *dev = pci_get_drvdata(pdev);
3237
3238         if (prepare)
3239                 nvme_dev_shutdown(dev);
3240         else
3241                 nvme_dev_resume(dev);
3242 }
3243
3244 static void nvme_shutdown(struct pci_dev *pdev)
3245 {
3246         struct nvme_dev *dev = pci_get_drvdata(pdev);
3247         nvme_dev_shutdown(dev);
3248 }
3249
3250 static void nvme_remove(struct pci_dev *pdev)
3251 {
3252         struct nvme_dev *dev = pci_get_drvdata(pdev);
3253
3254         spin_lock(&dev_list_lock);
3255         list_del_init(&dev->node);
3256         spin_unlock(&dev_list_lock);
3257
3258         pci_set_drvdata(pdev, NULL);
3259         flush_work(&dev->probe_work);
3260         flush_work(&dev->reset_work);
3261         flush_work(&dev->scan_work);
3262         device_remove_file(dev->device, &dev_attr_reset_controller);
3263         nvme_dev_remove(dev);
3264         nvme_dev_shutdown(dev);
3265         nvme_dev_remove_admin(dev);
3266         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3267         nvme_free_queues(dev, 0);
3268         nvme_release_cmb(dev);
3269         nvme_release_prp_pools(dev);
3270         kref_put(&dev->kref, nvme_free_dev);
3271 }
3272
3273 /* These functions are yet to be implemented */
3274 #define nvme_error_detected NULL
3275 #define nvme_dump_registers NULL
3276 #define nvme_link_reset NULL
3277 #define nvme_slot_reset NULL
3278 #define nvme_error_resume NULL
3279
3280 #ifdef CONFIG_PM_SLEEP
3281 static int nvme_suspend(struct device *dev)
3282 {
3283         struct pci_dev *pdev = to_pci_dev(dev);
3284         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3285
3286         nvme_dev_shutdown(ndev);
3287         return 0;
3288 }
3289
3290 static int nvme_resume(struct device *dev)
3291 {
3292         struct pci_dev *pdev = to_pci_dev(dev);
3293         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3294
3295         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3296                 ndev->reset_workfn = nvme_reset_failed_dev;
3297                 queue_work(nvme_workq, &ndev->reset_work);
3298         }
3299         return 0;
3300 }
3301 #endif
3302
3303 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3304
3305 static const struct pci_error_handlers nvme_err_handler = {
3306         .error_detected = nvme_error_detected,
3307         .mmio_enabled   = nvme_dump_registers,
3308         .link_reset     = nvme_link_reset,
3309         .slot_reset     = nvme_slot_reset,
3310         .resume         = nvme_error_resume,
3311         .reset_notify   = nvme_reset_notify,
3312 };
3313
3314 /* Move to pci_ids.h later */
3315 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3316
3317 static const struct pci_device_id nvme_id_table[] = {
3318         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3319         { 0, }
3320 };
3321 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3322
3323 static struct pci_driver nvme_driver = {
3324         .name           = "nvme",
3325         .id_table       = nvme_id_table,
3326         .probe          = nvme_probe,
3327         .remove         = nvme_remove,
3328         .shutdown       = nvme_shutdown,
3329         .driver         = {
3330                 .pm     = &nvme_dev_pm_ops,
3331         },
3332         .err_handler    = &nvme_err_handler,
3333 };
3334
3335 static int __init nvme_init(void)
3336 {
3337         int result;
3338
3339         init_waitqueue_head(&nvme_kthread_wait);
3340
3341         nvme_workq = create_singlethread_workqueue("nvme");
3342         if (!nvme_workq)
3343                 return -ENOMEM;
3344
3345         result = register_blkdev(nvme_major, "nvme");
3346         if (result < 0)
3347                 goto kill_workq;
3348         else if (result > 0)
3349                 nvme_major = result;
3350
3351         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3352                                                         &nvme_dev_fops);
3353         if (result < 0)
3354                 goto unregister_blkdev;
3355         else if (result > 0)
3356                 nvme_char_major = result;
3357
3358         nvme_class = class_create(THIS_MODULE, "nvme");
3359         if (IS_ERR(nvme_class)) {
3360                 result = PTR_ERR(nvme_class);
3361                 goto unregister_chrdev;
3362         }
3363
3364         result = pci_register_driver(&nvme_driver);
3365         if (result)
3366                 goto destroy_class;
3367         return 0;
3368
3369  destroy_class:
3370         class_destroy(nvme_class);
3371  unregister_chrdev:
3372         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3373  unregister_blkdev:
3374         unregister_blkdev(nvme_major, "nvme");
3375  kill_workq:
3376         destroy_workqueue(nvme_workq);
3377         return result;
3378 }
3379
3380 static void __exit nvme_exit(void)
3381 {
3382         pci_unregister_driver(&nvme_driver);
3383         unregister_blkdev(nvme_major, "nvme");
3384         destroy_workqueue(nvme_workq);
3385         class_destroy(nvme_class);
3386         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3387         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3388         _nvme_check_size();
3389 }
3390
3391 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3392 MODULE_LICENSE("GPL");
3393 MODULE_VERSION("1.0");
3394 module_init(nvme_init);
3395 module_exit(nvme_exit);