drivers/firmware/qcom_scm.h

   1 /* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12 #ifndef __QCOM_SCM_INT_H
  13 #define __QCOM_SCM_INT_H
  14
  15 #define QCOM_SCM_SVC_BOOT               0x1
  16 #define QCOM_SCM_BOOT_ADDR              0x1
  17 #define QCOM_SCM_BOOT_ADDR_MC           0x11
  18
  19 #define QCOM_SCM_FLAG_HLOS              0x01
  20 #define QCOM_SCM_FLAG_COLDBOOT_MC       0x02
  21 #define QCOM_SCM_FLAG_WARMBOOT_MC       0x04
  22 extern int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
  23 extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
  24
  25 #define QCOM_SCM_CMD_TERMINATE_PC       0x2
  26 #define QCOM_SCM_FLUSH_FLAG_MASK        0x3
  27 #define QCOM_SCM_CMD_CORE_HOTPLUGGED    0x10
  28 extern void __qcom_scm_cpu_power_down(u32 flags);
  29
  30 #define QCOM_SCM_SVC_INFO               0x6
  31 #define QCOM_IS_CALL_AVAIL_CMD          0x1
  32 extern int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id);
  33
  34 #define QCOM_SCM_SVC_HDCP               0x11
  35 #define QCOM_SCM_CMD_HDCP               0x01
  36 extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
  37                 u32 *resp);
  38
  39 #define QCOM_SCM_SVC_PIL                0x2
  40 #define QCOM_SCM_PAS_INIT_IMAGE_CMD     0x1
  41 #define QCOM_SCM_PAS_MEM_SETUP_CMD      0x2
  42 #define QCOM_SCM_PAS_AUTH_AND_RESET_CMD 0x5
  43 #define QCOM_SCM_PAS_SHUTDOWN_CMD       0x6
  44 #define QCOM_SCM_PAS_IS_SUPPORTED_CMD   0x7
  45 extern bool __qcom_scm_pas_supported(u32 peripheral);
  46 extern int  __qcom_scm_pas_init_image(u32 peripheral, dma_addr_t metadata_phys);
  47 extern int  __qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);
  48 extern int  __qcom_scm_pas_auth_and_reset(u32 peripheral);
  49 extern int  __qcom_scm_pas_shutdown(u32 peripheral);
  50
  51 /* common error codes */
  52 #define QCOM_SCM_ENOMEM         -5
  53 #define QCOM_SCM_EOPNOTSUPP     -4
  54 #define QCOM_SCM_EINVAL_ADDR    -3
  55 #define QCOM_SCM_EINVAL_ARG     -2
  56 #define QCOM_SCM_ERROR          -1
  57 #define QCOM_SCM_INTERRUPTED    1
  58
  59 #endif