drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <drm/drmP.h>
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/pm_runtime.h>
  21
  22 #include <video/samsung_fimd.h>
  23 #include <drm/exynos_drm.h>
  24
  25 #include "exynos_drm_drv.h"
  26 #include "exynos_drm_fbdev.h"
  27 #include "exynos_drm_crtc.h"
  28 #include "exynos_drm_iommu.h"
  29
  30 /*
  31  * FIMD is stand for Fully Interactive Mobile Display and
  32  * as a display controller, it transfers contents drawn on memory
  33  * to a LCD Panel through Display Interfaces such as RGB or
  34  * CPU Interface.
  35  */
  36
  37 /* position control register for hardware window 0, 2 ~ 4.*/
  38 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  39 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  40 /* size control register for hardware window 0. */
  41 #define VIDOSD_C_SIZE_W0        (VIDOSD_BASE + 0x08)
  42 /* alpha control register for hardware window 1 ~ 4. */
  43 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x18 + (win) * 16)
  44 /* size control register for hardware window 1 ~ 4. */
  45 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  46
  47 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  48 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  49 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  50
  51 /* color key control register for hardware window 1 ~ 4. */
  52 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + (x * 8))
  53 /* color key value register for hardware window 1 ~ 4. */
  54 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + (x * 8))
  55
  56 /* FIMD has totally five hardware windows. */
  57 #define WINDOWS_NR      5
  58
  59 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  60
  61 struct fimd_driver_data {
  62         unsigned int timing_base;
  63 };
  64
  65 static struct fimd_driver_data exynos4_fimd_driver_data = {
  66         .timing_base = 0x0,
  67 };
  68
  69 static struct fimd_driver_data exynos5_fimd_driver_data = {
  70         .timing_base = 0x20000,
  71 };
  72
  73 struct fimd_win_data {
  74         unsigned int            offset_x;
  75         unsigned int            offset_y;
  76         unsigned int            ovl_width;
  77         unsigned int            ovl_height;
  78         unsigned int            fb_width;
  79         unsigned int            fb_height;
  80         unsigned int            bpp;
  81         dma_addr_t              dma_addr;
  82         void __iomem            *vaddr;
  83         unsigned int            buf_offsize;
  84         unsigned int            line_size;      /* bytes */
  85         bool                    enabled;
  86         bool                    resume;
  87 };
  88
  89 struct fimd_context {
  90         struct exynos_drm_subdrv        subdrv;
  91         int                             irq;
  92         struct drm_crtc                 *crtc;
  93         struct clk                      *bus_clk;
  94         struct clk                      *lcd_clk;
  95         void __iomem                    *regs;
  96         struct fimd_win_data            win_data[WINDOWS_NR];
  97         unsigned int                    clkdiv;
  98         unsigned int                    default_win;
  99         unsigned long                   irq_flags;
 100         u32                             vidcon0;
 101         u32                             vidcon1;
 102         bool                            suspended;
 103         struct mutex                    lock;
 104         wait_queue_head_t               wait_vsync_queue;
 105         atomic_t                        wait_vsync_event;
 106
 107         struct exynos_drm_panel_info *panel;
 108 };
 109
 110 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 111         struct platform_device *pdev)
 112 {
 113         return (struct fimd_driver_data *)
 114                 platform_get_device_id(pdev)->driver_data;
 115 }
 116
 117 static bool fimd_display_is_connected(struct device *dev)
 118 {
 119         DRM_DEBUG_KMS("%s\n", __FILE__);
 120
 121         /* TODO. */
 122
 123         return true;
 124 }
 125
 126 static void *fimd_get_panel(struct device *dev)
 127 {
 128         struct fimd_context *ctx = get_fimd_context(dev);
 129
 130         DRM_DEBUG_KMS("%s\n", __FILE__);
 131
 132         return ctx->panel;
 133 }
 134
 135 static int fimd_check_timing(struct device *dev, void *timing)
 136 {
 137         DRM_DEBUG_KMS("%s\n", __FILE__);
 138
 139         /* TODO. */
 140
 141         return 0;
 142 }
 143
 144 static int fimd_display_power_on(struct device *dev, int mode)
 145 {
 146         DRM_DEBUG_KMS("%s\n", __FILE__);
 147
 148         /* TODO */
 149
 150         return 0;
 151 }
 152
 153 static struct exynos_drm_display_ops fimd_display_ops = {
 154         .type = EXYNOS_DISPLAY_TYPE_LCD,
 155         .is_connected = fimd_display_is_connected,
 156         .get_panel = fimd_get_panel,
 157         .check_timing = fimd_check_timing,
 158         .power_on = fimd_display_power_on,
 159 };
 160
 161 static void fimd_dpms(struct device *subdrv_dev, int mode)
 162 {
 163         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 164
 165         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
 166
 167         mutex_lock(&ctx->lock);
 168
 169         switch (mode) {
 170         case DRM_MODE_DPMS_ON:
 171                 /*
 172                  * enable fimd hardware only if suspended status.
 173                  *
 174                  * P.S. fimd_dpms function would be called at booting time so
 175                  * clk_enable could be called double time.
 176                  */
 177                 if (ctx->suspended)
 178                         pm_runtime_get_sync(subdrv_dev);
 179                 break;
 180         case DRM_MODE_DPMS_STANDBY:
 181         case DRM_MODE_DPMS_SUSPEND:
 182         case DRM_MODE_DPMS_OFF:
 183                 if (!ctx->suspended)
 184                         pm_runtime_put_sync(subdrv_dev);
 185                 break;
 186         default:
 187                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 188                 break;
 189         }
 190
 191         mutex_unlock(&ctx->lock);
 192 }
 193
 194 static void fimd_apply(struct device *subdrv_dev)
 195 {
 196         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 197         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 198         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 199         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
 200         struct fimd_win_data *win_data;
 201         int i;
 202
 203         DRM_DEBUG_KMS("%s\n", __FILE__);
 204
 205         for (i = 0; i < WINDOWS_NR; i++) {
 206                 win_data = &ctx->win_data[i];
 207                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
 208                         ovl_ops->commit(subdrv_dev, i);
 209         }
 210
 211         if (mgr_ops && mgr_ops->commit)
 212                 mgr_ops->commit(subdrv_dev);
 213 }
 214
 215 static void fimd_commit(struct device *dev)
 216 {
 217         struct fimd_context *ctx = get_fimd_context(dev);
 218         struct exynos_drm_panel_info *panel = ctx->panel;
 219         struct fb_videomode *timing = &panel->timing;
 220         struct fimd_driver_data *driver_data;
 221         struct platform_device *pdev = to_platform_device(dev);
 222         u32 val;
 223
 224         driver_data = drm_fimd_get_driver_data(pdev);
 225         if (ctx->suspended)
 226                 return;
 227
 228         DRM_DEBUG_KMS("%s\n", __FILE__);
 229
 230         /* setup polarity values from machine code. */
 231         writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
 232
 233         /* setup vertical timing values. */
 234         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
 235                VIDTCON0_VFPD(timing->lower_margin - 1) |
 236                VIDTCON0_VSPW(timing->vsync_len - 1);
 237         writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
 238
 239         /* setup horizontal timing values.  */
 240         val = VIDTCON1_HBPD(timing->left_margin - 1) |
 241                VIDTCON1_HFPD(timing->right_margin - 1) |
 242                VIDTCON1_HSPW(timing->hsync_len - 1);
 243         writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
 244
 245         /* setup horizontal and vertical display size. */
 246         val = VIDTCON2_LINEVAL(timing->yres - 1) |
 247                VIDTCON2_HOZVAL(timing->xres - 1);
 248         writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 249
 250         /* setup clock source, clock divider, enable dma. */
 251         val = ctx->vidcon0;
 252         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 253
 254         if (ctx->clkdiv > 1)
 255                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 256         else
 257                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 258
 259         /*
 260          * fields of register with prefix '_F' would be updated
 261          * at vsync(same as dma start)
 262          */
 263         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 264         writel(val, ctx->regs + VIDCON0);
 265 }
 266
 267 static int fimd_enable_vblank(struct device *dev)
 268 {
 269         struct fimd_context *ctx = get_fimd_context(dev);
 270         u32 val;
 271
 272         DRM_DEBUG_KMS("%s\n", __FILE__);
 273
 274         if (ctx->suspended)
 275                 return -EPERM;
 276
 277         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 278                 val = readl(ctx->regs + VIDINTCON0);
 279
 280                 val |= VIDINTCON0_INT_ENABLE;
 281                 val |= VIDINTCON0_INT_FRAME;
 282
 283                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 284                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 285                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 286                 val |= VIDINTCON0_FRAMESEL1_NONE;
 287
 288                 writel(val, ctx->regs + VIDINTCON0);
 289         }
 290
 291         return 0;
 292 }
 293
 294 static void fimd_disable_vblank(struct device *dev)
 295 {
 296         struct fimd_context *ctx = get_fimd_context(dev);
 297         u32 val;
 298
 299         DRM_DEBUG_KMS("%s\n", __FILE__);
 300
 301         if (ctx->suspended)
 302                 return;
 303
 304         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 305                 val = readl(ctx->regs + VIDINTCON0);
 306
 307                 val &= ~VIDINTCON0_INT_FRAME;
 308                 val &= ~VIDINTCON0_INT_ENABLE;
 309
 310                 writel(val, ctx->regs + VIDINTCON0);
 311         }
 312 }
 313
 314 static void fimd_wait_for_vblank(struct device *dev)
 315 {
 316         struct fimd_context *ctx = get_fimd_context(dev);
 317
 318         if (ctx->suspended)
 319                 return;
 320
 321         atomic_set(&ctx->wait_vsync_event, 1);
 322
 323         /*
 324          * wait for FIMD to signal VSYNC interrupt or return after
 325          * timeout which is set to 50ms (refresh rate of 20).
 326          */
 327         if (!wait_event_timeout(ctx->wait_vsync_queue,
 328                                 !atomic_read(&ctx->wait_vsync_event),
 329                                 DRM_HZ/20))
 330                 DRM_DEBUG_KMS("vblank wait timed out.\n");
 331 }
 332
 333 static struct exynos_drm_manager_ops fimd_manager_ops = {
 334         .dpms = fimd_dpms,
 335         .apply = fimd_apply,
 336         .commit = fimd_commit,
 337         .enable_vblank = fimd_enable_vblank,
 338         .disable_vblank = fimd_disable_vblank,
 339         .wait_for_vblank = fimd_wait_for_vblank,
 340 };
 341
 342 static void fimd_win_mode_set(struct device *dev,
 343                               struct exynos_drm_overlay *overlay)
 344 {
 345         struct fimd_context *ctx = get_fimd_context(dev);
 346         struct fimd_win_data *win_data;
 347         int win;
 348         unsigned long offset;
 349
 350         DRM_DEBUG_KMS("%s\n", __FILE__);
 351
 352         if (!overlay) {
 353                 dev_err(dev, "overlay is NULL\n");
 354                 return;
 355         }
 356
 357         win = overlay->zpos;
 358         if (win == DEFAULT_ZPOS)
 359                 win = ctx->default_win;
 360
 361         if (win < 0 || win > WINDOWS_NR)
 362                 return;
 363
 364         offset = overlay->fb_x * (overlay->bpp >> 3);
 365         offset += overlay->fb_y * overlay->pitch;
 366
 367         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 368
 369         win_data = &ctx->win_data[win];
 370
 371         win_data->offset_x = overlay->crtc_x;
 372         win_data->offset_y = overlay->crtc_y;
 373         win_data->ovl_width = overlay->crtc_width;
 374         win_data->ovl_height = overlay->crtc_height;
 375         win_data->fb_width = overlay->fb_width;
 376         win_data->fb_height = overlay->fb_height;
 377         win_data->dma_addr = overlay->dma_addr[0] + offset;
 378         win_data->vaddr = overlay->vaddr[0] + offset;
 379         win_data->bpp = overlay->bpp;
 380         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 381                                 (overlay->bpp >> 3);
 382         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 383
 384         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 385                         win_data->offset_x, win_data->offset_y);
 386         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 387                         win_data->ovl_width, win_data->ovl_height);
 388         DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
 389                         (unsigned long)win_data->dma_addr,
 390                         (unsigned long)win_data->vaddr);
 391         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 392                         overlay->fb_width, overlay->crtc_width);
 393 }
 394
 395 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 396 {
 397         struct fimd_context *ctx = get_fimd_context(dev);
 398         struct fimd_win_data *win_data = &ctx->win_data[win];
 399         unsigned long val;
 400
 401         DRM_DEBUG_KMS("%s\n", __FILE__);
 402
 403         val = WINCONx_ENWIN;
 404
 405         switch (win_data->bpp) {
 406         case 1:
 407                 val |= WINCON0_BPPMODE_1BPP;
 408                 val |= WINCONx_BITSWP;
 409                 val |= WINCONx_BURSTLEN_4WORD;
 410                 break;
 411         case 2:
 412                 val |= WINCON0_BPPMODE_2BPP;
 413                 val |= WINCONx_BITSWP;
 414                 val |= WINCONx_BURSTLEN_8WORD;
 415                 break;
 416         case 4:
 417                 val |= WINCON0_BPPMODE_4BPP;
 418                 val |= WINCONx_BITSWP;
 419                 val |= WINCONx_BURSTLEN_8WORD;
 420                 break;
 421         case 8:
 422                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 423                 val |= WINCONx_BURSTLEN_8WORD;
 424                 val |= WINCONx_BYTSWP;
 425                 break;
 426         case 16:
 427                 val |= WINCON0_BPPMODE_16BPP_565;
 428                 val |= WINCONx_HAWSWP;
 429                 val |= WINCONx_BURSTLEN_16WORD;
 430                 break;
 431         case 24:
 432                 val |= WINCON0_BPPMODE_24BPP_888;
 433                 val |= WINCONx_WSWP;
 434                 val |= WINCONx_BURSTLEN_16WORD;
 435                 break;
 436         case 32:
 437                 val |= WINCON1_BPPMODE_28BPP_A4888
 438                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 439                 val |= WINCONx_WSWP;
 440                 val |= WINCONx_BURSTLEN_16WORD;
 441                 break;
 442         default:
 443                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 444
 445                 val |= WINCON0_BPPMODE_24BPP_888;
 446                 val |= WINCONx_WSWP;
 447                 val |= WINCONx_BURSTLEN_16WORD;
 448                 break;
 449         }
 450
 451         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 452
 453         writel(val, ctx->regs + WINCON(win));
 454 }
 455
 456 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 457 {
 458         struct fimd_context *ctx = get_fimd_context(dev);
 459         unsigned int keycon0 = 0, keycon1 = 0;
 460
 461         DRM_DEBUG_KMS("%s\n", __FILE__);
 462
 463         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 464                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 465
 466         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 467
 468         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 469         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 470 }
 471
 472 static void fimd_win_commit(struct device *dev, int zpos)
 473 {
 474         struct fimd_context *ctx = get_fimd_context(dev);
 475         struct fimd_win_data *win_data;
 476         int win = zpos;
 477         unsigned long val, alpha, size;
 478
 479         DRM_DEBUG_KMS("%s\n", __FILE__);
 480
 481         if (ctx->suspended)
 482                 return;
 483
 484         if (win == DEFAULT_ZPOS)
 485                 win = ctx->default_win;
 486
 487         if (win < 0 || win > WINDOWS_NR)
 488                 return;
 489
 490         win_data = &ctx->win_data[win];
 491
 492         /*
 493          * SHADOWCON register is used for enabling timing.
 494          *
 495          * for example, once only width value of a register is set,
 496          * if the dma is started then fimd hardware could malfunction so
 497          * with protect window setting, the register fields with prefix '_F'
 498          * wouldn't be updated at vsync also but updated once unprotect window
 499          * is set.
 500          */
 501
 502         /* protect windows */
 503         val = readl(ctx->regs + SHADOWCON);
 504         val |= SHADOWCON_WINx_PROTECT(win);
 505         writel(val, ctx->regs + SHADOWCON);
 506
 507         /* buffer start address */
 508         val = (unsigned long)win_data->dma_addr;
 509         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 510
 511         /* buffer end address */
 512         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 513         val = (unsigned long)(win_data->dma_addr + size);
 514         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 515
 516         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 517                         (unsigned long)win_data->dma_addr, val, size);
 518         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 519                         win_data->ovl_width, win_data->ovl_height);
 520
 521         /* buffer size */
 522         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 523                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
 524         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 525
 526         /* OSD position */
 527         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 528                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
 529         writel(val, ctx->regs + VIDOSD_A(win));
 530
 531         val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
 532                                         win_data->ovl_width - 1) |
 533                 VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
 534                                         win_data->ovl_height - 1);
 535         writel(val, ctx->regs + VIDOSD_B(win));
 536
 537         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 538                         win_data->offset_x, win_data->offset_y,
 539                         win_data->offset_x + win_data->ovl_width - 1,
 540                         win_data->offset_y + win_data->ovl_height - 1);
 541
 542         /* hardware window 0 doesn't support alpha channel. */
 543         if (win != 0) {
 544                 /* OSD alpha */
 545                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 546                         VIDISD14C_ALPHA1_G(0xf) |
 547                         VIDISD14C_ALPHA1_B(0xf);
 548
 549                 writel(alpha, ctx->regs + VIDOSD_C(win));
 550         }
 551
 552         /* OSD size */
 553         if (win != 3 && win != 4) {
 554                 u32 offset = VIDOSD_D(win);
 555                 if (win == 0)
 556                         offset = VIDOSD_C_SIZE_W0;
 557                 val = win_data->ovl_width * win_data->ovl_height;
 558                 writel(val, ctx->regs + offset);
 559
 560                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 561         }
 562
 563         fimd_win_set_pixfmt(dev, win);
 564
 565         /* hardware window 0 doesn't support color key. */
 566         if (win != 0)
 567                 fimd_win_set_colkey(dev, win);
 568
 569         /* wincon */
 570         val = readl(ctx->regs + WINCON(win));
 571         val |= WINCONx_ENWIN;
 572         writel(val, ctx->regs + WINCON(win));
 573
 574         /* Enable DMA channel and unprotect windows */
 575         val = readl(ctx->regs + SHADOWCON);
 576         val |= SHADOWCON_CHx_ENABLE(win);
 577         val &= ~SHADOWCON_WINx_PROTECT(win);
 578         writel(val, ctx->regs + SHADOWCON);
 579
 580         win_data->enabled = true;
 581 }
 582
 583 static void fimd_win_disable(struct device *dev, int zpos)
 584 {
 585         struct fimd_context *ctx = get_fimd_context(dev);
 586         struct fimd_win_data *win_data;
 587         int win = zpos;
 588         u32 val;
 589
 590         DRM_DEBUG_KMS("%s\n", __FILE__);
 591
 592         if (win == DEFAULT_ZPOS)
 593                 win = ctx->default_win;
 594
 595         if (win < 0 || win > WINDOWS_NR)
 596                 return;
 597
 598         win_data = &ctx->win_data[win];
 599
 600         if (ctx->suspended) {
 601                 /* do not resume this window*/
 602                 win_data->resume = false;
 603                 return;
 604         }
 605
 606         /* protect windows */
 607         val = readl(ctx->regs + SHADOWCON);
 608         val |= SHADOWCON_WINx_PROTECT(win);
 609         writel(val, ctx->regs + SHADOWCON);
 610
 611         /* wincon */
 612         val = readl(ctx->regs + WINCON(win));
 613         val &= ~WINCONx_ENWIN;
 614         writel(val, ctx->regs + WINCON(win));
 615
 616         /* unprotect windows */
 617         val = readl(ctx->regs + SHADOWCON);
 618         val &= ~SHADOWCON_CHx_ENABLE(win);
 619         val &= ~SHADOWCON_WINx_PROTECT(win);
 620         writel(val, ctx->regs + SHADOWCON);
 621
 622         win_data->enabled = false;
 623 }
 624
 625 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
 626         .mode_set = fimd_win_mode_set,
 627         .commit = fimd_win_commit,
 628         .disable = fimd_win_disable,
 629 };
 630
 631 static struct exynos_drm_manager fimd_manager = {
 632         .pipe           = -1,
 633         .ops            = &fimd_manager_ops,
 634         .overlay_ops    = &fimd_overlay_ops,
 635         .display_ops    = &fimd_display_ops,
 636 };
 637
 638 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
 639 {
 640         struct exynos_drm_private *dev_priv = drm_dev->dev_private;
 641         struct drm_pending_vblank_event *e, *t;
 642         struct timeval now;
 643         unsigned long flags;
 644
 645         spin_lock_irqsave(&drm_dev->event_lock, flags);
 646
 647         list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
 648                         base.link) {
 649                 /* if event's pipe isn't same as crtc then ignore it. */
 650                 if (crtc != e->pipe)
 651                         continue;
 652
 653                 do_gettimeofday(&now);
 654                 e->event.sequence = 0;
 655                 e->event.tv_sec = now.tv_sec;
 656                 e->event.tv_usec = now.tv_usec;
 657
 658                 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
 659                 wake_up_interruptible(&e->base.file_priv->event_wait);
 660                 drm_vblank_put(drm_dev, crtc);
 661         }
 662
 663         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
 664 }
 665
 666 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 667 {
 668         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 669         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 670         struct drm_device *drm_dev = subdrv->drm_dev;
 671         struct exynos_drm_manager *manager = subdrv->manager;
 672         u32 val;
 673
 674         val = readl(ctx->regs + VIDINTCON1);
 675
 676         if (val & VIDINTCON1_INT_FRAME)
 677                 /* VSYNC interrupt */
 678                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 679
 680         /* check the crtc is detached already from encoder */
 681         if (manager->pipe < 0)
 682                 goto out;
 683
 684         drm_handle_vblank(drm_dev, manager->pipe);
 685         fimd_finish_pageflip(drm_dev, manager->pipe);
 686
 687         /* set wait vsync event to zero and wake up queue. */
 688         if (atomic_read(&ctx->wait_vsync_event)) {
 689                 atomic_set(&ctx->wait_vsync_event, 0);
 690                 DRM_WAKEUP(&ctx->wait_vsync_queue);
 691         }
 692 out:
 693         return IRQ_HANDLED;
 694 }
 695
 696 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 697 {
 698         DRM_DEBUG_KMS("%s\n", __FILE__);
 699
 700         /*
 701          * enable drm irq mode.
 702          * - with irq_enabled = 1, we can use the vblank feature.
 703          *
 704          * P.S. note that we wouldn't use drm irq handler but
 705          *      just specific driver own one instead because
 706          *      drm framework supports only one irq handler.
 707          */
 708         drm_dev->irq_enabled = 1;
 709
 710         /*
 711          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
 712          * by drm timer once a current process gives up ownership of
 713          * vblank event.(after drm_vblank_put function is called)
 714          */
 715         drm_dev->vblank_disable_allowed = 1;
 716
 717         /* attach this sub driver to iommu mapping if supported. */
 718         if (is_drm_iommu_supported(drm_dev))
 719                 drm_iommu_attach_device(drm_dev, dev);
 720
 721         return 0;
 722 }
 723
 724 static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
 725 {
 726         DRM_DEBUG_KMS("%s\n", __FILE__);
 727
 728         /* detach this sub driver from iommu mapping if supported. */
 729         if (is_drm_iommu_supported(drm_dev))
 730                 drm_iommu_detach_device(drm_dev, dev);
 731 }
 732
 733 static int fimd_calc_clkdiv(struct fimd_context *ctx,
 734                             struct fb_videomode *timing)
 735 {
 736         unsigned long clk = clk_get_rate(ctx->lcd_clk);
 737         u32 retrace;
 738         u32 clkdiv;
 739         u32 best_framerate = 0;
 740         u32 framerate;
 741
 742         DRM_DEBUG_KMS("%s\n", __FILE__);
 743
 744         retrace = timing->left_margin + timing->hsync_len +
 745                                 timing->right_margin + timing->xres;
 746         retrace *= timing->upper_margin + timing->vsync_len +
 747                                 timing->lower_margin + timing->yres;
 748
 749         /* default framerate is 60Hz */
 750         if (!timing->refresh)
 751                 timing->refresh = 60;
 752
 753         clk /= retrace;
 754
 755         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
 756                 int tmp;
 757
 758                 /* get best framerate */
 759                 framerate = clk / clkdiv;
 760                 tmp = timing->refresh - framerate;
 761                 if (tmp < 0) {
 762                         best_framerate = framerate;
 763                         continue;
 764                 } else {
 765                         if (!best_framerate)
 766                                 best_framerate = framerate;
 767                         else if (tmp < (best_framerate - framerate))
 768                                 best_framerate = framerate;
 769                         break;
 770                 }
 771         }
 772
 773         return clkdiv;
 774 }
 775
 776 static void fimd_clear_win(struct fimd_context *ctx, int win)
 777 {
 778         u32 val;
 779
 780         DRM_DEBUG_KMS("%s\n", __FILE__);
 781
 782         writel(0, ctx->regs + WINCON(win));
 783         writel(0, ctx->regs + VIDOSD_A(win));
 784         writel(0, ctx->regs + VIDOSD_B(win));
 785         writel(0, ctx->regs + VIDOSD_C(win));
 786
 787         if (win == 1 || win == 2)
 788                 writel(0, ctx->regs + VIDOSD_D(win));
 789
 790         val = readl(ctx->regs + SHADOWCON);
 791         val &= ~SHADOWCON_WINx_PROTECT(win);
 792         writel(val, ctx->regs + SHADOWCON);
 793 }
 794
 795 static int fimd_clock(struct fimd_context *ctx, bool enable)
 796 {
 797         DRM_DEBUG_KMS("%s\n", __FILE__);
 798
 799         if (enable) {
 800                 int ret;
 801
 802                 ret = clk_enable(ctx->bus_clk);
 803                 if (ret < 0)
 804                         return ret;
 805
 806                 ret = clk_enable(ctx->lcd_clk);
 807                 if  (ret < 0) {
 808                         clk_disable(ctx->bus_clk);
 809                         return ret;
 810                 }
 811         } else {
 812                 clk_disable(ctx->lcd_clk);
 813                 clk_disable(ctx->bus_clk);
 814         }
 815
 816         return 0;
 817 }
 818
 819 static void fimd_window_suspend(struct device *dev)
 820 {
 821         struct fimd_context *ctx = get_fimd_context(dev);
 822         struct fimd_win_data *win_data;
 823         int i;
 824
 825         for (i = 0; i < WINDOWS_NR; i++) {
 826                 win_data = &ctx->win_data[i];
 827                 win_data->resume = win_data->enabled;
 828                 fimd_win_disable(dev, i);
 829         }
 830         fimd_wait_for_vblank(dev);
 831 }
 832
 833 static void fimd_window_resume(struct device *dev)
 834 {
 835         struct fimd_context *ctx = get_fimd_context(dev);
 836         struct fimd_win_data *win_data;
 837         int i;
 838
 839         for (i = 0; i < WINDOWS_NR; i++) {
 840                 win_data = &ctx->win_data[i];
 841                 win_data->enabled = win_data->resume;
 842                 win_data->resume = false;
 843         }
 844 }
 845
 846 static int fimd_activate(struct fimd_context *ctx, bool enable)
 847 {
 848         struct device *dev = ctx->subdrv.dev;
 849         if (enable) {
 850                 int ret;
 851
 852                 ret = fimd_clock(ctx, true);
 853                 if (ret < 0)
 854                         return ret;
 855
 856                 ctx->suspended = false;
 857
 858                 /* if vblank was enabled status, enable it again. */
 859                 if (test_and_clear_bit(0, &ctx->irq_flags))
 860                         fimd_enable_vblank(dev);
 861
 862                 fimd_window_resume(dev);
 863         } else {
 864                 fimd_window_suspend(dev);
 865
 866                 fimd_clock(ctx, false);
 867                 ctx->suspended = true;
 868         }
 869
 870         return 0;
 871 }
 872
 873 static int __devinit fimd_probe(struct platform_device *pdev)
 874 {
 875         struct device *dev = &pdev->dev;
 876         struct fimd_context *ctx;
 877         struct exynos_drm_subdrv *subdrv;
 878         struct exynos_drm_fimd_pdata *pdata;
 879         struct exynos_drm_panel_info *panel;
 880         struct resource *res;
 881         int win;
 882         int ret = -EINVAL;
 883
 884         DRM_DEBUG_KMS("%s\n", __FILE__);
 885
 886         pdata = pdev->dev.platform_data;
 887         if (!pdata) {
 888                 dev_err(dev, "no platform data specified\n");
 889                 return -EINVAL;
 890         }
 891
 892         panel = &pdata->panel;
 893         if (!panel) {
 894                 dev_err(dev, "panel is null.\n");
 895                 return -EINVAL;
 896         }
 897
 898         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 899         if (!ctx)
 900                 return -ENOMEM;
 901
 902         ctx->bus_clk = devm_clk_get(dev, "fimd");
 903         if (IS_ERR(ctx->bus_clk)) {
 904                 dev_err(dev, "failed to get bus clock\n");
 905                 return PTR_ERR(ctx->bus_clk);
 906         }
 907
 908         ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
 909         if (IS_ERR(ctx->lcd_clk)) {
 910                 dev_err(dev, "failed to get lcd clock\n");
 911                 return PTR_ERR(ctx->lcd_clk);
 912         }
 913
 914         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 915
 916         ctx->regs = devm_request_and_ioremap(&pdev->dev, res);
 917         if (!ctx->regs) {
 918                 dev_err(dev, "failed to map registers\n");
 919                 return -ENXIO;
 920         }
 921
 922         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 923         if (!res) {
 924                 dev_err(dev, "irq request failed.\n");
 925                 return -ENXIO;
 926         }
 927
 928         ctx->irq = res->start;
 929
 930         ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
 931                                                         0, "drm_fimd", ctx);
 932         if (ret) {
 933                 dev_err(dev, "irq request failed.\n");
 934                 return ret;
 935         }
 936
 937         ctx->vidcon0 = pdata->vidcon0;
 938         ctx->vidcon1 = pdata->vidcon1;
 939         ctx->default_win = pdata->default_win;
 940         ctx->panel = panel;
 941         DRM_INIT_WAITQUEUE(&ctx->wait_vsync_queue);
 942         atomic_set(&ctx->wait_vsync_event, 0);
 943
 944         subdrv = &ctx->subdrv;
 945
 946         subdrv->dev = dev;
 947         subdrv->manager = &fimd_manager;
 948         subdrv->probe = fimd_subdrv_probe;
 949         subdrv->remove = fimd_subdrv_remove;
 950
 951         mutex_init(&ctx->lock);
 952
 953         platform_set_drvdata(pdev, ctx);
 954
 955         pm_runtime_enable(dev);
 956         pm_runtime_get_sync(dev);
 957
 958         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
 959         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 960
 961         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
 962                         panel->timing.pixclock, ctx->clkdiv);
 963
 964         for (win = 0; win < WINDOWS_NR; win++)
 965                 fimd_clear_win(ctx, win);
 966
 967         exynos_drm_subdrv_register(subdrv);
 968
 969         return 0;
 970 }
 971
 972 static int __devexit fimd_remove(struct platform_device *pdev)
 973 {
 974         struct device *dev = &pdev->dev;
 975         struct fimd_context *ctx = platform_get_drvdata(pdev);
 976
 977         DRM_DEBUG_KMS("%s\n", __FILE__);
 978
 979         exynos_drm_subdrv_unregister(&ctx->subdrv);
 980
 981         if (ctx->suspended)
 982                 goto out;
 983
 984         clk_disable(ctx->lcd_clk);
 985         clk_disable(ctx->bus_clk);
 986
 987         pm_runtime_set_suspended(dev);
 988         pm_runtime_put_sync(dev);
 989
 990 out:
 991         pm_runtime_disable(dev);
 992
 993         return 0;
 994 }
 995
 996 #ifdef CONFIG_PM_SLEEP
 997 static int fimd_suspend(struct device *dev)
 998 {
 999         struct fimd_context *ctx = get_fimd_context(dev);
1000
1001         /*
1002          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
1003          * called here, an error would be returned by that interface
1004          * because the usage_count of pm runtime is more than 1.
1005          */
1006         if (!pm_runtime_suspended(dev))
1007                 return fimd_activate(ctx, false);
1008
1009         return 0;
1010 }
1011
1012 static int fimd_resume(struct device *dev)
1013 {
1014         struct fimd_context *ctx = get_fimd_context(dev);
1015
1016         /*
1017          * if entered to sleep when lcd panel was on, the usage_count
1018          * of pm runtime would still be 1 so in this case, fimd driver
1019          * should be on directly not drawing on pm runtime interface.
1020          */
1021         if (pm_runtime_suspended(dev)) {
1022                 int ret;
1023
1024                 ret = fimd_activate(ctx, true);
1025                 if (ret < 0)
1026                         return ret;
1027
1028                 /*
1029                  * in case of dpms on(standby), fimd_apply function will
1030                  * be called by encoder's dpms callback to update fimd's
1031                  * registers but in case of sleep wakeup, it's not.
1032                  * so fimd_apply function should be called at here.
1033                  */
1034                 fimd_apply(dev);
1035         }
1036
1037         return 0;
1038 }
1039 #endif
1040
1041 #ifdef CONFIG_PM_RUNTIME
1042 static int fimd_runtime_suspend(struct device *dev)
1043 {
1044         struct fimd_context *ctx = get_fimd_context(dev);
1045
1046         DRM_DEBUG_KMS("%s\n", __FILE__);
1047
1048         return fimd_activate(ctx, false);
1049 }
1050
1051 static int fimd_runtime_resume(struct device *dev)
1052 {
1053         struct fimd_context *ctx = get_fimd_context(dev);
1054
1055         DRM_DEBUG_KMS("%s\n", __FILE__);
1056
1057         return fimd_activate(ctx, true);
1058 }
1059 #endif
1060
1061 static struct platform_device_id fimd_driver_ids[] = {
1062         {
1063                 .name           = "exynos4-fb",
1064                 .driver_data    = (unsigned long)&exynos4_fimd_driver_data,
1065         }, {
1066                 .name           = "exynos5-fb",
1067                 .driver_data    = (unsigned long)&exynos5_fimd_driver_data,
1068         },
1069         {},
1070 };
1071 MODULE_DEVICE_TABLE(platform, fimd_driver_ids);
1072
1073 static const struct dev_pm_ops fimd_pm_ops = {
1074         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1075         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1076 };
1077
1078 struct platform_driver fimd_driver = {
1079         .probe          = fimd_probe,
1080         .remove         = __devexit_p(fimd_remove),
1081         .id_table       = fimd_driver_ids,
1082         .driver         = {
1083                 .name   = "exynos4-fb",
1084                 .owner  = THIS_MODULE,
1085                 .pm     = &fimd_pm_ops,
1086         },
1087 };