drivers/gpu/drm/i915/intel_panel.c

   1 /*
   2  * Copyright © 2006-2010 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  *      Chris Wilson <chris@chris-wilson.co.uk>
  29  */
  30
  31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32
  33 #include <linux/moduleparam.h>
  34 #include "intel_drv.h"
  35
  36 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
  37
  38 void
  39 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
  40                        struct drm_display_mode *adjusted_mode)
  41 {
  42         adjusted_mode->hdisplay = fixed_mode->hdisplay;
  43         adjusted_mode->hsync_start = fixed_mode->hsync_start;
  44         adjusted_mode->hsync_end = fixed_mode->hsync_end;
  45         adjusted_mode->htotal = fixed_mode->htotal;
  46
  47         adjusted_mode->vdisplay = fixed_mode->vdisplay;
  48         adjusted_mode->vsync_start = fixed_mode->vsync_start;
  49         adjusted_mode->vsync_end = fixed_mode->vsync_end;
  50         adjusted_mode->vtotal = fixed_mode->vtotal;
  51
  52         adjusted_mode->clock = fixed_mode->clock;
  53 }
  54
  55 /* adjusted_mode has been preset to be the panel's fixed mode */
  56 void
  57 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  58                         struct intel_crtc_config *pipe_config,
  59                         int fitting_mode)
  60 {
  61         struct drm_display_mode *mode, *adjusted_mode;
  62         int x, y, width, height;
  63
  64         mode = &pipe_config->requested_mode;
  65         adjusted_mode = &pipe_config->adjusted_mode;
  66
  67         x = y = width = height = 0;
  68
  69         /* Native modes don't need fitting */
  70         if (adjusted_mode->hdisplay == mode->hdisplay &&
  71             adjusted_mode->vdisplay == mode->vdisplay)
  72                 goto done;
  73
  74         switch (fitting_mode) {
  75         case DRM_MODE_SCALE_CENTER:
  76                 width = mode->hdisplay;
  77                 height = mode->vdisplay;
  78                 x = (adjusted_mode->hdisplay - width + 1)/2;
  79                 y = (adjusted_mode->vdisplay - height + 1)/2;
  80                 break;
  81
  82         case DRM_MODE_SCALE_ASPECT:
  83                 /* Scale but preserve the aspect ratio */
  84                 {
  85                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  86                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  87                         if (scaled_width > scaled_height) { /* pillar */
  88                                 width = scaled_height / mode->vdisplay;
  89                                 if (width & 1)
  90                                         width++;
  91                                 x = (adjusted_mode->hdisplay - width + 1) / 2;
  92                                 y = 0;
  93                                 height = adjusted_mode->vdisplay;
  94                         } else if (scaled_width < scaled_height) { /* letter */
  95                                 height = scaled_width / mode->hdisplay;
  96                                 if (height & 1)
  97                                     height++;
  98                                 y = (adjusted_mode->vdisplay - height + 1) / 2;
  99                                 x = 0;
 100                                 width = adjusted_mode->hdisplay;
 101                         } else {
 102                                 x = y = 0;
 103                                 width = adjusted_mode->hdisplay;
 104                                 height = adjusted_mode->vdisplay;
 105                         }
 106                 }
 107                 break;
 108
 109         case DRM_MODE_SCALE_FULLSCREEN:
 110                 x = y = 0;
 111                 width = adjusted_mode->hdisplay;
 112                 height = adjusted_mode->vdisplay;
 113                 break;
 114
 115         default:
 116                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 117                 return;
 118         }
 119
 120 done:
 121         pipe_config->pch_pfit.pos = (x << 16) | y;
 122         pipe_config->pch_pfit.size = (width << 16) | height;
 123 }
 124
 125 static void
 126 centre_horizontally(struct drm_display_mode *mode,
 127                     int width)
 128 {
 129         u32 border, sync_pos, blank_width, sync_width;
 130
 131         /* keep the hsync and hblank widths constant */
 132         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 133         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 134         sync_pos = (blank_width - sync_width + 1) / 2;
 135
 136         border = (mode->hdisplay - width + 1) / 2;
 137         border += border & 1; /* make the border even */
 138
 139         mode->crtc_hdisplay = width;
 140         mode->crtc_hblank_start = width + border;
 141         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 142
 143         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 144         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 145 }
 146
 147 static void
 148 centre_vertically(struct drm_display_mode *mode,
 149                   int height)
 150 {
 151         u32 border, sync_pos, blank_width, sync_width;
 152
 153         /* keep the vsync and vblank widths constant */
 154         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 155         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 156         sync_pos = (blank_width - sync_width + 1) / 2;
 157
 158         border = (mode->vdisplay - height + 1) / 2;
 159
 160         mode->crtc_vdisplay = height;
 161         mode->crtc_vblank_start = height + border;
 162         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 163
 164         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 165         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 166 }
 167
 168 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 169 {
 170         /*
 171          * Floating point operation is not supported. So the FACTOR
 172          * is defined, which can avoid the floating point computation
 173          * when calculating the panel ratio.
 174          */
 175 #define ACCURACY 12
 176 #define FACTOR (1 << ACCURACY)
 177         u32 ratio = source * FACTOR / target;
 178         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 179 }
 180
 181 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
 182                               struct intel_crtc_config *pipe_config,
 183                               int fitting_mode)
 184 {
 185         struct drm_device *dev = intel_crtc->base.dev;
 186         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 187         struct drm_display_mode *mode, *adjusted_mode;
 188
 189         mode = &pipe_config->requested_mode;
 190         adjusted_mode = &pipe_config->adjusted_mode;
 191
 192         /* Native modes don't need fitting */
 193         if (adjusted_mode->hdisplay == mode->hdisplay &&
 194             adjusted_mode->vdisplay == mode->vdisplay)
 195                 goto out;
 196
 197         switch (fitting_mode) {
 198         case DRM_MODE_SCALE_CENTER:
 199                 /*
 200                  * For centered modes, we have to calculate border widths &
 201                  * heights and modify the values programmed into the CRTC.
 202                  */
 203                 centre_horizontally(adjusted_mode, mode->hdisplay);
 204                 centre_vertically(adjusted_mode, mode->vdisplay);
 205                 border = LVDS_BORDER_ENABLE;
 206                 break;
 207         case DRM_MODE_SCALE_ASPECT:
 208                 /* Scale but preserve the aspect ratio */
 209                 if (INTEL_INFO(dev)->gen >= 4) {
 210                         u32 scaled_width = adjusted_mode->hdisplay *
 211                                 mode->vdisplay;
 212                         u32 scaled_height = mode->hdisplay *
 213                                 adjusted_mode->vdisplay;
 214
 215                         /* 965+ is easy, it does everything in hw */
 216                         if (scaled_width > scaled_height)
 217                                 pfit_control |= PFIT_ENABLE |
 218                                         PFIT_SCALING_PILLAR;
 219                         else if (scaled_width < scaled_height)
 220                                 pfit_control |= PFIT_ENABLE |
 221                                         PFIT_SCALING_LETTER;
 222                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 223                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 224                 } else {
 225                         u32 scaled_width = adjusted_mode->hdisplay *
 226                                 mode->vdisplay;
 227                         u32 scaled_height = mode->hdisplay *
 228                                 adjusted_mode->vdisplay;
 229                         /*
 230                          * For earlier chips we have to calculate the scaling
 231                          * ratio by hand and program it into the
 232                          * PFIT_PGM_RATIO register
 233                          */
 234                         if (scaled_width > scaled_height) { /* pillar */
 235                                 centre_horizontally(adjusted_mode,
 236                                                     scaled_height /
 237                                                     mode->vdisplay);
 238
 239                                 border = LVDS_BORDER_ENABLE;
 240                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 241                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 242                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 243                                                             bits << PFIT_VERT_SCALE_SHIFT);
 244                                         pfit_control |= (PFIT_ENABLE |
 245                                                          VERT_INTERP_BILINEAR |
 246                                                          HORIZ_INTERP_BILINEAR);
 247                                 }
 248                         } else if (scaled_width < scaled_height) { /* letter */
 249                                 centre_vertically(adjusted_mode,
 250                                                   scaled_width /
 251                                                   mode->hdisplay);
 252
 253                                 border = LVDS_BORDER_ENABLE;
 254                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 255                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 256                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 257                                                             bits << PFIT_VERT_SCALE_SHIFT);
 258                                         pfit_control |= (PFIT_ENABLE |
 259                                                          VERT_INTERP_BILINEAR |
 260                                                          HORIZ_INTERP_BILINEAR);
 261                                 }
 262                         } else {
 263                                 /* Aspects match, Let hw scale both directions */
 264                                 pfit_control |= (PFIT_ENABLE |
 265                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 266                                                  VERT_INTERP_BILINEAR |
 267                                                  HORIZ_INTERP_BILINEAR);
 268                         }
 269                 }
 270                 break;
 271         case DRM_MODE_SCALE_FULLSCREEN:
 272                 /*
 273                  * Full scaling, even if it changes the aspect ratio.
 274                  * Fortunately this is all done for us in hw.
 275                  */
 276                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 277                     mode->hdisplay != adjusted_mode->hdisplay) {
 278                         pfit_control |= PFIT_ENABLE;
 279                         if (INTEL_INFO(dev)->gen >= 4)
 280                                 pfit_control |= PFIT_SCALING_AUTO;
 281                         else
 282                                 pfit_control |= (VERT_AUTO_SCALE |
 283                                                  VERT_INTERP_BILINEAR |
 284                                                  HORIZ_AUTO_SCALE |
 285                                                  HORIZ_INTERP_BILINEAR);
 286                 }
 287                 break;
 288         default:
 289                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 290                 return;
 291         }
 292
 293         /* 965+ wants fuzzy fitting */
 294         /* FIXME: handle multiple panels by failing gracefully */
 295         if (INTEL_INFO(dev)->gen >= 4)
 296                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 297                                  PFIT_FILTER_FUZZY);
 298
 299 out:
 300         if ((pfit_control & PFIT_ENABLE) == 0) {
 301                 pfit_control = 0;
 302                 pfit_pgm_ratios = 0;
 303         }
 304
 305         /* Make sure pre-965 set dither correctly for 18bpp panels. */
 306         if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
 307                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 308
 309         pipe_config->gmch_pfit.control = pfit_control;
 310         pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
 311         pipe_config->gmch_pfit.lvds_border_bits = border;
 312 }
 313
 314 static int is_backlight_combination_mode(struct drm_device *dev)
 315 {
 316         struct drm_i915_private *dev_priv = dev->dev_private;
 317
 318         if (INTEL_INFO(dev)->gen >= 4)
 319                 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
 320
 321         if (IS_GEN2(dev))
 322                 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
 323
 324         return 0;
 325 }
 326
 327 /* XXX: query mode clock or hardware clock and program max PWM appropriately
 328  * when it's 0.
 329  */
 330 static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
 331 {
 332         struct drm_i915_private *dev_priv = dev->dev_private;
 333         u32 val;
 334
 335         WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
 336
 337         /* Restore the CTL value if it lost, e.g. GPU reset */
 338
 339         if (HAS_PCH_SPLIT(dev_priv->dev)) {
 340                 val = I915_READ(BLC_PWM_PCH_CTL2);
 341                 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
 342                         dev_priv->regfile.saveBLC_PWM_CTL2 = val;
 343                 } else if (val == 0) {
 344                         val = dev_priv->regfile.saveBLC_PWM_CTL2;
 345                         I915_WRITE(BLC_PWM_PCH_CTL2, val);
 346                 }
 347         } else {
 348                 val = I915_READ(BLC_PWM_CTL);
 349                 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
 350                         dev_priv->regfile.saveBLC_PWM_CTL = val;
 351                         if (INTEL_INFO(dev)->gen >= 4)
 352                                 dev_priv->regfile.saveBLC_PWM_CTL2 =
 353                                         I915_READ(BLC_PWM_CTL2);
 354                 } else if (val == 0) {
 355                         val = dev_priv->regfile.saveBLC_PWM_CTL;
 356                         I915_WRITE(BLC_PWM_CTL, val);
 357                         if (INTEL_INFO(dev)->gen >= 4)
 358                                 I915_WRITE(BLC_PWM_CTL2,
 359                                            dev_priv->regfile.saveBLC_PWM_CTL2);
 360                 }
 361         }
 362
 363         return val;
 364 }
 365
 366 static u32 intel_panel_get_max_backlight(struct drm_device *dev)
 367 {
 368         u32 max;
 369
 370         max = i915_read_blc_pwm_ctl(dev);
 371
 372         if (HAS_PCH_SPLIT(dev)) {
 373                 max >>= 16;
 374         } else {
 375                 if (INTEL_INFO(dev)->gen < 4)
 376                         max >>= 17;
 377                 else
 378                         max >>= 16;
 379
 380                 if (is_backlight_combination_mode(dev))
 381                         max *= 0xff;
 382         }
 383
 384         DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
 385
 386         return max;
 387 }
 388
 389 static int i915_panel_invert_brightness;
 390 MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
 391         "(-1 force normal, 0 machine defaults, 1 force inversion), please "
 392         "report PCI device ID, subsystem vendor and subsystem device ID "
 393         "to dri-devel@lists.freedesktop.org, if your machine needs it. "
 394         "It will then be included in an upcoming module version.");
 395 module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
 396 static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
 397 {
 398         struct drm_i915_private *dev_priv = dev->dev_private;
 399
 400         if (i915_panel_invert_brightness < 0)
 401                 return val;
 402
 403         if (i915_panel_invert_brightness > 0 ||
 404             dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
 405                 u32 max = intel_panel_get_max_backlight(dev);
 406                 if (max)
 407                         return max - val;
 408         }
 409
 410         return val;
 411 }
 412
 413 static u32 intel_panel_get_backlight(struct drm_device *dev)
 414 {
 415         struct drm_i915_private *dev_priv = dev->dev_private;
 416         u32 val;
 417         unsigned long flags;
 418
 419         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 420
 421         if (HAS_PCH_SPLIT(dev)) {
 422                 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 423         } else {
 424                 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 425                 if (INTEL_INFO(dev)->gen < 4)
 426                         val >>= 1;
 427
 428                 if (is_backlight_combination_mode(dev)) {
 429                         u8 lbpc;
 430
 431                         pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
 432                         val *= lbpc;
 433                 }
 434         }
 435
 436         val = intel_panel_compute_brightness(dev, val);
 437
 438         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 439
 440         DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
 441         return val;
 442 }
 443
 444 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
 445 {
 446         struct drm_i915_private *dev_priv = dev->dev_private;
 447         u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 448         I915_WRITE(BLC_PWM_CPU_CTL, val | level);
 449 }
 450
 451 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
 452 {
 453         struct drm_i915_private *dev_priv = dev->dev_private;
 454         u32 tmp;
 455
 456         DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
 457         level = intel_panel_compute_brightness(dev, level);
 458
 459         if (HAS_PCH_SPLIT(dev))
 460                 return intel_pch_panel_set_backlight(dev, level);
 461
 462         if (is_backlight_combination_mode(dev)) {
 463                 u32 max = intel_panel_get_max_backlight(dev);
 464                 u8 lbpc;
 465
 466                 /* we're screwed, but keep behaviour backwards compatible */
 467                 if (!max)
 468                         max = 1;
 469
 470                 lbpc = level * 0xfe / max + 1;
 471                 level /= lbpc;
 472                 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
 473         }
 474
 475         tmp = I915_READ(BLC_PWM_CTL);
 476         if (INTEL_INFO(dev)->gen < 4)
 477                 level <<= 1;
 478         tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
 479         I915_WRITE(BLC_PWM_CTL, tmp | level);
 480 }
 481
 482 /* set backlight brightness to level in range [0..max] */
 483 void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
 484 {
 485         struct drm_i915_private *dev_priv = dev->dev_private;
 486         u32 freq;
 487         unsigned long flags;
 488
 489         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 490
 491         freq = intel_panel_get_max_backlight(dev);
 492         if (!freq) {
 493                 /* we are screwed, bail out */
 494                 goto out;
 495         }
 496
 497         /* scale to hardware, but be careful to not overflow */
 498         if (freq < max)
 499                 level = level * freq / max;
 500         else
 501                 level = freq / max * level;
 502
 503         dev_priv->backlight.level = level;
 504         if (dev_priv->backlight.device)
 505                 dev_priv->backlight.device->props.brightness = level;
 506
 507         if (dev_priv->backlight.enabled)
 508                 intel_panel_actually_set_backlight(dev, level);
 509 out:
 510         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 511 }
 512
 513 void intel_panel_disable_backlight(struct drm_device *dev)
 514 {
 515         struct drm_i915_private *dev_priv = dev->dev_private;
 516         unsigned long flags;
 517
 518         /*
 519          * Do not disable backlight on the vgaswitcheroo path. When switching
 520          * away from i915, the other client may depend on i915 to handle the
 521          * backlight. This will leave the backlight on unnecessarily when
 522          * another client is not activated.
 523          */
 524         if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
 525                 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
 526                 return;
 527         }
 528
 529         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 530
 531         dev_priv->backlight.enabled = false;
 532         intel_panel_actually_set_backlight(dev, 0);
 533
 534         if (INTEL_INFO(dev)->gen >= 4) {
 535                 uint32_t reg, tmp;
 536
 537                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
 538
 539                 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
 540
 541                 if (HAS_PCH_SPLIT(dev)) {
 542                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 543                         tmp &= ~BLM_PCH_PWM_ENABLE;
 544                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
 545                 }
 546         }
 547
 548         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 549 }
 550
 551 void intel_panel_enable_backlight(struct drm_device *dev,
 552                                   enum pipe pipe)
 553 {
 554         struct drm_i915_private *dev_priv = dev->dev_private;
 555         enum transcoder cpu_transcoder =
 556                 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
 557         unsigned long flags;
 558
 559         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 560
 561         if (dev_priv->backlight.level == 0) {
 562                 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
 563                 if (dev_priv->backlight.device)
 564                         dev_priv->backlight.device->props.brightness =
 565                                 dev_priv->backlight.level;
 566         }
 567
 568         if (INTEL_INFO(dev)->gen >= 4) {
 569                 uint32_t reg, tmp;
 570
 571                 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
 572
 573
 574                 tmp = I915_READ(reg);
 575
 576                 /* Note that this can also get called through dpms changes. And
 577                  * we don't track the backlight dpms state, hence check whether
 578                  * we have to do anything first. */
 579                 if (tmp & BLM_PWM_ENABLE)
 580                         goto set_level;
 581
 582                 if (INTEL_INFO(dev)->num_pipes == 3)
 583                         tmp &= ~BLM_PIPE_SELECT_IVB;
 584                 else
 585                         tmp &= ~BLM_PIPE_SELECT;
 586
 587                 if (cpu_transcoder == TRANSCODER_EDP)
 588                         tmp |= BLM_TRANSCODER_EDP;
 589                 else
 590                         tmp |= BLM_PIPE(cpu_transcoder);
 591                 tmp &= ~BLM_PWM_ENABLE;
 592
 593                 I915_WRITE(reg, tmp);
 594                 POSTING_READ(reg);
 595                 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
 596
 597                 if (HAS_PCH_SPLIT(dev) &&
 598                     !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
 599                         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 600                         tmp |= BLM_PCH_PWM_ENABLE;
 601                         tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
 602                         I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
 603                 }
 604         }
 605
 606 set_level:
 607         /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
 608          * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
 609          * registers are set.
 610          */
 611         dev_priv->backlight.enabled = true;
 612         intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
 613
 614         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 615 }
 616
 617 static void intel_panel_init_backlight(struct drm_device *dev)
 618 {
 619         struct drm_i915_private *dev_priv = dev->dev_private;
 620
 621         dev_priv->backlight.level = intel_panel_get_backlight(dev);
 622         dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
 623 }
 624
 625 enum drm_connector_status
 626 intel_panel_detect(struct drm_device *dev)
 627 {
 628         struct drm_i915_private *dev_priv = dev->dev_private;
 629
 630         /* Assume that the BIOS does not lie through the OpRegion... */
 631         if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
 632                 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
 633                         connector_status_connected :
 634                         connector_status_disconnected;
 635         }
 636
 637         switch (i915_panel_ignore_lid) {
 638         case -2:
 639                 return connector_status_connected;
 640         case -1:
 641                 return connector_status_disconnected;
 642         default:
 643                 return connector_status_unknown;
 644         }
 645 }
 646
 647 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 648 static int intel_panel_update_status(struct backlight_device *bd)
 649 {
 650         struct drm_device *dev = bl_get_data(bd);
 651         intel_panel_set_backlight(dev, bd->props.brightness,
 652                                   bd->props.max_brightness);
 653         return 0;
 654 }
 655
 656 static int intel_panel_get_brightness(struct backlight_device *bd)
 657 {
 658         struct drm_device *dev = bl_get_data(bd);
 659         return intel_panel_get_backlight(dev);
 660 }
 661
 662 static const struct backlight_ops intel_panel_bl_ops = {
 663         .update_status = intel_panel_update_status,
 664         .get_brightness = intel_panel_get_brightness,
 665 };
 666
 667 int intel_panel_setup_backlight(struct drm_connector *connector)
 668 {
 669         struct drm_device *dev = connector->dev;
 670         struct drm_i915_private *dev_priv = dev->dev_private;
 671         struct backlight_properties props;
 672         unsigned long flags;
 673
 674         intel_panel_init_backlight(dev);
 675
 676         if (WARN_ON(dev_priv->backlight.device))
 677                 return -ENODEV;
 678
 679         memset(&props, 0, sizeof(props));
 680         props.type = BACKLIGHT_RAW;
 681         props.brightness = dev_priv->backlight.level;
 682
 683         spin_lock_irqsave(&dev_priv->backlight.lock, flags);
 684         props.max_brightness = intel_panel_get_max_backlight(dev);
 685         spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
 686
 687         if (props.max_brightness == 0) {
 688                 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
 689                 return -ENODEV;
 690         }
 691         dev_priv->backlight.device =
 692                 backlight_device_register("intel_backlight",
 693                                           &connector->kdev, dev,
 694                                           &intel_panel_bl_ops, &props);
 695
 696         if (IS_ERR(dev_priv->backlight.device)) {
 697                 DRM_ERROR("Failed to register backlight: %ld\n",
 698                           PTR_ERR(dev_priv->backlight.device));
 699                 dev_priv->backlight.device = NULL;
 700                 return -ENODEV;
 701         }
 702         return 0;
 703 }
 704
 705 void intel_panel_destroy_backlight(struct drm_device *dev)
 706 {
 707         struct drm_i915_private *dev_priv = dev->dev_private;
 708         if (dev_priv->backlight.device) {
 709                 backlight_device_unregister(dev_priv->backlight.device);
 710                 dev_priv->backlight.device = NULL;
 711         }
 712 }
 713 #else
 714 int intel_panel_setup_backlight(struct drm_connector *connector)
 715 {
 716         intel_panel_init_backlight(connector->dev);
 717         return 0;
 718 }
 719
 720 void intel_panel_destroy_backlight(struct drm_device *dev)
 721 {
 722         return;
 723 }
 724 #endif
 725
 726 int intel_panel_init(struct intel_panel *panel,
 727                      struct drm_display_mode *fixed_mode)
 728 {
 729         panel->fixed_mode = fixed_mode;
 730
 731         return 0;
 732 }
 733
 734 void intel_panel_fini(struct intel_panel *panel)
 735 {
 736         struct intel_connector *intel_connector =
 737                 container_of(panel, struct intel_connector, panel);
 738
 739         if (panel->fixed_mode)
 740                 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
 741 }