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[karo-tx-linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47                         SDVO_TV_MASK)
48
49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
63         "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69         struct intel_encoder base;
70
71         struct i2c_adapter *i2c;
72         u8 slave_addr;
73
74         struct i2c_adapter ddc;
75
76         /* Register for the SDVO device: SDVOB or SDVOC */
77         uint32_t sdvo_reg;
78
79         /* Active outputs controlled by this SDVO output */
80         uint16_t controlled_output;
81
82         /*
83          * Capabilities of the SDVO device returned by
84          * i830_sdvo_get_capabilities()
85          */
86         struct intel_sdvo_caps caps;
87
88         /* Pixel clock limitations reported by the SDVO device, in kHz */
89         int pixel_clock_min, pixel_clock_max;
90
91         /*
92         * For multiple function SDVO device,
93         * this is for current attached outputs.
94         */
95         uint16_t attached_output;
96
97         /*
98          * Hotplug activation bits for this device
99          */
100         uint8_t hotplug_active[2];
101
102         /**
103          * This is used to select the color range of RBG outputs in HDMI mode.
104          * It is only valid when using TMDS encoding and 8 bit per color mode.
105          */
106         uint32_t color_range;
107
108         /**
109          * This is set if we're going to treat the device as TV-out.
110          *
111          * While we have these nice friendly flags for output types that ought
112          * to decide this for us, the S-Video output on our HDMI+S-Video card
113          * shows up as RGB1 (VGA).
114          */
115         bool is_tv;
116
117         /* On different gens SDVOB is at different places. */
118         bool is_sdvob;
119
120         /* This is for current tv format name */
121         int tv_format_index;
122
123         /**
124          * This is set if we treat the device as HDMI, instead of DVI.
125          */
126         bool is_hdmi;
127         bool has_hdmi_monitor;
128         bool has_hdmi_audio;
129
130         /**
131          * This is set if we detect output of sdvo device as LVDS and
132          * have a valid fixed mode to use with the panel.
133          */
134         bool is_lvds;
135
136         /**
137          * This is sdvo fixed pannel mode pointer
138          */
139         struct drm_display_mode *sdvo_lvds_fixed_mode;
140
141         /* DDC bus used by this SDVO encoder */
142         uint8_t ddc_bus;
143 };
144
145 struct intel_sdvo_connector {
146         struct intel_connector base;
147
148         /* Mark the type of connector */
149         uint16_t output_flag;
150
151         enum hdmi_force_audio force_audio;
152
153         /* This contains all current supported TV format */
154         u8 tv_format_supported[TV_FORMAT_NUM];
155         int   format_supported_num;
156         struct drm_property *tv_format;
157
158         /* add the property for the SDVO-TV */
159         struct drm_property *left;
160         struct drm_property *right;
161         struct drm_property *top;
162         struct drm_property *bottom;
163         struct drm_property *hpos;
164         struct drm_property *vpos;
165         struct drm_property *contrast;
166         struct drm_property *saturation;
167         struct drm_property *hue;
168         struct drm_property *sharpness;
169         struct drm_property *flicker_filter;
170         struct drm_property *flicker_filter_adaptive;
171         struct drm_property *flicker_filter_2d;
172         struct drm_property *tv_chroma_filter;
173         struct drm_property *tv_luma_filter;
174         struct drm_property *dot_crawl;
175
176         /* add the property for the SDVO-TV/LVDS */
177         struct drm_property *brightness;
178
179         /* Add variable to record current setting for the above property */
180         u32     left_margin, right_margin, top_margin, bottom_margin;
181
182         /* this is to get the range of margin.*/
183         u32     max_hscan,  max_vscan;
184         u32     max_hpos, cur_hpos;
185         u32     max_vpos, cur_vpos;
186         u32     cur_brightness, max_brightness;
187         u32     cur_contrast,   max_contrast;
188         u32     cur_saturation, max_saturation;
189         u32     cur_hue,        max_hue;
190         u32     cur_sharpness,  max_sharpness;
191         u32     cur_flicker_filter,             max_flicker_filter;
192         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
193         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
194         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
195         u32     cur_tv_luma_filter,     max_tv_luma_filter;
196         u32     cur_dot_crawl,  max_dot_crawl;
197 };
198
199 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
200 {
201         return container_of(encoder, struct intel_sdvo, base.base);
202 }
203
204 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205 {
206         return container_of(intel_attached_encoder(connector),
207                             struct intel_sdvo, base);
208 }
209
210 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211 {
212         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213 }
214
215 static bool
216 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
217 static bool
218 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219                               struct intel_sdvo_connector *intel_sdvo_connector,
220                               int type);
221 static bool
222 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223                                    struct intel_sdvo_connector *intel_sdvo_connector);
224
225 /**
226  * Writes the SDVOB or SDVOC with the given value, but always writes both
227  * SDVOB and SDVOC to work around apparent hardware issues (according to
228  * comments in the BIOS).
229  */
230 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
231 {
232         struct drm_device *dev = intel_sdvo->base.base.dev;
233         struct drm_i915_private *dev_priv = dev->dev_private;
234         u32 bval = val, cval = val;
235         int i;
236
237         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238                 I915_WRITE(intel_sdvo->sdvo_reg, val);
239                 I915_READ(intel_sdvo->sdvo_reg);
240                 return;
241         }
242
243         if (intel_sdvo->sdvo_reg == SDVOB) {
244                 cval = I915_READ(SDVOC);
245         } else {
246                 bval = I915_READ(SDVOB);
247         }
248         /*
249          * Write the registers twice for luck. Sometimes,
250          * writing them only once doesn't appear to 'stick'.
251          * The BIOS does this too. Yay, magic
252          */
253         for (i = 0; i < 2; i++)
254         {
255                 I915_WRITE(SDVOB, bval);
256                 I915_READ(SDVOB);
257                 I915_WRITE(SDVOC, cval);
258                 I915_READ(SDVOC);
259         }
260 }
261
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264         struct i2c_msg msgs[] = {
265                 {
266                         .addr = intel_sdvo->slave_addr,
267                         .flags = 0,
268                         .len = 1,
269                         .buf = &addr,
270                 },
271                 {
272                         .addr = intel_sdvo->slave_addr,
273                         .flags = I2C_M_RD,
274                         .len = 1,
275                         .buf = ch,
276                 }
277         };
278         int ret;
279
280         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281                 return true;
282
283         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284         return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290         u8 cmd;
291         const char *name;
292 } sdvo_cmd_names[] = {
293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337         /* Add the op code for SDVO enhancements */
338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383         /* HDMI op code */
384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
407
408 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
409                                    const void *args, int args_len)
410 {
411         int i;
412
413         DRM_DEBUG_KMS("%s: W: %02X ",
414                                 SDVO_NAME(intel_sdvo), cmd);
415         for (i = 0; i < args_len; i++)
416                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
417         for (; i < 8; i++)
418                 DRM_LOG_KMS("   ");
419         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
420                 if (cmd == sdvo_cmd_names[i].cmd) {
421                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
422                         break;
423                 }
424         }
425         if (i == ARRAY_SIZE(sdvo_cmd_names))
426                 DRM_LOG_KMS("(%02X)", cmd);
427         DRM_LOG_KMS("\n");
428 }
429
430 static const char *cmd_status_names[] = {
431         "Power on",
432         "Success",
433         "Not supported",
434         "Invalid arg",
435         "Pending",
436         "Target not specified",
437         "Scaling not supported"
438 };
439
440 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441                                  const void *args, int args_len)
442 {
443         u8 *buf, status;
444         struct i2c_msg *msgs;
445         int i, ret = true;
446
447         buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
448         if (!buf)
449                 return false;
450
451         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
452         if (!msgs)
453                 return false;
454
455         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
456
457         for (i = 0; i < args_len; i++) {
458                 msgs[i].addr = intel_sdvo->slave_addr;
459                 msgs[i].flags = 0;
460                 msgs[i].len = 2;
461                 msgs[i].buf = buf + 2 *i;
462                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
463                 buf[2*i + 1] = ((u8*)args)[i];
464         }
465         msgs[i].addr = intel_sdvo->slave_addr;
466         msgs[i].flags = 0;
467         msgs[i].len = 2;
468         msgs[i].buf = buf + 2*i;
469         buf[2*i + 0] = SDVO_I2C_OPCODE;
470         buf[2*i + 1] = cmd;
471
472         /* the following two are to read the response */
473         status = SDVO_I2C_CMD_STATUS;
474         msgs[i+1].addr = intel_sdvo->slave_addr;
475         msgs[i+1].flags = 0;
476         msgs[i+1].len = 1;
477         msgs[i+1].buf = &status;
478
479         msgs[i+2].addr = intel_sdvo->slave_addr;
480         msgs[i+2].flags = I2C_M_RD;
481         msgs[i+2].len = 1;
482         msgs[i+2].buf = &status;
483
484         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
485         if (ret < 0) {
486                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
487                 ret = false;
488                 goto out;
489         }
490         if (ret != i+3) {
491                 /* failure in I2C transfer */
492                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
493                 ret = false;
494         }
495
496 out:
497         kfree(msgs);
498         kfree(buf);
499         return ret;
500 }
501
502 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
503                                      void *response, int response_len)
504 {
505         u8 retry = 5;
506         u8 status;
507         int i;
508
509         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
510
511         /*
512          * The documentation states that all commands will be
513          * processed within 15µs, and that we need only poll
514          * the status byte a maximum of 3 times in order for the
515          * command to be complete.
516          *
517          * Check 5 times in case the hardware failed to read the docs.
518          */
519         if (!intel_sdvo_read_byte(intel_sdvo,
520                                   SDVO_I2C_CMD_STATUS,
521                                   &status))
522                 goto log_fail;
523
524         while (status == SDVO_CMD_STATUS_PENDING && retry--) {
525                 udelay(15);
526                 if (!intel_sdvo_read_byte(intel_sdvo,
527                                           SDVO_I2C_CMD_STATUS,
528                                           &status))
529                         goto log_fail;
530         }
531
532         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
533                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
534         else
535                 DRM_LOG_KMS("(??? %d)", status);
536
537         if (status != SDVO_CMD_STATUS_SUCCESS)
538                 goto log_fail;
539
540         /* Read the command response */
541         for (i = 0; i < response_len; i++) {
542                 if (!intel_sdvo_read_byte(intel_sdvo,
543                                           SDVO_I2C_RETURN_0 + i,
544                                           &((u8 *)response)[i]))
545                         goto log_fail;
546                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
547         }
548         DRM_LOG_KMS("\n");
549         return true;
550
551 log_fail:
552         DRM_LOG_KMS("... failed\n");
553         return false;
554 }
555
556 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
557 {
558         if (mode->clock >= 100000)
559                 return 1;
560         else if (mode->clock >= 50000)
561                 return 2;
562         else
563                 return 4;
564 }
565
566 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
567                                               u8 ddc_bus)
568 {
569         /* This must be the immediately preceding write before the i2c xfer */
570         return intel_sdvo_write_cmd(intel_sdvo,
571                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
572                                     &ddc_bus, 1);
573 }
574
575 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
576 {
577         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
578                 return false;
579
580         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
581 }
582
583 static bool
584 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
585 {
586         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
587                 return false;
588
589         return intel_sdvo_read_response(intel_sdvo, value, len);
590 }
591
592 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
593 {
594         struct intel_sdvo_set_target_input_args targets = {0};
595         return intel_sdvo_set_value(intel_sdvo,
596                                     SDVO_CMD_SET_TARGET_INPUT,
597                                     &targets, sizeof(targets));
598 }
599
600 /**
601  * Return whether each input is trained.
602  *
603  * This function is making an assumption about the layout of the response,
604  * which should be checked against the docs.
605  */
606 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
607 {
608         struct intel_sdvo_get_trained_inputs_response response;
609
610         BUILD_BUG_ON(sizeof(response) != 1);
611         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
612                                   &response, sizeof(response)))
613                 return false;
614
615         *input_1 = response.input0_trained;
616         *input_2 = response.input1_trained;
617         return true;
618 }
619
620 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
621                                           u16 outputs)
622 {
623         return intel_sdvo_set_value(intel_sdvo,
624                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
625                                     &outputs, sizeof(outputs));
626 }
627
628 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
629                                                int mode)
630 {
631         u8 state = SDVO_ENCODER_STATE_ON;
632
633         switch (mode) {
634         case DRM_MODE_DPMS_ON:
635                 state = SDVO_ENCODER_STATE_ON;
636                 break;
637         case DRM_MODE_DPMS_STANDBY:
638                 state = SDVO_ENCODER_STATE_STANDBY;
639                 break;
640         case DRM_MODE_DPMS_SUSPEND:
641                 state = SDVO_ENCODER_STATE_SUSPEND;
642                 break;
643         case DRM_MODE_DPMS_OFF:
644                 state = SDVO_ENCODER_STATE_OFF;
645                 break;
646         }
647
648         return intel_sdvo_set_value(intel_sdvo,
649                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
650 }
651
652 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
653                                                    int *clock_min,
654                                                    int *clock_max)
655 {
656         struct intel_sdvo_pixel_clock_range clocks;
657
658         BUILD_BUG_ON(sizeof(clocks) != 4);
659         if (!intel_sdvo_get_value(intel_sdvo,
660                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
661                                   &clocks, sizeof(clocks)))
662                 return false;
663
664         /* Convert the values from units of 10 kHz to kHz. */
665         *clock_min = clocks.min * 10;
666         *clock_max = clocks.max * 10;
667         return true;
668 }
669
670 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
671                                          u16 outputs)
672 {
673         return intel_sdvo_set_value(intel_sdvo,
674                                     SDVO_CMD_SET_TARGET_OUTPUT,
675                                     &outputs, sizeof(outputs));
676 }
677
678 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
679                                   struct intel_sdvo_dtd *dtd)
680 {
681         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
682                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
683 }
684
685 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
686                                          struct intel_sdvo_dtd *dtd)
687 {
688         return intel_sdvo_set_timing(intel_sdvo,
689                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
690 }
691
692 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
693                                          struct intel_sdvo_dtd *dtd)
694 {
695         return intel_sdvo_set_timing(intel_sdvo,
696                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
697 }
698
699 static bool
700 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
701                                          uint16_t clock,
702                                          uint16_t width,
703                                          uint16_t height)
704 {
705         struct intel_sdvo_preferred_input_timing_args args;
706
707         memset(&args, 0, sizeof(args));
708         args.clock = clock;
709         args.width = width;
710         args.height = height;
711         args.interlace = 0;
712
713         if (intel_sdvo->is_lvds &&
714            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
715             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
716                 args.scaled = 1;
717
718         return intel_sdvo_set_value(intel_sdvo,
719                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
720                                     &args, sizeof(args));
721 }
722
723 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
724                                                   struct intel_sdvo_dtd *dtd)
725 {
726         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
727         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
728         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
729                                     &dtd->part1, sizeof(dtd->part1)) &&
730                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
731                                      &dtd->part2, sizeof(dtd->part2));
732 }
733
734 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
735 {
736         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
737 }
738
739 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
740                                          const struct drm_display_mode *mode)
741 {
742         uint16_t width, height;
743         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
744         uint16_t h_sync_offset, v_sync_offset;
745         int mode_clock;
746
747         width = mode->hdisplay;
748         height = mode->vdisplay;
749
750         /* do some mode translations */
751         h_blank_len = mode->htotal - mode->hdisplay;
752         h_sync_len = mode->hsync_end - mode->hsync_start;
753
754         v_blank_len = mode->vtotal - mode->vdisplay;
755         v_sync_len = mode->vsync_end - mode->vsync_start;
756
757         h_sync_offset = mode->hsync_start - mode->hdisplay;
758         v_sync_offset = mode->vsync_start - mode->vdisplay;
759
760         mode_clock = mode->clock;
761         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
762         mode_clock /= 10;
763         dtd->part1.clock = mode_clock;
764
765         dtd->part1.h_active = width & 0xff;
766         dtd->part1.h_blank = h_blank_len & 0xff;
767         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
768                 ((h_blank_len >> 8) & 0xf);
769         dtd->part1.v_active = height & 0xff;
770         dtd->part1.v_blank = v_blank_len & 0xff;
771         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
772                 ((v_blank_len >> 8) & 0xf);
773
774         dtd->part2.h_sync_off = h_sync_offset & 0xff;
775         dtd->part2.h_sync_width = h_sync_len & 0xff;
776         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
777                 (v_sync_len & 0xf);
778         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
779                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
780                 ((v_sync_len & 0x30) >> 4);
781
782         dtd->part2.dtd_flags = 0x18;
783         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
784                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
785         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
786                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
787         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
788                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
789
790         dtd->part2.sdvo_flags = 0;
791         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
792         dtd->part2.reserved = 0;
793 }
794
795 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
796                                          const struct intel_sdvo_dtd *dtd)
797 {
798         mode->hdisplay = dtd->part1.h_active;
799         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
800         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
801         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
802         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
803         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
804         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
805         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
806
807         mode->vdisplay = dtd->part1.v_active;
808         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
809         mode->vsync_start = mode->vdisplay;
810         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
811         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
812         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
813         mode->vsync_end = mode->vsync_start +
814                 (dtd->part2.v_sync_off_width & 0xf);
815         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
816         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
817         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
818
819         mode->clock = dtd->part1.clock * 10;
820
821         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
822         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
823                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
824         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
825                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
826         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
827                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
828 }
829
830 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
831 {
832         struct intel_sdvo_encode encode;
833
834         BUILD_BUG_ON(sizeof(encode) != 2);
835         return intel_sdvo_get_value(intel_sdvo,
836                                   SDVO_CMD_GET_SUPP_ENCODE,
837                                   &encode, sizeof(encode));
838 }
839
840 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
841                                   uint8_t mode)
842 {
843         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
844 }
845
846 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
847                                        uint8_t mode)
848 {
849         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
850 }
851
852 #if 0
853 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
854 {
855         int i, j;
856         uint8_t set_buf_index[2];
857         uint8_t av_split;
858         uint8_t buf_size;
859         uint8_t buf[48];
860         uint8_t *pos;
861
862         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
863
864         for (i = 0; i <= av_split; i++) {
865                 set_buf_index[0] = i; set_buf_index[1] = 0;
866                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
867                                      set_buf_index, 2);
868                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
869                 intel_sdvo_read_response(encoder, &buf_size, 1);
870
871                 pos = buf;
872                 for (j = 0; j <= buf_size; j += 8) {
873                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
874                                              NULL, 0);
875                         intel_sdvo_read_response(encoder, pos, 8);
876                         pos += 8;
877                 }
878         }
879 }
880 #endif
881
882 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
883 {
884         struct dip_infoframe avi_if = {
885                 .type = DIP_TYPE_AVI,
886                 .ver = DIP_VERSION_AVI,
887                 .len = DIP_LEN_AVI,
888         };
889         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
890         uint8_t set_buf_index[2] = { 1, 0 };
891         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
892         uint64_t *data = (uint64_t *)sdvo_data;
893         unsigned i;
894
895         intel_dip_infoframe_csum(&avi_if);
896
897         /* sdvo spec says that the ecc is handled by the hw, and it looks like
898          * we must not send the ecc field, either. */
899         memcpy(sdvo_data, &avi_if, 3);
900         sdvo_data[3] = avi_if.checksum;
901         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
902
903         if (!intel_sdvo_set_value(intel_sdvo,
904                                   SDVO_CMD_SET_HBUF_INDEX,
905                                   set_buf_index, 2))
906                 return false;
907
908         for (i = 0; i < sizeof(sdvo_data); i += 8) {
909                 if (!intel_sdvo_set_value(intel_sdvo,
910                                           SDVO_CMD_SET_HBUF_DATA,
911                                           data, 8))
912                         return false;
913                 data++;
914         }
915
916         return intel_sdvo_set_value(intel_sdvo,
917                                     SDVO_CMD_SET_HBUF_TXRATE,
918                                     &tx_rate, 1);
919 }
920
921 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
922 {
923         struct intel_sdvo_tv_format format;
924         uint32_t format_map;
925
926         format_map = 1 << intel_sdvo->tv_format_index;
927         memset(&format, 0, sizeof(format));
928         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
929
930         BUILD_BUG_ON(sizeof(format) != 6);
931         return intel_sdvo_set_value(intel_sdvo,
932                                     SDVO_CMD_SET_TV_FORMAT,
933                                     &format, sizeof(format));
934 }
935
936 static bool
937 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
938                                         struct drm_display_mode *mode)
939 {
940         struct intel_sdvo_dtd output_dtd;
941
942         if (!intel_sdvo_set_target_output(intel_sdvo,
943                                           intel_sdvo->attached_output))
944                 return false;
945
946         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
947         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
948                 return false;
949
950         return true;
951 }
952
953 /* Asks the sdvo controller for the preferred input mode given the output mode.
954  * Unfortunately we have to set up the full output mode to do that. */
955 static bool
956 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
957                                     struct drm_display_mode *mode,
958                                     struct drm_display_mode *adjusted_mode)
959 {
960         struct intel_sdvo_dtd input_dtd;
961
962         /* Reset the input timing to the screen. Assume always input 0. */
963         if (!intel_sdvo_set_target_input(intel_sdvo))
964                 return false;
965
966         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
967                                                       mode->clock / 10,
968                                                       mode->hdisplay,
969                                                       mode->vdisplay))
970                 return false;
971
972         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
973                                                    &input_dtd))
974                 return false;
975
976         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
977
978         return true;
979 }
980
981 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
982                                   struct drm_display_mode *mode,
983                                   struct drm_display_mode *adjusted_mode)
984 {
985         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
986         int multiplier;
987
988         /* We need to construct preferred input timings based on our
989          * output timings.  To do that, we have to set the output
990          * timings, even though this isn't really the right place in
991          * the sequence to do it. Oh well.
992          */
993         if (intel_sdvo->is_tv) {
994                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
995                         return false;
996
997                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
998                                                            mode,
999                                                            adjusted_mode);
1000         } else if (intel_sdvo->is_lvds) {
1001                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1002                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1003                         return false;
1004
1005                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1006                                                            mode,
1007                                                            adjusted_mode);
1008         }
1009
1010         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1011          * SDVO device will factor out the multiplier during mode_set.
1012          */
1013         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1014         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1015
1016         return true;
1017 }
1018
1019 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1020                                 struct drm_display_mode *mode,
1021                                 struct drm_display_mode *adjusted_mode)
1022 {
1023         struct drm_device *dev = encoder->dev;
1024         struct drm_i915_private *dev_priv = dev->dev_private;
1025         struct drm_crtc *crtc = encoder->crtc;
1026         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1027         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1028         u32 sdvox;
1029         struct intel_sdvo_in_out_map in_out;
1030         struct intel_sdvo_dtd input_dtd, output_dtd;
1031         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1032         int rate;
1033
1034         if (!mode)
1035                 return;
1036
1037         /* First, set the input mapping for the first input to our controlled
1038          * output. This is only correct if we're a single-input device, in
1039          * which case the first input is the output from the appropriate SDVO
1040          * channel on the motherboard.  In a two-input device, the first input
1041          * will be SDVOB and the second SDVOC.
1042          */
1043         in_out.in0 = intel_sdvo->attached_output;
1044         in_out.in1 = 0;
1045
1046         intel_sdvo_set_value(intel_sdvo,
1047                              SDVO_CMD_SET_IN_OUT_MAP,
1048                              &in_out, sizeof(in_out));
1049
1050         /* Set the output timings to the screen */
1051         if (!intel_sdvo_set_target_output(intel_sdvo,
1052                                           intel_sdvo->attached_output))
1053                 return;
1054
1055         /* lvds has a special fixed output timing. */
1056         if (intel_sdvo->is_lvds)
1057                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1058                                              intel_sdvo->sdvo_lvds_fixed_mode);
1059         else
1060                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1061         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1062                 DRM_INFO("Setting output timings on %s failed\n",
1063                          SDVO_NAME(intel_sdvo));
1064
1065         /* Set the input timing to the screen. Assume always input 0. */
1066         if (!intel_sdvo_set_target_input(intel_sdvo))
1067                 return;
1068
1069         if (intel_sdvo->has_hdmi_monitor) {
1070                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1071                 intel_sdvo_set_colorimetry(intel_sdvo,
1072                                            SDVO_COLORIMETRY_RGB256);
1073                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1074         } else
1075                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1076
1077         if (intel_sdvo->is_tv &&
1078             !intel_sdvo_set_tv_format(intel_sdvo))
1079                 return;
1080
1081         /* We have tried to get input timing in mode_fixup, and filled into
1082          * adjusted_mode.
1083          */
1084         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1085         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1086                 DRM_INFO("Setting input timings on %s failed\n",
1087                          SDVO_NAME(intel_sdvo));
1088
1089         switch (pixel_multiplier) {
1090         default:
1091         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1092         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1093         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1094         }
1095         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1096                 return;
1097
1098         /* Set the SDVO control regs. */
1099         if (INTEL_INFO(dev)->gen >= 4) {
1100                 /* The real mode polarity is set by the SDVO commands, using
1101                  * struct intel_sdvo_dtd. */
1102                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1103                 if (intel_sdvo->is_hdmi)
1104                         sdvox |= intel_sdvo->color_range;
1105                 if (INTEL_INFO(dev)->gen < 5)
1106                         sdvox |= SDVO_BORDER_ENABLE;
1107         } else {
1108                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1109                 switch (intel_sdvo->sdvo_reg) {
1110                 case SDVOB:
1111                         sdvox &= SDVOB_PRESERVE_MASK;
1112                         break;
1113                 case SDVOC:
1114                         sdvox &= SDVOC_PRESERVE_MASK;
1115                         break;
1116                 }
1117                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1118         }
1119
1120         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1121                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1122         else
1123                 sdvox |= TRANSCODER(intel_crtc->pipe);
1124
1125         if (intel_sdvo->has_hdmi_audio)
1126                 sdvox |= SDVO_AUDIO_ENABLE;
1127
1128         if (INTEL_INFO(dev)->gen >= 4) {
1129                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1130         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1131                 /* done in crtc_mode_set as it lives inside the dpll register */
1132         } else {
1133                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1134         }
1135
1136         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1137             INTEL_INFO(dev)->gen < 5)
1138                 sdvox |= SDVO_STALL_SELECT;
1139         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1140 }
1141
1142 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1143 {
1144         struct drm_device *dev = encoder->dev;
1145         struct drm_i915_private *dev_priv = dev->dev_private;
1146         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1147         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1148         u32 temp;
1149
1150         if (mode != DRM_MODE_DPMS_ON) {
1151                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1152                 if (0)
1153                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1154
1155                 if (mode == DRM_MODE_DPMS_OFF) {
1156                         temp = I915_READ(intel_sdvo->sdvo_reg);
1157                         if ((temp & SDVO_ENABLE) != 0) {
1158                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1159                         }
1160                 }
1161         } else {
1162                 bool input1, input2;
1163                 int i;
1164                 u8 status;
1165
1166                 temp = I915_READ(intel_sdvo->sdvo_reg);
1167                 if ((temp & SDVO_ENABLE) == 0)
1168                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1169                 for (i = 0; i < 2; i++)
1170                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1171
1172                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1173                 /* Warn if the device reported failure to sync.
1174                  * A lot of SDVO devices fail to notify of sync, but it's
1175                  * a given it the status is a success, we succeeded.
1176                  */
1177                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1178                         DRM_DEBUG_KMS("First %s output reported failure to "
1179                                         "sync\n", SDVO_NAME(intel_sdvo));
1180                 }
1181
1182                 if (0)
1183                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1184                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1185         }
1186         return;
1187 }
1188
1189 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1190                                  struct drm_display_mode *mode)
1191 {
1192         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1193
1194         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1195                 return MODE_NO_DBLESCAN;
1196
1197         if (intel_sdvo->pixel_clock_min > mode->clock)
1198                 return MODE_CLOCK_LOW;
1199
1200         if (intel_sdvo->pixel_clock_max < mode->clock)
1201                 return MODE_CLOCK_HIGH;
1202
1203         if (intel_sdvo->is_lvds) {
1204                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1205                         return MODE_PANEL;
1206
1207                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1208                         return MODE_PANEL;
1209         }
1210
1211         return MODE_OK;
1212 }
1213
1214 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1215 {
1216         BUILD_BUG_ON(sizeof(*caps) != 8);
1217         if (!intel_sdvo_get_value(intel_sdvo,
1218                                   SDVO_CMD_GET_DEVICE_CAPS,
1219                                   caps, sizeof(*caps)))
1220                 return false;
1221
1222         DRM_DEBUG_KMS("SDVO capabilities:\n"
1223                       "  vendor_id: %d\n"
1224                       "  device_id: %d\n"
1225                       "  device_rev_id: %d\n"
1226                       "  sdvo_version_major: %d\n"
1227                       "  sdvo_version_minor: %d\n"
1228                       "  sdvo_inputs_mask: %d\n"
1229                       "  smooth_scaling: %d\n"
1230                       "  sharp_scaling: %d\n"
1231                       "  up_scaling: %d\n"
1232                       "  down_scaling: %d\n"
1233                       "  stall_support: %d\n"
1234                       "  output_flags: %d\n",
1235                       caps->vendor_id,
1236                       caps->device_id,
1237                       caps->device_rev_id,
1238                       caps->sdvo_version_major,
1239                       caps->sdvo_version_minor,
1240                       caps->sdvo_inputs_mask,
1241                       caps->smooth_scaling,
1242                       caps->sharp_scaling,
1243                       caps->up_scaling,
1244                       caps->down_scaling,
1245                       caps->stall_support,
1246                       caps->output_flags);
1247
1248         return true;
1249 }
1250
1251 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1252 {
1253         struct drm_device *dev = intel_sdvo->base.base.dev;
1254         u8 response[2];
1255
1256         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1257          * on the line. */
1258         if (IS_I945G(dev) || IS_I945GM(dev))
1259                 return false;
1260
1261         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1262                                     &response, 2) && response[0];
1263 }
1264
1265 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1266 {
1267         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1268
1269         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1270 }
1271
1272 static bool
1273 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1274 {
1275         /* Is there more than one type of output? */
1276         return hweight16(intel_sdvo->caps.output_flags) > 1;
1277 }
1278
1279 static struct edid *
1280 intel_sdvo_get_edid(struct drm_connector *connector)
1281 {
1282         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1283         return drm_get_edid(connector, &sdvo->ddc);
1284 }
1285
1286 /* Mac mini hack -- use the same DDC as the analog connector */
1287 static struct edid *
1288 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1289 {
1290         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1291
1292         return drm_get_edid(connector,
1293                             intel_gmbus_get_adapter(dev_priv,
1294                                                     dev_priv->crt_ddc_pin));
1295 }
1296
1297 static enum drm_connector_status
1298 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1299 {
1300         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1301         enum drm_connector_status status;
1302         struct edid *edid;
1303
1304         edid = intel_sdvo_get_edid(connector);
1305
1306         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1307                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1308
1309                 /*
1310                  * Don't use the 1 as the argument of DDC bus switch to get
1311                  * the EDID. It is used for SDVO SPD ROM.
1312                  */
1313                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1314                         intel_sdvo->ddc_bus = ddc;
1315                         edid = intel_sdvo_get_edid(connector);
1316                         if (edid)
1317                                 break;
1318                 }
1319                 /*
1320                  * If we found the EDID on the other bus,
1321                  * assume that is the correct DDC bus.
1322                  */
1323                 if (edid == NULL)
1324                         intel_sdvo->ddc_bus = saved_ddc;
1325         }
1326
1327         /*
1328          * When there is no edid and no monitor is connected with VGA
1329          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1330          */
1331         if (edid == NULL)
1332                 edid = intel_sdvo_get_analog_edid(connector);
1333
1334         status = connector_status_unknown;
1335         if (edid != NULL) {
1336                 /* DDC bus is shared, match EDID to connector type */
1337                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1338                         status = connector_status_connected;
1339                         if (intel_sdvo->is_hdmi) {
1340                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1341                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1342                         }
1343                 } else
1344                         status = connector_status_disconnected;
1345                 connector->display_info.raw_edid = NULL;
1346                 kfree(edid);
1347         }
1348
1349         if (status == connector_status_connected) {
1350                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1351                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1352                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1353         }
1354
1355         return status;
1356 }
1357
1358 static bool
1359 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1360                                   struct edid *edid)
1361 {
1362         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1363         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1364
1365         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1366                       connector_is_digital, monitor_is_digital);
1367         return connector_is_digital == monitor_is_digital;
1368 }
1369
1370 static enum drm_connector_status
1371 intel_sdvo_detect(struct drm_connector *connector, bool force)
1372 {
1373         uint16_t response;
1374         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1375         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1376         enum drm_connector_status ret;
1377
1378         if (!intel_sdvo_write_cmd(intel_sdvo,
1379                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1380                 return connector_status_unknown;
1381
1382         /* add 30ms delay when the output type might be TV */
1383         if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1384                 msleep(30);
1385
1386         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1387                 return connector_status_unknown;
1388
1389         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1390                       response & 0xff, response >> 8,
1391                       intel_sdvo_connector->output_flag);
1392
1393         if (response == 0)
1394                 return connector_status_disconnected;
1395
1396         intel_sdvo->attached_output = response;
1397
1398         intel_sdvo->has_hdmi_monitor = false;
1399         intel_sdvo->has_hdmi_audio = false;
1400
1401         if ((intel_sdvo_connector->output_flag & response) == 0)
1402                 ret = connector_status_disconnected;
1403         else if (IS_TMDS(intel_sdvo_connector))
1404                 ret = intel_sdvo_tmds_sink_detect(connector);
1405         else {
1406                 struct edid *edid;
1407
1408                 /* if we have an edid check it matches the connection */
1409                 edid = intel_sdvo_get_edid(connector);
1410                 if (edid == NULL)
1411                         edid = intel_sdvo_get_analog_edid(connector);
1412                 if (edid != NULL) {
1413                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1414                                                               edid))
1415                                 ret = connector_status_connected;
1416                         else
1417                                 ret = connector_status_disconnected;
1418
1419                         connector->display_info.raw_edid = NULL;
1420                         kfree(edid);
1421                 } else
1422                         ret = connector_status_connected;
1423         }
1424
1425         /* May update encoder flag for like clock for SDVO TV, etc.*/
1426         if (ret == connector_status_connected) {
1427                 intel_sdvo->is_tv = false;
1428                 intel_sdvo->is_lvds = false;
1429                 intel_sdvo->base.needs_tv_clock = false;
1430
1431                 if (response & SDVO_TV_MASK) {
1432                         intel_sdvo->is_tv = true;
1433                         intel_sdvo->base.needs_tv_clock = true;
1434                 }
1435                 if (response & SDVO_LVDS_MASK)
1436                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1437         }
1438
1439         return ret;
1440 }
1441
1442 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1443 {
1444         struct edid *edid;
1445
1446         /* set the bus switch and get the modes */
1447         edid = intel_sdvo_get_edid(connector);
1448
1449         /*
1450          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1451          * link between analog and digital outputs. So, if the regular SDVO
1452          * DDC fails, check to see if the analog output is disconnected, in
1453          * which case we'll look there for the digital DDC data.
1454          */
1455         if (edid == NULL)
1456                 edid = intel_sdvo_get_analog_edid(connector);
1457
1458         if (edid != NULL) {
1459                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1460                                                       edid)) {
1461                         drm_mode_connector_update_edid_property(connector, edid);
1462                         drm_add_edid_modes(connector, edid);
1463                 }
1464
1465                 connector->display_info.raw_edid = NULL;
1466                 kfree(edid);
1467         }
1468 }
1469
1470 /*
1471  * Set of SDVO TV modes.
1472  * Note!  This is in reply order (see loop in get_tv_modes).
1473  * XXX: all 60Hz refresh?
1474  */
1475 static const struct drm_display_mode sdvo_tv_modes[] = {
1476         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1477                    416, 0, 200, 201, 232, 233, 0,
1478                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1480                    416, 0, 240, 241, 272, 273, 0,
1481                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1483                    496, 0, 300, 301, 332, 333, 0,
1484                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1486                    736, 0, 350, 351, 382, 383, 0,
1487                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1489                    736, 0, 400, 401, 432, 433, 0,
1490                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1492                    736, 0, 480, 481, 512, 513, 0,
1493                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1495                    800, 0, 480, 481, 512, 513, 0,
1496                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1498                    800, 0, 576, 577, 608, 609, 0,
1499                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1501                    816, 0, 350, 351, 382, 383, 0,
1502                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1504                    816, 0, 400, 401, 432, 433, 0,
1505                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1507                    816, 0, 480, 481, 512, 513, 0,
1508                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1510                    816, 0, 540, 541, 572, 573, 0,
1511                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1513                    816, 0, 576, 577, 608, 609, 0,
1514                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1516                    864, 0, 576, 577, 608, 609, 0,
1517                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1519                    896, 0, 600, 601, 632, 633, 0,
1520                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1522                    928, 0, 624, 625, 656, 657, 0,
1523                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1525                    1016, 0, 766, 767, 798, 799, 0,
1526                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1527         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1528                    1120, 0, 768, 769, 800, 801, 0,
1529                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1530         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1531                    1376, 0, 1024, 1025, 1056, 1057, 0,
1532                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1533 };
1534
1535 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1536 {
1537         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1538         struct intel_sdvo_sdtv_resolution_request tv_res;
1539         uint32_t reply = 0, format_map = 0;
1540         int i;
1541
1542         /* Read the list of supported input resolutions for the selected TV
1543          * format.
1544          */
1545         format_map = 1 << intel_sdvo->tv_format_index;
1546         memcpy(&tv_res, &format_map,
1547                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1548
1549         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1550                 return;
1551
1552         BUILD_BUG_ON(sizeof(tv_res) != 3);
1553         if (!intel_sdvo_write_cmd(intel_sdvo,
1554                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1555                                   &tv_res, sizeof(tv_res)))
1556                 return;
1557         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1558                 return;
1559
1560         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1561                 if (reply & (1 << i)) {
1562                         struct drm_display_mode *nmode;
1563                         nmode = drm_mode_duplicate(connector->dev,
1564                                                    &sdvo_tv_modes[i]);
1565                         if (nmode)
1566                                 drm_mode_probed_add(connector, nmode);
1567                 }
1568 }
1569
1570 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1571 {
1572         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1573         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1574         struct drm_display_mode *newmode;
1575
1576         /*
1577          * Attempt to get the mode list from DDC.
1578          * Assume that the preferred modes are
1579          * arranged in priority order.
1580          */
1581         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1582         if (list_empty(&connector->probed_modes) == false)
1583                 goto end;
1584
1585         /* Fetch modes from VBT */
1586         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1587                 newmode = drm_mode_duplicate(connector->dev,
1588                                              dev_priv->sdvo_lvds_vbt_mode);
1589                 if (newmode != NULL) {
1590                         /* Guarantee the mode is preferred */
1591                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1592                                          DRM_MODE_TYPE_DRIVER);
1593                         drm_mode_probed_add(connector, newmode);
1594                 }
1595         }
1596
1597 end:
1598         list_for_each_entry(newmode, &connector->probed_modes, head) {
1599                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1600                         intel_sdvo->sdvo_lvds_fixed_mode =
1601                                 drm_mode_duplicate(connector->dev, newmode);
1602
1603                         intel_sdvo->is_lvds = true;
1604                         break;
1605                 }
1606         }
1607
1608 }
1609
1610 static int intel_sdvo_get_modes(struct drm_connector *connector)
1611 {
1612         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1613
1614         if (IS_TV(intel_sdvo_connector))
1615                 intel_sdvo_get_tv_modes(connector);
1616         else if (IS_LVDS(intel_sdvo_connector))
1617                 intel_sdvo_get_lvds_modes(connector);
1618         else
1619                 intel_sdvo_get_ddc_modes(connector);
1620
1621         return !list_empty(&connector->probed_modes);
1622 }
1623
1624 static void
1625 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1626 {
1627         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1628         struct drm_device *dev = connector->dev;
1629
1630         if (intel_sdvo_connector->left)
1631                 drm_property_destroy(dev, intel_sdvo_connector->left);
1632         if (intel_sdvo_connector->right)
1633                 drm_property_destroy(dev, intel_sdvo_connector->right);
1634         if (intel_sdvo_connector->top)
1635                 drm_property_destroy(dev, intel_sdvo_connector->top);
1636         if (intel_sdvo_connector->bottom)
1637                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1638         if (intel_sdvo_connector->hpos)
1639                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1640         if (intel_sdvo_connector->vpos)
1641                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1642         if (intel_sdvo_connector->saturation)
1643                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1644         if (intel_sdvo_connector->contrast)
1645                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1646         if (intel_sdvo_connector->hue)
1647                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1648         if (intel_sdvo_connector->sharpness)
1649                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1650         if (intel_sdvo_connector->flicker_filter)
1651                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1652         if (intel_sdvo_connector->flicker_filter_2d)
1653                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1654         if (intel_sdvo_connector->flicker_filter_adaptive)
1655                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1656         if (intel_sdvo_connector->tv_luma_filter)
1657                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1658         if (intel_sdvo_connector->tv_chroma_filter)
1659                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1660         if (intel_sdvo_connector->dot_crawl)
1661                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1662         if (intel_sdvo_connector->brightness)
1663                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1664 }
1665
1666 static void intel_sdvo_destroy(struct drm_connector *connector)
1667 {
1668         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1669
1670         if (intel_sdvo_connector->tv_format)
1671                 drm_property_destroy(connector->dev,
1672                                      intel_sdvo_connector->tv_format);
1673
1674         intel_sdvo_destroy_enhance_property(connector);
1675         drm_sysfs_connector_remove(connector);
1676         drm_connector_cleanup(connector);
1677         kfree(connector);
1678 }
1679
1680 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1681 {
1682         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1683         struct edid *edid;
1684         bool has_audio = false;
1685
1686         if (!intel_sdvo->is_hdmi)
1687                 return false;
1688
1689         edid = intel_sdvo_get_edid(connector);
1690         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1691                 has_audio = drm_detect_monitor_audio(edid);
1692
1693         return has_audio;
1694 }
1695
1696 static int
1697 intel_sdvo_set_property(struct drm_connector *connector,
1698                         struct drm_property *property,
1699                         uint64_t val)
1700 {
1701         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1702         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1703         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1704         uint16_t temp_value;
1705         uint8_t cmd;
1706         int ret;
1707
1708         ret = drm_connector_property_set_value(connector, property, val);
1709         if (ret)
1710                 return ret;
1711
1712         if (property == dev_priv->force_audio_property) {
1713                 int i = val;
1714                 bool has_audio;
1715
1716                 if (i == intel_sdvo_connector->force_audio)
1717                         return 0;
1718
1719                 intel_sdvo_connector->force_audio = i;
1720
1721                 if (i == HDMI_AUDIO_AUTO)
1722                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1723                 else
1724                         has_audio = (i == HDMI_AUDIO_ON);
1725
1726                 if (has_audio == intel_sdvo->has_hdmi_audio)
1727                         return 0;
1728
1729                 intel_sdvo->has_hdmi_audio = has_audio;
1730                 goto done;
1731         }
1732
1733         if (property == dev_priv->broadcast_rgb_property) {
1734                 if (val == !!intel_sdvo->color_range)
1735                         return 0;
1736
1737                 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1738                 goto done;
1739         }
1740
1741 #define CHECK_PROPERTY(name, NAME) \
1742         if (intel_sdvo_connector->name == property) { \
1743                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1744                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1745                 cmd = SDVO_CMD_SET_##NAME; \
1746                 intel_sdvo_connector->cur_##name = temp_value; \
1747                 goto set_value; \
1748         }
1749
1750         if (property == intel_sdvo_connector->tv_format) {
1751                 if (val >= TV_FORMAT_NUM)
1752                         return -EINVAL;
1753
1754                 if (intel_sdvo->tv_format_index ==
1755                     intel_sdvo_connector->tv_format_supported[val])
1756                         return 0;
1757
1758                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1759                 goto done;
1760         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1761                 temp_value = val;
1762                 if (intel_sdvo_connector->left == property) {
1763                         drm_connector_property_set_value(connector,
1764                                                          intel_sdvo_connector->right, val);
1765                         if (intel_sdvo_connector->left_margin == temp_value)
1766                                 return 0;
1767
1768                         intel_sdvo_connector->left_margin = temp_value;
1769                         intel_sdvo_connector->right_margin = temp_value;
1770                         temp_value = intel_sdvo_connector->max_hscan -
1771                                 intel_sdvo_connector->left_margin;
1772                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1773                         goto set_value;
1774                 } else if (intel_sdvo_connector->right == property) {
1775                         drm_connector_property_set_value(connector,
1776                                                          intel_sdvo_connector->left, val);
1777                         if (intel_sdvo_connector->right_margin == temp_value)
1778                                 return 0;
1779
1780                         intel_sdvo_connector->left_margin = temp_value;
1781                         intel_sdvo_connector->right_margin = temp_value;
1782                         temp_value = intel_sdvo_connector->max_hscan -
1783                                 intel_sdvo_connector->left_margin;
1784                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1785                         goto set_value;
1786                 } else if (intel_sdvo_connector->top == property) {
1787                         drm_connector_property_set_value(connector,
1788                                                          intel_sdvo_connector->bottom, val);
1789                         if (intel_sdvo_connector->top_margin == temp_value)
1790                                 return 0;
1791
1792                         intel_sdvo_connector->top_margin = temp_value;
1793                         intel_sdvo_connector->bottom_margin = temp_value;
1794                         temp_value = intel_sdvo_connector->max_vscan -
1795                                 intel_sdvo_connector->top_margin;
1796                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1797                         goto set_value;
1798                 } else if (intel_sdvo_connector->bottom == property) {
1799                         drm_connector_property_set_value(connector,
1800                                                          intel_sdvo_connector->top, val);
1801                         if (intel_sdvo_connector->bottom_margin == temp_value)
1802                                 return 0;
1803
1804                         intel_sdvo_connector->top_margin = temp_value;
1805                         intel_sdvo_connector->bottom_margin = temp_value;
1806                         temp_value = intel_sdvo_connector->max_vscan -
1807                                 intel_sdvo_connector->top_margin;
1808                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1809                         goto set_value;
1810                 }
1811                 CHECK_PROPERTY(hpos, HPOS)
1812                 CHECK_PROPERTY(vpos, VPOS)
1813                 CHECK_PROPERTY(saturation, SATURATION)
1814                 CHECK_PROPERTY(contrast, CONTRAST)
1815                 CHECK_PROPERTY(hue, HUE)
1816                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1817                 CHECK_PROPERTY(sharpness, SHARPNESS)
1818                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1819                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1820                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1821                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1822                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1823                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1824         }
1825
1826         return -EINVAL; /* unknown property */
1827
1828 set_value:
1829         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1830                 return -EIO;
1831
1832
1833 done:
1834         if (intel_sdvo->base.base.crtc) {
1835                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1836                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1837                                          crtc->y, crtc->fb);
1838         }
1839
1840         return 0;
1841 #undef CHECK_PROPERTY
1842 }
1843
1844 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1845         .dpms = intel_sdvo_dpms,
1846         .mode_fixup = intel_sdvo_mode_fixup,
1847         .prepare = intel_encoder_prepare,
1848         .mode_set = intel_sdvo_mode_set,
1849         .commit = intel_encoder_commit,
1850 };
1851
1852 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1853         .dpms = drm_helper_connector_dpms,
1854         .detect = intel_sdvo_detect,
1855         .fill_modes = drm_helper_probe_single_connector_modes,
1856         .set_property = intel_sdvo_set_property,
1857         .destroy = intel_sdvo_destroy,
1858 };
1859
1860 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1861         .get_modes = intel_sdvo_get_modes,
1862         .mode_valid = intel_sdvo_mode_valid,
1863         .best_encoder = intel_best_encoder,
1864 };
1865
1866 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1867 {
1868         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1869
1870         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1871                 drm_mode_destroy(encoder->dev,
1872                                  intel_sdvo->sdvo_lvds_fixed_mode);
1873
1874         i2c_del_adapter(&intel_sdvo->ddc);
1875         intel_encoder_destroy(encoder);
1876 }
1877
1878 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1879         .destroy = intel_sdvo_enc_destroy,
1880 };
1881
1882 static void
1883 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1884 {
1885         uint16_t mask = 0;
1886         unsigned int num_bits;
1887
1888         /* Make a mask of outputs less than or equal to our own priority in the
1889          * list.
1890          */
1891         switch (sdvo->controlled_output) {
1892         case SDVO_OUTPUT_LVDS1:
1893                 mask |= SDVO_OUTPUT_LVDS1;
1894         case SDVO_OUTPUT_LVDS0:
1895                 mask |= SDVO_OUTPUT_LVDS0;
1896         case SDVO_OUTPUT_TMDS1:
1897                 mask |= SDVO_OUTPUT_TMDS1;
1898         case SDVO_OUTPUT_TMDS0:
1899                 mask |= SDVO_OUTPUT_TMDS0;
1900         case SDVO_OUTPUT_RGB1:
1901                 mask |= SDVO_OUTPUT_RGB1;
1902         case SDVO_OUTPUT_RGB0:
1903                 mask |= SDVO_OUTPUT_RGB0;
1904                 break;
1905         }
1906
1907         /* Count bits to find what number we are in the priority list. */
1908         mask &= sdvo->caps.output_flags;
1909         num_bits = hweight16(mask);
1910         /* If more than 3 outputs, default to DDC bus 3 for now. */
1911         if (num_bits > 3)
1912                 num_bits = 3;
1913
1914         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1915         sdvo->ddc_bus = 1 << num_bits;
1916 }
1917
1918 /**
1919  * Choose the appropriate DDC bus for control bus switch command for this
1920  * SDVO output based on the controlled output.
1921  *
1922  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1923  * outputs, then LVDS outputs.
1924  */
1925 static void
1926 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1927                           struct intel_sdvo *sdvo, u32 reg)
1928 {
1929         struct sdvo_device_mapping *mapping;
1930
1931         if (sdvo->is_sdvob)
1932                 mapping = &(dev_priv->sdvo_mappings[0]);
1933         else
1934                 mapping = &(dev_priv->sdvo_mappings[1]);
1935
1936         if (mapping->initialized)
1937                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1938         else
1939                 intel_sdvo_guess_ddc_bus(sdvo);
1940 }
1941
1942 static void
1943 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1944                           struct intel_sdvo *sdvo, u32 reg)
1945 {
1946         struct sdvo_device_mapping *mapping;
1947         u8 pin;
1948
1949         if (sdvo->is_sdvob)
1950                 mapping = &dev_priv->sdvo_mappings[0];
1951         else
1952                 mapping = &dev_priv->sdvo_mappings[1];
1953
1954         pin = GMBUS_PORT_DPB;
1955         if (mapping->initialized)
1956                 pin = mapping->i2c_pin;
1957
1958         if (intel_gmbus_is_port_valid(pin)) {
1959                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1960                 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1961                 intel_gmbus_force_bit(sdvo->i2c, true);
1962         } else {
1963                 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1964         }
1965 }
1966
1967 static bool
1968 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1969 {
1970         return intel_sdvo_check_supp_encode(intel_sdvo);
1971 }
1972
1973 static u8
1974 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1975 {
1976         struct drm_i915_private *dev_priv = dev->dev_private;
1977         struct sdvo_device_mapping *my_mapping, *other_mapping;
1978
1979         if (sdvo->is_sdvob) {
1980                 my_mapping = &dev_priv->sdvo_mappings[0];
1981                 other_mapping = &dev_priv->sdvo_mappings[1];
1982         } else {
1983                 my_mapping = &dev_priv->sdvo_mappings[1];
1984                 other_mapping = &dev_priv->sdvo_mappings[0];
1985         }
1986
1987         /* If the BIOS described our SDVO device, take advantage of it. */
1988         if (my_mapping->slave_addr)
1989                 return my_mapping->slave_addr;
1990
1991         /* If the BIOS only described a different SDVO device, use the
1992          * address that it isn't using.
1993          */
1994         if (other_mapping->slave_addr) {
1995                 if (other_mapping->slave_addr == 0x70)
1996                         return 0x72;
1997                 else
1998                         return 0x70;
1999         }
2000
2001         /* No SDVO device info is found for another DVO port,
2002          * so use mapping assumption we had before BIOS parsing.
2003          */
2004         if (sdvo->is_sdvob)
2005                 return 0x70;
2006         else
2007                 return 0x72;
2008 }
2009
2010 static void
2011 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2012                           struct intel_sdvo *encoder)
2013 {
2014         drm_connector_init(encoder->base.base.dev,
2015                            &connector->base.base,
2016                            &intel_sdvo_connector_funcs,
2017                            connector->base.base.connector_type);
2018
2019         drm_connector_helper_add(&connector->base.base,
2020                                  &intel_sdvo_connector_helper_funcs);
2021
2022         connector->base.base.interlace_allowed = 1;
2023         connector->base.base.doublescan_allowed = 0;
2024         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2025
2026         intel_connector_attach_encoder(&connector->base, &encoder->base);
2027         drm_sysfs_connector_add(&connector->base.base);
2028 }
2029
2030 static void
2031 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2032 {
2033         struct drm_device *dev = connector->base.base.dev;
2034
2035         intel_attach_force_audio_property(&connector->base.base);
2036         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2037                 intel_attach_broadcast_rgb_property(&connector->base.base);
2038 }
2039
2040 static bool
2041 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2042 {
2043         struct drm_encoder *encoder = &intel_sdvo->base.base;
2044         struct drm_connector *connector;
2045         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2046         struct intel_connector *intel_connector;
2047         struct intel_sdvo_connector *intel_sdvo_connector;
2048
2049         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2050         if (!intel_sdvo_connector)
2051                 return false;
2052
2053         if (device == 0) {
2054                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2055                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2056         } else if (device == 1) {
2057                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2058                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2059         }
2060
2061         intel_connector = &intel_sdvo_connector->base;
2062         connector = &intel_connector->base;
2063         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2064                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2065                 intel_sdvo->hotplug_active[0] |= 1 << device;
2066                 /* Some SDVO devices have one-shot hotplug interrupts.
2067                  * Ensure that they get re-enabled when an interrupt happens.
2068                  */
2069                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2070                 intel_sdvo_enable_hotplug(intel_encoder);
2071         }
2072         else
2073                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2074         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2075         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2076
2077         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2078                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2079                 intel_sdvo->is_hdmi = true;
2080         }
2081         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2082                                        (1 << INTEL_ANALOG_CLONE_BIT));
2083
2084         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2085         if (intel_sdvo->is_hdmi)
2086                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2087
2088         return true;
2089 }
2090
2091 static bool
2092 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2093 {
2094         struct drm_encoder *encoder = &intel_sdvo->base.base;
2095         struct drm_connector *connector;
2096         struct intel_connector *intel_connector;
2097         struct intel_sdvo_connector *intel_sdvo_connector;
2098
2099         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2100         if (!intel_sdvo_connector)
2101                 return false;
2102
2103         intel_connector = &intel_sdvo_connector->base;
2104         connector = &intel_connector->base;
2105         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2106         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2107
2108         intel_sdvo->controlled_output |= type;
2109         intel_sdvo_connector->output_flag = type;
2110
2111         intel_sdvo->is_tv = true;
2112         intel_sdvo->base.needs_tv_clock = true;
2113         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2114
2115         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2116
2117         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2118                 goto err;
2119
2120         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2121                 goto err;
2122
2123         return true;
2124
2125 err:
2126         intel_sdvo_destroy(connector);
2127         return false;
2128 }
2129
2130 static bool
2131 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2132 {
2133         struct drm_encoder *encoder = &intel_sdvo->base.base;
2134         struct drm_connector *connector;
2135         struct intel_connector *intel_connector;
2136         struct intel_sdvo_connector *intel_sdvo_connector;
2137
2138         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2139         if (!intel_sdvo_connector)
2140                 return false;
2141
2142         intel_connector = &intel_sdvo_connector->base;
2143         connector = &intel_connector->base;
2144         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2145         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2146         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2147
2148         if (device == 0) {
2149                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2150                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2151         } else if (device == 1) {
2152                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2153                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2154         }
2155
2156         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2157                                        (1 << INTEL_ANALOG_CLONE_BIT));
2158
2159         intel_sdvo_connector_init(intel_sdvo_connector,
2160                                   intel_sdvo);
2161         return true;
2162 }
2163
2164 static bool
2165 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2166 {
2167         struct drm_encoder *encoder = &intel_sdvo->base.base;
2168         struct drm_connector *connector;
2169         struct intel_connector *intel_connector;
2170         struct intel_sdvo_connector *intel_sdvo_connector;
2171
2172         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2173         if (!intel_sdvo_connector)
2174                 return false;
2175
2176         intel_connector = &intel_sdvo_connector->base;
2177         connector = &intel_connector->base;
2178         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2179         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2180
2181         if (device == 0) {
2182                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2183                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2184         } else if (device == 1) {
2185                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2186                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2187         }
2188
2189         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2190                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2191
2192         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2193         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2194                 goto err;
2195
2196         return true;
2197
2198 err:
2199         intel_sdvo_destroy(connector);
2200         return false;
2201 }
2202
2203 static bool
2204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2205 {
2206         intel_sdvo->is_tv = false;
2207         intel_sdvo->base.needs_tv_clock = false;
2208         intel_sdvo->is_lvds = false;
2209
2210         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2211
2212         if (flags & SDVO_OUTPUT_TMDS0)
2213                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2214                         return false;
2215
2216         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2217                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2218                         return false;
2219
2220         /* TV has no XXX1 function block */
2221         if (flags & SDVO_OUTPUT_SVID0)
2222                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2223                         return false;
2224
2225         if (flags & SDVO_OUTPUT_CVBS0)
2226                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2227                         return false;
2228
2229         if (flags & SDVO_OUTPUT_YPRPB0)
2230                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2231                         return false;
2232
2233         if (flags & SDVO_OUTPUT_RGB0)
2234                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2235                         return false;
2236
2237         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2238                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2239                         return false;
2240
2241         if (flags & SDVO_OUTPUT_LVDS0)
2242                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2243                         return false;
2244
2245         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2246                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2247                         return false;
2248
2249         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2250                 unsigned char bytes[2];
2251
2252                 intel_sdvo->controlled_output = 0;
2253                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2254                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2255                               SDVO_NAME(intel_sdvo),
2256                               bytes[0], bytes[1]);
2257                 return false;
2258         }
2259         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2260
2261         return true;
2262 }
2263
2264 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2265                                           struct intel_sdvo_connector *intel_sdvo_connector,
2266                                           int type)
2267 {
2268         struct drm_device *dev = intel_sdvo->base.base.dev;
2269         struct intel_sdvo_tv_format format;
2270         uint32_t format_map, i;
2271
2272         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2273                 return false;
2274
2275         BUILD_BUG_ON(sizeof(format) != 6);
2276         if (!intel_sdvo_get_value(intel_sdvo,
2277                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2278                                   &format, sizeof(format)))
2279                 return false;
2280
2281         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2282
2283         if (format_map == 0)
2284                 return false;
2285
2286         intel_sdvo_connector->format_supported_num = 0;
2287         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2288                 if (format_map & (1 << i))
2289                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2290
2291
2292         intel_sdvo_connector->tv_format =
2293                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2294                                             "mode", intel_sdvo_connector->format_supported_num);
2295         if (!intel_sdvo_connector->tv_format)
2296                 return false;
2297
2298         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2299                 drm_property_add_enum(
2300                                 intel_sdvo_connector->tv_format, i,
2301                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2302
2303         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2304         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2305                                       intel_sdvo_connector->tv_format, 0);
2306         return true;
2307
2308 }
2309
2310 #define ENHANCEMENT(name, NAME) do { \
2311         if (enhancements.name) { \
2312                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2313                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2314                         return false; \
2315                 intel_sdvo_connector->max_##name = data_value[0]; \
2316                 intel_sdvo_connector->cur_##name = response; \
2317                 intel_sdvo_connector->name = \
2318                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2319                 if (!intel_sdvo_connector->name) return false; \
2320                 drm_connector_attach_property(connector, \
2321                                               intel_sdvo_connector->name, \
2322                                               intel_sdvo_connector->cur_##name); \
2323                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2324                               data_value[0], data_value[1], response); \
2325         } \
2326 } while (0)
2327
2328 static bool
2329 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2330                                       struct intel_sdvo_connector *intel_sdvo_connector,
2331                                       struct intel_sdvo_enhancements_reply enhancements)
2332 {
2333         struct drm_device *dev = intel_sdvo->base.base.dev;
2334         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2335         uint16_t response, data_value[2];
2336
2337         /* when horizontal overscan is supported, Add the left/right  property */
2338         if (enhancements.overscan_h) {
2339                 if (!intel_sdvo_get_value(intel_sdvo,
2340                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2341                                           &data_value, 4))
2342                         return false;
2343
2344                 if (!intel_sdvo_get_value(intel_sdvo,
2345                                           SDVO_CMD_GET_OVERSCAN_H,
2346                                           &response, 2))
2347                         return false;
2348
2349                 intel_sdvo_connector->max_hscan = data_value[0];
2350                 intel_sdvo_connector->left_margin = data_value[0] - response;
2351                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2352                 intel_sdvo_connector->left =
2353                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2354                 if (!intel_sdvo_connector->left)
2355                         return false;
2356
2357                 drm_connector_attach_property(connector,
2358                                               intel_sdvo_connector->left,
2359                                               intel_sdvo_connector->left_margin);
2360
2361                 intel_sdvo_connector->right =
2362                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2363                 if (!intel_sdvo_connector->right)
2364                         return false;
2365
2366                 drm_connector_attach_property(connector,
2367                                               intel_sdvo_connector->right,
2368                                               intel_sdvo_connector->right_margin);
2369                 DRM_DEBUG_KMS("h_overscan: max %d, "
2370                               "default %d, current %d\n",
2371                               data_value[0], data_value[1], response);
2372         }
2373
2374         if (enhancements.overscan_v) {
2375                 if (!intel_sdvo_get_value(intel_sdvo,
2376                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2377                                           &data_value, 4))
2378                         return false;
2379
2380                 if (!intel_sdvo_get_value(intel_sdvo,
2381                                           SDVO_CMD_GET_OVERSCAN_V,
2382                                           &response, 2))
2383                         return false;
2384
2385                 intel_sdvo_connector->max_vscan = data_value[0];
2386                 intel_sdvo_connector->top_margin = data_value[0] - response;
2387                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2388                 intel_sdvo_connector->top =
2389                         drm_property_create_range(dev, 0,
2390                                             "top_margin", 0, data_value[0]);
2391                 if (!intel_sdvo_connector->top)
2392                         return false;
2393
2394                 drm_connector_attach_property(connector,
2395                                               intel_sdvo_connector->top,
2396                                               intel_sdvo_connector->top_margin);
2397
2398                 intel_sdvo_connector->bottom =
2399                         drm_property_create_range(dev, 0,
2400                                             "bottom_margin", 0, data_value[0]);
2401                 if (!intel_sdvo_connector->bottom)
2402                         return false;
2403
2404                 drm_connector_attach_property(connector,
2405                                               intel_sdvo_connector->bottom,
2406                                               intel_sdvo_connector->bottom_margin);
2407                 DRM_DEBUG_KMS("v_overscan: max %d, "
2408                               "default %d, current %d\n",
2409                               data_value[0], data_value[1], response);
2410         }
2411
2412         ENHANCEMENT(hpos, HPOS);
2413         ENHANCEMENT(vpos, VPOS);
2414         ENHANCEMENT(saturation, SATURATION);
2415         ENHANCEMENT(contrast, CONTRAST);
2416         ENHANCEMENT(hue, HUE);
2417         ENHANCEMENT(sharpness, SHARPNESS);
2418         ENHANCEMENT(brightness, BRIGHTNESS);
2419         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2420         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2421         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2422         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2423         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2424
2425         if (enhancements.dot_crawl) {
2426                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2427                         return false;
2428
2429                 intel_sdvo_connector->max_dot_crawl = 1;
2430                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2431                 intel_sdvo_connector->dot_crawl =
2432                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2433                 if (!intel_sdvo_connector->dot_crawl)
2434                         return false;
2435
2436                 drm_connector_attach_property(connector,
2437                                               intel_sdvo_connector->dot_crawl,
2438                                               intel_sdvo_connector->cur_dot_crawl);
2439                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2440         }
2441
2442         return true;
2443 }
2444
2445 static bool
2446 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2447                                         struct intel_sdvo_connector *intel_sdvo_connector,
2448                                         struct intel_sdvo_enhancements_reply enhancements)
2449 {
2450         struct drm_device *dev = intel_sdvo->base.base.dev;
2451         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2452         uint16_t response, data_value[2];
2453
2454         ENHANCEMENT(brightness, BRIGHTNESS);
2455
2456         return true;
2457 }
2458 #undef ENHANCEMENT
2459
2460 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2461                                                struct intel_sdvo_connector *intel_sdvo_connector)
2462 {
2463         union {
2464                 struct intel_sdvo_enhancements_reply reply;
2465                 uint16_t response;
2466         } enhancements;
2467
2468         BUILD_BUG_ON(sizeof(enhancements) != 2);
2469
2470         enhancements.response = 0;
2471         intel_sdvo_get_value(intel_sdvo,
2472                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2473                              &enhancements, sizeof(enhancements));
2474         if (enhancements.response == 0) {
2475                 DRM_DEBUG_KMS("No enhancement is supported\n");
2476                 return true;
2477         }
2478
2479         if (IS_TV(intel_sdvo_connector))
2480                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2481         else if (IS_LVDS(intel_sdvo_connector))
2482                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2483         else
2484                 return true;
2485 }
2486
2487 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2488                                      struct i2c_msg *msgs,
2489                                      int num)
2490 {
2491         struct intel_sdvo *sdvo = adapter->algo_data;
2492
2493         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2494                 return -EIO;
2495
2496         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2497 }
2498
2499 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2500 {
2501         struct intel_sdvo *sdvo = adapter->algo_data;
2502         return sdvo->i2c->algo->functionality(sdvo->i2c);
2503 }
2504
2505 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2506         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2507         .functionality  = intel_sdvo_ddc_proxy_func
2508 };
2509
2510 static bool
2511 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2512                           struct drm_device *dev)
2513 {
2514         sdvo->ddc.owner = THIS_MODULE;
2515         sdvo->ddc.class = I2C_CLASS_DDC;
2516         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2517         sdvo->ddc.dev.parent = &dev->pdev->dev;
2518         sdvo->ddc.algo_data = sdvo;
2519         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2520
2521         return i2c_add_adapter(&sdvo->ddc) == 0;
2522 }
2523
2524 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2525 {
2526         struct drm_i915_private *dev_priv = dev->dev_private;
2527         struct intel_encoder *intel_encoder;
2528         struct intel_sdvo *intel_sdvo;
2529         u32 hotplug_mask;
2530         int i;
2531
2532         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2533         if (!intel_sdvo)
2534                 return false;
2535
2536         intel_sdvo->sdvo_reg = sdvo_reg;
2537         intel_sdvo->is_sdvob = is_sdvob;
2538         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2539         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2540         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2541                 kfree(intel_sdvo);
2542                 return false;
2543         }
2544
2545         /* encoder type will be decided later */
2546         intel_encoder = &intel_sdvo->base;
2547         intel_encoder->type = INTEL_OUTPUT_SDVO;
2548         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2549
2550         /* Read the regs to test if we can talk to the device */
2551         for (i = 0; i < 0x40; i++) {
2552                 u8 byte;
2553
2554                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2555                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2556                                       SDVO_NAME(intel_sdvo));
2557                         goto err;
2558                 }
2559         }
2560
2561         hotplug_mask = 0;
2562         if (IS_G4X(dev)) {
2563                 hotplug_mask = intel_sdvo->is_sdvob ?
2564                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2565         } else if (IS_GEN4(dev)) {
2566                 hotplug_mask = intel_sdvo->is_sdvob ?
2567                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2568         } else {
2569                 hotplug_mask = intel_sdvo->is_sdvob ?
2570                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2571         }
2572         dev_priv->hotplug_supported_mask |= hotplug_mask;
2573
2574         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2575
2576         /* In default case sdvo lvds is false */
2577         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2578                 goto err;
2579
2580         /* Set up hotplug command - note paranoia about contents of reply.
2581          * We assume that the hardware is in a sane state, and only touch
2582          * the bits we think we understand.
2583          */
2584         intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2585                              &intel_sdvo->hotplug_active, 2);
2586         intel_sdvo->hotplug_active[0] &= ~0x3;
2587
2588         if (intel_sdvo_output_setup(intel_sdvo,
2589                                     intel_sdvo->caps.output_flags) != true) {
2590                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2591                               SDVO_NAME(intel_sdvo));
2592                 goto err;
2593         }
2594
2595         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2596
2597         /* Set the input timing to the screen. Assume always input 0. */
2598         if (!intel_sdvo_set_target_input(intel_sdvo))
2599                 goto err;
2600
2601         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2602                                                     &intel_sdvo->pixel_clock_min,
2603                                                     &intel_sdvo->pixel_clock_max))
2604                 goto err;
2605
2606         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2607                         "clock range %dMHz - %dMHz, "
2608                         "input 1: %c, input 2: %c, "
2609                         "output 1: %c, output 2: %c\n",
2610                         SDVO_NAME(intel_sdvo),
2611                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2612                         intel_sdvo->caps.device_rev_id,
2613                         intel_sdvo->pixel_clock_min / 1000,
2614                         intel_sdvo->pixel_clock_max / 1000,
2615                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2616                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2617                         /* check currently supported outputs */
2618                         intel_sdvo->caps.output_flags &
2619                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2620                         intel_sdvo->caps.output_flags &
2621                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2622         return true;
2623
2624 err:
2625         drm_encoder_cleanup(&intel_encoder->base);
2626         i2c_del_adapter(&intel_sdvo->ddc);
2627         kfree(intel_sdvo);
2628
2629         return false;
2630 }