drivers/gpu/drm/radeon/radeon_dp_mst.c

   1
   2 #include <drm/drmP.h>
   3 #include <drm/drm_dp_mst_helper.h>
   4 #include <drm/drm_fb_helper.h>
   5
   6 #include "radeon.h"
   7 #include "atom.h"
   8 #include "ni_reg.h"
   9
  10 static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector);
  11
  12 static int radeon_atom_set_enc_offset(int id)
  13 {
  14         static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET,
  15                                        EVERGREEN_CRTC1_REGISTER_OFFSET,
  16                                        EVERGREEN_CRTC2_REGISTER_OFFSET,
  17                                        EVERGREEN_CRTC3_REGISTER_OFFSET,
  18                                        EVERGREEN_CRTC4_REGISTER_OFFSET,
  19                                        EVERGREEN_CRTC5_REGISTER_OFFSET,
  20                                        0x13830 - 0x7030 };
  21
  22         return offsets[id];
  23 }
  24
  25 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary,
  26                                      struct radeon_encoder_mst *mst_enc,
  27                                      enum radeon_hpd_id hpd, bool enable)
  28 {
  29         struct drm_device *dev = primary->base.dev;
  30         struct radeon_device *rdev = dev->dev_private;
  31         uint32_t reg;
  32         int retries = 0;
  33         uint32_t temp;
  34
  35         reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
  36
  37         /* set MST mode */
  38         reg &= ~NI_DIG_FE_DIG_MODE(7);
  39         reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST);
  40
  41         if (enable)
  42                 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  43         else
  44                 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  45
  46         reg |= NI_DIG_HPD_SELECT(hpd);
  47         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
  48         WREG32(NI_DIG_BE_CNTL + primary->offset, reg);
  49
  50         if (enable) {
  51                 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
  52
  53                 do {
  54                         temp = RREG32(NI_DIG_FE_CNTL + offset);
  55                 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000);
  56                 if (retries == 10000)
  57                         DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe);
  58         }
  59         return 0;
  60 }
  61
  62 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary,
  63                                            int stream_number,
  64                                            int fe,
  65                                            int slots)
  66 {
  67         struct drm_device *dev = primary->base.dev;
  68         struct radeon_device *rdev = dev->dev_private;
  69         u32 temp, val;
  70         int retries  = 0;
  71         int satreg, satidx;
  72
  73         satreg = stream_number >> 1;
  74         satidx = stream_number & 1;
  75
  76         temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset);
  77
  78         val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);
  79
  80         val <<= (16 * satidx);
  81
  82         temp &= ~(0xffff << (16 * satidx));
  83
  84         temp |= val;
  85
  86         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  87         WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  88
  89         WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1);
  90
  91         do {
  92                 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset);
  93         } while ((temp & 0x1) && retries++ < 10000);
  94
  95         if (retries == 10000)
  96                 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset);
  97
  98         /* MTP 16 ? */
  99         return 0;
 100 }
 101
 102 static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn,
 103                                                struct radeon_encoder *primary)
 104 {
 105         struct drm_device *dev = mst_conn->base.dev;
 106         struct stream_attribs new_attribs[6];
 107         int i;
 108         int idx = 0;
 109         struct radeon_connector *radeon_connector;
 110         struct drm_connector *connector;
 111
 112         memset(new_attribs, 0, sizeof(new_attribs));
 113         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 114                 struct radeon_encoder *subenc;
 115                 struct radeon_encoder_mst *mst_enc;
 116
 117                 radeon_connector = to_radeon_connector(connector);
 118                 if (!radeon_connector->is_mst_connector)
 119                         continue;
 120
 121                 if (radeon_connector->mst_port != mst_conn)
 122                         continue;
 123
 124                 subenc = radeon_connector->mst_encoder;
 125                 mst_enc = subenc->enc_priv;
 126
 127                 if (!mst_enc->enc_active)
 128                         continue;
 129
 130                 new_attribs[idx].fe = mst_enc->fe;
 131                 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port);
 132                 idx++;
 133         }
 134
 135         for (i = 0; i < idx; i++) {
 136                 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe ||
 137                     new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) {
 138                         radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots);
 139                         mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe;
 140                         mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots;
 141                 }
 142         }
 143
 144         for (i = idx; i < mst_conn->enabled_attribs; i++) {
 145                 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0);
 146                 mst_conn->cur_stream_attribs[i].fe = 0;
 147                 mst_conn->cur_stream_attribs[i].slots = 0;
 148         }
 149         mst_conn->enabled_attribs = idx;
 150         return 0;
 151 }
 152
 153 static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y)
 154 {
 155         struct drm_device *dev = mst->base.dev;
 156         struct radeon_device *rdev = dev->dev_private;
 157         struct radeon_encoder_mst *mst_enc = mst->enc_priv;
 158         uint32_t val, temp;
 159         uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
 160         int retries = 0;
 161
 162         val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);
 163
 164         WREG32(NI_DP_MSE_RATE_CNTL + offset, val);
 165
 166         do {
 167                 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset);
 168         } while ((temp & 0x1) && (retries++ < 10000));
 169
 170         if (retries >= 10000)
 171                 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe);
 172         return 0;
 173 }
 174
 175 static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
 176 {
 177         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 178         struct radeon_connector *master = radeon_connector->mst_port;
 179         struct edid *edid;
 180         int ret = 0;
 181
 182         edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port);
 183         radeon_connector->edid = edid;
 184         DRM_DEBUG_KMS("edid retrieved %p\n", edid);
 185         if (radeon_connector->edid) {
 186                 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
 187                 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
 188                 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
 189                 return ret;
 190         }
 191         drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
 192
 193         return ret;
 194 }
 195
 196 static int radeon_dp_mst_get_modes(struct drm_connector *connector)
 197 {
 198         return radeon_dp_mst_get_ddc_modes(connector);
 199 }
 200
 201 static enum drm_mode_status
 202 radeon_dp_mst_mode_valid(struct drm_connector *connector,
 203                         struct drm_display_mode *mode)
 204 {
 205         /* TODO - validate mode against available PBN for link */
 206         if (mode->clock < 10000)
 207                 return MODE_CLOCK_LOW;
 208
 209         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 210                 return MODE_H_ILLEGAL;
 211
 212         return MODE_OK;
 213 }
 214
 215 struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector)
 216 {
 217         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 218
 219         return &radeon_connector->mst_encoder->base;
 220 }
 221
 222 static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = {
 223         .get_modes = radeon_dp_mst_get_modes,
 224         .mode_valid = radeon_dp_mst_mode_valid,
 225         .best_encoder = radeon_mst_best_encoder,
 226 };
 227
 228 static enum drm_connector_status
 229 radeon_dp_mst_detect(struct drm_connector *connector, bool force)
 230 {
 231         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 232         struct radeon_connector *master = radeon_connector->mst_port;
 233
 234         return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port);
 235 }
 236
 237 static void
 238 radeon_dp_mst_connector_destroy(struct drm_connector *connector)
 239 {
 240         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 241         struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder;
 242
 243         drm_encoder_cleanup(&radeon_encoder->base);
 244         kfree(radeon_encoder);
 245         drm_connector_cleanup(connector);
 246         kfree(radeon_connector);
 247 }
 248
 249 static int radeon_connector_dpms(struct drm_connector *connector, int mode)
 250 {
 251         DRM_DEBUG_KMS("\n");
 252         return 0;
 253 }
 254
 255 static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = {
 256         .dpms = radeon_connector_dpms,
 257         .detect = radeon_dp_mst_detect,
 258         .fill_modes = drm_helper_probe_single_connector_modes,
 259         .destroy = radeon_dp_mst_connector_destroy,
 260 };
 261
 262 static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 263                                                          struct drm_dp_mst_port *port,
 264                                                          const char *pathprop)
 265 {
 266         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 267         struct drm_device *dev = master->base.dev;
 268         struct radeon_device *rdev = dev->dev_private;
 269         struct radeon_connector *radeon_connector;
 270         struct drm_connector *connector;
 271
 272         radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL);
 273         if (!radeon_connector)
 274                 return NULL;
 275
 276         radeon_connector->is_mst_connector = true;
 277         connector = &radeon_connector->base;
 278         radeon_connector->port = port;
 279         radeon_connector->mst_port = master;
 280         DRM_DEBUG_KMS("\n");
 281
 282         drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
 283         drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs);
 284         radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
 285
 286         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 287         drm_mode_connector_set_path_property(connector, pathprop);
 288
 289         drm_modeset_lock_all(dev);
 290         radeon_fb_add_connector(rdev, connector);
 291         drm_modeset_unlock_all(dev);
 292
 293         drm_connector_register(connector);
 294         return connector;
 295 }
 296
 297 static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 298                                             struct drm_connector *connector)
 299 {
 300         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 301         struct drm_device *dev = master->base.dev;
 302         struct radeon_device *rdev = dev->dev_private;
 303
 304         drm_connector_unregister(connector);
 305         /* need to nuke the connector */
 306         drm_modeset_lock_all(dev);
 307         /* dpms off */
 308         radeon_fb_remove_connector(rdev, connector);
 309
 310         drm_connector_cleanup(connector);
 311         drm_modeset_unlock_all(dev);
 312
 313         kfree(connector);
 314         DRM_DEBUG_KMS("\n");
 315 }
 316
 317 static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
 318 {
 319         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 320         struct drm_device *dev = master->base.dev;
 321
 322         drm_kms_helper_hotplug_event(dev);
 323 }
 324
 325 struct drm_dp_mst_topology_cbs mst_cbs = {
 326         .add_connector = radeon_dp_add_mst_connector,
 327         .destroy_connector = radeon_dp_destroy_mst_connector,
 328         .hotplug = radeon_dp_mst_hotplug,
 329 };
 330
 331 struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder)
 332 {
 333         struct drm_device *dev = encoder->dev;
 334         struct drm_connector *connector;
 335
 336         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 337                 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 338                 if (!connector->encoder)
 339                         continue;
 340                 if (!radeon_connector->is_mst_connector)
 341                         continue;
 342
 343                 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder);
 344                 if (connector->encoder == encoder)
 345                         return radeon_connector;
 346         }
 347         return NULL;
 348 }
 349
 350 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
 351 {
 352         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 353         struct drm_device *dev = crtc->dev;
 354         struct radeon_device *rdev = dev->dev_private;
 355         struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder);
 356         struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
 357         struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
 358         int dp_clock;
 359         struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
 360
 361         if (radeon_connector) {
 362                 radeon_connector->pixelclock_for_modeset = mode->clock;
 363                 if (radeon_connector->base.display_info.bpc)
 364                         radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
 365                 else
 366                         radeon_crtc->bpc = 8;
 367         }
 368
 369         DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock);
 370         dp_clock = dig_connector->dp_clock;
 371         radeon_crtc->ss_enabled =
 372                 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,
 373                                                  ASIC_INTERNAL_SS_ON_DP,
 374                                                  dp_clock);
 375 }
 376
 377 static void
 378 radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode)
 379 {
 380         struct drm_device *dev = encoder->dev;
 381         struct radeon_device *rdev = dev->dev_private;
 382         struct radeon_encoder *radeon_encoder, *primary;
 383         struct radeon_encoder_mst *mst_enc;
 384         struct radeon_encoder_atom_dig *dig_enc;
 385         struct radeon_connector *radeon_connector;
 386         struct drm_crtc *crtc;
 387         struct radeon_crtc *radeon_crtc;
 388         int ret, slots;
 389
 390         if (!ASIC_IS_DCE5(rdev)) {
 391                 DRM_ERROR("got mst dpms on non-DCE5\n");
 392                 return;
 393         }
 394
 395         radeon_connector = radeon_mst_find_connector(encoder);
 396         if (!radeon_connector)
 397                 return;
 398
 399         radeon_encoder = to_radeon_encoder(encoder);
 400
 401         mst_enc = radeon_encoder->enc_priv;
 402
 403         primary = mst_enc->primary;
 404
 405         dig_enc = primary->enc_priv;
 406
 407         crtc = encoder->crtc;
 408         DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links);
 409
 410         switch (mode) {
 411         case DRM_MODE_DPMS_ON:
 412                 dig_enc->active_mst_links++;
 413
 414                 radeon_crtc = to_radeon_crtc(crtc);
 415
 416                 if (dig_enc->active_mst_links == 1) {
 417                         mst_enc->fe = dig_enc->dig_encoder;
 418                         mst_enc->fe_from_be = true;
 419                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 420
 421                         atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
 422                         atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
 423                                                         0, 0, dig_enc->dig_encoder);
 424
 425                         if (radeon_dp_needs_link_train(mst_enc->connector) ||
 426                             dig_enc->active_mst_links == 1) {
 427                                 radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
 428                         }
 429
 430                 } else {
 431                         mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id);
 432                         if (mst_enc->fe == -1)
 433                                 DRM_ERROR("failed to get frontend for dig encoder\n");
 434                         mst_enc->fe_from_be = false;
 435                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 436                 }
 437
 438                 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder,
 439                               dig_enc->linkb, radeon_crtc->crtc_id);
 440
 441                 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
 442                                                radeon_connector->port,
 443                                                mst_enc->pbn, &slots);
 444                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 445
 446                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 447                                           radeon_connector->mst_port->hpd.hpd, true);
 448
 449                 mst_enc->enc_active = true;
 450                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 451                 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0);
 452
 453                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
 454                                             mst_enc->fe);
 455                 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 456
 457                 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 458
 459                 break;
 460         case DRM_MODE_DPMS_STANDBY:
 461         case DRM_MODE_DPMS_SUSPEND:
 462         case DRM_MODE_DPMS_OFF:
 463                 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links);
 464
 465                 if (!mst_enc->enc_active)
 466                         return;
 467
 468                 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 469                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 470
 471                 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 472                 /* and this can also fail */
 473                 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 474
 475                 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 476
 477                 mst_enc->enc_active = false;
 478                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 479
 480                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 481                                           radeon_connector->mst_port->hpd.hpd, false);
 482                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
 483                                             mst_enc->fe);
 484
 485                 if (!mst_enc->fe_from_be)
 486                         radeon_atom_release_dig_encoder(rdev, mst_enc->fe);
 487
 488                 mst_enc->fe_from_be = false;
 489                 dig_enc->active_mst_links--;
 490                 if (dig_enc->active_mst_links == 0) {
 491                         /* drop link */
 492                 }
 493
 494                 break;
 495         }
 496
 497 }
 498
 499 static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 500                                    const struct drm_display_mode *mode,
 501                                    struct drm_display_mode *adjusted_mode)
 502 {
 503         struct radeon_encoder_mst *mst_enc;
 504         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 505         int bpp = 24;
 506
 507         mst_enc = radeon_encoder->enc_priv;
 508
 509         mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
 510
 511         mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 512         DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
 513                       mst_enc->primary->active_device, mst_enc->primary->devices,
 514                       mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
 515
 516
 517         drm_mode_set_crtcinfo(adjusted_mode, 0);
 518         {
 519           struct radeon_connector_atom_dig *dig_connector;
 520
 521           dig_connector = mst_enc->connector->con_priv;
 522           dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
 523           dig_connector->dp_clock = radeon_dp_get_max_link_rate(&mst_enc->connector->base,
 524                                                                 dig_connector->dpcd);
 525           DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
 526                         dig_connector->dp_lane_count, dig_connector->dp_clock);
 527         }
 528         return true;
 529 }
 530
 531 static void radeon_mst_encoder_prepare(struct drm_encoder *encoder)
 532 {
 533         struct radeon_connector *radeon_connector;
 534         struct radeon_encoder *radeon_encoder, *primary;
 535         struct radeon_encoder_mst *mst_enc;
 536         struct radeon_encoder_atom_dig *dig_enc;
 537
 538         radeon_connector = radeon_mst_find_connector(encoder);
 539         if (!radeon_connector) {
 540                 DRM_DEBUG_KMS("failed to find connector %p\n", encoder);
 541                 return;
 542         }
 543         radeon_encoder = to_radeon_encoder(encoder);
 544
 545         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 546
 547         mst_enc = radeon_encoder->enc_priv;
 548
 549         primary = mst_enc->primary;
 550
 551         dig_enc = primary->enc_priv;
 552
 553         mst_enc->port = radeon_connector->port;
 554
 555         if (dig_enc->dig_encoder == -1) {
 556                 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
 557                 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder);
 558                 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder);
 559
 560
 561         }
 562         DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset);
 563 }
 564
 565 static void
 566 radeon_mst_encoder_mode_set(struct drm_encoder *encoder,
 567                              struct drm_display_mode *mode,
 568                              struct drm_display_mode *adjusted_mode)
 569 {
 570         DRM_DEBUG_KMS("\n");
 571 }
 572
 573 static void radeon_mst_encoder_commit(struct drm_encoder *encoder)
 574 {
 575         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 576         DRM_DEBUG_KMS("\n");
 577 }
 578
 579 static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = {
 580         .dpms = radeon_mst_encoder_dpms,
 581         .mode_fixup = radeon_mst_mode_fixup,
 582         .prepare = radeon_mst_encoder_prepare,
 583         .mode_set = radeon_mst_encoder_mode_set,
 584         .commit = radeon_mst_encoder_commit,
 585 };
 586
 587 void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 588 {
 589         drm_encoder_cleanup(encoder);
 590         kfree(encoder);
 591 }
 592
 593 static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = {
 594         .destroy = radeon_dp_mst_encoder_destroy,
 595 };
 596
 597 static struct radeon_encoder *
 598 radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
 599 {
 600         struct drm_device *dev = connector->base.dev;
 601         struct radeon_device *rdev = dev->dev_private;
 602         struct radeon_encoder *radeon_encoder;
 603         struct radeon_encoder_mst *mst_enc;
 604         struct drm_encoder *encoder;
 605         const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
 606         struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
 607
 608         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
 609         radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL);
 610         if (!radeon_encoder)
 611                 return NULL;
 612
 613         radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL);
 614         if (!radeon_encoder->enc_priv) {
 615                 kfree(radeon_encoder);
 616                 return NULL;
 617         }
 618         encoder = &radeon_encoder->base;
 619         switch (rdev->num_crtc) {
 620         case 1:
 621                 encoder->possible_crtcs = 0x1;
 622                 break;
 623         case 2:
 624         default:
 625                 encoder->possible_crtcs = 0x3;
 626                 break;
 627         case 4:
 628                 encoder->possible_crtcs = 0xf;
 629                 break;
 630         case 6:
 631                 encoder->possible_crtcs = 0x3f;
 632                 break;
 633         }
 634
 635         drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
 636                          DRM_MODE_ENCODER_DPMST);
 637         drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
 638
 639         mst_enc = radeon_encoder->enc_priv;
 640         mst_enc->connector = connector;
 641         mst_enc->primary = to_radeon_encoder(enc_master);
 642         radeon_encoder->is_mst_encoder = true;
 643         return radeon_encoder;
 644 }
 645
 646 int
 647 radeon_dp_mst_init(struct radeon_connector *radeon_connector)
 648 {
 649         struct drm_device *dev = radeon_connector->base.dev;
 650
 651         if (!radeon_connector->ddc_bus->has_aux)
 652                 return 0;
 653
 654         radeon_connector->mst_mgr.cbs = &mst_cbs;
 655         return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev,
 656                                             &radeon_connector->ddc_bus->aux, 16, 6,
 657                                             radeon_connector->base.base.id);
 658 }
 659
 660 int
 661 radeon_dp_mst_probe(struct radeon_connector *radeon_connector)
 662 {
 663         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 664         struct drm_device *dev = radeon_connector->base.dev;
 665         struct radeon_device *rdev = dev->dev_private;
 666         int ret;
 667         u8 msg[1];
 668
 669         if (!radeon_mst)
 670                 return 0;
 671
 672         if (!ASIC_IS_DCE5(rdev))
 673                 return 0;
 674
 675         if (dig_connector->dpcd[DP_DPCD_REV] < 0x12)
 676                 return 0;
 677
 678         ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
 679                                1);
 680         if (ret) {
 681                 if (msg[0] & DP_MST_CAP) {
 682                         DRM_DEBUG_KMS("Sink is MST capable\n");
 683                         dig_connector->is_mst = true;
 684                 } else {
 685                         DRM_DEBUG_KMS("Sink is not MST capable\n");
 686                         dig_connector->is_mst = false;
 687                 }
 688
 689         }
 690         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 691                                         dig_connector->is_mst);
 692         return dig_connector->is_mst;
 693 }
 694
 695 int
 696 radeon_dp_mst_check_status(struct radeon_connector *radeon_connector)
 697 {
 698         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 699         int retry;
 700
 701         if (dig_connector->is_mst) {
 702                 u8 esi[16] = { 0 };
 703                 int dret;
 704                 int ret = 0;
 705                 bool handled;
 706
 707                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 708                                        DP_SINK_COUNT_ESI, esi, 8);
 709 go_again:
 710                 if (dret == 8) {
 711                         DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 712                         ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled);
 713
 714                         if (handled) {
 715                                 for (retry = 0; retry < 3; retry++) {
 716                                         int wret;
 717                                         wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
 718                                                                  DP_SINK_COUNT_ESI + 1, &esi[1], 3);
 719                                         if (wret == 3)
 720                                                 break;
 721                                 }
 722
 723                                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 724                                                         DP_SINK_COUNT_ESI, esi, 8);
 725                                 if (dret == 8) {
 726                                         DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 727                                         goto go_again;
 728                                 }
 729                         } else
 730                                 ret = 0;
 731
 732                         return ret;
 733                 } else {
 734                         DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret);
 735                         dig_connector->is_mst = false;
 736                         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 737                                                         dig_connector->is_mst);
 738                         /* send a hotplug event */
 739                 }
 740         }
 741         return -EINVAL;
 742 }
 743
 744 #if defined(CONFIG_DEBUG_FS)
 745
 746 static int radeon_debugfs_mst_info(struct seq_file *m, void *data)
 747 {
 748         struct drm_info_node *node = (struct drm_info_node *)m->private;
 749         struct drm_device *dev = node->minor->dev;
 750         struct drm_connector *connector;
 751         struct radeon_connector *radeon_connector;
 752         struct radeon_connector_atom_dig *dig_connector;
 753         int i;
 754
 755         drm_modeset_lock_all(dev);
 756         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 757                 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
 758                         continue;
 759
 760                 radeon_connector = to_radeon_connector(connector);
 761                 dig_connector = radeon_connector->con_priv;
 762                 if (radeon_connector->is_mst_connector)
 763                         continue;
 764                 if (!dig_connector->is_mst)
 765                         continue;
 766                 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr);
 767
 768                 for (i = 0; i < radeon_connector->enabled_attribs; i++)
 769                         seq_printf(m, "attrib %d: %d %d\n", i,
 770                                    radeon_connector->cur_stream_attribs[i].fe,
 771                                    radeon_connector->cur_stream_attribs[i].slots);
 772         }
 773         drm_modeset_unlock_all(dev);
 774         return 0;
 775 }
 776
 777 static struct drm_info_list radeon_debugfs_mst_list[] = {
 778         {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL},
 779 };
 780 #endif
 781
 782 int radeon_mst_debugfs_init(struct radeon_device *rdev)
 783 {
 784 #if defined(CONFIG_DEBUG_FS)
 785         return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1);
 786 #endif
 787         return 0;
 788 }