drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "vmwgfx_kms.h"
  29
  30
  31 /* Might need a hrtimer here? */
  32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  33
  34 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  35 {
  36         if (du->cursor_surface)
  37                 vmw_surface_unreference(&du->cursor_surface);
  38         if (du->cursor_dmabuf)
  39                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
  40         drm_crtc_cleanup(&du->crtc);
  41         drm_encoder_cleanup(&du->encoder);
  42         drm_connector_cleanup(&du->connector);
  43 }
  44
  45 /*
  46  * Display Unit Cursor functions
  47  */
  48
  49 int vmw_cursor_update_image(struct vmw_private *dev_priv,
  50                             u32 *image, u32 width, u32 height,
  51                             u32 hotspotX, u32 hotspotY)
  52 {
  53         struct {
  54                 u32 cmd;
  55                 SVGAFifoCmdDefineAlphaCursor cursor;
  56         } *cmd;
  57         u32 image_size = width * height * 4;
  58         u32 cmd_size = sizeof(*cmd) + image_size;
  59
  60         if (!image)
  61                 return -EINVAL;
  62
  63         cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  64         if (unlikely(cmd == NULL)) {
  65                 DRM_ERROR("Fifo reserve failed.\n");
  66                 return -ENOMEM;
  67         }
  68
  69         memset(cmd, 0, sizeof(*cmd));
  70
  71         memcpy(&cmd[1], image, image_size);
  72
  73         cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  74         cmd->cursor.id = cpu_to_le32(0);
  75         cmd->cursor.width = cpu_to_le32(width);
  76         cmd->cursor.height = cpu_to_le32(height);
  77         cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  78         cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  79
  80         vmw_fifo_commit(dev_priv, cmd_size);
  81
  82         return 0;
  83 }
  84
  85 void vmw_cursor_update_position(struct vmw_private *dev_priv,
  86                                 bool show, int x, int y)
  87 {
  88         __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  89         uint32_t count;
  90
  91         iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  92         iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  93         iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  94         count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  95         iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  96 }
  97
  98 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  99                            uint32_t handle, uint32_t width, uint32_t height)
 100 {
 101         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 102         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 103         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 104         struct vmw_surface *surface = NULL;
 105         struct vmw_dma_buffer *dmabuf = NULL;
 106         int ret;
 107
 108         if (handle) {
 109                 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
 110                                                      handle, &surface);
 111                 if (!ret) {
 112                         if (!surface->snooper.image) {
 113                                 DRM_ERROR("surface not suitable for cursor\n");
 114                                 return -EINVAL;
 115                         }
 116                 } else {
 117                         ret = vmw_user_dmabuf_lookup(tfile,
 118                                                      handle, &dmabuf);
 119                         if (ret) {
 120                                 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
 121                                 return -EINVAL;
 122                         }
 123                 }
 124         }
 125
 126         /* takedown old cursor */
 127         if (du->cursor_surface) {
 128                 du->cursor_surface->snooper.crtc = NULL;
 129                 vmw_surface_unreference(&du->cursor_surface);
 130         }
 131         if (du->cursor_dmabuf)
 132                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
 133
 134         /* setup new image */
 135         if (surface) {
 136                 /* vmw_user_surface_lookup takes one reference */
 137                 du->cursor_surface = surface;
 138
 139                 du->cursor_surface->snooper.crtc = crtc;
 140                 du->cursor_age = du->cursor_surface->snooper.age;
 141                 vmw_cursor_update_image(dev_priv, surface->snooper.image,
 142                                         64, 64, du->hotspot_x, du->hotspot_y);
 143         } else if (dmabuf) {
 144                 struct ttm_bo_kmap_obj map;
 145                 unsigned long kmap_offset;
 146                 unsigned long kmap_num;
 147                 void *virtual;
 148                 bool dummy;
 149
 150                 /* vmw_user_surface_lookup takes one reference */
 151                 du->cursor_dmabuf = dmabuf;
 152
 153                 kmap_offset = 0;
 154                 kmap_num = (64*64*4) >> PAGE_SHIFT;
 155
 156                 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
 157                 if (unlikely(ret != 0)) {
 158                         DRM_ERROR("reserve failed\n");
 159                         return -EINVAL;
 160                 }
 161
 162                 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
 163                 if (unlikely(ret != 0))
 164                         goto err_unreserve;
 165
 166                 virtual = ttm_kmap_obj_virtual(&map, &dummy);
 167                 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
 168                                         du->hotspot_x, du->hotspot_y);
 169
 170                 ttm_bo_kunmap(&map);
 171 err_unreserve:
 172                 ttm_bo_unreserve(&dmabuf->base);
 173
 174         } else {
 175                 vmw_cursor_update_position(dev_priv, false, 0, 0);
 176                 return 0;
 177         }
 178
 179         vmw_cursor_update_position(dev_priv, true,
 180                                    du->cursor_x + du->hotspot_x,
 181                                    du->cursor_y + du->hotspot_y);
 182
 183         return 0;
 184 }
 185
 186 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
 187 {
 188         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 189         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 190         bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
 191
 192         du->cursor_x = x + crtc->x;
 193         du->cursor_y = y + crtc->y;
 194
 195         vmw_cursor_update_position(dev_priv, shown,
 196                                    du->cursor_x + du->hotspot_x,
 197                                    du->cursor_y + du->hotspot_y);
 198
 199         return 0;
 200 }
 201
 202 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
 203                           struct ttm_object_file *tfile,
 204                           struct ttm_buffer_object *bo,
 205                           SVGA3dCmdHeader *header)
 206 {
 207         struct ttm_bo_kmap_obj map;
 208         unsigned long kmap_offset;
 209         unsigned long kmap_num;
 210         SVGA3dCopyBox *box;
 211         unsigned box_count;
 212         void *virtual;
 213         bool dummy;
 214         struct vmw_dma_cmd {
 215                 SVGA3dCmdHeader header;
 216                 SVGA3dCmdSurfaceDMA dma;
 217         } *cmd;
 218         int ret;
 219
 220         cmd = container_of(header, struct vmw_dma_cmd, header);
 221
 222         /* No snooper installed */
 223         if (!srf->snooper.image)
 224                 return;
 225
 226         if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
 227                 DRM_ERROR("face and mipmap for cursors should never != 0\n");
 228                 return;
 229         }
 230
 231         if (cmd->header.size < 64) {
 232                 DRM_ERROR("at least one full copy box must be given\n");
 233                 return;
 234         }
 235
 236         box = (SVGA3dCopyBox *)&cmd[1];
 237         box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
 238                         sizeof(SVGA3dCopyBox);
 239
 240         if (cmd->dma.guest.pitch != (64 * 4) ||
 241             cmd->dma.guest.ptr.offset % PAGE_SIZE ||
 242             box->x != 0    || box->y != 0    || box->z != 0    ||
 243             box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
 244             box->w != 64   || box->h != 64   || box->d != 1    ||
 245             box_count != 1) {
 246                 /* TODO handle none page aligned offsets */
 247                 /* TODO handle partial uploads and pitch != 256 */
 248                 /* TODO handle more then one copy (size != 64) */
 249                 DRM_ERROR("lazy programmer, can't handle weird stuff\n");
 250                 return;
 251         }
 252
 253         kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
 254         kmap_num = (64*64*4) >> PAGE_SHIFT;
 255
 256         ret = ttm_bo_reserve(bo, true, false, false, 0);
 257         if (unlikely(ret != 0)) {
 258                 DRM_ERROR("reserve failed\n");
 259                 return;
 260         }
 261
 262         ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
 263         if (unlikely(ret != 0))
 264                 goto err_unreserve;
 265
 266         virtual = ttm_kmap_obj_virtual(&map, &dummy);
 267
 268         memcpy(srf->snooper.image, virtual, 64*64*4);
 269         srf->snooper.age++;
 270
 271         /* we can't call this function from this function since execbuf has
 272          * reserved fifo space.
 273          *
 274          * if (srf->snooper.crtc)
 275          *      vmw_ldu_crtc_cursor_update_image(dev_priv,
 276          *                                       srf->snooper.image, 64, 64,
 277          *                                       du->hotspot_x, du->hotspot_y);
 278          */
 279
 280         ttm_bo_kunmap(&map);
 281 err_unreserve:
 282         ttm_bo_unreserve(bo);
 283 }
 284
 285 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
 286 {
 287         struct drm_device *dev = dev_priv->dev;
 288         struct vmw_display_unit *du;
 289         struct drm_crtc *crtc;
 290
 291         mutex_lock(&dev->mode_config.mutex);
 292
 293         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 294                 du = vmw_crtc_to_du(crtc);
 295                 if (!du->cursor_surface ||
 296                     du->cursor_age == du->cursor_surface->snooper.age)
 297                         continue;
 298
 299                 du->cursor_age = du->cursor_surface->snooper.age;
 300                 vmw_cursor_update_image(dev_priv,
 301                                         du->cursor_surface->snooper.image,
 302                                         64, 64, du->hotspot_x, du->hotspot_y);
 303         }
 304
 305         mutex_unlock(&dev->mode_config.mutex);
 306 }
 307
 308 /*
 309  * Generic framebuffer code
 310  */
 311
 312 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
 313                                   struct drm_file *file_priv,
 314                                   unsigned int *handle)
 315 {
 316         if (handle)
 317                 handle = 0;
 318
 319         return 0;
 320 }
 321
 322 /*
 323  * Surface framebuffer code
 324  */
 325
 326 #define vmw_framebuffer_to_vfbs(x) \
 327         container_of(x, struct vmw_framebuffer_surface, base.base)
 328
 329 struct vmw_framebuffer_surface {
 330         struct vmw_framebuffer base;
 331         struct vmw_surface *surface;
 332         struct vmw_dma_buffer *buffer;
 333         struct list_head head;
 334         struct drm_master *master;
 335 };
 336
 337 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
 338 {
 339         struct vmw_framebuffer_surface *vfbs =
 340                 vmw_framebuffer_to_vfbs(framebuffer);
 341         struct vmw_master *vmaster = vmw_master(vfbs->master);
 342
 343
 344         mutex_lock(&vmaster->fb_surf_mutex);
 345         list_del(&vfbs->head);
 346         mutex_unlock(&vmaster->fb_surf_mutex);
 347
 348         drm_master_put(&vfbs->master);
 349         drm_framebuffer_cleanup(framebuffer);
 350         vmw_surface_unreference(&vfbs->surface);
 351         ttm_base_object_unref(&vfbs->base.user_obj);
 352
 353         kfree(vfbs);
 354 }
 355
 356 static int do_surface_dirty_sou(struct vmw_private *dev_priv,
 357                                 struct drm_file *file_priv,
 358                                 struct vmw_framebuffer *framebuffer,
 359                                 unsigned flags, unsigned color,
 360                                 struct drm_clip_rect *clips,
 361                                 unsigned num_clips, int inc)
 362 {
 363         struct drm_clip_rect *clips_ptr;
 364         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
 365         struct drm_crtc *crtc;
 366         size_t fifo_size;
 367         int i, num_units;
 368         int ret = 0; /* silence warning */
 369         int left, right, top, bottom;
 370
 371         struct {
 372                 SVGA3dCmdHeader header;
 373                 SVGA3dCmdBlitSurfaceToScreen body;
 374         } *cmd;
 375         SVGASignedRect *blits;
 376
 377
 378         num_units = 0;
 379         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
 380                             head) {
 381                 if (crtc->fb != &framebuffer->base)
 382                         continue;
 383                 units[num_units++] = vmw_crtc_to_du(crtc);
 384         }
 385
 386         BUG_ON(!clips || !num_clips);
 387
 388         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
 389         cmd = kzalloc(fifo_size, GFP_KERNEL);
 390         if (unlikely(cmd == NULL)) {
 391                 DRM_ERROR("Temporary fifo memory alloc failed.\n");
 392                 return -ENOMEM;
 393         }
 394
 395         left = clips->x1;
 396         right = clips->x2;
 397         top = clips->y1;
 398         bottom = clips->y2;
 399
 400         clips_ptr = clips;
 401         for (i = 1; i < num_clips; i++, clips_ptr += inc) {
 402                 left = min_t(int, left, (int)clips_ptr->x1);
 403                 right = max_t(int, right, (int)clips_ptr->x2);
 404                 top = min_t(int, top, (int)clips_ptr->y1);
 405                 bottom = max_t(int, bottom, (int)clips_ptr->y2);
 406         }
 407
 408         /* only need to do this once */
 409         memset(cmd, 0, fifo_size);
 410         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
 411         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
 412
 413         cmd->body.srcRect.left = left;
 414         cmd->body.srcRect.right = right;
 415         cmd->body.srcRect.top = top;
 416         cmd->body.srcRect.bottom = bottom;
 417
 418         clips_ptr = clips;
 419         blits = (SVGASignedRect *)&cmd[1];
 420         for (i = 0; i < num_clips; i++, clips_ptr += inc) {
 421                 blits[i].left   = clips_ptr->x1 - left;
 422                 blits[i].right  = clips_ptr->x2 - left;
 423                 blits[i].top    = clips_ptr->y1 - top;
 424                 blits[i].bottom = clips_ptr->y2 - top;
 425         }
 426
 427         /* do per unit writing, reuse fifo for each */
 428         for (i = 0; i < num_units; i++) {
 429                 struct vmw_display_unit *unit = units[i];
 430                 int clip_x1 = left - unit->crtc.x;
 431                 int clip_y1 = top - unit->crtc.y;
 432                 int clip_x2 = right - unit->crtc.x;
 433                 int clip_y2 = bottom - unit->crtc.y;
 434
 435                 /* skip any crtcs that misses the clip region */
 436                 if (clip_x1 >= unit->crtc.mode.hdisplay ||
 437                     clip_y1 >= unit->crtc.mode.vdisplay ||
 438                     clip_x2 <= 0 || clip_y2 <= 0)
 439                         continue;
 440
 441                 /* need to reset sid as it is changed by execbuf */
 442                 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
 443
 444                 cmd->body.destScreenId = unit->unit;
 445
 446                 /*
 447                  * The blit command is a lot more resilient then the
 448                  * readback command when it comes to clip rects. So its
 449                  * okay to go out of bounds.
 450                  */
 451
 452                 cmd->body.destRect.left = clip_x1;
 453                 cmd->body.destRect.right = clip_x2;
 454                 cmd->body.destRect.top = clip_y1;
 455                 cmd->body.destRect.bottom = clip_y2;
 456
 457
 458                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
 459                                           fifo_size, 0, NULL);
 460
 461                 if (unlikely(ret != 0))
 462                         break;
 463         }
 464
 465         kfree(cmd);
 466
 467         return ret;
 468 }
 469
 470 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
 471                                   struct drm_file *file_priv,
 472                                   unsigned flags, unsigned color,
 473                                   struct drm_clip_rect *clips,
 474                                   unsigned num_clips)
 475 {
 476         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 477         struct vmw_master *vmaster = vmw_master(file_priv->master);
 478         struct vmw_framebuffer_surface *vfbs =
 479                 vmw_framebuffer_to_vfbs(framebuffer);
 480         struct drm_clip_rect norect;
 481         int ret, inc = 1;
 482
 483         if (unlikely(vfbs->master != file_priv->master))
 484                 return -EINVAL;
 485
 486         /* Require ScreenObject support for 3D */
 487         if (!dev_priv->sou_priv)
 488                 return -EINVAL;
 489
 490         ret = ttm_read_lock(&vmaster->lock, true);
 491         if (unlikely(ret != 0))
 492                 return ret;
 493
 494         if (!num_clips) {
 495                 num_clips = 1;
 496                 clips = &norect;
 497                 norect.x1 = norect.y1 = 0;
 498                 norect.x2 = framebuffer->width;
 499                 norect.y2 = framebuffer->height;
 500         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 501                 num_clips /= 2;
 502                 inc = 2; /* skip source rects */
 503         }
 504
 505         ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
 506                                    flags, color,
 507                                    clips, num_clips, inc);
 508
 509         ttm_read_unlock(&vmaster->lock);
 510         return 0;
 511 }
 512
 513 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
 514         .destroy = vmw_framebuffer_surface_destroy,
 515         .dirty = vmw_framebuffer_surface_dirty,
 516         .create_handle = vmw_framebuffer_create_handle,
 517 };
 518
 519 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
 520                                            struct drm_file *file_priv,
 521                                            struct vmw_surface *surface,
 522                                            struct vmw_framebuffer **out,
 523                                            const struct drm_mode_fb_cmd
 524                                            *mode_cmd)
 525
 526 {
 527         struct drm_device *dev = dev_priv->dev;
 528         struct vmw_framebuffer_surface *vfbs;
 529         enum SVGA3dSurfaceFormat format;
 530         struct vmw_master *vmaster = vmw_master(file_priv->master);
 531         int ret;
 532
 533         /* 3D is only supported on HWv8 hosts which supports screen objects */
 534         if (!dev_priv->sou_priv)
 535                 return -ENOSYS;
 536
 537         /*
 538          * Sanity checks.
 539          */
 540
 541         if (unlikely(surface->mip_levels[0] != 1 ||
 542                      surface->num_sizes != 1 ||
 543                      surface->sizes[0].width < mode_cmd->width ||
 544                      surface->sizes[0].height < mode_cmd->height ||
 545                      surface->sizes[0].depth != 1)) {
 546                 DRM_ERROR("Incompatible surface dimensions "
 547                           "for requested mode.\n");
 548                 return -EINVAL;
 549         }
 550
 551         switch (mode_cmd->depth) {
 552         case 32:
 553                 format = SVGA3D_A8R8G8B8;
 554                 break;
 555         case 24:
 556                 format = SVGA3D_X8R8G8B8;
 557                 break;
 558         case 16:
 559                 format = SVGA3D_R5G6B5;
 560                 break;
 561         case 15:
 562                 format = SVGA3D_A1R5G5B5;
 563                 break;
 564         case 8:
 565                 format = SVGA3D_LUMINANCE8;
 566                 break;
 567         default:
 568                 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
 569                 return -EINVAL;
 570         }
 571
 572         if (unlikely(format != surface->format)) {
 573                 DRM_ERROR("Invalid surface format for requested mode.\n");
 574                 return -EINVAL;
 575         }
 576
 577         vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
 578         if (!vfbs) {
 579                 ret = -ENOMEM;
 580                 goto out_err1;
 581         }
 582
 583         ret = drm_framebuffer_init(dev, &vfbs->base.base,
 584                                    &vmw_framebuffer_surface_funcs);
 585         if (ret)
 586                 goto out_err2;
 587
 588         if (!vmw_surface_reference(surface)) {
 589                 DRM_ERROR("failed to reference surface %p\n", surface);
 590                 goto out_err3;
 591         }
 592
 593         /* XXX get the first 3 from the surface info */
 594         vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
 595         vfbs->base.base.pitch = mode_cmd->pitch;
 596         vfbs->base.base.depth = mode_cmd->depth;
 597         vfbs->base.base.width = mode_cmd->width;
 598         vfbs->base.base.height = mode_cmd->height;
 599         vfbs->surface = surface;
 600         vfbs->base.user_handle = mode_cmd->handle;
 601         vfbs->master = drm_master_get(file_priv->master);
 602
 603         mutex_lock(&vmaster->fb_surf_mutex);
 604         list_add_tail(&vfbs->head, &vmaster->fb_surf);
 605         mutex_unlock(&vmaster->fb_surf_mutex);
 606
 607         *out = &vfbs->base;
 608
 609         return 0;
 610
 611 out_err3:
 612         drm_framebuffer_cleanup(&vfbs->base.base);
 613 out_err2:
 614         kfree(vfbs);
 615 out_err1:
 616         return ret;
 617 }
 618
 619 /*
 620  * Dmabuf framebuffer code
 621  */
 622
 623 #define vmw_framebuffer_to_vfbd(x) \
 624         container_of(x, struct vmw_framebuffer_dmabuf, base.base)
 625
 626 struct vmw_framebuffer_dmabuf {
 627         struct vmw_framebuffer base;
 628         struct vmw_dma_buffer *buffer;
 629 };
 630
 631 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
 632 {
 633         struct vmw_framebuffer_dmabuf *vfbd =
 634                 vmw_framebuffer_to_vfbd(framebuffer);
 635
 636         drm_framebuffer_cleanup(framebuffer);
 637         vmw_dmabuf_unreference(&vfbd->buffer);
 638         ttm_base_object_unref(&vfbd->base.user_obj);
 639
 640         kfree(vfbd);
 641 }
 642
 643 static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
 644                                struct vmw_framebuffer *framebuffer,
 645                                unsigned flags, unsigned color,
 646                                struct drm_clip_rect *clips,
 647                                unsigned num_clips, int increment)
 648 {
 649         size_t fifo_size;
 650         int i;
 651
 652         struct {
 653                 uint32_t header;
 654                 SVGAFifoCmdUpdate body;
 655         } *cmd;
 656
 657         fifo_size = sizeof(*cmd) * num_clips;
 658         cmd = vmw_fifo_reserve(dev_priv, fifo_size);
 659         if (unlikely(cmd == NULL)) {
 660                 DRM_ERROR("Fifo reserve failed.\n");
 661                 return -ENOMEM;
 662         }
 663
 664         memset(cmd, 0, fifo_size);
 665         for (i = 0; i < num_clips; i++, clips += increment) {
 666                 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
 667                 cmd[i].body.x = cpu_to_le32(clips->x1);
 668                 cmd[i].body.y = cpu_to_le32(clips->y1);
 669                 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
 670                 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
 671         }
 672
 673         vmw_fifo_commit(dev_priv, fifo_size);
 674         return 0;
 675 }
 676
 677 static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
 678                                   struct vmw_private *dev_priv,
 679                                   struct vmw_framebuffer *framebuffer)
 680 {
 681         int depth = framebuffer->base.depth;
 682         size_t fifo_size;
 683         int ret;
 684
 685         struct {
 686                 uint32_t header;
 687                 SVGAFifoCmdDefineGMRFB body;
 688         } *cmd;
 689
 690         /* Emulate RGBA support, contrary to svga_reg.h this is not
 691          * supported by hosts. This is only a problem if we are reading
 692          * this value later and expecting what we uploaded back.
 693          */
 694         if (depth == 32)
 695                 depth = 24;
 696
 697         fifo_size = sizeof(*cmd);
 698         cmd = kmalloc(fifo_size, GFP_KERNEL);
 699         if (unlikely(cmd == NULL)) {
 700                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
 701                 return -ENOMEM;
 702         }
 703
 704         memset(cmd, 0, fifo_size);
 705         cmd->header = SVGA_CMD_DEFINE_GMRFB;
 706         cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
 707         cmd->body.format.colorDepth = depth;
 708         cmd->body.format.reserved = 0;
 709         cmd->body.bytesPerLine = framebuffer->base.pitch;
 710         cmd->body.ptr.gmrId = framebuffer->user_handle;
 711         cmd->body.ptr.offset = 0;
 712
 713         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
 714                                   fifo_size, 0, NULL);
 715
 716         kfree(cmd);
 717
 718         return ret;
 719 }
 720
 721 static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
 722                                struct vmw_private *dev_priv,
 723                                struct vmw_framebuffer *framebuffer,
 724                                unsigned flags, unsigned color,
 725                                struct drm_clip_rect *clips,
 726                                unsigned num_clips, int increment)
 727 {
 728         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
 729         struct drm_clip_rect *clips_ptr;
 730         int i, k, num_units, ret;
 731         struct drm_crtc *crtc;
 732         size_t fifo_size;
 733
 734         struct {
 735                 uint32_t header;
 736                 SVGAFifoCmdBlitGMRFBToScreen body;
 737         } *blits;
 738
 739         ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
 740         if (unlikely(ret != 0))
 741                 return ret; /* define_gmrfb prints warnings */
 742
 743         fifo_size = sizeof(*blits) * num_clips;
 744         blits = kmalloc(fifo_size, GFP_KERNEL);
 745         if (unlikely(blits == NULL)) {
 746                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
 747                 return -ENOMEM;
 748         }
 749
 750         num_units = 0;
 751         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
 752                 if (crtc->fb != &framebuffer->base)
 753                         continue;
 754                 units[num_units++] = vmw_crtc_to_du(crtc);
 755         }
 756
 757         for (k = 0; k < num_units; k++) {
 758                 struct vmw_display_unit *unit = units[k];
 759                 int hit_num = 0;
 760
 761                 clips_ptr = clips;
 762                 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
 763                         int clip_x1 = clips_ptr->x1 - unit->crtc.x;
 764                         int clip_y1 = clips_ptr->y1 - unit->crtc.y;
 765                         int clip_x2 = clips_ptr->x2 - unit->crtc.x;
 766                         int clip_y2 = clips_ptr->y2 - unit->crtc.y;
 767
 768                         /* skip any crtcs that misses the clip region */
 769                         if (clip_x1 >= unit->crtc.mode.hdisplay ||
 770                             clip_y1 >= unit->crtc.mode.vdisplay ||
 771                             clip_x2 <= 0 || clip_y2 <= 0)
 772                                 continue;
 773
 774                         blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
 775                         blits[hit_num].body.destScreenId = unit->unit;
 776                         blits[hit_num].body.srcOrigin.x = clips_ptr->x1;
 777                         blits[hit_num].body.srcOrigin.y = clips_ptr->y1;
 778                         blits[hit_num].body.destRect.left = clip_x1;
 779                         blits[hit_num].body.destRect.top = clip_y1;
 780                         blits[hit_num].body.destRect.right = clip_x2;
 781                         blits[hit_num].body.destRect.bottom = clip_y2;
 782                         hit_num++;
 783                 }
 784
 785                 /* no clips hit the crtc */
 786                 if (hit_num == 0)
 787                         continue;
 788
 789                 fifo_size = sizeof(*blits) * hit_num;
 790                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
 791                                           fifo_size, 0, NULL);
 792
 793                 if (unlikely(ret != 0))
 794                         break;
 795         }
 796
 797         kfree(blits);
 798
 799         return ret;
 800 }
 801
 802 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
 803                                  struct drm_file *file_priv,
 804                                  unsigned flags, unsigned color,
 805                                  struct drm_clip_rect *clips,
 806                                  unsigned num_clips)
 807 {
 808         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 809         struct vmw_master *vmaster = vmw_master(file_priv->master);
 810         struct vmw_framebuffer_dmabuf *vfbd =
 811                 vmw_framebuffer_to_vfbd(framebuffer);
 812         struct drm_clip_rect norect;
 813         int ret, increment = 1;
 814
 815         ret = ttm_read_lock(&vmaster->lock, true);
 816         if (unlikely(ret != 0))
 817                 return ret;
 818
 819         if (!num_clips) {
 820                 num_clips = 1;
 821                 clips = &norect;
 822                 norect.x1 = norect.y1 = 0;
 823                 norect.x2 = framebuffer->width;
 824                 norect.y2 = framebuffer->height;
 825         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 826                 num_clips /= 2;
 827                 increment = 2;
 828         }
 829
 830         if (dev_priv->ldu_priv) {
 831                 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
 832                                           flags, color,
 833                                           clips, num_clips, increment);
 834         } else {
 835                 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
 836                                           flags, color,
 837                                           clips, num_clips, increment);
 838         }
 839
 840         ttm_read_unlock(&vmaster->lock);
 841         return ret;
 842 }
 843
 844 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
 845         .destroy = vmw_framebuffer_dmabuf_destroy,
 846         .dirty = vmw_framebuffer_dmabuf_dirty,
 847         .create_handle = vmw_framebuffer_create_handle,
 848 };
 849
 850 /**
 851  * Pin the dmabuffer to the start of vram.
 852  */
 853 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
 854 {
 855         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 856         struct vmw_framebuffer_dmabuf *vfbd =
 857                 vmw_framebuffer_to_vfbd(&vfb->base);
 858         int ret;
 859
 860         /* This code should not be used with screen objects */
 861         BUG_ON(dev_priv->sou_priv);
 862
 863         vmw_overlay_pause_all(dev_priv);
 864
 865         ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
 866
 867         vmw_overlay_resume_all(dev_priv);
 868
 869         WARN_ON(ret != 0);
 870
 871         return 0;
 872 }
 873
 874 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
 875 {
 876         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 877         struct vmw_framebuffer_dmabuf *vfbd =
 878                 vmw_framebuffer_to_vfbd(&vfb->base);
 879
 880         if (!vfbd->buffer) {
 881                 WARN_ON(!vfbd->buffer);
 882                 return 0;
 883         }
 884
 885         return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
 886 }
 887
 888 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
 889                                           struct vmw_dma_buffer *dmabuf,
 890                                           struct vmw_framebuffer **out,
 891                                           const struct drm_mode_fb_cmd
 892                                           *mode_cmd)
 893
 894 {
 895         struct drm_device *dev = dev_priv->dev;
 896         struct vmw_framebuffer_dmabuf *vfbd;
 897         unsigned int requested_size;
 898         int ret;
 899
 900         requested_size = mode_cmd->height * mode_cmd->pitch;
 901         if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
 902                 DRM_ERROR("Screen buffer object size is too small "
 903                           "for requested mode.\n");
 904                 return -EINVAL;
 905         }
 906
 907         /* Limited framebuffer color depth support for screen objects */
 908         if (dev_priv->sou_priv) {
 909                 switch (mode_cmd->depth) {
 910                 case 32:
 911                 case 24:
 912                         /* Only support 32 bpp for 32 and 24 depth fbs */
 913                         if (mode_cmd->bpp == 32)
 914                                 break;
 915
 916                         DRM_ERROR("Invalid color depth/bbp: %d %d\n",
 917                                   mode_cmd->depth, mode_cmd->bpp);
 918                         return -EINVAL;
 919                 case 16:
 920                 case 15:
 921                         /* Only support 16 bpp for 16 and 15 depth fbs */
 922                         if (mode_cmd->bpp == 16)
 923                                 break;
 924
 925                         DRM_ERROR("Invalid color depth/bbp: %d %d\n",
 926                                   mode_cmd->depth, mode_cmd->bpp);
 927                         return -EINVAL;
 928                 default:
 929                         DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
 930                         return -EINVAL;
 931                 }
 932         }
 933
 934         vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
 935         if (!vfbd) {
 936                 ret = -ENOMEM;
 937                 goto out_err1;
 938         }
 939
 940         ret = drm_framebuffer_init(dev, &vfbd->base.base,
 941                                    &vmw_framebuffer_dmabuf_funcs);
 942         if (ret)
 943                 goto out_err2;
 944
 945         if (!vmw_dmabuf_reference(dmabuf)) {
 946                 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
 947                 goto out_err3;
 948         }
 949
 950         vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
 951         vfbd->base.base.pitch = mode_cmd->pitch;
 952         vfbd->base.base.depth = mode_cmd->depth;
 953         vfbd->base.base.width = mode_cmd->width;
 954         vfbd->base.base.height = mode_cmd->height;
 955         if (!dev_priv->sou_priv) {
 956                 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
 957                 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
 958         }
 959         vfbd->base.dmabuf = true;
 960         vfbd->buffer = dmabuf;
 961         vfbd->base.user_handle = mode_cmd->handle;
 962         *out = &vfbd->base;
 963
 964         return 0;
 965
 966 out_err3:
 967         drm_framebuffer_cleanup(&vfbd->base.base);
 968 out_err2:
 969         kfree(vfbd);
 970 out_err1:
 971         return ret;
 972 }
 973
 974 /*
 975  * Generic Kernel modesetting functions
 976  */
 977
 978 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
 979                                                  struct drm_file *file_priv,
 980                                                  struct drm_mode_fb_cmd *mode_cmd)
 981 {
 982         struct vmw_private *dev_priv = vmw_priv(dev);
 983         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 984         struct vmw_framebuffer *vfb = NULL;
 985         struct vmw_surface *surface = NULL;
 986         struct vmw_dma_buffer *bo = NULL;
 987         struct ttm_base_object *user_obj;
 988         u64 required_size;
 989         int ret;
 990
 991         /**
 992          * This code should be conditioned on Screen Objects not being used.
 993          * If screen objects are used, we can allocate a GMR to hold the
 994          * requested framebuffer.
 995          */
 996
 997         required_size = mode_cmd->pitch * mode_cmd->height;
 998         if (unlikely(required_size > (u64) dev_priv->vram_size)) {
 999                 DRM_ERROR("VRAM size is too small for requested mode.\n");
1000                 return ERR_PTR(-ENOMEM);
1001         }
1002
1003         /*
1004          * Take a reference on the user object of the resource
1005          * backing the kms fb. This ensures that user-space handle
1006          * lookups on that resource will always work as long as
1007          * it's registered with a kms framebuffer. This is important,
1008          * since vmw_execbuf_process identifies resources in the
1009          * command stream using user-space handles.
1010          */
1011
1012         user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
1013         if (unlikely(user_obj == NULL)) {
1014                 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1015                 return ERR_PTR(-ENOENT);
1016         }
1017
1018         /**
1019          * End conditioned code.
1020          */
1021
1022         ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
1023                                              mode_cmd->handle, &surface);
1024         if (ret)
1025                 goto try_dmabuf;
1026
1027         if (!surface->scanout)
1028                 goto err_not_scanout;
1029
1030         ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
1031                                               &vfb, mode_cmd);
1032
1033         /* vmw_user_surface_lookup takes one ref so does new_fb */
1034         vmw_surface_unreference(&surface);
1035
1036         if (ret) {
1037                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1038                 ttm_base_object_unref(&user_obj);
1039                 return ERR_PTR(ret);
1040         } else
1041                 vfb->user_obj = user_obj;
1042         return &vfb->base;
1043
1044 try_dmabuf:
1045         DRM_INFO("%s: trying buffer\n", __func__);
1046
1047         ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
1048         if (ret) {
1049                 DRM_ERROR("failed to find buffer: %i\n", ret);
1050                 return ERR_PTR(-ENOENT);
1051         }
1052
1053         ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1054                                              mode_cmd);
1055
1056         /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
1057         vmw_dmabuf_unreference(&bo);
1058
1059         if (ret) {
1060                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1061                 ttm_base_object_unref(&user_obj);
1062                 return ERR_PTR(ret);
1063         } else
1064                 vfb->user_obj = user_obj;
1065
1066         return &vfb->base;
1067
1068 err_not_scanout:
1069         DRM_ERROR("surface not marked as scanout\n");
1070         /* vmw_user_surface_lookup takes one ref */
1071         vmw_surface_unreference(&surface);
1072         ttm_base_object_unref(&user_obj);
1073
1074         return ERR_PTR(-EINVAL);
1075 }
1076
1077 static struct drm_mode_config_funcs vmw_kms_funcs = {
1078         .fb_create = vmw_kms_fb_create,
1079 };
1080
1081 int vmw_kms_present(struct vmw_private *dev_priv,
1082                     struct drm_file *file_priv,
1083                     struct vmw_framebuffer *vfb,
1084                     struct vmw_surface *surface,
1085                     uint32_t sid,
1086                     int32_t destX, int32_t destY,
1087                     struct drm_vmw_rect *clips,
1088                     uint32_t num_clips)
1089 {
1090         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1091         struct drm_crtc *crtc;
1092         size_t fifo_size;
1093         int i, k, num_units;
1094         int ret = 0; /* silence warning */
1095
1096         struct {
1097                 SVGA3dCmdHeader header;
1098                 SVGA3dCmdBlitSurfaceToScreen body;
1099         } *cmd;
1100         SVGASignedRect *blits;
1101
1102         num_units = 0;
1103         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1104                 if (crtc->fb != &vfb->base)
1105                         continue;
1106                 units[num_units++] = vmw_crtc_to_du(crtc);
1107         }
1108
1109         BUG_ON(surface == NULL);
1110         BUG_ON(!clips || !num_clips);
1111
1112         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1113         cmd = kmalloc(fifo_size, GFP_KERNEL);
1114         if (unlikely(cmd == NULL)) {
1115                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1116                 return -ENOMEM;
1117         }
1118
1119         /* only need to do this once */
1120         memset(cmd, 0, fifo_size);
1121         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1122         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1123
1124         cmd->body.srcRect.left = 0;
1125         cmd->body.srcRect.right = surface->sizes[0].width;
1126         cmd->body.srcRect.top = 0;
1127         cmd->body.srcRect.bottom = surface->sizes[0].height;
1128
1129         blits = (SVGASignedRect *)&cmd[1];
1130         for (i = 0; i < num_clips; i++) {
1131                 blits[i].left   = clips[i].x;
1132                 blits[i].right  = clips[i].x + clips[i].w;
1133                 blits[i].top    = clips[i].y;
1134                 blits[i].bottom = clips[i].y + clips[i].h;
1135         }
1136
1137         for (k = 0; k < num_units; k++) {
1138                 struct vmw_display_unit *unit = units[k];
1139                 int clip_x1 = destX - unit->crtc.x;
1140                 int clip_y1 = destY - unit->crtc.y;
1141                 int clip_x2 = clip_x1 + surface->sizes[0].width;
1142                 int clip_y2 = clip_y1 + surface->sizes[0].height;
1143
1144                 /* skip any crtcs that misses the clip region */
1145                 if (clip_x1 >= unit->crtc.mode.hdisplay ||
1146                     clip_y1 >= unit->crtc.mode.vdisplay ||
1147                     clip_x2 <= 0 || clip_y2 <= 0)
1148                         continue;
1149
1150                 /* need to reset sid as it is changed by execbuf */
1151                 cmd->body.srcImage.sid = sid;
1152
1153                 cmd->body.destScreenId = unit->unit;
1154
1155                 /*
1156                  * The blit command is a lot more resilient then the
1157                  * readback command when it comes to clip rects. So its
1158                  * okay to go out of bounds.
1159                  */
1160
1161                 cmd->body.destRect.left = clip_x1;
1162                 cmd->body.destRect.right = clip_x2;
1163                 cmd->body.destRect.top = clip_y1;
1164                 cmd->body.destRect.bottom = clip_y2;
1165
1166                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1167                                           fifo_size, 0, NULL);
1168
1169                 if (unlikely(ret != 0))
1170                         break;
1171         }
1172
1173         kfree(cmd);
1174
1175         return ret;
1176 }
1177
1178 int vmw_kms_readback(struct vmw_private *dev_priv,
1179                      struct drm_file *file_priv,
1180                      struct vmw_framebuffer *vfb,
1181                      struct drm_vmw_fence_rep __user *user_fence_rep,
1182                      struct drm_vmw_rect *clips,
1183                      uint32_t num_clips)
1184 {
1185         struct vmw_framebuffer_dmabuf *vfbd =
1186                 vmw_framebuffer_to_vfbd(&vfb->base);
1187         struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1188         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1189         struct drm_crtc *crtc;
1190         size_t fifo_size;
1191         int i, k, ret, num_units, blits_pos;
1192
1193         struct {
1194                 uint32_t header;
1195                 SVGAFifoCmdDefineGMRFB body;
1196         } *cmd;
1197         struct {
1198                 uint32_t header;
1199                 SVGAFifoCmdBlitScreenToGMRFB body;
1200         } *blits;
1201
1202         num_units = 0;
1203         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1204                 if (crtc->fb != &vfb->base)
1205                         continue;
1206                 units[num_units++] = vmw_crtc_to_du(crtc);
1207         }
1208
1209         BUG_ON(dmabuf == NULL);
1210         BUG_ON(!clips || !num_clips);
1211
1212         /* take a safe guess at fifo size */
1213         fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1214         cmd = kmalloc(fifo_size, GFP_KERNEL);
1215         if (unlikely(cmd == NULL)) {
1216                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1217                 return -ENOMEM;
1218         }
1219
1220         memset(cmd, 0, fifo_size);
1221         cmd->header = SVGA_CMD_DEFINE_GMRFB;
1222         cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1223         cmd->body.format.colorDepth = vfb->base.depth;
1224         cmd->body.format.reserved = 0;
1225         cmd->body.bytesPerLine = vfb->base.pitch;
1226         cmd->body.ptr.gmrId = vfb->user_handle;
1227         cmd->body.ptr.offset = 0;
1228
1229         blits = (void *)&cmd[1];
1230         blits_pos = 0;
1231         for (i = 0; i < num_units; i++) {
1232                 struct drm_vmw_rect *c = clips;
1233                 for (k = 0; k < num_clips; k++, c++) {
1234                         /* transform clip coords to crtc origin based coords */
1235                         int clip_x1 = c->x - units[i]->crtc.x;
1236                         int clip_x2 = c->x - units[i]->crtc.x + c->w;
1237                         int clip_y1 = c->y - units[i]->crtc.y;
1238                         int clip_y2 = c->y - units[i]->crtc.y + c->h;
1239                         int dest_x = c->x;
1240                         int dest_y = c->y;
1241
1242                         /* compensate for clipping, we negate
1243                          * a negative number and add that.
1244                          */
1245                         if (clip_x1 < 0)
1246                                 dest_x += -clip_x1;
1247                         if (clip_y1 < 0)
1248                                 dest_y += -clip_y1;
1249
1250                         /* clip */
1251                         clip_x1 = max(clip_x1, 0);
1252                         clip_y1 = max(clip_y1, 0);
1253                         clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1254                         clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1255
1256                         /* and cull any rects that misses the crtc */
1257                         if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1258                             clip_y1 >= units[i]->crtc.mode.vdisplay ||
1259                             clip_x2 <= 0 || clip_y2 <= 0)
1260                                 continue;
1261
1262                         blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1263                         blits[blits_pos].body.srcScreenId = units[i]->unit;
1264                         blits[blits_pos].body.destOrigin.x = dest_x;
1265                         blits[blits_pos].body.destOrigin.y = dest_y;
1266
1267                         blits[blits_pos].body.srcRect.left = clip_x1;
1268                         blits[blits_pos].body.srcRect.top = clip_y1;
1269                         blits[blits_pos].body.srcRect.right = clip_x2;
1270                         blits[blits_pos].body.srcRect.bottom = clip_y2;
1271                         blits_pos++;
1272                 }
1273         }
1274         /* reset size here and use calculated exact size from loops */
1275         fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1276
1277         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1278                                   0, user_fence_rep);
1279
1280         kfree(cmd);
1281
1282         return ret;
1283 }
1284
1285 int vmw_kms_init(struct vmw_private *dev_priv)
1286 {
1287         struct drm_device *dev = dev_priv->dev;
1288         int ret;
1289
1290         drm_mode_config_init(dev);
1291         dev->mode_config.funcs = &vmw_kms_funcs;
1292         dev->mode_config.min_width = 1;
1293         dev->mode_config.min_height = 1;
1294         /* assumed largest fb size */
1295         dev->mode_config.max_width = 8192;
1296         dev->mode_config.max_height = 8192;
1297
1298         ret = vmw_kms_init_screen_object_display(dev_priv);
1299         if (ret) /* Fallback */
1300                 (void)vmw_kms_init_legacy_display_system(dev_priv);
1301
1302         return 0;
1303 }
1304
1305 int vmw_kms_close(struct vmw_private *dev_priv)
1306 {
1307         /*
1308          * Docs says we should take the lock before calling this function
1309          * but since it destroys encoders and our destructor calls
1310          * drm_encoder_cleanup which takes the lock we deadlock.
1311          */
1312         drm_mode_config_cleanup(dev_priv->dev);
1313         vmw_kms_close_legacy_display_system(dev_priv);
1314         return 0;
1315 }
1316
1317 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1318                                 struct drm_file *file_priv)
1319 {
1320         struct drm_vmw_cursor_bypass_arg *arg = data;
1321         struct vmw_display_unit *du;
1322         struct drm_mode_object *obj;
1323         struct drm_crtc *crtc;
1324         int ret = 0;
1325
1326
1327         mutex_lock(&dev->mode_config.mutex);
1328         if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1329
1330                 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1331                         du = vmw_crtc_to_du(crtc);
1332                         du->hotspot_x = arg->xhot;
1333                         du->hotspot_y = arg->yhot;
1334                 }
1335
1336                 mutex_unlock(&dev->mode_config.mutex);
1337                 return 0;
1338         }
1339
1340         obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1341         if (!obj) {
1342                 ret = -EINVAL;
1343                 goto out;
1344         }
1345
1346         crtc = obj_to_crtc(obj);
1347         du = vmw_crtc_to_du(crtc);
1348
1349         du->hotspot_x = arg->xhot;
1350         du->hotspot_y = arg->yhot;
1351
1352 out:
1353         mutex_unlock(&dev->mode_config.mutex);
1354
1355         return ret;
1356 }
1357
1358 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1359                         unsigned width, unsigned height, unsigned pitch,
1360                         unsigned bpp, unsigned depth)
1361 {
1362         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1363                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1364         else if (vmw_fifo_have_pitchlock(vmw_priv))
1365                 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1366         vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1367         vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1368         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1369
1370         if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1371                 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1372                           depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1373                 return -EINVAL;
1374         }
1375
1376         return 0;
1377 }
1378
1379 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1380 {
1381         struct vmw_vga_topology_state *save;
1382         uint32_t i;
1383
1384         vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1385         vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1386         vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1387         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1388                 vmw_priv->vga_pitchlock =
1389                   vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1390         else if (vmw_fifo_have_pitchlock(vmw_priv))
1391                 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1392                                                        SVGA_FIFO_PITCHLOCK);
1393
1394         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1395                 return 0;
1396
1397         vmw_priv->num_displays = vmw_read(vmw_priv,
1398                                           SVGA_REG_NUM_GUEST_DISPLAYS);
1399
1400         if (vmw_priv->num_displays == 0)
1401                 vmw_priv->num_displays = 1;
1402
1403         for (i = 0; i < vmw_priv->num_displays; ++i) {
1404                 save = &vmw_priv->vga_save[i];
1405                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1406                 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1407                 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1408                 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1409                 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1410                 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1411                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1412                 if (i == 0 && vmw_priv->num_displays == 1 &&
1413                     save->width == 0 && save->height == 0) {
1414
1415                         /*
1416                          * It should be fairly safe to assume that these
1417                          * values are uninitialized.
1418                          */
1419
1420                         save->width = vmw_priv->vga_width - save->pos_x;
1421                         save->height = vmw_priv->vga_height - save->pos_y;
1422                 }
1423         }
1424
1425         return 0;
1426 }
1427
1428 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1429 {
1430         struct vmw_vga_topology_state *save;
1431         uint32_t i;
1432
1433         vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1434         vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1435         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1436         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1437                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1438                           vmw_priv->vga_pitchlock);
1439         else if (vmw_fifo_have_pitchlock(vmw_priv))
1440                 iowrite32(vmw_priv->vga_pitchlock,
1441                           vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1442
1443         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1444                 return 0;
1445
1446         for (i = 0; i < vmw_priv->num_displays; ++i) {
1447                 save = &vmw_priv->vga_save[i];
1448                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1449                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1450                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1451                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1452                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1453                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1454                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1455         }
1456
1457         return 0;
1458 }
1459
1460 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1461                                 uint32_t pitch,
1462                                 uint32_t height)
1463 {
1464         return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1465 }
1466
1467
1468 /**
1469  * Function called by DRM code called with vbl_lock held.
1470  */
1471 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1472 {
1473         return 0;
1474 }
1475
1476 /**
1477  * Function called by DRM code called with vbl_lock held.
1478  */
1479 int vmw_enable_vblank(struct drm_device *dev, int crtc)
1480 {
1481         return -ENOSYS;
1482 }
1483
1484 /**
1485  * Function called by DRM code called with vbl_lock held.
1486  */
1487 void vmw_disable_vblank(struct drm_device *dev, int crtc)
1488 {
1489 }
1490
1491
1492 /*
1493  * Small shared kms functions.
1494  */
1495
1496 int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1497                          struct drm_vmw_rect *rects)
1498 {
1499         struct drm_device *dev = dev_priv->dev;
1500         struct vmw_display_unit *du;
1501         struct drm_connector *con;
1502
1503         mutex_lock(&dev->mode_config.mutex);
1504
1505 #if 0
1506         {
1507                 unsigned int i;
1508
1509                 DRM_INFO("%s: new layout ", __func__);
1510                 for (i = 0; i < num; i++)
1511                         DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1512                                  rects[i].w, rects[i].h);
1513                 DRM_INFO("\n");
1514         }
1515 #endif
1516
1517         list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1518                 du = vmw_connector_to_du(con);
1519                 if (num > du->unit) {
1520                         du->pref_width = rects[du->unit].w;
1521                         du->pref_height = rects[du->unit].h;
1522                         du->pref_active = true;
1523                         du->gui_x = rects[du->unit].x;
1524                         du->gui_y = rects[du->unit].y;
1525                 } else {
1526                         du->pref_width = 800;
1527                         du->pref_height = 600;
1528                         du->pref_active = false;
1529                 }
1530                 con->status = vmw_du_connector_detect(con, true);
1531         }
1532
1533         mutex_unlock(&dev->mode_config.mutex);
1534
1535         return 0;
1536 }
1537
1538 void vmw_du_crtc_save(struct drm_crtc *crtc)
1539 {
1540 }
1541
1542 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1543 {
1544 }
1545
1546 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1547                            u16 *r, u16 *g, u16 *b,
1548                            uint32_t start, uint32_t size)
1549 {
1550         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1551         int i;
1552
1553         for (i = 0; i < size; i++) {
1554                 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1555                           r[i], g[i], b[i]);
1556                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1557                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1558                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1559         }
1560 }
1561
1562 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1563 {
1564 }
1565
1566 void vmw_du_connector_save(struct drm_connector *connector)
1567 {
1568 }
1569
1570 void vmw_du_connector_restore(struct drm_connector *connector)
1571 {
1572 }
1573
1574 enum drm_connector_status
1575 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1576 {
1577         uint32_t num_displays;
1578         struct drm_device *dev = connector->dev;
1579         struct vmw_private *dev_priv = vmw_priv(dev);
1580         struct vmw_display_unit *du = vmw_connector_to_du(connector);
1581
1582         mutex_lock(&dev_priv->hw_mutex);
1583         num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1584         mutex_unlock(&dev_priv->hw_mutex);
1585
1586         return ((vmw_connector_to_du(connector)->unit < num_displays &&
1587                  du->pref_active) ?
1588                 connector_status_connected : connector_status_disconnected);
1589 }
1590
1591 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1592         /* 640x480@60Hz */
1593         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1594                    752, 800, 0, 480, 489, 492, 525, 0,
1595                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1596         /* 800x600@60Hz */
1597         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1598                    968, 1056, 0, 600, 601, 605, 628, 0,
1599                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1600         /* 1024x768@60Hz */
1601         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1602                    1184, 1344, 0, 768, 771, 777, 806, 0,
1603                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1604         /* 1152x864@75Hz */
1605         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1606                    1344, 1600, 0, 864, 865, 868, 900, 0,
1607                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1608         /* 1280x768@60Hz */
1609         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1610                    1472, 1664, 0, 768, 771, 778, 798, 0,
1611                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1612         /* 1280x800@60Hz */
1613         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1614                    1480, 1680, 0, 800, 803, 809, 831, 0,
1615                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1616         /* 1280x960@60Hz */
1617         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1618                    1488, 1800, 0, 960, 961, 964, 1000, 0,
1619                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1620         /* 1280x1024@60Hz */
1621         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1622                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1623                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1624         /* 1360x768@60Hz */
1625         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1626                    1536, 1792, 0, 768, 771, 777, 795, 0,
1627                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1628         /* 1440x1050@60Hz */
1629         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1630                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1631                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1632         /* 1440x900@60Hz */
1633         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1634                    1672, 1904, 0, 900, 903, 909, 934, 0,
1635                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1636         /* 1600x1200@60Hz */
1637         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1638                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1639                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1640         /* 1680x1050@60Hz */
1641         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1642                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1643                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1644         /* 1792x1344@60Hz */
1645         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1646                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1647                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1648         /* 1853x1392@60Hz */
1649         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1650                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1651                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1652         /* 1920x1200@60Hz */
1653         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1654                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1655                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1656         /* 1920x1440@60Hz */
1657         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1658                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1659                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1660         /* 2560x1600@60Hz */
1661         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1662                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1663                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1664         /* Terminate */
1665         { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1666 };
1667
1668 /**
1669  * vmw_guess_mode_timing - Provide fake timings for a
1670  * 60Hz vrefresh mode.
1671  *
1672  * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1673  * members filled in.
1674  */
1675 static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1676 {
1677         mode->hsync_start = mode->hdisplay + 50;
1678         mode->hsync_end = mode->hsync_start + 50;
1679         mode->htotal = mode->hsync_end + 50;
1680
1681         mode->vsync_start = mode->vdisplay + 50;
1682         mode->vsync_end = mode->vsync_start + 50;
1683         mode->vtotal = mode->vsync_end + 50;
1684
1685         mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1686         mode->vrefresh = drm_mode_vrefresh(mode);
1687 }
1688
1689
1690 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1691                                 uint32_t max_width, uint32_t max_height)
1692 {
1693         struct vmw_display_unit *du = vmw_connector_to_du(connector);
1694         struct drm_device *dev = connector->dev;
1695         struct vmw_private *dev_priv = vmw_priv(dev);
1696         struct drm_display_mode *mode = NULL;
1697         struct drm_display_mode *bmode;
1698         struct drm_display_mode prefmode = { DRM_MODE("preferred",
1699                 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1700                 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1701                 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1702         };
1703         int i;
1704
1705         /* Add preferred mode */
1706         {
1707                 mode = drm_mode_duplicate(dev, &prefmode);
1708                 if (!mode)
1709                         return 0;
1710                 mode->hdisplay = du->pref_width;
1711                 mode->vdisplay = du->pref_height;
1712                 vmw_guess_mode_timing(mode);
1713
1714                 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1715                                                mode->vdisplay)) {
1716                         drm_mode_probed_add(connector, mode);
1717                 } else {
1718                         drm_mode_destroy(dev, mode);
1719                         mode = NULL;
1720                 }
1721
1722                 if (du->pref_mode) {
1723                         list_del_init(&du->pref_mode->head);
1724                         drm_mode_destroy(dev, du->pref_mode);
1725                 }
1726
1727                 /* mode might be null here, this is intended */
1728                 du->pref_mode = mode;
1729         }
1730
1731         for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1732                 bmode = &vmw_kms_connector_builtin[i];
1733                 if (bmode->hdisplay > max_width ||
1734                     bmode->vdisplay > max_height)
1735                         continue;
1736
1737                 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1738                                                 bmode->vdisplay))
1739                         continue;
1740
1741                 mode = drm_mode_duplicate(dev, bmode);
1742                 if (!mode)
1743                         return 0;
1744                 mode->vrefresh = drm_mode_vrefresh(mode);
1745
1746                 drm_mode_probed_add(connector, mode);
1747         }
1748
1749         drm_mode_connector_list_update(connector);
1750
1751         return 1;
1752 }
1753
1754 int vmw_du_connector_set_property(struct drm_connector *connector,
1755                                   struct drm_property *property,
1756                                   uint64_t val)
1757 {
1758         return 0;
1759 }
1760
1761
1762 int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1763                                 struct drm_file *file_priv)
1764 {
1765         struct vmw_private *dev_priv = vmw_priv(dev);
1766         struct drm_vmw_update_layout_arg *arg =
1767                 (struct drm_vmw_update_layout_arg *)data;
1768         struct vmw_master *vmaster = vmw_master(file_priv->master);
1769         void __user *user_rects;
1770         struct drm_vmw_rect *rects;
1771         unsigned rects_size;
1772         int ret;
1773         int i;
1774         struct drm_mode_config *mode_config = &dev->mode_config;
1775
1776         ret = ttm_read_lock(&vmaster->lock, true);
1777         if (unlikely(ret != 0))
1778                 return ret;
1779
1780         if (!arg->num_outputs) {
1781                 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1782                 vmw_du_update_layout(dev_priv, 1, &def_rect);
1783                 goto out_unlock;
1784         }
1785
1786         rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1787         rects = kzalloc(rects_size, GFP_KERNEL);
1788         if (unlikely(!rects)) {
1789                 ret = -ENOMEM;
1790                 goto out_unlock;
1791         }
1792
1793         user_rects = (void __user *)(unsigned long)arg->rects;
1794         ret = copy_from_user(rects, user_rects, rects_size);
1795         if (unlikely(ret != 0)) {
1796                 DRM_ERROR("Failed to get rects.\n");
1797                 ret = -EFAULT;
1798                 goto out_free;
1799         }
1800
1801         for (i = 0; i < arg->num_outputs; ++i) {
1802                 if (rects->x < 0 ||
1803                     rects->y < 0 ||
1804                     rects->x + rects->w > mode_config->max_width ||
1805                     rects->y + rects->h > mode_config->max_height) {
1806                         DRM_ERROR("Invalid GUI layout.\n");
1807                         ret = -EINVAL;
1808                         goto out_free;
1809                 }
1810         }
1811
1812         vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1813
1814 out_free:
1815         kfree(rects);
1816 out_unlock:
1817         ttm_read_unlock(&vmaster->lock);
1818         return ret;
1819 }