1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
220 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0 ,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0 ,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
846 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
847 pf->stat_offsets_loaded,
848 &osd->priority_xoff_rx[i],
849 &nsd->priority_xoff_rx[i]);
851 /* No new PFC xoff rx */
852 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
854 /* Get the TC for given priority */
855 tc = dcb_cfg->etscfg.prioritytable[i];
861 * i40e_update_vsi_stats - Update the vsi statistics counters.
862 * @vsi: the VSI to be updated
864 * There are a few instances where we store the same stat in a
865 * couple of different structs. This is partly because we have
866 * the netdev stats that need to be filled out, which is slightly
867 * different from the "eth_stats" defined by the chip and used in
868 * VF communications. We sort it out here.
870 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
872 struct i40e_pf *pf = vsi->back;
873 struct rtnl_link_stats64 *ons;
874 struct rtnl_link_stats64 *ns; /* netdev stats */
875 struct i40e_eth_stats *oes;
876 struct i40e_eth_stats *es; /* device's eth stats */
877 u32 tx_restart, tx_busy;
886 if (test_bit(__I40E_DOWN, &vsi->state) ||
887 test_bit(__I40E_CONFIG_BUSY, &pf->state))
890 ns = i40e_get_vsi_stats_struct(vsi);
891 ons = &vsi->net_stats_offsets;
892 es = &vsi->eth_stats;
893 oes = &vsi->eth_stats_offsets;
895 /* Gather up the netdev and vsi stats that the driver collects
896 * on the fly during packet processing
900 tx_restart = tx_busy = 0;
904 for (q = 0; q < vsi->num_queue_pairs; q++) {
906 p = ACCESS_ONCE(vsi->tx_rings[q]);
909 start = u64_stats_fetch_begin_irq(&p->syncp);
910 packets = p->stats.packets;
911 bytes = p->stats.bytes;
912 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
915 tx_restart += p->tx_stats.restart_queue;
916 tx_busy += p->tx_stats.tx_busy;
918 /* Rx queue is part of the same block as Tx queue */
921 start = u64_stats_fetch_begin_irq(&p->syncp);
922 packets = p->stats.packets;
923 bytes = p->stats.bytes;
924 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
927 rx_buf += p->rx_stats.alloc_buff_failed;
928 rx_page += p->rx_stats.alloc_page_failed;
931 vsi->tx_restart = tx_restart;
932 vsi->tx_busy = tx_busy;
933 vsi->rx_page_failed = rx_page;
934 vsi->rx_buf_failed = rx_buf;
936 ns->rx_packets = rx_p;
938 ns->tx_packets = tx_p;
941 /* update netdev stats from eth stats */
942 i40e_update_eth_stats(vsi);
943 ons->tx_errors = oes->tx_errors;
944 ns->tx_errors = es->tx_errors;
945 ons->multicast = oes->rx_multicast;
946 ns->multicast = es->rx_multicast;
947 ons->rx_dropped = oes->rx_discards;
948 ns->rx_dropped = es->rx_discards;
949 ons->tx_dropped = oes->tx_discards;
950 ns->tx_dropped = es->tx_discards;
952 /* pull in a couple PF stats if this is the main vsi */
953 if (vsi == pf->vsi[pf->lan_vsi]) {
954 ns->rx_crc_errors = pf->stats.crc_errors;
955 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
956 ns->rx_length_errors = pf->stats.rx_length_errors;
961 * i40e_update_pf_stats - Update the PF statistics counters.
962 * @pf: the PF to be updated
964 static void i40e_update_pf_stats(struct i40e_pf *pf)
966 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
967 struct i40e_hw_port_stats *nsd = &pf->stats;
968 struct i40e_hw *hw = &pf->hw;
972 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
973 I40E_GLPRT_GORCL(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
976 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
977 I40E_GLPRT_GOTCL(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
980 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.rx_discards,
983 &nsd->eth.rx_discards);
984 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
985 I40E_GLPRT_UPRCL(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->eth.rx_unicast,
988 &nsd->eth.rx_unicast);
989 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
990 I40E_GLPRT_MPRCL(hw->port),
991 pf->stat_offsets_loaded,
992 &osd->eth.rx_multicast,
993 &nsd->eth.rx_multicast);
994 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
995 I40E_GLPRT_BPRCL(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->eth.rx_broadcast,
998 &nsd->eth.rx_broadcast);
999 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1000 I40E_GLPRT_UPTCL(hw->port),
1001 pf->stat_offsets_loaded,
1002 &osd->eth.tx_unicast,
1003 &nsd->eth.tx_unicast);
1004 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1005 I40E_GLPRT_MPTCL(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->eth.tx_multicast,
1008 &nsd->eth.tx_multicast);
1009 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1010 I40E_GLPRT_BPTCL(hw->port),
1011 pf->stat_offsets_loaded,
1012 &osd->eth.tx_broadcast,
1013 &nsd->eth.tx_broadcast);
1015 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->tx_dropped_link_down,
1018 &nsd->tx_dropped_link_down);
1020 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->crc_errors, &nsd->crc_errors);
1024 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->illegal_bytes, &nsd->illegal_bytes);
1028 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->mac_local_faults,
1031 &nsd->mac_local_faults);
1032 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->mac_remote_faults,
1035 &nsd->mac_remote_faults);
1037 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_length_errors,
1040 &nsd->rx_length_errors);
1042 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->link_xon_rx, &nsd->link_xon_rx);
1045 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xon_tx, &nsd->link_xon_tx);
1048 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1049 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1053 for (i = 0; i < 8; i++) {
1054 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1055 pf->stat_offsets_loaded,
1056 &osd->priority_xon_rx[i],
1057 &nsd->priority_xon_rx[i]);
1058 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xon_tx[i],
1061 &nsd->priority_xon_tx[i]);
1062 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1063 pf->stat_offsets_loaded,
1064 &osd->priority_xoff_tx[i],
1065 &nsd->priority_xoff_tx[i]);
1066 i40e_stat_update32(hw,
1067 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1068 pf->stat_offsets_loaded,
1069 &osd->priority_xon_2_xoff[i],
1070 &nsd->priority_xon_2_xoff[i]);
1073 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1074 I40E_GLPRT_PRC64L(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_size_64, &nsd->rx_size_64);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1078 I40E_GLPRT_PRC127L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_127, &nsd->rx_size_127);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1082 I40E_GLPRT_PRC255L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_255, &nsd->rx_size_255);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1086 I40E_GLPRT_PRC511L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_511, &nsd->rx_size_511);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1090 I40E_GLPRT_PRC1023L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_1023, &nsd->rx_size_1023);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1094 I40E_GLPRT_PRC1522L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_1522, &nsd->rx_size_1522);
1097 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1098 I40E_GLPRT_PRC9522L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_size_big, &nsd->rx_size_big);
1102 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1103 I40E_GLPRT_PTC64L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->tx_size_64, &nsd->tx_size_64);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1107 I40E_GLPRT_PTC127L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_127, &nsd->tx_size_127);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1111 I40E_GLPRT_PTC255L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_255, &nsd->tx_size_255);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1115 I40E_GLPRT_PTC511L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_511, &nsd->tx_size_511);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1119 I40E_GLPRT_PTC1023L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_1023, &nsd->tx_size_1023);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1123 I40E_GLPRT_PTC1522L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_1522, &nsd->tx_size_1522);
1126 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1127 I40E_GLPRT_PTC9522L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->tx_size_big, &nsd->tx_size_big);
1131 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->rx_undersize, &nsd->rx_undersize);
1134 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_fragments, &nsd->rx_fragments);
1137 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_oversize, &nsd->rx_oversize);
1140 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_jabber, &nsd->rx_jabber);
1145 i40e_stat_update32(hw,
1146 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1147 pf->stat_offsets_loaded,
1148 &osd->fd_atr_match, &nsd->fd_atr_match);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_sb_match, &nsd->fd_sb_match);
1153 i40e_stat_update32(hw,
1154 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1155 pf->stat_offsets_loaded,
1156 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1158 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1159 nsd->tx_lpi_status =
1160 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1161 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1162 nsd->rx_lpi_status =
1163 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1164 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1165 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1166 pf->stat_offsets_loaded,
1167 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1168 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1169 pf->stat_offsets_loaded,
1170 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1172 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1173 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1174 nsd->fd_sb_status = true;
1176 nsd->fd_sb_status = false;
1178 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1179 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1180 nsd->fd_atr_status = true;
1182 nsd->fd_atr_status = false;
1184 pf->stat_offsets_loaded = true;
1188 * i40e_update_stats - Update the various statistics counters.
1189 * @vsi: the VSI to be updated
1191 * Update the various stats for this VSI and its related entities.
1193 void i40e_update_stats(struct i40e_vsi *vsi)
1195 struct i40e_pf *pf = vsi->back;
1197 if (vsi == pf->vsi[pf->lan_vsi])
1198 i40e_update_pf_stats(pf);
1200 i40e_update_vsi_stats(vsi);
1202 i40e_update_fcoe_stats(vsi);
1207 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1208 * @vsi: the VSI to be searched
1209 * @macaddr: the MAC address
1211 * @is_vf: make sure its a VF filter, else doesn't matter
1212 * @is_netdev: make sure its a netdev filter, else doesn't matter
1214 * Returns ptr to the filter object or NULL
1216 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1217 u8 *macaddr, s16 vlan,
1218 bool is_vf, bool is_netdev)
1220 struct i40e_mac_filter *f;
1222 if (!vsi || !macaddr)
1225 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1226 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1227 (vlan == f->vlan) &&
1228 (!is_vf || f->is_vf) &&
1229 (!is_netdev || f->is_netdev))
1236 * i40e_find_mac - Find a mac addr in the macvlan filters list
1237 * @vsi: the VSI to be searched
1238 * @macaddr: the MAC address we are searching for
1239 * @is_vf: make sure its a VF filter, else doesn't matter
1240 * @is_netdev: make sure its a netdev filter, else doesn't matter
1242 * Returns the first filter with the provided MAC address or NULL if
1243 * MAC address was not found
1245 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1246 bool is_vf, bool is_netdev)
1248 struct i40e_mac_filter *f;
1250 if (!vsi || !macaddr)
1253 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1254 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1255 (!is_vf || f->is_vf) &&
1256 (!is_netdev || f->is_netdev))
1263 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1264 * @vsi: the VSI to be searched
1266 * Returns true if VSI is in vlan mode or false otherwise
1268 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1270 struct i40e_mac_filter *f;
1272 /* Only -1 for all the filters denotes not in vlan mode
1273 * so we have to go through all the list in order to make sure
1275 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1276 if (f->vlan >= 0 || vsi->info.pvid)
1284 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1285 * @vsi: the VSI to be searched
1286 * @macaddr: the mac address to be filtered
1287 * @is_vf: true if it is a VF
1288 * @is_netdev: true if it is a netdev
1290 * Goes through all the macvlan filters and adds a
1291 * macvlan filter for each unique vlan that already exists
1293 * Returns first filter found on success, else NULL
1295 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1296 bool is_vf, bool is_netdev)
1298 struct i40e_mac_filter *f;
1300 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1302 f->vlan = le16_to_cpu(vsi->info.pvid);
1303 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1304 is_vf, is_netdev)) {
1305 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1311 return list_first_entry_or_null(&vsi->mac_filter_list,
1312 struct i40e_mac_filter, list);
1316 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1317 * @vsi: the PF Main VSI - inappropriate for any other VSI
1318 * @macaddr: the MAC address
1320 * Some older firmware configurations set up a default promiscuous VLAN
1321 * filter that needs to be removed.
1323 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1325 struct i40e_aqc_remove_macvlan_element_data element;
1326 struct i40e_pf *pf = vsi->back;
1329 /* Only appropriate for the PF main VSI */
1330 if (vsi->type != I40E_VSI_MAIN)
1333 memset(&element, 0, sizeof(element));
1334 ether_addr_copy(element.mac_addr, macaddr);
1335 element.vlan_tag = 0;
1336 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1337 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1338 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1346 * i40e_add_filter - Add a mac/vlan filter to the VSI
1347 * @vsi: the VSI to be searched
1348 * @macaddr: the MAC address
1350 * @is_vf: make sure its a VF filter, else doesn't matter
1351 * @is_netdev: make sure its a netdev filter, else doesn't matter
1353 * Returns ptr to the filter object or NULL when no memory available.
1355 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1356 u8 *macaddr, s16 vlan,
1357 bool is_vf, bool is_netdev)
1359 struct i40e_mac_filter *f;
1361 if (!vsi || !macaddr)
1364 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1366 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1368 goto add_filter_out;
1370 ether_addr_copy(f->macaddr, macaddr);
1374 INIT_LIST_HEAD(&f->list);
1375 list_add(&f->list, &vsi->mac_filter_list);
1378 /* increment counter and add a new flag if needed */
1384 } else if (is_netdev) {
1385 if (!f->is_netdev) {
1386 f->is_netdev = true;
1393 /* changed tells sync_filters_subtask to
1394 * push the filter down to the firmware
1397 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1398 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1406 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1407 * @vsi: the VSI to be searched
1408 * @macaddr: the MAC address
1410 * @is_vf: make sure it's a VF filter, else doesn't matter
1411 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1413 void i40e_del_filter(struct i40e_vsi *vsi,
1414 u8 *macaddr, s16 vlan,
1415 bool is_vf, bool is_netdev)
1417 struct i40e_mac_filter *f;
1419 if (!vsi || !macaddr)
1422 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1423 if (!f || f->counter == 0)
1431 } else if (is_netdev) {
1433 f->is_netdev = false;
1437 /* make sure we don't remove a filter in use by VF or netdev */
1439 min_f += (f->is_vf ? 1 : 0);
1440 min_f += (f->is_netdev ? 1 : 0);
1442 if (f->counter > min_f)
1446 /* counter == 0 tells sync_filters_subtask to
1447 * remove the filter from the firmware's list
1449 if (f->counter == 0) {
1451 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1452 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1457 * i40e_set_mac - NDO callback to set mac address
1458 * @netdev: network interface device structure
1459 * @p: pointer to an address structure
1461 * Returns 0 on success, negative on failure
1464 int i40e_set_mac(struct net_device *netdev, void *p)
1466 static int i40e_set_mac(struct net_device *netdev, void *p)
1469 struct i40e_netdev_priv *np = netdev_priv(netdev);
1470 struct i40e_vsi *vsi = np->vsi;
1471 struct i40e_pf *pf = vsi->back;
1472 struct i40e_hw *hw = &pf->hw;
1473 struct sockaddr *addr = p;
1474 struct i40e_mac_filter *f;
1476 if (!is_valid_ether_addr(addr->sa_data))
1477 return -EADDRNOTAVAIL;
1479 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1480 netdev_info(netdev, "already using mac address %pM\n",
1485 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1486 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1487 return -EADDRNOTAVAIL;
1489 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1490 netdev_info(netdev, "returning to hw mac address %pM\n",
1493 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1495 if (vsi->type == I40E_VSI_MAIN) {
1497 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1498 I40E_AQC_WRITE_TYPE_LAA_WOL,
1499 addr->sa_data, NULL);
1502 "Addr change for Main VSI failed: %d\n",
1504 return -EADDRNOTAVAIL;
1508 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1509 struct i40e_aqc_remove_macvlan_element_data element;
1511 memset(&element, 0, sizeof(element));
1512 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1513 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1516 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1520 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1521 struct i40e_aqc_add_macvlan_element_data element;
1523 memset(&element, 0, sizeof(element));
1524 ether_addr_copy(element.mac_addr, hw->mac.addr);
1525 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1526 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1528 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1534 i40e_sync_vsi_filters(vsi, false);
1535 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1541 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1542 * @vsi: the VSI being setup
1543 * @ctxt: VSI context structure
1544 * @enabled_tc: Enabled TCs bitmap
1545 * @is_add: True if called before Add VSI
1547 * Setup VSI queue mapping for enabled traffic classes.
1550 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1551 struct i40e_vsi_context *ctxt,
1555 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1556 struct i40e_vsi_context *ctxt,
1561 struct i40e_pf *pf = vsi->back;
1571 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1574 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1575 /* Find numtc from enabled TC bitmap */
1576 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1577 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1581 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1585 /* At least TC0 is enabled in case of non-DCB case */
1589 vsi->tc_config.numtc = numtc;
1590 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1591 /* Number of queues per enabled TC */
1592 /* In MFP case we can have a much lower count of MSIx
1593 * vectors available and so we need to lower the used
1596 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1597 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1599 qcount = vsi->alloc_queue_pairs;
1600 num_tc_qps = qcount / numtc;
1601 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1603 /* Setup queue offset/count for all TCs for given VSI */
1604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1605 /* See if the given TC is enabled for the given VSI */
1606 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1610 switch (vsi->type) {
1612 qcount = min_t(int, pf->rss_size, num_tc_qps);
1616 qcount = num_tc_qps;
1620 case I40E_VSI_SRIOV:
1621 case I40E_VSI_VMDQ2:
1623 qcount = num_tc_qps;
1627 vsi->tc_config.tc_info[i].qoffset = offset;
1628 vsi->tc_config.tc_info[i].qcount = qcount;
1630 /* find the next higher power-of-2 of num queue pairs */
1633 while (num_qps && (BIT_ULL(pow) < qcount)) {
1638 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1640 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1641 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1645 /* TC is not enabled so set the offset to
1646 * default queue and allocate one queue
1649 vsi->tc_config.tc_info[i].qoffset = 0;
1650 vsi->tc_config.tc_info[i].qcount = 1;
1651 vsi->tc_config.tc_info[i].netdev_tc = 0;
1655 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1658 /* Set actual Tx/Rx queue pairs */
1659 vsi->num_queue_pairs = offset;
1660 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1661 if (vsi->req_queue_pairs > 0)
1662 vsi->num_queue_pairs = vsi->req_queue_pairs;
1663 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1664 vsi->num_queue_pairs = pf->num_lan_msix;
1667 /* Scheduler section valid can only be set for ADD VSI */
1669 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1671 ctxt->info.up_enable_bits = enabled_tc;
1673 if (vsi->type == I40E_VSI_SRIOV) {
1674 ctxt->info.mapping_flags |=
1675 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1676 for (i = 0; i < vsi->num_queue_pairs; i++)
1677 ctxt->info.queue_mapping[i] =
1678 cpu_to_le16(vsi->base_queue + i);
1680 ctxt->info.mapping_flags |=
1681 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1682 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1684 ctxt->info.valid_sections |= cpu_to_le16(sections);
1688 * i40e_set_rx_mode - NDO callback to set the netdev filters
1689 * @netdev: network interface device structure
1692 void i40e_set_rx_mode(struct net_device *netdev)
1694 static void i40e_set_rx_mode(struct net_device *netdev)
1697 struct i40e_netdev_priv *np = netdev_priv(netdev);
1698 struct i40e_mac_filter *f, *ftmp;
1699 struct i40e_vsi *vsi = np->vsi;
1700 struct netdev_hw_addr *uca;
1701 struct netdev_hw_addr *mca;
1702 struct netdev_hw_addr *ha;
1704 /* add addr if not already in the filter list */
1705 netdev_for_each_uc_addr(uca, netdev) {
1706 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1707 if (i40e_is_vsi_in_vlan(vsi))
1708 i40e_put_mac_in_vlan(vsi, uca->addr,
1711 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1716 netdev_for_each_mc_addr(mca, netdev) {
1717 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1718 if (i40e_is_vsi_in_vlan(vsi))
1719 i40e_put_mac_in_vlan(vsi, mca->addr,
1722 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1727 /* remove filter if not in netdev list */
1728 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1733 netdev_for_each_mc_addr(mca, netdev)
1734 if (ether_addr_equal(mca->addr, f->macaddr))
1735 goto bottom_of_search_loop;
1737 netdev_for_each_uc_addr(uca, netdev)
1738 if (ether_addr_equal(uca->addr, f->macaddr))
1739 goto bottom_of_search_loop;
1741 for_each_dev_addr(netdev, ha)
1742 if (ether_addr_equal(ha->addr, f->macaddr))
1743 goto bottom_of_search_loop;
1745 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1746 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1748 bottom_of_search_loop:
1752 /* check for other flag changes */
1753 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1754 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1755 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1760 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1761 * @vsi: ptr to the VSI
1762 * @grab_rtnl: whether RTNL needs to be grabbed
1764 * Push any outstanding VSI filter changes through the AdminQ.
1766 * Returns 0 or error value
1768 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1770 struct i40e_mac_filter *f, *ftmp;
1771 bool promisc_forced_on = false;
1772 bool add_happened = false;
1773 int filter_list_len = 0;
1774 u32 changed_flags = 0;
1775 i40e_status ret = 0;
1782 /* empty array typed pointers, kcalloc later */
1783 struct i40e_aqc_add_macvlan_element_data *add_list;
1784 struct i40e_aqc_remove_macvlan_element_data *del_list;
1786 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1787 usleep_range(1000, 2000);
1791 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1792 vsi->current_netdev_flags = vsi->netdev->flags;
1795 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1796 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1798 filter_list_len = pf->hw.aq.asq_buf_size /
1799 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1800 del_list = kcalloc(filter_list_len,
1801 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1806 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1810 if (f->counter != 0)
1815 /* add to delete list */
1816 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1817 del_list[num_del].vlan_tag =
1818 cpu_to_le16((u16)(f->vlan ==
1819 I40E_VLAN_ANY ? 0 : f->vlan));
1821 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1822 del_list[num_del].flags = cmd_flags;
1825 /* unlink from filter list */
1829 /* flush a full buffer */
1830 if (num_del == filter_list_len) {
1831 ret = i40e_aq_remove_macvlan(&pf->hw,
1832 vsi->seid, del_list, num_del,
1834 aq_err = pf->hw.aq.asq_last_status;
1836 memset(del_list, 0, sizeof(*del_list));
1838 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1839 dev_info(&pf->pdev->dev,
1840 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1841 i40e_stat_str(&pf->hw, ret),
1842 i40e_aq_str(&pf->hw, aq_err));
1846 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1847 del_list, num_del, NULL);
1848 aq_err = pf->hw.aq.asq_last_status;
1851 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1852 dev_info(&pf->pdev->dev,
1853 "ignoring delete macvlan error, err %s aq_err %s\n",
1854 i40e_stat_str(&pf->hw, ret),
1855 i40e_aq_str(&pf->hw, aq_err));
1861 /* do all the adds now */
1862 filter_list_len = pf->hw.aq.asq_buf_size /
1863 sizeof(struct i40e_aqc_add_macvlan_element_data),
1864 add_list = kcalloc(filter_list_len,
1865 sizeof(struct i40e_aqc_add_macvlan_element_data),
1870 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1874 if (f->counter == 0)
1877 add_happened = true;
1880 /* add to add array */
1881 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1882 add_list[num_add].vlan_tag =
1884 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1885 add_list[num_add].queue_number = 0;
1887 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1888 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1891 /* flush a full buffer */
1892 if (num_add == filter_list_len) {
1893 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1896 aq_err = pf->hw.aq.asq_last_status;
1901 memset(add_list, 0, sizeof(*add_list));
1905 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1906 add_list, num_add, NULL);
1907 aq_err = pf->hw.aq.asq_last_status;
1913 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1914 dev_info(&pf->pdev->dev,
1915 "add filter failed, err %s aq_err %s\n",
1916 i40e_stat_str(&pf->hw, ret),
1917 i40e_aq_str(&pf->hw, aq_err));
1918 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1919 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1921 promisc_forced_on = true;
1922 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1924 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1929 /* check for changes in promiscuous modes */
1930 if (changed_flags & IFF_ALLMULTI) {
1931 bool cur_multipromisc;
1932 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1933 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1938 dev_info(&pf->pdev->dev,
1939 "set multi promisc failed, err %s aq_err %s\n",
1940 i40e_stat_str(&pf->hw, ret),
1941 i40e_aq_str(&pf->hw,
1942 pf->hw.aq.asq_last_status));
1944 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1946 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1947 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1949 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1950 /* set defport ON for Main VSI instead of true promisc
1951 * this way we will get all unicast/multicast and VLAN
1952 * promisc behavior but will not get VF or VMDq traffic
1953 * replicated on the Main VSI.
1955 if (pf->cur_promisc != cur_promisc) {
1956 pf->cur_promisc = cur_promisc;
1958 i40e_do_reset_safe(pf,
1959 BIT(__I40E_PF_RESET_REQUESTED));
1962 BIT(__I40E_PF_RESET_REQUESTED));
1965 ret = i40e_aq_set_vsi_unicast_promiscuous(
1970 dev_info(&pf->pdev->dev,
1971 "set unicast promisc failed, err %d, aq_err %d\n",
1972 ret, pf->hw.aq.asq_last_status);
1973 ret = i40e_aq_set_vsi_multicast_promiscuous(
1978 dev_info(&pf->pdev->dev,
1979 "set multicast promisc failed, err %d, aq_err %d\n",
1980 ret, pf->hw.aq.asq_last_status);
1982 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1986 dev_info(&pf->pdev->dev,
1987 "set brdcast promisc failed, err %s, aq_err %s\n",
1988 i40e_stat_str(&pf->hw, ret),
1989 i40e_aq_str(&pf->hw,
1990 pf->hw.aq.asq_last_status));
1993 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1998 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1999 * @pf: board private structure
2001 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2005 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2007 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2009 for (v = 0; v < pf->num_alloc_vsi; v++) {
2011 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2012 i40e_sync_vsi_filters(pf->vsi[v], true);
2017 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2018 * @netdev: network interface device structure
2019 * @new_mtu: new value for maximum frame size
2021 * Returns 0 on success, negative on failure
2023 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2025 struct i40e_netdev_priv *np = netdev_priv(netdev);
2026 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2027 struct i40e_vsi *vsi = np->vsi;
2029 /* MTU < 68 is an error and causes problems on some kernels */
2030 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2033 netdev_info(netdev, "changing MTU from %d to %d\n",
2034 netdev->mtu, new_mtu);
2035 netdev->mtu = new_mtu;
2036 if (netif_running(netdev))
2037 i40e_vsi_reinit_locked(vsi);
2043 * i40e_ioctl - Access the hwtstamp interface
2044 * @netdev: network interface device structure
2045 * @ifr: interface request data
2046 * @cmd: ioctl command
2048 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2050 struct i40e_netdev_priv *np = netdev_priv(netdev);
2051 struct i40e_pf *pf = np->vsi->back;
2055 return i40e_ptp_get_ts_config(pf, ifr);
2057 return i40e_ptp_set_ts_config(pf, ifr);
2064 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2065 * @vsi: the vsi being adjusted
2067 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2069 struct i40e_vsi_context ctxt;
2072 if ((vsi->info.valid_sections &
2073 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2074 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2075 return; /* already enabled */
2077 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2078 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2079 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2081 ctxt.seid = vsi->seid;
2082 ctxt.info = vsi->info;
2083 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2085 dev_info(&vsi->back->pdev->dev,
2086 "update vlan stripping failed, err %s aq_err %s\n",
2087 i40e_stat_str(&vsi->back->hw, ret),
2088 i40e_aq_str(&vsi->back->hw,
2089 vsi->back->hw.aq.asq_last_status));
2094 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2095 * @vsi: the vsi being adjusted
2097 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2099 struct i40e_vsi_context ctxt;
2102 if ((vsi->info.valid_sections &
2103 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2104 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2105 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2106 return; /* already disabled */
2108 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2109 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2110 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2112 ctxt.seid = vsi->seid;
2113 ctxt.info = vsi->info;
2114 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2116 dev_info(&vsi->back->pdev->dev,
2117 "update vlan stripping failed, err %s aq_err %s\n",
2118 i40e_stat_str(&vsi->back->hw, ret),
2119 i40e_aq_str(&vsi->back->hw,
2120 vsi->back->hw.aq.asq_last_status));
2125 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2126 * @netdev: network interface to be adjusted
2127 * @features: netdev features to test if VLAN offload is enabled or not
2129 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2131 struct i40e_netdev_priv *np = netdev_priv(netdev);
2132 struct i40e_vsi *vsi = np->vsi;
2134 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2135 i40e_vlan_stripping_enable(vsi);
2137 i40e_vlan_stripping_disable(vsi);
2141 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2142 * @vsi: the vsi being configured
2143 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2145 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2147 struct i40e_mac_filter *f, *add_f;
2148 bool is_netdev, is_vf;
2150 is_vf = (vsi->type == I40E_VSI_SRIOV);
2151 is_netdev = !!(vsi->netdev);
2154 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2157 dev_info(&vsi->back->pdev->dev,
2158 "Could not add vlan filter %d for %pM\n",
2159 vid, vsi->netdev->dev_addr);
2164 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2165 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2167 dev_info(&vsi->back->pdev->dev,
2168 "Could not add vlan filter %d for %pM\n",
2174 /* Now if we add a vlan tag, make sure to check if it is the first
2175 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2176 * with 0, so we now accept untagged and specified tagged traffic
2177 * (and not any taged and untagged)
2180 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2182 is_vf, is_netdev)) {
2183 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2184 I40E_VLAN_ANY, is_vf, is_netdev);
2185 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2188 dev_info(&vsi->back->pdev->dev,
2189 "Could not add filter 0 for %pM\n",
2190 vsi->netdev->dev_addr);
2196 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2197 if (vid > 0 && !vsi->info.pvid) {
2198 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2199 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2200 is_vf, is_netdev)) {
2201 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2203 add_f = i40e_add_filter(vsi, f->macaddr,
2204 0, is_vf, is_netdev);
2206 dev_info(&vsi->back->pdev->dev,
2207 "Could not add filter 0 for %pM\n",
2215 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2216 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2219 return i40e_sync_vsi_filters(vsi, false);
2223 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2224 * @vsi: the vsi being configured
2225 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2227 * Return: 0 on success or negative otherwise
2229 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2231 struct net_device *netdev = vsi->netdev;
2232 struct i40e_mac_filter *f, *add_f;
2233 bool is_vf, is_netdev;
2234 int filter_count = 0;
2236 is_vf = (vsi->type == I40E_VSI_SRIOV);
2237 is_netdev = !!(netdev);
2240 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2242 list_for_each_entry(f, &vsi->mac_filter_list, list)
2243 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2245 /* go through all the filters for this VSI and if there is only
2246 * vid == 0 it means there are no other filters, so vid 0 must
2247 * be replaced with -1. This signifies that we should from now
2248 * on accept any traffic (with any tag present, or untagged)
2250 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2253 ether_addr_equal(netdev->dev_addr, f->macaddr))
2261 if (!filter_count && is_netdev) {
2262 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2263 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2266 dev_info(&vsi->back->pdev->dev,
2267 "Could not add filter %d for %pM\n",
2268 I40E_VLAN_ANY, netdev->dev_addr);
2273 if (!filter_count) {
2274 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2275 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2276 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2279 dev_info(&vsi->back->pdev->dev,
2280 "Could not add filter %d for %pM\n",
2281 I40E_VLAN_ANY, f->macaddr);
2287 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2288 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2291 return i40e_sync_vsi_filters(vsi, false);
2295 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2296 * @netdev: network interface to be adjusted
2297 * @vid: vlan id to be added
2299 * net_device_ops implementation for adding vlan ids
2302 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2303 __always_unused __be16 proto, u16 vid)
2305 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2306 __always_unused __be16 proto, u16 vid)
2309 struct i40e_netdev_priv *np = netdev_priv(netdev);
2310 struct i40e_vsi *vsi = np->vsi;
2316 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2318 /* If the network stack called us with vid = 0 then
2319 * it is asking to receive priority tagged packets with
2320 * vlan id 0. Our HW receives them by default when configured
2321 * to receive untagged packets so there is no need to add an
2322 * extra filter for vlan 0 tagged packets.
2325 ret = i40e_vsi_add_vlan(vsi, vid);
2327 if (!ret && (vid < VLAN_N_VID))
2328 set_bit(vid, vsi->active_vlans);
2334 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2335 * @netdev: network interface to be adjusted
2336 * @vid: vlan id to be removed
2338 * net_device_ops implementation for removing vlan ids
2341 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2342 __always_unused __be16 proto, u16 vid)
2344 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2345 __always_unused __be16 proto, u16 vid)
2348 struct i40e_netdev_priv *np = netdev_priv(netdev);
2349 struct i40e_vsi *vsi = np->vsi;
2351 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2353 /* return code is ignored as there is nothing a user
2354 * can do about failure to remove and a log message was
2355 * already printed from the other function
2357 i40e_vsi_kill_vlan(vsi, vid);
2359 clear_bit(vid, vsi->active_vlans);
2365 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2366 * @vsi: the vsi being brought back up
2368 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2375 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2377 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2378 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2383 * i40e_vsi_add_pvid - Add pvid for the VSI
2384 * @vsi: the vsi being adjusted
2385 * @vid: the vlan id to set as a PVID
2387 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2389 struct i40e_vsi_context ctxt;
2392 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2393 vsi->info.pvid = cpu_to_le16(vid);
2394 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2395 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2396 I40E_AQ_VSI_PVLAN_EMOD_STR;
2398 ctxt.seid = vsi->seid;
2399 ctxt.info = vsi->info;
2400 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2402 dev_info(&vsi->back->pdev->dev,
2403 "add pvid failed, err %s aq_err %s\n",
2404 i40e_stat_str(&vsi->back->hw, ret),
2405 i40e_aq_str(&vsi->back->hw,
2406 vsi->back->hw.aq.asq_last_status));
2414 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2415 * @vsi: the vsi being adjusted
2417 * Just use the vlan_rx_register() service to put it back to normal
2419 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2421 i40e_vlan_stripping_disable(vsi);
2427 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2428 * @vsi: ptr to the VSI
2430 * If this function returns with an error, then it's possible one or
2431 * more of the rings is populated (while the rest are not). It is the
2432 * callers duty to clean those orphaned rings.
2434 * Return 0 on success, negative on failure
2436 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2440 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2441 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2447 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2448 * @vsi: ptr to the VSI
2450 * Free VSI's transmit software resources
2452 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2459 for (i = 0; i < vsi->num_queue_pairs; i++)
2460 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2461 i40e_free_tx_resources(vsi->tx_rings[i]);
2465 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2466 * @vsi: ptr to the VSI
2468 * If this function returns with an error, then it's possible one or
2469 * more of the rings is populated (while the rest are not). It is the
2470 * callers duty to clean those orphaned rings.
2472 * Return 0 on success, negative on failure
2474 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2478 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2479 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2481 i40e_fcoe_setup_ddp_resources(vsi);
2487 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2488 * @vsi: ptr to the VSI
2490 * Free all receive software resources
2492 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2499 for (i = 0; i < vsi->num_queue_pairs; i++)
2500 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2501 i40e_free_rx_resources(vsi->rx_rings[i]);
2503 i40e_fcoe_free_ddp_resources(vsi);
2508 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2509 * @ring: The Tx ring to configure
2511 * This enables/disables XPS for a given Tx descriptor ring
2512 * based on the TCs enabled for the VSI that ring belongs to.
2514 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2516 struct i40e_vsi *vsi = ring->vsi;
2519 if (!ring->q_vector || !ring->netdev)
2522 /* Single TC mode enable XPS */
2523 if (vsi->tc_config.numtc <= 1) {
2524 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2525 netif_set_xps_queue(ring->netdev,
2526 &ring->q_vector->affinity_mask,
2528 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2529 /* Disable XPS to allow selection based on TC */
2530 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2531 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2532 free_cpumask_var(mask);
2537 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2538 * @ring: The Tx ring to configure
2540 * Configure the Tx descriptor ring in the HMC context.
2542 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2544 struct i40e_vsi *vsi = ring->vsi;
2545 u16 pf_q = vsi->base_queue + ring->queue_index;
2546 struct i40e_hw *hw = &vsi->back->hw;
2547 struct i40e_hmc_obj_txq tx_ctx;
2548 i40e_status err = 0;
2551 /* some ATR related tx ring init */
2552 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2553 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2554 ring->atr_count = 0;
2556 ring->atr_sample_rate = 0;
2560 i40e_config_xps_tx_ring(ring);
2562 /* clear the context structure first */
2563 memset(&tx_ctx, 0, sizeof(tx_ctx));
2565 tx_ctx.new_context = 1;
2566 tx_ctx.base = (ring->dma / 128);
2567 tx_ctx.qlen = ring->count;
2568 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2569 I40E_FLAG_FD_ATR_ENABLED));
2571 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2573 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2574 /* FDIR VSI tx ring can still use RS bit and writebacks */
2575 if (vsi->type != I40E_VSI_FDIR)
2576 tx_ctx.head_wb_ena = 1;
2577 tx_ctx.head_wb_addr = ring->dma +
2578 (ring->count * sizeof(struct i40e_tx_desc));
2580 /* As part of VSI creation/update, FW allocates certain
2581 * Tx arbitration queue sets for each TC enabled for
2582 * the VSI. The FW returns the handles to these queue
2583 * sets as part of the response buffer to Add VSI,
2584 * Update VSI, etc. AQ commands. It is expected that
2585 * these queue set handles be associated with the Tx
2586 * queues by the driver as part of the TX queue context
2587 * initialization. This has to be done regardless of
2588 * DCB as by default everything is mapped to TC0.
2590 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2591 tx_ctx.rdylist_act = 0;
2593 /* clear the context in the HMC */
2594 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2596 dev_info(&vsi->back->pdev->dev,
2597 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2598 ring->queue_index, pf_q, err);
2602 /* set the context in the HMC */
2603 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2605 dev_info(&vsi->back->pdev->dev,
2606 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2607 ring->queue_index, pf_q, err);
2611 /* Now associate this queue with this PCI function */
2612 if (vsi->type == I40E_VSI_VMDQ2) {
2613 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2614 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2615 I40E_QTX_CTL_VFVM_INDX_MASK;
2617 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2620 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2621 I40E_QTX_CTL_PF_INDX_MASK);
2622 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2625 /* cache tail off for easier writes later */
2626 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2632 * i40e_configure_rx_ring - Configure a receive ring context
2633 * @ring: The Rx ring to configure
2635 * Configure the Rx descriptor ring in the HMC context.
2637 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2639 struct i40e_vsi *vsi = ring->vsi;
2640 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2641 u16 pf_q = vsi->base_queue + ring->queue_index;
2642 struct i40e_hw *hw = &vsi->back->hw;
2643 struct i40e_hmc_obj_rxq rx_ctx;
2644 i40e_status err = 0;
2648 /* clear the context structure first */
2649 memset(&rx_ctx, 0, sizeof(rx_ctx));
2651 ring->rx_buf_len = vsi->rx_buf_len;
2652 ring->rx_hdr_len = vsi->rx_hdr_len;
2654 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2655 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2657 rx_ctx.base = (ring->dma / 128);
2658 rx_ctx.qlen = ring->count;
2660 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2661 set_ring_16byte_desc_enabled(ring);
2667 rx_ctx.dtype = vsi->dtype;
2669 set_ring_ps_enabled(ring);
2670 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2672 I40E_RX_SPLIT_TCP_UDP |
2675 rx_ctx.hsplit_0 = 0;
2678 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2679 (chain_len * ring->rx_buf_len));
2680 if (hw->revision_id == 0)
2681 rx_ctx.lrxqthresh = 0;
2683 rx_ctx.lrxqthresh = 2;
2684 rx_ctx.crcstrip = 1;
2686 /* this controls whether VLAN is stripped from inner headers */
2689 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2691 /* set the prefena field to 1 because the manual says to */
2694 /* clear the context in the HMC */
2695 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2697 dev_info(&vsi->back->pdev->dev,
2698 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2699 ring->queue_index, pf_q, err);
2703 /* set the context in the HMC */
2704 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2706 dev_info(&vsi->back->pdev->dev,
2707 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2708 ring->queue_index, pf_q, err);
2712 /* cache tail for quicker writes, and clear the reg before use */
2713 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2714 writel(0, ring->tail);
2716 if (ring_is_ps_enabled(ring)) {
2717 i40e_alloc_rx_headers(ring);
2718 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2720 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2727 * i40e_vsi_configure_tx - Configure the VSI for Tx
2728 * @vsi: VSI structure describing this set of rings and resources
2730 * Configure the Tx VSI for operation.
2732 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2737 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2738 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2744 * i40e_vsi_configure_rx - Configure the VSI for Rx
2745 * @vsi: the VSI being configured
2747 * Configure the Rx VSI for operation.
2749 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2754 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2755 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2756 + ETH_FCS_LEN + VLAN_HLEN;
2758 vsi->max_frame = I40E_RXBUFFER_2048;
2760 /* figure out correct receive buffer length */
2761 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2762 I40E_FLAG_RX_PS_ENABLED)) {
2763 case I40E_FLAG_RX_1BUF_ENABLED:
2764 vsi->rx_hdr_len = 0;
2765 vsi->rx_buf_len = vsi->max_frame;
2766 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2768 case I40E_FLAG_RX_PS_ENABLED:
2769 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2770 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2771 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2774 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2775 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2776 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2781 /* setup rx buffer for FCoE */
2782 if ((vsi->type == I40E_VSI_FCOE) &&
2783 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2784 vsi->rx_hdr_len = 0;
2785 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2786 vsi->max_frame = I40E_RXBUFFER_3072;
2787 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2790 #endif /* I40E_FCOE */
2791 /* round up for the chip's needs */
2792 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2793 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2794 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2795 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2797 /* set up individual rings */
2798 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2799 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2805 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2806 * @vsi: ptr to the VSI
2808 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2810 struct i40e_ring *tx_ring, *rx_ring;
2811 u16 qoffset, qcount;
2814 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2815 /* Reset the TC information */
2816 for (i = 0; i < vsi->num_queue_pairs; i++) {
2817 rx_ring = vsi->rx_rings[i];
2818 tx_ring = vsi->tx_rings[i];
2819 rx_ring->dcb_tc = 0;
2820 tx_ring->dcb_tc = 0;
2824 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2825 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2828 qoffset = vsi->tc_config.tc_info[n].qoffset;
2829 qcount = vsi->tc_config.tc_info[n].qcount;
2830 for (i = qoffset; i < (qoffset + qcount); i++) {
2831 rx_ring = vsi->rx_rings[i];
2832 tx_ring = vsi->tx_rings[i];
2833 rx_ring->dcb_tc = n;
2834 tx_ring->dcb_tc = n;
2840 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2841 * @vsi: ptr to the VSI
2843 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2846 i40e_set_rx_mode(vsi->netdev);
2850 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2851 * @vsi: Pointer to the targeted VSI
2853 * This function replays the hlist on the hw where all the SB Flow Director
2854 * filters were saved.
2856 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2858 struct i40e_fdir_filter *filter;
2859 struct i40e_pf *pf = vsi->back;
2860 struct hlist_node *node;
2862 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2865 hlist_for_each_entry_safe(filter, node,
2866 &pf->fdir_filter_list, fdir_node) {
2867 i40e_add_del_fdir(vsi, filter, true);
2872 * i40e_vsi_configure - Set up the VSI for action
2873 * @vsi: the VSI being configured
2875 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2879 i40e_set_vsi_rx_mode(vsi);
2880 i40e_restore_vlan(vsi);
2881 i40e_vsi_config_dcb_rings(vsi);
2882 err = i40e_vsi_configure_tx(vsi);
2884 err = i40e_vsi_configure_rx(vsi);
2890 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2891 * @vsi: the VSI being configured
2893 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2895 struct i40e_pf *pf = vsi->back;
2896 struct i40e_q_vector *q_vector;
2897 struct i40e_hw *hw = &pf->hw;
2903 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2904 * and PFINT_LNKLSTn registers, e.g.:
2905 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2907 qp = vsi->base_queue;
2908 vector = vsi->base_vector;
2909 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2910 q_vector = vsi->q_vectors[i];
2911 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2912 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2913 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2915 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2916 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2917 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2920 /* Linked list for the queuepairs assigned to this vector */
2921 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2922 for (q = 0; q < q_vector->num_ringpairs; q++) {
2923 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2924 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2925 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2926 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2928 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2930 wr32(hw, I40E_QINT_RQCTL(qp), val);
2932 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2933 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2934 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2935 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2937 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2939 /* Terminate the linked list */
2940 if (q == (q_vector->num_ringpairs - 1))
2941 val |= (I40E_QUEUE_END_OF_LIST
2942 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2944 wr32(hw, I40E_QINT_TQCTL(qp), val);
2953 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2954 * @hw: ptr to the hardware info
2956 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2958 struct i40e_hw *hw = &pf->hw;
2961 /* clear things first */
2962 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2963 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2965 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2966 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2967 I40E_PFINT_ICR0_ENA_GRST_MASK |
2968 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2969 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2970 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2971 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2972 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2974 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2975 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2977 if (pf->flags & I40E_FLAG_PTP)
2978 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2980 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2982 /* SW_ITR_IDX = 0, but don't change INTENA */
2983 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2984 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2986 /* OTHER_ITR_IDX = 0 */
2987 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2991 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2992 * @vsi: the VSI being configured
2994 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2996 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2997 struct i40e_pf *pf = vsi->back;
2998 struct i40e_hw *hw = &pf->hw;
3001 /* set the ITR configuration */
3002 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3003 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3004 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3005 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3006 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3007 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3009 i40e_enable_misc_int_causes(pf);
3011 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3012 wr32(hw, I40E_PFINT_LNKLST0, 0);
3014 /* Associate the queue pair to the vector and enable the queue int */
3015 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3016 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3017 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3019 wr32(hw, I40E_QINT_RQCTL(0), val);
3021 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3022 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3023 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3025 wr32(hw, I40E_QINT_TQCTL(0), val);
3030 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3031 * @pf: board private structure
3033 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3035 struct i40e_hw *hw = &pf->hw;
3037 wr32(hw, I40E_PFINT_DYN_CTL0,
3038 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3043 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3044 * @pf: board private structure
3046 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3048 struct i40e_hw *hw = &pf->hw;
3051 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3052 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3053 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3055 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3060 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3061 * @vsi: pointer to a vsi
3062 * @vector: enable a particular Hw Interrupt vector, without base_vector
3064 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3066 struct i40e_pf *pf = vsi->back;
3067 struct i40e_hw *hw = &pf->hw;
3070 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3071 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3072 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3073 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
3074 /* skip the flush */
3078 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3079 * @vsi: pointer to a vsi
3080 * @vector: disable a particular Hw Interrupt vector
3082 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3084 struct i40e_pf *pf = vsi->back;
3085 struct i40e_hw *hw = &pf->hw;
3088 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3089 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3094 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3095 * @irq: interrupt number
3096 * @data: pointer to a q_vector
3098 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3100 struct i40e_q_vector *q_vector = data;
3102 if (!q_vector->tx.ring && !q_vector->rx.ring)
3105 napi_schedule(&q_vector->napi);
3111 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3112 * @vsi: the VSI being configured
3113 * @basename: name for the vector
3115 * Allocates MSI-X vectors and requests interrupts from the kernel.
3117 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3119 int q_vectors = vsi->num_q_vectors;
3120 struct i40e_pf *pf = vsi->back;
3121 int base = vsi->base_vector;
3126 for (vector = 0; vector < q_vectors; vector++) {
3127 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3129 if (q_vector->tx.ring && q_vector->rx.ring) {
3130 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3131 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3133 } else if (q_vector->rx.ring) {
3134 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3135 "%s-%s-%d", basename, "rx", rx_int_idx++);
3136 } else if (q_vector->tx.ring) {
3137 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3138 "%s-%s-%d", basename, "tx", tx_int_idx++);
3140 /* skip this unused q_vector */
3143 err = request_irq(pf->msix_entries[base + vector].vector,
3149 dev_info(&pf->pdev->dev,
3150 "MSIX request_irq failed, error: %d\n", err);
3151 goto free_queue_irqs;
3153 /* assign the mask for this irq */
3154 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3155 &q_vector->affinity_mask);
3158 vsi->irqs_ready = true;
3164 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3166 free_irq(pf->msix_entries[base + vector].vector,
3167 &(vsi->q_vectors[vector]));
3173 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3174 * @vsi: the VSI being un-configured
3176 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3178 struct i40e_pf *pf = vsi->back;
3179 struct i40e_hw *hw = &pf->hw;
3180 int base = vsi->base_vector;
3183 for (i = 0; i < vsi->num_queue_pairs; i++) {
3184 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3185 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3188 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3189 for (i = vsi->base_vector;
3190 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3191 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3194 for (i = 0; i < vsi->num_q_vectors; i++)
3195 synchronize_irq(pf->msix_entries[i + base].vector);
3197 /* Legacy and MSI mode - this stops all interrupt handling */
3198 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3199 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3201 synchronize_irq(pf->pdev->irq);
3206 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3207 * @vsi: the VSI being configured
3209 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3211 struct i40e_pf *pf = vsi->back;
3214 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3215 for (i = 0; i < vsi->num_q_vectors; i++)
3216 i40e_irq_dynamic_enable(vsi, i);
3218 i40e_irq_dynamic_enable_icr0(pf);
3221 i40e_flush(&pf->hw);
3226 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3227 * @pf: board private structure
3229 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3232 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3233 i40e_flush(&pf->hw);
3237 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3238 * @irq: interrupt number
3239 * @data: pointer to a q_vector
3241 * This is the handler used for all MSI/Legacy interrupts, and deals
3242 * with both queue and non-queue interrupts. This is also used in
3243 * MSIX mode to handle the non-queue interrupts.
3245 static irqreturn_t i40e_intr(int irq, void *data)
3247 struct i40e_pf *pf = (struct i40e_pf *)data;
3248 struct i40e_hw *hw = &pf->hw;
3249 irqreturn_t ret = IRQ_NONE;
3250 u32 icr0, icr0_remaining;
3253 icr0 = rd32(hw, I40E_PFINT_ICR0);
3254 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3256 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3257 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3260 /* if interrupt but no bits showing, must be SWINT */
3261 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3262 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3265 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3266 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3267 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3268 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3269 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3272 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3273 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3275 /* temporarily disable queue cause for NAPI processing */
3276 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3277 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3278 wr32(hw, I40E_QINT_RQCTL(0), qval);
3280 qval = rd32(hw, I40E_QINT_TQCTL(0));
3281 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3282 wr32(hw, I40E_QINT_TQCTL(0), qval);
3284 if (!test_bit(__I40E_DOWN, &pf->state))
3285 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3288 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3289 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3290 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3293 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3294 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3295 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3298 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3299 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3300 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3303 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3304 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3305 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3306 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3307 val = rd32(hw, I40E_GLGEN_RSTAT);
3308 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3309 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3310 if (val == I40E_RESET_CORER) {
3312 } else if (val == I40E_RESET_GLOBR) {
3314 } else if (val == I40E_RESET_EMPR) {
3316 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3320 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3321 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3322 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3323 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3324 rd32(hw, I40E_PFHMC_ERRORINFO),
3325 rd32(hw, I40E_PFHMC_ERRORDATA));
3328 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3329 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3331 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3332 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3333 i40e_ptp_tx_hwtstamp(pf);
3337 /* If a critical error is pending we have no choice but to reset the
3339 * Report and mask out any remaining unexpected interrupts.
3341 icr0_remaining = icr0 & ena_mask;
3342 if (icr0_remaining) {
3343 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3345 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3346 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3347 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3348 dev_info(&pf->pdev->dev, "device will be reset\n");
3349 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3350 i40e_service_event_schedule(pf);
3352 ena_mask &= ~icr0_remaining;
3357 /* re-enable interrupt causes */
3358 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3359 if (!test_bit(__I40E_DOWN, &pf->state)) {
3360 i40e_service_event_schedule(pf);
3361 i40e_irq_dynamic_enable_icr0(pf);
3368 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3369 * @tx_ring: tx ring to clean
3370 * @budget: how many cleans we're allowed
3372 * Returns true if there's any budget left (e.g. the clean is finished)
3374 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3376 struct i40e_vsi *vsi = tx_ring->vsi;
3377 u16 i = tx_ring->next_to_clean;
3378 struct i40e_tx_buffer *tx_buf;
3379 struct i40e_tx_desc *tx_desc;
3381 tx_buf = &tx_ring->tx_bi[i];
3382 tx_desc = I40E_TX_DESC(tx_ring, i);
3383 i -= tx_ring->count;
3386 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3388 /* if next_to_watch is not set then there is no work pending */
3392 /* prevent any other reads prior to eop_desc */
3393 read_barrier_depends();
3395 /* if the descriptor isn't done, no work yet to do */
3396 if (!(eop_desc->cmd_type_offset_bsz &
3397 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3400 /* clear next_to_watch to prevent false hangs */
3401 tx_buf->next_to_watch = NULL;
3403 tx_desc->buffer_addr = 0;
3404 tx_desc->cmd_type_offset_bsz = 0;
3405 /* move past filter desc */
3410 i -= tx_ring->count;
3411 tx_buf = tx_ring->tx_bi;
3412 tx_desc = I40E_TX_DESC(tx_ring, 0);
3414 /* unmap skb header data */
3415 dma_unmap_single(tx_ring->dev,
3416 dma_unmap_addr(tx_buf, dma),
3417 dma_unmap_len(tx_buf, len),
3419 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3420 kfree(tx_buf->raw_buf);
3422 tx_buf->raw_buf = NULL;
3423 tx_buf->tx_flags = 0;
3424 tx_buf->next_to_watch = NULL;
3425 dma_unmap_len_set(tx_buf, len, 0);
3426 tx_desc->buffer_addr = 0;
3427 tx_desc->cmd_type_offset_bsz = 0;
3429 /* move us past the eop_desc for start of next FD desc */
3434 i -= tx_ring->count;
3435 tx_buf = tx_ring->tx_bi;
3436 tx_desc = I40E_TX_DESC(tx_ring, 0);
3439 /* update budget accounting */
3441 } while (likely(budget));
3443 i += tx_ring->count;
3444 tx_ring->next_to_clean = i;
3446 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3447 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3453 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3454 * @irq: interrupt number
3455 * @data: pointer to a q_vector
3457 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3459 struct i40e_q_vector *q_vector = data;
3460 struct i40e_vsi *vsi;
3462 if (!q_vector->tx.ring)
3465 vsi = q_vector->tx.ring->vsi;
3466 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3472 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3473 * @vsi: the VSI being configured
3474 * @v_idx: vector index
3475 * @qp_idx: queue pair index
3477 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3479 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3480 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3481 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3483 tx_ring->q_vector = q_vector;
3484 tx_ring->next = q_vector->tx.ring;
3485 q_vector->tx.ring = tx_ring;
3486 q_vector->tx.count++;
3488 rx_ring->q_vector = q_vector;
3489 rx_ring->next = q_vector->rx.ring;
3490 q_vector->rx.ring = rx_ring;
3491 q_vector->rx.count++;
3495 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3496 * @vsi: the VSI being configured
3498 * This function maps descriptor rings to the queue-specific vectors
3499 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3500 * one vector per queue pair, but on a constrained vector budget, we
3501 * group the queue pairs as "efficiently" as possible.
3503 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3505 int qp_remaining = vsi->num_queue_pairs;
3506 int q_vectors = vsi->num_q_vectors;
3511 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3512 * group them so there are multiple queues per vector.
3513 * It is also important to go through all the vectors available to be
3514 * sure that if we don't use all the vectors, that the remaining vectors
3515 * are cleared. This is especially important when decreasing the
3516 * number of queues in use.
3518 for (; v_start < q_vectors; v_start++) {
3519 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3521 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3523 q_vector->num_ringpairs = num_ringpairs;
3525 q_vector->rx.count = 0;
3526 q_vector->tx.count = 0;
3527 q_vector->rx.ring = NULL;
3528 q_vector->tx.ring = NULL;
3530 while (num_ringpairs--) {
3531 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3539 * i40e_vsi_request_irq - Request IRQ from the OS
3540 * @vsi: the VSI being configured
3541 * @basename: name for the vector
3543 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3545 struct i40e_pf *pf = vsi->back;
3548 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3549 err = i40e_vsi_request_irq_msix(vsi, basename);
3550 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3551 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3554 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3558 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3563 #ifdef CONFIG_NET_POLL_CONTROLLER
3565 * i40e_netpoll - A Polling 'interrupt'handler
3566 * @netdev: network interface device structure
3568 * This is used by netconsole to send skbs without having to re-enable
3569 * interrupts. It's not called while the normal interrupt routine is executing.
3572 void i40e_netpoll(struct net_device *netdev)
3574 static void i40e_netpoll(struct net_device *netdev)
3577 struct i40e_netdev_priv *np = netdev_priv(netdev);
3578 struct i40e_vsi *vsi = np->vsi;
3579 struct i40e_pf *pf = vsi->back;
3582 /* if interface is down do nothing */
3583 if (test_bit(__I40E_DOWN, &vsi->state))
3586 pf->flags |= I40E_FLAG_IN_NETPOLL;
3587 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3588 for (i = 0; i < vsi->num_q_vectors; i++)
3589 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3591 i40e_intr(pf->pdev->irq, netdev);
3593 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3598 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3599 * @pf: the PF being configured
3600 * @pf_q: the PF queue
3601 * @enable: enable or disable state of the queue
3603 * This routine will wait for the given Tx queue of the PF to reach the
3604 * enabled or disabled state.
3605 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3606 * multiple retries; else will return 0 in case of success.
3608 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3613 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3614 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3615 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3618 usleep_range(10, 20);
3620 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3627 * i40e_vsi_control_tx - Start or stop a VSI's rings
3628 * @vsi: the VSI being configured
3629 * @enable: start or stop the rings
3631 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3633 struct i40e_pf *pf = vsi->back;
3634 struct i40e_hw *hw = &pf->hw;
3635 int i, j, pf_q, ret = 0;
3638 pf_q = vsi->base_queue;
3639 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3641 /* warn the TX unit of coming changes */
3642 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3644 usleep_range(10, 20);
3646 for (j = 0; j < 50; j++) {
3647 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3648 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3649 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3651 usleep_range(1000, 2000);
3653 /* Skip if the queue is already in the requested state */
3654 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3657 /* turn on/off the queue */
3659 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3660 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3662 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3665 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3666 /* No waiting for the Tx queue to disable */
3667 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3670 /* wait for the change to finish */
3671 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3673 dev_info(&pf->pdev->dev,
3674 "VSI seid %d Tx ring %d %sable timeout\n",
3675 vsi->seid, pf_q, (enable ? "en" : "dis"));
3680 if (hw->revision_id == 0)
3686 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3687 * @pf: the PF being configured
3688 * @pf_q: the PF queue
3689 * @enable: enable or disable state of the queue
3691 * This routine will wait for the given Rx queue of the PF to reach the
3692 * enabled or disabled state.
3693 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3694 * multiple retries; else will return 0 in case of success.
3696 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3701 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3702 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3703 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3706 usleep_range(10, 20);
3708 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3715 * i40e_vsi_control_rx - Start or stop a VSI's rings
3716 * @vsi: the VSI being configured
3717 * @enable: start or stop the rings
3719 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3721 struct i40e_pf *pf = vsi->back;
3722 struct i40e_hw *hw = &pf->hw;
3723 int i, j, pf_q, ret = 0;
3726 pf_q = vsi->base_queue;
3727 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3728 for (j = 0; j < 50; j++) {
3729 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3730 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3731 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3733 usleep_range(1000, 2000);
3736 /* Skip if the queue is already in the requested state */
3737 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3740 /* turn on/off the queue */
3742 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3744 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3745 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3747 /* wait for the change to finish */
3748 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3750 dev_info(&pf->pdev->dev,
3751 "VSI seid %d Rx ring %d %sable timeout\n",
3752 vsi->seid, pf_q, (enable ? "en" : "dis"));
3761 * i40e_vsi_control_rings - Start or stop a VSI's rings
3762 * @vsi: the VSI being configured
3763 * @enable: start or stop the rings
3765 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3769 /* do rx first for enable and last for disable */
3771 ret = i40e_vsi_control_rx(vsi, request);
3774 ret = i40e_vsi_control_tx(vsi, request);
3776 /* Ignore return value, we need to shutdown whatever we can */
3777 i40e_vsi_control_tx(vsi, request);
3778 i40e_vsi_control_rx(vsi, request);
3785 * i40e_vsi_free_irq - Free the irq association with the OS
3786 * @vsi: the VSI being configured
3788 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3790 struct i40e_pf *pf = vsi->back;
3791 struct i40e_hw *hw = &pf->hw;
3792 int base = vsi->base_vector;
3796 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3797 if (!vsi->q_vectors)
3800 if (!vsi->irqs_ready)
3803 vsi->irqs_ready = false;
3804 for (i = 0; i < vsi->num_q_vectors; i++) {
3805 u16 vector = i + base;
3807 /* free only the irqs that were actually requested */
3808 if (!vsi->q_vectors[i] ||
3809 !vsi->q_vectors[i]->num_ringpairs)
3812 /* clear the affinity_mask in the IRQ descriptor */
3813 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3815 free_irq(pf->msix_entries[vector].vector,
3818 /* Tear down the interrupt queue link list
3820 * We know that they come in pairs and always
3821 * the Rx first, then the Tx. To clear the
3822 * link list, stick the EOL value into the
3823 * next_q field of the registers.
3825 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3826 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3827 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3828 val |= I40E_QUEUE_END_OF_LIST
3829 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3830 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3832 while (qp != I40E_QUEUE_END_OF_LIST) {
3835 val = rd32(hw, I40E_QINT_RQCTL(qp));
3837 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3838 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3839 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3840 I40E_QINT_RQCTL_INTEVENT_MASK);
3842 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3843 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3845 wr32(hw, I40E_QINT_RQCTL(qp), val);
3847 val = rd32(hw, I40E_QINT_TQCTL(qp));
3849 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3850 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3852 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3853 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3854 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3855 I40E_QINT_TQCTL_INTEVENT_MASK);
3857 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3858 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3860 wr32(hw, I40E_QINT_TQCTL(qp), val);
3865 free_irq(pf->pdev->irq, pf);
3867 val = rd32(hw, I40E_PFINT_LNKLST0);
3868 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3869 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3870 val |= I40E_QUEUE_END_OF_LIST
3871 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3872 wr32(hw, I40E_PFINT_LNKLST0, val);
3874 val = rd32(hw, I40E_QINT_RQCTL(qp));
3875 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3876 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3877 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3878 I40E_QINT_RQCTL_INTEVENT_MASK);
3880 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3881 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3883 wr32(hw, I40E_QINT_RQCTL(qp), val);
3885 val = rd32(hw, I40E_QINT_TQCTL(qp));
3887 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3888 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3889 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3890 I40E_QINT_TQCTL_INTEVENT_MASK);
3892 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3893 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3895 wr32(hw, I40E_QINT_TQCTL(qp), val);
3900 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3901 * @vsi: the VSI being configured
3902 * @v_idx: Index of vector to be freed
3904 * This function frees the memory allocated to the q_vector. In addition if
3905 * NAPI is enabled it will delete any references to the NAPI struct prior
3906 * to freeing the q_vector.
3908 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3910 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3911 struct i40e_ring *ring;
3916 /* disassociate q_vector from rings */
3917 i40e_for_each_ring(ring, q_vector->tx)
3918 ring->q_vector = NULL;
3920 i40e_for_each_ring(ring, q_vector->rx)
3921 ring->q_vector = NULL;
3923 /* only VSI w/ an associated netdev is set up w/ NAPI */
3925 netif_napi_del(&q_vector->napi);
3927 vsi->q_vectors[v_idx] = NULL;
3929 kfree_rcu(q_vector, rcu);
3933 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3934 * @vsi: the VSI being un-configured
3936 * This frees the memory allocated to the q_vectors and
3937 * deletes references to the NAPI struct.
3939 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3943 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3944 i40e_free_q_vector(vsi, v_idx);
3948 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3949 * @pf: board private structure
3951 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3953 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3954 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3955 pci_disable_msix(pf->pdev);
3956 kfree(pf->msix_entries);
3957 pf->msix_entries = NULL;
3958 kfree(pf->irq_pile);
3959 pf->irq_pile = NULL;
3960 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3961 pci_disable_msi(pf->pdev);
3963 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3967 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3968 * @pf: board private structure
3970 * We go through and clear interrupt specific resources and reset the structure
3971 * to pre-load conditions
3973 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3977 i40e_stop_misc_vector(pf);
3978 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3979 synchronize_irq(pf->msix_entries[0].vector);
3980 free_irq(pf->msix_entries[0].vector, pf);
3983 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3984 for (i = 0; i < pf->num_alloc_vsi; i++)
3986 i40e_vsi_free_q_vectors(pf->vsi[i]);
3987 i40e_reset_interrupt_capability(pf);
3991 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3992 * @vsi: the VSI being configured
3994 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4001 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4002 napi_enable(&vsi->q_vectors[q_idx]->napi);
4006 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4007 * @vsi: the VSI being configured
4009 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4016 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4017 napi_disable(&vsi->q_vectors[q_idx]->napi);
4021 * i40e_vsi_close - Shut down a VSI
4022 * @vsi: the vsi to be quelled
4024 static void i40e_vsi_close(struct i40e_vsi *vsi)
4026 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4028 i40e_vsi_free_irq(vsi);
4029 i40e_vsi_free_tx_resources(vsi);
4030 i40e_vsi_free_rx_resources(vsi);
4031 vsi->current_netdev_flags = 0;
4035 * i40e_quiesce_vsi - Pause a given VSI
4036 * @vsi: the VSI being paused
4038 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4040 if (test_bit(__I40E_DOWN, &vsi->state))
4043 /* No need to disable FCoE VSI when Tx suspended */
4044 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4045 vsi->type == I40E_VSI_FCOE) {
4046 dev_dbg(&vsi->back->pdev->dev,
4047 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4051 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4052 if (vsi->netdev && netif_running(vsi->netdev)) {
4053 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4055 i40e_vsi_close(vsi);
4060 * i40e_unquiesce_vsi - Resume a given VSI
4061 * @vsi: the VSI being resumed
4063 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4065 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4068 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4069 if (vsi->netdev && netif_running(vsi->netdev))
4070 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4072 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4076 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4079 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4083 for (v = 0; v < pf->num_alloc_vsi; v++) {
4085 i40e_quiesce_vsi(pf->vsi[v]);
4090 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4093 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4097 for (v = 0; v < pf->num_alloc_vsi; v++) {
4099 i40e_unquiesce_vsi(pf->vsi[v]);
4103 #ifdef CONFIG_I40E_DCB
4105 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4106 * @vsi: the VSI being configured
4108 * This function waits for the given VSI's Tx queues to be disabled.
4110 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4112 struct i40e_pf *pf = vsi->back;
4115 pf_q = vsi->base_queue;
4116 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4117 /* Check and wait for the disable status of the queue */
4118 ret = i40e_pf_txq_wait(pf, pf_q, false);
4120 dev_info(&pf->pdev->dev,
4121 "VSI seid %d Tx ring %d disable timeout\n",
4131 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4134 * This function waits for the Tx queues to be in disabled state for all the
4135 * VSIs that are managed by this PF.
4137 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4141 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4142 /* No need to wait for FCoE VSI queues */
4143 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4144 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4156 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4157 * @q_idx: TX queue number
4158 * @vsi: Pointer to VSI struct
4160 * This function checks specified queue for given VSI. Detects hung condition.
4161 * Sets hung bit since it is two step process. Before next run of service task
4162 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4163 * hung condition remain unchanged and during subsequent run, this function
4164 * issues SW interrupt to recover from hung condition.
4166 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4168 struct i40e_ring *tx_ring = NULL;
4170 u32 head, val, tx_pending;
4175 /* now that we have an index, find the tx_ring struct */
4176 for (i = 0; i < vsi->num_queue_pairs; i++) {
4177 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4178 if (q_idx == vsi->tx_rings[i]->queue_index) {
4179 tx_ring = vsi->tx_rings[i];
4188 /* Read interrupt register */
4189 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4191 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4192 tx_ring->vsi->base_vector - 1));
4194 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4196 head = i40e_get_head(tx_ring);
4198 tx_pending = i40e_get_tx_pending(tx_ring);
4200 /* Interrupts are disabled and TX pending is non-zero,
4201 * trigger the SW interrupt (don't wait). Worst case
4202 * there will be one extra interrupt which may result
4203 * into not cleaning any queues because queues are cleaned.
4205 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4206 i40e_force_wb(vsi, tx_ring->q_vector);
4210 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4211 * @pf: pointer to PF struct
4213 * LAN VSI has netdev and netdev has TX queues. This function is to check
4214 * each of those TX queues if they are hung, trigger recovery by issuing
4217 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4219 struct net_device *netdev;
4220 struct i40e_vsi *vsi;
4223 /* Only for LAN VSI */
4224 vsi = pf->vsi[pf->lan_vsi];
4229 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4230 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4231 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4234 /* Make sure type is MAIN VSI */
4235 if (vsi->type != I40E_VSI_MAIN)
4238 netdev = vsi->netdev;
4242 /* Bail out if netif_carrier is not OK */
4243 if (!netif_carrier_ok(netdev))
4246 /* Go thru' TX queues for netdev */
4247 for (i = 0; i < netdev->num_tx_queues; i++) {
4248 struct netdev_queue *q;
4250 q = netdev_get_tx_queue(netdev, i);
4252 i40e_detect_recover_hung_queue(i, vsi);
4257 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4258 * @pf: pointer to PF
4260 * Get TC map for ISCSI PF type that will include iSCSI TC
4263 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4265 struct i40e_dcb_app_priority_table app;
4266 struct i40e_hw *hw = &pf->hw;
4267 u8 enabled_tc = 1; /* TC0 is always enabled */
4269 /* Get the iSCSI APP TLV */
4270 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4272 for (i = 0; i < dcbcfg->numapps; i++) {
4273 app = dcbcfg->app[i];
4274 if (app.selector == I40E_APP_SEL_TCPIP &&
4275 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4276 tc = dcbcfg->etscfg.prioritytable[app.priority];
4277 enabled_tc |= BIT_ULL(tc);
4286 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4287 * @dcbcfg: the corresponding DCBx configuration structure
4289 * Return the number of TCs from given DCBx configuration
4291 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4296 /* Scan the ETS Config Priority Table to find
4297 * traffic class enabled for a given priority
4298 * and use the traffic class index to get the
4299 * number of traffic classes enabled
4301 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4302 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4303 num_tc = dcbcfg->etscfg.prioritytable[i];
4306 /* Traffic class index starts from zero so
4307 * increment to return the actual count
4313 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4314 * @dcbcfg: the corresponding DCBx configuration structure
4316 * Query the current DCB configuration and return the number of
4317 * traffic classes enabled from the given DCBX config
4319 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4321 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4325 for (i = 0; i < num_tc; i++)
4326 enabled_tc |= BIT(i);
4332 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4333 * @pf: PF being queried
4335 * Return number of traffic classes enabled for the given PF
4337 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4339 struct i40e_hw *hw = &pf->hw;
4342 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4344 /* If DCB is not enabled then always in single TC */
4345 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4348 /* SFP mode will be enabled for all TCs on port */
4349 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4350 return i40e_dcb_get_num_tc(dcbcfg);
4352 /* MFP mode return count of enabled TCs for this PF */
4353 if (pf->hw.func_caps.iscsi)
4354 enabled_tc = i40e_get_iscsi_tc_map(pf);
4356 return 1; /* Only TC0 */
4358 /* At least have TC0 */
4359 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4360 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4361 if (enabled_tc & BIT_ULL(i))
4368 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4369 * @pf: PF being queried
4371 * Return a bitmap for first enabled traffic class for this PF.
4373 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4375 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4379 return 0x1; /* TC0 */
4381 /* Find the first enabled TC */
4382 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4383 if (enabled_tc & BIT_ULL(i))
4391 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4392 * @pf: PF being queried
4394 * Return a bitmap for enabled traffic classes for this PF.
4396 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4398 /* If DCB is not enabled for this PF then just return default TC */
4399 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4400 return i40e_pf_get_default_tc(pf);
4402 /* SFP mode we want PF to be enabled for all TCs */
4403 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4404 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4406 /* MFP enabled and iSCSI PF type */
4407 if (pf->hw.func_caps.iscsi)
4408 return i40e_get_iscsi_tc_map(pf);
4410 return i40e_pf_get_default_tc(pf);
4414 * i40e_vsi_get_bw_info - Query VSI BW Information
4415 * @vsi: the VSI being queried
4417 * Returns 0 on success, negative value on failure
4419 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4421 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4422 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4423 struct i40e_pf *pf = vsi->back;
4424 struct i40e_hw *hw = &pf->hw;
4429 /* Get the VSI level BW configuration */
4430 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4432 dev_info(&pf->pdev->dev,
4433 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4434 i40e_stat_str(&pf->hw, ret),
4435 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4439 /* Get the VSI level BW configuration per TC */
4440 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4443 dev_info(&pf->pdev->dev,
4444 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4445 i40e_stat_str(&pf->hw, ret),
4446 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4450 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4451 dev_info(&pf->pdev->dev,
4452 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4453 bw_config.tc_valid_bits,
4454 bw_ets_config.tc_valid_bits);
4455 /* Still continuing */
4458 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4459 vsi->bw_max_quanta = bw_config.max_bw;
4460 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4461 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4462 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4463 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4464 vsi->bw_ets_limit_credits[i] =
4465 le16_to_cpu(bw_ets_config.credits[i]);
4466 /* 3 bits out of 4 for each TC */
4467 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4474 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4475 * @vsi: the VSI being configured
4476 * @enabled_tc: TC bitmap
4477 * @bw_credits: BW shared credits per TC
4479 * Returns 0 on success, negative value on failure
4481 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4484 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4488 bw_data.tc_valid_bits = enabled_tc;
4489 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4490 bw_data.tc_bw_credits[i] = bw_share[i];
4492 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4495 dev_info(&vsi->back->pdev->dev,
4496 "AQ command Config VSI BW allocation per TC failed = %d\n",
4497 vsi->back->hw.aq.asq_last_status);
4501 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4502 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4508 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4509 * @vsi: the VSI being configured
4510 * @enabled_tc: TC map to be enabled
4513 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4515 struct net_device *netdev = vsi->netdev;
4516 struct i40e_pf *pf = vsi->back;
4517 struct i40e_hw *hw = &pf->hw;
4520 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4526 netdev_reset_tc(netdev);
4530 /* Set up actual enabled TCs on the VSI */
4531 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4534 /* set per TC queues for the VSI */
4535 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4536 /* Only set TC queues for enabled tcs
4538 * e.g. For a VSI that has TC0 and TC3 enabled the
4539 * enabled_tc bitmap would be 0x00001001; the driver
4540 * will set the numtc for netdev as 2 that will be
4541 * referenced by the netdev layer as TC 0 and 1.
4543 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4544 netdev_set_tc_queue(netdev,
4545 vsi->tc_config.tc_info[i].netdev_tc,
4546 vsi->tc_config.tc_info[i].qcount,
4547 vsi->tc_config.tc_info[i].qoffset);
4550 /* Assign UP2TC map for the VSI */
4551 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4552 /* Get the actual TC# for the UP */
4553 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4554 /* Get the mapped netdev TC# for the UP */
4555 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4556 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4561 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4562 * @vsi: the VSI being configured
4563 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4565 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4566 struct i40e_vsi_context *ctxt)
4568 /* copy just the sections touched not the entire info
4569 * since not all sections are valid as returned by
4572 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4573 memcpy(&vsi->info.queue_mapping,
4574 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4575 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4576 sizeof(vsi->info.tc_mapping));
4580 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4581 * @vsi: VSI to be configured
4582 * @enabled_tc: TC bitmap
4584 * This configures a particular VSI for TCs that are mapped to the
4585 * given TC bitmap. It uses default bandwidth share for TCs across
4586 * VSIs to configure TC for a particular VSI.
4589 * It is expected that the VSI queues have been quisced before calling
4592 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4594 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4595 struct i40e_vsi_context ctxt;
4599 /* Check if enabled_tc is same as existing or new TCs */
4600 if (vsi->tc_config.enabled_tc == enabled_tc)
4603 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4605 if (enabled_tc & BIT_ULL(i))
4609 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4611 dev_info(&vsi->back->pdev->dev,
4612 "Failed configuring TC map %d for VSI %d\n",
4613 enabled_tc, vsi->seid);
4617 /* Update Queue Pairs Mapping for currently enabled UPs */
4618 ctxt.seid = vsi->seid;
4619 ctxt.pf_num = vsi->back->hw.pf_id;
4621 ctxt.uplink_seid = vsi->uplink_seid;
4622 ctxt.info = vsi->info;
4623 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4625 /* Update the VSI after updating the VSI queue-mapping information */
4626 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4628 dev_info(&vsi->back->pdev->dev,
4629 "Update vsi tc config failed, err %s aq_err %s\n",
4630 i40e_stat_str(&vsi->back->hw, ret),
4631 i40e_aq_str(&vsi->back->hw,
4632 vsi->back->hw.aq.asq_last_status));
4635 /* update the local VSI info with updated queue map */
4636 i40e_vsi_update_queue_map(vsi, &ctxt);
4637 vsi->info.valid_sections = 0;
4639 /* Update current VSI BW information */
4640 ret = i40e_vsi_get_bw_info(vsi);
4642 dev_info(&vsi->back->pdev->dev,
4643 "Failed updating vsi bw info, err %s aq_err %s\n",
4644 i40e_stat_str(&vsi->back->hw, ret),
4645 i40e_aq_str(&vsi->back->hw,
4646 vsi->back->hw.aq.asq_last_status));
4650 /* Update the netdev TC setup */
4651 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4657 * i40e_veb_config_tc - Configure TCs for given VEB
4659 * @enabled_tc: TC bitmap
4661 * Configures given TC bitmap for VEB (switching) element
4663 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4665 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4666 struct i40e_pf *pf = veb->pf;
4670 /* No TCs or already enabled TCs just return */
4671 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4674 bw_data.tc_valid_bits = enabled_tc;
4675 /* bw_data.absolute_credits is not set (relative) */
4677 /* Enable ETS TCs with equal BW Share for now */
4678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4679 if (enabled_tc & BIT_ULL(i))
4680 bw_data.tc_bw_share_credits[i] = 1;
4683 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4686 dev_info(&pf->pdev->dev,
4687 "VEB bw config failed, err %s aq_err %s\n",
4688 i40e_stat_str(&pf->hw, ret),
4689 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4693 /* Update the BW information */
4694 ret = i40e_veb_get_bw_info(veb);
4696 dev_info(&pf->pdev->dev,
4697 "Failed getting veb bw config, err %s aq_err %s\n",
4698 i40e_stat_str(&pf->hw, ret),
4699 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4706 #ifdef CONFIG_I40E_DCB
4708 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4711 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4712 * the caller would've quiesce all the VSIs before calling
4715 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4721 /* Enable the TCs available on PF to all VEBs */
4722 tc_map = i40e_pf_get_tc_map(pf);
4723 for (v = 0; v < I40E_MAX_VEB; v++) {
4726 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4728 dev_info(&pf->pdev->dev,
4729 "Failed configuring TC for VEB seid=%d\n",
4731 /* Will try to configure as many components */
4735 /* Update each VSI */
4736 for (v = 0; v < pf->num_alloc_vsi; v++) {
4740 /* - Enable all TCs for the LAN VSI
4742 * - For FCoE VSI only enable the TC configured
4743 * as per the APP TLV
4745 * - For all others keep them at TC0 for now
4747 if (v == pf->lan_vsi)
4748 tc_map = i40e_pf_get_tc_map(pf);
4750 tc_map = i40e_pf_get_default_tc(pf);
4752 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4753 tc_map = i40e_get_fcoe_tc_map(pf);
4754 #endif /* #ifdef I40E_FCOE */
4756 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4758 dev_info(&pf->pdev->dev,
4759 "Failed configuring TC for VSI seid=%d\n",
4761 /* Will try to configure as many components */
4763 /* Re-configure VSI vectors based on updated TC map */
4764 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4765 if (pf->vsi[v]->netdev)
4766 i40e_dcbnl_set_all(pf->vsi[v]);
4772 * i40e_resume_port_tx - Resume port Tx
4775 * Resume a port's Tx and issue a PF reset in case of failure to
4778 static int i40e_resume_port_tx(struct i40e_pf *pf)
4780 struct i40e_hw *hw = &pf->hw;
4783 ret = i40e_aq_resume_port_tx(hw, NULL);
4785 dev_info(&pf->pdev->dev,
4786 "Resume Port Tx failed, err %s aq_err %s\n",
4787 i40e_stat_str(&pf->hw, ret),
4788 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4789 /* Schedule PF reset to recover */
4790 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4791 i40e_service_event_schedule(pf);
4798 * i40e_init_pf_dcb - Initialize DCB configuration
4799 * @pf: PF being configured
4801 * Query the current DCB configuration and cache it
4802 * in the hardware structure
4804 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4806 struct i40e_hw *hw = &pf->hw;
4809 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4810 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4811 (pf->hw.aq.fw_maj_ver < 4))
4814 /* Get the initial DCB configuration */
4815 err = i40e_init_dcb(hw);
4817 /* Device/Function is not DCBX capable */
4818 if ((!hw->func_caps.dcb) ||
4819 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4820 dev_info(&pf->pdev->dev,
4821 "DCBX offload is not supported or is disabled for this PF.\n");
4823 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4827 /* When status is not DISABLED then DCBX in FW */
4828 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4829 DCB_CAP_DCBX_VER_IEEE;
4831 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4832 /* Enable DCB tagging only when more than one TC */
4833 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4834 pf->flags |= I40E_FLAG_DCB_ENABLED;
4835 dev_dbg(&pf->pdev->dev,
4836 "DCBX offload is supported for this PF.\n");
4839 dev_info(&pf->pdev->dev,
4840 "Query for DCB configuration failed, err %s aq_err %s\n",
4841 i40e_stat_str(&pf->hw, err),
4842 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4848 #endif /* CONFIG_I40E_DCB */
4849 #define SPEED_SIZE 14
4852 * i40e_print_link_message - print link up or down
4853 * @vsi: the VSI for which link needs a message
4855 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4857 char speed[SPEED_SIZE] = "Unknown";
4858 char fc[FC_SIZE] = "RX/TX";
4861 netdev_info(vsi->netdev, "NIC Link is Down\n");
4865 /* Warn user if link speed on NPAR enabled partition is not at
4868 if (vsi->back->hw.func_caps.npar_enable &&
4869 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4870 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4871 netdev_warn(vsi->netdev,
4872 "The partition detected link speed that is less than 10Gbps\n");
4874 switch (vsi->back->hw.phy.link_info.link_speed) {
4875 case I40E_LINK_SPEED_40GB:
4876 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4878 case I40E_LINK_SPEED_20GB:
4879 strncpy(speed, "20 Gbps", SPEED_SIZE);
4881 case I40E_LINK_SPEED_10GB:
4882 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4884 case I40E_LINK_SPEED_1GB:
4885 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4887 case I40E_LINK_SPEED_100MB:
4888 strncpy(speed, "100 Mbps", SPEED_SIZE);
4894 switch (vsi->back->hw.fc.current_mode) {
4896 strlcpy(fc, "RX/TX", FC_SIZE);
4898 case I40E_FC_TX_PAUSE:
4899 strlcpy(fc, "TX", FC_SIZE);
4901 case I40E_FC_RX_PAUSE:
4902 strlcpy(fc, "RX", FC_SIZE);
4905 strlcpy(fc, "None", FC_SIZE);
4909 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4914 * i40e_up_complete - Finish the last steps of bringing up a connection
4915 * @vsi: the VSI being configured
4917 static int i40e_up_complete(struct i40e_vsi *vsi)
4919 struct i40e_pf *pf = vsi->back;
4922 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4923 i40e_vsi_configure_msix(vsi);
4925 i40e_configure_msi_and_legacy(vsi);
4928 err = i40e_vsi_control_rings(vsi, true);
4932 clear_bit(__I40E_DOWN, &vsi->state);
4933 i40e_napi_enable_all(vsi);
4934 i40e_vsi_enable_irq(vsi);
4936 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4938 i40e_print_link_message(vsi, true);
4939 netif_tx_start_all_queues(vsi->netdev);
4940 netif_carrier_on(vsi->netdev);
4941 } else if (vsi->netdev) {
4942 i40e_print_link_message(vsi, false);
4943 /* need to check for qualified module here*/
4944 if ((pf->hw.phy.link_info.link_info &
4945 I40E_AQ_MEDIA_AVAILABLE) &&
4946 (!(pf->hw.phy.link_info.an_info &
4947 I40E_AQ_QUALIFIED_MODULE)))
4948 netdev_err(vsi->netdev,
4949 "the driver failed to link because an unqualified module was detected.");
4952 /* replay FDIR SB filters */
4953 if (vsi->type == I40E_VSI_FDIR) {
4954 /* reset fd counters */
4955 pf->fd_add_err = pf->fd_atr_cnt = 0;
4956 if (pf->fd_tcp_rule > 0) {
4957 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4958 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4959 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4960 pf->fd_tcp_rule = 0;
4962 i40e_fdir_filter_restore(vsi);
4964 i40e_service_event_schedule(pf);
4970 * i40e_vsi_reinit_locked - Reset the VSI
4971 * @vsi: the VSI being configured
4973 * Rebuild the ring structs after some configuration
4974 * has changed, e.g. MTU size.
4976 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4978 struct i40e_pf *pf = vsi->back;
4980 WARN_ON(in_interrupt());
4981 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4982 usleep_range(1000, 2000);
4985 /* Give a VF some time to respond to the reset. The
4986 * two second wait is based upon the watchdog cycle in
4989 if (vsi->type == I40E_VSI_SRIOV)
4992 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4996 * i40e_up - Bring the connection back up after being down
4997 * @vsi: the VSI being configured
4999 int i40e_up(struct i40e_vsi *vsi)
5003 err = i40e_vsi_configure(vsi);
5005 err = i40e_up_complete(vsi);
5011 * i40e_down - Shutdown the connection processing
5012 * @vsi: the VSI being stopped
5014 void i40e_down(struct i40e_vsi *vsi)
5018 /* It is assumed that the caller of this function
5019 * sets the vsi->state __I40E_DOWN bit.
5022 netif_carrier_off(vsi->netdev);
5023 netif_tx_disable(vsi->netdev);
5025 i40e_vsi_disable_irq(vsi);
5026 i40e_vsi_control_rings(vsi, false);
5027 i40e_napi_disable_all(vsi);
5029 for (i = 0; i < vsi->num_queue_pairs; i++) {
5030 i40e_clean_tx_ring(vsi->tx_rings[i]);
5031 i40e_clean_rx_ring(vsi->rx_rings[i]);
5036 * i40e_setup_tc - configure multiple traffic classes
5037 * @netdev: net device to configure
5038 * @tc: number of traffic classes to enable
5041 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5043 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5046 struct i40e_netdev_priv *np = netdev_priv(netdev);
5047 struct i40e_vsi *vsi = np->vsi;
5048 struct i40e_pf *pf = vsi->back;
5053 /* Check if DCB enabled to continue */
5054 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5055 netdev_info(netdev, "DCB is not enabled for adapter\n");
5059 /* Check if MFP enabled */
5060 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5061 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5065 /* Check whether tc count is within enabled limit */
5066 if (tc > i40e_pf_get_num_tc(pf)) {
5067 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5071 /* Generate TC map for number of tc requested */
5072 for (i = 0; i < tc; i++)
5073 enabled_tc |= BIT_ULL(i);
5075 /* Requesting same TC configuration as already enabled */
5076 if (enabled_tc == vsi->tc_config.enabled_tc)
5079 /* Quiesce VSI queues */
5080 i40e_quiesce_vsi(vsi);
5082 /* Configure VSI for enabled TCs */
5083 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5085 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5091 i40e_unquiesce_vsi(vsi);
5098 * i40e_open - Called when a network interface is made active
5099 * @netdev: network interface device structure
5101 * The open entry point is called when a network interface is made
5102 * active by the system (IFF_UP). At this point all resources needed
5103 * for transmit and receive operations are allocated, the interrupt
5104 * handler is registered with the OS, the netdev watchdog subtask is
5105 * enabled, and the stack is notified that the interface is ready.
5107 * Returns 0 on success, negative value on failure
5109 int i40e_open(struct net_device *netdev)
5111 struct i40e_netdev_priv *np = netdev_priv(netdev);
5112 struct i40e_vsi *vsi = np->vsi;
5113 struct i40e_pf *pf = vsi->back;
5116 /* disallow open during test or if eeprom is broken */
5117 if (test_bit(__I40E_TESTING, &pf->state) ||
5118 test_bit(__I40E_BAD_EEPROM, &pf->state))
5121 netif_carrier_off(netdev);
5123 err = i40e_vsi_open(vsi);
5127 /* configure global TSO hardware offload settings */
5128 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5129 TCP_FLAG_FIN) >> 16);
5130 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5132 TCP_FLAG_CWR) >> 16);
5133 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5135 #ifdef CONFIG_I40E_VXLAN
5136 vxlan_get_rx_port(netdev);
5144 * @vsi: the VSI to open
5146 * Finish initialization of the VSI.
5148 * Returns 0 on success, negative value on failure
5150 int i40e_vsi_open(struct i40e_vsi *vsi)
5152 struct i40e_pf *pf = vsi->back;
5153 char int_name[I40E_INT_NAME_STR_LEN];
5156 /* allocate descriptors */
5157 err = i40e_vsi_setup_tx_resources(vsi);
5160 err = i40e_vsi_setup_rx_resources(vsi);
5164 err = i40e_vsi_configure(vsi);
5169 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5170 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5171 err = i40e_vsi_request_irq(vsi, int_name);
5175 /* Notify the stack of the actual queue counts. */
5176 err = netif_set_real_num_tx_queues(vsi->netdev,
5177 vsi->num_queue_pairs);
5179 goto err_set_queues;
5181 err = netif_set_real_num_rx_queues(vsi->netdev,
5182 vsi->num_queue_pairs);
5184 goto err_set_queues;
5186 } else if (vsi->type == I40E_VSI_FDIR) {
5187 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5188 dev_driver_string(&pf->pdev->dev),
5189 dev_name(&pf->pdev->dev));
5190 err = i40e_vsi_request_irq(vsi, int_name);
5197 err = i40e_up_complete(vsi);
5199 goto err_up_complete;
5206 i40e_vsi_free_irq(vsi);
5208 i40e_vsi_free_rx_resources(vsi);
5210 i40e_vsi_free_tx_resources(vsi);
5211 if (vsi == pf->vsi[pf->lan_vsi])
5212 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5218 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5219 * @pf: Pointer to PF
5221 * This function destroys the hlist where all the Flow Director
5222 * filters were saved.
5224 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5226 struct i40e_fdir_filter *filter;
5227 struct hlist_node *node2;
5229 hlist_for_each_entry_safe(filter, node2,
5230 &pf->fdir_filter_list, fdir_node) {
5231 hlist_del(&filter->fdir_node);
5234 pf->fdir_pf_active_filters = 0;
5238 * i40e_close - Disables a network interface
5239 * @netdev: network interface device structure
5241 * The close entry point is called when an interface is de-activated
5242 * by the OS. The hardware is still under the driver's control, but
5243 * this netdev interface is disabled.
5245 * Returns 0, this is not allowed to fail
5248 int i40e_close(struct net_device *netdev)
5250 static int i40e_close(struct net_device *netdev)
5253 struct i40e_netdev_priv *np = netdev_priv(netdev);
5254 struct i40e_vsi *vsi = np->vsi;
5256 i40e_vsi_close(vsi);
5262 * i40e_do_reset - Start a PF or Core Reset sequence
5263 * @pf: board private structure
5264 * @reset_flags: which reset is requested
5266 * The essential difference in resets is that the PF Reset
5267 * doesn't clear the packet buffers, doesn't reset the PE
5268 * firmware, and doesn't bother the other PFs on the chip.
5270 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5274 WARN_ON(in_interrupt());
5276 if (i40e_check_asq_alive(&pf->hw))
5277 i40e_vc_notify_reset(pf);
5279 /* do the biggest reset indicated */
5280 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5282 /* Request a Global Reset
5284 * This will start the chip's countdown to the actual full
5285 * chip reset event, and a warning interrupt to be sent
5286 * to all PFs, including the requestor. Our handler
5287 * for the warning interrupt will deal with the shutdown
5288 * and recovery of the switch setup.
5290 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5291 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5292 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5293 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5295 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5297 /* Request a Core Reset
5299 * Same as Global Reset, except does *not* include the MAC/PHY
5301 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5302 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5303 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5304 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5305 i40e_flush(&pf->hw);
5307 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5309 /* Request a PF Reset
5311 * Resets only the PF-specific registers
5313 * This goes directly to the tear-down and rebuild of
5314 * the switch, since we need to do all the recovery as
5315 * for the Core Reset.
5317 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5318 i40e_handle_reset_warning(pf);
5320 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5323 /* Find the VSI(s) that requested a re-init */
5324 dev_info(&pf->pdev->dev,
5325 "VSI reinit requested\n");
5326 for (v = 0; v < pf->num_alloc_vsi; v++) {
5327 struct i40e_vsi *vsi = pf->vsi[v];
5329 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5330 i40e_vsi_reinit_locked(pf->vsi[v]);
5331 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5335 /* no further action needed, so return now */
5337 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5340 /* Find the VSI(s) that needs to be brought down */
5341 dev_info(&pf->pdev->dev, "VSI down requested\n");
5342 for (v = 0; v < pf->num_alloc_vsi; v++) {
5343 struct i40e_vsi *vsi = pf->vsi[v];
5345 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5346 set_bit(__I40E_DOWN, &vsi->state);
5348 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5352 /* no further action needed, so return now */
5355 dev_info(&pf->pdev->dev,
5356 "bad reset request 0x%08x\n", reset_flags);
5361 #ifdef CONFIG_I40E_DCB
5363 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5364 * @pf: board private structure
5365 * @old_cfg: current DCB config
5366 * @new_cfg: new DCB config
5368 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5369 struct i40e_dcbx_config *old_cfg,
5370 struct i40e_dcbx_config *new_cfg)
5372 bool need_reconfig = false;
5374 /* Check if ETS configuration has changed */
5375 if (memcmp(&new_cfg->etscfg,
5377 sizeof(new_cfg->etscfg))) {
5378 /* If Priority Table has changed reconfig is needed */
5379 if (memcmp(&new_cfg->etscfg.prioritytable,
5380 &old_cfg->etscfg.prioritytable,
5381 sizeof(new_cfg->etscfg.prioritytable))) {
5382 need_reconfig = true;
5383 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5386 if (memcmp(&new_cfg->etscfg.tcbwtable,
5387 &old_cfg->etscfg.tcbwtable,
5388 sizeof(new_cfg->etscfg.tcbwtable)))
5389 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5391 if (memcmp(&new_cfg->etscfg.tsatable,
5392 &old_cfg->etscfg.tsatable,
5393 sizeof(new_cfg->etscfg.tsatable)))
5394 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5397 /* Check if PFC configuration has changed */
5398 if (memcmp(&new_cfg->pfc,
5400 sizeof(new_cfg->pfc))) {
5401 need_reconfig = true;
5402 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5405 /* Check if APP Table has changed */
5406 if (memcmp(&new_cfg->app,
5408 sizeof(new_cfg->app))) {
5409 need_reconfig = true;
5410 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5413 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5414 return need_reconfig;
5418 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5419 * @pf: board private structure
5420 * @e: event info posted on ARQ
5422 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5423 struct i40e_arq_event_info *e)
5425 struct i40e_aqc_lldp_get_mib *mib =
5426 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5427 struct i40e_hw *hw = &pf->hw;
5428 struct i40e_dcbx_config tmp_dcbx_cfg;
5429 bool need_reconfig = false;
5433 /* Not DCB capable or capability disabled */
5434 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5437 /* Ignore if event is not for Nearest Bridge */
5438 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5439 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5440 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5441 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5444 /* Check MIB Type and return if event for Remote MIB update */
5445 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5446 dev_dbg(&pf->pdev->dev,
5447 "LLDP event mib type %s\n", type ? "remote" : "local");
5448 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5449 /* Update the remote cached instance and return */
5450 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5451 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5452 &hw->remote_dcbx_config);
5456 /* Store the old configuration */
5457 tmp_dcbx_cfg = hw->local_dcbx_config;
5459 /* Reset the old DCBx configuration data */
5460 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5461 /* Get updated DCBX data from firmware */
5462 ret = i40e_get_dcb_config(&pf->hw);
5464 dev_info(&pf->pdev->dev,
5465 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5466 i40e_stat_str(&pf->hw, ret),
5467 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5471 /* No change detected in DCBX configs */
5472 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5473 sizeof(tmp_dcbx_cfg))) {
5474 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5478 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5479 &hw->local_dcbx_config);
5481 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5486 /* Enable DCB tagging only when more than one TC */
5487 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5488 pf->flags |= I40E_FLAG_DCB_ENABLED;
5490 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5492 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5493 /* Reconfiguration needed quiesce all VSIs */
5494 i40e_pf_quiesce_all_vsi(pf);
5496 /* Changes in configuration update VEB/VSI */
5497 i40e_dcb_reconfigure(pf);
5499 ret = i40e_resume_port_tx(pf);
5501 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5502 /* In case of error no point in resuming VSIs */
5506 /* Wait for the PF's Tx queues to be disabled */
5507 ret = i40e_pf_wait_txq_disabled(pf);
5509 /* Schedule PF reset to recover */
5510 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5511 i40e_service_event_schedule(pf);
5513 i40e_pf_unquiesce_all_vsi(pf);
5519 #endif /* CONFIG_I40E_DCB */
5522 * i40e_do_reset_safe - Protected reset path for userland calls.
5523 * @pf: board private structure
5524 * @reset_flags: which reset is requested
5527 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5530 i40e_do_reset(pf, reset_flags);
5535 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5536 * @pf: board private structure
5537 * @e: event info posted on ARQ
5539 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5542 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5543 struct i40e_arq_event_info *e)
5545 struct i40e_aqc_lan_overflow *data =
5546 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5547 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5548 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5549 struct i40e_hw *hw = &pf->hw;
5553 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5556 /* Queue belongs to VF, find the VF and issue VF reset */
5557 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5558 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5559 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5560 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5561 vf_id -= hw->func_caps.vf_base_id;
5562 vf = &pf->vf[vf_id];
5563 i40e_vc_notify_vf_reset(vf);
5564 /* Allow VF to process pending reset notification */
5566 i40e_reset_vf(vf, false);
5571 * i40e_service_event_complete - Finish up the service event
5572 * @pf: board private structure
5574 static void i40e_service_event_complete(struct i40e_pf *pf)
5576 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5578 /* flush memory to make sure state is correct before next watchog */
5579 smp_mb__before_atomic();
5580 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5584 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5585 * @pf: board private structure
5587 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5591 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5592 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5597 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5598 * @pf: board private structure
5600 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5604 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5605 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5606 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5607 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5612 * i40e_get_global_fd_count - Get total FD filters programmed on device
5613 * @pf: board private structure
5615 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5619 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5620 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5621 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5622 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5627 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5628 * @pf: board private structure
5630 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5632 u32 fcnt_prog, fcnt_avail;
5634 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5637 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5640 fcnt_prog = i40e_get_global_fd_count(pf);
5641 fcnt_avail = pf->fdir_pf_filter_count;
5642 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5643 (pf->fd_add_err == 0) ||
5644 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5645 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5646 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5647 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5648 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5649 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5652 /* Wait for some more space to be available to turn on ATR */
5653 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5654 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5655 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5656 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5657 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5658 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5663 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5664 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5666 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5667 * @pf: board private structure
5669 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5671 unsigned long min_flush_time;
5672 int flush_wait_retry = 50;
5673 bool disable_atr = false;
5677 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5680 if (time_after(jiffies, pf->fd_flush_timestamp +
5681 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5682 /* If the flush is happening too quick and we have mostly
5683 * SB rules we should not re-enable ATR for some time.
5685 min_flush_time = pf->fd_flush_timestamp
5686 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5687 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5689 if (!(time_after(jiffies, min_flush_time)) &&
5690 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5691 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5692 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5696 pf->fd_flush_timestamp = jiffies;
5697 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5698 /* flush all filters */
5699 wr32(&pf->hw, I40E_PFQF_CTL_1,
5700 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5701 i40e_flush(&pf->hw);
5705 /* Check FD flush status every 5-6msec */
5706 usleep_range(5000, 6000);
5707 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5708 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5710 } while (flush_wait_retry--);
5711 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5712 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5714 /* replay sideband filters */
5715 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5717 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5718 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5719 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5720 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5726 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5727 * @pf: board private structure
5729 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5731 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5734 /* We can see up to 256 filter programming desc in transit if the filters are
5735 * being applied really fast; before we see the first
5736 * filter miss error on Rx queue 0. Accumulating enough error messages before
5737 * reacting will make sure we don't cause flush too often.
5739 #define I40E_MAX_FD_PROGRAM_ERROR 256
5742 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5743 * @pf: board private structure
5745 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5748 /* if interface is down do nothing */
5749 if (test_bit(__I40E_DOWN, &pf->state))
5752 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5755 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5756 i40e_fdir_flush_and_replay(pf);
5758 i40e_fdir_check_and_reenable(pf);
5763 * i40e_vsi_link_event - notify VSI of a link event
5764 * @vsi: vsi to be notified
5765 * @link_up: link up or down
5767 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5769 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5772 switch (vsi->type) {
5777 if (!vsi->netdev || !vsi->netdev_registered)
5781 netif_carrier_on(vsi->netdev);
5782 netif_tx_wake_all_queues(vsi->netdev);
5784 netif_carrier_off(vsi->netdev);
5785 netif_tx_stop_all_queues(vsi->netdev);
5789 case I40E_VSI_SRIOV:
5790 case I40E_VSI_VMDQ2:
5792 case I40E_VSI_MIRROR:
5794 /* there is no notification for other VSIs */
5800 * i40e_veb_link_event - notify elements on the veb of a link event
5801 * @veb: veb to be notified
5802 * @link_up: link up or down
5804 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5809 if (!veb || !veb->pf)
5813 /* depth first... */
5814 for (i = 0; i < I40E_MAX_VEB; i++)
5815 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5816 i40e_veb_link_event(pf->veb[i], link_up);
5818 /* ... now the local VSIs */
5819 for (i = 0; i < pf->num_alloc_vsi; i++)
5820 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5821 i40e_vsi_link_event(pf->vsi[i], link_up);
5825 * i40e_link_event - Update netif_carrier status
5826 * @pf: board private structure
5828 static void i40e_link_event(struct i40e_pf *pf)
5830 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5831 u8 new_link_speed, old_link_speed;
5833 bool new_link, old_link;
5835 /* set this to force the get_link_status call to refresh state */
5836 pf->hw.phy.get_link_info = true;
5838 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5840 status = i40e_get_link_status(&pf->hw, &new_link);
5842 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5847 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5848 new_link_speed = pf->hw.phy.link_info.link_speed;
5850 if (new_link == old_link &&
5851 new_link_speed == old_link_speed &&
5852 (test_bit(__I40E_DOWN, &vsi->state) ||
5853 new_link == netif_carrier_ok(vsi->netdev)))
5856 if (!test_bit(__I40E_DOWN, &vsi->state))
5857 i40e_print_link_message(vsi, new_link);
5859 /* Notify the base of the switch tree connected to
5860 * the link. Floating VEBs are not notified.
5862 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5863 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5865 i40e_vsi_link_event(vsi, new_link);
5868 i40e_vc_notify_link_state(pf);
5870 if (pf->flags & I40E_FLAG_PTP)
5871 i40e_ptp_set_increment(pf);
5875 * i40e_watchdog_subtask - periodic checks not using event driven response
5876 * @pf: board private structure
5878 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5882 /* if interface is down do nothing */
5883 if (test_bit(__I40E_DOWN, &pf->state) ||
5884 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5887 /* make sure we don't do these things too often */
5888 if (time_before(jiffies, (pf->service_timer_previous +
5889 pf->service_timer_period)))
5891 pf->service_timer_previous = jiffies;
5893 i40e_link_event(pf);
5895 /* Update the stats for active netdevs so the network stack
5896 * can look at updated numbers whenever it cares to
5898 for (i = 0; i < pf->num_alloc_vsi; i++)
5899 if (pf->vsi[i] && pf->vsi[i]->netdev)
5900 i40e_update_stats(pf->vsi[i]);
5902 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5903 /* Update the stats for the active switching components */
5904 for (i = 0; i < I40E_MAX_VEB; i++)
5906 i40e_update_veb_stats(pf->veb[i]);
5909 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5913 * i40e_reset_subtask - Set up for resetting the device and driver
5914 * @pf: board private structure
5916 static void i40e_reset_subtask(struct i40e_pf *pf)
5918 u32 reset_flags = 0;
5921 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5922 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5923 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5925 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5926 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5927 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5929 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5930 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5931 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5933 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5934 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5935 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5937 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5938 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5939 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5942 /* If there's a recovery already waiting, it takes
5943 * precedence before starting a new reset sequence.
5945 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5946 i40e_handle_reset_warning(pf);
5950 /* If we're already down or resetting, just bail */
5952 !test_bit(__I40E_DOWN, &pf->state) &&
5953 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5954 i40e_do_reset(pf, reset_flags);
5961 * i40e_handle_link_event - Handle link event
5962 * @pf: board private structure
5963 * @e: event info posted on ARQ
5965 static void i40e_handle_link_event(struct i40e_pf *pf,
5966 struct i40e_arq_event_info *e)
5968 struct i40e_hw *hw = &pf->hw;
5969 struct i40e_aqc_get_link_status *status =
5970 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5972 /* save off old link status information */
5973 hw->phy.link_info_old = hw->phy.link_info;
5975 /* Do a new status request to re-enable LSE reporting
5976 * and load new status information into the hw struct
5977 * This completely ignores any state information
5978 * in the ARQ event info, instead choosing to always
5979 * issue the AQ update link status command.
5981 i40e_link_event(pf);
5983 /* check for unqualified module, if link is down */
5984 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5985 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5986 (!(status->link_info & I40E_AQ_LINK_UP)))
5987 dev_err(&pf->pdev->dev,
5988 "The driver failed to link because an unqualified module was detected.\n");
5992 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5993 * @pf: board private structure
5995 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5997 struct i40e_arq_event_info event;
5998 struct i40e_hw *hw = &pf->hw;
6005 /* Do not run clean AQ when PF reset fails */
6006 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6009 /* check for error indications */
6010 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6012 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6013 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6014 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6016 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6017 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6018 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6020 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6021 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6022 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6025 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6027 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6029 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6030 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6031 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6033 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6034 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6035 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6037 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6038 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6039 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6042 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6044 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6045 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6050 ret = i40e_clean_arq_element(hw, &event, &pending);
6051 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6054 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6058 opcode = le16_to_cpu(event.desc.opcode);
6061 case i40e_aqc_opc_get_link_status:
6062 i40e_handle_link_event(pf, &event);
6064 case i40e_aqc_opc_send_msg_to_pf:
6065 ret = i40e_vc_process_vf_msg(pf,
6066 le16_to_cpu(event.desc.retval),
6067 le32_to_cpu(event.desc.cookie_high),
6068 le32_to_cpu(event.desc.cookie_low),
6072 case i40e_aqc_opc_lldp_update_mib:
6073 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6074 #ifdef CONFIG_I40E_DCB
6076 ret = i40e_handle_lldp_event(pf, &event);
6078 #endif /* CONFIG_I40E_DCB */
6080 case i40e_aqc_opc_event_lan_overflow:
6081 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6082 i40e_handle_lan_overflow_event(pf, &event);
6084 case i40e_aqc_opc_send_msg_to_peer:
6085 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6087 case i40e_aqc_opc_nvm_erase:
6088 case i40e_aqc_opc_nvm_update:
6089 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6092 dev_info(&pf->pdev->dev,
6093 "ARQ Error: Unknown event 0x%04x received\n",
6097 } while (pending && (i++ < pf->adminq_work_limit));
6099 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6100 /* re-enable Admin queue interrupt cause */
6101 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6102 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6103 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6106 kfree(event.msg_buf);
6110 * i40e_verify_eeprom - make sure eeprom is good to use
6111 * @pf: board private structure
6113 static void i40e_verify_eeprom(struct i40e_pf *pf)
6117 err = i40e_diag_eeprom_test(&pf->hw);
6119 /* retry in case of garbage read */
6120 err = i40e_diag_eeprom_test(&pf->hw);
6122 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6124 set_bit(__I40E_BAD_EEPROM, &pf->state);
6128 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6129 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6130 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6135 * i40e_enable_pf_switch_lb
6136 * @pf: pointer to the PF structure
6138 * enable switch loop back or die - no point in a return value
6140 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6142 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6143 struct i40e_vsi_context ctxt;
6146 ctxt.seid = pf->main_vsi_seid;
6147 ctxt.pf_num = pf->hw.pf_id;
6149 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6151 dev_info(&pf->pdev->dev,
6152 "couldn't get PF vsi config, err %s aq_err %s\n",
6153 i40e_stat_str(&pf->hw, ret),
6154 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6157 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6158 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6159 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6161 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6163 dev_info(&pf->pdev->dev,
6164 "update vsi switch failed, err %s aq_err %s\n",
6165 i40e_stat_str(&pf->hw, ret),
6166 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6171 * i40e_disable_pf_switch_lb
6172 * @pf: pointer to the PF structure
6174 * disable switch loop back or die - no point in a return value
6176 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6178 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6179 struct i40e_vsi_context ctxt;
6182 ctxt.seid = pf->main_vsi_seid;
6183 ctxt.pf_num = pf->hw.pf_id;
6185 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6187 dev_info(&pf->pdev->dev,
6188 "couldn't get PF vsi config, err %s aq_err %s\n",
6189 i40e_stat_str(&pf->hw, ret),
6190 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6193 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6194 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6195 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6197 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6199 dev_info(&pf->pdev->dev,
6200 "update vsi switch failed, err %s aq_err %s\n",
6201 i40e_stat_str(&pf->hw, ret),
6202 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6207 * i40e_config_bridge_mode - Configure the HW bridge mode
6208 * @veb: pointer to the bridge instance
6210 * Configure the loop back mode for the LAN VSI that is downlink to the
6211 * specified HW bridge instance. It is expected this function is called
6212 * when a new HW bridge is instantiated.
6214 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6216 struct i40e_pf *pf = veb->pf;
6218 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6219 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6220 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6221 i40e_disable_pf_switch_lb(pf);
6223 i40e_enable_pf_switch_lb(pf);
6227 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6228 * @veb: pointer to the VEB instance
6230 * This is a recursive function that first builds the attached VSIs then
6231 * recurses in to build the next layer of VEB. We track the connections
6232 * through our own index numbers because the seid's from the HW could
6233 * change across the reset.
6235 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6237 struct i40e_vsi *ctl_vsi = NULL;
6238 struct i40e_pf *pf = veb->pf;
6242 /* build VSI that owns this VEB, temporarily attached to base VEB */
6243 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6245 pf->vsi[v]->veb_idx == veb->idx &&
6246 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6247 ctl_vsi = pf->vsi[v];
6252 dev_info(&pf->pdev->dev,
6253 "missing owner VSI for veb_idx %d\n", veb->idx);
6255 goto end_reconstitute;
6257 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6258 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6259 ret = i40e_add_vsi(ctl_vsi);
6261 dev_info(&pf->pdev->dev,
6262 "rebuild of veb_idx %d owner VSI failed: %d\n",
6264 goto end_reconstitute;
6266 i40e_vsi_reset_stats(ctl_vsi);
6268 /* create the VEB in the switch and move the VSI onto the VEB */
6269 ret = i40e_add_veb(veb, ctl_vsi);
6271 goto end_reconstitute;
6273 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6274 veb->bridge_mode = BRIDGE_MODE_VEB;
6276 veb->bridge_mode = BRIDGE_MODE_VEPA;
6277 i40e_config_bridge_mode(veb);
6279 /* create the remaining VSIs attached to this VEB */
6280 for (v = 0; v < pf->num_alloc_vsi; v++) {
6281 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6284 if (pf->vsi[v]->veb_idx == veb->idx) {
6285 struct i40e_vsi *vsi = pf->vsi[v];
6286 vsi->uplink_seid = veb->seid;
6287 ret = i40e_add_vsi(vsi);
6289 dev_info(&pf->pdev->dev,
6290 "rebuild of vsi_idx %d failed: %d\n",
6292 goto end_reconstitute;
6294 i40e_vsi_reset_stats(vsi);
6298 /* create any VEBs attached to this VEB - RECURSION */
6299 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6300 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6301 pf->veb[veb_idx]->uplink_seid = veb->seid;
6302 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6313 * i40e_get_capabilities - get info about the HW
6314 * @pf: the PF struct
6316 static int i40e_get_capabilities(struct i40e_pf *pf)
6318 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6323 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6325 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6329 /* this loads the data into the hw struct for us */
6330 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6332 i40e_aqc_opc_list_func_capabilities,
6334 /* data loaded, buffer no longer needed */
6337 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6338 /* retry with a larger buffer */
6339 buf_len = data_size;
6340 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6341 dev_info(&pf->pdev->dev,
6342 "capability discovery failed, err %s aq_err %s\n",
6343 i40e_stat_str(&pf->hw, err),
6344 i40e_aq_str(&pf->hw,
6345 pf->hw.aq.asq_last_status));
6350 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6351 (pf->hw.aq.fw_maj_ver < 2)) {
6352 pf->hw.func_caps.num_msix_vectors++;
6353 pf->hw.func_caps.num_msix_vectors_vf++;
6356 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6357 dev_info(&pf->pdev->dev,
6358 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6359 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6360 pf->hw.func_caps.num_msix_vectors,
6361 pf->hw.func_caps.num_msix_vectors_vf,
6362 pf->hw.func_caps.fd_filters_guaranteed,
6363 pf->hw.func_caps.fd_filters_best_effort,
6364 pf->hw.func_caps.num_tx_qp,
6365 pf->hw.func_caps.num_vsis);
6367 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6368 + pf->hw.func_caps.num_vfs)
6369 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6370 dev_info(&pf->pdev->dev,
6371 "got num_vsis %d, setting num_vsis to %d\n",
6372 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6373 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6379 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6382 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6383 * @pf: board private structure
6385 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6387 struct i40e_vsi *vsi;
6390 /* quick workaround for an NVM issue that leaves a critical register
6393 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6394 static const u32 hkey[] = {
6395 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6396 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6397 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6400 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6401 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6404 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6407 /* find existing VSI and see if it needs configuring */
6409 for (i = 0; i < pf->num_alloc_vsi; i++) {
6410 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6416 /* create a new VSI if none exists */
6418 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6419 pf->vsi[pf->lan_vsi]->seid, 0);
6421 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6422 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6427 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6431 * i40e_fdir_teardown - release the Flow Director resources
6432 * @pf: board private structure
6434 static void i40e_fdir_teardown(struct i40e_pf *pf)
6438 i40e_fdir_filter_exit(pf);
6439 for (i = 0; i < pf->num_alloc_vsi; i++) {
6440 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6441 i40e_vsi_release(pf->vsi[i]);
6448 * i40e_prep_for_reset - prep for the core to reset
6449 * @pf: board private structure
6451 * Close up the VFs and other things in prep for PF Reset.
6453 static void i40e_prep_for_reset(struct i40e_pf *pf)
6455 struct i40e_hw *hw = &pf->hw;
6456 i40e_status ret = 0;
6459 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6460 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6463 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6465 /* quiesce the VSIs and their queues that are not already DOWN */
6466 i40e_pf_quiesce_all_vsi(pf);
6468 for (v = 0; v < pf->num_alloc_vsi; v++) {
6470 pf->vsi[v]->seid = 0;
6473 i40e_shutdown_adminq(&pf->hw);
6475 /* call shutdown HMC */
6476 if (hw->hmc.hmc_obj) {
6477 ret = i40e_shutdown_lan_hmc(hw);
6479 dev_warn(&pf->pdev->dev,
6480 "shutdown_lan_hmc failed: %d\n", ret);
6485 * i40e_send_version - update firmware with driver version
6488 static void i40e_send_version(struct i40e_pf *pf)
6490 struct i40e_driver_version dv;
6492 dv.major_version = DRV_VERSION_MAJOR;
6493 dv.minor_version = DRV_VERSION_MINOR;
6494 dv.build_version = DRV_VERSION_BUILD;
6495 dv.subbuild_version = 0;
6496 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6497 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6501 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6502 * @pf: board private structure
6503 * @reinit: if the Main VSI needs to re-initialized.
6505 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6507 struct i40e_hw *hw = &pf->hw;
6508 u8 set_fc_aq_fail = 0;
6512 /* Now we wait for GRST to settle out.
6513 * We don't have to delete the VEBs or VSIs from the hw switch
6514 * because the reset will make them disappear.
6516 ret = i40e_pf_reset(hw);
6518 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6519 set_bit(__I40E_RESET_FAILED, &pf->state);
6520 goto clear_recovery;
6524 if (test_bit(__I40E_DOWN, &pf->state))
6525 goto clear_recovery;
6526 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6528 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6529 ret = i40e_init_adminq(&pf->hw);
6531 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6532 i40e_stat_str(&pf->hw, ret),
6533 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6534 goto clear_recovery;
6537 /* re-verify the eeprom if we just had an EMP reset */
6538 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6539 i40e_verify_eeprom(pf);
6541 i40e_clear_pxe_mode(hw);
6542 ret = i40e_get_capabilities(pf);
6544 goto end_core_reset;
6546 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6547 hw->func_caps.num_rx_qp,
6548 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6550 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6551 goto end_core_reset;
6553 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6555 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6556 goto end_core_reset;
6559 #ifdef CONFIG_I40E_DCB
6560 ret = i40e_init_pf_dcb(pf);
6562 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6563 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6564 /* Continue without DCB enabled */
6566 #endif /* CONFIG_I40E_DCB */
6568 i40e_init_pf_fcoe(pf);
6571 /* do basic switch setup */
6572 ret = i40e_setup_pf_switch(pf, reinit);
6574 goto end_core_reset;
6576 /* driver is only interested in link up/down and module qualification
6577 * reports from firmware
6579 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6580 I40E_AQ_EVENT_LINK_UPDOWN |
6581 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6583 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6584 i40e_stat_str(&pf->hw, ret),
6585 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6587 /* make sure our flow control settings are restored */
6588 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6590 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6591 i40e_stat_str(&pf->hw, ret),
6592 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6594 /* Rebuild the VSIs and VEBs that existed before reset.
6595 * They are still in our local switch element arrays, so only
6596 * need to rebuild the switch model in the HW.
6598 * If there were VEBs but the reconstitution failed, we'll try
6599 * try to recover minimal use by getting the basic PF VSI working.
6601 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6602 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6603 /* find the one VEB connected to the MAC, and find orphans */
6604 for (v = 0; v < I40E_MAX_VEB; v++) {
6608 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6609 pf->veb[v]->uplink_seid == 0) {
6610 ret = i40e_reconstitute_veb(pf->veb[v]);
6615 /* If Main VEB failed, we're in deep doodoo,
6616 * so give up rebuilding the switch and set up
6617 * for minimal rebuild of PF VSI.
6618 * If orphan failed, we'll report the error
6619 * but try to keep going.
6621 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6622 dev_info(&pf->pdev->dev,
6623 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6625 pf->vsi[pf->lan_vsi]->uplink_seid
6628 } else if (pf->veb[v]->uplink_seid == 0) {
6629 dev_info(&pf->pdev->dev,
6630 "rebuild of orphan VEB failed: %d\n",
6637 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6638 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6639 /* no VEB, so rebuild only the Main VSI */
6640 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6642 dev_info(&pf->pdev->dev,
6643 "rebuild of Main VSI failed: %d\n", ret);
6644 goto end_core_reset;
6648 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6649 (pf->hw.aq.fw_maj_ver < 4)) {
6651 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6653 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6654 i40e_stat_str(&pf->hw, ret),
6655 i40e_aq_str(&pf->hw,
6656 pf->hw.aq.asq_last_status));
6658 /* reinit the misc interrupt */
6659 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6660 ret = i40e_setup_misc_vector(pf);
6662 /* restart the VSIs that were rebuilt and running before the reset */
6663 i40e_pf_unquiesce_all_vsi(pf);
6665 if (pf->num_alloc_vfs) {
6666 for (v = 0; v < pf->num_alloc_vfs; v++)
6667 i40e_reset_vf(&pf->vf[v], true);
6670 /* tell the firmware that we're starting */
6671 i40e_send_version(pf);
6674 clear_bit(__I40E_RESET_FAILED, &pf->state);
6676 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6680 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6681 * @pf: board private structure
6683 * Close up the VFs and other things in prep for a Core Reset,
6684 * then get ready to rebuild the world.
6686 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6688 i40e_prep_for_reset(pf);
6689 i40e_reset_and_rebuild(pf, false);
6693 * i40e_handle_mdd_event
6694 * @pf: pointer to the PF structure
6696 * Called from the MDD irq handler to identify possibly malicious vfs
6698 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6700 struct i40e_hw *hw = &pf->hw;
6701 bool mdd_detected = false;
6702 bool pf_mdd_detected = false;
6707 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6710 /* find what triggered the MDD event */
6711 reg = rd32(hw, I40E_GL_MDET_TX);
6712 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6713 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6714 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6715 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6716 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6717 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6718 I40E_GL_MDET_TX_EVENT_SHIFT;
6719 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6720 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6721 pf->hw.func_caps.base_queue;
6722 if (netif_msg_tx_err(pf))
6723 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6724 event, queue, pf_num, vf_num);
6725 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6726 mdd_detected = true;
6728 reg = rd32(hw, I40E_GL_MDET_RX);
6729 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6730 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6731 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6732 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6733 I40E_GL_MDET_RX_EVENT_SHIFT;
6734 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6735 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6736 pf->hw.func_caps.base_queue;
6737 if (netif_msg_rx_err(pf))
6738 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6739 event, queue, func);
6740 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6741 mdd_detected = true;
6745 reg = rd32(hw, I40E_PF_MDET_TX);
6746 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6747 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6748 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6749 pf_mdd_detected = true;
6751 reg = rd32(hw, I40E_PF_MDET_RX);
6752 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6753 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6754 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6755 pf_mdd_detected = true;
6757 /* Queue belongs to the PF, initiate a reset */
6758 if (pf_mdd_detected) {
6759 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6760 i40e_service_event_schedule(pf);
6764 /* see if one of the VFs needs its hand slapped */
6765 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6767 reg = rd32(hw, I40E_VP_MDET_TX(i));
6768 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6769 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6770 vf->num_mdd_events++;
6771 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6775 reg = rd32(hw, I40E_VP_MDET_RX(i));
6776 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6777 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6778 vf->num_mdd_events++;
6779 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6783 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6784 dev_info(&pf->pdev->dev,
6785 "Too many MDD events on VF %d, disabled\n", i);
6786 dev_info(&pf->pdev->dev,
6787 "Use PF Control I/F to re-enable the VF\n");
6788 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6792 /* re-enable mdd interrupt cause */
6793 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6794 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6795 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6796 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6800 #ifdef CONFIG_I40E_VXLAN
6802 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6803 * @pf: board private structure
6805 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6807 struct i40e_hw *hw = &pf->hw;
6812 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6815 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6817 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6818 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6819 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6820 port = pf->vxlan_ports[i];
6822 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6823 I40E_AQC_TUNNEL_TYPE_VXLAN,
6826 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6829 dev_info(&pf->pdev->dev,
6830 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6831 port ? "add" : "delete",
6833 i40e_stat_str(&pf->hw, ret),
6834 i40e_aq_str(&pf->hw,
6835 pf->hw.aq.asq_last_status));
6836 pf->vxlan_ports[i] = 0;
6844 * i40e_service_task - Run the driver's async subtasks
6845 * @work: pointer to work_struct containing our data
6847 static void i40e_service_task(struct work_struct *work)
6849 struct i40e_pf *pf = container_of(work,
6852 unsigned long start_time = jiffies;
6854 /* don't bother with service tasks if a reset is in progress */
6855 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6856 i40e_service_event_complete(pf);
6860 i40e_detect_recover_hung(pf);
6861 i40e_reset_subtask(pf);
6862 i40e_handle_mdd_event(pf);
6863 i40e_vc_process_vflr_event(pf);
6864 i40e_watchdog_subtask(pf);
6865 i40e_fdir_reinit_subtask(pf);
6866 i40e_sync_filters_subtask(pf);
6867 #ifdef CONFIG_I40E_VXLAN
6868 i40e_sync_vxlan_filters_subtask(pf);
6870 i40e_clean_adminq_subtask(pf);
6872 i40e_service_event_complete(pf);
6874 /* If the tasks have taken longer than one timer cycle or there
6875 * is more work to be done, reschedule the service task now
6876 * rather than wait for the timer to tick again.
6878 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6879 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6880 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6881 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6882 i40e_service_event_schedule(pf);
6886 * i40e_service_timer - timer callback
6887 * @data: pointer to PF struct
6889 static void i40e_service_timer(unsigned long data)
6891 struct i40e_pf *pf = (struct i40e_pf *)data;
6893 mod_timer(&pf->service_timer,
6894 round_jiffies(jiffies + pf->service_timer_period));
6895 i40e_service_event_schedule(pf);
6899 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6900 * @vsi: the VSI being configured
6902 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6904 struct i40e_pf *pf = vsi->back;
6906 switch (vsi->type) {
6908 vsi->alloc_queue_pairs = pf->num_lan_qps;
6909 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6910 I40E_REQ_DESCRIPTOR_MULTIPLE);
6911 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6912 vsi->num_q_vectors = pf->num_lan_msix;
6914 vsi->num_q_vectors = 1;
6919 vsi->alloc_queue_pairs = 1;
6920 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6921 I40E_REQ_DESCRIPTOR_MULTIPLE);
6922 vsi->num_q_vectors = 1;
6925 case I40E_VSI_VMDQ2:
6926 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6927 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6928 I40E_REQ_DESCRIPTOR_MULTIPLE);
6929 vsi->num_q_vectors = pf->num_vmdq_msix;
6932 case I40E_VSI_SRIOV:
6933 vsi->alloc_queue_pairs = pf->num_vf_qps;
6934 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6935 I40E_REQ_DESCRIPTOR_MULTIPLE);
6940 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6941 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6942 I40E_REQ_DESCRIPTOR_MULTIPLE);
6943 vsi->num_q_vectors = pf->num_fcoe_msix;
6946 #endif /* I40E_FCOE */
6956 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6957 * @type: VSI pointer
6958 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6960 * On error: returns error code (negative)
6961 * On success: returns 0
6963 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6968 /* allocate memory for both Tx and Rx ring pointers */
6969 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6970 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6973 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6975 if (alloc_qvectors) {
6976 /* allocate memory for q_vector pointers */
6977 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6978 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6979 if (!vsi->q_vectors) {
6987 kfree(vsi->tx_rings);
6992 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6993 * @pf: board private structure
6994 * @type: type of VSI
6996 * On error: returns error code (negative)
6997 * On success: returns vsi index in PF (positive)
6999 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7002 struct i40e_vsi *vsi;
7006 /* Need to protect the allocation of the VSIs at the PF level */
7007 mutex_lock(&pf->switch_mutex);
7009 /* VSI list may be fragmented if VSI creation/destruction has
7010 * been happening. We can afford to do a quick scan to look
7011 * for any free VSIs in the list.
7013 * find next empty vsi slot, looping back around if necessary
7016 while (i < pf->num_alloc_vsi && pf->vsi[i])
7018 if (i >= pf->num_alloc_vsi) {
7020 while (i < pf->next_vsi && pf->vsi[i])
7024 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7025 vsi_idx = i; /* Found one! */
7028 goto unlock_pf; /* out of VSI slots! */
7032 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7039 set_bit(__I40E_DOWN, &vsi->state);
7042 vsi->rx_itr_setting = pf->rx_itr_default;
7043 vsi->tx_itr_setting = pf->tx_itr_default;
7044 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7045 pf->rss_table_size : 64;
7046 vsi->netdev_registered = false;
7047 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7048 INIT_LIST_HEAD(&vsi->mac_filter_list);
7049 vsi->irqs_ready = false;
7051 ret = i40e_set_num_rings_in_vsi(vsi);
7055 ret = i40e_vsi_alloc_arrays(vsi, true);
7059 /* Setup default MSIX irq handler for VSI */
7060 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7062 pf->vsi[vsi_idx] = vsi;
7067 pf->next_vsi = i - 1;
7070 mutex_unlock(&pf->switch_mutex);
7075 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7076 * @type: VSI pointer
7077 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7079 * On error: returns error code (negative)
7080 * On success: returns 0
7082 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7084 /* free the ring and vector containers */
7085 if (free_qvectors) {
7086 kfree(vsi->q_vectors);
7087 vsi->q_vectors = NULL;
7089 kfree(vsi->tx_rings);
7090 vsi->tx_rings = NULL;
7091 vsi->rx_rings = NULL;
7095 * i40e_vsi_clear - Deallocate the VSI provided
7096 * @vsi: the VSI being un-configured
7098 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7109 mutex_lock(&pf->switch_mutex);
7110 if (!pf->vsi[vsi->idx]) {
7111 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7112 vsi->idx, vsi->idx, vsi, vsi->type);
7116 if (pf->vsi[vsi->idx] != vsi) {
7117 dev_err(&pf->pdev->dev,
7118 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7119 pf->vsi[vsi->idx]->idx,
7121 pf->vsi[vsi->idx]->type,
7122 vsi->idx, vsi, vsi->type);
7126 /* updates the PF for this cleared vsi */
7127 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7128 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7130 i40e_vsi_free_arrays(vsi, true);
7132 pf->vsi[vsi->idx] = NULL;
7133 if (vsi->idx < pf->next_vsi)
7134 pf->next_vsi = vsi->idx;
7137 mutex_unlock(&pf->switch_mutex);
7145 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7146 * @vsi: the VSI being cleaned
7148 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7152 if (vsi->tx_rings && vsi->tx_rings[0]) {
7153 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7154 kfree_rcu(vsi->tx_rings[i], rcu);
7155 vsi->tx_rings[i] = NULL;
7156 vsi->rx_rings[i] = NULL;
7162 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7163 * @vsi: the VSI being configured
7165 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7167 struct i40e_ring *tx_ring, *rx_ring;
7168 struct i40e_pf *pf = vsi->back;
7171 /* Set basic values in the rings to be used later during open() */
7172 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7173 /* allocate space for both Tx and Rx in one shot */
7174 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7178 tx_ring->queue_index = i;
7179 tx_ring->reg_idx = vsi->base_queue + i;
7180 tx_ring->ring_active = false;
7182 tx_ring->netdev = vsi->netdev;
7183 tx_ring->dev = &pf->pdev->dev;
7184 tx_ring->count = vsi->num_desc;
7186 tx_ring->dcb_tc = 0;
7187 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7188 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7189 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7190 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7191 vsi->tx_rings[i] = tx_ring;
7193 rx_ring = &tx_ring[1];
7194 rx_ring->queue_index = i;
7195 rx_ring->reg_idx = vsi->base_queue + i;
7196 rx_ring->ring_active = false;
7198 rx_ring->netdev = vsi->netdev;
7199 rx_ring->dev = &pf->pdev->dev;
7200 rx_ring->count = vsi->num_desc;
7202 rx_ring->dcb_tc = 0;
7203 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7204 set_ring_16byte_desc_enabled(rx_ring);
7206 clear_ring_16byte_desc_enabled(rx_ring);
7207 vsi->rx_rings[i] = rx_ring;
7213 i40e_vsi_clear_rings(vsi);
7218 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7219 * @pf: board private structure
7220 * @vectors: the number of MSI-X vectors to request
7222 * Returns the number of vectors reserved, or error
7224 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7226 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7227 I40E_MIN_MSIX, vectors);
7229 dev_info(&pf->pdev->dev,
7230 "MSI-X vector reservation failed: %d\n", vectors);
7238 * i40e_init_msix - Setup the MSIX capability
7239 * @pf: board private structure
7241 * Work with the OS to set up the MSIX vectors needed.
7243 * Returns the number of vectors reserved or negative on failure
7245 static int i40e_init_msix(struct i40e_pf *pf)
7247 struct i40e_hw *hw = &pf->hw;
7252 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7255 /* The number of vectors we'll request will be comprised of:
7256 * - Add 1 for "other" cause for Admin Queue events, etc.
7257 * - The number of LAN queue pairs
7258 * - Queues being used for RSS.
7259 * We don't need as many as max_rss_size vectors.
7260 * use rss_size instead in the calculation since that
7261 * is governed by number of cpus in the system.
7262 * - assumes symmetric Tx/Rx pairing
7263 * - The number of VMDq pairs
7265 * - The number of FCOE qps.
7267 * Once we count this up, try the request.
7269 * If we can't get what we want, we'll simplify to nearly nothing
7270 * and try again. If that still fails, we punt.
7272 vectors_left = hw->func_caps.num_msix_vectors;
7275 /* reserve one vector for miscellaneous handler */
7281 /* reserve vectors for the main PF traffic queues */
7282 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7283 vectors_left -= pf->num_lan_msix;
7284 v_budget += pf->num_lan_msix;
7286 /* reserve one vector for sideband flow director */
7287 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7292 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7297 /* can we reserve enough for FCoE? */
7298 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7300 pf->num_fcoe_msix = 0;
7301 else if (vectors_left >= pf->num_fcoe_qps)
7302 pf->num_fcoe_msix = pf->num_fcoe_qps;
7304 pf->num_fcoe_msix = 1;
7305 v_budget += pf->num_fcoe_msix;
7306 vectors_left -= pf->num_fcoe_msix;
7310 /* any vectors left over go for VMDq support */
7311 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7312 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7313 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7315 /* if we're short on vectors for what's desired, we limit
7316 * the queues per vmdq. If this is still more than are
7317 * available, the user will need to change the number of
7318 * queues/vectors used by the PF later with the ethtool
7321 if (vmdq_vecs < vmdq_vecs_wanted)
7322 pf->num_vmdq_qps = 1;
7323 pf->num_vmdq_msix = pf->num_vmdq_qps;
7325 v_budget += vmdq_vecs;
7326 vectors_left -= vmdq_vecs;
7329 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7331 if (!pf->msix_entries)
7334 for (i = 0; i < v_budget; i++)
7335 pf->msix_entries[i].entry = i;
7336 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7338 if (v_actual != v_budget) {
7339 /* If we have limited resources, we will start with no vectors
7340 * for the special features and then allocate vectors to some
7341 * of these features based on the policy and at the end disable
7342 * the features that did not get any vectors.
7345 pf->num_fcoe_qps = 0;
7346 pf->num_fcoe_msix = 0;
7348 pf->num_vmdq_msix = 0;
7351 if (v_actual < I40E_MIN_MSIX) {
7352 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7353 kfree(pf->msix_entries);
7354 pf->msix_entries = NULL;
7357 } else if (v_actual == I40E_MIN_MSIX) {
7358 /* Adjust for minimal MSIX use */
7359 pf->num_vmdq_vsis = 0;
7360 pf->num_vmdq_qps = 0;
7361 pf->num_lan_qps = 1;
7362 pf->num_lan_msix = 1;
7364 } else if (v_actual != v_budget) {
7367 /* reserve the misc vector */
7370 /* Scale vector usage down */
7371 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7372 pf->num_vmdq_vsis = 1;
7373 pf->num_vmdq_qps = 1;
7374 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7376 /* partition out the remaining vectors */
7379 pf->num_lan_msix = 1;
7383 /* give one vector to FCoE */
7384 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7385 pf->num_lan_msix = 1;
7386 pf->num_fcoe_msix = 1;
7389 pf->num_lan_msix = 2;
7394 /* give one vector to FCoE */
7395 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7396 pf->num_fcoe_msix = 1;
7400 /* give the rest to the PF */
7401 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7406 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7407 (pf->num_vmdq_msix == 0)) {
7408 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7409 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7413 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7414 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7415 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7422 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7423 * @vsi: the VSI being configured
7424 * @v_idx: index of the vector in the vsi struct
7426 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7428 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7430 struct i40e_q_vector *q_vector;
7432 /* allocate q_vector */
7433 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7437 q_vector->vsi = vsi;
7438 q_vector->v_idx = v_idx;
7439 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7441 netif_napi_add(vsi->netdev, &q_vector->napi,
7442 i40e_napi_poll, NAPI_POLL_WEIGHT);
7444 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7445 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7447 /* tie q_vector and vsi together */
7448 vsi->q_vectors[v_idx] = q_vector;
7454 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7455 * @vsi: the VSI being configured
7457 * We allocate one q_vector per queue interrupt. If allocation fails we
7460 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7462 struct i40e_pf *pf = vsi->back;
7463 int v_idx, num_q_vectors;
7466 /* if not MSIX, give the one vector only to the LAN VSI */
7467 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7468 num_q_vectors = vsi->num_q_vectors;
7469 else if (vsi == pf->vsi[pf->lan_vsi])
7474 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7475 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7484 i40e_free_q_vector(vsi, v_idx);
7490 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7491 * @pf: board private structure to initialize
7493 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7498 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7499 vectors = i40e_init_msix(pf);
7501 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7503 I40E_FLAG_FCOE_ENABLED |
7505 I40E_FLAG_RSS_ENABLED |
7506 I40E_FLAG_DCB_CAPABLE |
7507 I40E_FLAG_SRIOV_ENABLED |
7508 I40E_FLAG_FD_SB_ENABLED |
7509 I40E_FLAG_FD_ATR_ENABLED |
7510 I40E_FLAG_VMDQ_ENABLED);
7512 /* rework the queue expectations without MSIX */
7513 i40e_determine_queue_usage(pf);
7517 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7518 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7519 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7520 vectors = pci_enable_msi(pf->pdev);
7522 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7524 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7526 vectors = 1; /* one MSI or Legacy vector */
7529 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7530 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7532 /* set up vector assignment tracking */
7533 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7534 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7535 if (!pf->irq_pile) {
7536 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7539 pf->irq_pile->num_entries = vectors;
7540 pf->irq_pile->search_hint = 0;
7542 /* track first vector for misc interrupts, ignore return */
7543 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7549 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7550 * @pf: board private structure
7552 * This sets up the handler for MSIX 0, which is used to manage the
7553 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7554 * when in MSI or Legacy interrupt mode.
7556 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7558 struct i40e_hw *hw = &pf->hw;
7561 /* Only request the irq if this is the first time through, and
7562 * not when we're rebuilding after a Reset
7564 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7565 err = request_irq(pf->msix_entries[0].vector,
7566 i40e_intr, 0, pf->int_name, pf);
7568 dev_info(&pf->pdev->dev,
7569 "request_irq for %s failed: %d\n",
7575 i40e_enable_misc_int_causes(pf);
7577 /* associate no queues to the misc vector */
7578 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7579 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7583 i40e_irq_dynamic_enable_icr0(pf);
7589 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7590 * @vsi: vsi structure
7591 * @seed: RSS hash seed
7593 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7595 struct i40e_aqc_get_set_rss_key_data rss_key;
7596 struct i40e_pf *pf = vsi->back;
7597 struct i40e_hw *hw = &pf->hw;
7598 bool pf_lut = false;
7602 memset(&rss_key, 0, sizeof(rss_key));
7603 memcpy(&rss_key, seed, sizeof(rss_key));
7605 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7609 /* Populate the LUT with max no. of queues in round robin fashion */
7610 for (i = 0; i < vsi->rss_table_size; i++)
7611 rss_lut[i] = i % vsi->rss_size;
7613 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7615 dev_info(&pf->pdev->dev,
7616 "Cannot set RSS key, err %s aq_err %s\n",
7617 i40e_stat_str(&pf->hw, ret),
7618 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7619 goto config_rss_aq_out;
7622 if (vsi->type == I40E_VSI_MAIN)
7625 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7626 vsi->rss_table_size);
7628 dev_info(&pf->pdev->dev,
7629 "Cannot set RSS lut, err %s aq_err %s\n",
7630 i40e_stat_str(&pf->hw, ret),
7631 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7639 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7640 * @vsi: VSI structure
7642 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7644 u8 seed[I40E_HKEY_ARRAY_SIZE];
7645 struct i40e_pf *pf = vsi->back;
7647 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7648 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7650 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7651 return i40e_config_rss_aq(vsi, seed);
7657 * i40e_config_rss_reg - Prepare for RSS if used
7658 * @pf: board private structure
7659 * @seed: RSS hash seed
7661 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7663 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7664 struct i40e_hw *hw = &pf->hw;
7665 u32 *seed_dw = (u32 *)seed;
7666 u32 current_queue = 0;
7670 /* Fill out hash function seed */
7671 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7672 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7674 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7676 for (j = 0; j < 4; j++) {
7677 if (current_queue == vsi->rss_size)
7679 lut |= ((current_queue) << (8 * j));
7682 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7690 * i40e_config_rss - Prepare for RSS if used
7691 * @pf: board private structure
7693 static int i40e_config_rss(struct i40e_pf *pf)
7695 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7696 u8 seed[I40E_HKEY_ARRAY_SIZE];
7697 struct i40e_hw *hw = &pf->hw;
7701 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7703 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7704 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7705 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7706 hena |= i40e_pf_get_default_rss_hena(pf);
7708 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7709 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7711 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7713 /* Determine the RSS table size based on the hardware capabilities */
7714 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7715 reg_val = (pf->rss_table_size == 512) ?
7716 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7717 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7718 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7720 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7721 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7723 return i40e_config_rss_reg(pf, seed);
7727 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7728 * @pf: board private structure
7729 * @queue_count: the requested queue count for rss.
7731 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7732 * count which may be different from the requested queue count.
7734 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7736 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7739 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7742 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7744 if (queue_count != vsi->num_queue_pairs) {
7745 vsi->req_queue_pairs = queue_count;
7746 i40e_prep_for_reset(pf);
7748 pf->rss_size = new_rss_size;
7750 i40e_reset_and_rebuild(pf, true);
7751 i40e_config_rss(pf);
7753 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7754 return pf->rss_size;
7758 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7759 * @pf: board private structure
7761 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7764 bool min_valid, max_valid;
7767 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7768 &min_valid, &max_valid);
7772 pf->npar_min_bw = min_bw;
7774 pf->npar_max_bw = max_bw;
7781 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7782 * @pf: board private structure
7784 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7786 struct i40e_aqc_configure_partition_bw_data bw_data;
7789 /* Set the valid bit for this PF */
7790 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7791 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7792 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7794 /* Set the new bandwidths */
7795 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7801 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7802 * @pf: board private structure
7804 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7806 /* Commit temporary BW setting to permanent NVM image */
7807 enum i40e_admin_queue_err last_aq_status;
7811 if (pf->hw.partition_id != 1) {
7812 dev_info(&pf->pdev->dev,
7813 "Commit BW only works on partition 1! This is partition %d",
7814 pf->hw.partition_id);
7815 ret = I40E_NOT_SUPPORTED;
7819 /* Acquire NVM for read access */
7820 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7821 last_aq_status = pf->hw.aq.asq_last_status;
7823 dev_info(&pf->pdev->dev,
7824 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7825 i40e_stat_str(&pf->hw, ret),
7826 i40e_aq_str(&pf->hw, last_aq_status));
7830 /* Read word 0x10 of NVM - SW compatibility word 1 */
7831 ret = i40e_aq_read_nvm(&pf->hw,
7832 I40E_SR_NVM_CONTROL_WORD,
7833 0x10, sizeof(nvm_word), &nvm_word,
7835 /* Save off last admin queue command status before releasing
7838 last_aq_status = pf->hw.aq.asq_last_status;
7839 i40e_release_nvm(&pf->hw);
7841 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7842 i40e_stat_str(&pf->hw, ret),
7843 i40e_aq_str(&pf->hw, last_aq_status));
7847 /* Wait a bit for NVM release to complete */
7850 /* Acquire NVM for write access */
7851 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7852 last_aq_status = pf->hw.aq.asq_last_status;
7854 dev_info(&pf->pdev->dev,
7855 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7856 i40e_stat_str(&pf->hw, ret),
7857 i40e_aq_str(&pf->hw, last_aq_status));
7860 /* Write it back out unchanged to initiate update NVM,
7861 * which will force a write of the shadow (alt) RAM to
7862 * the NVM - thus storing the bandwidth values permanently.
7864 ret = i40e_aq_update_nvm(&pf->hw,
7865 I40E_SR_NVM_CONTROL_WORD,
7866 0x10, sizeof(nvm_word),
7867 &nvm_word, true, NULL);
7868 /* Save off last admin queue command status before releasing
7871 last_aq_status = pf->hw.aq.asq_last_status;
7872 i40e_release_nvm(&pf->hw);
7874 dev_info(&pf->pdev->dev,
7875 "BW settings NOT SAVED, err %s aq_err %s\n",
7876 i40e_stat_str(&pf->hw, ret),
7877 i40e_aq_str(&pf->hw, last_aq_status));
7884 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7885 * @pf: board private structure to initialize
7887 * i40e_sw_init initializes the Adapter private data structure.
7888 * Fields are initialized based on PCI device information and
7889 * OS network device settings (MTU size).
7891 static int i40e_sw_init(struct i40e_pf *pf)
7896 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7897 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7898 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7899 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7900 if (I40E_DEBUG_USER & debug)
7901 pf->hw.debug_mask = debug;
7902 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7903 I40E_DEFAULT_MSG_ENABLE);
7906 /* Set default capability flags */
7907 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7908 I40E_FLAG_MSI_ENABLED |
7909 I40E_FLAG_MSIX_ENABLED;
7911 if (iommu_present(&pci_bus_type))
7912 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7914 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7916 /* Set default ITR */
7917 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7918 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7920 /* Depending on PF configurations, it is possible that the RSS
7921 * maximum might end up larger than the available queues
7923 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7925 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7926 pf->rss_size_max = min_t(int, pf->rss_size_max,
7927 pf->hw.func_caps.num_tx_qp);
7928 if (pf->hw.func_caps.rss) {
7929 pf->flags |= I40E_FLAG_RSS_ENABLED;
7930 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7933 /* MFP mode enabled */
7934 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7935 pf->flags |= I40E_FLAG_MFP_ENABLED;
7936 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7937 if (i40e_get_npar_bw_setting(pf))
7938 dev_warn(&pf->pdev->dev,
7939 "Could not get NPAR bw settings\n");
7941 dev_info(&pf->pdev->dev,
7942 "Min BW = %8.8x, Max BW = %8.8x\n",
7943 pf->npar_min_bw, pf->npar_max_bw);
7946 /* FW/NVM is not yet fixed in this regard */
7947 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7948 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7949 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7950 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7951 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7952 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7954 dev_info(&pf->pdev->dev,
7955 "Flow Director Sideband mode Disabled in MFP mode\n");
7957 pf->fdir_pf_filter_count =
7958 pf->hw.func_caps.fd_filters_guaranteed;
7959 pf->hw.fdir_shared_filter_count =
7960 pf->hw.func_caps.fd_filters_best_effort;
7963 if (pf->hw.func_caps.vmdq) {
7964 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7965 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7969 i40e_init_pf_fcoe(pf);
7971 #endif /* I40E_FCOE */
7972 #ifdef CONFIG_PCI_IOV
7973 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7974 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7975 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7976 pf->num_req_vfs = min_t(int,
7977 pf->hw.func_caps.num_vfs,
7980 #endif /* CONFIG_PCI_IOV */
7981 if (pf->hw.mac.type == I40E_MAC_X722) {
7982 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7983 I40E_FLAG_128_QP_RSS_CAPABLE |
7984 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7985 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7986 I40E_FLAG_WB_ON_ITR_CAPABLE |
7987 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7989 pf->eeprom_version = 0xDEAD;
7990 pf->lan_veb = I40E_NO_VEB;
7991 pf->lan_vsi = I40E_NO_VSI;
7993 /* By default FW has this off for performance reasons */
7994 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
7996 /* set up queue assignment tracking */
7997 size = sizeof(struct i40e_lump_tracking)
7998 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7999 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8004 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8005 pf->qp_pile->search_hint = 0;
8007 pf->tx_timeout_recovery_level = 1;
8009 mutex_init(&pf->switch_mutex);
8011 /* If NPAR is enabled nudge the Tx scheduler */
8012 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8013 i40e_set_npar_bw_setting(pf);
8020 * i40e_set_ntuple - set the ntuple feature flag and take action
8021 * @pf: board private structure to initialize
8022 * @features: the feature set that the stack is suggesting
8024 * returns a bool to indicate if reset needs to happen
8026 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8028 bool need_reset = false;
8030 /* Check if Flow Director n-tuple support was enabled or disabled. If
8031 * the state changed, we need to reset.
8033 if (features & NETIF_F_NTUPLE) {
8034 /* Enable filters and mark for reset */
8035 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8037 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8039 /* turn off filters, mark for reset and clear SW filter list */
8040 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8042 i40e_fdir_filter_exit(pf);
8044 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8045 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8046 /* reset fd counters */
8047 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8048 pf->fdir_pf_active_filters = 0;
8049 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8050 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8051 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8052 /* if ATR was auto disabled it can be re-enabled. */
8053 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8054 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8055 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8061 * i40e_set_features - set the netdev feature flags
8062 * @netdev: ptr to the netdev being adjusted
8063 * @features: the feature set that the stack is suggesting
8065 static int i40e_set_features(struct net_device *netdev,
8066 netdev_features_t features)
8068 struct i40e_netdev_priv *np = netdev_priv(netdev);
8069 struct i40e_vsi *vsi = np->vsi;
8070 struct i40e_pf *pf = vsi->back;
8073 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8074 i40e_vlan_stripping_enable(vsi);
8076 i40e_vlan_stripping_disable(vsi);
8078 need_reset = i40e_set_ntuple(pf, features);
8081 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8086 #ifdef CONFIG_I40E_VXLAN
8088 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8089 * @pf: board private structure
8090 * @port: The UDP port to look up
8092 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8094 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8098 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8099 if (pf->vxlan_ports[i] == port)
8107 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8108 * @netdev: This physical port's netdev
8109 * @sa_family: Socket Family that VXLAN is notifying us about
8110 * @port: New UDP port number that VXLAN started listening to
8112 static void i40e_add_vxlan_port(struct net_device *netdev,
8113 sa_family_t sa_family, __be16 port)
8115 struct i40e_netdev_priv *np = netdev_priv(netdev);
8116 struct i40e_vsi *vsi = np->vsi;
8117 struct i40e_pf *pf = vsi->back;
8121 if (sa_family == AF_INET6)
8124 idx = i40e_get_vxlan_port_idx(pf, port);
8126 /* Check if port already exists */
8127 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8128 netdev_info(netdev, "vxlan port %d already offloaded\n",
8133 /* Now check if there is space to add the new port */
8134 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8136 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8137 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8142 /* New port: add it and mark its index in the bitmap */
8143 pf->vxlan_ports[next_idx] = port;
8144 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8145 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8149 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8150 * @netdev: This physical port's netdev
8151 * @sa_family: Socket Family that VXLAN is notifying us about
8152 * @port: UDP port number that VXLAN stopped listening to
8154 static void i40e_del_vxlan_port(struct net_device *netdev,
8155 sa_family_t sa_family, __be16 port)
8157 struct i40e_netdev_priv *np = netdev_priv(netdev);
8158 struct i40e_vsi *vsi = np->vsi;
8159 struct i40e_pf *pf = vsi->back;
8162 if (sa_family == AF_INET6)
8165 idx = i40e_get_vxlan_port_idx(pf, port);
8167 /* Check if port already exists */
8168 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8169 /* if port exists, set it to 0 (mark for deletion)
8170 * and make it pending
8172 pf->vxlan_ports[idx] = 0;
8173 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8174 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8176 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8182 static int i40e_get_phys_port_id(struct net_device *netdev,
8183 struct netdev_phys_item_id *ppid)
8185 struct i40e_netdev_priv *np = netdev_priv(netdev);
8186 struct i40e_pf *pf = np->vsi->back;
8187 struct i40e_hw *hw = &pf->hw;
8189 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8192 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8193 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8199 * i40e_ndo_fdb_add - add an entry to the hardware database
8200 * @ndm: the input from the stack
8201 * @tb: pointer to array of nladdr (unused)
8202 * @dev: the net device pointer
8203 * @addr: the MAC address entry being added
8204 * @flags: instructions from stack about fdb operation
8206 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8207 struct net_device *dev,
8208 const unsigned char *addr, u16 vid,
8211 struct i40e_netdev_priv *np = netdev_priv(dev);
8212 struct i40e_pf *pf = np->vsi->back;
8215 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8219 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8223 /* Hardware does not support aging addresses so if a
8224 * ndm_state is given only allow permanent addresses
8226 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8227 netdev_info(dev, "FDB only supports static addresses\n");
8231 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8232 err = dev_uc_add_excl(dev, addr);
8233 else if (is_multicast_ether_addr(addr))
8234 err = dev_mc_add_excl(dev, addr);
8238 /* Only return duplicate errors if NLM_F_EXCL is set */
8239 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8246 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8247 * @dev: the netdev being configured
8248 * @nlh: RTNL message
8250 * Inserts a new hardware bridge if not already created and
8251 * enables the bridging mode requested (VEB or VEPA). If the
8252 * hardware bridge has already been inserted and the request
8253 * is to change the mode then that requires a PF reset to
8254 * allow rebuild of the components with required hardware
8255 * bridge mode enabled.
8257 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8258 struct nlmsghdr *nlh,
8261 struct i40e_netdev_priv *np = netdev_priv(dev);
8262 struct i40e_vsi *vsi = np->vsi;
8263 struct i40e_pf *pf = vsi->back;
8264 struct i40e_veb *veb = NULL;
8265 struct nlattr *attr, *br_spec;
8268 /* Only for PF VSI for now */
8269 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8272 /* Find the HW bridge for PF VSI */
8273 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8274 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8278 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8280 nla_for_each_nested(attr, br_spec, rem) {
8283 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8286 mode = nla_get_u16(attr);
8287 if ((mode != BRIDGE_MODE_VEPA) &&
8288 (mode != BRIDGE_MODE_VEB))
8291 /* Insert a new HW bridge */
8293 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8294 vsi->tc_config.enabled_tc);
8296 veb->bridge_mode = mode;
8297 i40e_config_bridge_mode(veb);
8299 /* No Bridge HW offload available */
8303 } else if (mode != veb->bridge_mode) {
8304 /* Existing HW bridge but different mode needs reset */
8305 veb->bridge_mode = mode;
8306 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8307 if (mode == BRIDGE_MODE_VEB)
8308 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8310 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8311 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8320 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8323 * @seq: RTNL message seq #
8324 * @dev: the netdev being configured
8325 * @filter_mask: unused
8327 * Return the mode in which the hardware bridge is operating in
8330 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8331 struct net_device *dev,
8332 u32 filter_mask, int nlflags)
8334 struct i40e_netdev_priv *np = netdev_priv(dev);
8335 struct i40e_vsi *vsi = np->vsi;
8336 struct i40e_pf *pf = vsi->back;
8337 struct i40e_veb *veb = NULL;
8340 /* Only for PF VSI for now */
8341 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8344 /* Find the HW bridge for the PF VSI */
8345 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8346 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8353 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8354 nlflags, 0, 0, filter_mask, NULL);
8357 #define I40E_MAX_TUNNEL_HDR_LEN 80
8359 * i40e_features_check - Validate encapsulated packet conforms to limits
8361 * @netdev: This physical port's netdev
8362 * @features: Offload features that the stack believes apply
8364 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8365 struct net_device *dev,
8366 netdev_features_t features)
8368 if (skb->encapsulation &&
8369 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8370 I40E_MAX_TUNNEL_HDR_LEN))
8371 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8376 static const struct net_device_ops i40e_netdev_ops = {
8377 .ndo_open = i40e_open,
8378 .ndo_stop = i40e_close,
8379 .ndo_start_xmit = i40e_lan_xmit_frame,
8380 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8381 .ndo_set_rx_mode = i40e_set_rx_mode,
8382 .ndo_validate_addr = eth_validate_addr,
8383 .ndo_set_mac_address = i40e_set_mac,
8384 .ndo_change_mtu = i40e_change_mtu,
8385 .ndo_do_ioctl = i40e_ioctl,
8386 .ndo_tx_timeout = i40e_tx_timeout,
8387 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8388 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8389 #ifdef CONFIG_NET_POLL_CONTROLLER
8390 .ndo_poll_controller = i40e_netpoll,
8392 .ndo_setup_tc = i40e_setup_tc,
8394 .ndo_fcoe_enable = i40e_fcoe_enable,
8395 .ndo_fcoe_disable = i40e_fcoe_disable,
8397 .ndo_set_features = i40e_set_features,
8398 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8399 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8400 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8401 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8402 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8403 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8404 #ifdef CONFIG_I40E_VXLAN
8405 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8406 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8408 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8409 .ndo_fdb_add = i40e_ndo_fdb_add,
8410 .ndo_features_check = i40e_features_check,
8411 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8412 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8416 * i40e_config_netdev - Setup the netdev flags
8417 * @vsi: the VSI being configured
8419 * Returns 0 on success, negative value on failure
8421 static int i40e_config_netdev(struct i40e_vsi *vsi)
8423 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8424 struct i40e_pf *pf = vsi->back;
8425 struct i40e_hw *hw = &pf->hw;
8426 struct i40e_netdev_priv *np;
8427 struct net_device *netdev;
8428 u8 mac_addr[ETH_ALEN];
8431 etherdev_size = sizeof(struct i40e_netdev_priv);
8432 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8436 vsi->netdev = netdev;
8437 np = netdev_priv(netdev);
8440 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8441 NETIF_F_GSO_UDP_TUNNEL |
8444 netdev->features = NETIF_F_SG |
8448 NETIF_F_GSO_UDP_TUNNEL |
8449 NETIF_F_HW_VLAN_CTAG_TX |
8450 NETIF_F_HW_VLAN_CTAG_RX |
8451 NETIF_F_HW_VLAN_CTAG_FILTER |
8460 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8461 netdev->features |= NETIF_F_NTUPLE;
8463 /* copy netdev features into list of user selectable features */
8464 netdev->hw_features |= netdev->features;
8466 if (vsi->type == I40E_VSI_MAIN) {
8467 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8468 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8469 /* The following steps are necessary to prevent reception
8470 * of tagged packets - some older NVM configurations load a
8471 * default a MAC-VLAN filter that accepts any tagged packet
8472 * which must be replaced by a normal filter.
8474 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8475 i40e_add_filter(vsi, mac_addr,
8476 I40E_VLAN_ANY, false, true);
8478 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8479 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8480 pf->vsi[pf->lan_vsi]->netdev->name);
8481 random_ether_addr(mac_addr);
8482 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8484 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8486 ether_addr_copy(netdev->dev_addr, mac_addr);
8487 ether_addr_copy(netdev->perm_addr, mac_addr);
8488 /* vlan gets same features (except vlan offload)
8489 * after any tweaks for specific VSI types
8491 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8492 NETIF_F_HW_VLAN_CTAG_RX |
8493 NETIF_F_HW_VLAN_CTAG_FILTER);
8494 netdev->priv_flags |= IFF_UNICAST_FLT;
8495 netdev->priv_flags |= IFF_SUPP_NOFCS;
8496 /* Setup netdev TC information */
8497 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8499 netdev->netdev_ops = &i40e_netdev_ops;
8500 netdev->watchdog_timeo = 5 * HZ;
8501 i40e_set_ethtool_ops(netdev);
8503 i40e_fcoe_config_netdev(netdev, vsi);
8510 * i40e_vsi_delete - Delete a VSI from the switch
8511 * @vsi: the VSI being removed
8513 * Returns 0 on success, negative value on failure
8515 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8517 /* remove default VSI is not allowed */
8518 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8521 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8525 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8526 * @vsi: the VSI being queried
8528 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8530 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8532 struct i40e_veb *veb;
8533 struct i40e_pf *pf = vsi->back;
8535 /* Uplink is not a bridge so default to VEB */
8536 if (vsi->veb_idx == I40E_NO_VEB)
8539 veb = pf->veb[vsi->veb_idx];
8540 /* Uplink is a bridge in VEPA mode */
8541 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8544 /* Uplink is a bridge in VEB mode */
8549 * i40e_add_vsi - Add a VSI to the switch
8550 * @vsi: the VSI being configured
8552 * This initializes a VSI context depending on the VSI type to be added and
8553 * passes it down to the add_vsi aq command.
8555 static int i40e_add_vsi(struct i40e_vsi *vsi)
8558 struct i40e_mac_filter *f, *ftmp;
8559 struct i40e_pf *pf = vsi->back;
8560 struct i40e_hw *hw = &pf->hw;
8561 struct i40e_vsi_context ctxt;
8562 u8 enabled_tc = 0x1; /* TC0 enabled */
8565 memset(&ctxt, 0, sizeof(ctxt));
8566 switch (vsi->type) {
8568 /* The PF's main VSI is already setup as part of the
8569 * device initialization, so we'll not bother with
8570 * the add_vsi call, but we will retrieve the current
8573 ctxt.seid = pf->main_vsi_seid;
8574 ctxt.pf_num = pf->hw.pf_id;
8576 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8577 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8579 dev_info(&pf->pdev->dev,
8580 "couldn't get PF vsi config, err %s aq_err %s\n",
8581 i40e_stat_str(&pf->hw, ret),
8582 i40e_aq_str(&pf->hw,
8583 pf->hw.aq.asq_last_status));
8586 vsi->info = ctxt.info;
8587 vsi->info.valid_sections = 0;
8589 vsi->seid = ctxt.seid;
8590 vsi->id = ctxt.vsi_number;
8592 enabled_tc = i40e_pf_get_tc_map(pf);
8594 /* MFP mode setup queue map and update VSI */
8595 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8596 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8597 memset(&ctxt, 0, sizeof(ctxt));
8598 ctxt.seid = pf->main_vsi_seid;
8599 ctxt.pf_num = pf->hw.pf_id;
8601 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8602 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8604 dev_info(&pf->pdev->dev,
8605 "update vsi failed, err %s aq_err %s\n",
8606 i40e_stat_str(&pf->hw, ret),
8607 i40e_aq_str(&pf->hw,
8608 pf->hw.aq.asq_last_status));
8612 /* update the local VSI info queue map */
8613 i40e_vsi_update_queue_map(vsi, &ctxt);
8614 vsi->info.valid_sections = 0;
8616 /* Default/Main VSI is only enabled for TC0
8617 * reconfigure it to enable all TCs that are
8618 * available on the port in SFP mode.
8619 * For MFP case the iSCSI PF would use this
8620 * flow to enable LAN+iSCSI TC.
8622 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8624 dev_info(&pf->pdev->dev,
8625 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8627 i40e_stat_str(&pf->hw, ret),
8628 i40e_aq_str(&pf->hw,
8629 pf->hw.aq.asq_last_status));
8636 ctxt.pf_num = hw->pf_id;
8638 ctxt.uplink_seid = vsi->uplink_seid;
8639 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8640 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8641 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8642 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8643 ctxt.info.valid_sections |=
8644 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8645 ctxt.info.switch_id =
8646 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8648 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8651 case I40E_VSI_VMDQ2:
8652 ctxt.pf_num = hw->pf_id;
8654 ctxt.uplink_seid = vsi->uplink_seid;
8655 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8656 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8658 /* This VSI is connected to VEB so the switch_id
8659 * should be set to zero by default.
8661 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8662 ctxt.info.valid_sections |=
8663 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8664 ctxt.info.switch_id =
8665 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8668 /* Setup the VSI tx/rx queue map for TC0 only for now */
8669 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8672 case I40E_VSI_SRIOV:
8673 ctxt.pf_num = hw->pf_id;
8674 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8675 ctxt.uplink_seid = vsi->uplink_seid;
8676 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8677 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8679 /* This VSI is connected to VEB so the switch_id
8680 * should be set to zero by default.
8682 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8683 ctxt.info.valid_sections |=
8684 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8685 ctxt.info.switch_id =
8686 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8689 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8690 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8691 if (pf->vf[vsi->vf_id].spoofchk) {
8692 ctxt.info.valid_sections |=
8693 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8694 ctxt.info.sec_flags |=
8695 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8696 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8698 /* Setup the VSI tx/rx queue map for TC0 only for now */
8699 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8704 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8706 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8711 #endif /* I40E_FCOE */
8716 if (vsi->type != I40E_VSI_MAIN) {
8717 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8719 dev_info(&vsi->back->pdev->dev,
8720 "add vsi failed, err %s aq_err %s\n",
8721 i40e_stat_str(&pf->hw, ret),
8722 i40e_aq_str(&pf->hw,
8723 pf->hw.aq.asq_last_status));
8727 vsi->info = ctxt.info;
8728 vsi->info.valid_sections = 0;
8729 vsi->seid = ctxt.seid;
8730 vsi->id = ctxt.vsi_number;
8733 /* If macvlan filters already exist, force them to get loaded */
8734 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8738 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8739 struct i40e_aqc_remove_macvlan_element_data element;
8741 memset(&element, 0, sizeof(element));
8742 ether_addr_copy(element.mac_addr, f->macaddr);
8743 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8744 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8747 /* some older FW has a different default */
8749 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8750 i40e_aq_remove_macvlan(hw, vsi->seid,
8754 i40e_aq_mac_address_write(hw,
8755 I40E_AQC_WRITE_TYPE_LAA_WOL,
8760 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8761 pf->flags |= I40E_FLAG_FILTER_SYNC;
8764 /* Update VSI BW information */
8765 ret = i40e_vsi_get_bw_info(vsi);
8767 dev_info(&pf->pdev->dev,
8768 "couldn't get vsi bw info, err %s aq_err %s\n",
8769 i40e_stat_str(&pf->hw, ret),
8770 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8771 /* VSI is already added so not tearing that up */
8780 * i40e_vsi_release - Delete a VSI and free its resources
8781 * @vsi: the VSI being removed
8783 * Returns 0 on success or < 0 on error
8785 int i40e_vsi_release(struct i40e_vsi *vsi)
8787 struct i40e_mac_filter *f, *ftmp;
8788 struct i40e_veb *veb = NULL;
8795 /* release of a VEB-owner or last VSI is not allowed */
8796 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8797 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8798 vsi->seid, vsi->uplink_seid);
8801 if (vsi == pf->vsi[pf->lan_vsi] &&
8802 !test_bit(__I40E_DOWN, &pf->state)) {
8803 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8807 uplink_seid = vsi->uplink_seid;
8808 if (vsi->type != I40E_VSI_SRIOV) {
8809 if (vsi->netdev_registered) {
8810 vsi->netdev_registered = false;
8812 /* results in a call to i40e_close() */
8813 unregister_netdev(vsi->netdev);
8816 i40e_vsi_close(vsi);
8818 i40e_vsi_disable_irq(vsi);
8821 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8822 i40e_del_filter(vsi, f->macaddr, f->vlan,
8823 f->is_vf, f->is_netdev);
8824 i40e_sync_vsi_filters(vsi, false);
8826 i40e_vsi_delete(vsi);
8827 i40e_vsi_free_q_vectors(vsi);
8829 free_netdev(vsi->netdev);
8832 i40e_vsi_clear_rings(vsi);
8833 i40e_vsi_clear(vsi);
8835 /* If this was the last thing on the VEB, except for the
8836 * controlling VSI, remove the VEB, which puts the controlling
8837 * VSI onto the next level down in the switch.
8839 * Well, okay, there's one more exception here: don't remove
8840 * the orphan VEBs yet. We'll wait for an explicit remove request
8841 * from up the network stack.
8843 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8845 pf->vsi[i]->uplink_seid == uplink_seid &&
8846 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8847 n++; /* count the VSIs */
8850 for (i = 0; i < I40E_MAX_VEB; i++) {
8853 if (pf->veb[i]->uplink_seid == uplink_seid)
8854 n++; /* count the VEBs */
8855 if (pf->veb[i]->seid == uplink_seid)
8858 if (n == 0 && veb && veb->uplink_seid != 0)
8859 i40e_veb_release(veb);
8865 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8866 * @vsi: ptr to the VSI
8868 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8869 * corresponding SW VSI structure and initializes num_queue_pairs for the
8870 * newly allocated VSI.
8872 * Returns 0 on success or negative on failure
8874 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8877 struct i40e_pf *pf = vsi->back;
8879 if (vsi->q_vectors[0]) {
8880 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8885 if (vsi->base_vector) {
8886 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8887 vsi->seid, vsi->base_vector);
8891 ret = i40e_vsi_alloc_q_vectors(vsi);
8893 dev_info(&pf->pdev->dev,
8894 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8895 vsi->num_q_vectors, vsi->seid, ret);
8896 vsi->num_q_vectors = 0;
8897 goto vector_setup_out;
8900 /* In Legacy mode, we do not have to get any other vector since we
8901 * piggyback on the misc/ICR0 for queue interrupts.
8903 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8905 if (vsi->num_q_vectors)
8906 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8907 vsi->num_q_vectors, vsi->idx);
8908 if (vsi->base_vector < 0) {
8909 dev_info(&pf->pdev->dev,
8910 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8911 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8912 i40e_vsi_free_q_vectors(vsi);
8914 goto vector_setup_out;
8922 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8923 * @vsi: pointer to the vsi.
8925 * This re-allocates a vsi's queue resources.
8927 * Returns pointer to the successfully allocated and configured VSI sw struct
8928 * on success, otherwise returns NULL on failure.
8930 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8932 struct i40e_pf *pf = vsi->back;
8936 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8937 i40e_vsi_clear_rings(vsi);
8939 i40e_vsi_free_arrays(vsi, false);
8940 i40e_set_num_rings_in_vsi(vsi);
8941 ret = i40e_vsi_alloc_arrays(vsi, false);
8945 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8947 dev_info(&pf->pdev->dev,
8948 "failed to get tracking for %d queues for VSI %d err %d\n",
8949 vsi->alloc_queue_pairs, vsi->seid, ret);
8952 vsi->base_queue = ret;
8954 /* Update the FW view of the VSI. Force a reset of TC and queue
8955 * layout configurations.
8957 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8958 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8959 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8960 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8962 /* assign it some queues */
8963 ret = i40e_alloc_rings(vsi);
8967 /* map all of the rings to the q_vectors */
8968 i40e_vsi_map_rings_to_vectors(vsi);
8972 i40e_vsi_free_q_vectors(vsi);
8973 if (vsi->netdev_registered) {
8974 vsi->netdev_registered = false;
8975 unregister_netdev(vsi->netdev);
8976 free_netdev(vsi->netdev);
8979 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8981 i40e_vsi_clear(vsi);
8986 * i40e_vsi_setup - Set up a VSI by a given type
8987 * @pf: board private structure
8989 * @uplink_seid: the switch element to link to
8990 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8992 * This allocates the sw VSI structure and its queue resources, then add a VSI
8993 * to the identified VEB.
8995 * Returns pointer to the successfully allocated and configure VSI sw struct on
8996 * success, otherwise returns NULL on failure.
8998 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8999 u16 uplink_seid, u32 param1)
9001 struct i40e_vsi *vsi = NULL;
9002 struct i40e_veb *veb = NULL;
9006 /* The requested uplink_seid must be either
9007 * - the PF's port seid
9008 * no VEB is needed because this is the PF
9009 * or this is a Flow Director special case VSI
9010 * - seid of an existing VEB
9011 * - seid of a VSI that owns an existing VEB
9012 * - seid of a VSI that doesn't own a VEB
9013 * a new VEB is created and the VSI becomes the owner
9014 * - seid of the PF VSI, which is what creates the first VEB
9015 * this is a special case of the previous
9017 * Find which uplink_seid we were given and create a new VEB if needed
9019 for (i = 0; i < I40E_MAX_VEB; i++) {
9020 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9026 if (!veb && uplink_seid != pf->mac_seid) {
9028 for (i = 0; i < pf->num_alloc_vsi; i++) {
9029 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9035 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9040 if (vsi->uplink_seid == pf->mac_seid)
9041 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9042 vsi->tc_config.enabled_tc);
9043 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9044 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9045 vsi->tc_config.enabled_tc);
9047 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9048 dev_info(&vsi->back->pdev->dev,
9049 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9052 /* We come up by default in VEPA mode if SRIOV is not
9053 * already enabled, in which case we can't force VEPA
9056 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9057 veb->bridge_mode = BRIDGE_MODE_VEPA;
9058 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9060 i40e_config_bridge_mode(veb);
9062 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9063 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9067 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9071 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9072 uplink_seid = veb->seid;
9075 /* get vsi sw struct */
9076 v_idx = i40e_vsi_mem_alloc(pf, type);
9079 vsi = pf->vsi[v_idx];
9083 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9085 if (type == I40E_VSI_MAIN)
9086 pf->lan_vsi = v_idx;
9087 else if (type == I40E_VSI_SRIOV)
9088 vsi->vf_id = param1;
9089 /* assign it some queues */
9090 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9093 dev_info(&pf->pdev->dev,
9094 "failed to get tracking for %d queues for VSI %d err=%d\n",
9095 vsi->alloc_queue_pairs, vsi->seid, ret);
9098 vsi->base_queue = ret;
9100 /* get a VSI from the hardware */
9101 vsi->uplink_seid = uplink_seid;
9102 ret = i40e_add_vsi(vsi);
9106 switch (vsi->type) {
9107 /* setup the netdev if needed */
9109 case I40E_VSI_VMDQ2:
9111 ret = i40e_config_netdev(vsi);
9114 ret = register_netdev(vsi->netdev);
9117 vsi->netdev_registered = true;
9118 netif_carrier_off(vsi->netdev);
9119 #ifdef CONFIG_I40E_DCB
9120 /* Setup DCB netlink interface */
9121 i40e_dcbnl_setup(vsi);
9122 #endif /* CONFIG_I40E_DCB */
9126 /* set up vectors and rings if needed */
9127 ret = i40e_vsi_setup_vectors(vsi);
9131 ret = i40e_alloc_rings(vsi);
9135 /* map all of the rings to the q_vectors */
9136 i40e_vsi_map_rings_to_vectors(vsi);
9138 i40e_vsi_reset_stats(vsi);
9142 /* no netdev or rings for the other VSI types */
9146 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9147 (vsi->type == I40E_VSI_VMDQ2)) {
9148 ret = i40e_vsi_config_rss(vsi);
9153 i40e_vsi_free_q_vectors(vsi);
9155 if (vsi->netdev_registered) {
9156 vsi->netdev_registered = false;
9157 unregister_netdev(vsi->netdev);
9158 free_netdev(vsi->netdev);
9162 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9164 i40e_vsi_clear(vsi);
9170 * i40e_veb_get_bw_info - Query VEB BW information
9171 * @veb: the veb to query
9173 * Query the Tx scheduler BW configuration data for given VEB
9175 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9177 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9178 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9179 struct i40e_pf *pf = veb->pf;
9180 struct i40e_hw *hw = &pf->hw;
9185 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9188 dev_info(&pf->pdev->dev,
9189 "query veb bw config failed, err %s aq_err %s\n",
9190 i40e_stat_str(&pf->hw, ret),
9191 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9195 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9198 dev_info(&pf->pdev->dev,
9199 "query veb bw ets config failed, err %s aq_err %s\n",
9200 i40e_stat_str(&pf->hw, ret),
9201 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9205 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9206 veb->bw_max_quanta = ets_data.tc_bw_max;
9207 veb->is_abs_credits = bw_data.absolute_credits_enable;
9208 veb->enabled_tc = ets_data.tc_valid_bits;
9209 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9210 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9211 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9212 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9213 veb->bw_tc_limit_credits[i] =
9214 le16_to_cpu(bw_data.tc_bw_limits[i]);
9215 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9223 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9224 * @pf: board private structure
9226 * On error: returns error code (negative)
9227 * On success: returns vsi index in PF (positive)
9229 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9232 struct i40e_veb *veb;
9235 /* Need to protect the allocation of switch elements at the PF level */
9236 mutex_lock(&pf->switch_mutex);
9238 /* VEB list may be fragmented if VEB creation/destruction has
9239 * been happening. We can afford to do a quick scan to look
9240 * for any free slots in the list.
9242 * find next empty veb slot, looping back around if necessary
9245 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9247 if (i >= I40E_MAX_VEB) {
9249 goto err_alloc_veb; /* out of VEB slots! */
9252 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9259 veb->enabled_tc = 1;
9264 mutex_unlock(&pf->switch_mutex);
9269 * i40e_switch_branch_release - Delete a branch of the switch tree
9270 * @branch: where to start deleting
9272 * This uses recursion to find the tips of the branch to be
9273 * removed, deleting until we get back to and can delete this VEB.
9275 static void i40e_switch_branch_release(struct i40e_veb *branch)
9277 struct i40e_pf *pf = branch->pf;
9278 u16 branch_seid = branch->seid;
9279 u16 veb_idx = branch->idx;
9282 /* release any VEBs on this VEB - RECURSION */
9283 for (i = 0; i < I40E_MAX_VEB; i++) {
9286 if (pf->veb[i]->uplink_seid == branch->seid)
9287 i40e_switch_branch_release(pf->veb[i]);
9290 /* Release the VSIs on this VEB, but not the owner VSI.
9292 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9293 * the VEB itself, so don't use (*branch) after this loop.
9295 for (i = 0; i < pf->num_alloc_vsi; i++) {
9298 if (pf->vsi[i]->uplink_seid == branch_seid &&
9299 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9300 i40e_vsi_release(pf->vsi[i]);
9304 /* There's one corner case where the VEB might not have been
9305 * removed, so double check it here and remove it if needed.
9306 * This case happens if the veb was created from the debugfs
9307 * commands and no VSIs were added to it.
9309 if (pf->veb[veb_idx])
9310 i40e_veb_release(pf->veb[veb_idx]);
9314 * i40e_veb_clear - remove veb struct
9315 * @veb: the veb to remove
9317 static void i40e_veb_clear(struct i40e_veb *veb)
9323 struct i40e_pf *pf = veb->pf;
9325 mutex_lock(&pf->switch_mutex);
9326 if (pf->veb[veb->idx] == veb)
9327 pf->veb[veb->idx] = NULL;
9328 mutex_unlock(&pf->switch_mutex);
9335 * i40e_veb_release - Delete a VEB and free its resources
9336 * @veb: the VEB being removed
9338 void i40e_veb_release(struct i40e_veb *veb)
9340 struct i40e_vsi *vsi = NULL;
9346 /* find the remaining VSI and check for extras */
9347 for (i = 0; i < pf->num_alloc_vsi; i++) {
9348 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9354 dev_info(&pf->pdev->dev,
9355 "can't remove VEB %d with %d VSIs left\n",
9360 /* move the remaining VSI to uplink veb */
9361 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9362 if (veb->uplink_seid) {
9363 vsi->uplink_seid = veb->uplink_seid;
9364 if (veb->uplink_seid == pf->mac_seid)
9365 vsi->veb_idx = I40E_NO_VEB;
9367 vsi->veb_idx = veb->veb_idx;
9370 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9371 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9374 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9375 i40e_veb_clear(veb);
9379 * i40e_add_veb - create the VEB in the switch
9380 * @veb: the VEB to be instantiated
9381 * @vsi: the controlling VSI
9383 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9385 struct i40e_pf *pf = veb->pf;
9386 bool is_default = veb->pf->cur_promisc;
9387 bool is_cloud = false;
9390 /* get a VEB from the hardware */
9391 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9392 veb->enabled_tc, is_default,
9393 is_cloud, &veb->seid, NULL);
9395 dev_info(&pf->pdev->dev,
9396 "couldn't add VEB, err %s aq_err %s\n",
9397 i40e_stat_str(&pf->hw, ret),
9398 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9402 /* get statistics counter */
9403 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9404 &veb->stats_idx, NULL, NULL, NULL);
9406 dev_info(&pf->pdev->dev,
9407 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9408 i40e_stat_str(&pf->hw, ret),
9409 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9412 ret = i40e_veb_get_bw_info(veb);
9414 dev_info(&pf->pdev->dev,
9415 "couldn't get VEB bw info, err %s aq_err %s\n",
9416 i40e_stat_str(&pf->hw, ret),
9417 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9418 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9422 vsi->uplink_seid = veb->seid;
9423 vsi->veb_idx = veb->idx;
9424 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9430 * i40e_veb_setup - Set up a VEB
9431 * @pf: board private structure
9432 * @flags: VEB setup flags
9433 * @uplink_seid: the switch element to link to
9434 * @vsi_seid: the initial VSI seid
9435 * @enabled_tc: Enabled TC bit-map
9437 * This allocates the sw VEB structure and links it into the switch
9438 * It is possible and legal for this to be a duplicate of an already
9439 * existing VEB. It is also possible for both uplink and vsi seids
9440 * to be zero, in order to create a floating VEB.
9442 * Returns pointer to the successfully allocated VEB sw struct on
9443 * success, otherwise returns NULL on failure.
9445 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9446 u16 uplink_seid, u16 vsi_seid,
9449 struct i40e_veb *veb, *uplink_veb = NULL;
9450 int vsi_idx, veb_idx;
9453 /* if one seid is 0, the other must be 0 to create a floating relay */
9454 if ((uplink_seid == 0 || vsi_seid == 0) &&
9455 (uplink_seid + vsi_seid != 0)) {
9456 dev_info(&pf->pdev->dev,
9457 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9458 uplink_seid, vsi_seid);
9462 /* make sure there is such a vsi and uplink */
9463 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9464 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9466 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9467 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9472 if (uplink_seid && uplink_seid != pf->mac_seid) {
9473 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9474 if (pf->veb[veb_idx] &&
9475 pf->veb[veb_idx]->seid == uplink_seid) {
9476 uplink_veb = pf->veb[veb_idx];
9481 dev_info(&pf->pdev->dev,
9482 "uplink seid %d not found\n", uplink_seid);
9487 /* get veb sw struct */
9488 veb_idx = i40e_veb_mem_alloc(pf);
9491 veb = pf->veb[veb_idx];
9493 veb->uplink_seid = uplink_seid;
9494 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9495 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9497 /* create the VEB in the switch */
9498 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9501 if (vsi_idx == pf->lan_vsi)
9502 pf->lan_veb = veb->idx;
9507 i40e_veb_clear(veb);
9513 * i40e_setup_pf_switch_element - set PF vars based on switch type
9514 * @pf: board private structure
9515 * @ele: element we are building info from
9516 * @num_reported: total number of elements
9517 * @printconfig: should we print the contents
9519 * helper function to assist in extracting a few useful SEID values.
9521 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9522 struct i40e_aqc_switch_config_element_resp *ele,
9523 u16 num_reported, bool printconfig)
9525 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9526 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9527 u8 element_type = ele->element_type;
9528 u16 seid = le16_to_cpu(ele->seid);
9531 dev_info(&pf->pdev->dev,
9532 "type=%d seid=%d uplink=%d downlink=%d\n",
9533 element_type, seid, uplink_seid, downlink_seid);
9535 switch (element_type) {
9536 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9537 pf->mac_seid = seid;
9539 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9541 if (uplink_seid != pf->mac_seid)
9543 if (pf->lan_veb == I40E_NO_VEB) {
9546 /* find existing or else empty VEB */
9547 for (v = 0; v < I40E_MAX_VEB; v++) {
9548 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9553 if (pf->lan_veb == I40E_NO_VEB) {
9554 v = i40e_veb_mem_alloc(pf);
9561 pf->veb[pf->lan_veb]->seid = seid;
9562 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9563 pf->veb[pf->lan_veb]->pf = pf;
9564 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9566 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9567 if (num_reported != 1)
9569 /* This is immediately after a reset so we can assume this is
9572 pf->mac_seid = uplink_seid;
9573 pf->pf_seid = downlink_seid;
9574 pf->main_vsi_seid = seid;
9576 dev_info(&pf->pdev->dev,
9577 "pf_seid=%d main_vsi_seid=%d\n",
9578 pf->pf_seid, pf->main_vsi_seid);
9580 case I40E_SWITCH_ELEMENT_TYPE_PF:
9581 case I40E_SWITCH_ELEMENT_TYPE_VF:
9582 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9583 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9584 case I40E_SWITCH_ELEMENT_TYPE_PE:
9585 case I40E_SWITCH_ELEMENT_TYPE_PA:
9586 /* ignore these for now */
9589 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9590 element_type, seid);
9596 * i40e_fetch_switch_configuration - Get switch config from firmware
9597 * @pf: board private structure
9598 * @printconfig: should we print the contents
9600 * Get the current switch configuration from the device and
9601 * extract a few useful SEID values.
9603 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9605 struct i40e_aqc_get_switch_config_resp *sw_config;
9611 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9615 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9617 u16 num_reported, num_total;
9619 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9623 dev_info(&pf->pdev->dev,
9624 "get switch config failed err %s aq_err %s\n",
9625 i40e_stat_str(&pf->hw, ret),
9626 i40e_aq_str(&pf->hw,
9627 pf->hw.aq.asq_last_status));
9632 num_reported = le16_to_cpu(sw_config->header.num_reported);
9633 num_total = le16_to_cpu(sw_config->header.num_total);
9636 dev_info(&pf->pdev->dev,
9637 "header: %d reported %d total\n",
9638 num_reported, num_total);
9640 for (i = 0; i < num_reported; i++) {
9641 struct i40e_aqc_switch_config_element_resp *ele =
9642 &sw_config->element[i];
9644 i40e_setup_pf_switch_element(pf, ele, num_reported,
9647 } while (next_seid != 0);
9654 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9655 * @pf: board private structure
9656 * @reinit: if the Main VSI needs to re-initialized.
9658 * Returns 0 on success, negative value on failure
9660 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9664 /* find out what's out there already */
9665 ret = i40e_fetch_switch_configuration(pf, false);
9667 dev_info(&pf->pdev->dev,
9668 "couldn't fetch switch config, err %s aq_err %s\n",
9669 i40e_stat_str(&pf->hw, ret),
9670 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9673 i40e_pf_reset_stats(pf);
9675 /* first time setup */
9676 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9677 struct i40e_vsi *vsi = NULL;
9680 /* Set up the PF VSI associated with the PF's main VSI
9681 * that is already in the HW switch
9683 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9684 uplink_seid = pf->veb[pf->lan_veb]->seid;
9686 uplink_seid = pf->mac_seid;
9687 if (pf->lan_vsi == I40E_NO_VSI)
9688 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9690 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9692 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9693 i40e_fdir_teardown(pf);
9697 /* force a reset of TC and queue layout configurations */
9698 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9699 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9700 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9701 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9703 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9705 i40e_fdir_sb_setup(pf);
9707 /* Setup static PF queue filter control settings */
9708 ret = i40e_setup_pf_filter_control(pf);
9710 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9712 /* Failure here should not stop continuing other steps */
9715 /* enable RSS in the HW, even for only one queue, as the stack can use
9718 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9719 i40e_config_rss(pf);
9721 /* fill in link information and enable LSE reporting */
9722 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9723 i40e_link_event(pf);
9725 /* Initialize user-specific link properties */
9726 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9727 I40E_AQ_AN_COMPLETED) ? true : false);
9735 * i40e_determine_queue_usage - Work out queue distribution
9736 * @pf: board private structure
9738 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9742 pf->num_lan_qps = 0;
9744 pf->num_fcoe_qps = 0;
9747 /* Find the max queues to be put into basic use. We'll always be
9748 * using TC0, whether or not DCB is running, and TC0 will get the
9751 queues_left = pf->hw.func_caps.num_tx_qp;
9753 if ((queues_left == 1) ||
9754 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9755 /* one qp for PF, no queues for anything else */
9757 pf->rss_size = pf->num_lan_qps = 1;
9759 /* make sure all the fancies are disabled */
9760 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9762 I40E_FLAG_FCOE_ENABLED |
9764 I40E_FLAG_FD_SB_ENABLED |
9765 I40E_FLAG_FD_ATR_ENABLED |
9766 I40E_FLAG_DCB_CAPABLE |
9767 I40E_FLAG_SRIOV_ENABLED |
9768 I40E_FLAG_VMDQ_ENABLED);
9769 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9770 I40E_FLAG_FD_SB_ENABLED |
9771 I40E_FLAG_FD_ATR_ENABLED |
9772 I40E_FLAG_DCB_CAPABLE))) {
9774 pf->rss_size = pf->num_lan_qps = 1;
9775 queues_left -= pf->num_lan_qps;
9777 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9779 I40E_FLAG_FCOE_ENABLED |
9781 I40E_FLAG_FD_SB_ENABLED |
9782 I40E_FLAG_FD_ATR_ENABLED |
9783 I40E_FLAG_DCB_ENABLED |
9784 I40E_FLAG_VMDQ_ENABLED);
9786 /* Not enough queues for all TCs */
9787 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9788 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9789 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9790 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9792 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9794 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9795 pf->hw.func_caps.num_tx_qp);
9797 queues_left -= pf->num_lan_qps;
9801 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9802 if (I40E_DEFAULT_FCOE <= queues_left) {
9803 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9804 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9805 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9807 pf->num_fcoe_qps = 0;
9808 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9809 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9812 queues_left -= pf->num_fcoe_qps;
9816 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9817 if (queues_left > 1) {
9818 queues_left -= 1; /* save 1 queue for FD */
9820 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9821 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9825 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9826 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9827 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9828 (queues_left / pf->num_vf_qps));
9829 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9832 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9833 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9834 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9835 (queues_left / pf->num_vmdq_qps));
9836 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9839 pf->queues_left = queues_left;
9841 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9846 * i40e_setup_pf_filter_control - Setup PF static filter control
9847 * @pf: PF to be setup
9849 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9850 * settings. If PE/FCoE are enabled then it will also set the per PF
9851 * based filter sizes required for them. It also enables Flow director,
9852 * ethertype and macvlan type filter settings for the pf.
9854 * Returns 0 on success, negative on failure
9856 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9858 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9860 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9862 /* Flow Director is enabled */
9863 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9864 settings->enable_fdir = true;
9866 /* Ethtype and MACVLAN filters enabled for PF */
9867 settings->enable_ethtype = true;
9868 settings->enable_macvlan = true;
9870 if (i40e_set_filter_control(&pf->hw, settings))
9876 #define INFO_STRING_LEN 255
9877 static void i40e_print_features(struct i40e_pf *pf)
9879 struct i40e_hw *hw = &pf->hw;
9882 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9884 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9890 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9891 #ifdef CONFIG_PCI_IOV
9892 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9894 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9895 pf->hw.func_caps.num_vsis,
9896 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9897 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9899 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9900 buf += sprintf(buf, "RSS ");
9901 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9902 buf += sprintf(buf, "FD_ATR ");
9903 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9904 buf += sprintf(buf, "FD_SB ");
9905 buf += sprintf(buf, "NTUPLE ");
9907 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9908 buf += sprintf(buf, "DCB ");
9909 if (pf->flags & I40E_FLAG_PTP)
9910 buf += sprintf(buf, "PTP ");
9912 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9913 buf += sprintf(buf, "FCOE ");
9916 BUG_ON(buf > (string + INFO_STRING_LEN));
9917 dev_info(&pf->pdev->dev, "%s\n", string);
9922 * i40e_probe - Device initialization routine
9923 * @pdev: PCI device information struct
9924 * @ent: entry in i40e_pci_tbl
9926 * i40e_probe initializes a PF identified by a pci_dev structure.
9927 * The OS initialization, configuring of the PF private structure,
9928 * and a hardware reset occur.
9930 * Returns 0 on success, negative on failure
9932 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9934 struct i40e_aq_get_phy_abilities_resp abilities;
9937 static u16 pfs_found;
9944 err = pci_enable_device_mem(pdev);
9948 /* set up for high or low dma */
9949 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9951 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9954 "DMA configuration failed: 0x%x\n", err);
9959 /* set up pci connections */
9960 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9961 IORESOURCE_MEM), i40e_driver_name);
9963 dev_info(&pdev->dev,
9964 "pci_request_selected_regions failed %d\n", err);
9968 pci_enable_pcie_error_reporting(pdev);
9969 pci_set_master(pdev);
9971 /* Now that we have a PCI connection, we need to do the
9972 * low level device setup. This is primarily setting up
9973 * the Admin Queue structures and then querying for the
9974 * device's current profile information.
9976 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9983 set_bit(__I40E_DOWN, &pf->state);
9988 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9989 I40E_MAX_CSR_SPACE);
9991 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
9994 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9995 (unsigned int)pci_resource_start(pdev, 0),
9996 pf->ioremap_len, err);
9999 hw->vendor_id = pdev->vendor;
10000 hw->device_id = pdev->device;
10001 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10002 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10003 hw->subsystem_device_id = pdev->subsystem_device;
10004 hw->bus.device = PCI_SLOT(pdev->devfn);
10005 hw->bus.func = PCI_FUNC(pdev->devfn);
10006 pf->instance = pfs_found;
10009 pf->msg_enable = pf->hw.debug_mask;
10010 pf->msg_enable = debug;
10013 /* do a special CORER for clearing PXE mode once at init */
10014 if (hw->revision_id == 0 &&
10015 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10016 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10021 i40e_clear_pxe_mode(hw);
10024 /* Reset here to make sure all is clean and to define PF 'n' */
10026 err = i40e_pf_reset(hw);
10028 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10033 hw->aq.num_arq_entries = I40E_AQ_LEN;
10034 hw->aq.num_asq_entries = I40E_AQ_LEN;
10035 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10036 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10037 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10039 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10041 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10043 err = i40e_init_shared_code(hw);
10045 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10050 /* set up a default setting for link flow control */
10051 pf->hw.fc.requested_mode = I40E_FC_NONE;
10053 err = i40e_init_adminq(hw);
10054 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10056 dev_info(&pdev->dev,
10057 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10061 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10062 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10063 dev_info(&pdev->dev,
10064 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10065 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10066 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10067 dev_info(&pdev->dev,
10068 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10070 i40e_verify_eeprom(pf);
10072 /* Rev 0 hardware was never productized */
10073 if (hw->revision_id < 1)
10074 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10076 i40e_clear_pxe_mode(hw);
10077 err = i40e_get_capabilities(pf);
10079 goto err_adminq_setup;
10081 err = i40e_sw_init(pf);
10083 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10087 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10088 hw->func_caps.num_rx_qp,
10089 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10091 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10092 goto err_init_lan_hmc;
10095 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10097 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10099 goto err_configure_lan_hmc;
10102 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10103 * Ignore error return codes because if it was already disabled via
10104 * hardware settings this will fail
10106 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10107 (pf->hw.aq.fw_maj_ver < 4)) {
10108 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10109 i40e_aq_stop_lldp(hw, true, NULL);
10112 i40e_get_mac_addr(hw, hw->mac.addr);
10113 if (!is_valid_ether_addr(hw->mac.addr)) {
10114 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10118 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10119 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10120 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10121 if (is_valid_ether_addr(hw->mac.port_addr))
10122 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10124 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10126 dev_info(&pdev->dev,
10127 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10128 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10129 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10131 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10133 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10134 #endif /* I40E_FCOE */
10136 pci_set_drvdata(pdev, pf);
10137 pci_save_state(pdev);
10138 #ifdef CONFIG_I40E_DCB
10139 err = i40e_init_pf_dcb(pf);
10141 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10142 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10143 /* Continue without DCB enabled */
10145 #endif /* CONFIG_I40E_DCB */
10147 /* set up periodic task facility */
10148 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10149 pf->service_timer_period = HZ;
10151 INIT_WORK(&pf->service_task, i40e_service_task);
10152 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10153 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10155 /* NVM bit on means WoL disabled for the port */
10156 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10157 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10158 pf->wol_en = false;
10161 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10163 /* set up the main switch operations */
10164 i40e_determine_queue_usage(pf);
10165 err = i40e_init_interrupt_scheme(pf);
10167 goto err_switch_setup;
10169 /* The number of VSIs reported by the FW is the minimum guaranteed
10170 * to us; HW supports far more and we share the remaining pool with
10171 * the other PFs. We allocate space for more than the guarantee with
10172 * the understanding that we might not get them all later.
10174 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10175 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10177 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10179 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10180 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10181 pf->vsi = kzalloc(len, GFP_KERNEL);
10184 goto err_switch_setup;
10187 #ifdef CONFIG_PCI_IOV
10188 /* prep for VF support */
10189 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10190 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10191 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10192 if (pci_num_vf(pdev))
10193 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10196 err = i40e_setup_pf_switch(pf, false);
10198 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10201 /* if FDIR VSI was set up, start it now */
10202 for (i = 0; i < pf->num_alloc_vsi; i++) {
10203 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10204 i40e_vsi_open(pf->vsi[i]);
10209 /* driver is only interested in link up/down and module qualification
10210 * reports from firmware
10212 err = i40e_aq_set_phy_int_mask(&pf->hw,
10213 I40E_AQ_EVENT_LINK_UPDOWN |
10214 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10216 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10217 i40e_stat_str(&pf->hw, err),
10218 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10220 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10221 (pf->hw.aq.fw_maj_ver < 4)) {
10223 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10225 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10226 i40e_stat_str(&pf->hw, err),
10227 i40e_aq_str(&pf->hw,
10228 pf->hw.aq.asq_last_status));
10230 /* The main driver is (mostly) up and happy. We need to set this state
10231 * before setting up the misc vector or we get a race and the vector
10232 * ends up disabled forever.
10234 clear_bit(__I40E_DOWN, &pf->state);
10236 /* In case of MSIX we are going to setup the misc vector right here
10237 * to handle admin queue events etc. In case of legacy and MSI
10238 * the misc functionality and queue processing is combined in
10239 * the same vector and that gets setup at open.
10241 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10242 err = i40e_setup_misc_vector(pf);
10244 dev_info(&pdev->dev,
10245 "setup of misc vector failed: %d\n", err);
10250 #ifdef CONFIG_PCI_IOV
10251 /* prep for VF support */
10252 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10253 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10254 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10257 /* disable link interrupts for VFs */
10258 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10259 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10260 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10263 if (pci_num_vf(pdev)) {
10264 dev_info(&pdev->dev,
10265 "Active VFs found, allocating resources.\n");
10266 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10268 dev_info(&pdev->dev,
10269 "Error %d allocating resources for existing VFs\n",
10273 #endif /* CONFIG_PCI_IOV */
10277 i40e_dbg_pf_init(pf);
10279 /* tell the firmware that we're starting */
10280 i40e_send_version(pf);
10282 /* since everything's happy, start the service_task timer */
10283 mod_timer(&pf->service_timer,
10284 round_jiffies(jiffies + pf->service_timer_period));
10287 /* create FCoE interface */
10288 i40e_fcoe_vsi_setup(pf);
10291 /* Get the negotiated link width and speed from PCI config space */
10292 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10294 i40e_set_pci_config_data(hw, link_status);
10296 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10297 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10298 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10299 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10301 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10302 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10303 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10304 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10307 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10308 hw->bus.speed < i40e_bus_speed_8000) {
10309 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10310 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10313 /* get the requested speeds from the fw */
10314 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10316 dev_info(&pf->pdev->dev,
10317 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10318 i40e_stat_str(&pf->hw, err),
10319 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10320 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10322 /* print a string summarizing features */
10323 i40e_print_features(pf);
10327 /* Unwind what we've done if something failed in the setup */
10329 set_bit(__I40E_DOWN, &pf->state);
10330 i40e_clear_interrupt_scheme(pf);
10333 i40e_reset_interrupt_capability(pf);
10334 del_timer_sync(&pf->service_timer);
10336 err_configure_lan_hmc:
10337 (void)i40e_shutdown_lan_hmc(hw);
10339 kfree(pf->qp_pile);
10342 (void)i40e_shutdown_adminq(hw);
10344 iounmap(hw->hw_addr);
10348 pci_disable_pcie_error_reporting(pdev);
10349 pci_release_selected_regions(pdev,
10350 pci_select_bars(pdev, IORESOURCE_MEM));
10353 pci_disable_device(pdev);
10358 * i40e_remove - Device removal routine
10359 * @pdev: PCI device information struct
10361 * i40e_remove is called by the PCI subsystem to alert the driver
10362 * that is should release a PCI device. This could be caused by a
10363 * Hot-Plug event, or because the driver is going to be removed from
10366 static void i40e_remove(struct pci_dev *pdev)
10368 struct i40e_pf *pf = pci_get_drvdata(pdev);
10369 i40e_status ret_code;
10372 i40e_dbg_pf_exit(pf);
10376 /* no more scheduling of any task */
10377 set_bit(__I40E_DOWN, &pf->state);
10378 del_timer_sync(&pf->service_timer);
10379 cancel_work_sync(&pf->service_task);
10380 i40e_fdir_teardown(pf);
10382 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10384 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10387 i40e_fdir_teardown(pf);
10389 /* If there is a switch structure or any orphans, remove them.
10390 * This will leave only the PF's VSI remaining.
10392 for (i = 0; i < I40E_MAX_VEB; i++) {
10396 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10397 pf->veb[i]->uplink_seid == 0)
10398 i40e_switch_branch_release(pf->veb[i]);
10401 /* Now we can shutdown the PF's VSI, just before we kill
10404 if (pf->vsi[pf->lan_vsi])
10405 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10407 /* shutdown and destroy the HMC */
10408 if (pf->hw.hmc.hmc_obj) {
10409 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10411 dev_warn(&pdev->dev,
10412 "Failed to destroy the HMC resources: %d\n",
10416 /* shutdown the adminq */
10417 ret_code = i40e_shutdown_adminq(&pf->hw);
10419 dev_warn(&pdev->dev,
10420 "Failed to destroy the Admin Queue resources: %d\n",
10423 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10424 i40e_clear_interrupt_scheme(pf);
10425 for (i = 0; i < pf->num_alloc_vsi; i++) {
10427 i40e_vsi_clear_rings(pf->vsi[i]);
10428 i40e_vsi_clear(pf->vsi[i]);
10433 for (i = 0; i < I40E_MAX_VEB; i++) {
10438 kfree(pf->qp_pile);
10441 iounmap(pf->hw.hw_addr);
10443 pci_release_selected_regions(pdev,
10444 pci_select_bars(pdev, IORESOURCE_MEM));
10446 pci_disable_pcie_error_reporting(pdev);
10447 pci_disable_device(pdev);
10451 * i40e_pci_error_detected - warning that something funky happened in PCI land
10452 * @pdev: PCI device information struct
10454 * Called to warn that something happened and the error handling steps
10455 * are in progress. Allows the driver to quiesce things, be ready for
10458 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10459 enum pci_channel_state error)
10461 struct i40e_pf *pf = pci_get_drvdata(pdev);
10463 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10465 /* shutdown all operations */
10466 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10468 i40e_prep_for_reset(pf);
10472 /* Request a slot reset */
10473 return PCI_ERS_RESULT_NEED_RESET;
10477 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10478 * @pdev: PCI device information struct
10480 * Called to find if the driver can work with the device now that
10481 * the pci slot has been reset. If a basic connection seems good
10482 * (registers are readable and have sane content) then return a
10483 * happy little PCI_ERS_RESULT_xxx.
10485 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10487 struct i40e_pf *pf = pci_get_drvdata(pdev);
10488 pci_ers_result_t result;
10492 dev_dbg(&pdev->dev, "%s\n", __func__);
10493 if (pci_enable_device_mem(pdev)) {
10494 dev_info(&pdev->dev,
10495 "Cannot re-enable PCI device after reset.\n");
10496 result = PCI_ERS_RESULT_DISCONNECT;
10498 pci_set_master(pdev);
10499 pci_restore_state(pdev);
10500 pci_save_state(pdev);
10501 pci_wake_from_d3(pdev, false);
10503 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10505 result = PCI_ERS_RESULT_RECOVERED;
10507 result = PCI_ERS_RESULT_DISCONNECT;
10510 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10512 dev_info(&pdev->dev,
10513 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10515 /* non-fatal, continue */
10522 * i40e_pci_error_resume - restart operations after PCI error recovery
10523 * @pdev: PCI device information struct
10525 * Called to allow the driver to bring things back up after PCI error
10526 * and/or reset recovery has finished.
10528 static void i40e_pci_error_resume(struct pci_dev *pdev)
10530 struct i40e_pf *pf = pci_get_drvdata(pdev);
10532 dev_dbg(&pdev->dev, "%s\n", __func__);
10533 if (test_bit(__I40E_SUSPENDED, &pf->state))
10537 i40e_handle_reset_warning(pf);
10542 * i40e_shutdown - PCI callback for shutting down
10543 * @pdev: PCI device information struct
10545 static void i40e_shutdown(struct pci_dev *pdev)
10547 struct i40e_pf *pf = pci_get_drvdata(pdev);
10548 struct i40e_hw *hw = &pf->hw;
10550 set_bit(__I40E_SUSPENDED, &pf->state);
10551 set_bit(__I40E_DOWN, &pf->state);
10553 i40e_prep_for_reset(pf);
10556 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10557 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10559 del_timer_sync(&pf->service_timer);
10560 cancel_work_sync(&pf->service_task);
10561 i40e_fdir_teardown(pf);
10564 i40e_prep_for_reset(pf);
10567 wr32(hw, I40E_PFPM_APM,
10568 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10569 wr32(hw, I40E_PFPM_WUFC,
10570 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10572 i40e_clear_interrupt_scheme(pf);
10574 if (system_state == SYSTEM_POWER_OFF) {
10575 pci_wake_from_d3(pdev, pf->wol_en);
10576 pci_set_power_state(pdev, PCI_D3hot);
10582 * i40e_suspend - PCI callback for moving to D3
10583 * @pdev: PCI device information struct
10585 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10587 struct i40e_pf *pf = pci_get_drvdata(pdev);
10588 struct i40e_hw *hw = &pf->hw;
10590 set_bit(__I40E_SUSPENDED, &pf->state);
10591 set_bit(__I40E_DOWN, &pf->state);
10594 i40e_prep_for_reset(pf);
10597 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10598 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10600 pci_wake_from_d3(pdev, pf->wol_en);
10601 pci_set_power_state(pdev, PCI_D3hot);
10607 * i40e_resume - PCI callback for waking up from D3
10608 * @pdev: PCI device information struct
10610 static int i40e_resume(struct pci_dev *pdev)
10612 struct i40e_pf *pf = pci_get_drvdata(pdev);
10615 pci_set_power_state(pdev, PCI_D0);
10616 pci_restore_state(pdev);
10617 /* pci_restore_state() clears dev->state_saves, so
10618 * call pci_save_state() again to restore it.
10620 pci_save_state(pdev);
10622 err = pci_enable_device_mem(pdev);
10624 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10627 pci_set_master(pdev);
10629 /* no wakeup events while running */
10630 pci_wake_from_d3(pdev, false);
10632 /* handling the reset will rebuild the device state */
10633 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10634 clear_bit(__I40E_DOWN, &pf->state);
10636 i40e_reset_and_rebuild(pf, false);
10644 static const struct pci_error_handlers i40e_err_handler = {
10645 .error_detected = i40e_pci_error_detected,
10646 .slot_reset = i40e_pci_error_slot_reset,
10647 .resume = i40e_pci_error_resume,
10650 static struct pci_driver i40e_driver = {
10651 .name = i40e_driver_name,
10652 .id_table = i40e_pci_tbl,
10653 .probe = i40e_probe,
10654 .remove = i40e_remove,
10656 .suspend = i40e_suspend,
10657 .resume = i40e_resume,
10659 .shutdown = i40e_shutdown,
10660 .err_handler = &i40e_err_handler,
10661 .sriov_configure = i40e_pci_sriov_configure,
10665 * i40e_init_module - Driver registration routine
10667 * i40e_init_module is the first routine called when the driver is
10668 * loaded. All it does is register with the PCI subsystem.
10670 static int __init i40e_init_module(void)
10672 pr_info("%s: %s - version %s\n", i40e_driver_name,
10673 i40e_driver_string, i40e_driver_version_str);
10674 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10677 return pci_register_driver(&i40e_driver);
10679 module_init(i40e_init_module);
10682 * i40e_exit_module - Driver exit cleanup routine
10684 * i40e_exit_module is called just before the driver is removed
10687 static void __exit i40e_exit_module(void)
10689 pci_unregister_driver(&i40e_driver);
10692 module_exit(i40e_exit_module);