drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2014 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 /* ethtool support for ixgbe */
  30
  31 #include <linux/interrupt.h>
  32 #include <linux/types.h>
  33 #include <linux/module.h>
  34 #include <linux/slab.h>
  35 #include <linux/pci.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ethtool.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/highmem.h>
  40 #include <linux/uaccess.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_phy.h"
  44
  45
  46 #define IXGBE_ALL_RAR_ENTRIES 16
  47
  48 enum {NETDEV_STATS, IXGBE_STATS};
  49
  50 struct ixgbe_stats {
  51         char stat_string[ETH_GSTRING_LEN];
  52         int type;
  53         int sizeof_stat;
  54         int stat_offset;
  55 };
  56
  57 #define IXGBE_STAT(m)           IXGBE_STATS, \
  58                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  59                                 offsetof(struct ixgbe_adapter, m)
  60 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  61                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  62                                 offsetof(struct rtnl_link_stats64, m)
  63
  64 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
  65         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  66         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  67         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  68         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  69         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  70         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  71         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  72         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  73         {"lsc_int", IXGBE_STAT(lsc_int)},
  74         {"tx_busy", IXGBE_STAT(tx_busy)},
  75         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  76         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  77         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  78         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  79         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  80         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  81         {"broadcast", IXGBE_STAT(stats.bprc)},
  82         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  83         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  84         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  85         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  86         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  87         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  88         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  89         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  90         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  91         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  92         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  93         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  94         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  95         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  96         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  97         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  98         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  99         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
 100         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
 101         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
 102         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 103         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 104         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 105         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 106         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 107         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 108         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 109         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 110         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 111         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 112         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 113         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 114 #ifdef IXGBE_FCOE
 115         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 116         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 117         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 118         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 119         {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
 120         {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
 121         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 122         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 123 #endif /* IXGBE_FCOE */
 124 };
 125
 126 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
 127  * we set the num_rx_queues to evaluate to num_tx_queues. This is
 128  * used because we do not have a good way to get the max number of
 129  * rx queues with CONFIG_RPS disabled.
 130  */
 131 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
 132
 133 #define IXGBE_QUEUE_STATS_LEN ( \
 134         (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
 135         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 136 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 137 #define IXGBE_PB_STATS_LEN ( \
 138                         (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 139                          sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 140                          sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 141                          sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 142                         / sizeof(u64))
 143 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 144                          IXGBE_PB_STATS_LEN + \
 145                          IXGBE_QUEUE_STATS_LEN)
 146
 147 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 148         "Register test  (offline)", "Eeprom test    (offline)",
 149         "Interrupt test (offline)", "Loopback test  (offline)",
 150         "Link test   (on/offline)"
 151 };
 152 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 153
 154 static int ixgbe_get_settings(struct net_device *netdev,
 155                               struct ethtool_cmd *ecmd)
 156 {
 157         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 158         struct ixgbe_hw *hw = &adapter->hw;
 159         ixgbe_link_speed supported_link;
 160         u32 link_speed = 0;
 161         bool autoneg = false;
 162         bool link_up;
 163
 164         hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
 165
 166         /* set the supported link speeds */
 167         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 168                 ecmd->supported |= SUPPORTED_10000baseT_Full;
 169         if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL)
 170                 ecmd->supported |= SUPPORTED_2500baseX_Full;
 171         if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 172                 ecmd->supported |= SUPPORTED_1000baseT_Full;
 173         if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 174                 ecmd->supported |= SUPPORTED_100baseT_Full;
 175
 176         /* set the advertised speeds */
 177         if (hw->phy.autoneg_advertised) {
 178                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
 179                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 180                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 181                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 182                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL)
 183                         ecmd->advertising |= ADVERTISED_2500baseX_Full;
 184                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 185                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 186         } else {
 187                 /* default modes in case phy.autoneg_advertised isn't set */
 188                 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 189                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 190                 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 191                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 192                 if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 193                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 194
 195                 if (hw->phy.multispeed_fiber && !autoneg) {
 196                         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 197                                 ecmd->advertising = ADVERTISED_10000baseT_Full;
 198                 }
 199         }
 200
 201         if (autoneg) {
 202                 ecmd->supported |= SUPPORTED_Autoneg;
 203                 ecmd->advertising |= ADVERTISED_Autoneg;
 204                 ecmd->autoneg = AUTONEG_ENABLE;
 205         } else
 206                 ecmd->autoneg = AUTONEG_DISABLE;
 207
 208         ecmd->transceiver = XCVR_EXTERNAL;
 209
 210         /* Determine the remaining settings based on the PHY type. */
 211         switch (adapter->hw.phy.type) {
 212         case ixgbe_phy_tn:
 213         case ixgbe_phy_aq:
 214         case ixgbe_phy_x550em_ext_t:
 215         case ixgbe_phy_cu_unknown:
 216                 ecmd->supported |= SUPPORTED_TP;
 217                 ecmd->advertising |= ADVERTISED_TP;
 218                 ecmd->port = PORT_TP;
 219                 break;
 220         case ixgbe_phy_qt:
 221                 ecmd->supported |= SUPPORTED_FIBRE;
 222                 ecmd->advertising |= ADVERTISED_FIBRE;
 223                 ecmd->port = PORT_FIBRE;
 224                 break;
 225         case ixgbe_phy_nl:
 226         case ixgbe_phy_sfp_passive_tyco:
 227         case ixgbe_phy_sfp_passive_unknown:
 228         case ixgbe_phy_sfp_ftl:
 229         case ixgbe_phy_sfp_avago:
 230         case ixgbe_phy_sfp_intel:
 231         case ixgbe_phy_sfp_unknown:
 232                 /* SFP+ devices, further checking needed */
 233                 switch (adapter->hw.phy.sfp_type) {
 234                 case ixgbe_sfp_type_da_cu:
 235                 case ixgbe_sfp_type_da_cu_core0:
 236                 case ixgbe_sfp_type_da_cu_core1:
 237                         ecmd->supported |= SUPPORTED_FIBRE;
 238                         ecmd->advertising |= ADVERTISED_FIBRE;
 239                         ecmd->port = PORT_DA;
 240                         break;
 241                 case ixgbe_sfp_type_sr:
 242                 case ixgbe_sfp_type_lr:
 243                 case ixgbe_sfp_type_srlr_core0:
 244                 case ixgbe_sfp_type_srlr_core1:
 245                 case ixgbe_sfp_type_1g_sx_core0:
 246                 case ixgbe_sfp_type_1g_sx_core1:
 247                 case ixgbe_sfp_type_1g_lx_core0:
 248                 case ixgbe_sfp_type_1g_lx_core1:
 249                         ecmd->supported |= SUPPORTED_FIBRE;
 250                         ecmd->advertising |= ADVERTISED_FIBRE;
 251                         ecmd->port = PORT_FIBRE;
 252                         break;
 253                 case ixgbe_sfp_type_not_present:
 254                         ecmd->supported |= SUPPORTED_FIBRE;
 255                         ecmd->advertising |= ADVERTISED_FIBRE;
 256                         ecmd->port = PORT_NONE;
 257                         break;
 258                 case ixgbe_sfp_type_1g_cu_core0:
 259                 case ixgbe_sfp_type_1g_cu_core1:
 260                         ecmd->supported |= SUPPORTED_TP;
 261                         ecmd->advertising |= ADVERTISED_TP;
 262                         ecmd->port = PORT_TP;
 263                         break;
 264                 case ixgbe_sfp_type_unknown:
 265                 default:
 266                         ecmd->supported |= SUPPORTED_FIBRE;
 267                         ecmd->advertising |= ADVERTISED_FIBRE;
 268                         ecmd->port = PORT_OTHER;
 269                         break;
 270                 }
 271                 break;
 272         case ixgbe_phy_xaui:
 273                 ecmd->supported |= SUPPORTED_FIBRE;
 274                 ecmd->advertising |= ADVERTISED_FIBRE;
 275                 ecmd->port = PORT_NONE;
 276                 break;
 277         case ixgbe_phy_unknown:
 278         case ixgbe_phy_generic:
 279         case ixgbe_phy_sfp_unsupported:
 280         default:
 281                 ecmd->supported |= SUPPORTED_FIBRE;
 282                 ecmd->advertising |= ADVERTISED_FIBRE;
 283                 ecmd->port = PORT_OTHER;
 284                 break;
 285         }
 286
 287         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 288         if (link_up) {
 289                 switch (link_speed) {
 290                 case IXGBE_LINK_SPEED_10GB_FULL:
 291                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 292                         break;
 293                 case IXGBE_LINK_SPEED_2_5GB_FULL:
 294                         ethtool_cmd_speed_set(ecmd, SPEED_2500);
 295                         break;
 296                 case IXGBE_LINK_SPEED_1GB_FULL:
 297                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 298                         break;
 299                 case IXGBE_LINK_SPEED_100_FULL:
 300                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 301                         break;
 302                 default:
 303                         break;
 304                 }
 305                 ecmd->duplex = DUPLEX_FULL;
 306         } else {
 307                 ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
 308                 ecmd->duplex = DUPLEX_UNKNOWN;
 309         }
 310
 311         return 0;
 312 }
 313
 314 static int ixgbe_set_settings(struct net_device *netdev,
 315                               struct ethtool_cmd *ecmd)
 316 {
 317         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 318         struct ixgbe_hw *hw = &adapter->hw;
 319         u32 advertised, old;
 320         s32 err = 0;
 321
 322         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 323             (hw->phy.multispeed_fiber)) {
 324                 /*
 325                  * this function does not support duplex forcing, but can
 326                  * limit the advertising of the adapter to the specified speed
 327                  */
 328                 if (ecmd->advertising & ~ecmd->supported)
 329                         return -EINVAL;
 330
 331                 /* only allow one speed at a time if no autoneg */
 332                 if (!ecmd->autoneg && hw->phy.multispeed_fiber) {
 333                         if (ecmd->advertising ==
 334                             (ADVERTISED_10000baseT_Full |
 335                              ADVERTISED_1000baseT_Full))
 336                                 return -EINVAL;
 337                 }
 338
 339                 old = hw->phy.autoneg_advertised;
 340                 advertised = 0;
 341                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 342                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 343
 344                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 345                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 346
 347                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 348                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 349
 350                 if (old == advertised)
 351                         return err;
 352                 /* this sets the link speed and restarts auto-neg */
 353                 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
 354                         usleep_range(1000, 2000);
 355
 356                 hw->mac.autotry_restart = true;
 357                 err = hw->mac.ops.setup_link(hw, advertised, true);
 358                 if (err) {
 359                         e_info(probe, "setup link failed with code %d\n", err);
 360                         hw->mac.ops.setup_link(hw, old, true);
 361                 }
 362                 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
 363         } else {
 364                 /* in this case we currently only support 10Gb/FULL */
 365                 u32 speed = ethtool_cmd_speed(ecmd);
 366                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 367                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 368                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 369                         return -EINVAL;
 370         }
 371
 372         return err;
 373 }
 374
 375 static void ixgbe_get_pauseparam(struct net_device *netdev,
 376                                  struct ethtool_pauseparam *pause)
 377 {
 378         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 379         struct ixgbe_hw *hw = &adapter->hw;
 380
 381         if (ixgbe_device_supports_autoneg_fc(hw) &&
 382             !hw->fc.disable_fc_autoneg)
 383                 pause->autoneg = 1;
 384         else
 385                 pause->autoneg = 0;
 386
 387         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 388                 pause->rx_pause = 1;
 389         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 390                 pause->tx_pause = 1;
 391         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 392                 pause->rx_pause = 1;
 393                 pause->tx_pause = 1;
 394         }
 395 }
 396
 397 static int ixgbe_set_pauseparam(struct net_device *netdev,
 398                                 struct ethtool_pauseparam *pause)
 399 {
 400         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 401         struct ixgbe_hw *hw = &adapter->hw;
 402         struct ixgbe_fc_info fc = hw->fc;
 403
 404         /* 82598 does no support link flow control with DCB enabled */
 405         if ((hw->mac.type == ixgbe_mac_82598EB) &&
 406             (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
 407                 return -EINVAL;
 408
 409         /* some devices do not support autoneg of link flow control */
 410         if ((pause->autoneg == AUTONEG_ENABLE) &&
 411             !ixgbe_device_supports_autoneg_fc(hw))
 412                 return -EINVAL;
 413
 414         fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
 415
 416         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 417                 fc.requested_mode = ixgbe_fc_full;
 418         else if (pause->rx_pause && !pause->tx_pause)
 419                 fc.requested_mode = ixgbe_fc_rx_pause;
 420         else if (!pause->rx_pause && pause->tx_pause)
 421                 fc.requested_mode = ixgbe_fc_tx_pause;
 422         else
 423                 fc.requested_mode = ixgbe_fc_none;
 424
 425         /* if the thing changed then we'll update and use new autoneg */
 426         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 427                 hw->fc = fc;
 428                 if (netif_running(netdev))
 429                         ixgbe_reinit_locked(adapter);
 430                 else
 431                         ixgbe_reset(adapter);
 432         }
 433
 434         return 0;
 435 }
 436
 437 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 438 {
 439         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 440         return adapter->msg_enable;
 441 }
 442
 443 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 444 {
 445         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 446         adapter->msg_enable = data;
 447 }
 448
 449 static int ixgbe_get_regs_len(struct net_device *netdev)
 450 {
 451 #define IXGBE_REGS_LEN  1139
 452         return IXGBE_REGS_LEN * sizeof(u32);
 453 }
 454
 455 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 456
 457 static void ixgbe_get_regs(struct net_device *netdev,
 458                            struct ethtool_regs *regs, void *p)
 459 {
 460         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 461         struct ixgbe_hw *hw = &adapter->hw;
 462         u32 *regs_buff = p;
 463         u8 i;
 464
 465         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 466
 467         regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
 468                         hw->device_id;
 469
 470         /* General Registers */
 471         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 472         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 473         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 474         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 475         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 476         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 477         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 478         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 479
 480         /* NVM Register */
 481         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
 482         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 483         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw));
 484         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 485         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 486         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 487         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 488         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 489         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 490         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw));
 491
 492         /* Interrupt */
 493         /* don't read EICR because it can clear interrupt causes, instead
 494          * read EICS which is a shadow but doesn't clear EICR */
 495         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 496         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 497         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 498         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 499         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 500         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 501         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 502         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 503         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 504         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 505         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 506         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 507
 508         /* Flow Control */
 509         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 510         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 511         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 512         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 513         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 514         for (i = 0; i < 8; i++) {
 515                 switch (hw->mac.type) {
 516                 case ixgbe_mac_82598EB:
 517                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 518                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 519                         break;
 520                 case ixgbe_mac_82599EB:
 521                 case ixgbe_mac_X540:
 522                 case ixgbe_mac_X550:
 523                 case ixgbe_mac_X550EM_x:
 524                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 525                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 526                         break;
 527                 default:
 528                         break;
 529                 }
 530         }
 531         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 532         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 533
 534         /* Receive DMA */
 535         for (i = 0; i < 64; i++)
 536                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 537         for (i = 0; i < 64; i++)
 538                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 539         for (i = 0; i < 64; i++)
 540                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 541         for (i = 0; i < 64; i++)
 542                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 543         for (i = 0; i < 64; i++)
 544                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 545         for (i = 0; i < 64; i++)
 546                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 547         for (i = 0; i < 16; i++)
 548                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 549         for (i = 0; i < 16; i++)
 550                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 551         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 552         for (i = 0; i < 8; i++)
 553                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 554         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 555         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 556
 557         /* Receive */
 558         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 559         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 560         for (i = 0; i < 16; i++)
 561                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 562         for (i = 0; i < 16; i++)
 563                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 564         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 565         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 566         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 567         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 568         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 569         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 570         for (i = 0; i < 8; i++)
 571                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 572         for (i = 0; i < 8; i++)
 573                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 574         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 575
 576         /* Transmit */
 577         for (i = 0; i < 32; i++)
 578                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 579         for (i = 0; i < 32; i++)
 580                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 581         for (i = 0; i < 32; i++)
 582                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 583         for (i = 0; i < 32; i++)
 584                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 585         for (i = 0; i < 32; i++)
 586                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 587         for (i = 0; i < 32; i++)
 588                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 589         for (i = 0; i < 32; i++)
 590                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 591         for (i = 0; i < 32; i++)
 592                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 593         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 594         for (i = 0; i < 16; i++)
 595                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 596         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 597         for (i = 0; i < 8; i++)
 598                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 599         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 600
 601         /* Wake Up */
 602         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 603         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 604         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 605         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 606         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 607         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 608         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 609         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 610         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 611
 612         /* DCB */
 613         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);   /* same as FCCFG  */
 614         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
 615
 616         switch (hw->mac.type) {
 617         case ixgbe_mac_82598EB:
 618                 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 619                 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 620                 for (i = 0; i < 8; i++)
 621                         regs_buff[833 + i] =
 622                                 IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 623                 for (i = 0; i < 8; i++)
 624                         regs_buff[841 + i] =
 625                                 IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 626                 for (i = 0; i < 8; i++)
 627                         regs_buff[849 + i] =
 628                                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 629                 for (i = 0; i < 8; i++)
 630                         regs_buff[857 + i] =
 631                                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 632                 break;
 633         case ixgbe_mac_82599EB:
 634         case ixgbe_mac_X540:
 635         case ixgbe_mac_X550:
 636         case ixgbe_mac_X550EM_x:
 637                 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
 638                 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
 639                 for (i = 0; i < 8; i++)
 640                         regs_buff[833 + i] =
 641                                 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
 642                 for (i = 0; i < 8; i++)
 643                         regs_buff[841 + i] =
 644                                 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
 645                 for (i = 0; i < 8; i++)
 646                         regs_buff[849 + i] =
 647                                 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
 648                 for (i = 0; i < 8; i++)
 649                         regs_buff[857 + i] =
 650                                 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
 651                 break;
 652         default:
 653                 break;
 654         }
 655
 656         for (i = 0; i < 8; i++)
 657                 regs_buff[865 + i] =
 658                 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
 659         for (i = 0; i < 8; i++)
 660                 regs_buff[873 + i] =
 661                 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
 662
 663         /* Statistics */
 664         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 665         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 666         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 667         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 668         for (i = 0; i < 8; i++)
 669                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 670         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 671         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 672         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 673         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 674         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 675         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 676         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 677         for (i = 0; i < 8; i++)
 678                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 679         for (i = 0; i < 8; i++)
 680                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 681         for (i = 0; i < 8; i++)
 682                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 683         for (i = 0; i < 8; i++)
 684                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 685         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 686         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 687         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 688         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 689         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 690         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 691         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 692         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 693         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 694         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 695         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 696         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 697         for (i = 0; i < 8; i++)
 698                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 699         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 700         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 701         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 702         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 703         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 704         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 705         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 706         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 707         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 708         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 709         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 710         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 711         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 712         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 713         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 714         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 715         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 716         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 717         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 718         for (i = 0; i < 16; i++)
 719                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 720         for (i = 0; i < 16; i++)
 721                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 722         for (i = 0; i < 16; i++)
 723                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 724         for (i = 0; i < 16; i++)
 725                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 726
 727         /* MAC */
 728         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 729         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 730         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 731         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 732         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 733         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 734         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 735         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 736         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 737         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 738         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 739         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 740         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 741         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 742         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 743         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 744         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 745         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 746         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 747         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 748         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 749         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 750         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 751         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 752         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 753         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 754         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 755         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 756         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 757         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 758         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 759         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 760         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 761
 762         /* Diagnostic */
 763         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 764         for (i = 0; i < 8; i++)
 765                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 766         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 767         for (i = 0; i < 4; i++)
 768                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 769         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 770         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 771         for (i = 0; i < 8; i++)
 772                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 773         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 774         for (i = 0; i < 4; i++)
 775                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 776         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 777         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 778         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 779         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 780         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 781         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 782         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 783         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 784         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 785         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 786         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 787         for (i = 0; i < 8; i++)
 788                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 789         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 790         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 791         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 792         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 793         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 794         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 795         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 796         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 797         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 798
 799         /* 82599 X540 specific registers  */
 800         regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
 801
 802         /* 82599 X540 specific DCB registers  */
 803         regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
 804         regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
 805         for (i = 0; i < 4; i++)
 806                 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
 807         regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
 808                                         /* same as RTTQCNRM */
 809         regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
 810                                         /* same as RTTQCNRR */
 811
 812         /* X540 specific DCB registers  */
 813         regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
 814         regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
 815 }
 816
 817 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 818 {
 819         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 820         return adapter->hw.eeprom.word_size * 2;
 821 }
 822
 823 static int ixgbe_get_eeprom(struct net_device *netdev,
 824                             struct ethtool_eeprom *eeprom, u8 *bytes)
 825 {
 826         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 827         struct ixgbe_hw *hw = &adapter->hw;
 828         u16 *eeprom_buff;
 829         int first_word, last_word, eeprom_len;
 830         int ret_val = 0;
 831         u16 i;
 832
 833         if (eeprom->len == 0)
 834                 return -EINVAL;
 835
 836         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 837
 838         first_word = eeprom->offset >> 1;
 839         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 840         eeprom_len = last_word - first_word + 1;
 841
 842         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 843         if (!eeprom_buff)
 844                 return -ENOMEM;
 845
 846         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 847                                              eeprom_buff);
 848
 849         /* Device's eeprom is always little-endian, word addressable */
 850         for (i = 0; i < eeprom_len; i++)
 851                 le16_to_cpus(&eeprom_buff[i]);
 852
 853         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 854         kfree(eeprom_buff);
 855
 856         return ret_val;
 857 }
 858
 859 static int ixgbe_set_eeprom(struct net_device *netdev,
 860                             struct ethtool_eeprom *eeprom, u8 *bytes)
 861 {
 862         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 863         struct ixgbe_hw *hw = &adapter->hw;
 864         u16 *eeprom_buff;
 865         void *ptr;
 866         int max_len, first_word, last_word, ret_val = 0;
 867         u16 i;
 868
 869         if (eeprom->len == 0)
 870                 return -EINVAL;
 871
 872         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 873                 return -EINVAL;
 874
 875         max_len = hw->eeprom.word_size * 2;
 876
 877         first_word = eeprom->offset >> 1;
 878         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 879         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 880         if (!eeprom_buff)
 881                 return -ENOMEM;
 882
 883         ptr = eeprom_buff;
 884
 885         if (eeprom->offset & 1) {
 886                 /*
 887                  * need read/modify/write of first changed EEPROM word
 888                  * only the second byte of the word is being modified
 889                  */
 890                 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
 891                 if (ret_val)
 892                         goto err;
 893
 894                 ptr++;
 895         }
 896         if ((eeprom->offset + eeprom->len) & 1) {
 897                 /*
 898                  * need read/modify/write of last changed EEPROM word
 899                  * only the first byte of the word is being modified
 900                  */
 901                 ret_val = hw->eeprom.ops.read(hw, last_word,
 902                                           &eeprom_buff[last_word - first_word]);
 903                 if (ret_val)
 904                         goto err;
 905         }
 906
 907         /* Device's eeprom is always little-endian, word addressable */
 908         for (i = 0; i < last_word - first_word + 1; i++)
 909                 le16_to_cpus(&eeprom_buff[i]);
 910
 911         memcpy(ptr, bytes, eeprom->len);
 912
 913         for (i = 0; i < last_word - first_word + 1; i++)
 914                 cpu_to_le16s(&eeprom_buff[i]);
 915
 916         ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
 917                                               last_word - first_word + 1,
 918                                               eeprom_buff);
 919
 920         /* Update the checksum */
 921         if (ret_val == 0)
 922                 hw->eeprom.ops.update_checksum(hw);
 923
 924 err:
 925         kfree(eeprom_buff);
 926         return ret_val;
 927 }
 928
 929 static void ixgbe_get_drvinfo(struct net_device *netdev,
 930                               struct ethtool_drvinfo *drvinfo)
 931 {
 932         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 933         u32 nvm_track_id;
 934
 935         strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 936         strlcpy(drvinfo->version, ixgbe_driver_version,
 937                 sizeof(drvinfo->version));
 938
 939         nvm_track_id = (adapter->eeprom_verh << 16) |
 940                         adapter->eeprom_verl;
 941         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "0x%08x",
 942                  nvm_track_id);
 943
 944         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 945                 sizeof(drvinfo->bus_info));
 946 }
 947
 948 static void ixgbe_get_ringparam(struct net_device *netdev,
 949                                 struct ethtool_ringparam *ring)
 950 {
 951         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 952         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 953         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 954
 955         ring->rx_max_pending = IXGBE_MAX_RXD;
 956         ring->tx_max_pending = IXGBE_MAX_TXD;
 957         ring->rx_pending = rx_ring->count;
 958         ring->tx_pending = tx_ring->count;
 959 }
 960
 961 static int ixgbe_set_ringparam(struct net_device *netdev,
 962                                struct ethtool_ringparam *ring)
 963 {
 964         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 965         struct ixgbe_ring *temp_ring;
 966         int i, err = 0;
 967         u32 new_rx_count, new_tx_count;
 968
 969         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 970                 return -EINVAL;
 971
 972         new_tx_count = clamp_t(u32, ring->tx_pending,
 973                                IXGBE_MIN_TXD, IXGBE_MAX_TXD);
 974         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 975
 976         new_rx_count = clamp_t(u32, ring->rx_pending,
 977                                IXGBE_MIN_RXD, IXGBE_MAX_RXD);
 978         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 979
 980         if ((new_tx_count == adapter->tx_ring_count) &&
 981             (new_rx_count == adapter->rx_ring_count)) {
 982                 /* nothing to do */
 983                 return 0;
 984         }
 985
 986         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 987                 usleep_range(1000, 2000);
 988
 989         if (!netif_running(adapter->netdev)) {
 990                 for (i = 0; i < adapter->num_tx_queues; i++)
 991                         adapter->tx_ring[i]->count = new_tx_count;
 992                 for (i = 0; i < adapter->num_rx_queues; i++)
 993                         adapter->rx_ring[i]->count = new_rx_count;
 994                 adapter->tx_ring_count = new_tx_count;
 995                 adapter->rx_ring_count = new_rx_count;
 996                 goto clear_reset;
 997         }
 998
 999         /* allocate temporary buffer to store rings in */
1000         i = max_t(int, adapter->num_tx_queues, adapter->num_rx_queues);
1001         temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));
1002
1003         if (!temp_ring) {
1004                 err = -ENOMEM;
1005                 goto clear_reset;
1006         }
1007
1008         ixgbe_down(adapter);
1009
1010         /*
1011          * Setup new Tx resources and free the old Tx resources in that order.
1012          * We can then assign the new resources to the rings via a memcpy.
1013          * The advantage to this approach is that we are guaranteed to still
1014          * have resources even in the case of an allocation failure.
1015          */
1016         if (new_tx_count != adapter->tx_ring_count) {
1017                 for (i = 0; i < adapter->num_tx_queues; i++) {
1018                         memcpy(&temp_ring[i], adapter->tx_ring[i],
1019                                sizeof(struct ixgbe_ring));
1020
1021                         temp_ring[i].count = new_tx_count;
1022                         err = ixgbe_setup_tx_resources(&temp_ring[i]);
1023                         if (err) {
1024                                 while (i) {
1025                                         i--;
1026                                         ixgbe_free_tx_resources(&temp_ring[i]);
1027                                 }
1028                                 goto err_setup;
1029                         }
1030                 }
1031
1032                 for (i = 0; i < adapter->num_tx_queues; i++) {
1033                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
1034
1035                         memcpy(adapter->tx_ring[i], &temp_ring[i],
1036                                sizeof(struct ixgbe_ring));
1037                 }
1038
1039                 adapter->tx_ring_count = new_tx_count;
1040         }
1041
1042         /* Repeat the process for the Rx rings if needed */
1043         if (new_rx_count != adapter->rx_ring_count) {
1044                 for (i = 0; i < adapter->num_rx_queues; i++) {
1045                         memcpy(&temp_ring[i], adapter->rx_ring[i],
1046                                sizeof(struct ixgbe_ring));
1047
1048                         temp_ring[i].count = new_rx_count;
1049                         err = ixgbe_setup_rx_resources(&temp_ring[i]);
1050                         if (err) {
1051                                 while (i) {
1052                                         i--;
1053                                         ixgbe_free_rx_resources(&temp_ring[i]);
1054                                 }
1055                                 goto err_setup;
1056                         }
1057
1058                 }
1059
1060                 for (i = 0; i < adapter->num_rx_queues; i++) {
1061                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
1062
1063                         memcpy(adapter->rx_ring[i], &temp_ring[i],
1064                                sizeof(struct ixgbe_ring));
1065                 }
1066
1067                 adapter->rx_ring_count = new_rx_count;
1068         }
1069
1070 err_setup:
1071         ixgbe_up(adapter);
1072         vfree(temp_ring);
1073 clear_reset:
1074         clear_bit(__IXGBE_RESETTING, &adapter->state);
1075         return err;
1076 }
1077
1078 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1079 {
1080         switch (sset) {
1081         case ETH_SS_TEST:
1082                 return IXGBE_TEST_LEN;
1083         case ETH_SS_STATS:
1084                 return IXGBE_STATS_LEN;
1085         default:
1086                 return -EOPNOTSUPP;
1087         }
1088 }
1089
1090 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1091                                     struct ethtool_stats *stats, u64 *data)
1092 {
1093         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1094         struct rtnl_link_stats64 temp;
1095         const struct rtnl_link_stats64 *net_stats;
1096         unsigned int start;
1097         struct ixgbe_ring *ring;
1098         int i, j;
1099         char *p = NULL;
1100
1101         ixgbe_update_stats(adapter);
1102         net_stats = dev_get_stats(netdev, &temp);
1103         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1104                 switch (ixgbe_gstrings_stats[i].type) {
1105                 case NETDEV_STATS:
1106                         p = (char *) net_stats +
1107                                         ixgbe_gstrings_stats[i].stat_offset;
1108                         break;
1109                 case IXGBE_STATS:
1110                         p = (char *) adapter +
1111                                         ixgbe_gstrings_stats[i].stat_offset;
1112                         break;
1113                 default:
1114                         data[i] = 0;
1115                         continue;
1116                 }
1117
1118                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1119                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1120         }
1121         for (j = 0; j < netdev->num_tx_queues; j++) {
1122                 ring = adapter->tx_ring[j];
1123                 if (!ring) {
1124                         data[i] = 0;
1125                         data[i+1] = 0;
1126                         i += 2;
1127 #ifdef BP_EXTENDED_STATS
1128                         data[i] = 0;
1129                         data[i+1] = 0;
1130                         data[i+2] = 0;
1131                         i += 3;
1132 #endif
1133                         continue;
1134                 }
1135
1136                 do {
1137                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1138                         data[i]   = ring->stats.packets;
1139                         data[i+1] = ring->stats.bytes;
1140                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1141                 i += 2;
1142 #ifdef BP_EXTENDED_STATS
1143                 data[i] = ring->stats.yields;
1144                 data[i+1] = ring->stats.misses;
1145                 data[i+2] = ring->stats.cleaned;
1146                 i += 3;
1147 #endif
1148         }
1149         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1150                 ring = adapter->rx_ring[j];
1151                 if (!ring) {
1152                         data[i] = 0;
1153                         data[i+1] = 0;
1154                         i += 2;
1155 #ifdef BP_EXTENDED_STATS
1156                         data[i] = 0;
1157                         data[i+1] = 0;
1158                         data[i+2] = 0;
1159                         i += 3;
1160 #endif
1161                         continue;
1162                 }
1163
1164                 do {
1165                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1166                         data[i]   = ring->stats.packets;
1167                         data[i+1] = ring->stats.bytes;
1168                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1169                 i += 2;
1170 #ifdef BP_EXTENDED_STATS
1171                 data[i] = ring->stats.yields;
1172                 data[i+1] = ring->stats.misses;
1173                 data[i+2] = ring->stats.cleaned;
1174                 i += 3;
1175 #endif
1176         }
1177
1178         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1179                 data[i++] = adapter->stats.pxontxc[j];
1180                 data[i++] = adapter->stats.pxofftxc[j];
1181         }
1182         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1183                 data[i++] = adapter->stats.pxonrxc[j];
1184                 data[i++] = adapter->stats.pxoffrxc[j];
1185         }
1186 }
1187
1188 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1189                               u8 *data)
1190 {
1191         char *p = (char *)data;
1192         int i;
1193
1194         switch (stringset) {
1195         case ETH_SS_TEST:
1196                 for (i = 0; i < IXGBE_TEST_LEN; i++) {
1197                         memcpy(data, ixgbe_gstrings_test[i], ETH_GSTRING_LEN);
1198                         data += ETH_GSTRING_LEN;
1199                 }
1200                 break;
1201         case ETH_SS_STATS:
1202                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1203                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1204                                ETH_GSTRING_LEN);
1205                         p += ETH_GSTRING_LEN;
1206                 }
1207                 for (i = 0; i < netdev->num_tx_queues; i++) {
1208                         sprintf(p, "tx_queue_%u_packets", i);
1209                         p += ETH_GSTRING_LEN;
1210                         sprintf(p, "tx_queue_%u_bytes", i);
1211                         p += ETH_GSTRING_LEN;
1212 #ifdef BP_EXTENDED_STATS
1213                         sprintf(p, "tx_queue_%u_bp_napi_yield", i);
1214                         p += ETH_GSTRING_LEN;
1215                         sprintf(p, "tx_queue_%u_bp_misses", i);
1216                         p += ETH_GSTRING_LEN;
1217                         sprintf(p, "tx_queue_%u_bp_cleaned", i);
1218                         p += ETH_GSTRING_LEN;
1219 #endif /* BP_EXTENDED_STATS */
1220                 }
1221                 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1222                         sprintf(p, "rx_queue_%u_packets", i);
1223                         p += ETH_GSTRING_LEN;
1224                         sprintf(p, "rx_queue_%u_bytes", i);
1225                         p += ETH_GSTRING_LEN;
1226 #ifdef BP_EXTENDED_STATS
1227                         sprintf(p, "rx_queue_%u_bp_poll_yield", i);
1228                         p += ETH_GSTRING_LEN;
1229                         sprintf(p, "rx_queue_%u_bp_misses", i);
1230                         p += ETH_GSTRING_LEN;
1231                         sprintf(p, "rx_queue_%u_bp_cleaned", i);
1232                         p += ETH_GSTRING_LEN;
1233 #endif /* BP_EXTENDED_STATS */
1234                 }
1235                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1236                         sprintf(p, "tx_pb_%u_pxon", i);
1237                         p += ETH_GSTRING_LEN;
1238                         sprintf(p, "tx_pb_%u_pxoff", i);
1239                         p += ETH_GSTRING_LEN;
1240                 }
1241                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1242                         sprintf(p, "rx_pb_%u_pxon", i);
1243                         p += ETH_GSTRING_LEN;
1244                         sprintf(p, "rx_pb_%u_pxoff", i);
1245                         p += ETH_GSTRING_LEN;
1246                 }
1247                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1248                 break;
1249         }
1250 }
1251
1252 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1253 {
1254         struct ixgbe_hw *hw = &adapter->hw;
1255         bool link_up;
1256         u32 link_speed = 0;
1257
1258         if (ixgbe_removed(hw->hw_addr)) {
1259                 *data = 1;
1260                 return 1;
1261         }
1262         *data = 0;
1263
1264         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1265         if (link_up)
1266                 return *data;
1267         else
1268                 *data = 1;
1269         return *data;
1270 }
1271
1272 /* ethtool register test data */
1273 struct ixgbe_reg_test {
1274         u16 reg;
1275         u8  array_len;
1276         u8  test_type;
1277         u32 mask;
1278         u32 write;
1279 };
1280
1281 /* In the hardware, registers are laid out either singly, in arrays
1282  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1283  * most tests take place on arrays or single registers (handled
1284  * as a single-element array) and special-case the tables.
1285  * Table tests are always pattern tests.
1286  *
1287  * We also make provision for some required setup steps by specifying
1288  * registers to be written without any read-back testing.
1289  */
1290
1291 #define PATTERN_TEST    1
1292 #define SET_READ_TEST   2
1293 #define WRITE_NO_TEST   3
1294 #define TABLE32_TEST    4
1295 #define TABLE64_TEST_LO 5
1296 #define TABLE64_TEST_HI 6
1297
1298 /* default 82599 register test */
1299 static const struct ixgbe_reg_test reg_test_82599[] = {
1300         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1301         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1302         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1303         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1304         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1305         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1306         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1307         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1308         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1309         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1310         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1311         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1312         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1313         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1314         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1315         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1316         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1317         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1318         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1319         { .reg = 0 }
1320 };
1321
1322 /* default 82598 register test */
1323 static const struct ixgbe_reg_test reg_test_82598[] = {
1324         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1325         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1326         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1327         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1328         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1329         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1330         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1331         /* Enable all four RX queues before testing. */
1332         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1333         /* RDH is read-only for 82598, only test RDT. */
1334         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1335         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1336         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1337         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1338         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1339         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1340         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1341         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1342         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1343         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1344         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1345         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1346         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1347         { .reg = 0 }
1348 };
1349
1350 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1351                              u32 mask, u32 write)
1352 {
1353         u32 pat, val, before;
1354         static const u32 test_pattern[] = {
1355                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1356
1357         if (ixgbe_removed(adapter->hw.hw_addr)) {
1358                 *data = 1;
1359                 return true;
1360         }
1361         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1362                 before = ixgbe_read_reg(&adapter->hw, reg);
1363                 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1364                 val = ixgbe_read_reg(&adapter->hw, reg);
1365                 if (val != (test_pattern[pat] & write & mask)) {
1366                         e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1367                               reg, val, (test_pattern[pat] & write & mask));
1368                         *data = reg;
1369                         ixgbe_write_reg(&adapter->hw, reg, before);
1370                         return true;
1371                 }
1372                 ixgbe_write_reg(&adapter->hw, reg, before);
1373         }
1374         return false;
1375 }
1376
1377 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1378                               u32 mask, u32 write)
1379 {
1380         u32 val, before;
1381
1382         if (ixgbe_removed(adapter->hw.hw_addr)) {
1383                 *data = 1;
1384                 return true;
1385         }
1386         before = ixgbe_read_reg(&adapter->hw, reg);
1387         ixgbe_write_reg(&adapter->hw, reg, write & mask);
1388         val = ixgbe_read_reg(&adapter->hw, reg);
1389         if ((write & mask) != (val & mask)) {
1390                 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1391                       reg, (val & mask), (write & mask));
1392                 *data = reg;
1393                 ixgbe_write_reg(&adapter->hw, reg, before);
1394                 return true;
1395         }
1396         ixgbe_write_reg(&adapter->hw, reg, before);
1397         return false;
1398 }
1399
1400 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1401 {
1402         const struct ixgbe_reg_test *test;
1403         u32 value, before, after;
1404         u32 i, toggle;
1405
1406         if (ixgbe_removed(adapter->hw.hw_addr)) {
1407                 e_err(drv, "Adapter removed - register test blocked\n");
1408                 *data = 1;
1409                 return 1;
1410         }
1411         switch (adapter->hw.mac.type) {
1412         case ixgbe_mac_82598EB:
1413                 toggle = 0x7FFFF3FF;
1414                 test = reg_test_82598;
1415                 break;
1416         case ixgbe_mac_82599EB:
1417         case ixgbe_mac_X540:
1418         case ixgbe_mac_X550:
1419         case ixgbe_mac_X550EM_x:
1420                 toggle = 0x7FFFF30F;
1421                 test = reg_test_82599;
1422                 break;
1423         default:
1424                 *data = 1;
1425                 return 1;
1426         }
1427
1428         /*
1429          * Because the status register is such a special case,
1430          * we handle it separately from the rest of the register
1431          * tests.  Some bits are read-only, some toggle, and some
1432          * are writeable on newer MACs.
1433          */
1434         before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1435         value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1436         ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1437         after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1438         if (value != after) {
1439                 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1440                       after, value);
1441                 *data = 1;
1442                 return 1;
1443         }
1444         /* restore previous status */
1445         ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1446
1447         /*
1448          * Perform the remainder of the register test, looping through
1449          * the test table until we either fail or reach the null entry.
1450          */
1451         while (test->reg) {
1452                 for (i = 0; i < test->array_len; i++) {
1453                         bool b = false;
1454
1455                         switch (test->test_type) {
1456                         case PATTERN_TEST:
1457                                 b = reg_pattern_test(adapter, data,
1458                                                      test->reg + (i * 0x40),
1459                                                      test->mask,
1460                                                      test->write);
1461                                 break;
1462                         case SET_READ_TEST:
1463                                 b = reg_set_and_check(adapter, data,
1464                                                       test->reg + (i * 0x40),
1465                                                       test->mask,
1466                                                       test->write);
1467                                 break;
1468                         case WRITE_NO_TEST:
1469                                 ixgbe_write_reg(&adapter->hw,
1470                                                 test->reg + (i * 0x40),
1471                                                 test->write);
1472                                 break;
1473                         case TABLE32_TEST:
1474                                 b = reg_pattern_test(adapter, data,
1475                                                      test->reg + (i * 4),
1476                                                      test->mask,
1477                                                      test->write);
1478                                 break;
1479                         case TABLE64_TEST_LO:
1480                                 b = reg_pattern_test(adapter, data,
1481                                                      test->reg + (i * 8),
1482                                                      test->mask,
1483                                                      test->write);
1484                                 break;
1485                         case TABLE64_TEST_HI:
1486                                 b = reg_pattern_test(adapter, data,
1487                                                      (test->reg + 4) + (i * 8),
1488                                                      test->mask,
1489                                                      test->write);
1490                                 break;
1491                         }
1492                         if (b)
1493                                 return 1;
1494                 }
1495                 test++;
1496         }
1497
1498         *data = 0;
1499         return 0;
1500 }
1501
1502 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1503 {
1504         struct ixgbe_hw *hw = &adapter->hw;
1505         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1506                 *data = 1;
1507         else
1508                 *data = 0;
1509         return *data;
1510 }
1511
1512 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1513 {
1514         struct net_device *netdev = (struct net_device *) data;
1515         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1516
1517         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1518
1519         return IRQ_HANDLED;
1520 }
1521
1522 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1523 {
1524         struct net_device *netdev = adapter->netdev;
1525         u32 mask, i = 0, shared_int = true;
1526         u32 irq = adapter->pdev->irq;
1527
1528         *data = 0;
1529
1530         /* Hook up test interrupt handler just for this test */
1531         if (adapter->msix_entries) {
1532                 /* NOTE: we don't test MSI-X interrupts here, yet */
1533                 return 0;
1534         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1535                 shared_int = false;
1536                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1537                                 netdev)) {
1538                         *data = 1;
1539                         return -1;
1540                 }
1541         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1542                                 netdev->name, netdev)) {
1543                 shared_int = false;
1544         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1545                                netdev->name, netdev)) {
1546                 *data = 1;
1547                 return -1;
1548         }
1549         e_info(hw, "testing %s interrupt\n", shared_int ?
1550                "shared" : "unshared");
1551
1552         /* Disable all the interrupts */
1553         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1554         IXGBE_WRITE_FLUSH(&adapter->hw);
1555         usleep_range(10000, 20000);
1556
1557         /* Test each interrupt */
1558         for (; i < 10; i++) {
1559                 /* Interrupt to test */
1560                 mask = 1 << i;
1561
1562                 if (!shared_int) {
1563                         /*
1564                          * Disable the interrupts to be reported in
1565                          * the cause register and then force the same
1566                          * interrupt and see if one gets posted.  If
1567                          * an interrupt was posted to the bus, the
1568                          * test failed.
1569                          */
1570                         adapter->test_icr = 0;
1571                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1572                                         ~mask & 0x00007FFF);
1573                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1574                                         ~mask & 0x00007FFF);
1575                         IXGBE_WRITE_FLUSH(&adapter->hw);
1576                         usleep_range(10000, 20000);
1577
1578                         if (adapter->test_icr & mask) {
1579                                 *data = 3;
1580                                 break;
1581                         }
1582                 }
1583
1584                 /*
1585                  * Enable the interrupt to be reported in the cause
1586                  * register and then force the same interrupt and see
1587                  * if one gets posted.  If an interrupt was not posted
1588                  * to the bus, the test failed.
1589                  */
1590                 adapter->test_icr = 0;
1591                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1592                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1593                 IXGBE_WRITE_FLUSH(&adapter->hw);
1594                 usleep_range(10000, 20000);
1595
1596                 if (!(adapter->test_icr & mask)) {
1597                         *data = 4;
1598                         break;
1599                 }
1600
1601                 if (!shared_int) {
1602                         /*
1603                          * Disable the other interrupts to be reported in
1604                          * the cause register and then force the other
1605                          * interrupts and see if any get posted.  If
1606                          * an interrupt was posted to the bus, the
1607                          * test failed.
1608                          */
1609                         adapter->test_icr = 0;
1610                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1611                                         ~mask & 0x00007FFF);
1612                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1613                                         ~mask & 0x00007FFF);
1614                         IXGBE_WRITE_FLUSH(&adapter->hw);
1615                         usleep_range(10000, 20000);
1616
1617                         if (adapter->test_icr) {
1618                                 *data = 5;
1619                                 break;
1620                         }
1621                 }
1622         }
1623
1624         /* Disable all the interrupts */
1625         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1626         IXGBE_WRITE_FLUSH(&adapter->hw);
1627         usleep_range(10000, 20000);
1628
1629         /* Unhook test interrupt handler */
1630         free_irq(irq, netdev);
1631
1632         return *data;
1633 }
1634
1635 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1636 {
1637         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1638         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1639         struct ixgbe_hw *hw = &adapter->hw;
1640         u32 reg_ctl;
1641
1642         /* shut down the DMA engines now so they can be reinitialized later */
1643
1644         /* first Rx */
1645         hw->mac.ops.disable_rx(hw);
1646         ixgbe_disable_rx_queue(adapter, rx_ring);
1647
1648         /* now Tx */
1649         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1650         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1651         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1652
1653         switch (hw->mac.type) {
1654         case ixgbe_mac_82599EB:
1655         case ixgbe_mac_X540:
1656         case ixgbe_mac_X550:
1657         case ixgbe_mac_X550EM_x:
1658                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1659                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1660                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1661                 break;
1662         default:
1663                 break;
1664         }
1665
1666         ixgbe_reset(adapter);
1667
1668         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1669         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1670 }
1671
1672 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1673 {
1674         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1675         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1676         struct ixgbe_hw *hw = &adapter->hw;
1677         u32 rctl, reg_data;
1678         int ret_val;
1679         int err;
1680
1681         /* Setup Tx descriptor ring and Tx buffers */
1682         tx_ring->count = IXGBE_DEFAULT_TXD;
1683         tx_ring->queue_index = 0;
1684         tx_ring->dev = &adapter->pdev->dev;
1685         tx_ring->netdev = adapter->netdev;
1686         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1687
1688         err = ixgbe_setup_tx_resources(tx_ring);
1689         if (err)
1690                 return 1;
1691
1692         switch (adapter->hw.mac.type) {
1693         case ixgbe_mac_82599EB:
1694         case ixgbe_mac_X540:
1695         case ixgbe_mac_X550:
1696         case ixgbe_mac_X550EM_x:
1697                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1698                 reg_data |= IXGBE_DMATXCTL_TE;
1699                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1700                 break;
1701         default:
1702                 break;
1703         }
1704
1705         ixgbe_configure_tx_ring(adapter, tx_ring);
1706
1707         /* Setup Rx Descriptor ring and Rx buffers */
1708         rx_ring->count = IXGBE_DEFAULT_RXD;
1709         rx_ring->queue_index = 0;
1710         rx_ring->dev = &adapter->pdev->dev;
1711         rx_ring->netdev = adapter->netdev;
1712         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1713
1714         err = ixgbe_setup_rx_resources(rx_ring);
1715         if (err) {
1716                 ret_val = 4;
1717                 goto err_nomem;
1718         }
1719
1720         hw->mac.ops.disable_rx(hw);
1721
1722         ixgbe_configure_rx_ring(adapter, rx_ring);
1723
1724         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1725         rctl |= IXGBE_RXCTRL_DMBYPS;
1726         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1727
1728         hw->mac.ops.enable_rx(hw);
1729
1730         return 0;
1731
1732 err_nomem:
1733         ixgbe_free_desc_rings(adapter);
1734         return ret_val;
1735 }
1736
1737 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1738 {
1739         struct ixgbe_hw *hw = &adapter->hw;
1740         u32 reg_data;
1741
1742
1743         /* Setup MAC loopback */
1744         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1745         reg_data |= IXGBE_HLREG0_LPBK;
1746         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1747
1748         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1749         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1750         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1751
1752         /* X540 and X550 needs to set the MACC.FLU bit to force link up */
1753         switch (adapter->hw.mac.type) {
1754         case ixgbe_mac_X540:
1755         case ixgbe_mac_X550:
1756         case ixgbe_mac_X550EM_x:
1757                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1758                 reg_data |= IXGBE_MACC_FLU;
1759                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1760                 break;
1761         default:
1762                 if (hw->mac.orig_autoc) {
1763                         reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
1764                         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1765                 } else {
1766                         return 10;
1767                 }
1768         }
1769         IXGBE_WRITE_FLUSH(hw);
1770         usleep_range(10000, 20000);
1771
1772         /* Disable Atlas Tx lanes; re-enabled in reset path */
1773         if (hw->mac.type == ixgbe_mac_82598EB) {
1774                 u8 atlas;
1775
1776                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1777                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1778                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1779
1780                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1781                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1782                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1783
1784                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1785                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1786                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1787
1788                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1789                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1790                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1791         }
1792
1793         return 0;
1794 }
1795
1796 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1797 {
1798         u32 reg_data;
1799
1800         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1801         reg_data &= ~IXGBE_HLREG0_LPBK;
1802         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1803 }
1804
1805 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1806                                       unsigned int frame_size)
1807 {
1808         memset(skb->data, 0xFF, frame_size);
1809         frame_size >>= 1;
1810         memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1811         memset(&skb->data[frame_size + 10], 0xBE, 1);
1812         memset(&skb->data[frame_size + 12], 0xAF, 1);
1813 }
1814
1815 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1816                                      unsigned int frame_size)
1817 {
1818         unsigned char *data;
1819         bool match = true;
1820
1821         frame_size >>= 1;
1822
1823         data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1824
1825         if (data[3] != 0xFF ||
1826             data[frame_size + 10] != 0xBE ||
1827             data[frame_size + 12] != 0xAF)
1828                 match = false;
1829
1830         kunmap(rx_buffer->page);
1831
1832         return match;
1833 }
1834
1835 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1836                                   struct ixgbe_ring *tx_ring,
1837                                   unsigned int size)
1838 {
1839         union ixgbe_adv_rx_desc *rx_desc;
1840         struct ixgbe_rx_buffer *rx_buffer;
1841         struct ixgbe_tx_buffer *tx_buffer;
1842         u16 rx_ntc, tx_ntc, count = 0;
1843
1844         /* initialize next to clean and descriptor values */
1845         rx_ntc = rx_ring->next_to_clean;
1846         tx_ntc = tx_ring->next_to_clean;
1847         rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1848
1849         while (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) {
1850                 /* check Rx buffer */
1851                 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
1852
1853                 /* sync Rx buffer for CPU read */
1854                 dma_sync_single_for_cpu(rx_ring->dev,
1855                                         rx_buffer->dma,
1856                                         ixgbe_rx_bufsz(rx_ring),
1857                                         DMA_FROM_DEVICE);
1858
1859                 /* verify contents of skb */
1860                 if (ixgbe_check_lbtest_frame(rx_buffer, size))
1861                         count++;
1862
1863                 /* sync Rx buffer for device write */
1864                 dma_sync_single_for_device(rx_ring->dev,
1865                                            rx_buffer->dma,
1866                                            ixgbe_rx_bufsz(rx_ring),
1867                                            DMA_FROM_DEVICE);
1868
1869                 /* unmap buffer on Tx side */
1870                 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
1871                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1872
1873                 /* increment Rx/Tx next to clean counters */
1874                 rx_ntc++;
1875                 if (rx_ntc == rx_ring->count)
1876                         rx_ntc = 0;
1877                 tx_ntc++;
1878                 if (tx_ntc == tx_ring->count)
1879                         tx_ntc = 0;
1880
1881                 /* fetch next descriptor */
1882                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1883         }
1884
1885         netdev_tx_reset_queue(txring_txq(tx_ring));
1886
1887         /* re-map buffers to ring, store next to clean values */
1888         ixgbe_alloc_rx_buffers(rx_ring, count);
1889         rx_ring->next_to_clean = rx_ntc;
1890         tx_ring->next_to_clean = tx_ntc;
1891
1892         return count;
1893 }
1894
1895 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1896 {
1897         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1898         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1899         int i, j, lc, good_cnt, ret_val = 0;
1900         unsigned int size = 1024;
1901         netdev_tx_t tx_ret_val;
1902         struct sk_buff *skb;
1903         u32 flags_orig = adapter->flags;
1904
1905         /* DCB can modify the frames on Tx */
1906         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
1907
1908         /* allocate test skb */
1909         skb = alloc_skb(size, GFP_KERNEL);
1910         if (!skb)
1911                 return 11;
1912
1913         /* place data into test skb */
1914         ixgbe_create_lbtest_frame(skb, size);
1915         skb_put(skb, size);
1916
1917         /*
1918          * Calculate the loop count based on the largest descriptor ring
1919          * The idea is to wrap the largest ring a number of times using 64
1920          * send/receive pairs during each loop
1921          */
1922
1923         if (rx_ring->count <= tx_ring->count)
1924                 lc = ((tx_ring->count / 64) * 2) + 1;
1925         else
1926                 lc = ((rx_ring->count / 64) * 2) + 1;
1927
1928         for (j = 0; j <= lc; j++) {
1929                 /* reset count of good packets */
1930                 good_cnt = 0;
1931
1932                 /* place 64 packets on the transmit queue*/
1933                 for (i = 0; i < 64; i++) {
1934                         skb_get(skb);
1935                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1936                                                            adapter,
1937                                                            tx_ring);
1938                         if (tx_ret_val == NETDEV_TX_OK)
1939                                 good_cnt++;
1940                 }
1941
1942                 if (good_cnt != 64) {
1943                         ret_val = 12;
1944                         break;
1945                 }
1946
1947                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1948                 msleep(200);
1949
1950                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1951                 if (good_cnt != 64) {
1952                         ret_val = 13;
1953                         break;
1954                 }
1955         }
1956
1957         /* free the original skb */
1958         kfree_skb(skb);
1959         adapter->flags = flags_orig;
1960
1961         return ret_val;
1962 }
1963
1964 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1965 {
1966         *data = ixgbe_setup_desc_rings(adapter);
1967         if (*data)
1968                 goto out;
1969         *data = ixgbe_setup_loopback_test(adapter);
1970         if (*data)
1971                 goto err_loopback;
1972         *data = ixgbe_run_loopback_test(adapter);
1973         ixgbe_loopback_cleanup(adapter);
1974
1975 err_loopback:
1976         ixgbe_free_desc_rings(adapter);
1977 out:
1978         return *data;
1979 }
1980
1981 static void ixgbe_diag_test(struct net_device *netdev,
1982                             struct ethtool_test *eth_test, u64 *data)
1983 {
1984         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1985         bool if_running = netif_running(netdev);
1986
1987         if (ixgbe_removed(adapter->hw.hw_addr)) {
1988                 e_err(hw, "Adapter removed - test blocked\n");
1989                 data[0] = 1;
1990                 data[1] = 1;
1991                 data[2] = 1;
1992                 data[3] = 1;
1993                 data[4] = 1;
1994                 eth_test->flags |= ETH_TEST_FL_FAILED;
1995                 return;
1996         }
1997         set_bit(__IXGBE_TESTING, &adapter->state);
1998         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1999                 struct ixgbe_hw *hw = &adapter->hw;
2000
2001                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2002                         int i;
2003                         for (i = 0; i < adapter->num_vfs; i++) {
2004                                 if (adapter->vfinfo[i].clear_to_send) {
2005                                         netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
2006                                         data[0] = 1;
2007                                         data[1] = 1;
2008                                         data[2] = 1;
2009                                         data[3] = 1;
2010                                         data[4] = 1;
2011                                         eth_test->flags |= ETH_TEST_FL_FAILED;
2012                                         clear_bit(__IXGBE_TESTING,
2013                                                   &adapter->state);
2014                                         goto skip_ol_tests;
2015                                 }
2016                         }
2017                 }
2018
2019                 /* Offline tests */
2020                 e_info(hw, "offline testing starting\n");
2021
2022                 /* Link test performed before hardware reset so autoneg doesn't
2023                  * interfere with test result
2024                  */
2025                 if (ixgbe_link_test(adapter, &data[4]))
2026                         eth_test->flags |= ETH_TEST_FL_FAILED;
2027
2028                 if (if_running)
2029                         /* indicate we're in test mode */
2030                         dev_close(netdev);
2031                 else
2032                         ixgbe_reset(adapter);
2033
2034                 e_info(hw, "register testing starting\n");
2035                 if (ixgbe_reg_test(adapter, &data[0]))
2036                         eth_test->flags |= ETH_TEST_FL_FAILED;
2037
2038                 ixgbe_reset(adapter);
2039                 e_info(hw, "eeprom testing starting\n");
2040                 if (ixgbe_eeprom_test(adapter, &data[1]))
2041                         eth_test->flags |= ETH_TEST_FL_FAILED;
2042
2043                 ixgbe_reset(adapter);
2044                 e_info(hw, "interrupt testing starting\n");
2045                 if (ixgbe_intr_test(adapter, &data[2]))
2046                         eth_test->flags |= ETH_TEST_FL_FAILED;
2047
2048                 /* If SRIOV or VMDq is enabled then skip MAC
2049                  * loopback diagnostic. */
2050                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2051                                       IXGBE_FLAG_VMDQ_ENABLED)) {
2052                         e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2053                         data[3] = 0;
2054                         goto skip_loopback;
2055                 }
2056
2057                 ixgbe_reset(adapter);
2058                 e_info(hw, "loopback testing starting\n");
2059                 if (ixgbe_loopback_test(adapter, &data[3]))
2060                         eth_test->flags |= ETH_TEST_FL_FAILED;
2061
2062 skip_loopback:
2063                 ixgbe_reset(adapter);
2064
2065                 /* clear testing bit and return adapter to previous state */
2066                 clear_bit(__IXGBE_TESTING, &adapter->state);
2067                 if (if_running)
2068                         dev_open(netdev);
2069                 else if (hw->mac.ops.disable_tx_laser)
2070                         hw->mac.ops.disable_tx_laser(hw);
2071         } else {
2072                 e_info(hw, "online testing starting\n");
2073
2074                 /* Online tests */
2075                 if (ixgbe_link_test(adapter, &data[4]))
2076                         eth_test->flags |= ETH_TEST_FL_FAILED;
2077
2078                 /* Offline tests aren't run; pass by default */
2079                 data[0] = 0;
2080                 data[1] = 0;
2081                 data[2] = 0;
2082                 data[3] = 0;
2083
2084                 clear_bit(__IXGBE_TESTING, &adapter->state);
2085         }
2086
2087 skip_ol_tests:
2088         msleep_interruptible(4 * 1000);
2089 }
2090
2091 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2092                                struct ethtool_wolinfo *wol)
2093 {
2094         struct ixgbe_hw *hw = &adapter->hw;
2095         int retval = 0;
2096
2097         /* WOL not supported for all devices */
2098         if (!ixgbe_wol_supported(adapter, hw->device_id,
2099                                  hw->subsystem_device_id)) {
2100                 retval = 1;
2101                 wol->supported = 0;
2102         }
2103
2104         return retval;
2105 }
2106
2107 static void ixgbe_get_wol(struct net_device *netdev,
2108                           struct ethtool_wolinfo *wol)
2109 {
2110         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2111
2112         wol->supported = WAKE_UCAST | WAKE_MCAST |
2113                          WAKE_BCAST | WAKE_MAGIC;
2114         wol->wolopts = 0;
2115
2116         if (ixgbe_wol_exclusion(adapter, wol) ||
2117             !device_can_wakeup(&adapter->pdev->dev))
2118                 return;
2119
2120         if (adapter->wol & IXGBE_WUFC_EX)
2121                 wol->wolopts |= WAKE_UCAST;
2122         if (adapter->wol & IXGBE_WUFC_MC)
2123                 wol->wolopts |= WAKE_MCAST;
2124         if (adapter->wol & IXGBE_WUFC_BC)
2125                 wol->wolopts |= WAKE_BCAST;
2126         if (adapter->wol & IXGBE_WUFC_MAG)
2127                 wol->wolopts |= WAKE_MAGIC;
2128 }
2129
2130 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2131 {
2132         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2133
2134         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
2135                 return -EOPNOTSUPP;
2136
2137         if (ixgbe_wol_exclusion(adapter, wol))
2138                 return wol->wolopts ? -EOPNOTSUPP : 0;
2139
2140         adapter->wol = 0;
2141
2142         if (wol->wolopts & WAKE_UCAST)
2143                 adapter->wol |= IXGBE_WUFC_EX;
2144         if (wol->wolopts & WAKE_MCAST)
2145                 adapter->wol |= IXGBE_WUFC_MC;
2146         if (wol->wolopts & WAKE_BCAST)
2147                 adapter->wol |= IXGBE_WUFC_BC;
2148         if (wol->wolopts & WAKE_MAGIC)
2149                 adapter->wol |= IXGBE_WUFC_MAG;
2150
2151         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2152
2153         return 0;
2154 }
2155
2156 static int ixgbe_nway_reset(struct net_device *netdev)
2157 {
2158         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2159
2160         if (netif_running(netdev))
2161                 ixgbe_reinit_locked(adapter);
2162
2163         return 0;
2164 }
2165
2166 static int ixgbe_set_phys_id(struct net_device *netdev,
2167                              enum ethtool_phys_id_state state)
2168 {
2169         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2170         struct ixgbe_hw *hw = &adapter->hw;
2171
2172         switch (state) {
2173         case ETHTOOL_ID_ACTIVE:
2174                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2175                 return 2;
2176
2177         case ETHTOOL_ID_ON:
2178                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2179                 break;
2180
2181         case ETHTOOL_ID_OFF:
2182                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2183                 break;
2184
2185         case ETHTOOL_ID_INACTIVE:
2186                 /* Restore LED settings */
2187                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2188                 break;
2189         }
2190
2191         return 0;
2192 }
2193
2194 static int ixgbe_get_coalesce(struct net_device *netdev,
2195                               struct ethtool_coalesce *ec)
2196 {
2197         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2198
2199         /* only valid if in constant ITR mode */
2200         if (adapter->rx_itr_setting <= 1)
2201                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2202         else
2203                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2204
2205         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2206         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2207                 return 0;
2208
2209         /* only valid if in constant ITR mode */
2210         if (adapter->tx_itr_setting <= 1)
2211                 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2212         else
2213                 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2214
2215         return 0;
2216 }
2217
2218 /*
2219  * this function must be called before setting the new value of
2220  * rx_itr_setting
2221  */
2222 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2223 {
2224         struct net_device *netdev = adapter->netdev;
2225
2226         /* nothing to do if LRO or RSC are not enabled */
2227         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2228             !(netdev->features & NETIF_F_LRO))
2229                 return false;
2230
2231         /* check the feature flag value and enable RSC if necessary */
2232         if (adapter->rx_itr_setting == 1 ||
2233             adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2234                 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2235                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2236                         e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2237                         return true;
2238                 }
2239         /* if interrupt rate is too high then disable RSC */
2240         } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2241                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2242                 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2243                 return true;
2244         }
2245         return false;
2246 }
2247
2248 static int ixgbe_set_coalesce(struct net_device *netdev,
2249                               struct ethtool_coalesce *ec)
2250 {
2251         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2252         struct ixgbe_q_vector *q_vector;
2253         int i;
2254         u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2255         bool need_reset = false;
2256
2257         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2258                 /* reject Tx specific changes in case of mixed RxTx vectors */
2259                 if (ec->tx_coalesce_usecs)
2260                         return -EINVAL;
2261                 tx_itr_prev = adapter->rx_itr_setting;
2262         } else {
2263                 tx_itr_prev = adapter->tx_itr_setting;
2264         }
2265
2266         if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2267             (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2268                 return -EINVAL;
2269
2270         if (ec->rx_coalesce_usecs > 1)
2271                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2272         else
2273                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2274
2275         if (adapter->rx_itr_setting == 1)
2276                 rx_itr_param = IXGBE_20K_ITR;
2277         else
2278                 rx_itr_param = adapter->rx_itr_setting;
2279
2280         if (ec->tx_coalesce_usecs > 1)
2281                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2282         else
2283                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2284
2285         if (adapter->tx_itr_setting == 1)
2286                 tx_itr_param = IXGBE_12K_ITR;
2287         else
2288                 tx_itr_param = adapter->tx_itr_setting;
2289
2290         /* mixed Rx/Tx */
2291         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2292                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2293
2294         /* detect ITR changes that require update of TXDCTL.WTHRESH */
2295         if ((adapter->tx_itr_setting != 1) &&
2296             (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2297                 if ((tx_itr_prev == 1) ||
2298                     (tx_itr_prev >= IXGBE_100K_ITR))
2299                         need_reset = true;
2300         } else {
2301                 if ((tx_itr_prev != 1) &&
2302                     (tx_itr_prev < IXGBE_100K_ITR))
2303                         need_reset = true;
2304         }
2305
2306         /* check the old value and enable RSC if necessary */
2307         need_reset |= ixgbe_update_rsc(adapter);
2308
2309         for (i = 0; i < adapter->num_q_vectors; i++) {
2310                 q_vector = adapter->q_vector[i];
2311                 if (q_vector->tx.count && !q_vector->rx.count)
2312                         /* tx only */
2313                         q_vector->itr = tx_itr_param;
2314                 else
2315                         /* rx only or mixed */
2316                         q_vector->itr = rx_itr_param;
2317                 ixgbe_write_eitr(q_vector);
2318         }
2319
2320         /*
2321          * do reset here at the end to make sure EITR==0 case is handled
2322          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2323          * also locks in RSC enable/disable which requires reset
2324          */
2325         if (need_reset)
2326                 ixgbe_do_reset(netdev);
2327
2328         return 0;
2329 }
2330
2331 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2332                                         struct ethtool_rxnfc *cmd)
2333 {
2334         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2335         struct ethtool_rx_flow_spec *fsp =
2336                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2337         struct hlist_node *node2;
2338         struct ixgbe_fdir_filter *rule = NULL;
2339
2340         /* report total rule count */
2341         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2342
2343         hlist_for_each_entry_safe(rule, node2,
2344                                   &adapter->fdir_filter_list, fdir_node) {
2345                 if (fsp->location <= rule->sw_idx)
2346                         break;
2347         }
2348
2349         if (!rule || fsp->location != rule->sw_idx)
2350                 return -EINVAL;
2351
2352         /* fill out the flow spec entry */
2353
2354         /* set flow type field */
2355         switch (rule->filter.formatted.flow_type) {
2356         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2357                 fsp->flow_type = TCP_V4_FLOW;
2358                 break;
2359         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2360                 fsp->flow_type = UDP_V4_FLOW;
2361                 break;
2362         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2363                 fsp->flow_type = SCTP_V4_FLOW;
2364                 break;
2365         case IXGBE_ATR_FLOW_TYPE_IPV4:
2366                 fsp->flow_type = IP_USER_FLOW;
2367                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2368                 fsp->h_u.usr_ip4_spec.proto = 0;
2369                 fsp->m_u.usr_ip4_spec.proto = 0;
2370                 break;
2371         default:
2372                 return -EINVAL;
2373         }
2374
2375         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2376         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2377         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2378         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2379         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2380         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2381         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2382         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2383         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2384         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2385         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2386         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2387         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2388         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2389         fsp->flow_type |= FLOW_EXT;
2390
2391         /* record action */
2392         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2393                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2394         else
2395                 fsp->ring_cookie = rule->action;
2396
2397         return 0;
2398 }
2399
2400 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2401                                       struct ethtool_rxnfc *cmd,
2402                                       u32 *rule_locs)
2403 {
2404         struct hlist_node *node2;
2405         struct ixgbe_fdir_filter *rule;
2406         int cnt = 0;
2407
2408         /* report total rule count */
2409         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2410
2411         hlist_for_each_entry_safe(rule, node2,
2412                                   &adapter->fdir_filter_list, fdir_node) {
2413                 if (cnt == cmd->rule_cnt)
2414                         return -EMSGSIZE;
2415                 rule_locs[cnt] = rule->sw_idx;
2416                 cnt++;
2417         }
2418
2419         cmd->rule_cnt = cnt;
2420
2421         return 0;
2422 }
2423
2424 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2425                                    struct ethtool_rxnfc *cmd)
2426 {
2427         cmd->data = 0;
2428
2429         /* Report default options for RSS on ixgbe */
2430         switch (cmd->flow_type) {
2431         case TCP_V4_FLOW:
2432                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2433                 /* fallthrough */
2434         case UDP_V4_FLOW:
2435                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2436                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2437                 /* fallthrough */
2438         case SCTP_V4_FLOW:
2439         case AH_ESP_V4_FLOW:
2440         case AH_V4_FLOW:
2441         case ESP_V4_FLOW:
2442         case IPV4_FLOW:
2443                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2444                 break;
2445         case TCP_V6_FLOW:
2446                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2447                 /* fallthrough */
2448         case UDP_V6_FLOW:
2449                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2450                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2451                 /* fallthrough */
2452         case SCTP_V6_FLOW:
2453         case AH_ESP_V6_FLOW:
2454         case AH_V6_FLOW:
2455         case ESP_V6_FLOW:
2456         case IPV6_FLOW:
2457                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2458                 break;
2459         default:
2460                 return -EINVAL;
2461         }
2462
2463         return 0;
2464 }
2465
2466 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2467                            u32 *rule_locs)
2468 {
2469         struct ixgbe_adapter *adapter = netdev_priv(dev);
2470         int ret = -EOPNOTSUPP;
2471
2472         switch (cmd->cmd) {
2473         case ETHTOOL_GRXRINGS:
2474                 cmd->data = adapter->num_rx_queues;
2475                 ret = 0;
2476                 break;
2477         case ETHTOOL_GRXCLSRLCNT:
2478                 cmd->rule_cnt = adapter->fdir_filter_count;
2479                 ret = 0;
2480                 break;
2481         case ETHTOOL_GRXCLSRULE:
2482                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2483                 break;
2484         case ETHTOOL_GRXCLSRLALL:
2485                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2486                 break;
2487         case ETHTOOL_GRXFH:
2488                 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2489                 break;
2490         default:
2491                 break;
2492         }
2493
2494         return ret;
2495 }
2496
2497 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2498                                            struct ixgbe_fdir_filter *input,
2499                                            u16 sw_idx)
2500 {
2501         struct ixgbe_hw *hw = &adapter->hw;
2502         struct hlist_node *node2;
2503         struct ixgbe_fdir_filter *rule, *parent;
2504         int err = -EINVAL;
2505
2506         parent = NULL;
2507         rule = NULL;
2508
2509         hlist_for_each_entry_safe(rule, node2,
2510                                   &adapter->fdir_filter_list, fdir_node) {
2511                 /* hash found, or no matching entry */
2512                 if (rule->sw_idx >= sw_idx)
2513                         break;
2514                 parent = rule;
2515         }
2516
2517         /* if there is an old rule occupying our place remove it */
2518         if (rule && (rule->sw_idx == sw_idx)) {
2519                 if (!input || (rule->filter.formatted.bkt_hash !=
2520                                input->filter.formatted.bkt_hash)) {
2521                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2522                                                                 &rule->filter,
2523                                                                 sw_idx);
2524                 }
2525
2526                 hlist_del(&rule->fdir_node);
2527                 kfree(rule);
2528                 adapter->fdir_filter_count--;
2529         }
2530
2531         /*
2532          * If no input this was a delete, err should be 0 if a rule was
2533          * successfully found and removed from the list else -EINVAL
2534          */
2535         if (!input)
2536                 return err;
2537
2538         /* initialize node and set software index */
2539         INIT_HLIST_NODE(&input->fdir_node);
2540
2541         /* add filter to the list */
2542         if (parent)
2543                 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2544         else
2545                 hlist_add_head(&input->fdir_node,
2546                                &adapter->fdir_filter_list);
2547
2548         /* update counts */
2549         adapter->fdir_filter_count++;
2550
2551         return 0;
2552 }
2553
2554 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2555                                        u8 *flow_type)
2556 {
2557         switch (fsp->flow_type & ~FLOW_EXT) {
2558         case TCP_V4_FLOW:
2559                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2560                 break;
2561         case UDP_V4_FLOW:
2562                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2563                 break;
2564         case SCTP_V4_FLOW:
2565                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2566                 break;
2567         case IP_USER_FLOW:
2568                 switch (fsp->h_u.usr_ip4_spec.proto) {
2569                 case IPPROTO_TCP:
2570                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2571                         break;
2572                 case IPPROTO_UDP:
2573                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2574                         break;
2575                 case IPPROTO_SCTP:
2576                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2577                         break;
2578                 case 0:
2579                         if (!fsp->m_u.usr_ip4_spec.proto) {
2580                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2581                                 break;
2582                         }
2583                 default:
2584                         return 0;
2585                 }
2586                 break;
2587         default:
2588                 return 0;
2589         }
2590
2591         return 1;
2592 }
2593
2594 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2595                                         struct ethtool_rxnfc *cmd)
2596 {
2597         struct ethtool_rx_flow_spec *fsp =
2598                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2599         struct ixgbe_hw *hw = &adapter->hw;
2600         struct ixgbe_fdir_filter *input;
2601         union ixgbe_atr_input mask;
2602         u8 queue;
2603         int err;
2604
2605         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2606                 return -EOPNOTSUPP;
2607
2608         /* ring_cookie is a masked into a set of queues and ixgbe pools or
2609          * we use the drop index.
2610          */
2611         if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
2612                 queue = IXGBE_FDIR_DROP_QUEUE;
2613         } else {
2614                 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
2615                 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
2616
2617                 if (!vf && (ring >= adapter->num_rx_queues))
2618                         return -EINVAL;
2619                 else if (vf &&
2620                          ((vf > adapter->num_vfs) ||
2621                            ring >= adapter->num_rx_queues_per_pool))
2622                         return -EINVAL;
2623
2624                 /* Map the ring onto the absolute queue index */
2625                 if (!vf)
2626                         queue = adapter->rx_ring[ring]->reg_idx;
2627                 else
2628                         queue = ((vf - 1) *
2629                                 adapter->num_rx_queues_per_pool) + ring;
2630         }
2631
2632         /* Don't allow indexes to exist outside of available space */
2633         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2634                 e_err(drv, "Location out of range\n");
2635                 return -EINVAL;
2636         }
2637
2638         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2639         if (!input)
2640                 return -ENOMEM;
2641
2642         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2643
2644         /* set SW index */
2645         input->sw_idx = fsp->location;
2646
2647         /* record flow type */
2648         if (!ixgbe_flowspec_to_flow_type(fsp,
2649                                          &input->filter.formatted.flow_type)) {
2650                 e_err(drv, "Unrecognized flow type\n");
2651                 goto err_out;
2652         }
2653
2654         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2655                                    IXGBE_ATR_L4TYPE_MASK;
2656
2657         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2658                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2659
2660         /* Copy input into formatted structures */
2661         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2662         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2663         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2664         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2665         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2666         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2667         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2668         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2669
2670         if (fsp->flow_type & FLOW_EXT) {
2671                 input->filter.formatted.vm_pool =
2672                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2673                 mask.formatted.vm_pool =
2674                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2675                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2676                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2677                 input->filter.formatted.flex_bytes =
2678                                                 fsp->h_ext.vlan_etype;
2679                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2680         }
2681
2682         /* determine if we need to drop or route the packet */
2683         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2684                 input->action = IXGBE_FDIR_DROP_QUEUE;
2685         else
2686                 input->action = fsp->ring_cookie;
2687
2688         spin_lock(&adapter->fdir_perfect_lock);
2689
2690         if (hlist_empty(&adapter->fdir_filter_list)) {
2691                 /* save mask and program input mask into HW */
2692                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2693                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2694                 if (err) {
2695                         e_err(drv, "Error writing mask\n");
2696                         goto err_out_w_lock;
2697                 }
2698         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2699                 e_err(drv, "Only one mask supported per port\n");
2700                 goto err_out_w_lock;
2701         }
2702
2703         /* apply mask and compute/store hash */
2704         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2705
2706         /* program filters to filter memory */
2707         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2708                                 &input->filter, input->sw_idx, queue);
2709         if (err)
2710                 goto err_out_w_lock;
2711
2712         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2713
2714         spin_unlock(&adapter->fdir_perfect_lock);
2715
2716         return err;
2717 err_out_w_lock:
2718         spin_unlock(&adapter->fdir_perfect_lock);
2719 err_out:
2720         kfree(input);
2721         return -EINVAL;
2722 }
2723
2724 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2725                                         struct ethtool_rxnfc *cmd)
2726 {
2727         struct ethtool_rx_flow_spec *fsp =
2728                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2729         int err;
2730
2731         spin_lock(&adapter->fdir_perfect_lock);
2732         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2733         spin_unlock(&adapter->fdir_perfect_lock);
2734
2735         return err;
2736 }
2737
2738 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2739                        IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2740 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2741                                   struct ethtool_rxnfc *nfc)
2742 {
2743         u32 flags2 = adapter->flags2;
2744
2745         /*
2746          * RSS does not support anything other than hashing
2747          * to queues on src and dst IPs and ports
2748          */
2749         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2750                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2751                 return -EINVAL;
2752
2753         switch (nfc->flow_type) {
2754         case TCP_V4_FLOW:
2755         case TCP_V6_FLOW:
2756                 if (!(nfc->data & RXH_IP_SRC) ||
2757                     !(nfc->data & RXH_IP_DST) ||
2758                     !(nfc->data & RXH_L4_B_0_1) ||
2759                     !(nfc->data & RXH_L4_B_2_3))
2760                         return -EINVAL;
2761                 break;
2762         case UDP_V4_FLOW:
2763                 if (!(nfc->data & RXH_IP_SRC) ||
2764                     !(nfc->data & RXH_IP_DST))
2765                         return -EINVAL;
2766                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2767                 case 0:
2768                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2769                         break;
2770                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2771                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2772                         break;
2773                 default:
2774                         return -EINVAL;
2775                 }
2776                 break;
2777         case UDP_V6_FLOW:
2778                 if (!(nfc->data & RXH_IP_SRC) ||
2779                     !(nfc->data & RXH_IP_DST))
2780                         return -EINVAL;
2781                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2782                 case 0:
2783                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2784                         break;
2785                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2786                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2787                         break;
2788                 default:
2789                         return -EINVAL;
2790                 }
2791                 break;
2792         case AH_ESP_V4_FLOW:
2793         case AH_V4_FLOW:
2794         case ESP_V4_FLOW:
2795         case SCTP_V4_FLOW:
2796         case AH_ESP_V6_FLOW:
2797         case AH_V6_FLOW:
2798         case ESP_V6_FLOW:
2799         case SCTP_V6_FLOW:
2800                 if (!(nfc->data & RXH_IP_SRC) ||
2801                     !(nfc->data & RXH_IP_DST) ||
2802                     (nfc->data & RXH_L4_B_0_1) ||
2803                     (nfc->data & RXH_L4_B_2_3))
2804                         return -EINVAL;
2805                 break;
2806         default:
2807                 return -EINVAL;
2808         }
2809
2810         /* if we changed something we need to update flags */
2811         if (flags2 != adapter->flags2) {
2812                 struct ixgbe_hw *hw = &adapter->hw;
2813                 u32 mrqc;
2814                 unsigned int pf_pool = adapter->num_vfs;
2815
2816                 if ((hw->mac.type >= ixgbe_mac_X550) &&
2817                     (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2818                         mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
2819                 else
2820                         mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2821
2822                 if ((flags2 & UDP_RSS_FLAGS) &&
2823                     !(adapter->flags2 & UDP_RSS_FLAGS))
2824                         e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2825
2826                 adapter->flags2 = flags2;
2827
2828                 /* Perform hash on these packet types */
2829                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2830                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2831                       | IXGBE_MRQC_RSS_FIELD_IPV6
2832                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2833
2834                 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2835                           IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2836
2837                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2838                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2839
2840                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2841                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2842
2843                 if ((hw->mac.type >= ixgbe_mac_X550) &&
2844                     (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2845                         IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
2846                 else
2847                         IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2848         }
2849
2850         return 0;
2851 }
2852
2853 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2854 {
2855         struct ixgbe_adapter *adapter = netdev_priv(dev);
2856         int ret = -EOPNOTSUPP;
2857
2858         switch (cmd->cmd) {
2859         case ETHTOOL_SRXCLSRLINS:
2860                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2861                 break;
2862         case ETHTOOL_SRXCLSRLDEL:
2863                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2864                 break;
2865         case ETHTOOL_SRXFH:
2866                 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2867                 break;
2868         default:
2869                 break;
2870         }
2871
2872         return ret;
2873 }
2874
2875 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)
2876 {
2877         if (adapter->hw.mac.type < ixgbe_mac_X550)
2878                 return 16;
2879         else
2880                 return 64;
2881 }
2882
2883 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)
2884 {
2885         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2886
2887         return sizeof(adapter->rss_key);
2888 }
2889
2890 static u32 ixgbe_rss_indir_size(struct net_device *netdev)
2891 {
2892         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2893
2894         return ixgbe_rss_indir_tbl_entries(adapter);
2895 }
2896
2897 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)
2898 {
2899         int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter);
2900
2901         for (i = 0; i < reta_size; i++)
2902                 indir[i] = adapter->rss_indir_tbl[i];
2903 }
2904
2905 static int ixgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
2906                           u8 *hfunc)
2907 {
2908         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2909
2910         if (hfunc)
2911                 *hfunc = ETH_RSS_HASH_TOP;
2912
2913         if (indir)
2914                 ixgbe_get_reta(adapter, indir);
2915
2916         if (key)
2917                 memcpy(key, adapter->rss_key, ixgbe_get_rxfh_key_size(netdev));
2918
2919         return 0;
2920 }
2921
2922 static int ixgbe_set_rxfh(struct net_device *netdev, const u32 *indir,
2923                           const u8 *key, const u8 hfunc)
2924 {
2925         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2926         int i;
2927         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
2928
2929         if (hfunc)
2930                 return -EINVAL;
2931
2932         /* Fill out the redirection table */
2933         if (indir) {
2934                 int max_queues = min_t(int, adapter->num_rx_queues,
2935                                        ixgbe_rss_indir_tbl_max(adapter));
2936
2937                 /*Allow at least 2 queues w/ SR-IOV.*/
2938                 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
2939                     (max_queues < 2))
2940                         max_queues = 2;
2941
2942                 /* Verify user input. */
2943                 for (i = 0; i < reta_entries; i++)
2944                         if (indir[i] >= max_queues)
2945                                 return -EINVAL;
2946
2947                 for (i = 0; i < reta_entries; i++)
2948                         adapter->rss_indir_tbl[i] = indir[i];
2949         }
2950
2951         /* Fill out the rss hash key */
2952         if (key)
2953                 memcpy(adapter->rss_key, key, ixgbe_get_rxfh_key_size(netdev));
2954
2955         ixgbe_store_reta(adapter);
2956
2957         return 0;
2958 }
2959
2960 static int ixgbe_get_ts_info(struct net_device *dev,
2961                              struct ethtool_ts_info *info)
2962 {
2963         struct ixgbe_adapter *adapter = netdev_priv(dev);
2964
2965         switch (adapter->hw.mac.type) {
2966         case ixgbe_mac_X550:
2967         case ixgbe_mac_X550EM_x:
2968         case ixgbe_mac_X540:
2969         case ixgbe_mac_82599EB:
2970                 info->so_timestamping =
2971                         SOF_TIMESTAMPING_TX_SOFTWARE |
2972                         SOF_TIMESTAMPING_RX_SOFTWARE |
2973                         SOF_TIMESTAMPING_SOFTWARE |
2974                         SOF_TIMESTAMPING_TX_HARDWARE |
2975                         SOF_TIMESTAMPING_RX_HARDWARE |
2976                         SOF_TIMESTAMPING_RAW_HARDWARE;
2977
2978                 if (adapter->ptp_clock)
2979                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2980                 else
2981                         info->phc_index = -1;
2982
2983                 info->tx_types =
2984                         (1 << HWTSTAMP_TX_OFF) |
2985                         (1 << HWTSTAMP_TX_ON);
2986
2987                 info->rx_filters =
2988                         (1 << HWTSTAMP_FILTER_NONE) |
2989                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2990                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2991                         (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2992                 break;
2993         default:
2994                 return ethtool_op_get_ts_info(dev, info);
2995         }
2996         return 0;
2997 }
2998
2999 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
3000 {
3001         unsigned int max_combined;
3002         u8 tcs = netdev_get_num_tc(adapter->netdev);
3003
3004         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3005                 /* We only support one q_vector without MSI-X */
3006                 max_combined = 1;
3007         } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3008                 /* SR-IOV currently only allows one queue on the PF */
3009                 max_combined = 1;
3010         } else if (tcs > 1) {
3011                 /* For DCB report channels per traffic class */
3012                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3013                         /* 8 TC w/ 4 queues per TC */
3014                         max_combined = 4;
3015                 } else if (tcs > 4) {
3016                         /* 8 TC w/ 8 queues per TC */
3017                         max_combined = 8;
3018                 } else {
3019                         /* 4 TC w/ 16 queues per TC */
3020                         max_combined = 16;
3021                 }
3022         } else if (adapter->atr_sample_rate) {
3023                 /* support up to 64 queues with ATR */
3024                 max_combined = IXGBE_MAX_FDIR_INDICES;
3025         } else {
3026                 /* support up to 16 queues with RSS */
3027                 max_combined = ixgbe_max_rss_indices(adapter);
3028         }
3029
3030         return max_combined;
3031 }
3032
3033 static void ixgbe_get_channels(struct net_device *dev,
3034                                struct ethtool_channels *ch)
3035 {
3036         struct ixgbe_adapter *adapter = netdev_priv(dev);
3037
3038         /* report maximum channels */
3039         ch->max_combined = ixgbe_max_channels(adapter);
3040
3041         /* report info for other vector */
3042         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3043                 ch->max_other = NON_Q_VECTORS;
3044                 ch->other_count = NON_Q_VECTORS;
3045         }
3046
3047         /* record RSS queues */
3048         ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
3049
3050         /* nothing else to report if RSS is disabled */
3051         if (ch->combined_count == 1)
3052                 return;
3053
3054         /* we do not support ATR queueing if SR-IOV is enabled */
3055         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3056                 return;
3057
3058         /* same thing goes for being DCB enabled */
3059         if (netdev_get_num_tc(dev) > 1)
3060                 return;
3061
3062         /* if ATR is disabled we can exit */
3063         if (!adapter->atr_sample_rate)
3064                 return;
3065
3066         /* report flow director queues as maximum channels */
3067         ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
3068 }
3069
3070 static int ixgbe_set_channels(struct net_device *dev,
3071                               struct ethtool_channels *ch)
3072 {
3073         struct ixgbe_adapter *adapter = netdev_priv(dev);
3074         unsigned int count = ch->combined_count;
3075         u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3076
3077         /* verify they are not requesting separate vectors */
3078         if (!count || ch->rx_count || ch->tx_count)
3079                 return -EINVAL;
3080
3081         /* verify other_count has not changed */
3082         if (ch->other_count != NON_Q_VECTORS)
3083                 return -EINVAL;
3084
3085         /* verify the number of channels does not exceed hardware limits */
3086         if (count > ixgbe_max_channels(adapter))
3087                 return -EINVAL;
3088
3089         /* update feature limits from largest to smallest supported values */
3090         adapter->ring_feature[RING_F_FDIR].limit = count;
3091
3092         /* cap RSS limit */
3093         if (count > max_rss_indices)
3094                 count = max_rss_indices;
3095         adapter->ring_feature[RING_F_RSS].limit = count;
3096
3097 #ifdef IXGBE_FCOE
3098         /* cap FCoE limit at 8 */
3099         if (count > IXGBE_FCRETA_SIZE)
3100                 count = IXGBE_FCRETA_SIZE;
3101         adapter->ring_feature[RING_F_FCOE].limit = count;
3102
3103 #endif
3104         /* use setup TC to update any traffic class queue mapping */
3105         return ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
3106 }
3107
3108 static int ixgbe_get_module_info(struct net_device *dev,
3109                                        struct ethtool_modinfo *modinfo)
3110 {
3111         struct ixgbe_adapter *adapter = netdev_priv(dev);
3112         struct ixgbe_hw *hw = &adapter->hw;
3113         s32 status;
3114         u8 sff8472_rev, addr_mode;
3115         bool page_swap = false;
3116
3117         /* Check whether we support SFF-8472 or not */
3118         status = hw->phy.ops.read_i2c_eeprom(hw,
3119                                              IXGBE_SFF_SFF_8472_COMP,
3120                                              &sff8472_rev);
3121         if (status)
3122                 return -EIO;
3123
3124         /* addressing mode is not supported */
3125         status = hw->phy.ops.read_i2c_eeprom(hw,
3126                                              IXGBE_SFF_SFF_8472_SWAP,
3127                                              &addr_mode);
3128         if (status)
3129                 return -EIO;
3130
3131         if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3132                 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3133                 page_swap = true;
3134         }
3135
3136         if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap) {
3137                 /* We have a SFP, but it does not support SFF-8472 */
3138                 modinfo->type = ETH_MODULE_SFF_8079;
3139                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3140         } else {
3141                 /* We have a SFP which supports a revision of SFF-8472. */
3142                 modinfo->type = ETH_MODULE_SFF_8472;
3143                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3144         }
3145
3146         return 0;
3147 }
3148
3149 static int ixgbe_get_module_eeprom(struct net_device *dev,
3150                                          struct ethtool_eeprom *ee,
3151                                          u8 *data)
3152 {
3153         struct ixgbe_adapter *adapter = netdev_priv(dev);
3154         struct ixgbe_hw *hw = &adapter->hw;
3155         s32 status = IXGBE_ERR_PHY_ADDR_INVALID;
3156         u8 databyte = 0xFF;
3157         int i = 0;
3158
3159         if (ee->len == 0)
3160                 return -EINVAL;
3161
3162         for (i = ee->offset; i < ee->offset + ee->len; i++) {
3163                 /* I2C reads can take long time */
3164                 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3165                         return -EBUSY;
3166
3167                 if (i < ETH_MODULE_SFF_8079_LEN)
3168                         status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3169                 else
3170                         status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3171
3172                 if (status)
3173                         return -EIO;
3174
3175                 data[i - ee->offset] = databyte;
3176         }
3177
3178         return 0;
3179 }
3180
3181 static const struct ethtool_ops ixgbe_ethtool_ops = {
3182         .get_settings           = ixgbe_get_settings,
3183         .set_settings           = ixgbe_set_settings,
3184         .get_drvinfo            = ixgbe_get_drvinfo,
3185         .get_regs_len           = ixgbe_get_regs_len,
3186         .get_regs               = ixgbe_get_regs,
3187         .get_wol                = ixgbe_get_wol,
3188         .set_wol                = ixgbe_set_wol,
3189         .nway_reset             = ixgbe_nway_reset,
3190         .get_link               = ethtool_op_get_link,
3191         .get_eeprom_len         = ixgbe_get_eeprom_len,
3192         .get_eeprom             = ixgbe_get_eeprom,
3193         .set_eeprom             = ixgbe_set_eeprom,
3194         .get_ringparam          = ixgbe_get_ringparam,
3195         .set_ringparam          = ixgbe_set_ringparam,
3196         .get_pauseparam         = ixgbe_get_pauseparam,
3197         .set_pauseparam         = ixgbe_set_pauseparam,
3198         .get_msglevel           = ixgbe_get_msglevel,
3199         .set_msglevel           = ixgbe_set_msglevel,
3200         .self_test              = ixgbe_diag_test,
3201         .get_strings            = ixgbe_get_strings,
3202         .set_phys_id            = ixgbe_set_phys_id,
3203         .get_sset_count         = ixgbe_get_sset_count,
3204         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
3205         .get_coalesce           = ixgbe_get_coalesce,
3206         .set_coalesce           = ixgbe_set_coalesce,
3207         .get_rxnfc              = ixgbe_get_rxnfc,
3208         .set_rxnfc              = ixgbe_set_rxnfc,
3209         .get_rxfh_indir_size    = ixgbe_rss_indir_size,
3210         .get_rxfh_key_size      = ixgbe_get_rxfh_key_size,
3211         .get_rxfh               = ixgbe_get_rxfh,
3212         .set_rxfh               = ixgbe_set_rxfh,
3213         .get_channels           = ixgbe_get_channels,
3214         .set_channels           = ixgbe_set_channels,
3215         .get_ts_info            = ixgbe_get_ts_info,
3216         .get_module_info        = ixgbe_get_module_info,
3217         .get_module_eeprom      = ixgbe_get_module_eeprom,
3218 };
3219
3220 void ixgbe_set_ethtool_ops(struct net_device *netdev)
3221 {
3222         netdev->ethtool_ops = &ixgbe_ethtool_ops;
3223 }