drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2015 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/vxlan.h>
  54
  55 #ifdef CONFIG_OF
  56 #include <linux/of_net.h>
  57 #endif
  58
  59 #ifdef CONFIG_SPARC
  60 #include <asm/idprom.h>
  61 #include <asm/prom.h>
  62 #endif
  63
  64 #include "ixgbe.h"
  65 #include "ixgbe_common.h"
  66 #include "ixgbe_dcb_82599.h"
  67 #include "ixgbe_sriov.h"
  68 #ifdef CONFIG_IXGBE_VXLAN
  69 #include <net/vxlan.h>
  70 #endif
  71
  72 char ixgbe_driver_name[] = "ixgbe";
  73 static const char ixgbe_driver_string[] =
  74                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  75 #ifdef IXGBE_FCOE
  76 char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #else
  79 static char ixgbe_default_device_descr[] =
  80                               "Intel(R) 10 Gigabit Network Connection";
  81 #endif
  82 #define DRV_VERSION "4.0.1-k"
  83 const char ixgbe_driver_version[] = DRV_VERSION;
  84 static const char ixgbe_copyright[] =
  85                                 "Copyright (c) 1999-2015 Intel Corporation.";
  86
  87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  88
  89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  90         [board_82598]           = &ixgbe_82598_info,
  91         [board_82599]           = &ixgbe_82599_info,
  92         [board_X540]            = &ixgbe_X540_info,
  93         [board_X550]            = &ixgbe_X550_info,
  94         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 141         /* required last entry */
 142         {0, }
 143 };
 144 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 145
 146 #ifdef CONFIG_IXGBE_DCA
 147 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 148                             void *p);
 149 static struct notifier_block dca_notifier = {
 150         .notifier_call = ixgbe_notify_dca,
 151         .next          = NULL,
 152         .priority      = 0
 153 };
 154 #endif
 155
 156 #ifdef CONFIG_PCI_IOV
 157 static unsigned int max_vfs;
 158 module_param(max_vfs, uint, 0);
 159 MODULE_PARM_DESC(max_vfs,
 160                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 161 #endif /* CONFIG_PCI_IOV */
 162
 163 static unsigned int allow_unsupported_sfp;
 164 module_param(allow_unsupported_sfp, uint, 0);
 165 MODULE_PARM_DESC(allow_unsupported_sfp,
 166                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 167
 168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 169 static int debug = -1;
 170 module_param(debug, int, 0);
 171 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 172
 173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 175 MODULE_LICENSE("GPL");
 176 MODULE_VERSION(DRV_VERSION);
 177
 178 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         int max_gts = 0;
 252         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 253         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 254         struct pci_dev *pdev;
 255
 256         /* Some devices are not connected over PCIe and thus do not negotiate
 257          * speed. These devices do not have valid bus info, and thus any report
 258          * we generate may not be correct.
 259          */
 260         if (hw->bus.type == ixgbe_bus_type_internal)
 261                 return;
 262
 263         /* determine whether to use the parent device */
 264         if (ixgbe_pcie_from_parent(&adapter->hw))
 265                 pdev = adapter->pdev->bus->parent->self;
 266         else
 267                 pdev = adapter->pdev;
 268
 269         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 270             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 271                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 272                 return;
 273         }
 274
 275         switch (speed) {
 276         case PCIE_SPEED_2_5GT:
 277                 /* 8b/10b encoding reduces max throughput by 20% */
 278                 max_gts = 2 * width;
 279                 break;
 280         case PCIE_SPEED_5_0GT:
 281                 /* 8b/10b encoding reduces max throughput by 20% */
 282                 max_gts = 4 * width;
 283                 break;
 284         case PCIE_SPEED_8_0GT:
 285                 /* 128b/130b encoding reduces throughput by less than 2% */
 286                 max_gts = 8 * width;
 287                 break;
 288         default:
 289                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 290                 return;
 291         }
 292
 293         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 294                    max_gts);
 295         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 296                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 297                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 298                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 299                     "Unknown"),
 300                    width,
 301                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 302                     speed == PCIE_SPEED_5_0GT ? "20%" :
 303                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 304                     "Unknown"));
 305
 306         if (max_gts < expected_gts) {
 307                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 308                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 309                         expected_gts);
 310                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 311         }
 312 }
 313
 314 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 315 {
 316         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 317             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 318             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 319                 schedule_work(&adapter->service_task);
 320 }
 321
 322 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 323 {
 324         struct ixgbe_adapter *adapter = hw->back;
 325
 326         if (!hw->hw_addr)
 327                 return;
 328         hw->hw_addr = NULL;
 329         e_dev_err("Adapter removed\n");
 330         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 331                 ixgbe_service_event_schedule(adapter);
 332 }
 333
 334 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 335 {
 336         u32 value;
 337
 338         /* The following check not only optimizes a bit by not
 339          * performing a read on the status register when the
 340          * register just read was a status register read that
 341          * returned IXGBE_FAILED_READ_REG. It also blocks any
 342          * potential recursion.
 343          */
 344         if (reg == IXGBE_STATUS) {
 345                 ixgbe_remove_adapter(hw);
 346                 return;
 347         }
 348         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 349         if (value == IXGBE_FAILED_READ_REG)
 350                 ixgbe_remove_adapter(hw);
 351 }
 352
 353 /**
 354  * ixgbe_read_reg - Read from device register
 355  * @hw: hw specific details
 356  * @reg: offset of register to read
 357  *
 358  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 359  *
 360  * This function is used to read device registers. It checks for device
 361  * removal by confirming any read that returns all ones by checking the
 362  * status register value for all ones. This function avoids reading from
 363  * the hardware if a removal was previously detected in which case it
 364  * returns IXGBE_FAILED_READ_REG (all ones).
 365  */
 366 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 367 {
 368         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 369         u32 value;
 370
 371         if (ixgbe_removed(reg_addr))
 372                 return IXGBE_FAILED_READ_REG;
 373         value = readl(reg_addr + reg);
 374         if (unlikely(value == IXGBE_FAILED_READ_REG))
 375                 ixgbe_check_remove(hw, reg);
 376         return value;
 377 }
 378
 379 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 380 {
 381         u16 value;
 382
 383         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 385                 ixgbe_remove_adapter(hw);
 386                 return true;
 387         }
 388         return false;
 389 }
 390
 391 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u16 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_WORD;
 398         pci_read_config_word(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_WORD;
 402         return value;
 403 }
 404
 405 #ifdef CONFIG_PCI_IOV
 406 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409         u32 value;
 410
 411         if (ixgbe_removed(hw->hw_addr))
 412                 return IXGBE_FAILED_READ_CFG_DWORD;
 413         pci_read_config_dword(adapter->pdev, reg, &value);
 414         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 415             ixgbe_check_cfg_remove(hw, adapter->pdev))
 416                 return IXGBE_FAILED_READ_CFG_DWORD;
 417         return value;
 418 }
 419 #endif /* CONFIG_PCI_IOV */
 420
 421 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 422 {
 423         struct ixgbe_adapter *adapter = hw->back;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return;
 427         pci_write_config_word(adapter->pdev, reg, value);
 428 }
 429
 430 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 431 {
 432         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 433
 434         /* flush memory to make sure state is correct before next watchdog */
 435         smp_mb__before_atomic();
 436         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 437 }
 438
 439 struct ixgbe_reg_info {
 440         u32 ofs;
 441         char *name;
 442 };
 443
 444 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 445
 446         /* General Registers */
 447         {IXGBE_CTRL, "CTRL"},
 448         {IXGBE_STATUS, "STATUS"},
 449         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 450
 451         /* Interrupt Registers */
 452         {IXGBE_EICR, "EICR"},
 453
 454         /* RX Registers */
 455         {IXGBE_SRRCTL(0), "SRRCTL"},
 456         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 457         {IXGBE_RDLEN(0), "RDLEN"},
 458         {IXGBE_RDH(0), "RDH"},
 459         {IXGBE_RDT(0), "RDT"},
 460         {IXGBE_RXDCTL(0), "RXDCTL"},
 461         {IXGBE_RDBAL(0), "RDBAL"},
 462         {IXGBE_RDBAH(0), "RDBAH"},
 463
 464         /* TX Registers */
 465         {IXGBE_TDBAL(0), "TDBAL"},
 466         {IXGBE_TDBAH(0), "TDBAH"},
 467         {IXGBE_TDLEN(0), "TDLEN"},
 468         {IXGBE_TDH(0), "TDH"},
 469         {IXGBE_TDT(0), "TDT"},
 470         {IXGBE_TXDCTL(0), "TXDCTL"},
 471
 472         /* List Terminator */
 473         { .name = NULL }
 474 };
 475
 476
 477 /*
 478  * ixgbe_regdump - register printout routine
 479  */
 480 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 481 {
 482         int i = 0, j = 0;
 483         char rname[16];
 484         u32 regs[64];
 485
 486         switch (reginfo->ofs) {
 487         case IXGBE_SRRCTL(0):
 488                 for (i = 0; i < 64; i++)
 489                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 490                 break;
 491         case IXGBE_DCA_RXCTRL(0):
 492                 for (i = 0; i < 64; i++)
 493                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 494                 break;
 495         case IXGBE_RDLEN(0):
 496                 for (i = 0; i < 64; i++)
 497                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 498                 break;
 499         case IXGBE_RDH(0):
 500                 for (i = 0; i < 64; i++)
 501                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 502                 break;
 503         case IXGBE_RDT(0):
 504                 for (i = 0; i < 64; i++)
 505                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 506                 break;
 507         case IXGBE_RXDCTL(0):
 508                 for (i = 0; i < 64; i++)
 509                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 510                 break;
 511         case IXGBE_RDBAL(0):
 512                 for (i = 0; i < 64; i++)
 513                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 514                 break;
 515         case IXGBE_RDBAH(0):
 516                 for (i = 0; i < 64; i++)
 517                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 518                 break;
 519         case IXGBE_TDBAL(0):
 520                 for (i = 0; i < 64; i++)
 521                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 522                 break;
 523         case IXGBE_TDBAH(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 526                 break;
 527         case IXGBE_TDLEN(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 530                 break;
 531         case IXGBE_TDH(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 534                 break;
 535         case IXGBE_TDT(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 538                 break;
 539         case IXGBE_TXDCTL(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 542                 break;
 543         default:
 544                 pr_info("%-15s %08x\n", reginfo->name,
 545                         IXGBE_READ_REG(hw, reginfo->ofs));
 546                 return;
 547         }
 548
 549         for (i = 0; i < 8; i++) {
 550                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 551                 pr_err("%-15s", rname);
 552                 for (j = 0; j < 8; j++)
 553                         pr_cont(" %08x", regs[i*8+j]);
 554                 pr_cont("\n");
 555         }
 556
 557 }
 558
 559 /*
 560  * ixgbe_dump - Print registers, tx-rings and rx-rings
 561  */
 562 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 563 {
 564         struct net_device *netdev = adapter->netdev;
 565         struct ixgbe_hw *hw = &adapter->hw;
 566         struct ixgbe_reg_info *reginfo;
 567         int n = 0;
 568         struct ixgbe_ring *tx_ring;
 569         struct ixgbe_tx_buffer *tx_buffer;
 570         union ixgbe_adv_tx_desc *tx_desc;
 571         struct my_u0 { u64 a; u64 b; } *u0;
 572         struct ixgbe_ring *rx_ring;
 573         union ixgbe_adv_rx_desc *rx_desc;
 574         struct ixgbe_rx_buffer *rx_buffer_info;
 575         u32 staterr;
 576         int i = 0;
 577
 578         if (!netif_msg_hw(adapter))
 579                 return;
 580
 581         /* Print netdevice Info */
 582         if (netdev) {
 583                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 584                 pr_info("Device Name     state            "
 585                         "trans_start      last_rx\n");
 586                 pr_info("%-15s %016lX %016lX %016lX\n",
 587                         netdev->name,
 588                         netdev->state,
 589                         netdev->trans_start,
 590                         netdev->last_rx);
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 tx_ring = adapter->tx_ring[n];
 611                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 612                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 613                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 614                            (u64)dma_unmap_addr(tx_buffer, dma),
 615                            dma_unmap_len(tx_buffer, len),
 616                            tx_buffer->next_to_watch,
 617                            (u64)tx_buffer->time_stamp);
 618         }
 619
 620         /* Print TX Rings */
 621         if (!netif_msg_tx_done(adapter))
 622                 goto rx_ring_summary;
 623
 624         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 625
 626         /* Transmit Descriptor Formats
 627          *
 628          * 82598 Advanced Transmit Descriptor
 629          *   +--------------------------------------------------------------+
 630          * 0 |         Buffer Address [63:0]                                |
 631          *   +--------------------------------------------------------------+
 632          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 633          *   +--------------------------------------------------------------+
 634          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 635          *
 636          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 637          *   +--------------------------------------------------------------+
 638          * 0 |                          RSV [63:0]                          |
 639          *   +--------------------------------------------------------------+
 640          * 8 |            RSV           |  STA  |          NXTSEQ           |
 641          *   +--------------------------------------------------------------+
 642          *   63                       36 35   32 31                         0
 643          *
 644          * 82599+ Advanced Transmit Descriptor
 645          *   +--------------------------------------------------------------+
 646          * 0 |         Buffer Address [63:0]                                |
 647          *   +--------------------------------------------------------------+
 648          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 649          *   +--------------------------------------------------------------+
 650          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 651          *
 652          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 653          *   +--------------------------------------------------------------+
 654          * 0 |                          RSV [63:0]                          |
 655          *   +--------------------------------------------------------------+
 656          * 8 |            RSV           |  STA  |           RSV             |
 657          *   +--------------------------------------------------------------+
 658          *   63                       36 35   32 31                         0
 659          */
 660
 661         for (n = 0; n < adapter->num_tx_queues; n++) {
 662                 tx_ring = adapter->tx_ring[n];
 663                 pr_info("------------------------------------\n");
 664                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 665                 pr_info("------------------------------------\n");
 666                 pr_info("%s%s    %s              %s        %s          %s\n",
 667                         "T [desc]     [address 63:0  ] ",
 668                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 669                         "leng", "ntw", "timestamp", "bi->skb");
 670
 671                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 672                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 673                         tx_buffer = &tx_ring->tx_buffer_info[i];
 674                         u0 = (struct my_u0 *)tx_desc;
 675                         if (dma_unmap_len(tx_buffer, len) > 0) {
 676                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 677                                         i,
 678                                         le64_to_cpu(u0->a),
 679                                         le64_to_cpu(u0->b),
 680                                         (u64)dma_unmap_addr(tx_buffer, dma),
 681                                         dma_unmap_len(tx_buffer, len),
 682                                         tx_buffer->next_to_watch,
 683                                         (u64)tx_buffer->time_stamp,
 684                                         tx_buffer->skb);
 685                                 if (i == tx_ring->next_to_use &&
 686                                         i == tx_ring->next_to_clean)
 687                                         pr_cont(" NTC/U\n");
 688                                 else if (i == tx_ring->next_to_use)
 689                                         pr_cont(" NTU\n");
 690                                 else if (i == tx_ring->next_to_clean)
 691                                         pr_cont(" NTC\n");
 692                                 else
 693                                         pr_cont("\n");
 694
 695                                 if (netif_msg_pktdata(adapter) &&
 696                                     tx_buffer->skb)
 697                                         print_hex_dump(KERN_INFO, "",
 698                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 699                                                 tx_buffer->skb->data,
 700                                                 dma_unmap_len(tx_buffer, len),
 701                                                 true);
 702                         }
 703                 }
 704         }
 705
 706         /* Print RX Rings Summary */
 707 rx_ring_summary:
 708         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 709         pr_info("Queue [NTU] [NTC]\n");
 710         for (n = 0; n < adapter->num_rx_queues; n++) {
 711                 rx_ring = adapter->rx_ring[n];
 712                 pr_info("%5d %5X %5X\n",
 713                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 714         }
 715
 716         /* Print RX Rings */
 717         if (!netif_msg_rx_status(adapter))
 718                 return;
 719
 720         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 721
 722         /* Receive Descriptor Formats
 723          *
 724          * 82598 Advanced Receive Descriptor (Read) Format
 725          *    63                                           1        0
 726          *    +-----------------------------------------------------+
 727          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 728          *    +----------------------------------------------+------+
 729          *  8 |       Header Buffer Address [63:1]           |  DD  |
 730          *    +-----------------------------------------------------+
 731          *
 732          *
 733          * 82598 Advanced Receive Descriptor (Write-Back) Format
 734          *
 735          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 736          *   +------------------------------------------------------+
 737          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 738          *   | Packet   | IP     |   |          |     | Type | Type |
 739          *   | Checksum | Ident  |   |          |     |      |      |
 740          *   +------------------------------------------------------+
 741          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 742          *   +------------------------------------------------------+
 743          *   63       48 47    32 31            20 19               0
 744          *
 745          * 82599+ Advanced Receive Descriptor (Read) Format
 746          *    63                                           1        0
 747          *    +-----------------------------------------------------+
 748          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 749          *    +----------------------------------------------+------+
 750          *  8 |       Header Buffer Address [63:1]           |  DD  |
 751          *    +-----------------------------------------------------+
 752          *
 753          *
 754          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 755          *
 756          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 757          *   +------------------------------------------------------+
 758          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 759          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 760          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 761          *   +------------------------------------------------------+
 762          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 763          *   +------------------------------------------------------+
 764          *   63       48 47    32 31          20 19                 0
 765          */
 766
 767         for (n = 0; n < adapter->num_rx_queues; n++) {
 768                 rx_ring = adapter->rx_ring[n];
 769                 pr_info("------------------------------------\n");
 770                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 771                 pr_info("------------------------------------\n");
 772                 pr_info("%s%s%s",
 773                         "R  [desc]      [ PktBuf     A0] ",
 774                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 775                         "<-- Adv Rx Read format\n");
 776                 pr_info("%s%s%s",
 777                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 778                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 779                         "<-- Adv Rx Write-Back format\n");
 780
 781                 for (i = 0; i < rx_ring->count; i++) {
 782                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 783                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 784                         u0 = (struct my_u0 *)rx_desc;
 785                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 786                         if (staterr & IXGBE_RXD_STAT_DD) {
 787                                 /* Descriptor Done */
 788                                 pr_info("RWB[0x%03X]     %016llX "
 789                                         "%016llX ---------------- %p", i,
 790                                         le64_to_cpu(u0->a),
 791                                         le64_to_cpu(u0->b),
 792                                         rx_buffer_info->skb);
 793                         } else {
 794                                 pr_info("R  [0x%03X]     %016llX "
 795                                         "%016llX %016llX %p", i,
 796                                         le64_to_cpu(u0->a),
 797                                         le64_to_cpu(u0->b),
 798                                         (u64)rx_buffer_info->dma,
 799                                         rx_buffer_info->skb);
 800
 801                                 if (netif_msg_pktdata(adapter) &&
 802                                     rx_buffer_info->dma) {
 803                                         print_hex_dump(KERN_INFO, "",
 804                                            DUMP_PREFIX_ADDRESS, 16, 1,
 805                                            page_address(rx_buffer_info->page) +
 806                                                     rx_buffer_info->page_offset,
 807                                            ixgbe_rx_bufsz(rx_ring), true);
 808                                 }
 809                         }
 810
 811                         if (i == rx_ring->next_to_use)
 812                                 pr_cont(" NTU\n");
 813                         else if (i == rx_ring->next_to_clean)
 814                                 pr_cont(" NTC\n");
 815                         else
 816                                 pr_cont("\n");
 817
 818                 }
 819         }
 820 }
 821
 822 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 823 {
 824         u32 ctrl_ext;
 825
 826         /* Let firmware take over control of h/w */
 827         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 828         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 829                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 830 }
 831
 832 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 833 {
 834         u32 ctrl_ext;
 835
 836         /* Let firmware know the driver has taken over */
 837         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 838         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 839                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 840 }
 841
 842 /**
 843  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 844  * @adapter: pointer to adapter struct
 845  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 846  * @queue: queue to map the corresponding interrupt to
 847  * @msix_vector: the vector to map to the corresponding queue
 848  *
 849  */
 850 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 851                            u8 queue, u8 msix_vector)
 852 {
 853         u32 ivar, index;
 854         struct ixgbe_hw *hw = &adapter->hw;
 855         switch (hw->mac.type) {
 856         case ixgbe_mac_82598EB:
 857                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 858                 if (direction == -1)
 859                         direction = 0;
 860                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 861                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 862                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 863                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 864                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 865                 break;
 866         case ixgbe_mac_82599EB:
 867         case ixgbe_mac_X540:
 868         case ixgbe_mac_X550:
 869         case ixgbe_mac_X550EM_x:
 870                 if (direction == -1) {
 871                         /* other causes */
 872                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 873                         index = ((queue & 1) * 8);
 874                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 875                         ivar &= ~(0xFF << index);
 876                         ivar |= (msix_vector << index);
 877                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 878                         break;
 879                 } else {
 880                         /* tx or rx causes */
 881                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 882                         index = ((16 * (queue & 1)) + (8 * direction));
 883                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 884                         ivar &= ~(0xFF << index);
 885                         ivar |= (msix_vector << index);
 886                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 887                         break;
 888                 }
 889         default:
 890                 break;
 891         }
 892 }
 893
 894 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 895                                           u64 qmask)
 896 {
 897         u32 mask;
 898
 899         switch (adapter->hw.mac.type) {
 900         case ixgbe_mac_82598EB:
 901                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 902                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 903                 break;
 904         case ixgbe_mac_82599EB:
 905         case ixgbe_mac_X540:
 906         case ixgbe_mac_X550:
 907         case ixgbe_mac_X550EM_x:
 908                 mask = (qmask & 0xFFFFFFFF);
 909                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 910                 mask = (qmask >> 32);
 911                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 912                 break;
 913         default:
 914                 break;
 915         }
 916 }
 917
 918 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 919                                       struct ixgbe_tx_buffer *tx_buffer)
 920 {
 921         if (tx_buffer->skb) {
 922                 dev_kfree_skb_any(tx_buffer->skb);
 923                 if (dma_unmap_len(tx_buffer, len))
 924                         dma_unmap_single(ring->dev,
 925                                          dma_unmap_addr(tx_buffer, dma),
 926                                          dma_unmap_len(tx_buffer, len),
 927                                          DMA_TO_DEVICE);
 928         } else if (dma_unmap_len(tx_buffer, len)) {
 929                 dma_unmap_page(ring->dev,
 930                                dma_unmap_addr(tx_buffer, dma),
 931                                dma_unmap_len(tx_buffer, len),
 932                                DMA_TO_DEVICE);
 933         }
 934         tx_buffer->next_to_watch = NULL;
 935         tx_buffer->skb = NULL;
 936         dma_unmap_len_set(tx_buffer, len, 0);
 937         /* tx_buffer must be completely set up in the transmit path */
 938 }
 939
 940 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 941 {
 942         struct ixgbe_hw *hw = &adapter->hw;
 943         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 944         int i;
 945         u32 data;
 946
 947         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 948             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 949                 return;
 950
 951         switch (hw->mac.type) {
 952         case ixgbe_mac_82598EB:
 953                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 954                 break;
 955         default:
 956                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 957         }
 958         hwstats->lxoffrxc += data;
 959
 960         /* refill credits (no tx hang) if we received xoff */
 961         if (!data)
 962                 return;
 963
 964         for (i = 0; i < adapter->num_tx_queues; i++)
 965                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 966                           &adapter->tx_ring[i]->state);
 967 }
 968
 969 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 970 {
 971         struct ixgbe_hw *hw = &adapter->hw;
 972         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 973         u32 xoff[8] = {0};
 974         u8 tc;
 975         int i;
 976         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 977
 978         if (adapter->ixgbe_ieee_pfc)
 979                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 980
 981         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 982                 ixgbe_update_xoff_rx_lfc(adapter);
 983                 return;
 984         }
 985
 986         /* update stats for each tc, only valid with PFC enabled */
 987         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 988                 u32 pxoffrxc;
 989
 990                 switch (hw->mac.type) {
 991                 case ixgbe_mac_82598EB:
 992                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 993                         break;
 994                 default:
 995                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 996                 }
 997                 hwstats->pxoffrxc[i] += pxoffrxc;
 998                 /* Get the TC for given UP */
 999                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1000                 xoff[tc] += pxoffrxc;
1001         }
1002
1003         /* disarm tx queues that have received xoff frames */
1004         for (i = 0; i < adapter->num_tx_queues; i++) {
1005                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1006
1007                 tc = tx_ring->dcb_tc;
1008                 if (xoff[tc])
1009                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1010         }
1011 }
1012
1013 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1014 {
1015         return ring->stats.packets;
1016 }
1017
1018 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1019 {
1020         struct ixgbe_adapter *adapter;
1021         struct ixgbe_hw *hw;
1022         u32 head, tail;
1023
1024         if (ring->l2_accel_priv)
1025                 adapter = ring->l2_accel_priv->real_adapter;
1026         else
1027                 adapter = netdev_priv(ring->netdev);
1028
1029         hw = &adapter->hw;
1030         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1031         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1032
1033         if (head != tail)
1034                 return (head < tail) ?
1035                         tail - head : (tail + ring->count - head);
1036
1037         return 0;
1038 }
1039
1040 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1041 {
1042         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1043         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1044         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1045
1046         clear_check_for_tx_hang(tx_ring);
1047
1048         /*
1049          * Check for a hung queue, but be thorough. This verifies
1050          * that a transmit has been completed since the previous
1051          * check AND there is at least one packet pending. The
1052          * ARMED bit is set to indicate a potential hang. The
1053          * bit is cleared if a pause frame is received to remove
1054          * false hang detection due to PFC or 802.3x frames. By
1055          * requiring this to fail twice we avoid races with
1056          * pfc clearing the ARMED bit and conditions where we
1057          * run the check_tx_hang logic with a transmit completion
1058          * pending but without time to complete it yet.
1059          */
1060         if (tx_done_old == tx_done && tx_pending)
1061                 /* make sure it is true for two checks in a row */
1062                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1063                                         &tx_ring->state);
1064         /* update completed stats and continue */
1065         tx_ring->tx_stats.tx_done_old = tx_done;
1066         /* reset the countdown */
1067         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1068
1069         return false;
1070 }
1071
1072 /**
1073  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1074  * @adapter: driver private struct
1075  **/
1076 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1077 {
1078
1079         /* Do the reset outside of interrupt context */
1080         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1081                 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1082                 e_warn(drv, "initiating reset due to tx timeout\n");
1083                 ixgbe_service_event_schedule(adapter);
1084         }
1085 }
1086
1087 /**
1088  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1089  * @q_vector: structure containing interrupt and ring information
1090  * @tx_ring: tx ring to clean
1091  **/
1092 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1093                                struct ixgbe_ring *tx_ring)
1094 {
1095         struct ixgbe_adapter *adapter = q_vector->adapter;
1096         struct ixgbe_tx_buffer *tx_buffer;
1097         union ixgbe_adv_tx_desc *tx_desc;
1098         unsigned int total_bytes = 0, total_packets = 0;
1099         unsigned int budget = q_vector->tx.work_limit;
1100         unsigned int i = tx_ring->next_to_clean;
1101
1102         if (test_bit(__IXGBE_DOWN, &adapter->state))
1103                 return true;
1104
1105         tx_buffer = &tx_ring->tx_buffer_info[i];
1106         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1107         i -= tx_ring->count;
1108
1109         do {
1110                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1111
1112                 /* if next_to_watch is not set then there is no work pending */
1113                 if (!eop_desc)
1114                         break;
1115
1116                 /* prevent any other reads prior to eop_desc */
1117                 read_barrier_depends();
1118
1119                 /* if DD is not set pending work has not been completed */
1120                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1121                         break;
1122
1123                 /* clear next_to_watch to prevent false hangs */
1124                 tx_buffer->next_to_watch = NULL;
1125
1126                 /* update the statistics for this packet */
1127                 total_bytes += tx_buffer->bytecount;
1128                 total_packets += tx_buffer->gso_segs;
1129
1130                 /* free the skb */
1131                 dev_consume_skb_any(tx_buffer->skb);
1132
1133                 /* unmap skb header data */
1134                 dma_unmap_single(tx_ring->dev,
1135                                  dma_unmap_addr(tx_buffer, dma),
1136                                  dma_unmap_len(tx_buffer, len),
1137                                  DMA_TO_DEVICE);
1138
1139                 /* clear tx_buffer data */
1140                 tx_buffer->skb = NULL;
1141                 dma_unmap_len_set(tx_buffer, len, 0);
1142
1143                 /* unmap remaining buffers */
1144                 while (tx_desc != eop_desc) {
1145                         tx_buffer++;
1146                         tx_desc++;
1147                         i++;
1148                         if (unlikely(!i)) {
1149                                 i -= tx_ring->count;
1150                                 tx_buffer = tx_ring->tx_buffer_info;
1151                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1152                         }
1153
1154                         /* unmap any remaining paged data */
1155                         if (dma_unmap_len(tx_buffer, len)) {
1156                                 dma_unmap_page(tx_ring->dev,
1157                                                dma_unmap_addr(tx_buffer, dma),
1158                                                dma_unmap_len(tx_buffer, len),
1159                                                DMA_TO_DEVICE);
1160                                 dma_unmap_len_set(tx_buffer, len, 0);
1161                         }
1162                 }
1163
1164                 /* move us one more past the eop_desc for start of next pkt */
1165                 tx_buffer++;
1166                 tx_desc++;
1167                 i++;
1168                 if (unlikely(!i)) {
1169                         i -= tx_ring->count;
1170                         tx_buffer = tx_ring->tx_buffer_info;
1171                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1172                 }
1173
1174                 /* issue prefetch for next Tx descriptor */
1175                 prefetch(tx_desc);
1176
1177                 /* update budget accounting */
1178                 budget--;
1179         } while (likely(budget));
1180
1181         i += tx_ring->count;
1182         tx_ring->next_to_clean = i;
1183         u64_stats_update_begin(&tx_ring->syncp);
1184         tx_ring->stats.bytes += total_bytes;
1185         tx_ring->stats.packets += total_packets;
1186         u64_stats_update_end(&tx_ring->syncp);
1187         q_vector->tx.total_bytes += total_bytes;
1188         q_vector->tx.total_packets += total_packets;
1189
1190         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1191                 /* schedule immediate reset if we believe we hung */
1192                 struct ixgbe_hw *hw = &adapter->hw;
1193                 e_err(drv, "Detected Tx Unit Hang\n"
1194                         "  Tx Queue             <%d>\n"
1195                         "  TDH, TDT             <%x>, <%x>\n"
1196                         "  next_to_use          <%x>\n"
1197                         "  next_to_clean        <%x>\n"
1198                         "tx_buffer_info[next_to_clean]\n"
1199                         "  time_stamp           <%lx>\n"
1200                         "  jiffies              <%lx>\n",
1201                         tx_ring->queue_index,
1202                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1203                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1204                         tx_ring->next_to_use, i,
1205                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1206
1207                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1208
1209                 e_info(probe,
1210                        "tx hang %d detected on queue %d, resetting adapter\n",
1211                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1212
1213                 /* schedule immediate reset if we believe we hung */
1214                 ixgbe_tx_timeout_reset(adapter);
1215
1216                 /* the adapter is about to reset, no point in enabling stuff */
1217                 return true;
1218         }
1219
1220         netdev_tx_completed_queue(txring_txq(tx_ring),
1221                                   total_packets, total_bytes);
1222
1223 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1224         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1225                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1226                 /* Make sure that anybody stopping the queue after this
1227                  * sees the new next_to_clean.
1228                  */
1229                 smp_mb();
1230                 if (__netif_subqueue_stopped(tx_ring->netdev,
1231                                              tx_ring->queue_index)
1232                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1233                         netif_wake_subqueue(tx_ring->netdev,
1234                                             tx_ring->queue_index);
1235                         ++tx_ring->tx_stats.restart_queue;
1236                 }
1237         }
1238
1239         return !!budget;
1240 }
1241
1242 #ifdef CONFIG_IXGBE_DCA
1243 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1244                                 struct ixgbe_ring *tx_ring,
1245                                 int cpu)
1246 {
1247         struct ixgbe_hw *hw = &adapter->hw;
1248         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1249         u16 reg_offset;
1250
1251         switch (hw->mac.type) {
1252         case ixgbe_mac_82598EB:
1253                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1254                 break;
1255         case ixgbe_mac_82599EB:
1256         case ixgbe_mac_X540:
1257                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1258                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1259                 break;
1260         default:
1261                 /* for unknown hardware do not write register */
1262                 return;
1263         }
1264
1265         /*
1266          * We can enable relaxed ordering for reads, but not writes when
1267          * DCA is enabled.  This is due to a known issue in some chipsets
1268          * which will cause the DCA tag to be cleared.
1269          */
1270         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1271                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1272                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1273
1274         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1275 }
1276
1277 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1278                                 struct ixgbe_ring *rx_ring,
1279                                 int cpu)
1280 {
1281         struct ixgbe_hw *hw = &adapter->hw;
1282         u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1283         u8 reg_idx = rx_ring->reg_idx;
1284
1285
1286         switch (hw->mac.type) {
1287         case ixgbe_mac_82599EB:
1288         case ixgbe_mac_X540:
1289                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1290                 break;
1291         default:
1292                 break;
1293         }
1294
1295         /*
1296          * We can enable relaxed ordering for reads, but not writes when
1297          * DCA is enabled.  This is due to a known issue in some chipsets
1298          * which will cause the DCA tag to be cleared.
1299          */
1300         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1301                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1302
1303         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1304 }
1305
1306 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1307 {
1308         struct ixgbe_adapter *adapter = q_vector->adapter;
1309         struct ixgbe_ring *ring;
1310         int cpu = get_cpu();
1311
1312         if (q_vector->cpu == cpu)
1313                 goto out_no_update;
1314
1315         ixgbe_for_each_ring(ring, q_vector->tx)
1316                 ixgbe_update_tx_dca(adapter, ring, cpu);
1317
1318         ixgbe_for_each_ring(ring, q_vector->rx)
1319                 ixgbe_update_rx_dca(adapter, ring, cpu);
1320
1321         q_vector->cpu = cpu;
1322 out_no_update:
1323         put_cpu();
1324 }
1325
1326 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1327 {
1328         int i;
1329
1330         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1331                 return;
1332
1333         /* always use CB2 mode, difference is masked in the CB driver */
1334         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1335
1336         for (i = 0; i < adapter->num_q_vectors; i++) {
1337                 adapter->q_vector[i]->cpu = -1;
1338                 ixgbe_update_dca(adapter->q_vector[i]);
1339         }
1340 }
1341
1342 static int __ixgbe_notify_dca(struct device *dev, void *data)
1343 {
1344         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1345         unsigned long event = *(unsigned long *)data;
1346
1347         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1348                 return 0;
1349
1350         switch (event) {
1351         case DCA_PROVIDER_ADD:
1352                 /* if we're already enabled, don't do it again */
1353                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1354                         break;
1355                 if (dca_add_requester(dev) == 0) {
1356                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1357                         ixgbe_setup_dca(adapter);
1358                         break;
1359                 }
1360                 /* Fall Through since DCA is disabled. */
1361         case DCA_PROVIDER_REMOVE:
1362                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1363                         dca_remove_requester(dev);
1364                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1365                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1366                 }
1367                 break;
1368         }
1369
1370         return 0;
1371 }
1372
1373 #endif /* CONFIG_IXGBE_DCA */
1374
1375 #define IXGBE_RSS_L4_TYPES_MASK \
1376         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1377          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1378          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1379          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1380
1381 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1382                                  union ixgbe_adv_rx_desc *rx_desc,
1383                                  struct sk_buff *skb)
1384 {
1385         u16 rss_type;
1386
1387         if (!(ring->netdev->features & NETIF_F_RXHASH))
1388                 return;
1389
1390         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1391                    IXGBE_RXDADV_RSSTYPE_MASK;
1392
1393         if (!rss_type)
1394                 return;
1395
1396         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1397                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1398                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1399 }
1400
1401 #ifdef IXGBE_FCOE
1402 /**
1403  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1404  * @ring: structure containing ring specific data
1405  * @rx_desc: advanced rx descriptor
1406  *
1407  * Returns : true if it is FCoE pkt
1408  */
1409 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1410                                     union ixgbe_adv_rx_desc *rx_desc)
1411 {
1412         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1413
1414         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1415                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1416                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1417                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1418 }
1419
1420 #endif /* IXGBE_FCOE */
1421 /**
1422  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1423  * @ring: structure containing ring specific data
1424  * @rx_desc: current Rx descriptor being processed
1425  * @skb: skb currently being received and modified
1426  **/
1427 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1428                                      union ixgbe_adv_rx_desc *rx_desc,
1429                                      struct sk_buff *skb)
1430 {
1431         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1432         __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1433         bool encap_pkt = false;
1434
1435         skb_checksum_none_assert(skb);
1436
1437         /* Rx csum disabled */
1438         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1439                 return;
1440
1441         if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1442             (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1443                 encap_pkt = true;
1444                 skb->encapsulation = 1;
1445         }
1446
1447         /* if IP and error */
1448         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1449             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1450                 ring->rx_stats.csum_err++;
1451                 return;
1452         }
1453
1454         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1455                 return;
1456
1457         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1458                 /*
1459                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1460                  * checksum errors.
1461                  */
1462                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1463                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1464                         return;
1465
1466                 ring->rx_stats.csum_err++;
1467                 return;
1468         }
1469
1470         /* It must be a TCP or UDP packet with a valid checksum */
1471         skb->ip_summed = CHECKSUM_UNNECESSARY;
1472         if (encap_pkt) {
1473                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1474                         return;
1475
1476                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1477                         ring->rx_stats.csum_err++;
1478                         return;
1479                 }
1480                 /* If we checked the outer header let the stack know */
1481                 skb->csum_level = 1;
1482         }
1483 }
1484
1485 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1486                                     struct ixgbe_rx_buffer *bi)
1487 {
1488         struct page *page = bi->page;
1489         dma_addr_t dma;
1490
1491         /* since we are recycling buffers we should seldom need to alloc */
1492         if (likely(page))
1493                 return true;
1494
1495         /* alloc new page for storage */
1496         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1497         if (unlikely(!page)) {
1498                 rx_ring->rx_stats.alloc_rx_page_failed++;
1499                 return false;
1500         }
1501
1502         /* map page for use */
1503         dma = dma_map_page(rx_ring->dev, page, 0,
1504                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1505
1506         /*
1507          * if mapping failed free memory back to system since
1508          * there isn't much point in holding memory we can't use
1509          */
1510         if (dma_mapping_error(rx_ring->dev, dma)) {
1511                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1512
1513                 rx_ring->rx_stats.alloc_rx_page_failed++;
1514                 return false;
1515         }
1516
1517         bi->dma = dma;
1518         bi->page = page;
1519         bi->page_offset = 0;
1520
1521         return true;
1522 }
1523
1524 /**
1525  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1526  * @rx_ring: ring to place buffers on
1527  * @cleaned_count: number of buffers to replace
1528  **/
1529 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1530 {
1531         union ixgbe_adv_rx_desc *rx_desc;
1532         struct ixgbe_rx_buffer *bi;
1533         u16 i = rx_ring->next_to_use;
1534
1535         /* nothing to do */
1536         if (!cleaned_count)
1537                 return;
1538
1539         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1540         bi = &rx_ring->rx_buffer_info[i];
1541         i -= rx_ring->count;
1542
1543         do {
1544                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1545                         break;
1546
1547                 /*
1548                  * Refresh the desc even if buffer_addrs didn't change
1549                  * because each write-back erases this info.
1550                  */
1551                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1552
1553                 rx_desc++;
1554                 bi++;
1555                 i++;
1556                 if (unlikely(!i)) {
1557                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1558                         bi = rx_ring->rx_buffer_info;
1559                         i -= rx_ring->count;
1560                 }
1561
1562                 /* clear the status bits for the next_to_use descriptor */
1563                 rx_desc->wb.upper.status_error = 0;
1564
1565                 cleaned_count--;
1566         } while (cleaned_count);
1567
1568         i += rx_ring->count;
1569
1570         if (rx_ring->next_to_use != i) {
1571                 rx_ring->next_to_use = i;
1572
1573                 /* update next to alloc since we have filled the ring */
1574                 rx_ring->next_to_alloc = i;
1575
1576                 /* Force memory writes to complete before letting h/w
1577                  * know there are new descriptors to fetch.  (Only
1578                  * applicable for weak-ordered memory model archs,
1579                  * such as IA-64).
1580                  */
1581                 wmb();
1582                 writel(i, rx_ring->tail);
1583         }
1584 }
1585
1586 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1587                                    struct sk_buff *skb)
1588 {
1589         u16 hdr_len = skb_headlen(skb);
1590
1591         /* set gso_size to avoid messing up TCP MSS */
1592         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1593                                                  IXGBE_CB(skb)->append_cnt);
1594         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1595 }
1596
1597 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1598                                    struct sk_buff *skb)
1599 {
1600         /* if append_cnt is 0 then frame is not RSC */
1601         if (!IXGBE_CB(skb)->append_cnt)
1602                 return;
1603
1604         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1605         rx_ring->rx_stats.rsc_flush++;
1606
1607         ixgbe_set_rsc_gso_size(rx_ring, skb);
1608
1609         /* gso_size is computed using append_cnt so always clear it last */
1610         IXGBE_CB(skb)->append_cnt = 0;
1611 }
1612
1613 /**
1614  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1615  * @rx_ring: rx descriptor ring packet is being transacted on
1616  * @rx_desc: pointer to the EOP Rx descriptor
1617  * @skb: pointer to current skb being populated
1618  *
1619  * This function checks the ring, descriptor, and packet information in
1620  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1621  * other fields within the skb.
1622  **/
1623 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1624                                      union ixgbe_adv_rx_desc *rx_desc,
1625                                      struct sk_buff *skb)
1626 {
1627         struct net_device *dev = rx_ring->netdev;
1628
1629         ixgbe_update_rsc_stats(rx_ring, skb);
1630
1631         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1632
1633         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1634
1635         if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1636                 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1637
1638         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1639             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1640                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1641                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1642         }
1643
1644         skb_record_rx_queue(skb, rx_ring->queue_index);
1645
1646         skb->protocol = eth_type_trans(skb, dev);
1647 }
1648
1649 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1650                          struct sk_buff *skb)
1651 {
1652         if (ixgbe_qv_busy_polling(q_vector))
1653                 netif_receive_skb(skb);
1654         else
1655                 napi_gro_receive(&q_vector->napi, skb);
1656 }
1657
1658 /**
1659  * ixgbe_is_non_eop - process handling of non-EOP buffers
1660  * @rx_ring: Rx ring being processed
1661  * @rx_desc: Rx descriptor for current buffer
1662  * @skb: Current socket buffer containing buffer in progress
1663  *
1664  * This function updates next to clean.  If the buffer is an EOP buffer
1665  * this function exits returning false, otherwise it will place the
1666  * sk_buff in the next buffer to be chained and return true indicating
1667  * that this is in fact a non-EOP buffer.
1668  **/
1669 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1670                              union ixgbe_adv_rx_desc *rx_desc,
1671                              struct sk_buff *skb)
1672 {
1673         u32 ntc = rx_ring->next_to_clean + 1;
1674
1675         /* fetch, update, and store next to clean */
1676         ntc = (ntc < rx_ring->count) ? ntc : 0;
1677         rx_ring->next_to_clean = ntc;
1678
1679         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1680
1681         /* update RSC append count if present */
1682         if (ring_is_rsc_enabled(rx_ring)) {
1683                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1684                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1685
1686                 if (unlikely(rsc_enabled)) {
1687                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1688
1689                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1690                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1691
1692                         /* update ntc based on RSC value */
1693                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1694                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1695                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1696                 }
1697         }
1698
1699         /* if we are the last buffer then there is nothing else to do */
1700         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1701                 return false;
1702
1703         /* place skb in next buffer to be received */
1704         rx_ring->rx_buffer_info[ntc].skb = skb;
1705         rx_ring->rx_stats.non_eop_descs++;
1706
1707         return true;
1708 }
1709
1710 /**
1711  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1712  * @rx_ring: rx descriptor ring packet is being transacted on
1713  * @skb: pointer to current skb being adjusted
1714  *
1715  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1716  * main difference between this version and the original function is that
1717  * this function can make several assumptions about the state of things
1718  * that allow for significant optimizations versus the standard function.
1719  * As a result we can do things like drop a frag and maintain an accurate
1720  * truesize for the skb.
1721  */
1722 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1723                             struct sk_buff *skb)
1724 {
1725         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1726         unsigned char *va;
1727         unsigned int pull_len;
1728
1729         /*
1730          * it is valid to use page_address instead of kmap since we are
1731          * working with pages allocated out of the lomem pool per
1732          * alloc_page(GFP_ATOMIC)
1733          */
1734         va = skb_frag_address(frag);
1735
1736         /*
1737          * we need the header to contain the greater of either ETH_HLEN or
1738          * 60 bytes if the skb->len is less than 60 for skb_pad.
1739          */
1740         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1741
1742         /* align pull length to size of long to optimize memcpy performance */
1743         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1744
1745         /* update all of the pointers */
1746         skb_frag_size_sub(frag, pull_len);
1747         frag->page_offset += pull_len;
1748         skb->data_len -= pull_len;
1749         skb->tail += pull_len;
1750 }
1751
1752 /**
1753  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1754  * @rx_ring: rx descriptor ring packet is being transacted on
1755  * @skb: pointer to current skb being updated
1756  *
1757  * This function provides a basic DMA sync up for the first fragment of an
1758  * skb.  The reason for doing this is that the first fragment cannot be
1759  * unmapped until we have reached the end of packet descriptor for a buffer
1760  * chain.
1761  */
1762 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1763                                 struct sk_buff *skb)
1764 {
1765         /* if the page was released unmap it, else just sync our portion */
1766         if (unlikely(IXGBE_CB(skb)->page_released)) {
1767                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1768                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1769                 IXGBE_CB(skb)->page_released = false;
1770         } else {
1771                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1772
1773                 dma_sync_single_range_for_cpu(rx_ring->dev,
1774                                               IXGBE_CB(skb)->dma,
1775                                               frag->page_offset,
1776                                               ixgbe_rx_bufsz(rx_ring),
1777                                               DMA_FROM_DEVICE);
1778         }
1779         IXGBE_CB(skb)->dma = 0;
1780 }
1781
1782 /**
1783  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1784  * @rx_ring: rx descriptor ring packet is being transacted on
1785  * @rx_desc: pointer to the EOP Rx descriptor
1786  * @skb: pointer to current skb being fixed
1787  *
1788  * Check for corrupted packet headers caused by senders on the local L2
1789  * embedded NIC switch not setting up their Tx Descriptors right.  These
1790  * should be very rare.
1791  *
1792  * Also address the case where we are pulling data in on pages only
1793  * and as such no data is present in the skb header.
1794  *
1795  * In addition if skb is not at least 60 bytes we need to pad it so that
1796  * it is large enough to qualify as a valid Ethernet frame.
1797  *
1798  * Returns true if an error was encountered and skb was freed.
1799  **/
1800 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1801                                   union ixgbe_adv_rx_desc *rx_desc,
1802                                   struct sk_buff *skb)
1803 {
1804         struct net_device *netdev = rx_ring->netdev;
1805
1806         /* verify that the packet does not have any known errors */
1807         if (unlikely(ixgbe_test_staterr(rx_desc,
1808                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1809             !(netdev->features & NETIF_F_RXALL))) {
1810                 dev_kfree_skb_any(skb);
1811                 return true;
1812         }
1813
1814         /* place header in linear portion of buffer */
1815         if (skb_is_nonlinear(skb))
1816                 ixgbe_pull_tail(rx_ring, skb);
1817
1818 #ifdef IXGBE_FCOE
1819         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1820         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1821                 return false;
1822
1823 #endif
1824         /* if eth_skb_pad returns an error the skb was freed */
1825         if (eth_skb_pad(skb))
1826                 return true;
1827
1828         return false;
1829 }
1830
1831 /**
1832  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1833  * @rx_ring: rx descriptor ring to store buffers on
1834  * @old_buff: donor buffer to have page reused
1835  *
1836  * Synchronizes page for reuse by the adapter
1837  **/
1838 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1839                                 struct ixgbe_rx_buffer *old_buff)
1840 {
1841         struct ixgbe_rx_buffer *new_buff;
1842         u16 nta = rx_ring->next_to_alloc;
1843
1844         new_buff = &rx_ring->rx_buffer_info[nta];
1845
1846         /* update, and store next to alloc */
1847         nta++;
1848         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1849
1850         /* transfer page from old buffer to new buffer */
1851         *new_buff = *old_buff;
1852
1853         /* sync the buffer for use by the device */
1854         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1855                                          new_buff->page_offset,
1856                                          ixgbe_rx_bufsz(rx_ring),
1857                                          DMA_FROM_DEVICE);
1858 }
1859
1860 static inline bool ixgbe_page_is_reserved(struct page *page)
1861 {
1862         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1863 }
1864
1865 /**
1866  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1867  * @rx_ring: rx descriptor ring to transact packets on
1868  * @rx_buffer: buffer containing page to add
1869  * @rx_desc: descriptor containing length of buffer written by hardware
1870  * @skb: sk_buff to place the data into
1871  *
1872  * This function will add the data contained in rx_buffer->page to the skb.
1873  * This is done either through a direct copy if the data in the buffer is
1874  * less than the skb header size, otherwise it will just attach the page as
1875  * a frag to the skb.
1876  *
1877  * The function will then update the page offset if necessary and return
1878  * true if the buffer can be reused by the adapter.
1879  **/
1880 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1881                               struct ixgbe_rx_buffer *rx_buffer,
1882                               union ixgbe_adv_rx_desc *rx_desc,
1883                               struct sk_buff *skb)
1884 {
1885         struct page *page = rx_buffer->page;
1886         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1887 #if (PAGE_SIZE < 8192)
1888         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1889 #else
1890         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1891         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1892                                    ixgbe_rx_bufsz(rx_ring);
1893 #endif
1894
1895         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1896                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1897
1898                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1899
1900                 /* page is not reserved, we can reuse buffer as-is */
1901                 if (likely(!ixgbe_page_is_reserved(page)))
1902                         return true;
1903
1904                 /* this page cannot be reused so discard it */
1905                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1906                 return false;
1907         }
1908
1909         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1910                         rx_buffer->page_offset, size, truesize);
1911
1912         /* avoid re-using remote pages */
1913         if (unlikely(ixgbe_page_is_reserved(page)))
1914                 return false;
1915
1916 #if (PAGE_SIZE < 8192)
1917         /* if we are only owner of page we can reuse it */
1918         if (unlikely(page_count(page) != 1))
1919                 return false;
1920
1921         /* flip page offset to other buffer */
1922         rx_buffer->page_offset ^= truesize;
1923 #else
1924         /* move offset up to the next cache line */
1925         rx_buffer->page_offset += truesize;
1926
1927         if (rx_buffer->page_offset > last_offset)
1928                 return false;
1929 #endif
1930
1931         /* Even if we own the page, we are not allowed to use atomic_set()
1932          * This would break get_page_unless_zero() users.
1933          */
1934         atomic_inc(&page->_count);
1935
1936         return true;
1937 }
1938
1939 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1940                                              union ixgbe_adv_rx_desc *rx_desc)
1941 {
1942         struct ixgbe_rx_buffer *rx_buffer;
1943         struct sk_buff *skb;
1944         struct page *page;
1945
1946         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1947         page = rx_buffer->page;
1948         prefetchw(page);
1949
1950         skb = rx_buffer->skb;
1951
1952         if (likely(!skb)) {
1953                 void *page_addr = page_address(page) +
1954                                   rx_buffer->page_offset;
1955
1956                 /* prefetch first cache line of first page */
1957                 prefetch(page_addr);
1958 #if L1_CACHE_BYTES < 128
1959                 prefetch(page_addr + L1_CACHE_BYTES);
1960 #endif
1961
1962                 /* allocate a skb to store the frags */
1963                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1964                                      IXGBE_RX_HDR_SIZE);
1965                 if (unlikely(!skb)) {
1966                         rx_ring->rx_stats.alloc_rx_buff_failed++;
1967                         return NULL;
1968                 }
1969
1970                 /*
1971                  * we will be copying header into skb->data in
1972                  * pskb_may_pull so it is in our interest to prefetch
1973                  * it now to avoid a possible cache miss
1974                  */
1975                 prefetchw(skb->data);
1976
1977                 /*
1978                  * Delay unmapping of the first packet. It carries the
1979                  * header information, HW may still access the header
1980                  * after the writeback.  Only unmap it when EOP is
1981                  * reached
1982                  */
1983                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1984                         goto dma_sync;
1985
1986                 IXGBE_CB(skb)->dma = rx_buffer->dma;
1987         } else {
1988                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1989                         ixgbe_dma_sync_frag(rx_ring, skb);
1990
1991 dma_sync:
1992                 /* we are reusing so sync this buffer for CPU use */
1993                 dma_sync_single_range_for_cpu(rx_ring->dev,
1994                                               rx_buffer->dma,
1995                                               rx_buffer->page_offset,
1996                                               ixgbe_rx_bufsz(rx_ring),
1997                                               DMA_FROM_DEVICE);
1998
1999                 rx_buffer->skb = NULL;
2000         }
2001
2002         /* pull page into skb */
2003         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2004                 /* hand second half of page back to the ring */
2005                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2006         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2007                 /* the page has been released from the ring */
2008                 IXGBE_CB(skb)->page_released = true;
2009         } else {
2010                 /* we are not reusing the buffer so unmap it */
2011                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2012                                ixgbe_rx_pg_size(rx_ring),
2013                                DMA_FROM_DEVICE);
2014         }
2015
2016         /* clear contents of buffer_info */
2017         rx_buffer->page = NULL;
2018
2019         return skb;
2020 }
2021
2022 /**
2023  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2024  * @q_vector: structure containing interrupt and ring information
2025  * @rx_ring: rx descriptor ring to transact packets on
2026  * @budget: Total limit on number of packets to process
2027  *
2028  * This function provides a "bounce buffer" approach to Rx interrupt
2029  * processing.  The advantage to this is that on systems that have
2030  * expensive overhead for IOMMU access this provides a means of avoiding
2031  * it by maintaining the mapping of the page to the syste.
2032  *
2033  * Returns amount of work completed
2034  **/
2035 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2036                                struct ixgbe_ring *rx_ring,
2037                                const int budget)
2038 {
2039         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2040 #ifdef IXGBE_FCOE
2041         struct ixgbe_adapter *adapter = q_vector->adapter;
2042         int ddp_bytes;
2043         unsigned int mss = 0;
2044 #endif /* IXGBE_FCOE */
2045         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2046
2047         while (likely(total_rx_packets < budget)) {
2048                 union ixgbe_adv_rx_desc *rx_desc;
2049                 struct sk_buff *skb;
2050
2051                 /* return some buffers to hardware, one at a time is too slow */
2052                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2053                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2054                         cleaned_count = 0;
2055                 }
2056
2057                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2058
2059                 if (!rx_desc->wb.upper.status_error)
2060                         break;
2061
2062                 /* This memory barrier is needed to keep us from reading
2063                  * any other fields out of the rx_desc until we know the
2064                  * descriptor has been written back
2065                  */
2066                 dma_rmb();
2067
2068                 /* retrieve a buffer from the ring */
2069                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2070
2071                 /* exit if we failed to retrieve a buffer */
2072                 if (!skb)
2073                         break;
2074
2075                 cleaned_count++;
2076
2077                 /* place incomplete frames back on ring for completion */
2078                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2079                         continue;
2080
2081                 /* verify the packet layout is correct */
2082                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2083                         continue;
2084
2085                 /* probably a little skewed due to removing CRC */
2086                 total_rx_bytes += skb->len;
2087
2088                 /* populate checksum, timestamp, VLAN, and protocol */
2089                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2090
2091 #ifdef IXGBE_FCOE
2092                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2093                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2094                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2095                         /* include DDPed FCoE data */
2096                         if (ddp_bytes > 0) {
2097                                 if (!mss) {
2098                                         mss = rx_ring->netdev->mtu -
2099                                                 sizeof(struct fcoe_hdr) -
2100                                                 sizeof(struct fc_frame_header) -
2101                                                 sizeof(struct fcoe_crc_eof);
2102                                         if (mss > 512)
2103                                                 mss &= ~511;
2104                                 }
2105                                 total_rx_bytes += ddp_bytes;
2106                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2107                                                                  mss);
2108                         }
2109                         if (!ddp_bytes) {
2110                                 dev_kfree_skb_any(skb);
2111                                 continue;
2112                         }
2113                 }
2114
2115 #endif /* IXGBE_FCOE */
2116                 skb_mark_napi_id(skb, &q_vector->napi);
2117                 ixgbe_rx_skb(q_vector, skb);
2118
2119                 /* update budget accounting */
2120                 total_rx_packets++;
2121         }
2122
2123         u64_stats_update_begin(&rx_ring->syncp);
2124         rx_ring->stats.packets += total_rx_packets;
2125         rx_ring->stats.bytes += total_rx_bytes;
2126         u64_stats_update_end(&rx_ring->syncp);
2127         q_vector->rx.total_packets += total_rx_packets;
2128         q_vector->rx.total_bytes += total_rx_bytes;
2129
2130         return total_rx_packets;
2131 }
2132
2133 #ifdef CONFIG_NET_RX_BUSY_POLL
2134 /* must be called with local_bh_disable()d */
2135 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2136 {
2137         struct ixgbe_q_vector *q_vector =
2138                         container_of(napi, struct ixgbe_q_vector, napi);
2139         struct ixgbe_adapter *adapter = q_vector->adapter;
2140         struct ixgbe_ring  *ring;
2141         int found = 0;
2142
2143         if (test_bit(__IXGBE_DOWN, &adapter->state))
2144                 return LL_FLUSH_FAILED;
2145
2146         if (!ixgbe_qv_lock_poll(q_vector))
2147                 return LL_FLUSH_BUSY;
2148
2149         ixgbe_for_each_ring(ring, q_vector->rx) {
2150                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2151 #ifdef BP_EXTENDED_STATS
2152                 if (found)
2153                         ring->stats.cleaned += found;
2154                 else
2155                         ring->stats.misses++;
2156 #endif
2157                 if (found)
2158                         break;
2159         }
2160
2161         ixgbe_qv_unlock_poll(q_vector);
2162
2163         return found;
2164 }
2165 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2166
2167 /**
2168  * ixgbe_configure_msix - Configure MSI-X hardware
2169  * @adapter: board private structure
2170  *
2171  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2172  * interrupts.
2173  **/
2174 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2175 {
2176         struct ixgbe_q_vector *q_vector;
2177         int v_idx;
2178         u32 mask;
2179
2180         /* Populate MSIX to EITR Select */
2181         if (adapter->num_vfs > 32) {
2182                 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2183                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2184         }
2185
2186         /*
2187          * Populate the IVAR table and set the ITR values to the
2188          * corresponding register.
2189          */
2190         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2191                 struct ixgbe_ring *ring;
2192                 q_vector = adapter->q_vector[v_idx];
2193
2194                 ixgbe_for_each_ring(ring, q_vector->rx)
2195                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2196
2197                 ixgbe_for_each_ring(ring, q_vector->tx)
2198                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2199
2200                 ixgbe_write_eitr(q_vector);
2201         }
2202
2203         switch (adapter->hw.mac.type) {
2204         case ixgbe_mac_82598EB:
2205                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2206                                v_idx);
2207                 break;
2208         case ixgbe_mac_82599EB:
2209         case ixgbe_mac_X540:
2210         case ixgbe_mac_X550:
2211         case ixgbe_mac_X550EM_x:
2212                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2213                 break;
2214         default:
2215                 break;
2216         }
2217         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2218
2219         /* set up to autoclear timer, and the vectors */
2220         mask = IXGBE_EIMS_ENABLE_MASK;
2221         mask &= ~(IXGBE_EIMS_OTHER |
2222                   IXGBE_EIMS_MAILBOX |
2223                   IXGBE_EIMS_LSC);
2224
2225         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2226 }
2227
2228 enum latency_range {
2229         lowest_latency = 0,
2230         low_latency = 1,
2231         bulk_latency = 2,
2232         latency_invalid = 255
2233 };
2234
2235 /**
2236  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2237  * @q_vector: structure containing interrupt and ring information
2238  * @ring_container: structure containing ring performance data
2239  *
2240  *      Stores a new ITR value based on packets and byte
2241  *      counts during the last interrupt.  The advantage of per interrupt
2242  *      computation is faster updates and more accurate ITR for the current
2243  *      traffic pattern.  Constants in this function were computed
2244  *      based on theoretical maximum wire speed and thresholds were set based
2245  *      on testing data as well as attempting to minimize response time
2246  *      while increasing bulk throughput.
2247  *      this functionality is controlled by the InterruptThrottleRate module
2248  *      parameter (see ixgbe_param.c)
2249  **/
2250 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2251                              struct ixgbe_ring_container *ring_container)
2252 {
2253         int bytes = ring_container->total_bytes;
2254         int packets = ring_container->total_packets;
2255         u32 timepassed_us;
2256         u64 bytes_perint;
2257         u8 itr_setting = ring_container->itr;
2258
2259         if (packets == 0)
2260                 return;
2261
2262         /* simple throttlerate management
2263          *   0-10MB/s   lowest (100000 ints/s)
2264          *  10-20MB/s   low    (20000 ints/s)
2265          *  20-1249MB/s bulk   (12000 ints/s)
2266          */
2267         /* what was last interrupt timeslice? */
2268         timepassed_us = q_vector->itr >> 2;
2269         if (timepassed_us == 0)
2270                 return;
2271
2272         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2273
2274         switch (itr_setting) {
2275         case lowest_latency:
2276                 if (bytes_perint > 10)
2277                         itr_setting = low_latency;
2278                 break;
2279         case low_latency:
2280                 if (bytes_perint > 20)
2281                         itr_setting = bulk_latency;
2282                 else if (bytes_perint <= 10)
2283                         itr_setting = lowest_latency;
2284                 break;
2285         case bulk_latency:
2286                 if (bytes_perint <= 20)
2287                         itr_setting = low_latency;
2288                 break;
2289         }
2290
2291         /* clear work counters since we have the values we need */
2292         ring_container->total_bytes = 0;
2293         ring_container->total_packets = 0;
2294
2295         /* write updated itr to ring container */
2296         ring_container->itr = itr_setting;
2297 }
2298
2299 /**
2300  * ixgbe_write_eitr - write EITR register in hardware specific way
2301  * @q_vector: structure containing interrupt and ring information
2302  *
2303  * This function is made to be called by ethtool and by the driver
2304  * when it needs to update EITR registers at runtime.  Hardware
2305  * specific quirks/differences are taken care of here.
2306  */
2307 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2308 {
2309         struct ixgbe_adapter *adapter = q_vector->adapter;
2310         struct ixgbe_hw *hw = &adapter->hw;
2311         int v_idx = q_vector->v_idx;
2312         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2313
2314         switch (adapter->hw.mac.type) {
2315         case ixgbe_mac_82598EB:
2316                 /* must write high and low 16 bits to reset counter */
2317                 itr_reg |= (itr_reg << 16);
2318                 break;
2319         case ixgbe_mac_82599EB:
2320         case ixgbe_mac_X540:
2321         case ixgbe_mac_X550:
2322         case ixgbe_mac_X550EM_x:
2323                 /*
2324                  * set the WDIS bit to not clear the timer bits and cause an
2325                  * immediate assertion of the interrupt
2326                  */
2327                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2328                 break;
2329         default:
2330                 break;
2331         }
2332         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2333 }
2334
2335 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2336 {
2337         u32 new_itr = q_vector->itr;
2338         u8 current_itr;
2339
2340         ixgbe_update_itr(q_vector, &q_vector->tx);
2341         ixgbe_update_itr(q_vector, &q_vector->rx);
2342
2343         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2344
2345         switch (current_itr) {
2346         /* counts and packets in update_itr are dependent on these numbers */
2347         case lowest_latency:
2348                 new_itr = IXGBE_100K_ITR;
2349                 break;
2350         case low_latency:
2351                 new_itr = IXGBE_20K_ITR;
2352                 break;
2353         case bulk_latency:
2354                 new_itr = IXGBE_12K_ITR;
2355                 break;
2356         default:
2357                 break;
2358         }
2359
2360         if (new_itr != q_vector->itr) {
2361                 /* do an exponential smoothing */
2362                 new_itr = (10 * new_itr * q_vector->itr) /
2363                           ((9 * new_itr) + q_vector->itr);
2364
2365                 /* save the algorithm value here */
2366                 q_vector->itr = new_itr;
2367
2368                 ixgbe_write_eitr(q_vector);
2369         }
2370 }
2371
2372 /**
2373  * ixgbe_check_overtemp_subtask - check for over temperature
2374  * @adapter: pointer to adapter
2375  **/
2376 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2377 {
2378         struct ixgbe_hw *hw = &adapter->hw;
2379         u32 eicr = adapter->interrupt_event;
2380
2381         if (test_bit(__IXGBE_DOWN, &adapter->state))
2382                 return;
2383
2384         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2385             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2386                 return;
2387
2388         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2389
2390         switch (hw->device_id) {
2391         case IXGBE_DEV_ID_82599_T3_LOM:
2392                 /*
2393                  * Since the warning interrupt is for both ports
2394                  * we don't have to check if:
2395                  *  - This interrupt wasn't for our port.
2396                  *  - We may have missed the interrupt so always have to
2397                  *    check if we  got a LSC
2398                  */
2399                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2400                     !(eicr & IXGBE_EICR_LSC))
2401                         return;
2402
2403                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2404                         u32 speed;
2405                         bool link_up = false;
2406
2407                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2408
2409                         if (link_up)
2410                                 return;
2411                 }
2412
2413                 /* Check if this is not due to overtemp */
2414                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2415                         return;
2416
2417                 break;
2418         default:
2419                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2420                         return;
2421                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2422                         return;
2423                 break;
2424         }
2425         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2426
2427         adapter->interrupt_event = 0;
2428 }
2429
2430 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2431 {
2432         struct ixgbe_hw *hw = &adapter->hw;
2433
2434         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2435             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2436                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2437                 /* write to clear the interrupt */
2438                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2439         }
2440 }
2441
2442 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2443 {
2444         struct ixgbe_hw *hw = &adapter->hw;
2445
2446         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2447                 return;
2448
2449         switch (adapter->hw.mac.type) {
2450         case ixgbe_mac_82599EB:
2451                 /*
2452                  * Need to check link state so complete overtemp check
2453                  * on service task
2454                  */
2455                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2456                      (eicr & IXGBE_EICR_LSC)) &&
2457                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2458                         adapter->interrupt_event = eicr;
2459                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2460                         ixgbe_service_event_schedule(adapter);
2461                         return;
2462                 }
2463                 return;
2464         case ixgbe_mac_X540:
2465                 if (!(eicr & IXGBE_EICR_TS))
2466                         return;
2467                 break;
2468         default:
2469                 return;
2470         }
2471
2472         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2473 }
2474
2475 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2476 {
2477         switch (hw->mac.type) {
2478         case ixgbe_mac_82598EB:
2479                 if (hw->phy.type == ixgbe_phy_nl)
2480                         return true;
2481                 return false;
2482         case ixgbe_mac_82599EB:
2483         case ixgbe_mac_X550EM_x:
2484                 switch (hw->mac.ops.get_media_type(hw)) {
2485                 case ixgbe_media_type_fiber:
2486                 case ixgbe_media_type_fiber_qsfp:
2487                         return true;
2488                 default:
2489                         return false;
2490                 }
2491         default:
2492                 return false;
2493         }
2494 }
2495
2496 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2497 {
2498         struct ixgbe_hw *hw = &adapter->hw;
2499         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2500
2501         if (!ixgbe_is_sfp(hw))
2502                 return;
2503
2504         /* Later MAC's use different SDP */
2505         if (hw->mac.type >= ixgbe_mac_X540)
2506                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2507
2508         if (eicr & eicr_mask) {
2509                 /* Clear the interrupt */
2510                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2511                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2512                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2513                         adapter->sfp_poll_time = 0;
2514                         ixgbe_service_event_schedule(adapter);
2515                 }
2516         }
2517
2518         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2519             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2520                 /* Clear the interrupt */
2521                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2522                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2523                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2524                         ixgbe_service_event_schedule(adapter);
2525                 }
2526         }
2527 }
2528
2529 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2530 {
2531         struct ixgbe_hw *hw = &adapter->hw;
2532
2533         adapter->lsc_int++;
2534         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2535         adapter->link_check_timeout = jiffies;
2536         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2537                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2538                 IXGBE_WRITE_FLUSH(hw);
2539                 ixgbe_service_event_schedule(adapter);
2540         }
2541 }
2542
2543 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2544                                            u64 qmask)
2545 {
2546         u32 mask;
2547         struct ixgbe_hw *hw = &adapter->hw;
2548
2549         switch (hw->mac.type) {
2550         case ixgbe_mac_82598EB:
2551                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2552                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2553                 break;
2554         case ixgbe_mac_82599EB:
2555         case ixgbe_mac_X540:
2556         case ixgbe_mac_X550:
2557         case ixgbe_mac_X550EM_x:
2558                 mask = (qmask & 0xFFFFFFFF);
2559                 if (mask)
2560                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2561                 mask = (qmask >> 32);
2562                 if (mask)
2563                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2564                 break;
2565         default:
2566                 break;
2567         }
2568         /* skip the flush */
2569 }
2570
2571 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2572                                             u64 qmask)
2573 {
2574         u32 mask;
2575         struct ixgbe_hw *hw = &adapter->hw;
2576
2577         switch (hw->mac.type) {
2578         case ixgbe_mac_82598EB:
2579                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2580                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2581                 break;
2582         case ixgbe_mac_82599EB:
2583         case ixgbe_mac_X540:
2584         case ixgbe_mac_X550:
2585         case ixgbe_mac_X550EM_x:
2586                 mask = (qmask & 0xFFFFFFFF);
2587                 if (mask)
2588                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2589                 mask = (qmask >> 32);
2590                 if (mask)
2591                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2592                 break;
2593         default:
2594                 break;
2595         }
2596         /* skip the flush */
2597 }
2598
2599 /**
2600  * ixgbe_irq_enable - Enable default interrupt generation settings
2601  * @adapter: board private structure
2602  **/
2603 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2604                                     bool flush)
2605 {
2606         struct ixgbe_hw *hw = &adapter->hw;
2607         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2608
2609         /* don't reenable LSC while waiting for link */
2610         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2611                 mask &= ~IXGBE_EIMS_LSC;
2612
2613         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2614                 switch (adapter->hw.mac.type) {
2615                 case ixgbe_mac_82599EB:
2616                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2617                         break;
2618                 case ixgbe_mac_X540:
2619                 case ixgbe_mac_X550:
2620                 case ixgbe_mac_X550EM_x:
2621                         mask |= IXGBE_EIMS_TS;
2622                         break;
2623                 default:
2624                         break;
2625                 }
2626         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2627                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2628         switch (adapter->hw.mac.type) {
2629         case ixgbe_mac_82599EB:
2630                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2631                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2632                 /* fall through */
2633         case ixgbe_mac_X540:
2634         case ixgbe_mac_X550:
2635         case ixgbe_mac_X550EM_x:
2636                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2637                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2638                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2639                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2640                 mask |= IXGBE_EIMS_ECC;
2641                 mask |= IXGBE_EIMS_MAILBOX;
2642                 break;
2643         default:
2644                 break;
2645         }
2646
2647         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2648             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2649                 mask |= IXGBE_EIMS_FLOW_DIR;
2650
2651         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2652         if (queues)
2653                 ixgbe_irq_enable_queues(adapter, ~0);
2654         if (flush)
2655                 IXGBE_WRITE_FLUSH(&adapter->hw);
2656 }
2657
2658 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2659 {
2660         struct ixgbe_adapter *adapter = data;
2661         struct ixgbe_hw *hw = &adapter->hw;
2662         u32 eicr;
2663
2664         /*
2665          * Workaround for Silicon errata.  Use clear-by-write instead
2666          * of clear-by-read.  Reading with EICS will return the
2667          * interrupt causes without clearing, which later be done
2668          * with the write to EICR.
2669          */
2670         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2671
2672         /* The lower 16bits of the EICR register are for the queue interrupts
2673          * which should be masked here in order to not accidentally clear them if
2674          * the bits are high when ixgbe_msix_other is called. There is a race
2675          * condition otherwise which results in possible performance loss
2676          * especially if the ixgbe_msix_other interrupt is triggering
2677          * consistently (as it would when PPS is turned on for the X540 device)
2678          */
2679         eicr &= 0xFFFF0000;
2680
2681         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2682
2683         if (eicr & IXGBE_EICR_LSC)
2684                 ixgbe_check_lsc(adapter);
2685
2686         if (eicr & IXGBE_EICR_MAILBOX)
2687                 ixgbe_msg_task(adapter);
2688
2689         switch (hw->mac.type) {
2690         case ixgbe_mac_82599EB:
2691         case ixgbe_mac_X540:
2692         case ixgbe_mac_X550:
2693         case ixgbe_mac_X550EM_x:
2694                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2695                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2696                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2697                         ixgbe_service_event_schedule(adapter);
2698                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2699                                         IXGBE_EICR_GPI_SDP0_X540);
2700                 }
2701                 if (eicr & IXGBE_EICR_ECC) {
2702                         e_info(link, "Received ECC Err, initiating reset\n");
2703                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2704                         ixgbe_service_event_schedule(adapter);
2705                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2706                 }
2707                 /* Handle Flow Director Full threshold interrupt */
2708                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2709                         int reinit_count = 0;
2710                         int i;
2711                         for (i = 0; i < adapter->num_tx_queues; i++) {
2712                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2713                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2714                                                        &ring->state))
2715                                         reinit_count++;
2716                         }
2717                         if (reinit_count) {
2718                                 /* no more flow director interrupts until after init */
2719                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2720                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2721                                 ixgbe_service_event_schedule(adapter);
2722                         }
2723                 }
2724                 ixgbe_check_sfp_event(adapter, eicr);
2725                 ixgbe_check_overtemp_event(adapter, eicr);
2726                 break;
2727         default:
2728                 break;
2729         }
2730
2731         ixgbe_check_fan_failure(adapter, eicr);
2732
2733         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2734                 ixgbe_ptp_check_pps_event(adapter, eicr);
2735
2736         /* re-enable the original interrupt state, no lsc, no queues */
2737         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2738                 ixgbe_irq_enable(adapter, false, false);
2739
2740         return IRQ_HANDLED;
2741 }
2742
2743 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2744 {
2745         struct ixgbe_q_vector *q_vector = data;
2746
2747         /* EIAM disabled interrupts (on this vector) for us */
2748
2749         if (q_vector->rx.ring || q_vector->tx.ring)
2750                 napi_schedule(&q_vector->napi);
2751
2752         return IRQ_HANDLED;
2753 }
2754
2755 /**
2756  * ixgbe_poll - NAPI Rx polling callback
2757  * @napi: structure for representing this polling device
2758  * @budget: how many packets driver is allowed to clean
2759  *
2760  * This function is used for legacy and MSI, NAPI mode
2761  **/
2762 int ixgbe_poll(struct napi_struct *napi, int budget)
2763 {
2764         struct ixgbe_q_vector *q_vector =
2765                                 container_of(napi, struct ixgbe_q_vector, napi);
2766         struct ixgbe_adapter *adapter = q_vector->adapter;
2767         struct ixgbe_ring *ring;
2768         int per_ring_budget;
2769         bool clean_complete = true;
2770
2771 #ifdef CONFIG_IXGBE_DCA
2772         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2773                 ixgbe_update_dca(q_vector);
2774 #endif
2775
2776         ixgbe_for_each_ring(ring, q_vector->tx)
2777                 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2778
2779         if (!ixgbe_qv_lock_napi(q_vector))
2780                 return budget;
2781
2782         /* attempt to distribute budget to each queue fairly, but don't allow
2783          * the budget to go below 1 because we'll exit polling */
2784         if (q_vector->rx.count > 1)
2785                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2786         else
2787                 per_ring_budget = budget;
2788
2789         ixgbe_for_each_ring(ring, q_vector->rx)
2790                 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2791                                    per_ring_budget) < per_ring_budget);
2792
2793         ixgbe_qv_unlock_napi(q_vector);
2794         /* If all work not completed, return budget and keep polling */
2795         if (!clean_complete)
2796                 return budget;
2797
2798         /* all work done, exit the polling mode */
2799         napi_complete(napi);
2800         if (adapter->rx_itr_setting & 1)
2801                 ixgbe_set_itr(q_vector);
2802         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2803                 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2804
2805         return 0;
2806 }
2807
2808 /**
2809  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2810  * @adapter: board private structure
2811  *
2812  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2813  * interrupts from the kernel.
2814  **/
2815 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2816 {
2817         struct net_device *netdev = adapter->netdev;
2818         int vector, err;
2819         int ri = 0, ti = 0;
2820
2821         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2822                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2823                 struct msix_entry *entry = &adapter->msix_entries[vector];
2824
2825                 if (q_vector->tx.ring && q_vector->rx.ring) {
2826                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2827                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2828                         ti++;
2829                 } else if (q_vector->rx.ring) {
2830                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2831                                  "%s-%s-%d", netdev->name, "rx", ri++);
2832                 } else if (q_vector->tx.ring) {
2833                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2834                                  "%s-%s-%d", netdev->name, "tx", ti++);
2835                 } else {
2836                         /* skip this unused q_vector */
2837                         continue;
2838                 }
2839                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2840                                   q_vector->name, q_vector);
2841                 if (err) {
2842                         e_err(probe, "request_irq failed for MSIX interrupt "
2843                               "Error: %d\n", err);
2844                         goto free_queue_irqs;
2845                 }
2846                 /* If Flow Director is enabled, set interrupt affinity */
2847                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2848                         /* assign the mask for this irq */
2849                         irq_set_affinity_hint(entry->vector,
2850                                               &q_vector->affinity_mask);
2851                 }
2852         }
2853
2854         err = request_irq(adapter->msix_entries[vector].vector,
2855                           ixgbe_msix_other, 0, netdev->name, adapter);
2856         if (err) {
2857                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2858                 goto free_queue_irqs;
2859         }
2860
2861         return 0;
2862
2863 free_queue_irqs:
2864         while (vector) {
2865                 vector--;
2866                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2867                                       NULL);
2868                 free_irq(adapter->msix_entries[vector].vector,
2869                          adapter->q_vector[vector]);
2870         }
2871         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2872         pci_disable_msix(adapter->pdev);
2873         kfree(adapter->msix_entries);
2874         adapter->msix_entries = NULL;
2875         return err;
2876 }
2877
2878 /**
2879  * ixgbe_intr - legacy mode Interrupt Handler
2880  * @irq: interrupt number
2881  * @data: pointer to a network interface device structure
2882  **/
2883 static irqreturn_t ixgbe_intr(int irq, void *data)
2884 {
2885         struct ixgbe_adapter *adapter = data;
2886         struct ixgbe_hw *hw = &adapter->hw;
2887         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2888         u32 eicr;
2889
2890         /*
2891          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2892          * before the read of EICR.
2893          */
2894         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2895
2896         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2897          * therefore no explicit interrupt disable is necessary */
2898         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2899         if (!eicr) {
2900                 /*
2901                  * shared interrupt alert!
2902                  * make sure interrupts are enabled because the read will
2903                  * have disabled interrupts due to EIAM
2904                  * finish the workaround of silicon errata on 82598.  Unmask
2905                  * the interrupt that we masked before the EICR read.
2906                  */
2907                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2908                         ixgbe_irq_enable(adapter, true, true);
2909                 return IRQ_NONE;        /* Not our interrupt */
2910         }
2911
2912         if (eicr & IXGBE_EICR_LSC)
2913                 ixgbe_check_lsc(adapter);
2914
2915         switch (hw->mac.type) {
2916         case ixgbe_mac_82599EB:
2917                 ixgbe_check_sfp_event(adapter, eicr);
2918                 /* Fall through */
2919         case ixgbe_mac_X540:
2920         case ixgbe_mac_X550:
2921         case ixgbe_mac_X550EM_x:
2922                 if (eicr & IXGBE_EICR_ECC) {
2923                         e_info(link, "Received ECC Err, initiating reset\n");
2924                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2925                         ixgbe_service_event_schedule(adapter);
2926                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2927                 }
2928                 ixgbe_check_overtemp_event(adapter, eicr);
2929                 break;
2930         default:
2931                 break;
2932         }
2933
2934         ixgbe_check_fan_failure(adapter, eicr);
2935         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2936                 ixgbe_ptp_check_pps_event(adapter, eicr);
2937
2938         /* would disable interrupts here but EIAM disabled it */
2939         napi_schedule(&q_vector->napi);
2940
2941         /*
2942          * re-enable link(maybe) and non-queue interrupts, no flush.
2943          * ixgbe_poll will re-enable the queue interrupts
2944          */
2945         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2946                 ixgbe_irq_enable(adapter, false, false);
2947
2948         return IRQ_HANDLED;
2949 }
2950
2951 /**
2952  * ixgbe_request_irq - initialize interrupts
2953  * @adapter: board private structure
2954  *
2955  * Attempts to configure interrupts using the best available
2956  * capabilities of the hardware and kernel.
2957  **/
2958 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2959 {
2960         struct net_device *netdev = adapter->netdev;
2961         int err;
2962
2963         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2964                 err = ixgbe_request_msix_irqs(adapter);
2965         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2966                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2967                                   netdev->name, adapter);
2968         else
2969                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2970                                   netdev->name, adapter);
2971
2972         if (err)
2973                 e_err(probe, "request_irq failed, Error %d\n", err);
2974
2975         return err;
2976 }
2977
2978 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2979 {
2980         int vector;
2981
2982         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2983                 free_irq(adapter->pdev->irq, adapter);
2984                 return;
2985         }
2986
2987         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2988                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2989                 struct msix_entry *entry = &adapter->msix_entries[vector];
2990
2991                 /* free only the irqs that were actually requested */
2992                 if (!q_vector->rx.ring && !q_vector->tx.ring)
2993                         continue;
2994
2995                 /* clear the affinity_mask in the IRQ descriptor */
2996                 irq_set_affinity_hint(entry->vector, NULL);
2997
2998                 free_irq(entry->vector, q_vector);
2999         }
3000
3001         free_irq(adapter->msix_entries[vector++].vector, adapter);
3002 }
3003
3004 /**
3005  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3006  * @adapter: board private structure
3007  **/
3008 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3009 {
3010         switch (adapter->hw.mac.type) {
3011         case ixgbe_mac_82598EB:
3012                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3013                 break;
3014         case ixgbe_mac_82599EB:
3015         case ixgbe_mac_X540:
3016         case ixgbe_mac_X550:
3017         case ixgbe_mac_X550EM_x:
3018                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3019                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3020                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3021                 break;
3022         default:
3023                 break;
3024         }
3025         IXGBE_WRITE_FLUSH(&adapter->hw);
3026         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3027                 int vector;
3028
3029                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3030                         synchronize_irq(adapter->msix_entries[vector].vector);
3031
3032                 synchronize_irq(adapter->msix_entries[vector++].vector);
3033         } else {
3034                 synchronize_irq(adapter->pdev->irq);
3035         }
3036 }
3037
3038 /**
3039  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3040  *
3041  **/
3042 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3043 {
3044         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3045
3046         ixgbe_write_eitr(q_vector);
3047
3048         ixgbe_set_ivar(adapter, 0, 0, 0);
3049         ixgbe_set_ivar(adapter, 1, 0, 0);
3050
3051         e_info(hw, "Legacy interrupt IVAR setup done\n");
3052 }
3053
3054 /**
3055  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3056  * @adapter: board private structure
3057  * @ring: structure containing ring specific data
3058  *
3059  * Configure the Tx descriptor ring after a reset.
3060  **/
3061 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3062                              struct ixgbe_ring *ring)
3063 {
3064         struct ixgbe_hw *hw = &adapter->hw;
3065         u64 tdba = ring->dma;
3066         int wait_loop = 10;
3067         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3068         u8 reg_idx = ring->reg_idx;
3069
3070         /* disable queue to avoid issues while updating state */
3071         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3072         IXGBE_WRITE_FLUSH(hw);
3073
3074         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3075                         (tdba & DMA_BIT_MASK(32)));
3076         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3077         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3078                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3079         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3080         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3081         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3082
3083         /*
3084          * set WTHRESH to encourage burst writeback, it should not be set
3085          * higher than 1 when:
3086          * - ITR is 0 as it could cause false TX hangs
3087          * - ITR is set to > 100k int/sec and BQL is enabled
3088          *
3089          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3090          * to or less than the number of on chip descriptors, which is
3091          * currently 40.
3092          */
3093         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3094                 txdctl |= (1 << 16);    /* WTHRESH = 1 */
3095         else
3096                 txdctl |= (8 << 16);    /* WTHRESH = 8 */
3097
3098         /*
3099          * Setting PTHRESH to 32 both improves performance
3100          * and avoids a TX hang with DFP enabled
3101          */
3102         txdctl |= (1 << 8) |    /* HTHRESH = 1 */
3103                    32;          /* PTHRESH = 32 */
3104
3105         /* reinitialize flowdirector state */
3106         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3107                 ring->atr_sample_rate = adapter->atr_sample_rate;
3108                 ring->atr_count = 0;
3109                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3110         } else {
3111                 ring->atr_sample_rate = 0;
3112         }
3113
3114         /* initialize XPS */
3115         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3116                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3117
3118                 if (q_vector)
3119                         netif_set_xps_queue(ring->netdev,
3120                                             &q_vector->affinity_mask,
3121                                             ring->queue_index);
3122         }
3123
3124         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3125
3126         /* enable queue */
3127         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3128
3129         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3130         if (hw->mac.type == ixgbe_mac_82598EB &&
3131             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3132                 return;
3133
3134         /* poll to verify queue is enabled */
3135         do {
3136                 usleep_range(1000, 2000);
3137                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3138         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3139         if (!wait_loop)
3140                 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3141 }
3142
3143 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3144 {
3145         struct ixgbe_hw *hw = &adapter->hw;
3146         u32 rttdcs, mtqc;
3147         u8 tcs = netdev_get_num_tc(adapter->netdev);
3148
3149         if (hw->mac.type == ixgbe_mac_82598EB)
3150                 return;
3151
3152         /* disable the arbiter while setting MTQC */
3153         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3154         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3155         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3156
3157         /* set transmit pool layout */
3158         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3159                 mtqc = IXGBE_MTQC_VT_ENA;
3160                 if (tcs > 4)
3161                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3162                 else if (tcs > 1)
3163                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3164                 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3165                         mtqc |= IXGBE_MTQC_32VF;
3166                 else
3167                         mtqc |= IXGBE_MTQC_64VF;
3168         } else {
3169                 if (tcs > 4)
3170                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3171                 else if (tcs > 1)
3172                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3173                 else
3174                         mtqc = IXGBE_MTQC_64Q_1PB;
3175         }
3176
3177         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3178
3179         /* Enable Security TX Buffer IFG for multiple pb */
3180         if (tcs) {
3181                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3182                 sectx |= IXGBE_SECTX_DCB;
3183                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3184         }
3185
3186         /* re-enable the arbiter */
3187         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3188         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3189 }
3190
3191 /**
3192  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3193  * @adapter: board private structure
3194  *
3195  * Configure the Tx unit of the MAC after a reset.
3196  **/
3197 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3198 {
3199         struct ixgbe_hw *hw = &adapter->hw;
3200         u32 dmatxctl;
3201         u32 i;
3202
3203         ixgbe_setup_mtqc(adapter);
3204
3205         if (hw->mac.type != ixgbe_mac_82598EB) {
3206                 /* DMATXCTL.EN must be before Tx queues are enabled */
3207                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3208                 dmatxctl |= IXGBE_DMATXCTL_TE;
3209                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3210         }
3211
3212         /* Setup the HW Tx Head and Tail descriptor pointers */
3213         for (i = 0; i < adapter->num_tx_queues; i++)
3214                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3215 }
3216
3217 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3218                                  struct ixgbe_ring *ring)
3219 {
3220         struct ixgbe_hw *hw = &adapter->hw;
3221         u8 reg_idx = ring->reg_idx;
3222         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3223
3224         srrctl |= IXGBE_SRRCTL_DROP_EN;
3225
3226         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3227 }
3228
3229 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3230                                   struct ixgbe_ring *ring)
3231 {
3232         struct ixgbe_hw *hw = &adapter->hw;
3233         u8 reg_idx = ring->reg_idx;
3234         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3235
3236         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3237
3238         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3239 }
3240
3241 #ifdef CONFIG_IXGBE_DCB
3242 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3243 #else
3244 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3245 #endif
3246 {
3247         int i;
3248         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3249
3250         if (adapter->ixgbe_ieee_pfc)
3251                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3252
3253         /*
3254          * We should set the drop enable bit if:
3255          *  SR-IOV is enabled
3256          *   or
3257          *  Number of Rx queues > 1 and flow control is disabled
3258          *
3259          *  This allows us to avoid head of line blocking for security
3260          *  and performance reasons.
3261          */
3262         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3263             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3264                 for (i = 0; i < adapter->num_rx_queues; i++)
3265                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3266         } else {
3267                 for (i = 0; i < adapter->num_rx_queues; i++)
3268                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3269         }
3270 }
3271
3272 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3273
3274 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3275                                    struct ixgbe_ring *rx_ring)
3276 {
3277         struct ixgbe_hw *hw = &adapter->hw;
3278         u32 srrctl;
3279         u8 reg_idx = rx_ring->reg_idx;
3280
3281         if (hw->mac.type == ixgbe_mac_82598EB) {
3282                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3283
3284                 /*
3285                  * if VMDq is not active we must program one srrctl register
3286                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3287                  */
3288                 reg_idx &= mask;
3289         }
3290
3291         /* configure header buffer length, needed for RSC */
3292         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3293
3294         /* configure the packet buffer length */
3295         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3296
3297         /* configure descriptor type */
3298         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3299
3300         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3301 }
3302
3303 /**
3304  * Return a number of entries in the RSS indirection table
3305  *
3306  * @adapter: device handle
3307  *
3308  *  - 82598/82599/X540:     128
3309  *  - X550(non-SRIOV mode): 512
3310  *  - X550(SRIOV mode):     64
3311  */
3312 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3313 {
3314         if (adapter->hw.mac.type < ixgbe_mac_X550)
3315                 return 128;
3316         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3317                 return 64;
3318         else
3319                 return 512;
3320 }
3321
3322 /**
3323  * Write the RETA table to HW
3324  *
3325  * @adapter: device handle
3326  *
3327  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3328  */
3329 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3330 {
3331         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3332         struct ixgbe_hw *hw = &adapter->hw;
3333         u32 reta = 0;
3334         u32 indices_multi;
3335         u8 *indir_tbl = adapter->rss_indir_tbl;
3336
3337         /* Fill out the redirection table as follows:
3338          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3339          *    indices.
3340          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3341          *  - X550:       8 bit wide entries containing 6 bit RSS index
3342          */
3343         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3344                 indices_multi = 0x11;
3345         else
3346                 indices_multi = 0x1;
3347
3348         /* Write redirection table to HW */
3349         for (i = 0; i < reta_entries; i++) {
3350                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3351                 if ((i & 3) == 3) {
3352                         if (i < 128)
3353                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3354                         else
3355                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3356                                                 reta);
3357                         reta = 0;
3358                 }
3359         }
3360 }
3361
3362 /**
3363  * Write the RETA table to HW (for x550 devices in SRIOV mode)
3364  *
3365  * @adapter: device handle
3366  *
3367  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3368  */
3369 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3370 {
3371         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3372         struct ixgbe_hw *hw = &adapter->hw;
3373         u32 vfreta = 0;
3374         unsigned int pf_pool = adapter->num_vfs;
3375
3376         /* Write redirection table to HW */
3377         for (i = 0; i < reta_entries; i++) {
3378                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3379                 if ((i & 3) == 3) {
3380                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3381                                         vfreta);
3382                         vfreta = 0;
3383                 }
3384         }
3385 }
3386
3387 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3388 {
3389         struct ixgbe_hw *hw = &adapter->hw;
3390         u32 i, j;
3391         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3392         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3393
3394         /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3395          * make full use of any rings they may have.  We will use the
3396          * PSRTYPE register to control how many rings we use within the PF.
3397          */
3398         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3399                 rss_i = 2;
3400
3401         /* Fill out hash function seeds */
3402         for (i = 0; i < 10; i++)
3403                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3404
3405         /* Fill out redirection table */
3406         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3407
3408         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3409                 if (j == rss_i)
3410                         j = 0;
3411
3412                 adapter->rss_indir_tbl[i] = j;
3413         }
3414
3415         ixgbe_store_reta(adapter);
3416 }
3417
3418 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3419 {
3420         struct ixgbe_hw *hw = &adapter->hw;
3421         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3422         unsigned int pf_pool = adapter->num_vfs;
3423         int i, j;
3424
3425         /* Fill out hash function seeds */
3426         for (i = 0; i < 10; i++)
3427                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3428                                 adapter->rss_key[i]);
3429
3430         /* Fill out the redirection table */
3431         for (i = 0, j = 0; i < 64; i++, j++) {
3432                 if (j == rss_i)
3433                         j = 0;
3434
3435                 adapter->rss_indir_tbl[i] = j;
3436         }
3437
3438         ixgbe_store_vfreta(adapter);
3439 }
3440
3441 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3442 {
3443         struct ixgbe_hw *hw = &adapter->hw;
3444         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3445         u32 rxcsum;
3446
3447         /* Disable indicating checksum in descriptor, enables RSS hash */
3448         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3449         rxcsum |= IXGBE_RXCSUM_PCSD;
3450         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3451
3452         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3453                 if (adapter->ring_feature[RING_F_RSS].mask)
3454                         mrqc = IXGBE_MRQC_RSSEN;
3455         } else {
3456                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3457
3458                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3459                         if (tcs > 4)
3460                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3461                         else if (tcs > 1)
3462                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3463                         else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3464                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3465                         else
3466                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3467                 } else {
3468                         if (tcs > 4)
3469                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3470                         else if (tcs > 1)
3471                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3472                         else
3473                                 mrqc = IXGBE_MRQC_RSSEN;
3474                 }
3475         }
3476
3477         /* Perform hash on these packet types */
3478         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3479                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3480                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3481                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3482
3483         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3484                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3485         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3486                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3487
3488         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3489         if ((hw->mac.type >= ixgbe_mac_X550) &&
3490             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3491                 unsigned int pf_pool = adapter->num_vfs;
3492
3493                 /* Enable VF RSS mode */
3494                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3495                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3496
3497                 /* Setup RSS through the VF registers */
3498                 ixgbe_setup_vfreta(adapter);
3499                 vfmrqc = IXGBE_MRQC_RSSEN;
3500                 vfmrqc |= rss_field;
3501                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3502         } else {
3503                 ixgbe_setup_reta(adapter);
3504                 mrqc |= rss_field;
3505                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3506         }
3507 }
3508
3509 /**
3510  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3511  * @adapter:    address of board private structure
3512  * @index:      index of ring to set
3513  **/
3514 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3515                                    struct ixgbe_ring *ring)
3516 {
3517         struct ixgbe_hw *hw = &adapter->hw;
3518         u32 rscctrl;
3519         u8 reg_idx = ring->reg_idx;
3520
3521         if (!ring_is_rsc_enabled(ring))
3522                 return;
3523
3524         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3525         rscctrl |= IXGBE_RSCCTL_RSCEN;
3526         /*
3527          * we must limit the number of descriptors so that the
3528          * total size of max desc * buf_len is not greater
3529          * than 65536
3530          */
3531         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3532         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3533 }
3534
3535 #define IXGBE_MAX_RX_DESC_POLL 10
3536 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3537                                        struct ixgbe_ring *ring)
3538 {
3539         struct ixgbe_hw *hw = &adapter->hw;
3540         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3541         u32 rxdctl;
3542         u8 reg_idx = ring->reg_idx;
3543
3544         if (ixgbe_removed(hw->hw_addr))
3545                 return;
3546         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3547         if (hw->mac.type == ixgbe_mac_82598EB &&
3548             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3549                 return;
3550
3551         do {
3552                 usleep_range(1000, 2000);
3553                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3554         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3555
3556         if (!wait_loop) {
3557                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3558                       "the polling period\n", reg_idx);
3559         }
3560 }
3561
3562 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3563                             struct ixgbe_ring *ring)
3564 {
3565         struct ixgbe_hw *hw = &adapter->hw;
3566         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3567         u32 rxdctl;
3568         u8 reg_idx = ring->reg_idx;
3569
3570         if (ixgbe_removed(hw->hw_addr))
3571                 return;
3572         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3573         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3574
3575         /* write value back with RXDCTL.ENABLE bit cleared */
3576         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3577
3578         if (hw->mac.type == ixgbe_mac_82598EB &&
3579             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3580                 return;
3581
3582         /* the hardware may take up to 100us to really disable the rx queue */
3583         do {
3584                 udelay(10);
3585                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3586         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3587
3588         if (!wait_loop) {
3589                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3590                       "the polling period\n", reg_idx);
3591         }
3592 }
3593
3594 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3595                              struct ixgbe_ring *ring)
3596 {
3597         struct ixgbe_hw *hw = &adapter->hw;
3598         u64 rdba = ring->dma;
3599         u32 rxdctl;
3600         u8 reg_idx = ring->reg_idx;
3601
3602         /* disable queue to avoid issues while updating state */
3603         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3604         ixgbe_disable_rx_queue(adapter, ring);
3605
3606         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3607         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3608         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3609                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3610         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3611         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3612         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3613
3614         ixgbe_configure_srrctl(adapter, ring);
3615         ixgbe_configure_rscctl(adapter, ring);
3616
3617         if (hw->mac.type == ixgbe_mac_82598EB) {
3618                 /*
3619                  * enable cache line friendly hardware writes:
3620                  * PTHRESH=32 descriptors (half the internal cache),
3621                  * this also removes ugly rx_no_buffer_count increment
3622                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3623                  * WTHRESH=8 burst writeback up to two cache lines
3624                  */
3625                 rxdctl &= ~0x3FFFFF;
3626                 rxdctl |=  0x080420;
3627         }
3628
3629         /* enable receive descriptor ring */
3630         rxdctl |= IXGBE_RXDCTL_ENABLE;
3631         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3632
3633         ixgbe_rx_desc_queue_enable(adapter, ring);
3634         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3635 }
3636
3637 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3638 {
3639         struct ixgbe_hw *hw = &adapter->hw;
3640         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3641         u16 pool;
3642
3643         /* PSRTYPE must be initialized in non 82598 adapters */
3644         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3645                       IXGBE_PSRTYPE_UDPHDR |
3646                       IXGBE_PSRTYPE_IPV4HDR |
3647                       IXGBE_PSRTYPE_L2HDR |
3648                       IXGBE_PSRTYPE_IPV6HDR;
3649
3650         if (hw->mac.type == ixgbe_mac_82598EB)
3651                 return;
3652
3653         if (rss_i > 3)
3654                 psrtype |= 2 << 29;
3655         else if (rss_i > 1)
3656                 psrtype |= 1 << 29;
3657
3658         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3659                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3660 }
3661
3662 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3663 {
3664         struct ixgbe_hw *hw = &adapter->hw;
3665         u32 reg_offset, vf_shift;
3666         u32 gcr_ext, vmdctl;
3667         int i;
3668
3669         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3670                 return;
3671
3672         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3673         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3674         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3675         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3676         vmdctl |= IXGBE_VT_CTL_REPLEN;
3677         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3678
3679         vf_shift = VMDQ_P(0) % 32;
3680         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3681
3682         /* Enable only the PF's pool for Tx/Rx */
3683         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3684         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3685         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3686         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3687         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3688                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3689
3690         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3691         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3692
3693         /*
3694          * Set up VF register offsets for selected VT Mode,
3695          * i.e. 32 or 64 VFs for SR-IOV
3696          */
3697         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3698         case IXGBE_82599_VMDQ_8Q_MASK:
3699                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3700                 break;
3701         case IXGBE_82599_VMDQ_4Q_MASK:
3702                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3703                 break;
3704         default:
3705                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3706                 break;
3707         }
3708
3709         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3710
3711
3712         /* Enable MAC Anti-Spoofing */
3713         hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3714                                           adapter->num_vfs);
3715
3716         /* Ensure LLDP is set for Ethertype Antispoofing if we will be
3717          * calling set_ethertype_anti_spoofing for each VF in loop below
3718          */
3719         if (hw->mac.ops.set_ethertype_anti_spoofing)
3720                 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3721                                 (IXGBE_ETQF_FILTER_EN    | /* enable filter */
3722                                  IXGBE_ETQF_TX_ANTISPOOF | /* tx antispoof */
3723                                  IXGBE_ETH_P_LLDP));       /* LLDP eth type */
3724
3725         /* For VFs that have spoof checking turned off */
3726         for (i = 0; i < adapter->num_vfs; i++) {
3727                 if (!adapter->vfinfo[i].spoofchk_enabled)
3728                         ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3729
3730                 /* enable ethertype anti spoofing if hw supports it */
3731                 if (hw->mac.ops.set_ethertype_anti_spoofing)
3732                         hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3733
3734                 /* Enable/Disable RSS query feature  */
3735                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3736                                           adapter->vfinfo[i].rss_query_enabled);
3737         }
3738 }
3739
3740 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3741 {
3742         struct ixgbe_hw *hw = &adapter->hw;
3743         struct net_device *netdev = adapter->netdev;
3744         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3745         struct ixgbe_ring *rx_ring;
3746         int i;
3747         u32 mhadd, hlreg0;
3748
3749 #ifdef IXGBE_FCOE
3750         /* adjust max frame to be able to do baby jumbo for FCoE */
3751         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3752             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3753                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3754
3755 #endif /* IXGBE_FCOE */
3756
3757         /* adjust max frame to be at least the size of a standard frame */
3758         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3759                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3760
3761         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3762         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3763                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3764                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3765
3766                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3767         }
3768
3769         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3770         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3771         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3772         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3773
3774         /*
3775          * Setup the HW Rx Head and Tail Descriptor Pointers and
3776          * the Base and Length of the Rx Descriptor Ring
3777          */
3778         for (i = 0; i < adapter->num_rx_queues; i++) {
3779                 rx_ring = adapter->rx_ring[i];
3780                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3781                         set_ring_rsc_enabled(rx_ring);
3782                 else
3783                         clear_ring_rsc_enabled(rx_ring);
3784         }
3785 }
3786
3787 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3788 {
3789         struct ixgbe_hw *hw = &adapter->hw;
3790         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3791
3792         switch (hw->mac.type) {
3793         case ixgbe_mac_82598EB:
3794                 /*
3795                  * For VMDq support of different descriptor types or
3796                  * buffer sizes through the use of multiple SRRCTL
3797                  * registers, RDRXCTL.MVMEN must be set to 1
3798                  *
3799                  * also, the manual doesn't mention it clearly but DCA hints
3800                  * will only use queue 0's tags unless this bit is set.  Side
3801                  * effects of setting this bit are only that SRRCTL must be
3802                  * fully programmed [0..15]
3803                  */
3804                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3805                 break;
3806         case ixgbe_mac_X550:
3807         case ixgbe_mac_X550EM_x:
3808                 if (adapter->num_vfs)
3809                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3810                 /* fall through for older HW */
3811         case ixgbe_mac_82599EB:
3812         case ixgbe_mac_X540:
3813                 /* Disable RSC for ACK packets */
3814                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3815                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3816                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3817                 /* hardware requires some bits to be set by default */
3818                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3819                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3820                 break;
3821         default:
3822                 /* We should do nothing since we don't know this hardware */
3823                 return;
3824         }
3825
3826         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3827 }
3828
3829 /**
3830  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3831  * @adapter: board private structure
3832  *
3833  * Configure the Rx unit of the MAC after a reset.
3834  **/
3835 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3836 {
3837         struct ixgbe_hw *hw = &adapter->hw;
3838         int i;
3839         u32 rxctrl, rfctl;
3840
3841         /* disable receives while setting up the descriptors */
3842         hw->mac.ops.disable_rx(hw);
3843
3844         ixgbe_setup_psrtype(adapter);
3845         ixgbe_setup_rdrxctl(adapter);
3846
3847         /* RSC Setup */
3848         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3849         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3850         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3851                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3852         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3853
3854         /* Program registers for the distribution of queues */
3855         ixgbe_setup_mrqc(adapter);
3856
3857         /* set_rx_buffer_len must be called before ring initialization */
3858         ixgbe_set_rx_buffer_len(adapter);
3859
3860         /*
3861          * Setup the HW Rx Head and Tail Descriptor Pointers and
3862          * the Base and Length of the Rx Descriptor Ring
3863          */
3864         for (i = 0; i < adapter->num_rx_queues; i++)
3865                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3866
3867         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3868         /* disable drop enable for 82598 parts */
3869         if (hw->mac.type == ixgbe_mac_82598EB)
3870                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3871
3872         /* enable all receives */
3873         rxctrl |= IXGBE_RXCTRL_RXEN;
3874         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3875 }
3876
3877 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3878                                  __be16 proto, u16 vid)
3879 {
3880         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3881         struct ixgbe_hw *hw = &adapter->hw;
3882
3883         /* add VID to filter table */
3884         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3885         set_bit(vid, adapter->active_vlans);
3886
3887         return 0;
3888 }
3889
3890 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3891                                   __be16 proto, u16 vid)
3892 {
3893         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3894         struct ixgbe_hw *hw = &adapter->hw;
3895
3896         /* remove VID from filter table */
3897         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3898         clear_bit(vid, adapter->active_vlans);
3899
3900         return 0;
3901 }
3902
3903 /**
3904  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3905  * @adapter: driver data
3906  */
3907 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3908 {
3909         struct ixgbe_hw *hw = &adapter->hw;
3910         u32 vlnctrl;
3911         int i, j;
3912
3913         switch (hw->mac.type) {
3914         case ixgbe_mac_82598EB:
3915                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3916                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3917                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3918                 break;
3919         case ixgbe_mac_82599EB:
3920         case ixgbe_mac_X540:
3921         case ixgbe_mac_X550:
3922         case ixgbe_mac_X550EM_x:
3923                 for (i = 0; i < adapter->num_rx_queues; i++) {
3924                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3925
3926                         if (ring->l2_accel_priv)
3927                                 continue;
3928                         j = ring->reg_idx;
3929                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3930                         vlnctrl &= ~IXGBE_RXDCTL_VME;
3931                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3932                 }
3933                 break;
3934         default:
3935                 break;
3936         }
3937 }
3938
3939 /**
3940  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3941  * @adapter: driver data
3942  */
3943 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3944 {
3945         struct ixgbe_hw *hw = &adapter->hw;
3946         u32 vlnctrl;
3947         int i, j;
3948
3949         switch (hw->mac.type) {
3950         case ixgbe_mac_82598EB:
3951                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3952                 vlnctrl |= IXGBE_VLNCTRL_VME;
3953                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3954                 break;
3955         case ixgbe_mac_82599EB:
3956         case ixgbe_mac_X540:
3957         case ixgbe_mac_X550:
3958         case ixgbe_mac_X550EM_x:
3959                 for (i = 0; i < adapter->num_rx_queues; i++) {
3960                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3961
3962                         if (ring->l2_accel_priv)
3963                                 continue;
3964                         j = ring->reg_idx;
3965                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3966                         vlnctrl |= IXGBE_RXDCTL_VME;
3967                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3968                 }
3969                 break;
3970         default:
3971                 break;
3972         }
3973 }
3974
3975 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3976 {
3977         u16 vid;
3978
3979         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3980
3981         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3982                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3983 }
3984
3985 /**
3986  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3987  * @netdev: network interface device structure
3988  *
3989  * Writes multicast address list to the MTA hash table.
3990  * Returns: -ENOMEM on failure
3991  *                0 on no addresses written
3992  *                X on writing X addresses to MTA
3993  **/
3994 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3995 {
3996         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3997         struct ixgbe_hw *hw = &adapter->hw;
3998
3999         if (!netif_running(netdev))
4000                 return 0;
4001
4002         if (hw->mac.ops.update_mc_addr_list)
4003                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4004         else
4005                 return -ENOMEM;
4006
4007 #ifdef CONFIG_PCI_IOV
4008         ixgbe_restore_vf_multicasts(adapter);
4009 #endif
4010
4011         return netdev_mc_count(netdev);
4012 }
4013
4014 #ifdef CONFIG_PCI_IOV
4015 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4016 {
4017         struct ixgbe_hw *hw = &adapter->hw;
4018         int i;
4019         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4020                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4021                         hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4022                                             adapter->mac_table[i].queue,
4023                                             IXGBE_RAH_AV);
4024                 else
4025                         hw->mac.ops.clear_rar(hw, i);
4026
4027                 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4028         }
4029 }
4030 #endif
4031
4032 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4033 {
4034         struct ixgbe_hw *hw = &adapter->hw;
4035         int i;
4036         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4037                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4038                         if (adapter->mac_table[i].state &
4039                             IXGBE_MAC_STATE_IN_USE)
4040                                 hw->mac.ops.set_rar(hw, i,
4041                                                 adapter->mac_table[i].addr,
4042                                                 adapter->mac_table[i].queue,
4043                                                 IXGBE_RAH_AV);
4044                         else
4045                                 hw->mac.ops.clear_rar(hw, i);
4046
4047                         adapter->mac_table[i].state &=
4048                                                 ~(IXGBE_MAC_STATE_MODIFIED);
4049                 }
4050         }
4051 }
4052
4053 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4054 {
4055         int i;
4056         struct ixgbe_hw *hw = &adapter->hw;
4057
4058         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4059                 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4060                 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4061                 eth_zero_addr(adapter->mac_table[i].addr);
4062                 adapter->mac_table[i].queue = 0;
4063         }
4064         ixgbe_sync_mac_table(adapter);
4065 }
4066
4067 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4068 {
4069         struct ixgbe_hw *hw = &adapter->hw;
4070         int i, count = 0;
4071
4072         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4073                 if (adapter->mac_table[i].state == 0)
4074                         count++;
4075         }
4076         return count;
4077 }
4078
4079 /* this function destroys the first RAR entry */
4080 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4081                                          u8 *addr)
4082 {
4083         struct ixgbe_hw *hw = &adapter->hw;
4084
4085         memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4086         adapter->mac_table[0].queue = VMDQ_P(0);
4087         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4088                                        IXGBE_MAC_STATE_IN_USE);
4089         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4090                             adapter->mac_table[0].queue,
4091                             IXGBE_RAH_AV);
4092 }
4093
4094 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4095 {
4096         struct ixgbe_hw *hw = &adapter->hw;
4097         int i;
4098
4099         if (is_zero_ether_addr(addr))
4100                 return -EINVAL;
4101
4102         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4103                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4104                         continue;
4105                 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4106                                                 IXGBE_MAC_STATE_IN_USE);
4107                 ether_addr_copy(adapter->mac_table[i].addr, addr);
4108                 adapter->mac_table[i].queue = queue;
4109                 ixgbe_sync_mac_table(adapter);
4110                 return i;
4111         }
4112         return -ENOMEM;
4113 }
4114
4115 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4116 {
4117         /* search table for addr, if found, set to 0 and sync */
4118         int i;
4119         struct ixgbe_hw *hw = &adapter->hw;
4120
4121         if (is_zero_ether_addr(addr))
4122                 return -EINVAL;
4123
4124         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4125                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4126                     adapter->mac_table[i].queue == queue) {
4127                         adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4128                         adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4129                         eth_zero_addr(adapter->mac_table[i].addr);
4130                         adapter->mac_table[i].queue = 0;
4131                         ixgbe_sync_mac_table(adapter);
4132                         return 0;
4133                 }
4134         }
4135         return -ENOMEM;
4136 }
4137 /**
4138  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4139  * @netdev: network interface device structure
4140  *
4141  * Writes unicast address list to the RAR table.
4142  * Returns: -ENOMEM on failure/insufficient address space
4143  *                0 on no addresses written
4144  *                X on writing X addresses to the RAR table
4145  **/
4146 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4147 {
4148         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4149         int count = 0;
4150
4151         /* return ENOMEM indicating insufficient memory for addresses */
4152         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4153                 return -ENOMEM;
4154
4155         if (!netdev_uc_empty(netdev)) {
4156                 struct netdev_hw_addr *ha;
4157                 netdev_for_each_uc_addr(ha, netdev) {
4158                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4159                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4160                         count++;
4161                 }
4162         }
4163         return count;
4164 }
4165
4166 /**
4167  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4168  * @netdev: network interface device structure
4169  *
4170  * The set_rx_method entry point is called whenever the unicast/multicast
4171  * address list or the network interface flags are updated.  This routine is
4172  * responsible for configuring the hardware for proper unicast, multicast and
4173  * promiscuous mode.
4174  **/
4175 void ixgbe_set_rx_mode(struct net_device *netdev)
4176 {
4177         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4178         struct ixgbe_hw *hw = &adapter->hw;
4179         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4180         u32 vlnctrl;
4181         int count;
4182
4183         /* Check for Promiscuous and All Multicast modes */
4184         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4185         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4186
4187         /* set all bits that we expect to always be set */
4188         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4189         fctrl |= IXGBE_FCTRL_BAM;
4190         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4191         fctrl |= IXGBE_FCTRL_PMCF;
4192
4193         /* clear the bits we are changing the status of */
4194         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4195         vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4196         if (netdev->flags & IFF_PROMISC) {
4197                 hw->addr_ctrl.user_set_promisc = true;
4198                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4199                 vmolr |= IXGBE_VMOLR_MPE;
4200                 /* Only disable hardware filter vlans in promiscuous mode
4201                  * if SR-IOV and VMDQ are disabled - otherwise ensure
4202                  * that hardware VLAN filters remain enabled.
4203                  */
4204                 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4205                                       IXGBE_FLAG_SRIOV_ENABLED))
4206                         vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4207         } else {
4208                 if (netdev->flags & IFF_ALLMULTI) {
4209                         fctrl |= IXGBE_FCTRL_MPE;
4210                         vmolr |= IXGBE_VMOLR_MPE;
4211                 }
4212                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4213                 hw->addr_ctrl.user_set_promisc = false;
4214         }
4215
4216         /*
4217          * Write addresses to available RAR registers, if there is not
4218          * sufficient space to store all the addresses then enable
4219          * unicast promiscuous mode
4220          */
4221         count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4222         if (count < 0) {
4223                 fctrl |= IXGBE_FCTRL_UPE;
4224                 vmolr |= IXGBE_VMOLR_ROPE;
4225         }
4226
4227         /* Write addresses to the MTA, if the attempt fails
4228          * then we should just turn on promiscuous mode so
4229          * that we can at least receive multicast traffic
4230          */
4231         count = ixgbe_write_mc_addr_list(netdev);
4232         if (count < 0) {
4233                 fctrl |= IXGBE_FCTRL_MPE;
4234                 vmolr |= IXGBE_VMOLR_MPE;
4235         } else if (count) {
4236                 vmolr |= IXGBE_VMOLR_ROMPE;
4237         }
4238
4239         if (hw->mac.type != ixgbe_mac_82598EB) {
4240                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4241                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4242                            IXGBE_VMOLR_ROPE);
4243                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4244         }
4245
4246         /* This is useful for sniffing bad packets. */
4247         if (adapter->netdev->features & NETIF_F_RXALL) {
4248                 /* UPE and MPE will be handled by normal PROMISC logic
4249                  * in e1000e_set_rx_mode */
4250                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4251                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4252                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4253
4254                 fctrl &= ~(IXGBE_FCTRL_DPF);
4255                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4256         }
4257
4258         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4259         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4260
4261         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4262                 ixgbe_vlan_strip_enable(adapter);
4263         else
4264                 ixgbe_vlan_strip_disable(adapter);
4265 }
4266
4267 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4268 {
4269         int q_idx;
4270
4271         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4272                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4273                 napi_enable(&adapter->q_vector[q_idx]->napi);
4274         }
4275 }
4276
4277 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4278 {
4279         int q_idx;
4280
4281         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4282                 napi_disable(&adapter->q_vector[q_idx]->napi);
4283                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4284                         pr_info("QV %d locked\n", q_idx);
4285                         usleep_range(1000, 20000);
4286                 }
4287         }
4288 }
4289
4290 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4291 {
4292         switch (adapter->hw.mac.type) {
4293         case ixgbe_mac_X550:
4294         case ixgbe_mac_X550EM_x:
4295                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4296 #ifdef CONFIG_IXGBE_VXLAN
4297                 adapter->vxlan_port = 0;
4298 #endif
4299                 break;
4300         default:
4301                 break;
4302         }
4303 }
4304
4305 #ifdef CONFIG_IXGBE_DCB
4306 /**
4307  * ixgbe_configure_dcb - Configure DCB hardware
4308  * @adapter: ixgbe adapter struct
4309  *
4310  * This is called by the driver on open to configure the DCB hardware.
4311  * This is also called by the gennetlink interface when reconfiguring
4312  * the DCB state.
4313  */
4314 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4315 {
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4318
4319         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4320                 if (hw->mac.type == ixgbe_mac_82598EB)
4321                         netif_set_gso_max_size(adapter->netdev, 65536);
4322                 return;
4323         }
4324
4325         if (hw->mac.type == ixgbe_mac_82598EB)
4326                 netif_set_gso_max_size(adapter->netdev, 32768);
4327
4328 #ifdef IXGBE_FCOE
4329         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4330                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4331 #endif
4332
4333         /* reconfigure the hardware */
4334         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4335                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4336                                                 DCB_TX_CONFIG);
4337                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4338                                                 DCB_RX_CONFIG);
4339                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4340         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4341                 ixgbe_dcb_hw_ets(&adapter->hw,
4342                                  adapter->ixgbe_ieee_ets,
4343                                  max_frame);
4344                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4345                                         adapter->ixgbe_ieee_pfc->pfc_en,
4346                                         adapter->ixgbe_ieee_ets->prio_tc);
4347         }
4348
4349         /* Enable RSS Hash per TC */
4350         if (hw->mac.type != ixgbe_mac_82598EB) {
4351                 u32 msb = 0;
4352                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4353
4354                 while (rss_i) {
4355                         msb++;
4356                         rss_i >>= 1;
4357                 }
4358
4359                 /* write msb to all 8 TCs in one write */
4360                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4361         }
4362 }
4363 #endif
4364
4365 /* Additional bittime to account for IXGBE framing */
4366 #define IXGBE_ETH_FRAMING 20
4367
4368 /**
4369  * ixgbe_hpbthresh - calculate high water mark for flow control
4370  *
4371  * @adapter: board private structure to calculate for
4372  * @pb: packet buffer to calculate
4373  */
4374 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4375 {
4376         struct ixgbe_hw *hw = &adapter->hw;
4377         struct net_device *dev = adapter->netdev;
4378         int link, tc, kb, marker;
4379         u32 dv_id, rx_pba;
4380
4381         /* Calculate max LAN frame size */
4382         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4383
4384 #ifdef IXGBE_FCOE
4385         /* FCoE traffic class uses FCOE jumbo frames */
4386         if ((dev->features & NETIF_F_FCOE_MTU) &&
4387             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4388             (pb == ixgbe_fcoe_get_tc(adapter)))
4389                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4390 #endif
4391
4392         /* Calculate delay value for device */
4393         switch (hw->mac.type) {
4394         case ixgbe_mac_X540:
4395         case ixgbe_mac_X550:
4396         case ixgbe_mac_X550EM_x:
4397                 dv_id = IXGBE_DV_X540(link, tc);
4398                 break;
4399         default:
4400                 dv_id = IXGBE_DV(link, tc);
4401                 break;
4402         }
4403
4404         /* Loopback switch introduces additional latency */
4405         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4406                 dv_id += IXGBE_B2BT(tc);
4407
4408         /* Delay value is calculated in bit times convert to KB */
4409         kb = IXGBE_BT2KB(dv_id);
4410         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4411
4412         marker = rx_pba - kb;
4413
4414         /* It is possible that the packet buffer is not large enough
4415          * to provide required headroom. In this case throw an error
4416          * to user and a do the best we can.
4417          */
4418         if (marker < 0) {
4419                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4420                             "headroom to support flow control."
4421                             "Decrease MTU or number of traffic classes\n", pb);
4422                 marker = tc + 1;
4423         }
4424
4425         return marker;
4426 }
4427
4428 /**
4429  * ixgbe_lpbthresh - calculate low water mark for for flow control
4430  *
4431  * @adapter: board private structure to calculate for
4432  * @pb: packet buffer to calculate
4433  */
4434 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4435 {
4436         struct ixgbe_hw *hw = &adapter->hw;
4437         struct net_device *dev = adapter->netdev;
4438         int tc;
4439         u32 dv_id;
4440
4441         /* Calculate max LAN frame size */
4442         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4443
4444 #ifdef IXGBE_FCOE
4445         /* FCoE traffic class uses FCOE jumbo frames */
4446         if ((dev->features & NETIF_F_FCOE_MTU) &&
4447             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4448             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4449                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4450 #endif
4451
4452         /* Calculate delay value for device */
4453         switch (hw->mac.type) {
4454         case ixgbe_mac_X540:
4455         case ixgbe_mac_X550:
4456         case ixgbe_mac_X550EM_x:
4457                 dv_id = IXGBE_LOW_DV_X540(tc);
4458                 break;
4459         default:
4460                 dv_id = IXGBE_LOW_DV(tc);
4461                 break;
4462         }
4463
4464         /* Delay value is calculated in bit times convert to KB */
4465         return IXGBE_BT2KB(dv_id);
4466 }
4467
4468 /*
4469  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4470  */
4471 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4472 {
4473         struct ixgbe_hw *hw = &adapter->hw;
4474         int num_tc = netdev_get_num_tc(adapter->netdev);
4475         int i;
4476
4477         if (!num_tc)
4478                 num_tc = 1;
4479
4480         for (i = 0; i < num_tc; i++) {
4481                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4482                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4483
4484                 /* Low water marks must not be larger than high water marks */
4485                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4486                         hw->fc.low_water[i] = 0;
4487         }
4488
4489         for (; i < MAX_TRAFFIC_CLASS; i++)
4490                 hw->fc.high_water[i] = 0;
4491 }
4492
4493 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4494 {
4495         struct ixgbe_hw *hw = &adapter->hw;
4496         int hdrm;
4497         u8 tc = netdev_get_num_tc(adapter->netdev);
4498
4499         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4500             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4501                 hdrm = 32 << adapter->fdir_pballoc;
4502         else
4503                 hdrm = 0;
4504
4505         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4506         ixgbe_pbthresh_setup(adapter);
4507 }
4508
4509 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4510 {
4511         struct ixgbe_hw *hw = &adapter->hw;
4512         struct hlist_node *node2;
4513         struct ixgbe_fdir_filter *filter;
4514
4515         spin_lock(&adapter->fdir_perfect_lock);
4516
4517         if (!hlist_empty(&adapter->fdir_filter_list))
4518                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4519
4520         hlist_for_each_entry_safe(filter, node2,
4521                                   &adapter->fdir_filter_list, fdir_node) {
4522                 ixgbe_fdir_write_perfect_filter_82599(hw,
4523                                 &filter->filter,
4524                                 filter->sw_idx,
4525                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4526                                 IXGBE_FDIR_DROP_QUEUE :
4527                                 adapter->rx_ring[filter->action]->reg_idx);
4528         }
4529
4530         spin_unlock(&adapter->fdir_perfect_lock);
4531 }
4532
4533 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4534                                       struct ixgbe_adapter *adapter)
4535 {
4536         struct ixgbe_hw *hw = &adapter->hw;
4537         u32 vmolr;
4538
4539         /* No unicast promiscuous support for VMDQ devices. */
4540         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4541         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4542
4543         /* clear the affected bit */
4544         vmolr &= ~IXGBE_VMOLR_MPE;
4545
4546         if (dev->flags & IFF_ALLMULTI) {
4547                 vmolr |= IXGBE_VMOLR_MPE;
4548         } else {
4549                 vmolr |= IXGBE_VMOLR_ROMPE;
4550                 hw->mac.ops.update_mc_addr_list(hw, dev);
4551         }
4552         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4553         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4554 }
4555
4556 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4557 {
4558         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4559         int rss_i = adapter->num_rx_queues_per_pool;
4560         struct ixgbe_hw *hw = &adapter->hw;
4561         u16 pool = vadapter->pool;
4562         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4563                       IXGBE_PSRTYPE_UDPHDR |
4564                       IXGBE_PSRTYPE_IPV4HDR |
4565                       IXGBE_PSRTYPE_L2HDR |
4566                       IXGBE_PSRTYPE_IPV6HDR;
4567
4568         if (hw->mac.type == ixgbe_mac_82598EB)
4569                 return;
4570
4571         if (rss_i > 3)
4572                 psrtype |= 2 << 29;
4573         else if (rss_i > 1)
4574                 psrtype |= 1 << 29;
4575
4576         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4577 }
4578
4579 /**
4580  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4581  * @rx_ring: ring to free buffers from
4582  **/
4583 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4584 {
4585         struct device *dev = rx_ring->dev;
4586         unsigned long size;
4587         u16 i;
4588
4589         /* ring already cleared, nothing to do */
4590         if (!rx_ring->rx_buffer_info)
4591                 return;
4592
4593         /* Free all the Rx ring sk_buffs */
4594         for (i = 0; i < rx_ring->count; i++) {
4595                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4596
4597                 if (rx_buffer->skb) {
4598                         struct sk_buff *skb = rx_buffer->skb;
4599                         if (IXGBE_CB(skb)->page_released)
4600                                 dma_unmap_page(dev,
4601                                                IXGBE_CB(skb)->dma,
4602                                                ixgbe_rx_bufsz(rx_ring),
4603                                                DMA_FROM_DEVICE);
4604                         dev_kfree_skb(skb);
4605                         rx_buffer->skb = NULL;
4606                 }
4607
4608                 if (!rx_buffer->page)
4609                         continue;
4610
4611                 dma_unmap_page(dev, rx_buffer->dma,
4612                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4613                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4614
4615                 rx_buffer->page = NULL;
4616         }
4617
4618         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4619         memset(rx_ring->rx_buffer_info, 0, size);
4620
4621         /* Zero out the descriptor ring */
4622         memset(rx_ring->desc, 0, rx_ring->size);
4623
4624         rx_ring->next_to_alloc = 0;
4625         rx_ring->next_to_clean = 0;
4626         rx_ring->next_to_use = 0;
4627 }
4628
4629 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4630                                    struct ixgbe_ring *rx_ring)
4631 {
4632         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4633         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4634
4635         /* shutdown specific queue receive and wait for dma to settle */
4636         ixgbe_disable_rx_queue(adapter, rx_ring);
4637         usleep_range(10000, 20000);
4638         ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4639         ixgbe_clean_rx_ring(rx_ring);
4640         rx_ring->l2_accel_priv = NULL;
4641 }
4642
4643 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4644                                struct ixgbe_fwd_adapter *accel)
4645 {
4646         struct ixgbe_adapter *adapter = accel->real_adapter;
4647         unsigned int rxbase = accel->rx_base_queue;
4648         unsigned int txbase = accel->tx_base_queue;
4649         int i;
4650
4651         netif_tx_stop_all_queues(vdev);
4652
4653         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4654                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4655                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4656         }
4657
4658         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4659                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4660                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4661         }
4662
4663
4664         return 0;
4665 }
4666
4667 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4668                              struct ixgbe_fwd_adapter *accel)
4669 {
4670         struct ixgbe_adapter *adapter = accel->real_adapter;
4671         unsigned int rxbase, txbase, queues;
4672         int i, baseq, err = 0;
4673
4674         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4675                 return 0;
4676
4677         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4678         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4679                    accel->pool, adapter->num_rx_pools,
4680                    baseq, baseq + adapter->num_rx_queues_per_pool,
4681                    adapter->fwd_bitmask);
4682
4683         accel->netdev = vdev;
4684         accel->rx_base_queue = rxbase = baseq;
4685         accel->tx_base_queue = txbase = baseq;
4686
4687         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4688                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4689
4690         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4691                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4692                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4693                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4694         }
4695
4696         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4697                 adapter->tx_ring[txbase + i]->netdev = vdev;
4698                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4699         }
4700
4701         queues = min_t(unsigned int,
4702                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4703         err = netif_set_real_num_tx_queues(vdev, queues);
4704         if (err)
4705                 goto fwd_queue_err;
4706
4707         err = netif_set_real_num_rx_queues(vdev, queues);
4708         if (err)
4709                 goto fwd_queue_err;
4710
4711         if (is_valid_ether_addr(vdev->dev_addr))
4712                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4713
4714         ixgbe_fwd_psrtype(accel);
4715         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4716         return err;
4717 fwd_queue_err:
4718         ixgbe_fwd_ring_down(vdev, accel);
4719         return err;
4720 }
4721
4722 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4723 {
4724         struct net_device *upper;
4725         struct list_head *iter;
4726         int err;
4727
4728         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4729                 if (netif_is_macvlan(upper)) {
4730                         struct macvlan_dev *dfwd = netdev_priv(upper);
4731                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4732
4733                         if (dfwd->fwd_priv) {
4734                                 err = ixgbe_fwd_ring_up(upper, vadapter);
4735                                 if (err)
4736                                         continue;
4737                         }
4738                 }
4739         }
4740 }
4741
4742 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4743 {
4744         struct ixgbe_hw *hw = &adapter->hw;
4745
4746         ixgbe_configure_pb(adapter);
4747 #ifdef CONFIG_IXGBE_DCB
4748         ixgbe_configure_dcb(adapter);
4749 #endif
4750         /*
4751          * We must restore virtualization before VLANs or else
4752          * the VLVF registers will not be populated
4753          */
4754         ixgbe_configure_virtualization(adapter);
4755
4756         ixgbe_set_rx_mode(adapter->netdev);
4757         ixgbe_restore_vlan(adapter);
4758
4759         switch (hw->mac.type) {
4760         case ixgbe_mac_82599EB:
4761         case ixgbe_mac_X540:
4762                 hw->mac.ops.disable_rx_buff(hw);
4763                 break;
4764         default:
4765                 break;
4766         }
4767
4768         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4769                 ixgbe_init_fdir_signature_82599(&adapter->hw,
4770                                                 adapter->fdir_pballoc);
4771         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4772                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4773                                               adapter->fdir_pballoc);
4774                 ixgbe_fdir_filter_restore(adapter);
4775         }
4776
4777         switch (hw->mac.type) {
4778         case ixgbe_mac_82599EB:
4779         case ixgbe_mac_X540:
4780                 hw->mac.ops.enable_rx_buff(hw);
4781                 break;
4782         default:
4783                 break;
4784         }
4785
4786 #ifdef IXGBE_FCOE
4787         /* configure FCoE L2 filters, redirection table, and Rx control */
4788         ixgbe_configure_fcoe(adapter);
4789
4790 #endif /* IXGBE_FCOE */
4791         ixgbe_configure_tx(adapter);
4792         ixgbe_configure_rx(adapter);
4793         ixgbe_configure_dfwd(adapter);
4794 }
4795
4796 /**
4797  * ixgbe_sfp_link_config - set up SFP+ link
4798  * @adapter: pointer to private adapter struct
4799  **/
4800 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4801 {
4802         /*
4803          * We are assuming the worst case scenario here, and that
4804          * is that an SFP was inserted/removed after the reset
4805          * but before SFP detection was enabled.  As such the best
4806          * solution is to just start searching as soon as we start
4807          */
4808         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4809                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4810
4811         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4812         adapter->sfp_poll_time = 0;
4813 }
4814
4815 /**
4816  * ixgbe_non_sfp_link_config - set up non-SFP+ link
4817  * @hw: pointer to private hardware struct
4818  *
4819  * Returns 0 on success, negative on failure
4820  **/
4821 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4822 {
4823         u32 speed;
4824         bool autoneg, link_up = false;
4825         int ret = IXGBE_ERR_LINK_SETUP;
4826
4827         if (hw->mac.ops.check_link)
4828                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4829
4830         if (ret)
4831                 return ret;
4832
4833         speed = hw->phy.autoneg_advertised;
4834         if ((!speed) && (hw->mac.ops.get_link_capabilities))
4835                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4836                                                         &autoneg);
4837         if (ret)
4838                 return ret;
4839
4840         if (hw->mac.ops.setup_link)
4841                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4842
4843         return ret;
4844 }
4845
4846 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4847 {
4848         struct ixgbe_hw *hw = &adapter->hw;
4849         u32 gpie = 0;
4850
4851         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4852                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4853                        IXGBE_GPIE_OCD;
4854                 gpie |= IXGBE_GPIE_EIAME;
4855                 /*
4856                  * use EIAM to auto-mask when MSI-X interrupt is asserted
4857                  * this saves a register write for every interrupt
4858                  */
4859                 switch (hw->mac.type) {
4860                 case ixgbe_mac_82598EB:
4861                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4862                         break;
4863                 case ixgbe_mac_82599EB:
4864                 case ixgbe_mac_X540:
4865                 case ixgbe_mac_X550:
4866                 case ixgbe_mac_X550EM_x:
4867                 default:
4868                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4869                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4870                         break;
4871                 }
4872         } else {
4873                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4874                  * specifically only auto mask tx and rx interrupts */
4875                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4876         }
4877
4878         /* XXX: to interrupt immediately for EICS writes, enable this */
4879         /* gpie |= IXGBE_GPIE_EIMEN; */
4880
4881         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4882                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4883
4884                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4885                 case IXGBE_82599_VMDQ_8Q_MASK:
4886                         gpie |= IXGBE_GPIE_VTMODE_16;
4887                         break;
4888                 case IXGBE_82599_VMDQ_4Q_MASK:
4889                         gpie |= IXGBE_GPIE_VTMODE_32;
4890                         break;
4891                 default:
4892                         gpie |= IXGBE_GPIE_VTMODE_64;
4893                         break;
4894                 }
4895         }
4896
4897         /* Enable Thermal over heat sensor interrupt */
4898         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4899                 switch (adapter->hw.mac.type) {
4900                 case ixgbe_mac_82599EB:
4901                         gpie |= IXGBE_SDP0_GPIEN_8259X;
4902                         break;
4903                 case ixgbe_mac_X540:
4904                         gpie |= IXGBE_EIMS_TS;
4905                         break;
4906                 default:
4907                         break;
4908                 }
4909         }
4910
4911         /* Enable fan failure interrupt */
4912         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4913                 gpie |= IXGBE_SDP1_GPIEN(hw);
4914
4915         switch (hw->mac.type) {
4916         case ixgbe_mac_82599EB:
4917                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
4918                 break;
4919         case ixgbe_mac_X550EM_x:
4920                 gpie |= IXGBE_SDP0_GPIEN_X540;
4921                 break;
4922         default:
4923                 break;
4924         }
4925
4926         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4927 }
4928
4929 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4930 {
4931         struct ixgbe_hw *hw = &adapter->hw;
4932         int err;
4933         u32 ctrl_ext;
4934
4935         ixgbe_get_hw_control(adapter);
4936         ixgbe_setup_gpie(adapter);
4937
4938         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4939                 ixgbe_configure_msix(adapter);
4940         else
4941                 ixgbe_configure_msi_and_legacy(adapter);
4942
4943         /* enable the optics for 82599 SFP+ fiber */
4944         if (hw->mac.ops.enable_tx_laser)
4945                 hw->mac.ops.enable_tx_laser(hw);
4946
4947         if (hw->phy.ops.set_phy_power)
4948                 hw->phy.ops.set_phy_power(hw, true);
4949
4950         smp_mb__before_atomic();
4951         clear_bit(__IXGBE_DOWN, &adapter->state);
4952         ixgbe_napi_enable_all(adapter);
4953
4954         if (ixgbe_is_sfp(hw)) {
4955                 ixgbe_sfp_link_config(adapter);
4956         } else {
4957                 err = ixgbe_non_sfp_link_config(hw);
4958                 if (err)
4959                         e_err(probe, "link_config FAILED %d\n", err);
4960         }
4961
4962         /* clear any pending interrupts, may auto mask */
4963         IXGBE_READ_REG(hw, IXGBE_EICR);
4964         ixgbe_irq_enable(adapter, true, true);
4965
4966         /*
4967          * If this adapter has a fan, check to see if we had a failure
4968          * before we enabled the interrupt.
4969          */
4970         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4971                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4972                 if (esdp & IXGBE_ESDP_SDP1)
4973                         e_crit(drv, "Fan has stopped, replace the adapter\n");
4974         }
4975
4976         /* bring the link up in the watchdog, this could race with our first
4977          * link up interrupt but shouldn't be a problem */
4978         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4979         adapter->link_check_timeout = jiffies;
4980         mod_timer(&adapter->service_timer, jiffies);
4981
4982         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4983         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4984         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4985         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4986 }
4987
4988 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4989 {
4990         WARN_ON(in_interrupt());
4991         /* put off any impending NetWatchDogTimeout */
4992         adapter->netdev->trans_start = jiffies;
4993
4994         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4995                 usleep_range(1000, 2000);
4996         ixgbe_down(adapter);
4997         /*
4998          * If SR-IOV enabled then wait a bit before bringing the adapter
4999          * back up to give the VFs time to respond to the reset.  The
5000          * two second wait is based upon the watchdog timer cycle in
5001          * the VF driver.
5002          */
5003         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5004                 msleep(2000);
5005         ixgbe_up(adapter);
5006         clear_bit(__IXGBE_RESETTING, &adapter->state);
5007 }
5008
5009 void ixgbe_up(struct ixgbe_adapter *adapter)
5010 {
5011         /* hardware has been reset, we need to reload some things */
5012         ixgbe_configure(adapter);
5013
5014         ixgbe_up_complete(adapter);
5015 }
5016
5017 void ixgbe_reset(struct ixgbe_adapter *adapter)
5018 {
5019         struct ixgbe_hw *hw = &adapter->hw;
5020         struct net_device *netdev = adapter->netdev;
5021         int err;
5022         u8 old_addr[ETH_ALEN];
5023
5024         if (ixgbe_removed(hw->hw_addr))
5025                 return;
5026         /* lock SFP init bit to prevent race conditions with the watchdog */
5027         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5028                 usleep_range(1000, 2000);
5029
5030         /* clear all SFP and link config related flags while holding SFP_INIT */
5031         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5032                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5033         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5034
5035         err = hw->mac.ops.init_hw(hw);
5036         switch (err) {
5037         case 0:
5038         case IXGBE_ERR_SFP_NOT_PRESENT:
5039         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5040                 break;
5041         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5042                 e_dev_err("master disable timed out\n");
5043                 break;
5044         case IXGBE_ERR_EEPROM_VERSION:
5045                 /* We are running on a pre-production device, log a warning */
5046                 e_dev_warn("This device is a pre-production adapter/LOM. "
5047                            "Please be aware there may be issues associated with "
5048                            "your hardware.  If you are experiencing problems "
5049                            "please contact your Intel or hardware "
5050                            "representative who provided you with this "
5051                            "hardware.\n");
5052                 break;
5053         default:
5054                 e_dev_err("Hardware Error: %d\n", err);
5055         }
5056
5057         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5058         /* do not flush user set addresses */
5059         memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5060         ixgbe_flush_sw_mac_table(adapter);
5061         ixgbe_mac_set_default_filter(adapter, old_addr);
5062
5063         /* update SAN MAC vmdq pool selection */
5064         if (hw->mac.san_mac_rar_index)
5065                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5066
5067         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5068                 ixgbe_ptp_reset(adapter);
5069
5070         if (hw->phy.ops.set_phy_power) {
5071                 if (!netif_running(adapter->netdev) && !adapter->wol)
5072                         hw->phy.ops.set_phy_power(hw, false);
5073                 else
5074                         hw->phy.ops.set_phy_power(hw, true);
5075         }
5076 }
5077
5078 /**
5079  * ixgbe_clean_tx_ring - Free Tx Buffers
5080  * @tx_ring: ring to be cleaned
5081  **/
5082 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5083 {
5084         struct ixgbe_tx_buffer *tx_buffer_info;
5085         unsigned long size;
5086         u16 i;
5087
5088         /* ring already cleared, nothing to do */
5089         if (!tx_ring->tx_buffer_info)
5090                 return;
5091
5092         /* Free all the Tx ring sk_buffs */
5093         for (i = 0; i < tx_ring->count; i++) {
5094                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5095                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5096         }
5097
5098         netdev_tx_reset_queue(txring_txq(tx_ring));
5099
5100         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5101         memset(tx_ring->tx_buffer_info, 0, size);
5102
5103         /* Zero out the descriptor ring */
5104         memset(tx_ring->desc, 0, tx_ring->size);
5105
5106         tx_ring->next_to_use = 0;
5107         tx_ring->next_to_clean = 0;
5108 }
5109
5110 /**
5111  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5112  * @adapter: board private structure
5113  **/
5114 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5115 {
5116         int i;
5117
5118         for (i = 0; i < adapter->num_rx_queues; i++)
5119                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5120 }
5121
5122 /**
5123  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5124  * @adapter: board private structure
5125  **/
5126 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5127 {
5128         int i;
5129
5130         for (i = 0; i < adapter->num_tx_queues; i++)
5131                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5132 }
5133
5134 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5135 {
5136         struct hlist_node *node2;
5137         struct ixgbe_fdir_filter *filter;
5138
5139         spin_lock(&adapter->fdir_perfect_lock);
5140
5141         hlist_for_each_entry_safe(filter, node2,
5142                                   &adapter->fdir_filter_list, fdir_node) {
5143                 hlist_del(&filter->fdir_node);
5144                 kfree(filter);
5145         }
5146         adapter->fdir_filter_count = 0;
5147
5148         spin_unlock(&adapter->fdir_perfect_lock);
5149 }
5150
5151 void ixgbe_down(struct ixgbe_adapter *adapter)
5152 {
5153         struct net_device *netdev = adapter->netdev;
5154         struct ixgbe_hw *hw = &adapter->hw;
5155         struct net_device *upper;
5156         struct list_head *iter;
5157         int i;
5158
5159         /* signal that we are down to the interrupt handler */
5160         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5161                 return; /* do nothing if already down */
5162
5163         /* disable receives */
5164         hw->mac.ops.disable_rx(hw);
5165
5166         /* disable all enabled rx queues */
5167         for (i = 0; i < adapter->num_rx_queues; i++)
5168                 /* this call also flushes the previous write */
5169                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5170
5171         usleep_range(10000, 20000);
5172
5173         netif_tx_stop_all_queues(netdev);
5174
5175         /* call carrier off first to avoid false dev_watchdog timeouts */
5176         netif_carrier_off(netdev);
5177         netif_tx_disable(netdev);
5178
5179         /* disable any upper devices */
5180         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5181                 if (netif_is_macvlan(upper)) {
5182                         struct macvlan_dev *vlan = netdev_priv(upper);
5183
5184                         if (vlan->fwd_priv) {
5185                                 netif_tx_stop_all_queues(upper);
5186                                 netif_carrier_off(upper);
5187                                 netif_tx_disable(upper);
5188                         }
5189                 }
5190         }
5191
5192         ixgbe_irq_disable(adapter);
5193
5194         ixgbe_napi_disable_all(adapter);
5195
5196         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5197                              IXGBE_FLAG2_RESET_REQUESTED);
5198         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5199
5200         del_timer_sync(&adapter->service_timer);
5201
5202         if (adapter->num_vfs) {
5203                 /* Clear EITR Select mapping */
5204                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5205
5206                 /* Mark all the VFs as inactive */
5207                 for (i = 0 ; i < adapter->num_vfs; i++)
5208                         adapter->vfinfo[i].clear_to_send = false;
5209
5210                 /* ping all the active vfs to let them know we are going down */
5211                 ixgbe_ping_all_vfs(adapter);
5212
5213                 /* Disable all VFTE/VFRE TX/RX */
5214                 ixgbe_disable_tx_rx(adapter);
5215         }
5216
5217         /* disable transmits in the hardware now that interrupts are off */
5218         for (i = 0; i < adapter->num_tx_queues; i++) {
5219                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5220                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5221         }
5222
5223         /* Disable the Tx DMA engine on 82599 and later MAC */
5224         switch (hw->mac.type) {
5225         case ixgbe_mac_82599EB:
5226         case ixgbe_mac_X540:
5227         case ixgbe_mac_X550:
5228         case ixgbe_mac_X550EM_x:
5229                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5230                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5231                                  ~IXGBE_DMATXCTL_TE));
5232                 break;
5233         default:
5234                 break;
5235         }
5236
5237         if (!pci_channel_offline(adapter->pdev))
5238                 ixgbe_reset(adapter);
5239
5240         /* power down the optics for 82599 SFP+ fiber */
5241         if (hw->mac.ops.disable_tx_laser)
5242                 hw->mac.ops.disable_tx_laser(hw);
5243
5244         ixgbe_clean_all_tx_rings(adapter);
5245         ixgbe_clean_all_rx_rings(adapter);
5246
5247 #ifdef CONFIG_IXGBE_DCA
5248         /* since we reset the hardware DCA settings were cleared */
5249         ixgbe_setup_dca(adapter);
5250 #endif
5251 }
5252
5253 /**
5254  * ixgbe_tx_timeout - Respond to a Tx Hang
5255  * @netdev: network interface device structure
5256  **/
5257 static void ixgbe_tx_timeout(struct net_device *netdev)
5258 {
5259         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5260
5261         /* Do the reset outside of interrupt context */
5262         ixgbe_tx_timeout_reset(adapter);
5263 }
5264
5265 /**
5266  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5267  * @adapter: board private structure to initialize
5268  *
5269  * ixgbe_sw_init initializes the Adapter private data structure.
5270  * Fields are initialized based on PCI device information and
5271  * OS network device settings (MTU size).
5272  **/
5273 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5274 {
5275         struct ixgbe_hw *hw = &adapter->hw;
5276         struct pci_dev *pdev = adapter->pdev;
5277         unsigned int rss, fdir;
5278         u32 fwsm;
5279 #ifdef CONFIG_IXGBE_DCB
5280         int j;
5281         struct tc_configuration *tc;
5282 #endif
5283
5284         /* PCI config space info */
5285
5286         hw->vendor_id = pdev->vendor;
5287         hw->device_id = pdev->device;
5288         hw->revision_id = pdev->revision;
5289         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5290         hw->subsystem_device_id = pdev->subsystem_device;
5291
5292         /* Set common capability flags and settings */
5293         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5294         adapter->ring_feature[RING_F_RSS].limit = rss;
5295         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5296         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5297         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5298         adapter->atr_sample_rate = 20;
5299         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5300         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5301         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5302 #ifdef CONFIG_IXGBE_DCA
5303         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5304 #endif
5305 #ifdef IXGBE_FCOE
5306         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5307         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5308 #ifdef CONFIG_IXGBE_DCB
5309         /* Default traffic class to use for FCoE */
5310         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5311 #endif /* CONFIG_IXGBE_DCB */
5312 #endif /* IXGBE_FCOE */
5313
5314         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5315                                      hw->mac.num_rar_entries,
5316                                      GFP_ATOMIC);
5317
5318         /* Set MAC specific capability flags and exceptions */
5319         switch (hw->mac.type) {
5320         case ixgbe_mac_82598EB:
5321                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5322                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5323
5324                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5325                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5326
5327                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5328                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5329                 adapter->atr_sample_rate = 0;
5330                 adapter->fdir_pballoc = 0;
5331 #ifdef IXGBE_FCOE
5332                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5333                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5334 #ifdef CONFIG_IXGBE_DCB
5335                 adapter->fcoe.up = 0;
5336 #endif /* IXGBE_DCB */
5337 #endif /* IXGBE_FCOE */
5338                 break;
5339         case ixgbe_mac_82599EB:
5340                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5341                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5342                 break;
5343         case ixgbe_mac_X540:
5344                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5345                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5346                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5347                 break;
5348         case ixgbe_mac_X550EM_x:
5349         case ixgbe_mac_X550:
5350 #ifdef CONFIG_IXGBE_DCA
5351                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5352 #endif
5353 #ifdef CONFIG_IXGBE_VXLAN
5354                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5355 #endif
5356                 break;
5357         default:
5358                 break;
5359         }
5360
5361 #ifdef IXGBE_FCOE
5362         /* FCoE support exists, always init the FCoE lock */
5363         spin_lock_init(&adapter->fcoe.lock);
5364
5365 #endif
5366         /* n-tuple support exists, always init our spinlock */
5367         spin_lock_init(&adapter->fdir_perfect_lock);
5368
5369 #ifdef CONFIG_IXGBE_DCB
5370         switch (hw->mac.type) {
5371         case ixgbe_mac_X540:
5372         case ixgbe_mac_X550:
5373         case ixgbe_mac_X550EM_x:
5374                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5375                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5376                 break;
5377         default:
5378                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5379                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5380                 break;
5381         }
5382
5383         /* Configure DCB traffic classes */
5384         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5385                 tc = &adapter->dcb_cfg.tc_config[j];
5386                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5387                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5388                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5389                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5390                 tc->dcb_pfc = pfc_disabled;
5391         }
5392
5393         /* Initialize default user to priority mapping, UPx->TC0 */
5394         tc = &adapter->dcb_cfg.tc_config[0];
5395         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5396         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5397
5398         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5399         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5400         adapter->dcb_cfg.pfc_mode_enable = false;
5401         adapter->dcb_set_bitmap = 0x00;
5402         adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5403         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5404                sizeof(adapter->temp_dcb_cfg));
5405
5406 #endif
5407
5408         /* default flow control settings */
5409         hw->fc.requested_mode = ixgbe_fc_full;
5410         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5411         ixgbe_pbthresh_setup(adapter);
5412         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5413         hw->fc.send_xon = true;
5414         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5415
5416 #ifdef CONFIG_PCI_IOV
5417         if (max_vfs > 0)
5418                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5419
5420         /* assign number of SR-IOV VFs */
5421         if (hw->mac.type != ixgbe_mac_82598EB) {
5422                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5423                         adapter->num_vfs = 0;
5424                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5425                 } else {
5426                         adapter->num_vfs = max_vfs;
5427                 }
5428         }
5429 #endif /* CONFIG_PCI_IOV */
5430
5431         /* enable itr by default in dynamic mode */
5432         adapter->rx_itr_setting = 1;
5433         adapter->tx_itr_setting = 1;
5434
5435         /* set default ring sizes */
5436         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5437         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5438
5439         /* set default work limits */
5440         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5441
5442         /* initialize eeprom parameters */
5443         if (ixgbe_init_eeprom_params_generic(hw)) {
5444                 e_dev_err("EEPROM initialization failed\n");
5445                 return -EIO;
5446         }
5447
5448         /* PF holds first pool slot */
5449         set_bit(0, &adapter->fwd_bitmask);
5450         set_bit(__IXGBE_DOWN, &adapter->state);
5451
5452         return 0;
5453 }
5454
5455 /**
5456  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5457  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5458  *
5459  * Return 0 on success, negative on failure
5460  **/
5461 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5462 {
5463         struct device *dev = tx_ring->dev;
5464         int orig_node = dev_to_node(dev);
5465         int ring_node = -1;
5466         int size;
5467
5468         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5469
5470         if (tx_ring->q_vector)
5471                 ring_node = tx_ring->q_vector->numa_node;
5472
5473         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5474         if (!tx_ring->tx_buffer_info)
5475                 tx_ring->tx_buffer_info = vzalloc(size);
5476         if (!tx_ring->tx_buffer_info)
5477                 goto err;
5478
5479         u64_stats_init(&tx_ring->syncp);
5480
5481         /* round up to nearest 4K */
5482         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5483         tx_ring->size = ALIGN(tx_ring->size, 4096);
5484
5485         set_dev_node(dev, ring_node);
5486         tx_ring->desc = dma_alloc_coherent(dev,
5487                                            tx_ring->size,
5488                                            &tx_ring->dma,
5489                                            GFP_KERNEL);
5490         set_dev_node(dev, orig_node);
5491         if (!tx_ring->desc)
5492                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5493                                                    &tx_ring->dma, GFP_KERNEL);
5494         if (!tx_ring->desc)
5495                 goto err;
5496
5497         tx_ring->next_to_use = 0;
5498         tx_ring->next_to_clean = 0;
5499         return 0;
5500
5501 err:
5502         vfree(tx_ring->tx_buffer_info);
5503         tx_ring->tx_buffer_info = NULL;
5504         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5505         return -ENOMEM;
5506 }
5507
5508 /**
5509  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5510  * @adapter: board private structure
5511  *
5512  * If this function returns with an error, then it's possible one or
5513  * more of the rings is populated (while the rest are not).  It is the
5514  * callers duty to clean those orphaned rings.
5515  *
5516  * Return 0 on success, negative on failure
5517  **/
5518 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5519 {
5520         int i, err = 0;
5521
5522         for (i = 0; i < adapter->num_tx_queues; i++) {
5523                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5524                 if (!err)
5525                         continue;
5526
5527                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5528                 goto err_setup_tx;
5529         }
5530
5531         return 0;
5532 err_setup_tx:
5533         /* rewind the index freeing the rings as we go */
5534         while (i--)
5535                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5536         return err;
5537 }
5538
5539 /**
5540  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5541  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5542  *
5543  * Returns 0 on success, negative on failure
5544  **/
5545 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5546 {
5547         struct device *dev = rx_ring->dev;
5548         int orig_node = dev_to_node(dev);
5549         int ring_node = -1;
5550         int size;
5551
5552         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5553
5554         if (rx_ring->q_vector)
5555                 ring_node = rx_ring->q_vector->numa_node;
5556
5557         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5558         if (!rx_ring->rx_buffer_info)
5559                 rx_ring->rx_buffer_info = vzalloc(size);
5560         if (!rx_ring->rx_buffer_info)
5561                 goto err;
5562
5563         u64_stats_init(&rx_ring->syncp);
5564
5565         /* Round up to nearest 4K */
5566         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5567         rx_ring->size = ALIGN(rx_ring->size, 4096);
5568
5569         set_dev_node(dev, ring_node);
5570         rx_ring->desc = dma_alloc_coherent(dev,
5571                                            rx_ring->size,
5572                                            &rx_ring->dma,
5573                                            GFP_KERNEL);
5574         set_dev_node(dev, orig_node);
5575         if (!rx_ring->desc)
5576                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5577                                                    &rx_ring->dma, GFP_KERNEL);
5578         if (!rx_ring->desc)
5579                 goto err;
5580
5581         rx_ring->next_to_clean = 0;
5582         rx_ring->next_to_use = 0;
5583
5584         return 0;
5585 err:
5586         vfree(rx_ring->rx_buffer_info);
5587         rx_ring->rx_buffer_info = NULL;
5588         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5589         return -ENOMEM;
5590 }
5591
5592 /**
5593  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5594  * @adapter: board private structure
5595  *
5596  * If this function returns with an error, then it's possible one or
5597  * more of the rings is populated (while the rest are not).  It is the
5598  * callers duty to clean those orphaned rings.
5599  *
5600  * Return 0 on success, negative on failure
5601  **/
5602 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5603 {
5604         int i, err = 0;
5605
5606         for (i = 0; i < adapter->num_rx_queues; i++) {
5607                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5608                 if (!err)
5609                         continue;
5610
5611                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5612                 goto err_setup_rx;
5613         }
5614
5615 #ifdef IXGBE_FCOE
5616         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5617         if (!err)
5618 #endif
5619                 return 0;
5620 err_setup_rx:
5621         /* rewind the index freeing the rings as we go */
5622         while (i--)
5623                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5624         return err;
5625 }
5626
5627 /**
5628  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5629  * @tx_ring: Tx descriptor ring for a specific queue
5630  *
5631  * Free all transmit software resources
5632  **/
5633 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5634 {
5635         ixgbe_clean_tx_ring(tx_ring);
5636
5637         vfree(tx_ring->tx_buffer_info);
5638         tx_ring->tx_buffer_info = NULL;
5639
5640         /* if not set, then don't free */
5641         if (!tx_ring->desc)
5642                 return;
5643
5644         dma_free_coherent(tx_ring->dev, tx_ring->size,
5645                           tx_ring->desc, tx_ring->dma);
5646
5647         tx_ring->desc = NULL;
5648 }
5649
5650 /**
5651  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5652  * @adapter: board private structure
5653  *
5654  * Free all transmit software resources
5655  **/
5656 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5657 {
5658         int i;
5659
5660         for (i = 0; i < adapter->num_tx_queues; i++)
5661                 if (adapter->tx_ring[i]->desc)
5662                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
5663 }
5664
5665 /**
5666  * ixgbe_free_rx_resources - Free Rx Resources
5667  * @rx_ring: ring to clean the resources from
5668  *
5669  * Free all receive software resources
5670  **/
5671 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5672 {
5673         ixgbe_clean_rx_ring(rx_ring);
5674
5675         vfree(rx_ring->rx_buffer_info);
5676         rx_ring->rx_buffer_info = NULL;
5677
5678         /* if not set, then don't free */
5679         if (!rx_ring->desc)
5680                 return;
5681
5682         dma_free_coherent(rx_ring->dev, rx_ring->size,
5683                           rx_ring->desc, rx_ring->dma);
5684
5685         rx_ring->desc = NULL;
5686 }
5687
5688 /**
5689  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5690  * @adapter: board private structure
5691  *
5692  * Free all receive software resources
5693  **/
5694 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5695 {
5696         int i;
5697
5698 #ifdef IXGBE_FCOE
5699         ixgbe_free_fcoe_ddp_resources(adapter);
5700
5701 #endif
5702         for (i = 0; i < adapter->num_rx_queues; i++)
5703                 if (adapter->rx_ring[i]->desc)
5704                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
5705 }
5706
5707 /**
5708  * ixgbe_change_mtu - Change the Maximum Transfer Unit
5709  * @netdev: network interface device structure
5710  * @new_mtu: new value for maximum frame size
5711  *
5712  * Returns 0 on success, negative on failure
5713  **/
5714 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5715 {
5716         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5717         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5718
5719         /* MTU < 68 is an error and causes problems on some kernels */
5720         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5721                 return -EINVAL;
5722
5723         /*
5724          * For 82599EB we cannot allow legacy VFs to enable their receive
5725          * paths when MTU greater than 1500 is configured.  So display a
5726          * warning that legacy VFs will be disabled.
5727          */
5728         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5729             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5730             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5731                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5732
5733         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5734
5735         /* must set new MTU before calling down or up */
5736         netdev->mtu = new_mtu;
5737
5738         if (netif_running(netdev))
5739                 ixgbe_reinit_locked(adapter);
5740
5741         return 0;
5742 }
5743
5744 /**
5745  * ixgbe_open - Called when a network interface is made active
5746  * @netdev: network interface device structure
5747  *
5748  * Returns 0 on success, negative value on failure
5749  *
5750  * The open entry point is called when a network interface is made
5751  * active by the system (IFF_UP).  At this point all resources needed
5752  * for transmit and receive operations are allocated, the interrupt
5753  * handler is registered with the OS, the watchdog timer is started,
5754  * and the stack is notified that the interface is ready.
5755  **/
5756 static int ixgbe_open(struct net_device *netdev)
5757 {
5758         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5759         struct ixgbe_hw *hw = &adapter->hw;
5760         int err, queues;
5761
5762         /* disallow open during test */
5763         if (test_bit(__IXGBE_TESTING, &adapter->state))
5764                 return -EBUSY;
5765
5766         netif_carrier_off(netdev);
5767
5768         /* allocate transmit descriptors */
5769         err = ixgbe_setup_all_tx_resources(adapter);
5770         if (err)
5771                 goto err_setup_tx;
5772
5773         /* allocate receive descriptors */
5774         err = ixgbe_setup_all_rx_resources(adapter);
5775         if (err)
5776                 goto err_setup_rx;
5777
5778         ixgbe_configure(adapter);
5779
5780         err = ixgbe_request_irq(adapter);
5781         if (err)
5782                 goto err_req_irq;
5783
5784         /* Notify the stack of the actual queue counts. */
5785         if (adapter->num_rx_pools > 1)
5786                 queues = adapter->num_rx_queues_per_pool;
5787         else
5788                 queues = adapter->num_tx_queues;
5789
5790         err = netif_set_real_num_tx_queues(netdev, queues);
5791         if (err)
5792                 goto err_set_queues;
5793
5794         if (adapter->num_rx_pools > 1 &&
5795             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5796                 queues = IXGBE_MAX_L2A_QUEUES;
5797         else
5798                 queues = adapter->num_rx_queues;
5799         err = netif_set_real_num_rx_queues(netdev, queues);
5800         if (err)
5801                 goto err_set_queues;
5802
5803         ixgbe_ptp_init(adapter);
5804
5805         ixgbe_up_complete(adapter);
5806
5807         ixgbe_clear_vxlan_port(adapter);
5808 #ifdef CONFIG_IXGBE_VXLAN
5809         vxlan_get_rx_port(netdev);
5810 #endif
5811
5812         return 0;
5813
5814 err_set_queues:
5815         ixgbe_free_irq(adapter);
5816 err_req_irq:
5817         ixgbe_free_all_rx_resources(adapter);
5818         if (hw->phy.ops.set_phy_power && !adapter->wol)
5819                 hw->phy.ops.set_phy_power(&adapter->hw, false);
5820 err_setup_rx:
5821         ixgbe_free_all_tx_resources(adapter);
5822 err_setup_tx:
5823         ixgbe_reset(adapter);
5824
5825         return err;
5826 }
5827
5828 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5829 {
5830         ixgbe_ptp_suspend(adapter);
5831
5832         if (adapter->hw.phy.ops.enter_lplu) {
5833                 adapter->hw.phy.reset_disable = true;
5834                 ixgbe_down(adapter);
5835                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5836                 adapter->hw.phy.reset_disable = false;
5837         } else {
5838                 ixgbe_down(adapter);
5839         }
5840
5841         ixgbe_free_irq(adapter);
5842
5843         ixgbe_free_all_tx_resources(adapter);
5844         ixgbe_free_all_rx_resources(adapter);
5845 }
5846
5847 /**
5848  * ixgbe_close - Disables a network interface
5849  * @netdev: network interface device structure
5850  *
5851  * Returns 0, this is not allowed to fail
5852  *
5853  * The close entry point is called when an interface is de-activated
5854  * by the OS.  The hardware is still under the drivers control, but
5855  * needs to be disabled.  A global MAC reset is issued to stop the
5856  * hardware, and all transmit and receive resources are freed.
5857  **/
5858 static int ixgbe_close(struct net_device *netdev)
5859 {
5860         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5861
5862         ixgbe_ptp_stop(adapter);
5863
5864         ixgbe_close_suspend(adapter);
5865
5866         ixgbe_fdir_filter_exit(adapter);
5867
5868         ixgbe_release_hw_control(adapter);
5869
5870         return 0;
5871 }
5872
5873 #ifdef CONFIG_PM
5874 static int ixgbe_resume(struct pci_dev *pdev)
5875 {
5876         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5877         struct net_device *netdev = adapter->netdev;
5878         u32 err;
5879
5880         adapter->hw.hw_addr = adapter->io_addr;
5881         pci_set_power_state(pdev, PCI_D0);
5882         pci_restore_state(pdev);
5883         /*
5884          * pci_restore_state clears dev->state_saved so call
5885          * pci_save_state to restore it.
5886          */
5887         pci_save_state(pdev);
5888
5889         err = pci_enable_device_mem(pdev);
5890         if (err) {
5891                 e_dev_err("Cannot enable PCI device from suspend\n");
5892                 return err;
5893         }
5894         smp_mb__before_atomic();
5895         clear_bit(__IXGBE_DISABLED, &adapter->state);
5896         pci_set_master(pdev);
5897
5898         pci_wake_from_d3(pdev, false);
5899
5900         ixgbe_reset(adapter);
5901
5902         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5903
5904         rtnl_lock();
5905         err = ixgbe_init_interrupt_scheme(adapter);
5906         if (!err && netif_running(netdev))
5907                 err = ixgbe_open(netdev);
5908
5909         rtnl_unlock();
5910
5911         if (err)
5912                 return err;
5913
5914         netif_device_attach(netdev);
5915
5916         return 0;
5917 }
5918 #endif /* CONFIG_PM */
5919
5920 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5921 {
5922         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5923         struct net_device *netdev = adapter->netdev;
5924         struct ixgbe_hw *hw = &adapter->hw;
5925         u32 ctrl, fctrl;
5926         u32 wufc = adapter->wol;
5927 #ifdef CONFIG_PM
5928         int retval = 0;
5929 #endif
5930
5931         netif_device_detach(netdev);
5932
5933         rtnl_lock();
5934         if (netif_running(netdev))
5935                 ixgbe_close_suspend(adapter);
5936         rtnl_unlock();
5937
5938         ixgbe_clear_interrupt_scheme(adapter);
5939
5940 #ifdef CONFIG_PM
5941         retval = pci_save_state(pdev);
5942         if (retval)
5943                 return retval;
5944
5945 #endif
5946         if (hw->mac.ops.stop_link_on_d3)
5947                 hw->mac.ops.stop_link_on_d3(hw);
5948
5949         if (wufc) {
5950                 ixgbe_set_rx_mode(netdev);
5951
5952                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5953                 if (hw->mac.ops.enable_tx_laser)
5954                         hw->mac.ops.enable_tx_laser(hw);
5955
5956                 /* turn on all-multi mode if wake on multicast is enabled */
5957                 if (wufc & IXGBE_WUFC_MC) {
5958                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5959                         fctrl |= IXGBE_FCTRL_MPE;
5960                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5961                 }
5962
5963                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5964                 ctrl |= IXGBE_CTRL_GIO_DIS;
5965                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5966
5967                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5968         } else {
5969                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5970                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5971         }
5972
5973         switch (hw->mac.type) {
5974         case ixgbe_mac_82598EB:
5975                 pci_wake_from_d3(pdev, false);
5976                 break;
5977         case ixgbe_mac_82599EB:
5978         case ixgbe_mac_X540:
5979         case ixgbe_mac_X550:
5980         case ixgbe_mac_X550EM_x:
5981                 pci_wake_from_d3(pdev, !!wufc);
5982                 break;
5983         default:
5984                 break;
5985         }
5986
5987         *enable_wake = !!wufc;
5988         if (hw->phy.ops.set_phy_power && !*enable_wake)
5989                 hw->phy.ops.set_phy_power(hw, false);
5990
5991         ixgbe_release_hw_control(adapter);
5992
5993         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5994                 pci_disable_device(pdev);
5995
5996         return 0;
5997 }
5998
5999 #ifdef CONFIG_PM
6000 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6001 {
6002         int retval;
6003         bool wake;
6004
6005         retval = __ixgbe_shutdown(pdev, &wake);
6006         if (retval)
6007                 return retval;
6008
6009         if (wake) {
6010                 pci_prepare_to_sleep(pdev);
6011         } else {
6012                 pci_wake_from_d3(pdev, false);
6013                 pci_set_power_state(pdev, PCI_D3hot);
6014         }
6015
6016         return 0;
6017 }
6018 #endif /* CONFIG_PM */
6019
6020 static void ixgbe_shutdown(struct pci_dev *pdev)
6021 {
6022         bool wake;
6023
6024         __ixgbe_shutdown(pdev, &wake);
6025
6026         if (system_state == SYSTEM_POWER_OFF) {
6027                 pci_wake_from_d3(pdev, wake);
6028                 pci_set_power_state(pdev, PCI_D3hot);
6029         }
6030 }
6031
6032 /**
6033  * ixgbe_update_stats - Update the board statistics counters.
6034  * @adapter: board private structure
6035  **/
6036 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6037 {
6038         struct net_device *netdev = adapter->netdev;
6039         struct ixgbe_hw *hw = &adapter->hw;
6040         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6041         u64 total_mpc = 0;
6042         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6043         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6044         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6045         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6046
6047         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6048             test_bit(__IXGBE_RESETTING, &adapter->state))
6049                 return;
6050
6051         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6052                 u64 rsc_count = 0;
6053                 u64 rsc_flush = 0;
6054                 for (i = 0; i < adapter->num_rx_queues; i++) {
6055                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6056                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6057                 }
6058                 adapter->rsc_total_count = rsc_count;
6059                 adapter->rsc_total_flush = rsc_flush;
6060         }
6061
6062         for (i = 0; i < adapter->num_rx_queues; i++) {
6063                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6064                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6065                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6066                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6067                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6068                 bytes += rx_ring->stats.bytes;
6069                 packets += rx_ring->stats.packets;
6070         }
6071         adapter->non_eop_descs = non_eop_descs;
6072         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6073         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6074         adapter->hw_csum_rx_error = hw_csum_rx_error;
6075         netdev->stats.rx_bytes = bytes;
6076         netdev->stats.rx_packets = packets;
6077
6078         bytes = 0;
6079         packets = 0;
6080         /* gather some stats to the adapter struct that are per queue */
6081         for (i = 0; i < adapter->num_tx_queues; i++) {
6082                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6083                 restart_queue += tx_ring->tx_stats.restart_queue;
6084                 tx_busy += tx_ring->tx_stats.tx_busy;
6085                 bytes += tx_ring->stats.bytes;
6086                 packets += tx_ring->stats.packets;
6087         }
6088         adapter->restart_queue = restart_queue;
6089         adapter->tx_busy = tx_busy;
6090         netdev->stats.tx_bytes = bytes;
6091         netdev->stats.tx_packets = packets;
6092
6093         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6094
6095         /* 8 register reads */
6096         for (i = 0; i < 8; i++) {
6097                 /* for packet buffers not used, the register should read 0 */
6098                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6099                 missed_rx += mpc;
6100                 hwstats->mpc[i] += mpc;
6101                 total_mpc += hwstats->mpc[i];
6102                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6103                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6104                 switch (hw->mac.type) {
6105                 case ixgbe_mac_82598EB:
6106                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6107                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6108                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6109                         hwstats->pxonrxc[i] +=
6110                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6111                         break;
6112                 case ixgbe_mac_82599EB:
6113                 case ixgbe_mac_X540:
6114                 case ixgbe_mac_X550:
6115                 case ixgbe_mac_X550EM_x:
6116                         hwstats->pxonrxc[i] +=
6117                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6118                         break;
6119                 default:
6120                         break;
6121                 }
6122         }
6123
6124         /*16 register reads */
6125         for (i = 0; i < 16; i++) {
6126                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6127                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6128                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6129                     (hw->mac.type == ixgbe_mac_X540) ||
6130                     (hw->mac.type == ixgbe_mac_X550) ||
6131                     (hw->mac.type == ixgbe_mac_X550EM_x)) {
6132                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6133                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6134                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6135                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6136                 }
6137         }
6138
6139         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6140         /* work around hardware counting issue */
6141         hwstats->gprc -= missed_rx;
6142
6143         ixgbe_update_xoff_received(adapter);
6144
6145         /* 82598 hardware only has a 32 bit counter in the high register */
6146         switch (hw->mac.type) {
6147         case ixgbe_mac_82598EB:
6148                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6149                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6150                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6151                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6152                 break;
6153         case ixgbe_mac_X540:
6154         case ixgbe_mac_X550:
6155         case ixgbe_mac_X550EM_x:
6156                 /* OS2BMC stats are X540 and later */
6157                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6158                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6159                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6160                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6161         case ixgbe_mac_82599EB:
6162                 for (i = 0; i < 16; i++)
6163                         adapter->hw_rx_no_dma_resources +=
6164                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6165                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6166                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6167                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6168                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6169                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6170                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6171                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6172                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6173                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6174 #ifdef IXGBE_FCOE
6175                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6176                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6177                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6178                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6179                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6180                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6181                 /* Add up per cpu counters for total ddp aloc fail */
6182                 if (adapter->fcoe.ddp_pool) {
6183                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6184                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6185                         unsigned int cpu;
6186                         u64 noddp = 0, noddp_ext_buff = 0;
6187                         for_each_possible_cpu(cpu) {
6188                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6189                                 noddp += ddp_pool->noddp;
6190                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6191                         }
6192                         hwstats->fcoe_noddp = noddp;
6193                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6194                 }
6195 #endif /* IXGBE_FCOE */
6196                 break;
6197         default:
6198                 break;
6199         }
6200         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6201         hwstats->bprc += bprc;
6202         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6203         if (hw->mac.type == ixgbe_mac_82598EB)
6204                 hwstats->mprc -= bprc;
6205         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6206         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6207         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6208         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6209         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6210         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6211         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6212         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6213         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6214         hwstats->lxontxc += lxon;
6215         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6216         hwstats->lxofftxc += lxoff;
6217         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6218         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6219         /*
6220          * 82598 errata - tx of flow control packets is included in tx counters
6221          */
6222         xon_off_tot = lxon + lxoff;
6223         hwstats->gptc -= xon_off_tot;
6224         hwstats->mptc -= xon_off_tot;
6225         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6226         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6227         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6228         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6229         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6230         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6231         hwstats->ptc64 -= xon_off_tot;
6232         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6233         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6234         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6235         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6236         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6237         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6238
6239         /* Fill out the OS statistics structure */
6240         netdev->stats.multicast = hwstats->mprc;
6241
6242         /* Rx Errors */
6243         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6244         netdev->stats.rx_dropped = 0;
6245         netdev->stats.rx_length_errors = hwstats->rlec;
6246         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6247         netdev->stats.rx_missed_errors = total_mpc;
6248 }
6249
6250 /**
6251  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6252  * @adapter: pointer to the device adapter structure
6253  **/
6254 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6255 {
6256         struct ixgbe_hw *hw = &adapter->hw;
6257         int i;
6258
6259         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6260                 return;
6261
6262         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6263
6264         /* if interface is down do nothing */
6265         if (test_bit(__IXGBE_DOWN, &adapter->state))
6266                 return;
6267
6268         /* do nothing if we are not using signature filters */
6269         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6270                 return;
6271
6272         adapter->fdir_overflow++;
6273
6274         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6275                 for (i = 0; i < adapter->num_tx_queues; i++)
6276                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6277                                 &(adapter->tx_ring[i]->state));
6278                 /* re-enable flow director interrupts */
6279                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6280         } else {
6281                 e_err(probe, "failed to finish FDIR re-initialization, "
6282                       "ignored adding FDIR ATR filters\n");
6283         }
6284 }
6285
6286 /**
6287  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6288  * @adapter: pointer to the device adapter structure
6289  *
6290  * This function serves two purposes.  First it strobes the interrupt lines
6291  * in order to make certain interrupts are occurring.  Secondly it sets the
6292  * bits needed to check for TX hangs.  As a result we should immediately
6293  * determine if a hang has occurred.
6294  */
6295 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6296 {
6297         struct ixgbe_hw *hw = &adapter->hw;
6298         u64 eics = 0;
6299         int i;
6300
6301         /* If we're down, removing or resetting, just bail */
6302         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6303             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6304             test_bit(__IXGBE_RESETTING, &adapter->state))
6305                 return;
6306
6307         /* Force detection of hung controller */
6308         if (netif_carrier_ok(adapter->netdev)) {
6309                 for (i = 0; i < adapter->num_tx_queues; i++)
6310                         set_check_for_tx_hang(adapter->tx_ring[i]);
6311         }
6312
6313         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6314                 /*
6315                  * for legacy and MSI interrupts don't set any bits
6316                  * that are enabled for EIAM, because this operation
6317                  * would set *both* EIMS and EICS for any bit in EIAM
6318                  */
6319                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6320                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6321         } else {
6322                 /* get one bit for every active tx/rx interrupt vector */
6323                 for (i = 0; i < adapter->num_q_vectors; i++) {
6324                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6325                         if (qv->rx.ring || qv->tx.ring)
6326                                 eics |= ((u64)1 << i);
6327                 }
6328         }
6329
6330         /* Cause software interrupt to ensure rings are cleaned */
6331         ixgbe_irq_rearm_queues(adapter, eics);
6332 }
6333
6334 /**
6335  * ixgbe_watchdog_update_link - update the link status
6336  * @adapter: pointer to the device adapter structure
6337  * @link_speed: pointer to a u32 to store the link_speed
6338  **/
6339 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6340 {
6341         struct ixgbe_hw *hw = &adapter->hw;
6342         u32 link_speed = adapter->link_speed;
6343         bool link_up = adapter->link_up;
6344         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6345
6346         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6347                 return;
6348
6349         if (hw->mac.ops.check_link) {
6350                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6351         } else {
6352                 /* always assume link is up, if no check link function */
6353                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6354                 link_up = true;
6355         }
6356
6357         if (adapter->ixgbe_ieee_pfc)
6358                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6359
6360         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6361                 hw->mac.ops.fc_enable(hw);
6362                 ixgbe_set_rx_drop_en(adapter);
6363         }
6364
6365         if (link_up ||
6366             time_after(jiffies, (adapter->link_check_timeout +
6367                                  IXGBE_TRY_LINK_TIMEOUT))) {
6368                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6369                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6370                 IXGBE_WRITE_FLUSH(hw);
6371         }
6372
6373         adapter->link_up = link_up;
6374         adapter->link_speed = link_speed;
6375 }
6376
6377 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6378 {
6379 #ifdef CONFIG_IXGBE_DCB
6380         struct net_device *netdev = adapter->netdev;
6381         struct dcb_app app = {
6382                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6383                               .protocol = 0,
6384                              };
6385         u8 up = 0;
6386
6387         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6388                 up = dcb_ieee_getapp_mask(netdev, &app);
6389
6390         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6391 #endif
6392 }
6393
6394 /**
6395  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6396  *                             print link up message
6397  * @adapter: pointer to the device adapter structure
6398  **/
6399 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6400 {
6401         struct net_device *netdev = adapter->netdev;
6402         struct ixgbe_hw *hw = &adapter->hw;
6403         struct net_device *upper;
6404         struct list_head *iter;
6405         u32 link_speed = adapter->link_speed;
6406         const char *speed_str;
6407         bool flow_rx, flow_tx;
6408
6409         /* only continue if link was previously down */
6410         if (netif_carrier_ok(netdev))
6411                 return;
6412
6413         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6414
6415         switch (hw->mac.type) {
6416         case ixgbe_mac_82598EB: {
6417                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6418                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6419                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6420                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6421         }
6422                 break;
6423         case ixgbe_mac_X540:
6424         case ixgbe_mac_X550:
6425         case ixgbe_mac_X550EM_x:
6426         case ixgbe_mac_82599EB: {
6427                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6428                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6429                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6430                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6431         }
6432                 break;
6433         default:
6434                 flow_tx = false;
6435                 flow_rx = false;
6436                 break;
6437         }
6438
6439         adapter->last_rx_ptp_check = jiffies;
6440
6441         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6442                 ixgbe_ptp_start_cyclecounter(adapter);
6443
6444         switch (link_speed) {
6445         case IXGBE_LINK_SPEED_10GB_FULL:
6446                 speed_str = "10 Gbps";
6447                 break;
6448         case IXGBE_LINK_SPEED_2_5GB_FULL:
6449                 speed_str = "2.5 Gbps";
6450                 break;
6451         case IXGBE_LINK_SPEED_1GB_FULL:
6452                 speed_str = "1 Gbps";
6453                 break;
6454         case IXGBE_LINK_SPEED_100_FULL:
6455                 speed_str = "100 Mbps";
6456                 break;
6457         default:
6458                 speed_str = "unknown speed";
6459                 break;
6460         }
6461         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6462                ((flow_rx && flow_tx) ? "RX/TX" :
6463                (flow_rx ? "RX" :
6464                (flow_tx ? "TX" : "None"))));
6465
6466         netif_carrier_on(netdev);
6467         ixgbe_check_vf_rate_limit(adapter);
6468
6469         /* enable transmits */
6470         netif_tx_wake_all_queues(adapter->netdev);
6471
6472         /* enable any upper devices */
6473         rtnl_lock();
6474         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6475                 if (netif_is_macvlan(upper)) {
6476                         struct macvlan_dev *vlan = netdev_priv(upper);
6477
6478                         if (vlan->fwd_priv)
6479                                 netif_tx_wake_all_queues(upper);
6480                 }
6481         }
6482         rtnl_unlock();
6483
6484         /* update the default user priority for VFs */
6485         ixgbe_update_default_up(adapter);
6486
6487         /* ping all the active vfs to let them know link has changed */
6488         ixgbe_ping_all_vfs(adapter);
6489 }
6490
6491 /**
6492  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6493  *                               print link down message
6494  * @adapter: pointer to the adapter structure
6495  **/
6496 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6497 {
6498         struct net_device *netdev = adapter->netdev;
6499         struct ixgbe_hw *hw = &adapter->hw;
6500
6501         adapter->link_up = false;
6502         adapter->link_speed = 0;
6503
6504         /* only continue if link was up previously */
6505         if (!netif_carrier_ok(netdev))
6506                 return;
6507
6508         /* poll for SFP+ cable when link is down */
6509         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6510                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6511
6512         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6513                 ixgbe_ptp_start_cyclecounter(adapter);
6514
6515         e_info(drv, "NIC Link is Down\n");
6516         netif_carrier_off(netdev);
6517
6518         /* ping all the active vfs to let them know link has changed */
6519         ixgbe_ping_all_vfs(adapter);
6520 }
6521
6522 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6523 {
6524         int i;
6525
6526         for (i = 0; i < adapter->num_tx_queues; i++) {
6527                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6528
6529                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6530                         return true;
6531         }
6532
6533         return false;
6534 }
6535
6536 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6537 {
6538         struct ixgbe_hw *hw = &adapter->hw;
6539         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6540         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6541
6542         int i, j;
6543
6544         if (!adapter->num_vfs)
6545                 return false;
6546
6547         /* resetting the PF is only needed for MAC before X550 */
6548         if (hw->mac.type >= ixgbe_mac_X550)
6549                 return false;
6550
6551         for (i = 0; i < adapter->num_vfs; i++) {
6552                 for (j = 0; j < q_per_pool; j++) {
6553                         u32 h, t;
6554
6555                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6556                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6557
6558                         if (h != t)
6559                                 return true;
6560                 }
6561         }
6562
6563         return false;
6564 }
6565
6566 /**
6567  * ixgbe_watchdog_flush_tx - flush queues on link down
6568  * @adapter: pointer to the device adapter structure
6569  **/
6570 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6571 {
6572         if (!netif_carrier_ok(adapter->netdev)) {
6573                 if (ixgbe_ring_tx_pending(adapter) ||
6574                     ixgbe_vf_tx_pending(adapter)) {
6575                         /* We've lost link, so the controller stops DMA,
6576                          * but we've got queued Tx work that's never going
6577                          * to get done, so reset controller to flush Tx.
6578                          * (Do the reset outside of interrupt context).
6579                          */
6580                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6581                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6582                 }
6583         }
6584 }
6585
6586 #ifdef CONFIG_PCI_IOV
6587 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6588                                       struct pci_dev *vfdev)
6589 {
6590         if (!pci_wait_for_pending_transaction(vfdev))
6591                 e_dev_warn("Issuing VFLR with pending transactions\n");
6592
6593         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6594         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6595
6596         msleep(100);
6597 }
6598
6599 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6600 {
6601         struct ixgbe_hw *hw = &adapter->hw;
6602         struct pci_dev *pdev = adapter->pdev;
6603         struct pci_dev *vfdev;
6604         u32 gpc;
6605         int pos;
6606         unsigned short vf_id;
6607
6608         if (!(netif_carrier_ok(adapter->netdev)))
6609                 return;
6610
6611         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6612         if (gpc) /* If incrementing then no need for the check below */
6613                 return;
6614         /* Check to see if a bad DMA write target from an errant or
6615          * malicious VF has caused a PCIe error.  If so then we can
6616          * issue a VFLR to the offending VF(s) and then resume without
6617          * requesting a full slot reset.
6618          */
6619
6620         if (!pdev)
6621                 return;
6622
6623         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6624         if (!pos)
6625                 return;
6626
6627         /* get the device ID for the VF */
6628         pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6629
6630         /* check status reg for all VFs owned by this PF */
6631         vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6632         while (vfdev) {
6633                 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6634                         u16 status_reg;
6635
6636                         pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6637                         if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6638                                 /* issue VFLR */
6639                                 ixgbe_issue_vf_flr(adapter, vfdev);
6640                 }
6641
6642                 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6643         }
6644 }
6645
6646 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6647 {
6648         u32 ssvpc;
6649
6650         /* Do not perform spoof check for 82598 or if not in IOV mode */
6651         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6652             adapter->num_vfs == 0)
6653                 return;
6654
6655         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6656
6657         /*
6658          * ssvpc register is cleared on read, if zero then no
6659          * spoofed packets in the last interval.
6660          */
6661         if (!ssvpc)
6662                 return;
6663
6664         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6665 }
6666 #else
6667 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6668 {
6669 }
6670
6671 static void
6672 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6673 {
6674 }
6675 #endif /* CONFIG_PCI_IOV */
6676
6677
6678 /**
6679  * ixgbe_watchdog_subtask - check and bring link up
6680  * @adapter: pointer to the device adapter structure
6681  **/
6682 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6683 {
6684         /* if interface is down, removing or resetting, do nothing */
6685         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6686             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6687             test_bit(__IXGBE_RESETTING, &adapter->state))
6688                 return;
6689
6690         ixgbe_watchdog_update_link(adapter);
6691
6692         if (adapter->link_up)
6693                 ixgbe_watchdog_link_is_up(adapter);
6694         else
6695                 ixgbe_watchdog_link_is_down(adapter);
6696
6697         ixgbe_check_for_bad_vf(adapter);
6698         ixgbe_spoof_check(adapter);
6699         ixgbe_update_stats(adapter);
6700
6701         ixgbe_watchdog_flush_tx(adapter);
6702 }
6703
6704 /**
6705  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6706  * @adapter: the ixgbe adapter structure
6707  **/
6708 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6709 {
6710         struct ixgbe_hw *hw = &adapter->hw;
6711         s32 err;
6712
6713         /* not searching for SFP so there is nothing to do here */
6714         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6715             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6716                 return;
6717
6718         if (adapter->sfp_poll_time &&
6719             time_after(adapter->sfp_poll_time, jiffies))
6720                 return; /* If not yet time to poll for SFP */
6721
6722         /* someone else is in init, wait until next service event */
6723         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6724                 return;
6725
6726         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
6727
6728         err = hw->phy.ops.identify_sfp(hw);
6729         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6730                 goto sfp_out;
6731
6732         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6733                 /* If no cable is present, then we need to reset
6734                  * the next time we find a good cable. */
6735                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6736         }
6737
6738         /* exit on error */
6739         if (err)
6740                 goto sfp_out;
6741
6742         /* exit if reset not needed */
6743         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6744                 goto sfp_out;
6745
6746         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6747
6748         /*
6749          * A module may be identified correctly, but the EEPROM may not have
6750          * support for that module.  setup_sfp() will fail in that case, so
6751          * we should not allow that module to load.
6752          */
6753         if (hw->mac.type == ixgbe_mac_82598EB)
6754                 err = hw->phy.ops.reset(hw);
6755         else
6756                 err = hw->mac.ops.setup_sfp(hw);
6757
6758         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6759                 goto sfp_out;
6760
6761         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6762         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6763
6764 sfp_out:
6765         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6766
6767         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6768             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6769                 e_dev_err("failed to initialize because an unsupported "
6770                           "SFP+ module type was detected.\n");
6771                 e_dev_err("Reload the driver after installing a "
6772                           "supported module.\n");
6773                 unregister_netdev(adapter->netdev);
6774         }
6775 }
6776
6777 /**
6778  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6779  * @adapter: the ixgbe adapter structure
6780  **/
6781 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6782 {
6783         struct ixgbe_hw *hw = &adapter->hw;
6784         u32 speed;
6785         bool autoneg = false;
6786
6787         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6788                 return;
6789
6790         /* someone else is in init, wait until next service event */
6791         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6792                 return;
6793
6794         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6795
6796         speed = hw->phy.autoneg_advertised;
6797         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6798                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6799
6800                 /* setup the highest link when no autoneg */
6801                 if (!autoneg) {
6802                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6803                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
6804                 }
6805         }
6806
6807         if (hw->mac.ops.setup_link)
6808                 hw->mac.ops.setup_link(hw, speed, true);
6809
6810         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6811         adapter->link_check_timeout = jiffies;
6812         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6813 }
6814
6815 /**
6816  * ixgbe_service_timer - Timer Call-back
6817  * @data: pointer to adapter cast into an unsigned long
6818  **/
6819 static void ixgbe_service_timer(unsigned long data)
6820 {
6821         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6822         unsigned long next_event_offset;
6823
6824         /* poll faster when waiting for link */
6825         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6826                 next_event_offset = HZ / 10;
6827         else
6828                 next_event_offset = HZ * 2;
6829
6830         /* Reset the timer */
6831         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6832
6833         ixgbe_service_event_schedule(adapter);
6834 }
6835
6836 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6837 {
6838         struct ixgbe_hw *hw = &adapter->hw;
6839         u32 status;
6840
6841         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6842                 return;
6843
6844         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6845
6846         if (!hw->phy.ops.handle_lasi)
6847                 return;
6848
6849         status = hw->phy.ops.handle_lasi(&adapter->hw);
6850         if (status != IXGBE_ERR_OVERTEMP)
6851                 return;
6852
6853         e_crit(drv, "%s\n", ixgbe_overheat_msg);
6854 }
6855
6856 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6857 {
6858         if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6859                 return;
6860
6861         adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6862
6863         /* If we're already down, removing or resetting, just bail */
6864         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6865             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6866             test_bit(__IXGBE_RESETTING, &adapter->state))
6867                 return;
6868
6869         ixgbe_dump(adapter);
6870         netdev_err(adapter->netdev, "Reset adapter\n");
6871         adapter->tx_timeout_count++;
6872
6873         rtnl_lock();
6874         ixgbe_reinit_locked(adapter);
6875         rtnl_unlock();
6876 }
6877
6878 /**
6879  * ixgbe_service_task - manages and runs subtasks
6880  * @work: pointer to work_struct containing our data
6881  **/
6882 static void ixgbe_service_task(struct work_struct *work)
6883 {
6884         struct ixgbe_adapter *adapter = container_of(work,
6885                                                      struct ixgbe_adapter,
6886                                                      service_task);
6887         if (ixgbe_removed(adapter->hw.hw_addr)) {
6888                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6889                         rtnl_lock();
6890                         ixgbe_down(adapter);
6891                         rtnl_unlock();
6892                 }
6893                 ixgbe_service_event_complete(adapter);
6894                 return;
6895         }
6896 #ifdef CONFIG_IXGBE_VXLAN
6897         if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6898                 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6899                 vxlan_get_rx_port(adapter->netdev);
6900         }
6901 #endif /* CONFIG_IXGBE_VXLAN */
6902         ixgbe_reset_subtask(adapter);
6903         ixgbe_phy_interrupt_subtask(adapter);
6904         ixgbe_sfp_detection_subtask(adapter);
6905         ixgbe_sfp_link_config_subtask(adapter);
6906         ixgbe_check_overtemp_subtask(adapter);
6907         ixgbe_watchdog_subtask(adapter);
6908         ixgbe_fdir_reinit_subtask(adapter);
6909         ixgbe_check_hang_subtask(adapter);
6910
6911         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6912                 ixgbe_ptp_overflow_check(adapter);
6913                 ixgbe_ptp_rx_hang(adapter);
6914         }
6915
6916         ixgbe_service_event_complete(adapter);
6917 }
6918
6919 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6920                      struct ixgbe_tx_buffer *first,
6921                      u8 *hdr_len)
6922 {
6923         struct sk_buff *skb = first->skb;
6924         u32 vlan_macip_lens, type_tucmd;
6925         u32 mss_l4len_idx, l4len;
6926         int err;
6927
6928         if (skb->ip_summed != CHECKSUM_PARTIAL)
6929                 return 0;
6930
6931         if (!skb_is_gso(skb))
6932                 return 0;
6933
6934         err = skb_cow_head(skb, 0);
6935         if (err < 0)
6936                 return err;
6937
6938         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6939         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6940
6941         if (first->protocol == htons(ETH_P_IP)) {
6942                 struct iphdr *iph = ip_hdr(skb);
6943                 iph->tot_len = 0;
6944                 iph->check = 0;
6945                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6946                                                          iph->daddr, 0,
6947                                                          IPPROTO_TCP,
6948                                                          0);
6949                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6950                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6951                                    IXGBE_TX_FLAGS_CSUM |
6952                                    IXGBE_TX_FLAGS_IPV4;
6953         } else if (skb_is_gso_v6(skb)) {
6954                 ipv6_hdr(skb)->payload_len = 0;
6955                 tcp_hdr(skb)->check =
6956                     ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6957                                      &ipv6_hdr(skb)->daddr,
6958                                      0, IPPROTO_TCP, 0);
6959                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6960                                    IXGBE_TX_FLAGS_CSUM;
6961         }
6962
6963         /* compute header lengths */
6964         l4len = tcp_hdrlen(skb);
6965         *hdr_len = skb_transport_offset(skb) + l4len;
6966
6967         /* update gso size and bytecount with header size */
6968         first->gso_segs = skb_shinfo(skb)->gso_segs;
6969         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6970
6971         /* mss_l4len_id: use 0 as index for TSO */
6972         mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6973         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6974
6975         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6976         vlan_macip_lens = skb_network_header_len(skb);
6977         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6978         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6979
6980         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6981                           mss_l4len_idx);
6982
6983         return 1;
6984 }
6985
6986 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6987                           struct ixgbe_tx_buffer *first)
6988 {
6989         struct sk_buff *skb = first->skb;
6990         u32 vlan_macip_lens = 0;
6991         u32 mss_l4len_idx = 0;
6992         u32 type_tucmd = 0;
6993
6994         if (skb->ip_summed != CHECKSUM_PARTIAL) {
6995                 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6996                     !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6997                         return;
6998                 vlan_macip_lens = skb_network_offset(skb) <<
6999                                   IXGBE_ADVTXD_MACLEN_SHIFT;
7000         } else {
7001                 u8 l4_hdr = 0;
7002                 union {
7003                         struct iphdr *ipv4;
7004                         struct ipv6hdr *ipv6;
7005                         u8 *raw;
7006                 } network_hdr;
7007                 union {
7008                         struct tcphdr *tcphdr;
7009                         u8 *raw;
7010                 } transport_hdr;
7011
7012                 if (skb->encapsulation) {
7013                         network_hdr.raw = skb_inner_network_header(skb);
7014                         transport_hdr.raw = skb_inner_transport_header(skb);
7015                         vlan_macip_lens = skb_inner_network_offset(skb) <<
7016                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7017                 } else {
7018                         network_hdr.raw = skb_network_header(skb);
7019                         transport_hdr.raw = skb_transport_header(skb);
7020                         vlan_macip_lens = skb_network_offset(skb) <<
7021                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7022                 }
7023
7024                 /* use first 4 bits to determine IP version */
7025                 switch (network_hdr.ipv4->version) {
7026                 case IPVERSION:
7027                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7028                         type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7029                         l4_hdr = network_hdr.ipv4->protocol;
7030                         break;
7031                 case 6:
7032                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7033                         l4_hdr = network_hdr.ipv6->nexthdr;
7034                         break;
7035                 default:
7036                         if (unlikely(net_ratelimit())) {
7037                                 dev_warn(tx_ring->dev,
7038                                          "partial checksum but version=%d\n",
7039                                          network_hdr.ipv4->version);
7040                         }
7041                 }
7042
7043                 switch (l4_hdr) {
7044                 case IPPROTO_TCP:
7045                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7046                         mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7047                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7048                         break;
7049                 case IPPROTO_SCTP:
7050                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7051                         mss_l4len_idx = sizeof(struct sctphdr) <<
7052                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7053                         break;
7054                 case IPPROTO_UDP:
7055                         mss_l4len_idx = sizeof(struct udphdr) <<
7056                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7057                         break;
7058                 default:
7059                         if (unlikely(net_ratelimit())) {
7060                                 dev_warn(tx_ring->dev,
7061                                  "partial checksum but l4 proto=%x!\n",
7062                                  l4_hdr);
7063                         }
7064                         break;
7065                 }
7066
7067                 /* update TX checksum flag */
7068                 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7069         }
7070
7071         /* vlan_macip_lens: MACLEN, VLAN tag */
7072         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7073
7074         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7075                           type_tucmd, mss_l4len_idx);
7076 }
7077
7078 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7079         ((_flag <= _result) ? \
7080          ((u32)(_input & _flag) * (_result / _flag)) : \
7081          ((u32)(_input & _flag) / (_flag / _result)))
7082
7083 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7084 {
7085         /* set type for advanced descriptor with frame checksum insertion */
7086         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7087                        IXGBE_ADVTXD_DCMD_DEXT |
7088                        IXGBE_ADVTXD_DCMD_IFCS;
7089
7090         /* set HW vlan bit if vlan is present */
7091         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7092                                    IXGBE_ADVTXD_DCMD_VLE);
7093
7094         /* set segmentation enable bits for TSO/FSO */
7095         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7096                                    IXGBE_ADVTXD_DCMD_TSE);
7097
7098         /* set timestamp bit if present */
7099         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7100                                    IXGBE_ADVTXD_MAC_TSTAMP);
7101
7102         /* insert frame checksum */
7103         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7104
7105         return cmd_type;
7106 }
7107
7108 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7109                                    u32 tx_flags, unsigned int paylen)
7110 {
7111         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7112
7113         /* enable L4 checksum for TSO and TX checksum offload */
7114         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7115                                         IXGBE_TX_FLAGS_CSUM,
7116                                         IXGBE_ADVTXD_POPTS_TXSM);
7117
7118         /* enble IPv4 checksum for TSO */
7119         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7120                                         IXGBE_TX_FLAGS_IPV4,
7121                                         IXGBE_ADVTXD_POPTS_IXSM);
7122
7123         /*
7124          * Check Context must be set if Tx switch is enabled, which it
7125          * always is for case where virtual functions are running
7126          */
7127         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7128                                         IXGBE_TX_FLAGS_CC,
7129                                         IXGBE_ADVTXD_CC);
7130
7131         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7132 }
7133
7134 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7135 {
7136         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7137
7138         /* Herbert's original patch had:
7139          *  smp_mb__after_netif_stop_queue();
7140          * but since that doesn't exist yet, just open code it.
7141          */
7142         smp_mb();
7143
7144         /* We need to check again in a case another CPU has just
7145          * made room available.
7146          */
7147         if (likely(ixgbe_desc_unused(tx_ring) < size))
7148                 return -EBUSY;
7149
7150         /* A reprieve! - use start_queue because it doesn't call schedule */
7151         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7152         ++tx_ring->tx_stats.restart_queue;
7153         return 0;
7154 }
7155
7156 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7157 {
7158         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7159                 return 0;
7160
7161         return __ixgbe_maybe_stop_tx(tx_ring, size);
7162 }
7163
7164 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7165                        IXGBE_TXD_CMD_RS)
7166
7167 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7168                          struct ixgbe_tx_buffer *first,
7169                          const u8 hdr_len)
7170 {
7171         struct sk_buff *skb = first->skb;
7172         struct ixgbe_tx_buffer *tx_buffer;
7173         union ixgbe_adv_tx_desc *tx_desc;
7174         struct skb_frag_struct *frag;
7175         dma_addr_t dma;
7176         unsigned int data_len, size;
7177         u32 tx_flags = first->tx_flags;
7178         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7179         u16 i = tx_ring->next_to_use;
7180
7181         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7182
7183         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7184
7185         size = skb_headlen(skb);
7186         data_len = skb->data_len;
7187
7188 #ifdef IXGBE_FCOE
7189         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7190                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7191                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7192                         data_len = 0;
7193                 } else {
7194                         data_len -= sizeof(struct fcoe_crc_eof);
7195                 }
7196         }
7197
7198 #endif
7199         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7200
7201         tx_buffer = first;
7202
7203         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7204                 if (dma_mapping_error(tx_ring->dev, dma))
7205                         goto dma_error;
7206
7207                 /* record length, and DMA address */
7208                 dma_unmap_len_set(tx_buffer, len, size);
7209                 dma_unmap_addr_set(tx_buffer, dma, dma);
7210
7211                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7212
7213                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7214                         tx_desc->read.cmd_type_len =
7215                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7216
7217                         i++;
7218                         tx_desc++;
7219                         if (i == tx_ring->count) {
7220                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7221                                 i = 0;
7222                         }
7223                         tx_desc->read.olinfo_status = 0;
7224
7225                         dma += IXGBE_MAX_DATA_PER_TXD;
7226                         size -= IXGBE_MAX_DATA_PER_TXD;
7227
7228                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7229                 }
7230
7231                 if (likely(!data_len))
7232                         break;
7233
7234                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7235
7236                 i++;
7237                 tx_desc++;
7238                 if (i == tx_ring->count) {
7239                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7240                         i = 0;
7241                 }
7242                 tx_desc->read.olinfo_status = 0;
7243
7244 #ifdef IXGBE_FCOE
7245                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7246 #else
7247                 size = skb_frag_size(frag);
7248 #endif
7249                 data_len -= size;
7250
7251                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7252                                        DMA_TO_DEVICE);
7253
7254                 tx_buffer = &tx_ring->tx_buffer_info[i];
7255         }
7256
7257         /* write last descriptor with RS and EOP bits */
7258         cmd_type |= size | IXGBE_TXD_CMD;
7259         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7260
7261         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7262
7263         /* set the timestamp */
7264         first->time_stamp = jiffies;
7265
7266         /*
7267          * Force memory writes to complete before letting h/w know there
7268          * are new descriptors to fetch.  (Only applicable for weak-ordered
7269          * memory model archs, such as IA-64).
7270          *
7271          * We also need this memory barrier to make certain all of the
7272          * status bits have been updated before next_to_watch is written.
7273          */
7274         wmb();
7275
7276         /* set next_to_watch value indicating a packet is present */
7277         first->next_to_watch = tx_desc;
7278
7279         i++;
7280         if (i == tx_ring->count)
7281                 i = 0;
7282
7283         tx_ring->next_to_use = i;
7284
7285         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7286
7287         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7288                 writel(i, tx_ring->tail);
7289
7290                 /* we need this if more than one processor can write to our tail
7291                  * at a time, it synchronizes IO on IA64/Altix systems
7292                  */
7293                 mmiowb();
7294         }
7295
7296         return;
7297 dma_error:
7298         dev_err(tx_ring->dev, "TX DMA map failed\n");
7299
7300         /* clear dma mappings for failed tx_buffer_info map */
7301         for (;;) {
7302                 tx_buffer = &tx_ring->tx_buffer_info[i];
7303                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7304                 if (tx_buffer == first)
7305                         break;
7306                 if (i == 0)
7307                         i = tx_ring->count;
7308                 i--;
7309         }
7310
7311         tx_ring->next_to_use = i;
7312 }
7313
7314 static void ixgbe_atr(struct ixgbe_ring *ring,
7315                       struct ixgbe_tx_buffer *first)
7316 {
7317         struct ixgbe_q_vector *q_vector = ring->q_vector;
7318         union ixgbe_atr_hash_dword input = { .dword = 0 };
7319         union ixgbe_atr_hash_dword common = { .dword = 0 };
7320         union {
7321                 unsigned char *network;
7322                 struct iphdr *ipv4;
7323                 struct ipv6hdr *ipv6;
7324         } hdr;
7325         struct tcphdr *th;
7326         struct sk_buff *skb;
7327 #ifdef CONFIG_IXGBE_VXLAN
7328         u8 encap = false;
7329 #endif /* CONFIG_IXGBE_VXLAN */
7330         __be16 vlan_id;
7331
7332         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7333         if (!q_vector)
7334                 return;
7335
7336         /* do nothing if sampling is disabled */
7337         if (!ring->atr_sample_rate)
7338                 return;
7339
7340         ring->atr_count++;
7341
7342         /* snag network header to get L4 type and address */
7343         skb = first->skb;
7344         hdr.network = skb_network_header(skb);
7345         if (skb->encapsulation) {
7346 #ifdef CONFIG_IXGBE_VXLAN
7347                 struct ixgbe_adapter *adapter = q_vector->adapter;
7348
7349                 if (!adapter->vxlan_port)
7350                         return;
7351                 if (first->protocol != htons(ETH_P_IP) ||
7352                     hdr.ipv4->version != IPVERSION ||
7353                     hdr.ipv4->protocol != IPPROTO_UDP) {
7354                         return;
7355                 }
7356                 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7357                         return;
7358                 encap = true;
7359                 hdr.network = skb_inner_network_header(skb);
7360                 th = inner_tcp_hdr(skb);
7361 #else
7362                 return;
7363 #endif /* CONFIG_IXGBE_VXLAN */
7364         } else {
7365                 /* Currently only IPv4/IPv6 with TCP is supported */
7366                 if ((first->protocol != htons(ETH_P_IPV6) ||
7367                      hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7368                     (first->protocol != htons(ETH_P_IP) ||
7369                      hdr.ipv4->protocol != IPPROTO_TCP))
7370                         return;
7371                 th = tcp_hdr(skb);
7372         }
7373
7374         /* skip this packet since it is invalid or the socket is closing */
7375         if (!th || th->fin)
7376                 return;
7377
7378         /* sample on all syn packets or once every atr sample count */
7379         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7380                 return;
7381
7382         /* reset sample count */
7383         ring->atr_count = 0;
7384
7385         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7386
7387         /*
7388          * src and dst are inverted, think how the receiver sees them
7389          *
7390          * The input is broken into two sections, a non-compressed section
7391          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7392          * is XORed together and stored in the compressed dword.
7393          */
7394         input.formatted.vlan_id = vlan_id;
7395
7396         /*
7397          * since src port and flex bytes occupy the same word XOR them together
7398          * and write the value to source port portion of compressed dword
7399          */
7400         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7401                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7402         else
7403                 common.port.src ^= th->dest ^ first->protocol;
7404         common.port.dst ^= th->source;
7405
7406         if (first->protocol == htons(ETH_P_IP)) {
7407                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7408                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7409         } else {
7410                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7411                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7412                              hdr.ipv6->saddr.s6_addr32[1] ^
7413                              hdr.ipv6->saddr.s6_addr32[2] ^
7414                              hdr.ipv6->saddr.s6_addr32[3] ^
7415                              hdr.ipv6->daddr.s6_addr32[0] ^
7416                              hdr.ipv6->daddr.s6_addr32[1] ^
7417                              hdr.ipv6->daddr.s6_addr32[2] ^
7418                              hdr.ipv6->daddr.s6_addr32[3];
7419         }
7420
7421 #ifdef CONFIG_IXGBE_VXLAN
7422         if (encap)
7423                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7424 #endif /* CONFIG_IXGBE_VXLAN */
7425
7426         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7427         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7428                                               input, common, ring->queue_index);
7429 }
7430
7431 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7432                               void *accel_priv, select_queue_fallback_t fallback)
7433 {
7434         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7435 #ifdef IXGBE_FCOE
7436         struct ixgbe_adapter *adapter;
7437         struct ixgbe_ring_feature *f;
7438         int txq;
7439 #endif
7440
7441         if (fwd_adapter)
7442                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7443
7444 #ifdef IXGBE_FCOE
7445
7446         /*
7447          * only execute the code below if protocol is FCoE
7448          * or FIP and we have FCoE enabled on the adapter
7449          */
7450         switch (vlan_get_protocol(skb)) {
7451         case htons(ETH_P_FCOE):
7452         case htons(ETH_P_FIP):
7453                 adapter = netdev_priv(dev);
7454
7455                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7456                         break;
7457         default:
7458                 return fallback(dev, skb);
7459         }
7460
7461         f = &adapter->ring_feature[RING_F_FCOE];
7462
7463         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7464                                            smp_processor_id();
7465
7466         while (txq >= f->indices)
7467                 txq -= f->indices;
7468
7469         return txq + f->offset;
7470 #else
7471         return fallback(dev, skb);
7472 #endif
7473 }
7474
7475 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7476                           struct ixgbe_adapter *adapter,
7477                           struct ixgbe_ring *tx_ring)
7478 {
7479         struct ixgbe_tx_buffer *first;
7480         int tso;
7481         u32 tx_flags = 0;
7482         unsigned short f;
7483         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7484         __be16 protocol = skb->protocol;
7485         u8 hdr_len = 0;
7486
7487         /*
7488          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7489          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7490          *       + 2 desc gap to keep tail from touching head,
7491          *       + 1 desc for context descriptor,
7492          * otherwise try next time
7493          */
7494         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7495                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7496
7497         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7498                 tx_ring->tx_stats.tx_busy++;
7499                 return NETDEV_TX_BUSY;
7500         }
7501
7502         /* record the location of the first descriptor for this packet */
7503         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7504         first->skb = skb;
7505         first->bytecount = skb->len;
7506         first->gso_segs = 1;
7507
7508         /* if we have a HW VLAN tag being added default to the HW one */
7509         if (skb_vlan_tag_present(skb)) {
7510                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7511                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7512         /* else if it is a SW VLAN check the next protocol and store the tag */
7513         } else if (protocol == htons(ETH_P_8021Q)) {
7514                 struct vlan_hdr *vhdr, _vhdr;
7515                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7516                 if (!vhdr)
7517                         goto out_drop;
7518
7519                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7520                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7521                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7522         }
7523         protocol = vlan_get_protocol(skb);
7524
7525         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7526             adapter->ptp_clock &&
7527             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7528                                    &adapter->state)) {
7529                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7530                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7531
7532                 /* schedule check for Tx timestamp */
7533                 adapter->ptp_tx_skb = skb_get(skb);
7534                 adapter->ptp_tx_start = jiffies;
7535                 schedule_work(&adapter->ptp_tx_work);
7536         }
7537
7538         skb_tx_timestamp(skb);
7539
7540 #ifdef CONFIG_PCI_IOV
7541         /*
7542          * Use the l2switch_enable flag - would be false if the DMA
7543          * Tx switch had been disabled.
7544          */
7545         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7546                 tx_flags |= IXGBE_TX_FLAGS_CC;
7547
7548 #endif
7549         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7550         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7551             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7552              (skb->priority != TC_PRIO_CONTROL))) {
7553                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7554                 tx_flags |= (skb->priority & 0x7) <<
7555                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7556                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7557                         struct vlan_ethhdr *vhdr;
7558
7559                         if (skb_cow_head(skb, 0))
7560                                 goto out_drop;
7561                         vhdr = (struct vlan_ethhdr *)skb->data;
7562                         vhdr->h_vlan_TCI = htons(tx_flags >>
7563                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7564                 } else {
7565                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7566                 }
7567         }
7568
7569         /* record initial flags and protocol */
7570         first->tx_flags = tx_flags;
7571         first->protocol = protocol;
7572
7573 #ifdef IXGBE_FCOE
7574         /* setup tx offload for FCoE */
7575         if ((protocol == htons(ETH_P_FCOE)) &&
7576             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7577                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7578                 if (tso < 0)
7579                         goto out_drop;
7580
7581                 goto xmit_fcoe;
7582         }
7583
7584 #endif /* IXGBE_FCOE */
7585         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7586         if (tso < 0)
7587                 goto out_drop;
7588         else if (!tso)
7589                 ixgbe_tx_csum(tx_ring, first);
7590
7591         /* add the ATR filter if ATR is on */
7592         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7593                 ixgbe_atr(tx_ring, first);
7594
7595 #ifdef IXGBE_FCOE
7596 xmit_fcoe:
7597 #endif /* IXGBE_FCOE */
7598         ixgbe_tx_map(tx_ring, first, hdr_len);
7599
7600         return NETDEV_TX_OK;
7601
7602 out_drop:
7603         dev_kfree_skb_any(first->skb);
7604         first->skb = NULL;
7605
7606         return NETDEV_TX_OK;
7607 }
7608
7609 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7610                                       struct net_device *netdev,
7611                                       struct ixgbe_ring *ring)
7612 {
7613         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7614         struct ixgbe_ring *tx_ring;
7615
7616         /*
7617          * The minimum packet size for olinfo paylen is 17 so pad the skb
7618          * in order to meet this minimum size requirement.
7619          */
7620         if (skb_put_padto(skb, 17))
7621                 return NETDEV_TX_OK;
7622
7623         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7624
7625         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7626 }
7627
7628 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7629                                     struct net_device *netdev)
7630 {
7631         return __ixgbe_xmit_frame(skb, netdev, NULL);
7632 }
7633
7634 /**
7635  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7636  * @netdev: network interface device structure
7637  * @p: pointer to an address structure
7638  *
7639  * Returns 0 on success, negative on failure
7640  **/
7641 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7642 {
7643         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7644         struct ixgbe_hw *hw = &adapter->hw;
7645         struct sockaddr *addr = p;
7646         int ret;
7647
7648         if (!is_valid_ether_addr(addr->sa_data))
7649                 return -EADDRNOTAVAIL;
7650
7651         ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7652         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7653         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7654
7655         ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7656         return ret > 0 ? 0 : ret;
7657 }
7658
7659 static int
7660 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7661 {
7662         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7663         struct ixgbe_hw *hw = &adapter->hw;
7664         u16 value;
7665         int rc;
7666
7667         if (prtad != hw->phy.mdio.prtad)
7668                 return -EINVAL;
7669         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7670         if (!rc)
7671                 rc = value;
7672         return rc;
7673 }
7674
7675 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7676                             u16 addr, u16 value)
7677 {
7678         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7679         struct ixgbe_hw *hw = &adapter->hw;
7680
7681         if (prtad != hw->phy.mdio.prtad)
7682                 return -EINVAL;
7683         return hw->phy.ops.write_reg(hw, addr, devad, value);
7684 }
7685
7686 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7687 {
7688         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7689
7690         switch (cmd) {
7691         case SIOCSHWTSTAMP:
7692                 return ixgbe_ptp_set_ts_config(adapter, req);
7693         case SIOCGHWTSTAMP:
7694                 return ixgbe_ptp_get_ts_config(adapter, req);
7695         default:
7696                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7697         }
7698 }
7699
7700 /**
7701  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7702  * netdev->dev_addrs
7703  * @netdev: network interface device structure
7704  *
7705  * Returns non-zero on failure
7706  **/
7707 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7708 {
7709         int err = 0;
7710         struct ixgbe_adapter *adapter = netdev_priv(dev);
7711         struct ixgbe_hw *hw = &adapter->hw;
7712
7713         if (is_valid_ether_addr(hw->mac.san_addr)) {
7714                 rtnl_lock();
7715                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7716                 rtnl_unlock();
7717
7718                 /* update SAN MAC vmdq pool selection */
7719                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7720         }
7721         return err;
7722 }
7723
7724 /**
7725  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7726  * netdev->dev_addrs
7727  * @netdev: network interface device structure
7728  *
7729  * Returns non-zero on failure
7730  **/
7731 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7732 {
7733         int err = 0;
7734         struct ixgbe_adapter *adapter = netdev_priv(dev);
7735         struct ixgbe_mac_info *mac = &adapter->hw.mac;
7736
7737         if (is_valid_ether_addr(mac->san_addr)) {
7738                 rtnl_lock();
7739                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7740                 rtnl_unlock();
7741         }
7742         return err;
7743 }
7744
7745 #ifdef CONFIG_NET_POLL_CONTROLLER
7746 /*
7747  * Polling 'interrupt' - used by things like netconsole to send skbs
7748  * without having to re-enable interrupts. It's not called while
7749  * the interrupt routine is executing.
7750  */
7751 static void ixgbe_netpoll(struct net_device *netdev)
7752 {
7753         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7754         int i;
7755
7756         /* if interface is down do nothing */
7757         if (test_bit(__IXGBE_DOWN, &adapter->state))
7758                 return;
7759
7760         /* loop through and schedule all active queues */
7761         for (i = 0; i < adapter->num_q_vectors; i++)
7762                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7763 }
7764
7765 #endif
7766 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7767                                                    struct rtnl_link_stats64 *stats)
7768 {
7769         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7770         int i;
7771
7772         rcu_read_lock();
7773         for (i = 0; i < adapter->num_rx_queues; i++) {
7774                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7775                 u64 bytes, packets;
7776                 unsigned int start;
7777
7778                 if (ring) {
7779                         do {
7780                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7781                                 packets = ring->stats.packets;
7782                                 bytes   = ring->stats.bytes;
7783                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7784                         stats->rx_packets += packets;
7785                         stats->rx_bytes   += bytes;
7786                 }
7787         }
7788
7789         for (i = 0; i < adapter->num_tx_queues; i++) {
7790                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7791                 u64 bytes, packets;
7792                 unsigned int start;
7793
7794                 if (ring) {
7795                         do {
7796                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7797                                 packets = ring->stats.packets;
7798                                 bytes   = ring->stats.bytes;
7799                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7800                         stats->tx_packets += packets;
7801                         stats->tx_bytes   += bytes;
7802                 }
7803         }
7804         rcu_read_unlock();
7805         /* following stats updated by ixgbe_watchdog_task() */
7806         stats->multicast        = netdev->stats.multicast;
7807         stats->rx_errors        = netdev->stats.rx_errors;
7808         stats->rx_length_errors = netdev->stats.rx_length_errors;
7809         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
7810         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7811         return stats;
7812 }
7813
7814 #ifdef CONFIG_IXGBE_DCB
7815 /**
7816  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7817  * @adapter: pointer to ixgbe_adapter
7818  * @tc: number of traffic classes currently enabled
7819  *
7820  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7821  * 802.1Q priority maps to a packet buffer that exists.
7822  */
7823 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7824 {
7825         struct ixgbe_hw *hw = &adapter->hw;
7826         u32 reg, rsave;
7827         int i;
7828
7829         /* 82598 have a static priority to TC mapping that can not
7830          * be changed so no validation is needed.
7831          */
7832         if (hw->mac.type == ixgbe_mac_82598EB)
7833                 return;
7834
7835         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7836         rsave = reg;
7837
7838         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7839                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7840
7841                 /* If up2tc is out of bounds default to zero */
7842                 if (up2tc > tc)
7843                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7844         }
7845
7846         if (reg != rsave)
7847                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7848
7849         return;
7850 }
7851
7852 /**
7853  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7854  * @adapter: Pointer to adapter struct
7855  *
7856  * Populate the netdev user priority to tc map
7857  */
7858 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7859 {
7860         struct net_device *dev = adapter->netdev;
7861         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7862         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7863         u8 prio;
7864
7865         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7866                 u8 tc = 0;
7867
7868                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7869                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7870                 else if (ets)
7871                         tc = ets->prio_tc[prio];
7872
7873                 netdev_set_prio_tc_map(dev, prio, tc);
7874         }
7875 }
7876
7877 #endif /* CONFIG_IXGBE_DCB */
7878 /**
7879  * ixgbe_setup_tc - configure net_device for multiple traffic classes
7880  *
7881  * @netdev: net device to configure
7882  * @tc: number of traffic classes to enable
7883  */
7884 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7885 {
7886         struct ixgbe_adapter *adapter = netdev_priv(dev);
7887         struct ixgbe_hw *hw = &adapter->hw;
7888         bool pools;
7889
7890         /* Hardware supports up to 8 traffic classes */
7891         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7892                 return -EINVAL;
7893
7894         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7895                 return -EINVAL;
7896
7897         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7898         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7899                 return -EBUSY;
7900
7901         /* Hardware has to reinitialize queues and interrupts to
7902          * match packet buffer alignment. Unfortunately, the
7903          * hardware is not flexible enough to do this dynamically.
7904          */
7905         if (netif_running(dev))
7906                 ixgbe_close(dev);
7907         ixgbe_clear_interrupt_scheme(adapter);
7908
7909 #ifdef CONFIG_IXGBE_DCB
7910         if (tc) {
7911                 netdev_set_num_tc(dev, tc);
7912                 ixgbe_set_prio_tc_map(adapter);
7913
7914                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7915
7916                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7917                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7918                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
7919                 }
7920         } else {
7921                 netdev_reset_tc(dev);
7922
7923                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7924                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7925
7926                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7927
7928                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7929                 adapter->dcb_cfg.pfc_mode_enable = false;
7930         }
7931
7932         ixgbe_validate_rtr(adapter, tc);
7933
7934 #endif /* CONFIG_IXGBE_DCB */
7935         ixgbe_init_interrupt_scheme(adapter);
7936
7937         if (netif_running(dev))
7938                 return ixgbe_open(dev);
7939
7940         return 0;
7941 }
7942
7943 #ifdef CONFIG_PCI_IOV
7944 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7945 {
7946         struct net_device *netdev = adapter->netdev;
7947
7948         rtnl_lock();
7949         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7950         rtnl_unlock();
7951 }
7952
7953 #endif
7954 void ixgbe_do_reset(struct net_device *netdev)
7955 {
7956         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7957
7958         if (netif_running(netdev))
7959                 ixgbe_reinit_locked(adapter);
7960         else
7961                 ixgbe_reset(adapter);
7962 }
7963
7964 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7965                                             netdev_features_t features)
7966 {
7967         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7968
7969         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7970         if (!(features & NETIF_F_RXCSUM))
7971                 features &= ~NETIF_F_LRO;
7972
7973         /* Turn off LRO if not RSC capable */
7974         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7975                 features &= ~NETIF_F_LRO;
7976
7977         return features;
7978 }
7979
7980 static int ixgbe_set_features(struct net_device *netdev,
7981                               netdev_features_t features)
7982 {
7983         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7984         netdev_features_t changed = netdev->features ^ features;
7985         bool need_reset = false;
7986
7987         /* Make sure RSC matches LRO, reset if change */
7988         if (!(features & NETIF_F_LRO)) {
7989                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7990                         need_reset = true;
7991                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7992         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7993                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7994                 if (adapter->rx_itr_setting == 1 ||
7995                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7996                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7997                         need_reset = true;
7998                 } else if ((changed ^ features) & NETIF_F_LRO) {
7999                         e_info(probe, "rx-usecs set too low, "
8000                                "disabling RSC\n");
8001                 }
8002         }
8003
8004         /*
8005          * Check if Flow Director n-tuple support was enabled or disabled.  If
8006          * the state changed, we need to reset.
8007          */
8008         switch (features & NETIF_F_NTUPLE) {
8009         case NETIF_F_NTUPLE:
8010                 /* turn off ATR, enable perfect filters and reset */
8011                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8012                         need_reset = true;
8013
8014                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8015                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8016                 break;
8017         default:
8018                 /* turn off perfect filters, enable ATR and reset */
8019                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8020                         need_reset = true;
8021
8022                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8023
8024                 /* We cannot enable ATR if SR-IOV is enabled */
8025                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8026                         break;
8027
8028                 /* We cannot enable ATR if we have 2 or more traffic classes */
8029                 if (netdev_get_num_tc(netdev) > 1)
8030                         break;
8031
8032                 /* We cannot enable ATR if RSS is disabled */
8033                 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8034                         break;
8035
8036                 /* A sample rate of 0 indicates ATR disabled */
8037                 if (!adapter->atr_sample_rate)
8038                         break;
8039
8040                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8041                 break;
8042         }
8043
8044         if (features & NETIF_F_HW_VLAN_CTAG_RX)
8045                 ixgbe_vlan_strip_enable(adapter);
8046         else
8047                 ixgbe_vlan_strip_disable(adapter);
8048
8049         if (changed & NETIF_F_RXALL)
8050                 need_reset = true;
8051
8052         netdev->features = features;
8053
8054 #ifdef CONFIG_IXGBE_VXLAN
8055         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8056                 if (features & NETIF_F_RXCSUM)
8057                         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8058                 else
8059                         ixgbe_clear_vxlan_port(adapter);
8060         }
8061 #endif /* CONFIG_IXGBE_VXLAN */
8062
8063         if (need_reset)
8064                 ixgbe_do_reset(netdev);
8065
8066         return 0;
8067 }
8068
8069 #ifdef CONFIG_IXGBE_VXLAN
8070 /**
8071  * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8072  * @dev: The port's netdev
8073  * @sa_family: Socket Family that VXLAN is notifiying us about
8074  * @port: New UDP port number that VXLAN started listening to
8075  **/
8076 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8077                                  __be16 port)
8078 {
8079         struct ixgbe_adapter *adapter = netdev_priv(dev);
8080         struct ixgbe_hw *hw = &adapter->hw;
8081         u16 new_port = ntohs(port);
8082
8083         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8084                 return;
8085
8086         if (sa_family == AF_INET6)
8087                 return;
8088
8089         if (adapter->vxlan_port == new_port)
8090                 return;
8091
8092         if (adapter->vxlan_port) {
8093                 netdev_info(dev,
8094                             "Hit Max num of VXLAN ports, not adding port %d\n",
8095                             new_port);
8096                 return;
8097         }
8098
8099         adapter->vxlan_port = new_port;
8100         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8101 }
8102
8103 /**
8104  * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8105  * @dev: The port's netdev
8106  * @sa_family: Socket Family that VXLAN is notifying us about
8107  * @port: UDP port number that VXLAN stopped listening to
8108  **/
8109 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8110                                  __be16 port)
8111 {
8112         struct ixgbe_adapter *adapter = netdev_priv(dev);
8113         u16 new_port = ntohs(port);
8114
8115         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8116                 return;
8117
8118         if (sa_family == AF_INET6)
8119                 return;
8120
8121         if (adapter->vxlan_port != new_port) {
8122                 netdev_info(dev, "Port %d was not found, not deleting\n",
8123                             new_port);
8124                 return;
8125         }
8126
8127         ixgbe_clear_vxlan_port(adapter);
8128         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8129 }
8130 #endif /* CONFIG_IXGBE_VXLAN */
8131
8132 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8133                              struct net_device *dev,
8134                              const unsigned char *addr, u16 vid,
8135                              u16 flags)
8136 {
8137         /* guarantee we can provide a unique filter for the unicast address */
8138         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8139                 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8140                         return -ENOMEM;
8141         }
8142
8143         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8144 }
8145
8146 /**
8147  * ixgbe_configure_bridge_mode - set various bridge modes
8148  * @adapter - the private structure
8149  * @mode - requested bridge mode
8150  *
8151  * Configure some settings require for various bridge modes.
8152  **/
8153 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8154                                        __u16 mode)
8155 {
8156         struct ixgbe_hw *hw = &adapter->hw;
8157         unsigned int p, num_pools;
8158         u32 vmdctl;
8159
8160         switch (mode) {
8161         case BRIDGE_MODE_VEPA:
8162                 /* disable Tx loopback, rely on switch hairpin mode */
8163                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8164
8165                 /* must enable Rx switching replication to allow multicast
8166                  * packet reception on all VFs, and to enable source address
8167                  * pruning.
8168                  */
8169                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8170                 vmdctl |= IXGBE_VT_CTL_REPLEN;
8171                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8172
8173                 /* enable Rx source address pruning. Note, this requires
8174                  * replication to be enabled or else it does nothing.
8175                  */
8176                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8177                 for (p = 0; p < num_pools; p++) {
8178                         if (hw->mac.ops.set_source_address_pruning)
8179                                 hw->mac.ops.set_source_address_pruning(hw,
8180                                                                        true,
8181                                                                        p);
8182                 }
8183                 break;
8184         case BRIDGE_MODE_VEB:
8185                 /* enable Tx loopback for internal VF/PF communication */
8186                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8187                                 IXGBE_PFDTXGSWC_VT_LBEN);
8188
8189                 /* disable Rx switching replication unless we have SR-IOV
8190                  * virtual functions
8191                  */
8192                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8193                 if (!adapter->num_vfs)
8194                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8195                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8196
8197                 /* disable Rx source address pruning, since we don't expect to
8198                  * be receiving external loopback of our transmitted frames.
8199                  */
8200                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8201                 for (p = 0; p < num_pools; p++) {
8202                         if (hw->mac.ops.set_source_address_pruning)
8203                                 hw->mac.ops.set_source_address_pruning(hw,
8204                                                                        false,
8205                                                                        p);
8206                 }
8207                 break;
8208         default:
8209                 return -EINVAL;
8210         }
8211
8212         adapter->bridge_mode = mode;
8213
8214         e_info(drv, "enabling bridge mode: %s\n",
8215                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8216
8217         return 0;
8218 }
8219
8220 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8221                                     struct nlmsghdr *nlh, u16 flags)
8222 {
8223         struct ixgbe_adapter *adapter = netdev_priv(dev);
8224         struct nlattr *attr, *br_spec;
8225         int rem;
8226
8227         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8228                 return -EOPNOTSUPP;
8229
8230         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8231         if (!br_spec)
8232                 return -EINVAL;
8233
8234         nla_for_each_nested(attr, br_spec, rem) {
8235                 int status;
8236                 __u16 mode;
8237
8238                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8239                         continue;
8240
8241                 if (nla_len(attr) < sizeof(mode))
8242                         return -EINVAL;
8243
8244                 mode = nla_get_u16(attr);
8245                 status = ixgbe_configure_bridge_mode(adapter, mode);
8246                 if (status)
8247                         return status;
8248
8249                 break;
8250         }
8251
8252         return 0;
8253 }
8254
8255 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8256                                     struct net_device *dev,
8257                                     u32 filter_mask, int nlflags)
8258 {
8259         struct ixgbe_adapter *adapter = netdev_priv(dev);
8260
8261         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8262                 return 0;
8263
8264         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8265                                        adapter->bridge_mode, 0, 0, nlflags,
8266                                        filter_mask, NULL);
8267 }
8268
8269 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8270 {
8271         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8272         struct ixgbe_adapter *adapter = netdev_priv(pdev);
8273         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8274         unsigned int limit;
8275         int pool, err;
8276
8277         /* Hardware has a limited number of available pools. Each VF, and the
8278          * PF require a pool. Check to ensure we don't attempt to use more
8279          * then the available number of pools.
8280          */
8281         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8282                 return ERR_PTR(-EINVAL);
8283
8284 #ifdef CONFIG_RPS
8285         if (vdev->num_rx_queues != vdev->num_tx_queues) {
8286                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8287                             vdev->name);
8288                 return ERR_PTR(-EINVAL);
8289         }
8290 #endif
8291         /* Check for hardware restriction on number of rx/tx queues */
8292         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8293             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8294                 netdev_info(pdev,
8295                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8296                             pdev->name);
8297                 return ERR_PTR(-EINVAL);
8298         }
8299
8300         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8301               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8302             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8303                 return ERR_PTR(-EBUSY);
8304
8305         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8306         if (!fwd_adapter)
8307                 return ERR_PTR(-ENOMEM);
8308
8309         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8310         adapter->num_rx_pools++;
8311         set_bit(pool, &adapter->fwd_bitmask);
8312         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8313
8314         /* Enable VMDq flag so device will be set in VM mode */
8315         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8316         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8317         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8318
8319         /* Force reinit of ring allocation with VMDQ enabled */
8320         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8321         if (err)
8322                 goto fwd_add_err;
8323         fwd_adapter->pool = pool;
8324         fwd_adapter->real_adapter = adapter;
8325         err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8326         if (err)
8327                 goto fwd_add_err;
8328         netif_tx_start_all_queues(vdev);
8329         return fwd_adapter;
8330 fwd_add_err:
8331         /* unwind counter and free adapter struct */
8332         netdev_info(pdev,
8333                     "%s: dfwd hardware acceleration failed\n", vdev->name);
8334         clear_bit(pool, &adapter->fwd_bitmask);
8335         adapter->num_rx_pools--;
8336         kfree(fwd_adapter);
8337         return ERR_PTR(err);
8338 }
8339
8340 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8341 {
8342         struct ixgbe_fwd_adapter *fwd_adapter = priv;
8343         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8344         unsigned int limit;
8345
8346         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8347         adapter->num_rx_pools--;
8348
8349         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8350         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8351         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8352         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8353         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8354                    fwd_adapter->pool, adapter->num_rx_pools,
8355                    fwd_adapter->rx_base_queue,
8356                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8357                    adapter->fwd_bitmask);
8358         kfree(fwd_adapter);
8359 }
8360
8361 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8362 static netdev_features_t
8363 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8364                      netdev_features_t features)
8365 {
8366         if (!skb->encapsulation)
8367                 return features;
8368
8369         if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8370                      IXGBE_MAX_TUNNEL_HDR_LEN))
8371                 return features & ~NETIF_F_ALL_CSUM;
8372
8373         return features;
8374 }
8375
8376 static const struct net_device_ops ixgbe_netdev_ops = {
8377         .ndo_open               = ixgbe_open,
8378         .ndo_stop               = ixgbe_close,
8379         .ndo_start_xmit         = ixgbe_xmit_frame,
8380         .ndo_select_queue       = ixgbe_select_queue,
8381         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
8382         .ndo_validate_addr      = eth_validate_addr,
8383         .ndo_set_mac_address    = ixgbe_set_mac,
8384         .ndo_change_mtu         = ixgbe_change_mtu,
8385         .ndo_tx_timeout         = ixgbe_tx_timeout,
8386         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
8387         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
8388         .ndo_do_ioctl           = ixgbe_ioctl,
8389         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
8390         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
8391         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
8392         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
8393         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8394         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
8395         .ndo_get_stats64        = ixgbe_get_stats64,
8396 #ifdef CONFIG_IXGBE_DCB
8397         .ndo_setup_tc           = ixgbe_setup_tc,
8398 #endif
8399 #ifdef CONFIG_NET_POLL_CONTROLLER
8400         .ndo_poll_controller    = ixgbe_netpoll,
8401 #endif
8402 #ifdef CONFIG_NET_RX_BUSY_POLL
8403         .ndo_busy_poll          = ixgbe_low_latency_recv,
8404 #endif
8405 #ifdef IXGBE_FCOE
8406         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8407         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8408         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8409         .ndo_fcoe_enable = ixgbe_fcoe_enable,
8410         .ndo_fcoe_disable = ixgbe_fcoe_disable,
8411         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8412         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8413 #endif /* IXGBE_FCOE */
8414         .ndo_set_features = ixgbe_set_features,
8415         .ndo_fix_features = ixgbe_fix_features,
8416         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
8417         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
8418         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
8419         .ndo_dfwd_add_station   = ixgbe_fwd_add,
8420         .ndo_dfwd_del_station   = ixgbe_fwd_del,
8421 #ifdef CONFIG_IXGBE_VXLAN
8422         .ndo_add_vxlan_port     = ixgbe_add_vxlan_port,
8423         .ndo_del_vxlan_port     = ixgbe_del_vxlan_port,
8424 #endif /* CONFIG_IXGBE_VXLAN */
8425         .ndo_features_check     = ixgbe_features_check,
8426 };
8427
8428 /**
8429  * ixgbe_enumerate_functions - Get the number of ports this device has
8430  * @adapter: adapter structure
8431  *
8432  * This function enumerates the phsyical functions co-located on a single slot,
8433  * in order to determine how many ports a device has. This is most useful in
8434  * determining the required GT/s of PCIe bandwidth necessary for optimal
8435  * performance.
8436  **/
8437 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8438 {
8439         struct pci_dev *entry, *pdev = adapter->pdev;
8440         int physfns = 0;
8441
8442         /* Some cards can not use the generic count PCIe functions method,
8443          * because they are behind a parent switch, so we hardcode these with
8444          * the correct number of functions.
8445          */
8446         if (ixgbe_pcie_from_parent(&adapter->hw))
8447                 physfns = 4;
8448
8449         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8450                 /* don't count virtual functions */
8451                 if (entry->is_virtfn)
8452                         continue;
8453
8454                 /* When the devices on the bus don't all match our device ID,
8455                  * we can't reliably determine the correct number of
8456                  * functions. This can occur if a function has been direct
8457                  * attached to a virtual machine using VT-d, for example. In
8458                  * this case, simply return -1 to indicate this.
8459                  */
8460                 if ((entry->vendor != pdev->vendor) ||
8461                     (entry->device != pdev->device))
8462                         return -1;
8463
8464                 physfns++;
8465         }
8466
8467         return physfns;
8468 }
8469
8470 /**
8471  * ixgbe_wol_supported - Check whether device supports WoL
8472  * @hw: hw specific details
8473  * @device_id: the device ID
8474  * @subdev_id: the subsystem device ID
8475  *
8476  * This function is used by probe and ethtool to determine
8477  * which devices have WoL support
8478  *
8479  **/
8480 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8481                         u16 subdevice_id)
8482 {
8483         struct ixgbe_hw *hw = &adapter->hw;
8484         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8485         int is_wol_supported = 0;
8486
8487         switch (device_id) {
8488         case IXGBE_DEV_ID_82599_SFP:
8489                 /* Only these subdevices could supports WOL */
8490                 switch (subdevice_id) {
8491                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8492                 case IXGBE_SUBDEV_ID_82599_560FLR:
8493                         /* only support first port */
8494                         if (hw->bus.func != 0)
8495                                 break;
8496                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8497                 case IXGBE_SUBDEV_ID_82599_SFP:
8498                 case IXGBE_SUBDEV_ID_82599_RNDC:
8499                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8500                 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8501                         is_wol_supported = 1;
8502                         break;
8503                 }
8504                 break;
8505         case IXGBE_DEV_ID_82599EN_SFP:
8506                 /* Only this subdevice supports WOL */
8507                 switch (subdevice_id) {
8508                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8509                         is_wol_supported = 1;
8510                         break;
8511                 }
8512                 break;
8513         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8514                 /* All except this subdevice support WOL */
8515                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8516                         is_wol_supported = 1;
8517                 break;
8518         case IXGBE_DEV_ID_82599_KX4:
8519                 is_wol_supported = 1;
8520                 break;
8521         case IXGBE_DEV_ID_X540T:
8522         case IXGBE_DEV_ID_X540T1:
8523         case IXGBE_DEV_ID_X550T:
8524         case IXGBE_DEV_ID_X550EM_X_KX4:
8525         case IXGBE_DEV_ID_X550EM_X_KR:
8526         case IXGBE_DEV_ID_X550EM_X_10G_T:
8527                 /* check eeprom to see if enabled wol */
8528                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8529                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8530                      (hw->bus.func == 0))) {
8531                         is_wol_supported = 1;
8532                 }
8533                 break;
8534         }
8535
8536         return is_wol_supported;
8537 }
8538
8539 /**
8540  * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8541  * @adapter: Pointer to adapter struct
8542  */
8543 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8544 {
8545 #ifdef CONFIG_OF
8546         struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8547         struct ixgbe_hw *hw = &adapter->hw;
8548         const unsigned char *addr;
8549
8550         addr = of_get_mac_address(dp);
8551         if (addr) {
8552                 ether_addr_copy(hw->mac.perm_addr, addr);
8553                 return;
8554         }
8555 #endif /* CONFIG_OF */
8556
8557 #ifdef CONFIG_SPARC
8558         ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8559 #endif /* CONFIG_SPARC */
8560 }
8561
8562 /**
8563  * ixgbe_probe - Device Initialization Routine
8564  * @pdev: PCI device information struct
8565  * @ent: entry in ixgbe_pci_tbl
8566  *
8567  * Returns 0 on success, negative on failure
8568  *
8569  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8570  * The OS initialization, configuring of the adapter private structure,
8571  * and a hardware reset occur.
8572  **/
8573 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8574 {
8575         struct net_device *netdev;
8576         struct ixgbe_adapter *adapter = NULL;
8577         struct ixgbe_hw *hw;
8578         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8579         int i, err, pci_using_dac, expected_gts;
8580         unsigned int indices = MAX_TX_QUEUES;
8581         u8 part_str[IXGBE_PBANUM_LENGTH];
8582         bool disable_dev = false;
8583 #ifdef IXGBE_FCOE
8584         u16 device_caps;
8585 #endif
8586         u32 eec;
8587
8588         /* Catch broken hardware that put the wrong VF device ID in
8589          * the PCIe SR-IOV capability.
8590          */
8591         if (pdev->is_virtfn) {
8592                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8593                      pci_name(pdev), pdev->vendor, pdev->device);
8594                 return -EINVAL;
8595         }
8596
8597         err = pci_enable_device_mem(pdev);
8598         if (err)
8599                 return err;
8600
8601         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8602                 pci_using_dac = 1;
8603         } else {
8604                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8605                 if (err) {
8606                         dev_err(&pdev->dev,
8607                                 "No usable DMA configuration, aborting\n");
8608                         goto err_dma;
8609                 }
8610                 pci_using_dac = 0;
8611         }
8612
8613         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8614                                            IORESOURCE_MEM), ixgbe_driver_name);
8615         if (err) {
8616                 dev_err(&pdev->dev,
8617                         "pci_request_selected_regions failed 0x%x\n", err);
8618                 goto err_pci_reg;
8619         }
8620
8621         pci_enable_pcie_error_reporting(pdev);
8622
8623         pci_set_master(pdev);
8624         pci_save_state(pdev);
8625
8626         if (ii->mac == ixgbe_mac_82598EB) {
8627 #ifdef CONFIG_IXGBE_DCB
8628                 /* 8 TC w/ 4 queues per TC */
8629                 indices = 4 * MAX_TRAFFIC_CLASS;
8630 #else
8631                 indices = IXGBE_MAX_RSS_INDICES;
8632 #endif
8633         }
8634
8635         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8636         if (!netdev) {
8637                 err = -ENOMEM;
8638                 goto err_alloc_etherdev;
8639         }
8640
8641         SET_NETDEV_DEV(netdev, &pdev->dev);
8642
8643         adapter = netdev_priv(netdev);
8644
8645         adapter->netdev = netdev;
8646         adapter->pdev = pdev;
8647         hw = &adapter->hw;
8648         hw->back = adapter;
8649         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8650
8651         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8652                               pci_resource_len(pdev, 0));
8653         adapter->io_addr = hw->hw_addr;
8654         if (!hw->hw_addr) {
8655                 err = -EIO;
8656                 goto err_ioremap;
8657         }
8658
8659         netdev->netdev_ops = &ixgbe_netdev_ops;
8660         ixgbe_set_ethtool_ops(netdev);
8661         netdev->watchdog_timeo = 5 * HZ;
8662         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8663
8664         /* Setup hw api */
8665         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8666         hw->mac.type  = ii->mac;
8667         hw->mvals     = ii->mvals;
8668
8669         /* EEPROM */
8670         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8671         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8672         if (ixgbe_removed(hw->hw_addr)) {
8673                 err = -EIO;
8674                 goto err_ioremap;
8675         }
8676         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8677         if (!(eec & (1 << 8)))
8678                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8679
8680         /* PHY */
8681         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8682         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8683         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8684         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8685         hw->phy.mdio.mmds = 0;
8686         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8687         hw->phy.mdio.dev = netdev;
8688         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8689         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8690
8691         ii->get_invariants(hw);
8692
8693         /* setup the private structure */
8694         err = ixgbe_sw_init(adapter);
8695         if (err)
8696                 goto err_sw_init;
8697
8698         /* Make it possible the adapter to be woken up via WOL */
8699         switch (adapter->hw.mac.type) {
8700         case ixgbe_mac_82599EB:
8701         case ixgbe_mac_X540:
8702         case ixgbe_mac_X550:
8703         case ixgbe_mac_X550EM_x:
8704                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8705                 break;
8706         default:
8707                 break;
8708         }
8709
8710         /*
8711          * If there is a fan on this device and it has failed log the
8712          * failure.
8713          */
8714         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8715                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8716                 if (esdp & IXGBE_ESDP_SDP1)
8717                         e_crit(probe, "Fan has stopped, replace the adapter\n");
8718         }
8719
8720         if (allow_unsupported_sfp)
8721                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8722
8723         /* reset_hw fills in the perm_addr as well */
8724         hw->phy.reset_if_overtemp = true;
8725         err = hw->mac.ops.reset_hw(hw);
8726         hw->phy.reset_if_overtemp = false;
8727         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8728                 err = 0;
8729         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8730                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8731                 e_dev_err("Reload the driver after installing a supported module.\n");
8732                 goto err_sw_init;
8733         } else if (err) {
8734                 e_dev_err("HW Init failed: %d\n", err);
8735                 goto err_sw_init;
8736         }
8737
8738 #ifdef CONFIG_PCI_IOV
8739         /* SR-IOV not supported on the 82598 */
8740         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8741                 goto skip_sriov;
8742         /* Mailbox */
8743         ixgbe_init_mbx_params_pf(hw);
8744         memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8745         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8746         ixgbe_enable_sriov(adapter);
8747 skip_sriov:
8748
8749 #endif
8750         netdev->features = NETIF_F_SG |
8751                            NETIF_F_IP_CSUM |
8752                            NETIF_F_IPV6_CSUM |
8753                            NETIF_F_HW_VLAN_CTAG_TX |
8754                            NETIF_F_HW_VLAN_CTAG_RX |
8755                            NETIF_F_TSO |
8756                            NETIF_F_TSO6 |
8757                            NETIF_F_RXHASH |
8758                            NETIF_F_RXCSUM;
8759
8760         netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8761
8762         switch (adapter->hw.mac.type) {
8763         case ixgbe_mac_82599EB:
8764         case ixgbe_mac_X540:
8765         case ixgbe_mac_X550:
8766         case ixgbe_mac_X550EM_x:
8767                 netdev->features |= NETIF_F_SCTP_CSUM;
8768                 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8769                                        NETIF_F_NTUPLE;
8770                 break;
8771         default:
8772                 break;
8773         }
8774
8775         netdev->hw_features |= NETIF_F_RXALL;
8776         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8777
8778         netdev->vlan_features |= NETIF_F_TSO;
8779         netdev->vlan_features |= NETIF_F_TSO6;
8780         netdev->vlan_features |= NETIF_F_IP_CSUM;
8781         netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8782         netdev->vlan_features |= NETIF_F_SG;
8783
8784         netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8785                                    NETIF_F_IPV6_CSUM;
8786
8787         netdev->priv_flags |= IFF_UNICAST_FLT;
8788         netdev->priv_flags |= IFF_SUPP_NOFCS;
8789
8790 #ifdef CONFIG_IXGBE_VXLAN
8791         switch (adapter->hw.mac.type) {
8792         case ixgbe_mac_X550:
8793         case ixgbe_mac_X550EM_x:
8794                 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8795                                            NETIF_F_IP_CSUM |
8796                                            NETIF_F_IPV6_CSUM;
8797                 break;
8798         default:
8799                 break;
8800         }
8801 #endif /* CONFIG_IXGBE_VXLAN */
8802
8803 #ifdef CONFIG_IXGBE_DCB
8804         netdev->dcbnl_ops = &dcbnl_ops;
8805 #endif
8806
8807 #ifdef IXGBE_FCOE
8808         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8809                 unsigned int fcoe_l;
8810
8811                 if (hw->mac.ops.get_device_caps) {
8812                         hw->mac.ops.get_device_caps(hw, &device_caps);
8813                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8814                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8815                 }
8816
8817
8818                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8819                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8820
8821                 netdev->features |= NETIF_F_FSO |
8822                                     NETIF_F_FCOE_CRC;
8823
8824                 netdev->vlan_features |= NETIF_F_FSO |
8825                                          NETIF_F_FCOE_CRC |
8826                                          NETIF_F_FCOE_MTU;
8827         }
8828 #endif /* IXGBE_FCOE */
8829         if (pci_using_dac) {
8830                 netdev->features |= NETIF_F_HIGHDMA;
8831                 netdev->vlan_features |= NETIF_F_HIGHDMA;
8832         }
8833
8834         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8835                 netdev->hw_features |= NETIF_F_LRO;
8836         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8837                 netdev->features |= NETIF_F_LRO;
8838
8839         /* make sure the EEPROM is good */
8840         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8841                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8842                 err = -EIO;
8843                 goto err_sw_init;
8844         }
8845
8846         ixgbe_get_platform_mac_addr(adapter);
8847
8848         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8849
8850         if (!is_valid_ether_addr(netdev->dev_addr)) {
8851                 e_dev_err("invalid MAC address\n");
8852                 err = -EIO;
8853                 goto err_sw_init;
8854         }
8855
8856         ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8857
8858         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8859                     (unsigned long) adapter);
8860
8861         if (ixgbe_removed(hw->hw_addr)) {
8862                 err = -EIO;
8863                 goto err_sw_init;
8864         }
8865         INIT_WORK(&adapter->service_task, ixgbe_service_task);
8866         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8867         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8868
8869         err = ixgbe_init_interrupt_scheme(adapter);
8870         if (err)
8871                 goto err_sw_init;
8872
8873         /* WOL not supported for all devices */
8874         adapter->wol = 0;
8875         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8876         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8877                                                 pdev->subsystem_device);
8878         if (hw->wol_enabled)
8879                 adapter->wol = IXGBE_WUFC_MAG;
8880
8881         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8882
8883         /* save off EEPROM version number */
8884         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8885         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8886
8887         /* pick up the PCI bus settings for reporting later */
8888         if (ixgbe_pcie_from_parent(hw))
8889                 ixgbe_get_parent_bus_info(adapter);
8890         else
8891                  hw->mac.ops.get_bus_info(hw);
8892
8893         /* calculate the expected PCIe bandwidth required for optimal
8894          * performance. Note that some older parts will never have enough
8895          * bandwidth due to being older generation PCIe parts. We clamp these
8896          * parts to ensure no warning is displayed if it can't be fixed.
8897          */
8898         switch (hw->mac.type) {
8899         case ixgbe_mac_82598EB:
8900                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8901                 break;
8902         default:
8903                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8904                 break;
8905         }
8906
8907         /* don't check link if we failed to enumerate functions */
8908         if (expected_gts > 0)
8909                 ixgbe_check_minimum_link(adapter, expected_gts);
8910
8911         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8912         if (err)
8913                 strlcpy(part_str, "Unknown", sizeof(part_str));
8914         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8915                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8916                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8917                            part_str);
8918         else
8919                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8920                            hw->mac.type, hw->phy.type, part_str);
8921
8922         e_dev_info("%pM\n", netdev->dev_addr);
8923
8924         /* reset the hardware with the new settings */
8925         err = hw->mac.ops.start_hw(hw);
8926         if (err == IXGBE_ERR_EEPROM_VERSION) {
8927                 /* We are running on a pre-production device, log a warning */
8928                 e_dev_warn("This device is a pre-production adapter/LOM. "
8929                            "Please be aware there may be issues associated "
8930                            "with your hardware.  If you are experiencing "
8931                            "problems please contact your Intel or hardware "
8932                            "representative who provided you with this "
8933                            "hardware.\n");
8934         }
8935         strcpy(netdev->name, "eth%d");
8936         err = register_netdev(netdev);
8937         if (err)
8938                 goto err_register;
8939
8940         pci_set_drvdata(pdev, adapter);
8941
8942         /* power down the optics for 82599 SFP+ fiber */
8943         if (hw->mac.ops.disable_tx_laser)
8944                 hw->mac.ops.disable_tx_laser(hw);
8945
8946         /* carrier off reporting is important to ethtool even BEFORE open */
8947         netif_carrier_off(netdev);
8948
8949 #ifdef CONFIG_IXGBE_DCA
8950         if (dca_add_requester(&pdev->dev) == 0) {
8951                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8952                 ixgbe_setup_dca(adapter);
8953         }
8954 #endif
8955         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8956                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8957                 for (i = 0; i < adapter->num_vfs; i++)
8958                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
8959         }
8960
8961         /* firmware requires driver version to be 0xFFFFFFFF
8962          * since os does not support feature
8963          */
8964         if (hw->mac.ops.set_fw_drv_ver)
8965                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8966                                            0xFF);
8967
8968         /* add san mac addr to netdev */
8969         ixgbe_add_sanmac_netdev(netdev);
8970
8971         e_dev_info("%s\n", ixgbe_default_device_descr);
8972
8973 #ifdef CONFIG_IXGBE_HWMON
8974         if (ixgbe_sysfs_init(adapter))
8975                 e_err(probe, "failed to allocate sysfs resources\n");
8976 #endif /* CONFIG_IXGBE_HWMON */
8977
8978         ixgbe_dbg_adapter_init(adapter);
8979
8980         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8981         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8982                 hw->mac.ops.setup_link(hw,
8983                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8984                         true);
8985
8986         return 0;
8987
8988 err_register:
8989         ixgbe_release_hw_control(adapter);
8990         ixgbe_clear_interrupt_scheme(adapter);
8991 err_sw_init:
8992         ixgbe_disable_sriov(adapter);
8993         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8994         iounmap(adapter->io_addr);
8995         kfree(adapter->mac_table);
8996 err_ioremap:
8997         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8998         free_netdev(netdev);
8999 err_alloc_etherdev:
9000         pci_release_selected_regions(pdev,
9001                                      pci_select_bars(pdev, IORESOURCE_MEM));
9002 err_pci_reg:
9003 err_dma:
9004         if (!adapter || disable_dev)
9005                 pci_disable_device(pdev);
9006         return err;
9007 }
9008
9009 /**
9010  * ixgbe_remove - Device Removal Routine
9011  * @pdev: PCI device information struct
9012  *
9013  * ixgbe_remove is called by the PCI subsystem to alert the driver
9014  * that it should release a PCI device.  The could be caused by a
9015  * Hot-Plug event, or because the driver is going to be removed from
9016  * memory.
9017  **/
9018 static void ixgbe_remove(struct pci_dev *pdev)
9019 {
9020         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9021         struct net_device *netdev;
9022         bool disable_dev;
9023
9024         /* if !adapter then we already cleaned up in probe */
9025         if (!adapter)
9026                 return;
9027
9028         netdev  = adapter->netdev;
9029         ixgbe_dbg_adapter_exit(adapter);
9030
9031         set_bit(__IXGBE_REMOVING, &adapter->state);
9032         cancel_work_sync(&adapter->service_task);
9033
9034
9035 #ifdef CONFIG_IXGBE_DCA
9036         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9037                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9038                 dca_remove_requester(&pdev->dev);
9039                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
9040         }
9041
9042 #endif
9043 #ifdef CONFIG_IXGBE_HWMON
9044         ixgbe_sysfs_exit(adapter);
9045 #endif /* CONFIG_IXGBE_HWMON */
9046
9047         /* remove the added san mac */
9048         ixgbe_del_sanmac_netdev(netdev);
9049
9050 #ifdef CONFIG_PCI_IOV
9051         ixgbe_disable_sriov(adapter);
9052 #endif
9053         if (netdev->reg_state == NETREG_REGISTERED)
9054                 unregister_netdev(netdev);
9055
9056         ixgbe_clear_interrupt_scheme(adapter);
9057
9058         ixgbe_release_hw_control(adapter);
9059
9060 #ifdef CONFIG_DCB
9061         kfree(adapter->ixgbe_ieee_pfc);
9062         kfree(adapter->ixgbe_ieee_ets);
9063
9064 #endif
9065         iounmap(adapter->io_addr);
9066         pci_release_selected_regions(pdev, pci_select_bars(pdev,
9067                                      IORESOURCE_MEM));
9068
9069         e_dev_info("complete\n");
9070
9071         kfree(adapter->mac_table);
9072         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9073         free_netdev(netdev);
9074
9075         pci_disable_pcie_error_reporting(pdev);
9076
9077         if (disable_dev)
9078                 pci_disable_device(pdev);
9079 }
9080
9081 /**
9082  * ixgbe_io_error_detected - called when PCI error is detected
9083  * @pdev: Pointer to PCI device
9084  * @state: The current pci connection state
9085  *
9086  * This function is called after a PCI bus error affecting
9087  * this device has been detected.
9088  */
9089 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9090                                                 pci_channel_state_t state)
9091 {
9092         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9093         struct net_device *netdev = adapter->netdev;
9094
9095 #ifdef CONFIG_PCI_IOV
9096         struct ixgbe_hw *hw = &adapter->hw;
9097         struct pci_dev *bdev, *vfdev;
9098         u32 dw0, dw1, dw2, dw3;
9099         int vf, pos;
9100         u16 req_id, pf_func;
9101
9102         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9103             adapter->num_vfs == 0)
9104                 goto skip_bad_vf_detection;
9105
9106         bdev = pdev->bus->self;
9107         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9108                 bdev = bdev->bus->self;
9109
9110         if (!bdev)
9111                 goto skip_bad_vf_detection;
9112
9113         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9114         if (!pos)
9115                 goto skip_bad_vf_detection;
9116
9117         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9118         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9119         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9120         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9121         if (ixgbe_removed(hw->hw_addr))
9122                 goto skip_bad_vf_detection;
9123
9124         req_id = dw1 >> 16;
9125         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9126         if (!(req_id & 0x0080))
9127                 goto skip_bad_vf_detection;
9128
9129         pf_func = req_id & 0x01;
9130         if ((pf_func & 1) == (pdev->devfn & 1)) {
9131                 unsigned int device_id;
9132
9133                 vf = (req_id & 0x7F) >> 1;
9134                 e_dev_err("VF %d has caused a PCIe error\n", vf);
9135                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9136                                 "%8.8x\tdw3: %8.8x\n",
9137                 dw0, dw1, dw2, dw3);
9138                 switch (adapter->hw.mac.type) {
9139                 case ixgbe_mac_82599EB:
9140                         device_id = IXGBE_82599_VF_DEVICE_ID;
9141                         break;
9142                 case ixgbe_mac_X540:
9143                         device_id = IXGBE_X540_VF_DEVICE_ID;
9144                         break;
9145                 case ixgbe_mac_X550:
9146                         device_id = IXGBE_DEV_ID_X550_VF;
9147                         break;
9148                 case ixgbe_mac_X550EM_x:
9149                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
9150                         break;
9151                 default:
9152                         device_id = 0;
9153                         break;
9154                 }
9155
9156                 /* Find the pci device of the offending VF */
9157                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9158                 while (vfdev) {
9159                         if (vfdev->devfn == (req_id & 0xFF))
9160                                 break;
9161                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9162                                                device_id, vfdev);
9163                 }
9164                 /*
9165                  * There's a slim chance the VF could have been hot plugged,
9166                  * so if it is no longer present we don't need to issue the
9167                  * VFLR.  Just clean up the AER in that case.
9168                  */
9169                 if (vfdev) {
9170                         ixgbe_issue_vf_flr(adapter, vfdev);
9171                         /* Free device reference count */
9172                         pci_dev_put(vfdev);
9173                 }
9174
9175                 pci_cleanup_aer_uncorrect_error_status(pdev);
9176         }
9177
9178         /*
9179          * Even though the error may have occurred on the other port
9180          * we still need to increment the vf error reference count for
9181          * both ports because the I/O resume function will be called
9182          * for both of them.
9183          */
9184         adapter->vferr_refcount++;
9185
9186         return PCI_ERS_RESULT_RECOVERED;
9187
9188 skip_bad_vf_detection:
9189 #endif /* CONFIG_PCI_IOV */
9190         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9191                 return PCI_ERS_RESULT_DISCONNECT;
9192
9193         rtnl_lock();
9194         netif_device_detach(netdev);
9195
9196         if (state == pci_channel_io_perm_failure) {
9197                 rtnl_unlock();
9198                 return PCI_ERS_RESULT_DISCONNECT;
9199         }
9200
9201         if (netif_running(netdev))
9202                 ixgbe_down(adapter);
9203
9204         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9205                 pci_disable_device(pdev);
9206         rtnl_unlock();
9207
9208         /* Request a slot reset. */
9209         return PCI_ERS_RESULT_NEED_RESET;
9210 }
9211
9212 /**
9213  * ixgbe_io_slot_reset - called after the pci bus has been reset.
9214  * @pdev: Pointer to PCI device
9215  *
9216  * Restart the card from scratch, as if from a cold-boot.
9217  */
9218 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9219 {
9220         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9221         pci_ers_result_t result;
9222         int err;
9223
9224         if (pci_enable_device_mem(pdev)) {
9225                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9226                 result = PCI_ERS_RESULT_DISCONNECT;
9227         } else {
9228                 smp_mb__before_atomic();
9229                 clear_bit(__IXGBE_DISABLED, &adapter->state);
9230                 adapter->hw.hw_addr = adapter->io_addr;
9231                 pci_set_master(pdev);
9232                 pci_restore_state(pdev);
9233                 pci_save_state(pdev);
9234
9235                 pci_wake_from_d3(pdev, false);
9236
9237                 ixgbe_reset(adapter);
9238                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9239                 result = PCI_ERS_RESULT_RECOVERED;
9240         }
9241
9242         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9243         if (err) {
9244                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9245                           "failed 0x%0x\n", err);
9246                 /* non-fatal, continue */
9247         }
9248
9249         return result;
9250 }
9251
9252 /**
9253  * ixgbe_io_resume - called when traffic can start flowing again.
9254  * @pdev: Pointer to PCI device
9255  *
9256  * This callback is called when the error recovery driver tells us that
9257  * its OK to resume normal operation.
9258  */
9259 static void ixgbe_io_resume(struct pci_dev *pdev)
9260 {
9261         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9262         struct net_device *netdev = adapter->netdev;
9263
9264 #ifdef CONFIG_PCI_IOV
9265         if (adapter->vferr_refcount) {
9266                 e_info(drv, "Resuming after VF err\n");
9267                 adapter->vferr_refcount--;
9268                 return;
9269         }
9270
9271 #endif
9272         if (netif_running(netdev))
9273                 ixgbe_up(adapter);
9274
9275         netif_device_attach(netdev);
9276 }
9277
9278 static const struct pci_error_handlers ixgbe_err_handler = {
9279         .error_detected = ixgbe_io_error_detected,
9280         .slot_reset = ixgbe_io_slot_reset,
9281         .resume = ixgbe_io_resume,
9282 };
9283
9284 static struct pci_driver ixgbe_driver = {
9285         .name     = ixgbe_driver_name,
9286         .id_table = ixgbe_pci_tbl,
9287         .probe    = ixgbe_probe,
9288         .remove   = ixgbe_remove,
9289 #ifdef CONFIG_PM
9290         .suspend  = ixgbe_suspend,
9291         .resume   = ixgbe_resume,
9292 #endif
9293         .shutdown = ixgbe_shutdown,
9294         .sriov_configure = ixgbe_pci_sriov_configure,
9295         .err_handler = &ixgbe_err_handler
9296 };
9297
9298 /**
9299  * ixgbe_init_module - Driver Registration Routine
9300  *
9301  * ixgbe_init_module is the first routine called when the driver is
9302  * loaded. All it does is register with the PCI subsystem.
9303  **/
9304 static int __init ixgbe_init_module(void)
9305 {
9306         int ret;
9307         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9308         pr_info("%s\n", ixgbe_copyright);
9309
9310         ixgbe_dbg_init();
9311
9312         ret = pci_register_driver(&ixgbe_driver);
9313         if (ret) {
9314                 ixgbe_dbg_exit();
9315                 return ret;
9316         }
9317
9318 #ifdef CONFIG_IXGBE_DCA
9319         dca_register_notify(&dca_notifier);
9320 #endif
9321
9322         return 0;
9323 }
9324
9325 module_init(ixgbe_init_module);
9326
9327 /**
9328  * ixgbe_exit_module - Driver Exit Cleanup Routine
9329  *
9330  * ixgbe_exit_module is called just before the driver is removed
9331  * from memory.
9332  **/
9333 static void __exit ixgbe_exit_module(void)
9334 {
9335 #ifdef CONFIG_IXGBE_DCA
9336         dca_unregister_notify(&dca_notifier);
9337 #endif
9338         pci_unregister_driver(&ixgbe_driver);
9339
9340         ixgbe_dbg_exit();
9341 }
9342
9343 #ifdef CONFIG_IXGBE_DCA
9344 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9345                             void *p)
9346 {
9347         int ret_val;
9348
9349         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9350                                          __ixgbe_notify_dca);
9351
9352         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9353 }
9354
9355 #endif /* CONFIG_IXGBE_DCA */
9356
9357 module_exit(ixgbe_exit_module);
9358
9359 /* ixgbe_main.c */