1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2015 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
56 #include <linux/of_net.h>
60 #include <asm/idprom.h>
65 #include "ixgbe_common.h"
66 #include "ixgbe_dcb_82599.h"
67 #include "ixgbe_sriov.h"
68 #ifdef CONFIG_IXGBE_VXLAN
69 #include <net/vxlan.h>
72 char ixgbe_driver_name[] = "ixgbe";
73 static const char ixgbe_driver_string[] =
74 "Intel(R) 10 Gigabit PCI Express Network Driver";
76 char ixgbe_default_device_descr[] =
77 "Intel(R) 10 Gigabit Network Connection";
79 static char ixgbe_default_device_descr[] =
80 "Intel(R) 10 Gigabit Network Connection";
82 #define DRV_VERSION "4.0.1-k"
83 const char ixgbe_driver_version[] = DRV_VERSION;
84 static const char ixgbe_copyright[] =
85 "Copyright (c) 1999-2015 Intel Corporation.";
87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
90 [board_82598] = &ixgbe_82598_info,
91 [board_82599] = &ixgbe_82599_info,
92 [board_X540] = &ixgbe_X540_info,
93 [board_X550] = &ixgbe_X550_info,
94 [board_X550EM_x] = &ixgbe_X550EM_x_info,
97 /* ixgbe_pci_tbl - PCI Device ID Table
99 * Wildcard entries (PCI_ANY_ID) should come last
100 * Last entry must be all 0s
102 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
103 * Class, Class Mask, private data (not used) }
105 static const struct pci_device_id ixgbe_pci_tbl[] = {
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
132 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
133 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
134 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
135 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
136 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
137 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
138 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
139 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
140 /* required last entry */
143 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
145 #ifdef CONFIG_IXGBE_DCA
146 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
148 static struct notifier_block dca_notifier = {
149 .notifier_call = ixgbe_notify_dca,
155 #ifdef CONFIG_PCI_IOV
156 static unsigned int max_vfs;
157 module_param(max_vfs, uint, 0);
158 MODULE_PARM_DESC(max_vfs,
159 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
160 #endif /* CONFIG_PCI_IOV */
162 static unsigned int allow_unsupported_sfp;
163 module_param(allow_unsupported_sfp, uint, 0);
164 MODULE_PARM_DESC(allow_unsupported_sfp,
165 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
167 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
168 static int debug = -1;
169 module_param(debug, int, 0);
170 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
172 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
173 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
174 MODULE_LICENSE("GPL");
175 MODULE_VERSION(DRV_VERSION);
177 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
179 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
182 struct pci_dev *parent_dev;
183 struct pci_bus *parent_bus;
185 parent_bus = adapter->pdev->bus->parent;
189 parent_dev = parent_bus->self;
193 if (!pci_is_pcie(parent_dev))
196 pcie_capability_read_word(parent_dev, reg, value);
197 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
198 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
203 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
205 struct ixgbe_hw *hw = &adapter->hw;
209 hw->bus.type = ixgbe_bus_type_pci_express;
211 /* Get the negotiated link width and speed from PCI config space of the
212 * parent, as this device is behind a switch
214 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
216 /* assume caller will handle error case */
220 hw->bus.width = ixgbe_convert_bus_width(link_status);
221 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
227 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
228 * @hw: hw specific details
230 * This function is used by probe to determine whether a device's PCI-Express
231 * bandwidth details should be gathered from the parent bus instead of from the
232 * device. Used to ensure that various locations all have the correct device ID
235 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
237 switch (hw->device_id) {
238 case IXGBE_DEV_ID_82599_SFP_SF_QP:
239 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
246 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
249 struct ixgbe_hw *hw = &adapter->hw;
251 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
252 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
253 struct pci_dev *pdev;
255 /* Some devices are not connected over PCIe and thus do not negotiate
256 * speed. These devices do not have valid bus info, and thus any report
257 * we generate may not be correct.
259 if (hw->bus.type == ixgbe_bus_type_internal)
262 /* determine whether to use the parent device */
263 if (ixgbe_pcie_from_parent(&adapter->hw))
264 pdev = adapter->pdev->bus->parent->self;
266 pdev = adapter->pdev;
268 if (pcie_get_minimum_link(pdev, &speed, &width) ||
269 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
270 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
275 case PCIE_SPEED_2_5GT:
276 /* 8b/10b encoding reduces max throughput by 20% */
279 case PCIE_SPEED_5_0GT:
280 /* 8b/10b encoding reduces max throughput by 20% */
283 case PCIE_SPEED_8_0GT:
284 /* 128b/130b encoding reduces throughput by less than 2% */
288 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
292 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
294 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
295 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
296 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
297 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
300 (speed == PCIE_SPEED_2_5GT ? "20%" :
301 speed == PCIE_SPEED_5_0GT ? "20%" :
302 speed == PCIE_SPEED_8_0GT ? "<2%" :
305 if (max_gts < expected_gts) {
306 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
307 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
309 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
313 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
315 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
316 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
317 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
318 schedule_work(&adapter->service_task);
321 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
323 struct ixgbe_adapter *adapter = hw->back;
328 e_dev_err("Adapter removed\n");
329 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
330 ixgbe_service_event_schedule(adapter);
333 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
337 /* The following check not only optimizes a bit by not
338 * performing a read on the status register when the
339 * register just read was a status register read that
340 * returned IXGBE_FAILED_READ_REG. It also blocks any
341 * potential recursion.
343 if (reg == IXGBE_STATUS) {
344 ixgbe_remove_adapter(hw);
347 value = ixgbe_read_reg(hw, IXGBE_STATUS);
348 if (value == IXGBE_FAILED_READ_REG)
349 ixgbe_remove_adapter(hw);
353 * ixgbe_read_reg - Read from device register
354 * @hw: hw specific details
355 * @reg: offset of register to read
357 * Returns : value read or IXGBE_FAILED_READ_REG if removed
359 * This function is used to read device registers. It checks for device
360 * removal by confirming any read that returns all ones by checking the
361 * status register value for all ones. This function avoids reading from
362 * the hardware if a removal was previously detected in which case it
363 * returns IXGBE_FAILED_READ_REG (all ones).
365 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
367 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
370 if (ixgbe_removed(reg_addr))
371 return IXGBE_FAILED_READ_REG;
372 value = readl(reg_addr + reg);
373 if (unlikely(value == IXGBE_FAILED_READ_REG))
374 ixgbe_check_remove(hw, reg);
378 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
382 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
383 if (value == IXGBE_FAILED_READ_CFG_WORD) {
384 ixgbe_remove_adapter(hw);
390 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
392 struct ixgbe_adapter *adapter = hw->back;
395 if (ixgbe_removed(hw->hw_addr))
396 return IXGBE_FAILED_READ_CFG_WORD;
397 pci_read_config_word(adapter->pdev, reg, &value);
398 if (value == IXGBE_FAILED_READ_CFG_WORD &&
399 ixgbe_check_cfg_remove(hw, adapter->pdev))
400 return IXGBE_FAILED_READ_CFG_WORD;
404 #ifdef CONFIG_PCI_IOV
405 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
407 struct ixgbe_adapter *adapter = hw->back;
410 if (ixgbe_removed(hw->hw_addr))
411 return IXGBE_FAILED_READ_CFG_DWORD;
412 pci_read_config_dword(adapter->pdev, reg, &value);
413 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
414 ixgbe_check_cfg_remove(hw, adapter->pdev))
415 return IXGBE_FAILED_READ_CFG_DWORD;
418 #endif /* CONFIG_PCI_IOV */
420 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
422 struct ixgbe_adapter *adapter = hw->back;
424 if (ixgbe_removed(hw->hw_addr))
426 pci_write_config_word(adapter->pdev, reg, value);
429 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
431 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
433 /* flush memory to make sure state is correct before next watchdog */
434 smp_mb__before_atomic();
435 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
438 struct ixgbe_reg_info {
443 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
445 /* General Registers */
446 {IXGBE_CTRL, "CTRL"},
447 {IXGBE_STATUS, "STATUS"},
448 {IXGBE_CTRL_EXT, "CTRL_EXT"},
450 /* Interrupt Registers */
451 {IXGBE_EICR, "EICR"},
454 {IXGBE_SRRCTL(0), "SRRCTL"},
455 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
456 {IXGBE_RDLEN(0), "RDLEN"},
457 {IXGBE_RDH(0), "RDH"},
458 {IXGBE_RDT(0), "RDT"},
459 {IXGBE_RXDCTL(0), "RXDCTL"},
460 {IXGBE_RDBAL(0), "RDBAL"},
461 {IXGBE_RDBAH(0), "RDBAH"},
464 {IXGBE_TDBAL(0), "TDBAL"},
465 {IXGBE_TDBAH(0), "TDBAH"},
466 {IXGBE_TDLEN(0), "TDLEN"},
467 {IXGBE_TDH(0), "TDH"},
468 {IXGBE_TDT(0), "TDT"},
469 {IXGBE_TXDCTL(0), "TXDCTL"},
471 /* List Terminator */
477 * ixgbe_regdump - register printout routine
479 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
485 switch (reginfo->ofs) {
486 case IXGBE_SRRCTL(0):
487 for (i = 0; i < 64; i++)
488 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
490 case IXGBE_DCA_RXCTRL(0):
491 for (i = 0; i < 64; i++)
492 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
495 for (i = 0; i < 64; i++)
496 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
499 for (i = 0; i < 64; i++)
500 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
503 for (i = 0; i < 64; i++)
504 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
506 case IXGBE_RXDCTL(0):
507 for (i = 0; i < 64; i++)
508 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
511 for (i = 0; i < 64; i++)
512 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
515 for (i = 0; i < 64; i++)
516 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
519 for (i = 0; i < 64; i++)
520 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
523 for (i = 0; i < 64; i++)
524 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
527 for (i = 0; i < 64; i++)
528 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
531 for (i = 0; i < 64; i++)
532 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
535 for (i = 0; i < 64; i++)
536 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
538 case IXGBE_TXDCTL(0):
539 for (i = 0; i < 64; i++)
540 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
543 pr_info("%-15s %08x\n", reginfo->name,
544 IXGBE_READ_REG(hw, reginfo->ofs));
548 for (i = 0; i < 8; i++) {
549 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
550 pr_err("%-15s", rname);
551 for (j = 0; j < 8; j++)
552 pr_cont(" %08x", regs[i*8+j]);
559 * ixgbe_dump - Print registers, tx-rings and rx-rings
561 static void ixgbe_dump(struct ixgbe_adapter *adapter)
563 struct net_device *netdev = adapter->netdev;
564 struct ixgbe_hw *hw = &adapter->hw;
565 struct ixgbe_reg_info *reginfo;
567 struct ixgbe_ring *tx_ring;
568 struct ixgbe_tx_buffer *tx_buffer;
569 union ixgbe_adv_tx_desc *tx_desc;
570 struct my_u0 { u64 a; u64 b; } *u0;
571 struct ixgbe_ring *rx_ring;
572 union ixgbe_adv_rx_desc *rx_desc;
573 struct ixgbe_rx_buffer *rx_buffer_info;
577 if (!netif_msg_hw(adapter))
580 /* Print netdevice Info */
582 dev_info(&adapter->pdev->dev, "Net device Info\n");
583 pr_info("Device Name state "
584 "trans_start last_rx\n");
585 pr_info("%-15s %016lX %016lX %016lX\n",
592 /* Print Registers */
593 dev_info(&adapter->pdev->dev, "Register Dump\n");
594 pr_info(" Register Name Value\n");
595 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
596 reginfo->name; reginfo++) {
597 ixgbe_regdump(hw, reginfo);
600 /* Print TX Ring Summary */
601 if (!netdev || !netif_running(netdev))
604 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
605 pr_info(" %s %s %s %s\n",
606 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
607 "leng", "ntw", "timestamp");
608 for (n = 0; n < adapter->num_tx_queues; n++) {
609 tx_ring = adapter->tx_ring[n];
610 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
611 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
612 n, tx_ring->next_to_use, tx_ring->next_to_clean,
613 (u64)dma_unmap_addr(tx_buffer, dma),
614 dma_unmap_len(tx_buffer, len),
615 tx_buffer->next_to_watch,
616 (u64)tx_buffer->time_stamp);
620 if (!netif_msg_tx_done(adapter))
621 goto rx_ring_summary;
623 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
625 /* Transmit Descriptor Formats
627 * 82598 Advanced Transmit Descriptor
628 * +--------------------------------------------------------------+
629 * 0 | Buffer Address [63:0] |
630 * +--------------------------------------------------------------+
631 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
632 * +--------------------------------------------------------------+
633 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
635 * 82598 Advanced Transmit Descriptor (Write-Back Format)
636 * +--------------------------------------------------------------+
638 * +--------------------------------------------------------------+
639 * 8 | RSV | STA | NXTSEQ |
640 * +--------------------------------------------------------------+
643 * 82599+ Advanced Transmit Descriptor
644 * +--------------------------------------------------------------+
645 * 0 | Buffer Address [63:0] |
646 * +--------------------------------------------------------------+
647 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
648 * +--------------------------------------------------------------+
649 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
651 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
652 * +--------------------------------------------------------------+
654 * +--------------------------------------------------------------+
655 * 8 | RSV | STA | RSV |
656 * +--------------------------------------------------------------+
660 for (n = 0; n < adapter->num_tx_queues; n++) {
661 tx_ring = adapter->tx_ring[n];
662 pr_info("------------------------------------\n");
663 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
664 pr_info("------------------------------------\n");
665 pr_info("%s%s %s %s %s %s\n",
666 "T [desc] [address 63:0 ] ",
667 "[PlPOIdStDDt Ln] [bi->dma ] ",
668 "leng", "ntw", "timestamp", "bi->skb");
670 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
671 tx_desc = IXGBE_TX_DESC(tx_ring, i);
672 tx_buffer = &tx_ring->tx_buffer_info[i];
673 u0 = (struct my_u0 *)tx_desc;
674 if (dma_unmap_len(tx_buffer, len) > 0) {
675 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
679 (u64)dma_unmap_addr(tx_buffer, dma),
680 dma_unmap_len(tx_buffer, len),
681 tx_buffer->next_to_watch,
682 (u64)tx_buffer->time_stamp,
684 if (i == tx_ring->next_to_use &&
685 i == tx_ring->next_to_clean)
687 else if (i == tx_ring->next_to_use)
689 else if (i == tx_ring->next_to_clean)
694 if (netif_msg_pktdata(adapter) &&
696 print_hex_dump(KERN_INFO, "",
697 DUMP_PREFIX_ADDRESS, 16, 1,
698 tx_buffer->skb->data,
699 dma_unmap_len(tx_buffer, len),
705 /* Print RX Rings Summary */
707 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
708 pr_info("Queue [NTU] [NTC]\n");
709 for (n = 0; n < adapter->num_rx_queues; n++) {
710 rx_ring = adapter->rx_ring[n];
711 pr_info("%5d %5X %5X\n",
712 n, rx_ring->next_to_use, rx_ring->next_to_clean);
716 if (!netif_msg_rx_status(adapter))
719 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
721 /* Receive Descriptor Formats
723 * 82598 Advanced Receive Descriptor (Read) Format
725 * +-----------------------------------------------------+
726 * 0 | Packet Buffer Address [63:1] |A0/NSE|
727 * +----------------------------------------------+------+
728 * 8 | Header Buffer Address [63:1] | DD |
729 * +-----------------------------------------------------+
732 * 82598 Advanced Receive Descriptor (Write-Back) Format
734 * 63 48 47 32 31 30 21 20 16 15 4 3 0
735 * +------------------------------------------------------+
736 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
737 * | Packet | IP | | | | Type | Type |
738 * | Checksum | Ident | | | | | |
739 * +------------------------------------------------------+
740 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
741 * +------------------------------------------------------+
742 * 63 48 47 32 31 20 19 0
744 * 82599+ Advanced Receive Descriptor (Read) Format
746 * +-----------------------------------------------------+
747 * 0 | Packet Buffer Address [63:1] |A0/NSE|
748 * +----------------------------------------------+------+
749 * 8 | Header Buffer Address [63:1] | DD |
750 * +-----------------------------------------------------+
753 * 82599+ Advanced Receive Descriptor (Write-Back) Format
755 * 63 48 47 32 31 30 21 20 17 16 4 3 0
756 * +------------------------------------------------------+
757 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
758 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
759 * |/ Flow Dir Flt ID | | | | | |
760 * +------------------------------------------------------+
761 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
762 * +------------------------------------------------------+
763 * 63 48 47 32 31 20 19 0
766 for (n = 0; n < adapter->num_rx_queues; n++) {
767 rx_ring = adapter->rx_ring[n];
768 pr_info("------------------------------------\n");
769 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
770 pr_info("------------------------------------\n");
772 "R [desc] [ PktBuf A0] ",
773 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
774 "<-- Adv Rx Read format\n");
776 "RWB[desc] [PcsmIpSHl PtRs] ",
777 "[vl er S cks ln] ---------------- [bi->skb ] ",
778 "<-- Adv Rx Write-Back format\n");
780 for (i = 0; i < rx_ring->count; i++) {
781 rx_buffer_info = &rx_ring->rx_buffer_info[i];
782 rx_desc = IXGBE_RX_DESC(rx_ring, i);
783 u0 = (struct my_u0 *)rx_desc;
784 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
785 if (staterr & IXGBE_RXD_STAT_DD) {
786 /* Descriptor Done */
787 pr_info("RWB[0x%03X] %016llX "
788 "%016llX ---------------- %p", i,
791 rx_buffer_info->skb);
793 pr_info("R [0x%03X] %016llX "
794 "%016llX %016llX %p", i,
797 (u64)rx_buffer_info->dma,
798 rx_buffer_info->skb);
800 if (netif_msg_pktdata(adapter) &&
801 rx_buffer_info->dma) {
802 print_hex_dump(KERN_INFO, "",
803 DUMP_PREFIX_ADDRESS, 16, 1,
804 page_address(rx_buffer_info->page) +
805 rx_buffer_info->page_offset,
806 ixgbe_rx_bufsz(rx_ring), true);
810 if (i == rx_ring->next_to_use)
812 else if (i == rx_ring->next_to_clean)
821 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
825 /* Let firmware take over control of h/w */
826 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
827 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
828 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
831 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
835 /* Let firmware know the driver has taken over */
836 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
837 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
838 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
842 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
843 * @adapter: pointer to adapter struct
844 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
845 * @queue: queue to map the corresponding interrupt to
846 * @msix_vector: the vector to map to the corresponding queue
849 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
850 u8 queue, u8 msix_vector)
853 struct ixgbe_hw *hw = &adapter->hw;
854 switch (hw->mac.type) {
855 case ixgbe_mac_82598EB:
856 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
859 index = (((direction * 64) + queue) >> 2) & 0x1F;
860 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
861 ivar &= ~(0xFF << (8 * (queue & 0x3)));
862 ivar |= (msix_vector << (8 * (queue & 0x3)));
863 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
865 case ixgbe_mac_82599EB:
868 case ixgbe_mac_X550EM_x:
869 if (direction == -1) {
871 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
872 index = ((queue & 1) * 8);
873 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
874 ivar &= ~(0xFF << index);
875 ivar |= (msix_vector << index);
876 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
879 /* tx or rx causes */
880 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
881 index = ((16 * (queue & 1)) + (8 * direction));
882 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
883 ivar &= ~(0xFF << index);
884 ivar |= (msix_vector << index);
885 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
893 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
898 switch (adapter->hw.mac.type) {
899 case ixgbe_mac_82598EB:
900 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
901 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
903 case ixgbe_mac_82599EB:
906 case ixgbe_mac_X550EM_x:
907 mask = (qmask & 0xFFFFFFFF);
908 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
909 mask = (qmask >> 32);
910 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
917 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
918 struct ixgbe_tx_buffer *tx_buffer)
920 if (tx_buffer->skb) {
921 dev_kfree_skb_any(tx_buffer->skb);
922 if (dma_unmap_len(tx_buffer, len))
923 dma_unmap_single(ring->dev,
924 dma_unmap_addr(tx_buffer, dma),
925 dma_unmap_len(tx_buffer, len),
927 } else if (dma_unmap_len(tx_buffer, len)) {
928 dma_unmap_page(ring->dev,
929 dma_unmap_addr(tx_buffer, dma),
930 dma_unmap_len(tx_buffer, len),
933 tx_buffer->next_to_watch = NULL;
934 tx_buffer->skb = NULL;
935 dma_unmap_len_set(tx_buffer, len, 0);
936 /* tx_buffer must be completely set up in the transmit path */
939 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
941 struct ixgbe_hw *hw = &adapter->hw;
942 struct ixgbe_hw_stats *hwstats = &adapter->stats;
946 if ((hw->fc.current_mode != ixgbe_fc_full) &&
947 (hw->fc.current_mode != ixgbe_fc_rx_pause))
950 switch (hw->mac.type) {
951 case ixgbe_mac_82598EB:
952 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
955 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
957 hwstats->lxoffrxc += data;
959 /* refill credits (no tx hang) if we received xoff */
963 for (i = 0; i < adapter->num_tx_queues; i++)
964 clear_bit(__IXGBE_HANG_CHECK_ARMED,
965 &adapter->tx_ring[i]->state);
968 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
970 struct ixgbe_hw *hw = &adapter->hw;
971 struct ixgbe_hw_stats *hwstats = &adapter->stats;
975 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
977 if (adapter->ixgbe_ieee_pfc)
978 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
980 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
981 ixgbe_update_xoff_rx_lfc(adapter);
985 /* update stats for each tc, only valid with PFC enabled */
986 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
989 switch (hw->mac.type) {
990 case ixgbe_mac_82598EB:
991 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
994 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
996 hwstats->pxoffrxc[i] += pxoffrxc;
997 /* Get the TC for given UP */
998 tc = netdev_get_prio_tc_map(adapter->netdev, i);
999 xoff[tc] += pxoffrxc;
1002 /* disarm tx queues that have received xoff frames */
1003 for (i = 0; i < adapter->num_tx_queues; i++) {
1004 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1006 tc = tx_ring->dcb_tc;
1008 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1012 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1014 return ring->stats.packets;
1017 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1019 struct ixgbe_adapter *adapter;
1020 struct ixgbe_hw *hw;
1023 if (ring->l2_accel_priv)
1024 adapter = ring->l2_accel_priv->real_adapter;
1026 adapter = netdev_priv(ring->netdev);
1029 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1030 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1033 return (head < tail) ?
1034 tail - head : (tail + ring->count - head);
1039 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1041 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1042 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1043 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1045 clear_check_for_tx_hang(tx_ring);
1048 * Check for a hung queue, but be thorough. This verifies
1049 * that a transmit has been completed since the previous
1050 * check AND there is at least one packet pending. The
1051 * ARMED bit is set to indicate a potential hang. The
1052 * bit is cleared if a pause frame is received to remove
1053 * false hang detection due to PFC or 802.3x frames. By
1054 * requiring this to fail twice we avoid races with
1055 * pfc clearing the ARMED bit and conditions where we
1056 * run the check_tx_hang logic with a transmit completion
1057 * pending but without time to complete it yet.
1059 if (tx_done_old == tx_done && tx_pending)
1060 /* make sure it is true for two checks in a row */
1061 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1063 /* update completed stats and continue */
1064 tx_ring->tx_stats.tx_done_old = tx_done;
1065 /* reset the countdown */
1066 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1072 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1073 * @adapter: driver private struct
1075 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1078 /* Do the reset outside of interrupt context */
1079 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1080 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1081 e_warn(drv, "initiating reset due to tx timeout\n");
1082 ixgbe_service_event_schedule(adapter);
1087 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1088 * @q_vector: structure containing interrupt and ring information
1089 * @tx_ring: tx ring to clean
1091 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1092 struct ixgbe_ring *tx_ring)
1094 struct ixgbe_adapter *adapter = q_vector->adapter;
1095 struct ixgbe_tx_buffer *tx_buffer;
1096 union ixgbe_adv_tx_desc *tx_desc;
1097 unsigned int total_bytes = 0, total_packets = 0;
1098 unsigned int budget = q_vector->tx.work_limit;
1099 unsigned int i = tx_ring->next_to_clean;
1101 if (test_bit(__IXGBE_DOWN, &adapter->state))
1104 tx_buffer = &tx_ring->tx_buffer_info[i];
1105 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1106 i -= tx_ring->count;
1109 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1111 /* if next_to_watch is not set then there is no work pending */
1115 /* prevent any other reads prior to eop_desc */
1116 read_barrier_depends();
1118 /* if DD is not set pending work has not been completed */
1119 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1122 /* clear next_to_watch to prevent false hangs */
1123 tx_buffer->next_to_watch = NULL;
1125 /* update the statistics for this packet */
1126 total_bytes += tx_buffer->bytecount;
1127 total_packets += tx_buffer->gso_segs;
1130 dev_consume_skb_any(tx_buffer->skb);
1132 /* unmap skb header data */
1133 dma_unmap_single(tx_ring->dev,
1134 dma_unmap_addr(tx_buffer, dma),
1135 dma_unmap_len(tx_buffer, len),
1138 /* clear tx_buffer data */
1139 tx_buffer->skb = NULL;
1140 dma_unmap_len_set(tx_buffer, len, 0);
1142 /* unmap remaining buffers */
1143 while (tx_desc != eop_desc) {
1148 i -= tx_ring->count;
1149 tx_buffer = tx_ring->tx_buffer_info;
1150 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1153 /* unmap any remaining paged data */
1154 if (dma_unmap_len(tx_buffer, len)) {
1155 dma_unmap_page(tx_ring->dev,
1156 dma_unmap_addr(tx_buffer, dma),
1157 dma_unmap_len(tx_buffer, len),
1159 dma_unmap_len_set(tx_buffer, len, 0);
1163 /* move us one more past the eop_desc for start of next pkt */
1168 i -= tx_ring->count;
1169 tx_buffer = tx_ring->tx_buffer_info;
1170 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1173 /* issue prefetch for next Tx descriptor */
1176 /* update budget accounting */
1178 } while (likely(budget));
1180 i += tx_ring->count;
1181 tx_ring->next_to_clean = i;
1182 u64_stats_update_begin(&tx_ring->syncp);
1183 tx_ring->stats.bytes += total_bytes;
1184 tx_ring->stats.packets += total_packets;
1185 u64_stats_update_end(&tx_ring->syncp);
1186 q_vector->tx.total_bytes += total_bytes;
1187 q_vector->tx.total_packets += total_packets;
1189 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1190 /* schedule immediate reset if we believe we hung */
1191 struct ixgbe_hw *hw = &adapter->hw;
1192 e_err(drv, "Detected Tx Unit Hang\n"
1194 " TDH, TDT <%x>, <%x>\n"
1195 " next_to_use <%x>\n"
1196 " next_to_clean <%x>\n"
1197 "tx_buffer_info[next_to_clean]\n"
1198 " time_stamp <%lx>\n"
1200 tx_ring->queue_index,
1201 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1202 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1203 tx_ring->next_to_use, i,
1204 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1206 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1209 "tx hang %d detected on queue %d, resetting adapter\n",
1210 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1212 /* schedule immediate reset if we believe we hung */
1213 ixgbe_tx_timeout_reset(adapter);
1215 /* the adapter is about to reset, no point in enabling stuff */
1219 netdev_tx_completed_queue(txring_txq(tx_ring),
1220 total_packets, total_bytes);
1222 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1223 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1224 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1225 /* Make sure that anybody stopping the queue after this
1226 * sees the new next_to_clean.
1229 if (__netif_subqueue_stopped(tx_ring->netdev,
1230 tx_ring->queue_index)
1231 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1232 netif_wake_subqueue(tx_ring->netdev,
1233 tx_ring->queue_index);
1234 ++tx_ring->tx_stats.restart_queue;
1241 #ifdef CONFIG_IXGBE_DCA
1242 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1243 struct ixgbe_ring *tx_ring,
1246 struct ixgbe_hw *hw = &adapter->hw;
1247 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1250 switch (hw->mac.type) {
1251 case ixgbe_mac_82598EB:
1252 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1254 case ixgbe_mac_82599EB:
1255 case ixgbe_mac_X540:
1256 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1257 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1260 /* for unknown hardware do not write register */
1265 * We can enable relaxed ordering for reads, but not writes when
1266 * DCA is enabled. This is due to a known issue in some chipsets
1267 * which will cause the DCA tag to be cleared.
1269 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1270 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1271 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1273 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1276 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1277 struct ixgbe_ring *rx_ring,
1280 struct ixgbe_hw *hw = &adapter->hw;
1281 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1282 u8 reg_idx = rx_ring->reg_idx;
1285 switch (hw->mac.type) {
1286 case ixgbe_mac_82599EB:
1287 case ixgbe_mac_X540:
1288 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1295 * We can enable relaxed ordering for reads, but not writes when
1296 * DCA is enabled. This is due to a known issue in some chipsets
1297 * which will cause the DCA tag to be cleared.
1299 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1300 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1302 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1305 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1307 struct ixgbe_adapter *adapter = q_vector->adapter;
1308 struct ixgbe_ring *ring;
1309 int cpu = get_cpu();
1311 if (q_vector->cpu == cpu)
1314 ixgbe_for_each_ring(ring, q_vector->tx)
1315 ixgbe_update_tx_dca(adapter, ring, cpu);
1317 ixgbe_for_each_ring(ring, q_vector->rx)
1318 ixgbe_update_rx_dca(adapter, ring, cpu);
1320 q_vector->cpu = cpu;
1325 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1329 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1332 /* always use CB2 mode, difference is masked in the CB driver */
1333 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1335 for (i = 0; i < adapter->num_q_vectors; i++) {
1336 adapter->q_vector[i]->cpu = -1;
1337 ixgbe_update_dca(adapter->q_vector[i]);
1341 static int __ixgbe_notify_dca(struct device *dev, void *data)
1343 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1344 unsigned long event = *(unsigned long *)data;
1346 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1350 case DCA_PROVIDER_ADD:
1351 /* if we're already enabled, don't do it again */
1352 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1354 if (dca_add_requester(dev) == 0) {
1355 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1356 ixgbe_setup_dca(adapter);
1359 /* Fall Through since DCA is disabled. */
1360 case DCA_PROVIDER_REMOVE:
1361 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1362 dca_remove_requester(dev);
1363 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1364 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1372 #endif /* CONFIG_IXGBE_DCA */
1374 #define IXGBE_RSS_L4_TYPES_MASK \
1375 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1376 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1377 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1378 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1380 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1381 union ixgbe_adv_rx_desc *rx_desc,
1382 struct sk_buff *skb)
1386 if (!(ring->netdev->features & NETIF_F_RXHASH))
1389 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1390 IXGBE_RXDADV_RSSTYPE_MASK;
1395 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1396 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1397 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1402 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1403 * @ring: structure containing ring specific data
1404 * @rx_desc: advanced rx descriptor
1406 * Returns : true if it is FCoE pkt
1408 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1409 union ixgbe_adv_rx_desc *rx_desc)
1411 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1413 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1414 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1415 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1416 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1419 #endif /* IXGBE_FCOE */
1421 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1422 * @ring: structure containing ring specific data
1423 * @rx_desc: current Rx descriptor being processed
1424 * @skb: skb currently being received and modified
1426 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1427 union ixgbe_adv_rx_desc *rx_desc,
1428 struct sk_buff *skb)
1430 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1431 __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1432 bool encap_pkt = false;
1434 skb_checksum_none_assert(skb);
1436 /* Rx csum disabled */
1437 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1440 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1441 (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1443 skb->encapsulation = 1;
1446 /* if IP and error */
1447 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1448 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1449 ring->rx_stats.csum_err++;
1453 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1456 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1458 * 82599 errata, UDP frames with a 0 checksum can be marked as
1461 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1462 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1465 ring->rx_stats.csum_err++;
1469 /* It must be a TCP or UDP packet with a valid checksum */
1470 skb->ip_summed = CHECKSUM_UNNECESSARY;
1472 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1475 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1476 ring->rx_stats.csum_err++;
1479 /* If we checked the outer header let the stack know */
1480 skb->csum_level = 1;
1484 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1485 struct ixgbe_rx_buffer *bi)
1487 struct page *page = bi->page;
1490 /* since we are recycling buffers we should seldom need to alloc */
1494 /* alloc new page for storage */
1495 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1496 if (unlikely(!page)) {
1497 rx_ring->rx_stats.alloc_rx_page_failed++;
1501 /* map page for use */
1502 dma = dma_map_page(rx_ring->dev, page, 0,
1503 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1506 * if mapping failed free memory back to system since
1507 * there isn't much point in holding memory we can't use
1509 if (dma_mapping_error(rx_ring->dev, dma)) {
1510 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1512 rx_ring->rx_stats.alloc_rx_page_failed++;
1518 bi->page_offset = 0;
1524 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1525 * @rx_ring: ring to place buffers on
1526 * @cleaned_count: number of buffers to replace
1528 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1530 union ixgbe_adv_rx_desc *rx_desc;
1531 struct ixgbe_rx_buffer *bi;
1532 u16 i = rx_ring->next_to_use;
1538 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1539 bi = &rx_ring->rx_buffer_info[i];
1540 i -= rx_ring->count;
1543 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1547 * Refresh the desc even if buffer_addrs didn't change
1548 * because each write-back erases this info.
1550 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1556 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1557 bi = rx_ring->rx_buffer_info;
1558 i -= rx_ring->count;
1561 /* clear the status bits for the next_to_use descriptor */
1562 rx_desc->wb.upper.status_error = 0;
1565 } while (cleaned_count);
1567 i += rx_ring->count;
1569 if (rx_ring->next_to_use != i) {
1570 rx_ring->next_to_use = i;
1572 /* update next to alloc since we have filled the ring */
1573 rx_ring->next_to_alloc = i;
1575 /* Force memory writes to complete before letting h/w
1576 * know there are new descriptors to fetch. (Only
1577 * applicable for weak-ordered memory model archs,
1581 writel(i, rx_ring->tail);
1585 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1586 struct sk_buff *skb)
1588 u16 hdr_len = skb_headlen(skb);
1590 /* set gso_size to avoid messing up TCP MSS */
1591 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1592 IXGBE_CB(skb)->append_cnt);
1593 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1596 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1597 struct sk_buff *skb)
1599 /* if append_cnt is 0 then frame is not RSC */
1600 if (!IXGBE_CB(skb)->append_cnt)
1603 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1604 rx_ring->rx_stats.rsc_flush++;
1606 ixgbe_set_rsc_gso_size(rx_ring, skb);
1608 /* gso_size is computed using append_cnt so always clear it last */
1609 IXGBE_CB(skb)->append_cnt = 0;
1613 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1614 * @rx_ring: rx descriptor ring packet is being transacted on
1615 * @rx_desc: pointer to the EOP Rx descriptor
1616 * @skb: pointer to current skb being populated
1618 * This function checks the ring, descriptor, and packet information in
1619 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1620 * other fields within the skb.
1622 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1623 union ixgbe_adv_rx_desc *rx_desc,
1624 struct sk_buff *skb)
1626 struct net_device *dev = rx_ring->netdev;
1628 ixgbe_update_rsc_stats(rx_ring, skb);
1630 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1632 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1634 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1635 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1637 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1638 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1639 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1640 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1643 skb_record_rx_queue(skb, rx_ring->queue_index);
1645 skb->protocol = eth_type_trans(skb, dev);
1648 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1649 struct sk_buff *skb)
1651 if (ixgbe_qv_busy_polling(q_vector))
1652 netif_receive_skb(skb);
1654 napi_gro_receive(&q_vector->napi, skb);
1658 * ixgbe_is_non_eop - process handling of non-EOP buffers
1659 * @rx_ring: Rx ring being processed
1660 * @rx_desc: Rx descriptor for current buffer
1661 * @skb: Current socket buffer containing buffer in progress
1663 * This function updates next to clean. If the buffer is an EOP buffer
1664 * this function exits returning false, otherwise it will place the
1665 * sk_buff in the next buffer to be chained and return true indicating
1666 * that this is in fact a non-EOP buffer.
1668 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1669 union ixgbe_adv_rx_desc *rx_desc,
1670 struct sk_buff *skb)
1672 u32 ntc = rx_ring->next_to_clean + 1;
1674 /* fetch, update, and store next to clean */
1675 ntc = (ntc < rx_ring->count) ? ntc : 0;
1676 rx_ring->next_to_clean = ntc;
1678 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1680 /* update RSC append count if present */
1681 if (ring_is_rsc_enabled(rx_ring)) {
1682 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1683 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1685 if (unlikely(rsc_enabled)) {
1686 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1688 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1689 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1691 /* update ntc based on RSC value */
1692 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1693 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1694 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1698 /* if we are the last buffer then there is nothing else to do */
1699 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1702 /* place skb in next buffer to be received */
1703 rx_ring->rx_buffer_info[ntc].skb = skb;
1704 rx_ring->rx_stats.non_eop_descs++;
1710 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1711 * @rx_ring: rx descriptor ring packet is being transacted on
1712 * @skb: pointer to current skb being adjusted
1714 * This function is an ixgbe specific version of __pskb_pull_tail. The
1715 * main difference between this version and the original function is that
1716 * this function can make several assumptions about the state of things
1717 * that allow for significant optimizations versus the standard function.
1718 * As a result we can do things like drop a frag and maintain an accurate
1719 * truesize for the skb.
1721 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1722 struct sk_buff *skb)
1724 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1726 unsigned int pull_len;
1729 * it is valid to use page_address instead of kmap since we are
1730 * working with pages allocated out of the lomem pool per
1731 * alloc_page(GFP_ATOMIC)
1733 va = skb_frag_address(frag);
1736 * we need the header to contain the greater of either ETH_HLEN or
1737 * 60 bytes if the skb->len is less than 60 for skb_pad.
1739 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1741 /* align pull length to size of long to optimize memcpy performance */
1742 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1744 /* update all of the pointers */
1745 skb_frag_size_sub(frag, pull_len);
1746 frag->page_offset += pull_len;
1747 skb->data_len -= pull_len;
1748 skb->tail += pull_len;
1752 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1753 * @rx_ring: rx descriptor ring packet is being transacted on
1754 * @skb: pointer to current skb being updated
1756 * This function provides a basic DMA sync up for the first fragment of an
1757 * skb. The reason for doing this is that the first fragment cannot be
1758 * unmapped until we have reached the end of packet descriptor for a buffer
1761 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1762 struct sk_buff *skb)
1764 /* if the page was released unmap it, else just sync our portion */
1765 if (unlikely(IXGBE_CB(skb)->page_released)) {
1766 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1767 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1768 IXGBE_CB(skb)->page_released = false;
1770 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1772 dma_sync_single_range_for_cpu(rx_ring->dev,
1775 ixgbe_rx_bufsz(rx_ring),
1778 IXGBE_CB(skb)->dma = 0;
1782 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1783 * @rx_ring: rx descriptor ring packet is being transacted on
1784 * @rx_desc: pointer to the EOP Rx descriptor
1785 * @skb: pointer to current skb being fixed
1787 * Check for corrupted packet headers caused by senders on the local L2
1788 * embedded NIC switch not setting up their Tx Descriptors right. These
1789 * should be very rare.
1791 * Also address the case where we are pulling data in on pages only
1792 * and as such no data is present in the skb header.
1794 * In addition if skb is not at least 60 bytes we need to pad it so that
1795 * it is large enough to qualify as a valid Ethernet frame.
1797 * Returns true if an error was encountered and skb was freed.
1799 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1800 union ixgbe_adv_rx_desc *rx_desc,
1801 struct sk_buff *skb)
1803 struct net_device *netdev = rx_ring->netdev;
1805 /* verify that the packet does not have any known errors */
1806 if (unlikely(ixgbe_test_staterr(rx_desc,
1807 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1808 !(netdev->features & NETIF_F_RXALL))) {
1809 dev_kfree_skb_any(skb);
1813 /* place header in linear portion of buffer */
1814 if (skb_is_nonlinear(skb))
1815 ixgbe_pull_tail(rx_ring, skb);
1818 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1819 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1823 /* if eth_skb_pad returns an error the skb was freed */
1824 if (eth_skb_pad(skb))
1831 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1832 * @rx_ring: rx descriptor ring to store buffers on
1833 * @old_buff: donor buffer to have page reused
1835 * Synchronizes page for reuse by the adapter
1837 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1838 struct ixgbe_rx_buffer *old_buff)
1840 struct ixgbe_rx_buffer *new_buff;
1841 u16 nta = rx_ring->next_to_alloc;
1843 new_buff = &rx_ring->rx_buffer_info[nta];
1845 /* update, and store next to alloc */
1847 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1849 /* transfer page from old buffer to new buffer */
1850 *new_buff = *old_buff;
1852 /* sync the buffer for use by the device */
1853 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1854 new_buff->page_offset,
1855 ixgbe_rx_bufsz(rx_ring),
1859 static inline bool ixgbe_page_is_reserved(struct page *page)
1861 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1865 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1866 * @rx_ring: rx descriptor ring to transact packets on
1867 * @rx_buffer: buffer containing page to add
1868 * @rx_desc: descriptor containing length of buffer written by hardware
1869 * @skb: sk_buff to place the data into
1871 * This function will add the data contained in rx_buffer->page to the skb.
1872 * This is done either through a direct copy if the data in the buffer is
1873 * less than the skb header size, otherwise it will just attach the page as
1874 * a frag to the skb.
1876 * The function will then update the page offset if necessary and return
1877 * true if the buffer can be reused by the adapter.
1879 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1880 struct ixgbe_rx_buffer *rx_buffer,
1881 union ixgbe_adv_rx_desc *rx_desc,
1882 struct sk_buff *skb)
1884 struct page *page = rx_buffer->page;
1885 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1886 #if (PAGE_SIZE < 8192)
1887 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1889 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1890 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1891 ixgbe_rx_bufsz(rx_ring);
1894 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1895 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1897 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1899 /* page is not reserved, we can reuse buffer as-is */
1900 if (likely(!ixgbe_page_is_reserved(page)))
1903 /* this page cannot be reused so discard it */
1904 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1908 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1909 rx_buffer->page_offset, size, truesize);
1911 /* avoid re-using remote pages */
1912 if (unlikely(ixgbe_page_is_reserved(page)))
1915 #if (PAGE_SIZE < 8192)
1916 /* if we are only owner of page we can reuse it */
1917 if (unlikely(page_count(page) != 1))
1920 /* flip page offset to other buffer */
1921 rx_buffer->page_offset ^= truesize;
1923 /* move offset up to the next cache line */
1924 rx_buffer->page_offset += truesize;
1926 if (rx_buffer->page_offset > last_offset)
1930 /* Even if we own the page, we are not allowed to use atomic_set()
1931 * This would break get_page_unless_zero() users.
1933 atomic_inc(&page->_count);
1938 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1939 union ixgbe_adv_rx_desc *rx_desc)
1941 struct ixgbe_rx_buffer *rx_buffer;
1942 struct sk_buff *skb;
1945 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1946 page = rx_buffer->page;
1949 skb = rx_buffer->skb;
1952 void *page_addr = page_address(page) +
1953 rx_buffer->page_offset;
1955 /* prefetch first cache line of first page */
1956 prefetch(page_addr);
1957 #if L1_CACHE_BYTES < 128
1958 prefetch(page_addr + L1_CACHE_BYTES);
1961 /* allocate a skb to store the frags */
1962 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1964 if (unlikely(!skb)) {
1965 rx_ring->rx_stats.alloc_rx_buff_failed++;
1970 * we will be copying header into skb->data in
1971 * pskb_may_pull so it is in our interest to prefetch
1972 * it now to avoid a possible cache miss
1974 prefetchw(skb->data);
1977 * Delay unmapping of the first packet. It carries the
1978 * header information, HW may still access the header
1979 * after the writeback. Only unmap it when EOP is
1982 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1985 IXGBE_CB(skb)->dma = rx_buffer->dma;
1987 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1988 ixgbe_dma_sync_frag(rx_ring, skb);
1991 /* we are reusing so sync this buffer for CPU use */
1992 dma_sync_single_range_for_cpu(rx_ring->dev,
1994 rx_buffer->page_offset,
1995 ixgbe_rx_bufsz(rx_ring),
1998 rx_buffer->skb = NULL;
2001 /* pull page into skb */
2002 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2003 /* hand second half of page back to the ring */
2004 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2005 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2006 /* the page has been released from the ring */
2007 IXGBE_CB(skb)->page_released = true;
2009 /* we are not reusing the buffer so unmap it */
2010 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2011 ixgbe_rx_pg_size(rx_ring),
2015 /* clear contents of buffer_info */
2016 rx_buffer->page = NULL;
2022 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2023 * @q_vector: structure containing interrupt and ring information
2024 * @rx_ring: rx descriptor ring to transact packets on
2025 * @budget: Total limit on number of packets to process
2027 * This function provides a "bounce buffer" approach to Rx interrupt
2028 * processing. The advantage to this is that on systems that have
2029 * expensive overhead for IOMMU access this provides a means of avoiding
2030 * it by maintaining the mapping of the page to the syste.
2032 * Returns amount of work completed
2034 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2035 struct ixgbe_ring *rx_ring,
2038 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2040 struct ixgbe_adapter *adapter = q_vector->adapter;
2042 unsigned int mss = 0;
2043 #endif /* IXGBE_FCOE */
2044 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2046 while (likely(total_rx_packets < budget)) {
2047 union ixgbe_adv_rx_desc *rx_desc;
2048 struct sk_buff *skb;
2050 /* return some buffers to hardware, one at a time is too slow */
2051 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2052 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2056 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2058 if (!rx_desc->wb.upper.status_error)
2061 /* This memory barrier is needed to keep us from reading
2062 * any other fields out of the rx_desc until we know the
2063 * descriptor has been written back
2067 /* retrieve a buffer from the ring */
2068 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2070 /* exit if we failed to retrieve a buffer */
2076 /* place incomplete frames back on ring for completion */
2077 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2080 /* verify the packet layout is correct */
2081 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2084 /* probably a little skewed due to removing CRC */
2085 total_rx_bytes += skb->len;
2087 /* populate checksum, timestamp, VLAN, and protocol */
2088 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2091 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2092 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2093 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2094 /* include DDPed FCoE data */
2095 if (ddp_bytes > 0) {
2097 mss = rx_ring->netdev->mtu -
2098 sizeof(struct fcoe_hdr) -
2099 sizeof(struct fc_frame_header) -
2100 sizeof(struct fcoe_crc_eof);
2104 total_rx_bytes += ddp_bytes;
2105 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2109 dev_kfree_skb_any(skb);
2114 #endif /* IXGBE_FCOE */
2115 skb_mark_napi_id(skb, &q_vector->napi);
2116 ixgbe_rx_skb(q_vector, skb);
2118 /* update budget accounting */
2122 u64_stats_update_begin(&rx_ring->syncp);
2123 rx_ring->stats.packets += total_rx_packets;
2124 rx_ring->stats.bytes += total_rx_bytes;
2125 u64_stats_update_end(&rx_ring->syncp);
2126 q_vector->rx.total_packets += total_rx_packets;
2127 q_vector->rx.total_bytes += total_rx_bytes;
2129 return total_rx_packets;
2132 #ifdef CONFIG_NET_RX_BUSY_POLL
2133 /* must be called with local_bh_disable()d */
2134 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2136 struct ixgbe_q_vector *q_vector =
2137 container_of(napi, struct ixgbe_q_vector, napi);
2138 struct ixgbe_adapter *adapter = q_vector->adapter;
2139 struct ixgbe_ring *ring;
2142 if (test_bit(__IXGBE_DOWN, &adapter->state))
2143 return LL_FLUSH_FAILED;
2145 if (!ixgbe_qv_lock_poll(q_vector))
2146 return LL_FLUSH_BUSY;
2148 ixgbe_for_each_ring(ring, q_vector->rx) {
2149 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2150 #ifdef BP_EXTENDED_STATS
2152 ring->stats.cleaned += found;
2154 ring->stats.misses++;
2160 ixgbe_qv_unlock_poll(q_vector);
2164 #endif /* CONFIG_NET_RX_BUSY_POLL */
2167 * ixgbe_configure_msix - Configure MSI-X hardware
2168 * @adapter: board private structure
2170 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2173 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2175 struct ixgbe_q_vector *q_vector;
2179 /* Populate MSIX to EITR Select */
2180 if (adapter->num_vfs > 32) {
2181 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2182 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2186 * Populate the IVAR table and set the ITR values to the
2187 * corresponding register.
2189 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2190 struct ixgbe_ring *ring;
2191 q_vector = adapter->q_vector[v_idx];
2193 ixgbe_for_each_ring(ring, q_vector->rx)
2194 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2196 ixgbe_for_each_ring(ring, q_vector->tx)
2197 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2199 ixgbe_write_eitr(q_vector);
2202 switch (adapter->hw.mac.type) {
2203 case ixgbe_mac_82598EB:
2204 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2207 case ixgbe_mac_82599EB:
2208 case ixgbe_mac_X540:
2209 case ixgbe_mac_X550:
2210 case ixgbe_mac_X550EM_x:
2211 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2216 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2218 /* set up to autoclear timer, and the vectors */
2219 mask = IXGBE_EIMS_ENABLE_MASK;
2220 mask &= ~(IXGBE_EIMS_OTHER |
2221 IXGBE_EIMS_MAILBOX |
2224 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2227 enum latency_range {
2231 latency_invalid = 255
2235 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2236 * @q_vector: structure containing interrupt and ring information
2237 * @ring_container: structure containing ring performance data
2239 * Stores a new ITR value based on packets and byte
2240 * counts during the last interrupt. The advantage of per interrupt
2241 * computation is faster updates and more accurate ITR for the current
2242 * traffic pattern. Constants in this function were computed
2243 * based on theoretical maximum wire speed and thresholds were set based
2244 * on testing data as well as attempting to minimize response time
2245 * while increasing bulk throughput.
2246 * this functionality is controlled by the InterruptThrottleRate module
2247 * parameter (see ixgbe_param.c)
2249 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2250 struct ixgbe_ring_container *ring_container)
2252 int bytes = ring_container->total_bytes;
2253 int packets = ring_container->total_packets;
2256 u8 itr_setting = ring_container->itr;
2261 /* simple throttlerate management
2262 * 0-10MB/s lowest (100000 ints/s)
2263 * 10-20MB/s low (20000 ints/s)
2264 * 20-1249MB/s bulk (8000 ints/s)
2266 /* what was last interrupt timeslice? */
2267 timepassed_us = q_vector->itr >> 2;
2268 if (timepassed_us == 0)
2271 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2273 switch (itr_setting) {
2274 case lowest_latency:
2275 if (bytes_perint > 10)
2276 itr_setting = low_latency;
2279 if (bytes_perint > 20)
2280 itr_setting = bulk_latency;
2281 else if (bytes_perint <= 10)
2282 itr_setting = lowest_latency;
2285 if (bytes_perint <= 20)
2286 itr_setting = low_latency;
2290 /* clear work counters since we have the values we need */
2291 ring_container->total_bytes = 0;
2292 ring_container->total_packets = 0;
2294 /* write updated itr to ring container */
2295 ring_container->itr = itr_setting;
2299 * ixgbe_write_eitr - write EITR register in hardware specific way
2300 * @q_vector: structure containing interrupt and ring information
2302 * This function is made to be called by ethtool and by the driver
2303 * when it needs to update EITR registers at runtime. Hardware
2304 * specific quirks/differences are taken care of here.
2306 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2308 struct ixgbe_adapter *adapter = q_vector->adapter;
2309 struct ixgbe_hw *hw = &adapter->hw;
2310 int v_idx = q_vector->v_idx;
2311 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2313 switch (adapter->hw.mac.type) {
2314 case ixgbe_mac_82598EB:
2315 /* must write high and low 16 bits to reset counter */
2316 itr_reg |= (itr_reg << 16);
2318 case ixgbe_mac_82599EB:
2319 case ixgbe_mac_X540:
2320 case ixgbe_mac_X550:
2321 case ixgbe_mac_X550EM_x:
2323 * set the WDIS bit to not clear the timer bits and cause an
2324 * immediate assertion of the interrupt
2326 itr_reg |= IXGBE_EITR_CNT_WDIS;
2331 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2334 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2336 u32 new_itr = q_vector->itr;
2339 ixgbe_update_itr(q_vector, &q_vector->tx);
2340 ixgbe_update_itr(q_vector, &q_vector->rx);
2342 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2344 switch (current_itr) {
2345 /* counts and packets in update_itr are dependent on these numbers */
2346 case lowest_latency:
2347 new_itr = IXGBE_100K_ITR;
2350 new_itr = IXGBE_20K_ITR;
2353 new_itr = IXGBE_8K_ITR;
2359 if (new_itr != q_vector->itr) {
2360 /* do an exponential smoothing */
2361 new_itr = (10 * new_itr * q_vector->itr) /
2362 ((9 * new_itr) + q_vector->itr);
2364 /* save the algorithm value here */
2365 q_vector->itr = new_itr;
2367 ixgbe_write_eitr(q_vector);
2372 * ixgbe_check_overtemp_subtask - check for over temperature
2373 * @adapter: pointer to adapter
2375 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2377 struct ixgbe_hw *hw = &adapter->hw;
2378 u32 eicr = adapter->interrupt_event;
2380 if (test_bit(__IXGBE_DOWN, &adapter->state))
2383 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2384 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2387 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2389 switch (hw->device_id) {
2390 case IXGBE_DEV_ID_82599_T3_LOM:
2392 * Since the warning interrupt is for both ports
2393 * we don't have to check if:
2394 * - This interrupt wasn't for our port.
2395 * - We may have missed the interrupt so always have to
2396 * check if we got a LSC
2398 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2399 !(eicr & IXGBE_EICR_LSC))
2402 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2404 bool link_up = false;
2406 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2412 /* Check if this is not due to overtemp */
2413 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2418 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2420 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2424 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2426 adapter->interrupt_event = 0;
2429 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2431 struct ixgbe_hw *hw = &adapter->hw;
2433 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2434 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2435 e_crit(probe, "Fan has stopped, replace the adapter\n");
2436 /* write to clear the interrupt */
2437 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2441 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2443 struct ixgbe_hw *hw = &adapter->hw;
2445 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2448 switch (adapter->hw.mac.type) {
2449 case ixgbe_mac_82599EB:
2451 * Need to check link state so complete overtemp check
2454 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2455 (eicr & IXGBE_EICR_LSC)) &&
2456 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2457 adapter->interrupt_event = eicr;
2458 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2459 ixgbe_service_event_schedule(adapter);
2463 case ixgbe_mac_X540:
2464 if (!(eicr & IXGBE_EICR_TS))
2471 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2474 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2476 switch (hw->mac.type) {
2477 case ixgbe_mac_82598EB:
2478 if (hw->phy.type == ixgbe_phy_nl)
2481 case ixgbe_mac_82599EB:
2482 case ixgbe_mac_X550EM_x:
2483 switch (hw->mac.ops.get_media_type(hw)) {
2484 case ixgbe_media_type_fiber:
2485 case ixgbe_media_type_fiber_qsfp:
2495 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2497 struct ixgbe_hw *hw = &adapter->hw;
2499 if (eicr & IXGBE_EICR_GPI_SDP2(hw)) {
2500 /* Clear the interrupt */
2501 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2(hw));
2502 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2503 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2504 ixgbe_service_event_schedule(adapter);
2508 if (eicr & IXGBE_EICR_GPI_SDP1(hw)) {
2509 /* Clear the interrupt */
2510 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2511 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2512 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2513 ixgbe_service_event_schedule(adapter);
2518 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2520 struct ixgbe_hw *hw = &adapter->hw;
2523 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2524 adapter->link_check_timeout = jiffies;
2525 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2526 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2527 IXGBE_WRITE_FLUSH(hw);
2528 ixgbe_service_event_schedule(adapter);
2532 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2536 struct ixgbe_hw *hw = &adapter->hw;
2538 switch (hw->mac.type) {
2539 case ixgbe_mac_82598EB:
2540 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2541 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2543 case ixgbe_mac_82599EB:
2544 case ixgbe_mac_X540:
2545 case ixgbe_mac_X550:
2546 case ixgbe_mac_X550EM_x:
2547 mask = (qmask & 0xFFFFFFFF);
2549 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2550 mask = (qmask >> 32);
2552 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2557 /* skip the flush */
2560 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2564 struct ixgbe_hw *hw = &adapter->hw;
2566 switch (hw->mac.type) {
2567 case ixgbe_mac_82598EB:
2568 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2569 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2571 case ixgbe_mac_82599EB:
2572 case ixgbe_mac_X540:
2573 case ixgbe_mac_X550:
2574 case ixgbe_mac_X550EM_x:
2575 mask = (qmask & 0xFFFFFFFF);
2577 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2578 mask = (qmask >> 32);
2580 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2585 /* skip the flush */
2589 * ixgbe_irq_enable - Enable default interrupt generation settings
2590 * @adapter: board private structure
2592 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2595 struct ixgbe_hw *hw = &adapter->hw;
2596 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2598 /* don't reenable LSC while waiting for link */
2599 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2600 mask &= ~IXGBE_EIMS_LSC;
2602 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2603 switch (adapter->hw.mac.type) {
2604 case ixgbe_mac_82599EB:
2605 mask |= IXGBE_EIMS_GPI_SDP0(hw);
2607 case ixgbe_mac_X540:
2608 case ixgbe_mac_X550:
2609 case ixgbe_mac_X550EM_x:
2610 mask |= IXGBE_EIMS_TS;
2615 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2616 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2617 switch (adapter->hw.mac.type) {
2618 case ixgbe_mac_82599EB:
2619 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2620 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2622 case ixgbe_mac_X540:
2623 case ixgbe_mac_X550:
2624 case ixgbe_mac_X550EM_x:
2625 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2626 mask |= IXGBE_EICR_GPI_SDP0_X540;
2627 mask |= IXGBE_EIMS_ECC;
2628 mask |= IXGBE_EIMS_MAILBOX;
2634 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2635 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2636 mask |= IXGBE_EIMS_FLOW_DIR;
2638 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2640 ixgbe_irq_enable_queues(adapter, ~0);
2642 IXGBE_WRITE_FLUSH(&adapter->hw);
2645 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2647 struct ixgbe_adapter *adapter = data;
2648 struct ixgbe_hw *hw = &adapter->hw;
2652 * Workaround for Silicon errata. Use clear-by-write instead
2653 * of clear-by-read. Reading with EICS will return the
2654 * interrupt causes without clearing, which later be done
2655 * with the write to EICR.
2657 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2659 /* The lower 16bits of the EICR register are for the queue interrupts
2660 * which should be masked here in order to not accidentally clear them if
2661 * the bits are high when ixgbe_msix_other is called. There is a race
2662 * condition otherwise which results in possible performance loss
2663 * especially if the ixgbe_msix_other interrupt is triggering
2664 * consistently (as it would when PPS is turned on for the X540 device)
2668 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2670 if (eicr & IXGBE_EICR_LSC)
2671 ixgbe_check_lsc(adapter);
2673 if (eicr & IXGBE_EICR_MAILBOX)
2674 ixgbe_msg_task(adapter);
2676 switch (hw->mac.type) {
2677 case ixgbe_mac_82599EB:
2678 case ixgbe_mac_X540:
2679 case ixgbe_mac_X550:
2680 case ixgbe_mac_X550EM_x:
2681 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2682 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2683 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2684 ixgbe_service_event_schedule(adapter);
2685 IXGBE_WRITE_REG(hw, IXGBE_EICR,
2686 IXGBE_EICR_GPI_SDP0_X540);
2688 if (eicr & IXGBE_EICR_ECC) {
2689 e_info(link, "Received ECC Err, initiating reset\n");
2690 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2691 ixgbe_service_event_schedule(adapter);
2692 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2694 /* Handle Flow Director Full threshold interrupt */
2695 if (eicr & IXGBE_EICR_FLOW_DIR) {
2696 int reinit_count = 0;
2698 for (i = 0; i < adapter->num_tx_queues; i++) {
2699 struct ixgbe_ring *ring = adapter->tx_ring[i];
2700 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2705 /* no more flow director interrupts until after init */
2706 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2707 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2708 ixgbe_service_event_schedule(adapter);
2711 ixgbe_check_sfp_event(adapter, eicr);
2712 ixgbe_check_overtemp_event(adapter, eicr);
2718 ixgbe_check_fan_failure(adapter, eicr);
2720 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2721 ixgbe_ptp_check_pps_event(adapter, eicr);
2723 /* re-enable the original interrupt state, no lsc, no queues */
2724 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2725 ixgbe_irq_enable(adapter, false, false);
2730 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2732 struct ixgbe_q_vector *q_vector = data;
2734 /* EIAM disabled interrupts (on this vector) for us */
2736 if (q_vector->rx.ring || q_vector->tx.ring)
2737 napi_schedule(&q_vector->napi);
2743 * ixgbe_poll - NAPI Rx polling callback
2744 * @napi: structure for representing this polling device
2745 * @budget: how many packets driver is allowed to clean
2747 * This function is used for legacy and MSI, NAPI mode
2749 int ixgbe_poll(struct napi_struct *napi, int budget)
2751 struct ixgbe_q_vector *q_vector =
2752 container_of(napi, struct ixgbe_q_vector, napi);
2753 struct ixgbe_adapter *adapter = q_vector->adapter;
2754 struct ixgbe_ring *ring;
2755 int per_ring_budget;
2756 bool clean_complete = true;
2758 #ifdef CONFIG_IXGBE_DCA
2759 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2760 ixgbe_update_dca(q_vector);
2763 ixgbe_for_each_ring(ring, q_vector->tx)
2764 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2766 if (!ixgbe_qv_lock_napi(q_vector))
2769 /* attempt to distribute budget to each queue fairly, but don't allow
2770 * the budget to go below 1 because we'll exit polling */
2771 if (q_vector->rx.count > 1)
2772 per_ring_budget = max(budget/q_vector->rx.count, 1);
2774 per_ring_budget = budget;
2776 ixgbe_for_each_ring(ring, q_vector->rx)
2777 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2778 per_ring_budget) < per_ring_budget);
2780 ixgbe_qv_unlock_napi(q_vector);
2781 /* If all work not completed, return budget and keep polling */
2782 if (!clean_complete)
2785 /* all work done, exit the polling mode */
2786 napi_complete(napi);
2787 if (adapter->rx_itr_setting & 1)
2788 ixgbe_set_itr(q_vector);
2789 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2790 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2796 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2797 * @adapter: board private structure
2799 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2800 * interrupts from the kernel.
2802 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2804 struct net_device *netdev = adapter->netdev;
2808 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2809 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2810 struct msix_entry *entry = &adapter->msix_entries[vector];
2812 if (q_vector->tx.ring && q_vector->rx.ring) {
2813 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2814 "%s-%s-%d", netdev->name, "TxRx", ri++);
2816 } else if (q_vector->rx.ring) {
2817 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2818 "%s-%s-%d", netdev->name, "rx", ri++);
2819 } else if (q_vector->tx.ring) {
2820 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2821 "%s-%s-%d", netdev->name, "tx", ti++);
2823 /* skip this unused q_vector */
2826 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2827 q_vector->name, q_vector);
2829 e_err(probe, "request_irq failed for MSIX interrupt "
2830 "Error: %d\n", err);
2831 goto free_queue_irqs;
2833 /* If Flow Director is enabled, set interrupt affinity */
2834 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2835 /* assign the mask for this irq */
2836 irq_set_affinity_hint(entry->vector,
2837 &q_vector->affinity_mask);
2841 err = request_irq(adapter->msix_entries[vector].vector,
2842 ixgbe_msix_other, 0, netdev->name, adapter);
2844 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2845 goto free_queue_irqs;
2853 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2855 free_irq(adapter->msix_entries[vector].vector,
2856 adapter->q_vector[vector]);
2858 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2859 pci_disable_msix(adapter->pdev);
2860 kfree(adapter->msix_entries);
2861 adapter->msix_entries = NULL;
2866 * ixgbe_intr - legacy mode Interrupt Handler
2867 * @irq: interrupt number
2868 * @data: pointer to a network interface device structure
2870 static irqreturn_t ixgbe_intr(int irq, void *data)
2872 struct ixgbe_adapter *adapter = data;
2873 struct ixgbe_hw *hw = &adapter->hw;
2874 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2878 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2879 * before the read of EICR.
2881 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2883 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2884 * therefore no explicit interrupt disable is necessary */
2885 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2888 * shared interrupt alert!
2889 * make sure interrupts are enabled because the read will
2890 * have disabled interrupts due to EIAM
2891 * finish the workaround of silicon errata on 82598. Unmask
2892 * the interrupt that we masked before the EICR read.
2894 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2895 ixgbe_irq_enable(adapter, true, true);
2896 return IRQ_NONE; /* Not our interrupt */
2899 if (eicr & IXGBE_EICR_LSC)
2900 ixgbe_check_lsc(adapter);
2902 switch (hw->mac.type) {
2903 case ixgbe_mac_82599EB:
2904 ixgbe_check_sfp_event(adapter, eicr);
2906 case ixgbe_mac_X540:
2907 case ixgbe_mac_X550:
2908 case ixgbe_mac_X550EM_x:
2909 if (eicr & IXGBE_EICR_ECC) {
2910 e_info(link, "Received ECC Err, initiating reset\n");
2911 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2912 ixgbe_service_event_schedule(adapter);
2913 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2915 ixgbe_check_overtemp_event(adapter, eicr);
2921 ixgbe_check_fan_failure(adapter, eicr);
2922 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2923 ixgbe_ptp_check_pps_event(adapter, eicr);
2925 /* would disable interrupts here but EIAM disabled it */
2926 napi_schedule(&q_vector->napi);
2929 * re-enable link(maybe) and non-queue interrupts, no flush.
2930 * ixgbe_poll will re-enable the queue interrupts
2932 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2933 ixgbe_irq_enable(adapter, false, false);
2939 * ixgbe_request_irq - initialize interrupts
2940 * @adapter: board private structure
2942 * Attempts to configure interrupts using the best available
2943 * capabilities of the hardware and kernel.
2945 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2947 struct net_device *netdev = adapter->netdev;
2950 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2951 err = ixgbe_request_msix_irqs(adapter);
2952 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2953 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2954 netdev->name, adapter);
2956 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2957 netdev->name, adapter);
2960 e_err(probe, "request_irq failed, Error %d\n", err);
2965 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2969 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2970 free_irq(adapter->pdev->irq, adapter);
2974 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2975 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2976 struct msix_entry *entry = &adapter->msix_entries[vector];
2978 /* free only the irqs that were actually requested */
2979 if (!q_vector->rx.ring && !q_vector->tx.ring)
2982 /* clear the affinity_mask in the IRQ descriptor */
2983 irq_set_affinity_hint(entry->vector, NULL);
2985 free_irq(entry->vector, q_vector);
2988 free_irq(adapter->msix_entries[vector++].vector, adapter);
2992 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2993 * @adapter: board private structure
2995 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2997 switch (adapter->hw.mac.type) {
2998 case ixgbe_mac_82598EB:
2999 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3001 case ixgbe_mac_82599EB:
3002 case ixgbe_mac_X540:
3003 case ixgbe_mac_X550:
3004 case ixgbe_mac_X550EM_x:
3005 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3006 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3007 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3012 IXGBE_WRITE_FLUSH(&adapter->hw);
3013 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3016 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3017 synchronize_irq(adapter->msix_entries[vector].vector);
3019 synchronize_irq(adapter->msix_entries[vector++].vector);
3021 synchronize_irq(adapter->pdev->irq);
3026 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3029 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3031 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3033 ixgbe_write_eitr(q_vector);
3035 ixgbe_set_ivar(adapter, 0, 0, 0);
3036 ixgbe_set_ivar(adapter, 1, 0, 0);
3038 e_info(hw, "Legacy interrupt IVAR setup done\n");
3042 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3043 * @adapter: board private structure
3044 * @ring: structure containing ring specific data
3046 * Configure the Tx descriptor ring after a reset.
3048 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3049 struct ixgbe_ring *ring)
3051 struct ixgbe_hw *hw = &adapter->hw;
3052 u64 tdba = ring->dma;
3054 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3055 u8 reg_idx = ring->reg_idx;
3057 /* disable queue to avoid issues while updating state */
3058 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3059 IXGBE_WRITE_FLUSH(hw);
3061 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3062 (tdba & DMA_BIT_MASK(32)));
3063 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3064 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3065 ring->count * sizeof(union ixgbe_adv_tx_desc));
3066 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3067 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3068 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3071 * set WTHRESH to encourage burst writeback, it should not be set
3072 * higher than 1 when:
3073 * - ITR is 0 as it could cause false TX hangs
3074 * - ITR is set to > 100k int/sec and BQL is enabled
3076 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3077 * to or less than the number of on chip descriptors, which is
3080 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3081 txdctl |= (1 << 16); /* WTHRESH = 1 */
3083 txdctl |= (8 << 16); /* WTHRESH = 8 */
3086 * Setting PTHRESH to 32 both improves performance
3087 * and avoids a TX hang with DFP enabled
3089 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3090 32; /* PTHRESH = 32 */
3092 /* reinitialize flowdirector state */
3093 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3094 ring->atr_sample_rate = adapter->atr_sample_rate;
3095 ring->atr_count = 0;
3096 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3098 ring->atr_sample_rate = 0;
3101 /* initialize XPS */
3102 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3103 struct ixgbe_q_vector *q_vector = ring->q_vector;
3106 netif_set_xps_queue(ring->netdev,
3107 &q_vector->affinity_mask,
3111 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3114 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3116 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3117 if (hw->mac.type == ixgbe_mac_82598EB &&
3118 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3121 /* poll to verify queue is enabled */
3123 usleep_range(1000, 2000);
3124 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3125 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3127 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3130 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3132 struct ixgbe_hw *hw = &adapter->hw;
3134 u8 tcs = netdev_get_num_tc(adapter->netdev);
3136 if (hw->mac.type == ixgbe_mac_82598EB)
3139 /* disable the arbiter while setting MTQC */
3140 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3141 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3142 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3144 /* set transmit pool layout */
3145 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3146 mtqc = IXGBE_MTQC_VT_ENA;
3148 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3150 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3151 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3152 mtqc |= IXGBE_MTQC_32VF;
3154 mtqc |= IXGBE_MTQC_64VF;
3157 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3159 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3161 mtqc = IXGBE_MTQC_64Q_1PB;
3164 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3166 /* Enable Security TX Buffer IFG for multiple pb */
3168 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3169 sectx |= IXGBE_SECTX_DCB;
3170 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3173 /* re-enable the arbiter */
3174 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3175 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3179 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3180 * @adapter: board private structure
3182 * Configure the Tx unit of the MAC after a reset.
3184 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3186 struct ixgbe_hw *hw = &adapter->hw;
3190 ixgbe_setup_mtqc(adapter);
3192 if (hw->mac.type != ixgbe_mac_82598EB) {
3193 /* DMATXCTL.EN must be before Tx queues are enabled */
3194 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3195 dmatxctl |= IXGBE_DMATXCTL_TE;
3196 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3199 /* Setup the HW Tx Head and Tail descriptor pointers */
3200 for (i = 0; i < adapter->num_tx_queues; i++)
3201 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3204 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3205 struct ixgbe_ring *ring)
3207 struct ixgbe_hw *hw = &adapter->hw;
3208 u8 reg_idx = ring->reg_idx;
3209 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3211 srrctl |= IXGBE_SRRCTL_DROP_EN;
3213 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3216 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3217 struct ixgbe_ring *ring)
3219 struct ixgbe_hw *hw = &adapter->hw;
3220 u8 reg_idx = ring->reg_idx;
3221 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3223 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3225 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3228 #ifdef CONFIG_IXGBE_DCB
3229 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3231 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3235 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3237 if (adapter->ixgbe_ieee_pfc)
3238 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3241 * We should set the drop enable bit if:
3244 * Number of Rx queues > 1 and flow control is disabled
3246 * This allows us to avoid head of line blocking for security
3247 * and performance reasons.
3249 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3250 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3251 for (i = 0; i < adapter->num_rx_queues; i++)
3252 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3254 for (i = 0; i < adapter->num_rx_queues; i++)
3255 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3259 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3261 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3262 struct ixgbe_ring *rx_ring)
3264 struct ixgbe_hw *hw = &adapter->hw;
3266 u8 reg_idx = rx_ring->reg_idx;
3268 if (hw->mac.type == ixgbe_mac_82598EB) {
3269 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3272 * if VMDq is not active we must program one srrctl register
3273 * per RSS queue since we have enabled RDRXCTL.MVMEN
3278 /* configure header buffer length, needed for RSC */
3279 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3281 /* configure the packet buffer length */
3282 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3284 /* configure descriptor type */
3285 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3287 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3291 * Return a number of entries in the RSS indirection table
3293 * @adapter: device handle
3295 * - 82598/82599/X540: 128
3296 * - X550(non-SRIOV mode): 512
3297 * - X550(SRIOV mode): 64
3299 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3301 if (adapter->hw.mac.type < ixgbe_mac_X550)
3303 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3310 * Write the RETA table to HW
3312 * @adapter: device handle
3314 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3316 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3318 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3319 struct ixgbe_hw *hw = &adapter->hw;
3322 u8 *indir_tbl = adapter->rss_indir_tbl;
3324 /* Fill out the redirection table as follows:
3325 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3327 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3328 * - X550: 8 bit wide entries containing 6 bit RSS index
3330 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3331 indices_multi = 0x11;
3333 indices_multi = 0x1;
3335 /* Write redirection table to HW */
3336 for (i = 0; i < reta_entries; i++) {
3337 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3340 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3342 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3350 * Write the RETA table to HW (for x550 devices in SRIOV mode)
3352 * @adapter: device handle
3354 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3356 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3358 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3359 struct ixgbe_hw *hw = &adapter->hw;
3361 unsigned int pf_pool = adapter->num_vfs;
3363 /* Write redirection table to HW */
3364 for (i = 0; i < reta_entries; i++) {
3365 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3367 IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3374 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3376 struct ixgbe_hw *hw = &adapter->hw;
3378 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3379 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3381 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3382 * make full use of any rings they may have. We will use the
3383 * PSRTYPE register to control how many rings we use within the PF.
3385 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3388 /* Fill out hash function seeds */
3389 for (i = 0; i < 10; i++)
3390 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3392 /* Fill out redirection table */
3393 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3395 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3399 adapter->rss_indir_tbl[i] = j;
3402 ixgbe_store_reta(adapter);
3405 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3407 struct ixgbe_hw *hw = &adapter->hw;
3408 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3409 unsigned int pf_pool = adapter->num_vfs;
3412 /* Fill out hash function seeds */
3413 for (i = 0; i < 10; i++)
3414 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3415 adapter->rss_key[i]);
3417 /* Fill out the redirection table */
3418 for (i = 0, j = 0; i < 64; i++, j++) {
3422 adapter->rss_indir_tbl[i] = j;
3425 ixgbe_store_vfreta(adapter);
3428 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3430 struct ixgbe_hw *hw = &adapter->hw;
3431 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3434 /* Disable indicating checksum in descriptor, enables RSS hash */
3435 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3436 rxcsum |= IXGBE_RXCSUM_PCSD;
3437 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3439 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3440 if (adapter->ring_feature[RING_F_RSS].mask)
3441 mrqc = IXGBE_MRQC_RSSEN;
3443 u8 tcs = netdev_get_num_tc(adapter->netdev);
3445 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3447 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3449 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3450 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3451 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3453 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3456 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3458 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3460 mrqc = IXGBE_MRQC_RSSEN;
3464 /* Perform hash on these packet types */
3465 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3466 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3467 IXGBE_MRQC_RSS_FIELD_IPV6 |
3468 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3470 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3471 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3472 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3473 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3475 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3476 if ((hw->mac.type >= ixgbe_mac_X550) &&
3477 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3478 unsigned int pf_pool = adapter->num_vfs;
3480 /* Enable VF RSS mode */
3481 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3482 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3484 /* Setup RSS through the VF registers */
3485 ixgbe_setup_vfreta(adapter);
3486 vfmrqc = IXGBE_MRQC_RSSEN;
3487 vfmrqc |= rss_field;
3488 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3490 ixgbe_setup_reta(adapter);
3492 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3497 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3498 * @adapter: address of board private structure
3499 * @index: index of ring to set
3501 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3502 struct ixgbe_ring *ring)
3504 struct ixgbe_hw *hw = &adapter->hw;
3506 u8 reg_idx = ring->reg_idx;
3508 if (!ring_is_rsc_enabled(ring))
3511 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3512 rscctrl |= IXGBE_RSCCTL_RSCEN;
3514 * we must limit the number of descriptors so that the
3515 * total size of max desc * buf_len is not greater
3518 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3519 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3522 #define IXGBE_MAX_RX_DESC_POLL 10
3523 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3524 struct ixgbe_ring *ring)
3526 struct ixgbe_hw *hw = &adapter->hw;
3527 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3529 u8 reg_idx = ring->reg_idx;
3531 if (ixgbe_removed(hw->hw_addr))
3533 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3534 if (hw->mac.type == ixgbe_mac_82598EB &&
3535 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3539 usleep_range(1000, 2000);
3540 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3541 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3544 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3545 "the polling period\n", reg_idx);
3549 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3550 struct ixgbe_ring *ring)
3552 struct ixgbe_hw *hw = &adapter->hw;
3553 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3555 u8 reg_idx = ring->reg_idx;
3557 if (ixgbe_removed(hw->hw_addr))
3559 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3560 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3562 /* write value back with RXDCTL.ENABLE bit cleared */
3563 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3565 if (hw->mac.type == ixgbe_mac_82598EB &&
3566 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3569 /* the hardware may take up to 100us to really disable the rx queue */
3572 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3573 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3576 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3577 "the polling period\n", reg_idx);
3581 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3582 struct ixgbe_ring *ring)
3584 struct ixgbe_hw *hw = &adapter->hw;
3585 u64 rdba = ring->dma;
3587 u8 reg_idx = ring->reg_idx;
3589 /* disable queue to avoid issues while updating state */
3590 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3591 ixgbe_disable_rx_queue(adapter, ring);
3593 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3594 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3595 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3596 ring->count * sizeof(union ixgbe_adv_rx_desc));
3597 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3598 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3599 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3601 ixgbe_configure_srrctl(adapter, ring);
3602 ixgbe_configure_rscctl(adapter, ring);
3604 if (hw->mac.type == ixgbe_mac_82598EB) {
3606 * enable cache line friendly hardware writes:
3607 * PTHRESH=32 descriptors (half the internal cache),
3608 * this also removes ugly rx_no_buffer_count increment
3609 * HTHRESH=4 descriptors (to minimize latency on fetch)
3610 * WTHRESH=8 burst writeback up to two cache lines
3612 rxdctl &= ~0x3FFFFF;
3616 /* enable receive descriptor ring */
3617 rxdctl |= IXGBE_RXDCTL_ENABLE;
3618 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3620 ixgbe_rx_desc_queue_enable(adapter, ring);
3621 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3624 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3626 struct ixgbe_hw *hw = &adapter->hw;
3627 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3630 /* PSRTYPE must be initialized in non 82598 adapters */
3631 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3632 IXGBE_PSRTYPE_UDPHDR |
3633 IXGBE_PSRTYPE_IPV4HDR |
3634 IXGBE_PSRTYPE_L2HDR |
3635 IXGBE_PSRTYPE_IPV6HDR;
3637 if (hw->mac.type == ixgbe_mac_82598EB)
3645 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3646 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3649 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3651 struct ixgbe_hw *hw = &adapter->hw;
3652 u32 reg_offset, vf_shift;
3653 u32 gcr_ext, vmdctl;
3656 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3659 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3660 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3661 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3662 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3663 vmdctl |= IXGBE_VT_CTL_REPLEN;
3664 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3666 vf_shift = VMDQ_P(0) % 32;
3667 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3669 /* Enable only the PF's pool for Tx/Rx */
3670 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3671 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3672 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3673 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3674 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3675 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3677 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3678 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3681 * Set up VF register offsets for selected VT Mode,
3682 * i.e. 32 or 64 VFs for SR-IOV
3684 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3685 case IXGBE_82599_VMDQ_8Q_MASK:
3686 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3688 case IXGBE_82599_VMDQ_4Q_MASK:
3689 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3692 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3696 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3699 /* Enable MAC Anti-Spoofing */
3700 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3703 /* Ensure LLDP is set for Ethertype Antispoofing if we will be
3704 * calling set_ethertype_anti_spoofing for each VF in loop below
3706 if (hw->mac.ops.set_ethertype_anti_spoofing)
3707 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3708 (IXGBE_ETQF_FILTER_EN | /* enable filter */
3709 IXGBE_ETQF_TX_ANTISPOOF | /* tx antispoof */
3710 IXGBE_ETH_P_LLDP)); /* LLDP eth type */
3712 /* For VFs that have spoof checking turned off */
3713 for (i = 0; i < adapter->num_vfs; i++) {
3714 if (!adapter->vfinfo[i].spoofchk_enabled)
3715 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3717 /* enable ethertype anti spoofing if hw supports it */
3718 if (hw->mac.ops.set_ethertype_anti_spoofing)
3719 hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3721 /* Enable/Disable RSS query feature */
3722 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3723 adapter->vfinfo[i].rss_query_enabled);
3727 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3729 struct ixgbe_hw *hw = &adapter->hw;
3730 struct net_device *netdev = adapter->netdev;
3731 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3732 struct ixgbe_ring *rx_ring;
3737 /* adjust max frame to be able to do baby jumbo for FCoE */
3738 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3739 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3740 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3742 #endif /* IXGBE_FCOE */
3744 /* adjust max frame to be at least the size of a standard frame */
3745 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3746 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3748 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3749 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3750 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3751 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3753 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3756 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3757 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3758 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3759 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3762 * Setup the HW Rx Head and Tail Descriptor Pointers and
3763 * the Base and Length of the Rx Descriptor Ring
3765 for (i = 0; i < adapter->num_rx_queues; i++) {
3766 rx_ring = adapter->rx_ring[i];
3767 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3768 set_ring_rsc_enabled(rx_ring);
3770 clear_ring_rsc_enabled(rx_ring);
3774 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3776 struct ixgbe_hw *hw = &adapter->hw;
3777 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3779 switch (hw->mac.type) {
3780 case ixgbe_mac_X550:
3781 case ixgbe_mac_X550EM_x:
3782 case ixgbe_mac_82598EB:
3784 * For VMDq support of different descriptor types or
3785 * buffer sizes through the use of multiple SRRCTL
3786 * registers, RDRXCTL.MVMEN must be set to 1
3788 * also, the manual doesn't mention it clearly but DCA hints
3789 * will only use queue 0's tags unless this bit is set. Side
3790 * effects of setting this bit are only that SRRCTL must be
3791 * fully programmed [0..15]
3793 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3795 case ixgbe_mac_82599EB:
3796 case ixgbe_mac_X540:
3797 /* Disable RSC for ACK packets */
3798 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3799 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3800 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3801 /* hardware requires some bits to be set by default */
3802 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3803 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3806 /* We should do nothing since we don't know this hardware */
3810 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3814 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3815 * @adapter: board private structure
3817 * Configure the Rx unit of the MAC after a reset.
3819 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3821 struct ixgbe_hw *hw = &adapter->hw;
3825 /* disable receives while setting up the descriptors */
3826 hw->mac.ops.disable_rx(hw);
3828 ixgbe_setup_psrtype(adapter);
3829 ixgbe_setup_rdrxctl(adapter);
3832 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3833 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3834 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3835 rfctl |= IXGBE_RFCTL_RSC_DIS;
3836 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3838 /* Program registers for the distribution of queues */
3839 ixgbe_setup_mrqc(adapter);
3841 /* set_rx_buffer_len must be called before ring initialization */
3842 ixgbe_set_rx_buffer_len(adapter);
3845 * Setup the HW Rx Head and Tail Descriptor Pointers and
3846 * the Base and Length of the Rx Descriptor Ring
3848 for (i = 0; i < adapter->num_rx_queues; i++)
3849 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3851 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3852 /* disable drop enable for 82598 parts */
3853 if (hw->mac.type == ixgbe_mac_82598EB)
3854 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3856 /* enable all receives */
3857 rxctrl |= IXGBE_RXCTRL_RXEN;
3858 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3861 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3862 __be16 proto, u16 vid)
3864 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3865 struct ixgbe_hw *hw = &adapter->hw;
3867 /* add VID to filter table */
3868 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3869 set_bit(vid, adapter->active_vlans);
3874 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3875 __be16 proto, u16 vid)
3877 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3878 struct ixgbe_hw *hw = &adapter->hw;
3880 /* remove VID from filter table */
3881 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3882 clear_bit(vid, adapter->active_vlans);
3888 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3889 * @adapter: driver data
3891 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3893 struct ixgbe_hw *hw = &adapter->hw;
3897 switch (hw->mac.type) {
3898 case ixgbe_mac_82598EB:
3899 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3900 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3901 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3903 case ixgbe_mac_82599EB:
3904 case ixgbe_mac_X540:
3905 case ixgbe_mac_X550:
3906 case ixgbe_mac_X550EM_x:
3907 for (i = 0; i < adapter->num_rx_queues; i++) {
3908 struct ixgbe_ring *ring = adapter->rx_ring[i];
3910 if (ring->l2_accel_priv)
3913 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3914 vlnctrl &= ~IXGBE_RXDCTL_VME;
3915 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3924 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3925 * @adapter: driver data
3927 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3929 struct ixgbe_hw *hw = &adapter->hw;
3933 switch (hw->mac.type) {
3934 case ixgbe_mac_82598EB:
3935 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3936 vlnctrl |= IXGBE_VLNCTRL_VME;
3937 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3939 case ixgbe_mac_82599EB:
3940 case ixgbe_mac_X540:
3941 case ixgbe_mac_X550:
3942 case ixgbe_mac_X550EM_x:
3943 for (i = 0; i < adapter->num_rx_queues; i++) {
3944 struct ixgbe_ring *ring = adapter->rx_ring[i];
3946 if (ring->l2_accel_priv)
3949 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3950 vlnctrl |= IXGBE_RXDCTL_VME;
3951 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3959 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3963 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3965 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3966 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3970 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3971 * @netdev: network interface device structure
3973 * Writes multicast address list to the MTA hash table.
3974 * Returns: -ENOMEM on failure
3975 * 0 on no addresses written
3976 * X on writing X addresses to MTA
3978 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3980 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3981 struct ixgbe_hw *hw = &adapter->hw;
3983 if (!netif_running(netdev))
3986 if (hw->mac.ops.update_mc_addr_list)
3987 hw->mac.ops.update_mc_addr_list(hw, netdev);
3991 #ifdef CONFIG_PCI_IOV
3992 ixgbe_restore_vf_multicasts(adapter);
3995 return netdev_mc_count(netdev);
3998 #ifdef CONFIG_PCI_IOV
3999 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4001 struct ixgbe_hw *hw = &adapter->hw;
4003 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4004 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4005 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4006 adapter->mac_table[i].queue,
4009 hw->mac.ops.clear_rar(hw, i);
4011 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4016 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4018 struct ixgbe_hw *hw = &adapter->hw;
4020 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4021 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4022 if (adapter->mac_table[i].state &
4023 IXGBE_MAC_STATE_IN_USE)
4024 hw->mac.ops.set_rar(hw, i,
4025 adapter->mac_table[i].addr,
4026 adapter->mac_table[i].queue,
4029 hw->mac.ops.clear_rar(hw, i);
4031 adapter->mac_table[i].state &=
4032 ~(IXGBE_MAC_STATE_MODIFIED);
4037 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4040 struct ixgbe_hw *hw = &adapter->hw;
4042 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4043 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4044 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4045 eth_zero_addr(adapter->mac_table[i].addr);
4046 adapter->mac_table[i].queue = 0;
4048 ixgbe_sync_mac_table(adapter);
4051 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4053 struct ixgbe_hw *hw = &adapter->hw;
4056 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4057 if (adapter->mac_table[i].state == 0)
4063 /* this function destroys the first RAR entry */
4064 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4067 struct ixgbe_hw *hw = &adapter->hw;
4069 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4070 adapter->mac_table[0].queue = VMDQ_P(0);
4071 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4072 IXGBE_MAC_STATE_IN_USE);
4073 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4074 adapter->mac_table[0].queue,
4078 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4080 struct ixgbe_hw *hw = &adapter->hw;
4083 if (is_zero_ether_addr(addr))
4086 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4087 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4089 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4090 IXGBE_MAC_STATE_IN_USE);
4091 ether_addr_copy(adapter->mac_table[i].addr, addr);
4092 adapter->mac_table[i].queue = queue;
4093 ixgbe_sync_mac_table(adapter);
4099 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4101 /* search table for addr, if found, set to 0 and sync */
4103 struct ixgbe_hw *hw = &adapter->hw;
4105 if (is_zero_ether_addr(addr))
4108 for (i = 0; i < hw->mac.num_rar_entries; i++) {
4109 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4110 adapter->mac_table[i].queue == queue) {
4111 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4112 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4113 eth_zero_addr(adapter->mac_table[i].addr);
4114 adapter->mac_table[i].queue = 0;
4115 ixgbe_sync_mac_table(adapter);
4122 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4123 * @netdev: network interface device structure
4125 * Writes unicast address list to the RAR table.
4126 * Returns: -ENOMEM on failure/insufficient address space
4127 * 0 on no addresses written
4128 * X on writing X addresses to the RAR table
4130 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4132 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4135 /* return ENOMEM indicating insufficient memory for addresses */
4136 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4139 if (!netdev_uc_empty(netdev)) {
4140 struct netdev_hw_addr *ha;
4141 netdev_for_each_uc_addr(ha, netdev) {
4142 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4143 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4151 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4152 * @netdev: network interface device structure
4154 * The set_rx_method entry point is called whenever the unicast/multicast
4155 * address list or the network interface flags are updated. This routine is
4156 * responsible for configuring the hardware for proper unicast, multicast and
4159 void ixgbe_set_rx_mode(struct net_device *netdev)
4161 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4162 struct ixgbe_hw *hw = &adapter->hw;
4163 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4167 /* Check for Promiscuous and All Multicast modes */
4168 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4169 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4171 /* set all bits that we expect to always be set */
4172 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4173 fctrl |= IXGBE_FCTRL_BAM;
4174 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4175 fctrl |= IXGBE_FCTRL_PMCF;
4177 /* clear the bits we are changing the status of */
4178 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4179 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4180 if (netdev->flags & IFF_PROMISC) {
4181 hw->addr_ctrl.user_set_promisc = true;
4182 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4183 vmolr |= IXGBE_VMOLR_MPE;
4184 /* Only disable hardware filter vlans in promiscuous mode
4185 * if SR-IOV and VMDQ are disabled - otherwise ensure
4186 * that hardware VLAN filters remain enabled.
4188 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4189 IXGBE_FLAG_SRIOV_ENABLED))
4190 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4192 if (netdev->flags & IFF_ALLMULTI) {
4193 fctrl |= IXGBE_FCTRL_MPE;
4194 vmolr |= IXGBE_VMOLR_MPE;
4196 vlnctrl |= IXGBE_VLNCTRL_VFE;
4197 hw->addr_ctrl.user_set_promisc = false;
4201 * Write addresses to available RAR registers, if there is not
4202 * sufficient space to store all the addresses then enable
4203 * unicast promiscuous mode
4205 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4207 fctrl |= IXGBE_FCTRL_UPE;
4208 vmolr |= IXGBE_VMOLR_ROPE;
4211 /* Write addresses to the MTA, if the attempt fails
4212 * then we should just turn on promiscuous mode so
4213 * that we can at least receive multicast traffic
4215 count = ixgbe_write_mc_addr_list(netdev);
4217 fctrl |= IXGBE_FCTRL_MPE;
4218 vmolr |= IXGBE_VMOLR_MPE;
4220 vmolr |= IXGBE_VMOLR_ROMPE;
4223 if (hw->mac.type != ixgbe_mac_82598EB) {
4224 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4225 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4227 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4230 /* This is useful for sniffing bad packets. */
4231 if (adapter->netdev->features & NETIF_F_RXALL) {
4232 /* UPE and MPE will be handled by normal PROMISC logic
4233 * in e1000e_set_rx_mode */
4234 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4235 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4236 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4238 fctrl &= ~(IXGBE_FCTRL_DPF);
4239 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4242 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4243 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4245 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4246 ixgbe_vlan_strip_enable(adapter);
4248 ixgbe_vlan_strip_disable(adapter);
4251 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4255 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4256 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4257 napi_enable(&adapter->q_vector[q_idx]->napi);
4261 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4265 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4266 napi_disable(&adapter->q_vector[q_idx]->napi);
4267 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4268 pr_info("QV %d locked\n", q_idx);
4269 usleep_range(1000, 20000);
4274 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4276 switch (adapter->hw.mac.type) {
4277 case ixgbe_mac_X550:
4278 case ixgbe_mac_X550EM_x:
4279 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4280 #ifdef CONFIG_IXGBE_VXLAN
4281 adapter->vxlan_port = 0;
4289 #ifdef CONFIG_IXGBE_DCB
4291 * ixgbe_configure_dcb - Configure DCB hardware
4292 * @adapter: ixgbe adapter struct
4294 * This is called by the driver on open to configure the DCB hardware.
4295 * This is also called by the gennetlink interface when reconfiguring
4298 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4300 struct ixgbe_hw *hw = &adapter->hw;
4301 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4303 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4304 if (hw->mac.type == ixgbe_mac_82598EB)
4305 netif_set_gso_max_size(adapter->netdev, 65536);
4309 if (hw->mac.type == ixgbe_mac_82598EB)
4310 netif_set_gso_max_size(adapter->netdev, 32768);
4313 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4314 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4317 /* reconfigure the hardware */
4318 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4319 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4321 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4323 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4324 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4325 ixgbe_dcb_hw_ets(&adapter->hw,
4326 adapter->ixgbe_ieee_ets,
4328 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4329 adapter->ixgbe_ieee_pfc->pfc_en,
4330 adapter->ixgbe_ieee_ets->prio_tc);
4333 /* Enable RSS Hash per TC */
4334 if (hw->mac.type != ixgbe_mac_82598EB) {
4336 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4343 /* write msb to all 8 TCs in one write */
4344 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4349 /* Additional bittime to account for IXGBE framing */
4350 #define IXGBE_ETH_FRAMING 20
4353 * ixgbe_hpbthresh - calculate high water mark for flow control
4355 * @adapter: board private structure to calculate for
4356 * @pb: packet buffer to calculate
4358 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4360 struct ixgbe_hw *hw = &adapter->hw;
4361 struct net_device *dev = adapter->netdev;
4362 int link, tc, kb, marker;
4365 /* Calculate max LAN frame size */
4366 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4369 /* FCoE traffic class uses FCOE jumbo frames */
4370 if ((dev->features & NETIF_F_FCOE_MTU) &&
4371 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4372 (pb == ixgbe_fcoe_get_tc(adapter)))
4373 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4376 /* Calculate delay value for device */
4377 switch (hw->mac.type) {
4378 case ixgbe_mac_X540:
4379 case ixgbe_mac_X550:
4380 case ixgbe_mac_X550EM_x:
4381 dv_id = IXGBE_DV_X540(link, tc);
4384 dv_id = IXGBE_DV(link, tc);
4388 /* Loopback switch introduces additional latency */
4389 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4390 dv_id += IXGBE_B2BT(tc);
4392 /* Delay value is calculated in bit times convert to KB */
4393 kb = IXGBE_BT2KB(dv_id);
4394 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4396 marker = rx_pba - kb;
4398 /* It is possible that the packet buffer is not large enough
4399 * to provide required headroom. In this case throw an error
4400 * to user and a do the best we can.
4403 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4404 "headroom to support flow control."
4405 "Decrease MTU or number of traffic classes\n", pb);
4413 * ixgbe_lpbthresh - calculate low water mark for for flow control
4415 * @adapter: board private structure to calculate for
4416 * @pb: packet buffer to calculate
4418 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4420 struct ixgbe_hw *hw = &adapter->hw;
4421 struct net_device *dev = adapter->netdev;
4425 /* Calculate max LAN frame size */
4426 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4429 /* FCoE traffic class uses FCOE jumbo frames */
4430 if ((dev->features & NETIF_F_FCOE_MTU) &&
4431 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4432 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4433 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4436 /* Calculate delay value for device */
4437 switch (hw->mac.type) {
4438 case ixgbe_mac_X540:
4439 case ixgbe_mac_X550:
4440 case ixgbe_mac_X550EM_x:
4441 dv_id = IXGBE_LOW_DV_X540(tc);
4444 dv_id = IXGBE_LOW_DV(tc);
4448 /* Delay value is calculated in bit times convert to KB */
4449 return IXGBE_BT2KB(dv_id);
4453 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4455 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4457 struct ixgbe_hw *hw = &adapter->hw;
4458 int num_tc = netdev_get_num_tc(adapter->netdev);
4464 for (i = 0; i < num_tc; i++) {
4465 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4466 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4468 /* Low water marks must not be larger than high water marks */
4469 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4470 hw->fc.low_water[i] = 0;
4473 for (; i < MAX_TRAFFIC_CLASS; i++)
4474 hw->fc.high_water[i] = 0;
4477 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4479 struct ixgbe_hw *hw = &adapter->hw;
4481 u8 tc = netdev_get_num_tc(adapter->netdev);
4483 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4484 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4485 hdrm = 32 << adapter->fdir_pballoc;
4489 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4490 ixgbe_pbthresh_setup(adapter);
4493 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4495 struct ixgbe_hw *hw = &adapter->hw;
4496 struct hlist_node *node2;
4497 struct ixgbe_fdir_filter *filter;
4499 spin_lock(&adapter->fdir_perfect_lock);
4501 if (!hlist_empty(&adapter->fdir_filter_list))
4502 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4504 hlist_for_each_entry_safe(filter, node2,
4505 &adapter->fdir_filter_list, fdir_node) {
4506 ixgbe_fdir_write_perfect_filter_82599(hw,
4509 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4510 IXGBE_FDIR_DROP_QUEUE :
4511 adapter->rx_ring[filter->action]->reg_idx);
4514 spin_unlock(&adapter->fdir_perfect_lock);
4517 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4518 struct ixgbe_adapter *adapter)
4520 struct ixgbe_hw *hw = &adapter->hw;
4523 /* No unicast promiscuous support for VMDQ devices. */
4524 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4525 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4527 /* clear the affected bit */
4528 vmolr &= ~IXGBE_VMOLR_MPE;
4530 if (dev->flags & IFF_ALLMULTI) {
4531 vmolr |= IXGBE_VMOLR_MPE;
4533 vmolr |= IXGBE_VMOLR_ROMPE;
4534 hw->mac.ops.update_mc_addr_list(hw, dev);
4536 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4537 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4540 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4542 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4543 int rss_i = adapter->num_rx_queues_per_pool;
4544 struct ixgbe_hw *hw = &adapter->hw;
4545 u16 pool = vadapter->pool;
4546 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4547 IXGBE_PSRTYPE_UDPHDR |
4548 IXGBE_PSRTYPE_IPV4HDR |
4549 IXGBE_PSRTYPE_L2HDR |
4550 IXGBE_PSRTYPE_IPV6HDR;
4552 if (hw->mac.type == ixgbe_mac_82598EB)
4560 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4564 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4565 * @rx_ring: ring to free buffers from
4567 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4569 struct device *dev = rx_ring->dev;
4573 /* ring already cleared, nothing to do */
4574 if (!rx_ring->rx_buffer_info)
4577 /* Free all the Rx ring sk_buffs */
4578 for (i = 0; i < rx_ring->count; i++) {
4579 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4581 if (rx_buffer->skb) {
4582 struct sk_buff *skb = rx_buffer->skb;
4583 if (IXGBE_CB(skb)->page_released)
4586 ixgbe_rx_bufsz(rx_ring),
4589 rx_buffer->skb = NULL;
4592 if (!rx_buffer->page)
4595 dma_unmap_page(dev, rx_buffer->dma,
4596 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4597 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4599 rx_buffer->page = NULL;
4602 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4603 memset(rx_ring->rx_buffer_info, 0, size);
4605 /* Zero out the descriptor ring */
4606 memset(rx_ring->desc, 0, rx_ring->size);
4608 rx_ring->next_to_alloc = 0;
4609 rx_ring->next_to_clean = 0;
4610 rx_ring->next_to_use = 0;
4613 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4614 struct ixgbe_ring *rx_ring)
4616 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4617 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4619 /* shutdown specific queue receive and wait for dma to settle */
4620 ixgbe_disable_rx_queue(adapter, rx_ring);
4621 usleep_range(10000, 20000);
4622 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4623 ixgbe_clean_rx_ring(rx_ring);
4624 rx_ring->l2_accel_priv = NULL;
4627 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4628 struct ixgbe_fwd_adapter *accel)
4630 struct ixgbe_adapter *adapter = accel->real_adapter;
4631 unsigned int rxbase = accel->rx_base_queue;
4632 unsigned int txbase = accel->tx_base_queue;
4635 netif_tx_stop_all_queues(vdev);
4637 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4638 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4639 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4642 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4643 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4644 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4651 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4652 struct ixgbe_fwd_adapter *accel)
4654 struct ixgbe_adapter *adapter = accel->real_adapter;
4655 unsigned int rxbase, txbase, queues;
4656 int i, baseq, err = 0;
4658 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4661 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4662 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4663 accel->pool, adapter->num_rx_pools,
4664 baseq, baseq + adapter->num_rx_queues_per_pool,
4665 adapter->fwd_bitmask);
4667 accel->netdev = vdev;
4668 accel->rx_base_queue = rxbase = baseq;
4669 accel->tx_base_queue = txbase = baseq;
4671 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4672 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4674 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4675 adapter->rx_ring[rxbase + i]->netdev = vdev;
4676 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4677 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4680 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4681 adapter->tx_ring[txbase + i]->netdev = vdev;
4682 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4685 queues = min_t(unsigned int,
4686 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4687 err = netif_set_real_num_tx_queues(vdev, queues);
4691 err = netif_set_real_num_rx_queues(vdev, queues);
4695 if (is_valid_ether_addr(vdev->dev_addr))
4696 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4698 ixgbe_fwd_psrtype(accel);
4699 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4702 ixgbe_fwd_ring_down(vdev, accel);
4706 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4708 struct net_device *upper;
4709 struct list_head *iter;
4712 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4713 if (netif_is_macvlan(upper)) {
4714 struct macvlan_dev *dfwd = netdev_priv(upper);
4715 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4717 if (dfwd->fwd_priv) {
4718 err = ixgbe_fwd_ring_up(upper, vadapter);
4726 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4728 struct ixgbe_hw *hw = &adapter->hw;
4730 ixgbe_configure_pb(adapter);
4731 #ifdef CONFIG_IXGBE_DCB
4732 ixgbe_configure_dcb(adapter);
4735 * We must restore virtualization before VLANs or else
4736 * the VLVF registers will not be populated
4738 ixgbe_configure_virtualization(adapter);
4740 ixgbe_set_rx_mode(adapter->netdev);
4741 ixgbe_restore_vlan(adapter);
4743 switch (hw->mac.type) {
4744 case ixgbe_mac_82599EB:
4745 case ixgbe_mac_X540:
4746 hw->mac.ops.disable_rx_buff(hw);
4752 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4753 ixgbe_init_fdir_signature_82599(&adapter->hw,
4754 adapter->fdir_pballoc);
4755 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4756 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4757 adapter->fdir_pballoc);
4758 ixgbe_fdir_filter_restore(adapter);
4761 switch (hw->mac.type) {
4762 case ixgbe_mac_82599EB:
4763 case ixgbe_mac_X540:
4764 hw->mac.ops.enable_rx_buff(hw);
4771 /* configure FCoE L2 filters, redirection table, and Rx control */
4772 ixgbe_configure_fcoe(adapter);
4774 #endif /* IXGBE_FCOE */
4775 ixgbe_configure_tx(adapter);
4776 ixgbe_configure_rx(adapter);
4777 ixgbe_configure_dfwd(adapter);
4781 * ixgbe_sfp_link_config - set up SFP+ link
4782 * @adapter: pointer to private adapter struct
4784 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4787 * We are assuming the worst case scenario here, and that
4788 * is that an SFP was inserted/removed after the reset
4789 * but before SFP detection was enabled. As such the best
4790 * solution is to just start searching as soon as we start
4792 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4793 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4795 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4799 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4800 * @hw: pointer to private hardware struct
4802 * Returns 0 on success, negative on failure
4804 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4807 bool autoneg, link_up = false;
4808 int ret = IXGBE_ERR_LINK_SETUP;
4810 if (hw->mac.ops.check_link)
4811 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4816 speed = hw->phy.autoneg_advertised;
4817 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4818 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4823 if (hw->mac.ops.setup_link)
4824 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4829 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4831 struct ixgbe_hw *hw = &adapter->hw;
4834 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4835 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4837 gpie |= IXGBE_GPIE_EIAME;
4839 * use EIAM to auto-mask when MSI-X interrupt is asserted
4840 * this saves a register write for every interrupt
4842 switch (hw->mac.type) {
4843 case ixgbe_mac_82598EB:
4844 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4846 case ixgbe_mac_82599EB:
4847 case ixgbe_mac_X540:
4848 case ixgbe_mac_X550:
4849 case ixgbe_mac_X550EM_x:
4851 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4852 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4856 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4857 * specifically only auto mask tx and rx interrupts */
4858 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4861 /* XXX: to interrupt immediately for EICS writes, enable this */
4862 /* gpie |= IXGBE_GPIE_EIMEN; */
4864 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4865 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4867 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4868 case IXGBE_82599_VMDQ_8Q_MASK:
4869 gpie |= IXGBE_GPIE_VTMODE_16;
4871 case IXGBE_82599_VMDQ_4Q_MASK:
4872 gpie |= IXGBE_GPIE_VTMODE_32;
4875 gpie |= IXGBE_GPIE_VTMODE_64;
4880 /* Enable Thermal over heat sensor interrupt */
4881 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4882 switch (adapter->hw.mac.type) {
4883 case ixgbe_mac_82599EB:
4884 gpie |= IXGBE_SDP0_GPIEN_8259X;
4886 case ixgbe_mac_X540:
4887 gpie |= IXGBE_EIMS_TS;
4894 /* Enable fan failure interrupt */
4895 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4896 gpie |= IXGBE_SDP1_GPIEN(hw);
4898 if (hw->mac.type == ixgbe_mac_82599EB) {
4899 gpie |= IXGBE_SDP1_GPIEN_8259X;
4900 gpie |= IXGBE_SDP2_GPIEN_8259X;
4903 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4906 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4908 struct ixgbe_hw *hw = &adapter->hw;
4912 ixgbe_get_hw_control(adapter);
4913 ixgbe_setup_gpie(adapter);
4915 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4916 ixgbe_configure_msix(adapter);
4918 ixgbe_configure_msi_and_legacy(adapter);
4920 /* enable the optics for 82599 SFP+ fiber */
4921 if (hw->mac.ops.enable_tx_laser)
4922 hw->mac.ops.enable_tx_laser(hw);
4924 if (hw->phy.ops.set_phy_power)
4925 hw->phy.ops.set_phy_power(hw, true);
4927 smp_mb__before_atomic();
4928 clear_bit(__IXGBE_DOWN, &adapter->state);
4929 ixgbe_napi_enable_all(adapter);
4931 if (ixgbe_is_sfp(hw)) {
4932 ixgbe_sfp_link_config(adapter);
4934 err = ixgbe_non_sfp_link_config(hw);
4936 e_err(probe, "link_config FAILED %d\n", err);
4939 /* clear any pending interrupts, may auto mask */
4940 IXGBE_READ_REG(hw, IXGBE_EICR);
4941 ixgbe_irq_enable(adapter, true, true);
4944 * If this adapter has a fan, check to see if we had a failure
4945 * before we enabled the interrupt.
4947 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4948 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4949 if (esdp & IXGBE_ESDP_SDP1)
4950 e_crit(drv, "Fan has stopped, replace the adapter\n");
4953 /* bring the link up in the watchdog, this could race with our first
4954 * link up interrupt but shouldn't be a problem */
4955 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4956 adapter->link_check_timeout = jiffies;
4957 mod_timer(&adapter->service_timer, jiffies);
4959 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4960 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4961 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4962 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4965 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4967 WARN_ON(in_interrupt());
4968 /* put off any impending NetWatchDogTimeout */
4969 adapter->netdev->trans_start = jiffies;
4971 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4972 usleep_range(1000, 2000);
4973 ixgbe_down(adapter);
4975 * If SR-IOV enabled then wait a bit before bringing the adapter
4976 * back up to give the VFs time to respond to the reset. The
4977 * two second wait is based upon the watchdog timer cycle in
4980 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4983 clear_bit(__IXGBE_RESETTING, &adapter->state);
4986 void ixgbe_up(struct ixgbe_adapter *adapter)
4988 /* hardware has been reset, we need to reload some things */
4989 ixgbe_configure(adapter);
4991 ixgbe_up_complete(adapter);
4994 void ixgbe_reset(struct ixgbe_adapter *adapter)
4996 struct ixgbe_hw *hw = &adapter->hw;
4997 struct net_device *netdev = adapter->netdev;
4999 u8 old_addr[ETH_ALEN];
5001 if (ixgbe_removed(hw->hw_addr))
5003 /* lock SFP init bit to prevent race conditions with the watchdog */
5004 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5005 usleep_range(1000, 2000);
5007 /* clear all SFP and link config related flags while holding SFP_INIT */
5008 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5009 IXGBE_FLAG2_SFP_NEEDS_RESET);
5010 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5012 err = hw->mac.ops.init_hw(hw);
5015 case IXGBE_ERR_SFP_NOT_PRESENT:
5016 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5018 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5019 e_dev_err("master disable timed out\n");
5021 case IXGBE_ERR_EEPROM_VERSION:
5022 /* We are running on a pre-production device, log a warning */
5023 e_dev_warn("This device is a pre-production adapter/LOM. "
5024 "Please be aware there may be issues associated with "
5025 "your hardware. If you are experiencing problems "
5026 "please contact your Intel or hardware "
5027 "representative who provided you with this "
5031 e_dev_err("Hardware Error: %d\n", err);
5034 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5035 /* do not flush user set addresses */
5036 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5037 ixgbe_flush_sw_mac_table(adapter);
5038 ixgbe_mac_set_default_filter(adapter, old_addr);
5040 /* update SAN MAC vmdq pool selection */
5041 if (hw->mac.san_mac_rar_index)
5042 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5044 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5045 ixgbe_ptp_reset(adapter);
5047 if (hw->phy.ops.set_phy_power) {
5048 if (!netif_running(adapter->netdev) && !adapter->wol)
5049 hw->phy.ops.set_phy_power(hw, false);
5051 hw->phy.ops.set_phy_power(hw, true);
5056 * ixgbe_clean_tx_ring - Free Tx Buffers
5057 * @tx_ring: ring to be cleaned
5059 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5061 struct ixgbe_tx_buffer *tx_buffer_info;
5065 /* ring already cleared, nothing to do */
5066 if (!tx_ring->tx_buffer_info)
5069 /* Free all the Tx ring sk_buffs */
5070 for (i = 0; i < tx_ring->count; i++) {
5071 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5072 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5075 netdev_tx_reset_queue(txring_txq(tx_ring));
5077 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5078 memset(tx_ring->tx_buffer_info, 0, size);
5080 /* Zero out the descriptor ring */
5081 memset(tx_ring->desc, 0, tx_ring->size);
5083 tx_ring->next_to_use = 0;
5084 tx_ring->next_to_clean = 0;
5088 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5089 * @adapter: board private structure
5091 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5095 for (i = 0; i < adapter->num_rx_queues; i++)
5096 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5100 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5101 * @adapter: board private structure
5103 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5107 for (i = 0; i < adapter->num_tx_queues; i++)
5108 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5111 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5113 struct hlist_node *node2;
5114 struct ixgbe_fdir_filter *filter;
5116 spin_lock(&adapter->fdir_perfect_lock);
5118 hlist_for_each_entry_safe(filter, node2,
5119 &adapter->fdir_filter_list, fdir_node) {
5120 hlist_del(&filter->fdir_node);
5123 adapter->fdir_filter_count = 0;
5125 spin_unlock(&adapter->fdir_perfect_lock);
5128 void ixgbe_down(struct ixgbe_adapter *adapter)
5130 struct net_device *netdev = adapter->netdev;
5131 struct ixgbe_hw *hw = &adapter->hw;
5132 struct net_device *upper;
5133 struct list_head *iter;
5136 /* signal that we are down to the interrupt handler */
5137 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5138 return; /* do nothing if already down */
5140 /* disable receives */
5141 hw->mac.ops.disable_rx(hw);
5143 /* disable all enabled rx queues */
5144 for (i = 0; i < adapter->num_rx_queues; i++)
5145 /* this call also flushes the previous write */
5146 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5148 usleep_range(10000, 20000);
5150 netif_tx_stop_all_queues(netdev);
5152 /* call carrier off first to avoid false dev_watchdog timeouts */
5153 netif_carrier_off(netdev);
5154 netif_tx_disable(netdev);
5156 /* disable any upper devices */
5157 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5158 if (netif_is_macvlan(upper)) {
5159 struct macvlan_dev *vlan = netdev_priv(upper);
5161 if (vlan->fwd_priv) {
5162 netif_tx_stop_all_queues(upper);
5163 netif_carrier_off(upper);
5164 netif_tx_disable(upper);
5169 ixgbe_irq_disable(adapter);
5171 ixgbe_napi_disable_all(adapter);
5173 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5174 IXGBE_FLAG2_RESET_REQUESTED);
5175 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5177 del_timer_sync(&adapter->service_timer);
5179 if (adapter->num_vfs) {
5180 /* Clear EITR Select mapping */
5181 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5183 /* Mark all the VFs as inactive */
5184 for (i = 0 ; i < adapter->num_vfs; i++)
5185 adapter->vfinfo[i].clear_to_send = false;
5187 /* ping all the active vfs to let them know we are going down */
5188 ixgbe_ping_all_vfs(adapter);
5190 /* Disable all VFTE/VFRE TX/RX */
5191 ixgbe_disable_tx_rx(adapter);
5194 /* disable transmits in the hardware now that interrupts are off */
5195 for (i = 0; i < adapter->num_tx_queues; i++) {
5196 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5197 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5200 /* Disable the Tx DMA engine on 82599 and later MAC */
5201 switch (hw->mac.type) {
5202 case ixgbe_mac_82599EB:
5203 case ixgbe_mac_X540:
5204 case ixgbe_mac_X550:
5205 case ixgbe_mac_X550EM_x:
5206 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5207 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5208 ~IXGBE_DMATXCTL_TE));
5214 if (!pci_channel_offline(adapter->pdev))
5215 ixgbe_reset(adapter);
5217 /* power down the optics for 82599 SFP+ fiber */
5218 if (hw->mac.ops.disable_tx_laser)
5219 hw->mac.ops.disable_tx_laser(hw);
5221 ixgbe_clean_all_tx_rings(adapter);
5222 ixgbe_clean_all_rx_rings(adapter);
5224 #ifdef CONFIG_IXGBE_DCA
5225 /* since we reset the hardware DCA settings were cleared */
5226 ixgbe_setup_dca(adapter);
5231 * ixgbe_tx_timeout - Respond to a Tx Hang
5232 * @netdev: network interface device structure
5234 static void ixgbe_tx_timeout(struct net_device *netdev)
5236 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5238 /* Do the reset outside of interrupt context */
5239 ixgbe_tx_timeout_reset(adapter);
5243 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5244 * @adapter: board private structure to initialize
5246 * ixgbe_sw_init initializes the Adapter private data structure.
5247 * Fields are initialized based on PCI device information and
5248 * OS network device settings (MTU size).
5250 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5252 struct ixgbe_hw *hw = &adapter->hw;
5253 struct pci_dev *pdev = adapter->pdev;
5254 unsigned int rss, fdir;
5256 #ifdef CONFIG_IXGBE_DCB
5258 struct tc_configuration *tc;
5261 /* PCI config space info */
5263 hw->vendor_id = pdev->vendor;
5264 hw->device_id = pdev->device;
5265 hw->revision_id = pdev->revision;
5266 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5267 hw->subsystem_device_id = pdev->subsystem_device;
5269 /* Set common capability flags and settings */
5270 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5271 adapter->ring_feature[RING_F_RSS].limit = rss;
5272 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5273 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5274 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5275 adapter->atr_sample_rate = 20;
5276 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5277 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5278 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5279 #ifdef CONFIG_IXGBE_DCA
5280 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5283 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5284 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5285 #ifdef CONFIG_IXGBE_DCB
5286 /* Default traffic class to use for FCoE */
5287 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5288 #endif /* CONFIG_IXGBE_DCB */
5289 #endif /* IXGBE_FCOE */
5291 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5292 hw->mac.num_rar_entries,
5295 /* Set MAC specific capability flags and exceptions */
5296 switch (hw->mac.type) {
5297 case ixgbe_mac_82598EB:
5298 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5299 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5301 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5302 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5304 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5305 adapter->ring_feature[RING_F_FDIR].limit = 0;
5306 adapter->atr_sample_rate = 0;
5307 adapter->fdir_pballoc = 0;
5309 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5310 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5311 #ifdef CONFIG_IXGBE_DCB
5312 adapter->fcoe.up = 0;
5313 #endif /* IXGBE_DCB */
5314 #endif /* IXGBE_FCOE */
5316 case ixgbe_mac_82599EB:
5317 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5318 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5320 case ixgbe_mac_X540:
5321 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5322 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5323 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5325 case ixgbe_mac_X550EM_x:
5326 case ixgbe_mac_X550:
5327 #ifdef CONFIG_IXGBE_DCA
5328 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5330 #ifdef CONFIG_IXGBE_VXLAN
5331 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5339 /* FCoE support exists, always init the FCoE lock */
5340 spin_lock_init(&adapter->fcoe.lock);
5343 /* n-tuple support exists, always init our spinlock */
5344 spin_lock_init(&adapter->fdir_perfect_lock);
5346 #ifdef CONFIG_IXGBE_DCB
5347 switch (hw->mac.type) {
5348 case ixgbe_mac_X540:
5349 case ixgbe_mac_X550:
5350 case ixgbe_mac_X550EM_x:
5351 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5352 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5355 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5356 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5360 /* Configure DCB traffic classes */
5361 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5362 tc = &adapter->dcb_cfg.tc_config[j];
5363 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5364 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5365 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5366 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5367 tc->dcb_pfc = pfc_disabled;
5370 /* Initialize default user to priority mapping, UPx->TC0 */
5371 tc = &adapter->dcb_cfg.tc_config[0];
5372 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5373 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5375 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5376 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5377 adapter->dcb_cfg.pfc_mode_enable = false;
5378 adapter->dcb_set_bitmap = 0x00;
5379 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5380 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5381 sizeof(adapter->temp_dcb_cfg));
5385 /* default flow control settings */
5386 hw->fc.requested_mode = ixgbe_fc_full;
5387 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5388 ixgbe_pbthresh_setup(adapter);
5389 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5390 hw->fc.send_xon = true;
5391 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5393 #ifdef CONFIG_PCI_IOV
5395 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5397 /* assign number of SR-IOV VFs */
5398 if (hw->mac.type != ixgbe_mac_82598EB) {
5399 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5400 adapter->num_vfs = 0;
5401 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5403 adapter->num_vfs = max_vfs;
5406 #endif /* CONFIG_PCI_IOV */
5408 /* enable itr by default in dynamic mode */
5409 adapter->rx_itr_setting = 1;
5410 adapter->tx_itr_setting = 1;
5412 /* set default ring sizes */
5413 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5414 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5416 /* set default work limits */
5417 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5419 /* initialize eeprom parameters */
5420 if (ixgbe_init_eeprom_params_generic(hw)) {
5421 e_dev_err("EEPROM initialization failed\n");
5425 /* PF holds first pool slot */
5426 set_bit(0, &adapter->fwd_bitmask);
5427 set_bit(__IXGBE_DOWN, &adapter->state);
5433 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5434 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5436 * Return 0 on success, negative on failure
5438 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5440 struct device *dev = tx_ring->dev;
5441 int orig_node = dev_to_node(dev);
5445 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5447 if (tx_ring->q_vector)
5448 ring_node = tx_ring->q_vector->numa_node;
5450 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5451 if (!tx_ring->tx_buffer_info)
5452 tx_ring->tx_buffer_info = vzalloc(size);
5453 if (!tx_ring->tx_buffer_info)
5456 u64_stats_init(&tx_ring->syncp);
5458 /* round up to nearest 4K */
5459 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5460 tx_ring->size = ALIGN(tx_ring->size, 4096);
5462 set_dev_node(dev, ring_node);
5463 tx_ring->desc = dma_alloc_coherent(dev,
5467 set_dev_node(dev, orig_node);
5469 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5470 &tx_ring->dma, GFP_KERNEL);
5474 tx_ring->next_to_use = 0;
5475 tx_ring->next_to_clean = 0;
5479 vfree(tx_ring->tx_buffer_info);
5480 tx_ring->tx_buffer_info = NULL;
5481 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5486 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5487 * @adapter: board private structure
5489 * If this function returns with an error, then it's possible one or
5490 * more of the rings is populated (while the rest are not). It is the
5491 * callers duty to clean those orphaned rings.
5493 * Return 0 on success, negative on failure
5495 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5499 for (i = 0; i < adapter->num_tx_queues; i++) {
5500 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5504 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5510 /* rewind the index freeing the rings as we go */
5512 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5517 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5518 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5520 * Returns 0 on success, negative on failure
5522 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5524 struct device *dev = rx_ring->dev;
5525 int orig_node = dev_to_node(dev);
5529 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5531 if (rx_ring->q_vector)
5532 ring_node = rx_ring->q_vector->numa_node;
5534 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5535 if (!rx_ring->rx_buffer_info)
5536 rx_ring->rx_buffer_info = vzalloc(size);
5537 if (!rx_ring->rx_buffer_info)
5540 u64_stats_init(&rx_ring->syncp);
5542 /* Round up to nearest 4K */
5543 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5544 rx_ring->size = ALIGN(rx_ring->size, 4096);
5546 set_dev_node(dev, ring_node);
5547 rx_ring->desc = dma_alloc_coherent(dev,
5551 set_dev_node(dev, orig_node);
5553 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5554 &rx_ring->dma, GFP_KERNEL);
5558 rx_ring->next_to_clean = 0;
5559 rx_ring->next_to_use = 0;
5563 vfree(rx_ring->rx_buffer_info);
5564 rx_ring->rx_buffer_info = NULL;
5565 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5570 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5571 * @adapter: board private structure
5573 * If this function returns with an error, then it's possible one or
5574 * more of the rings is populated (while the rest are not). It is the
5575 * callers duty to clean those orphaned rings.
5577 * Return 0 on success, negative on failure
5579 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5583 for (i = 0; i < adapter->num_rx_queues; i++) {
5584 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5588 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5593 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5598 /* rewind the index freeing the rings as we go */
5600 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5605 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5606 * @tx_ring: Tx descriptor ring for a specific queue
5608 * Free all transmit software resources
5610 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5612 ixgbe_clean_tx_ring(tx_ring);
5614 vfree(tx_ring->tx_buffer_info);
5615 tx_ring->tx_buffer_info = NULL;
5617 /* if not set, then don't free */
5621 dma_free_coherent(tx_ring->dev, tx_ring->size,
5622 tx_ring->desc, tx_ring->dma);
5624 tx_ring->desc = NULL;
5628 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5629 * @adapter: board private structure
5631 * Free all transmit software resources
5633 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5637 for (i = 0; i < adapter->num_tx_queues; i++)
5638 if (adapter->tx_ring[i]->desc)
5639 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5643 * ixgbe_free_rx_resources - Free Rx Resources
5644 * @rx_ring: ring to clean the resources from
5646 * Free all receive software resources
5648 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5650 ixgbe_clean_rx_ring(rx_ring);
5652 vfree(rx_ring->rx_buffer_info);
5653 rx_ring->rx_buffer_info = NULL;
5655 /* if not set, then don't free */
5659 dma_free_coherent(rx_ring->dev, rx_ring->size,
5660 rx_ring->desc, rx_ring->dma);
5662 rx_ring->desc = NULL;
5666 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5667 * @adapter: board private structure
5669 * Free all receive software resources
5671 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5676 ixgbe_free_fcoe_ddp_resources(adapter);
5679 for (i = 0; i < adapter->num_rx_queues; i++)
5680 if (adapter->rx_ring[i]->desc)
5681 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5685 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5686 * @netdev: network interface device structure
5687 * @new_mtu: new value for maximum frame size
5689 * Returns 0 on success, negative on failure
5691 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5693 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5694 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5696 /* MTU < 68 is an error and causes problems on some kernels */
5697 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5701 * For 82599EB we cannot allow legacy VFs to enable their receive
5702 * paths when MTU greater than 1500 is configured. So display a
5703 * warning that legacy VFs will be disabled.
5705 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5706 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5707 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5708 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5710 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5712 /* must set new MTU before calling down or up */
5713 netdev->mtu = new_mtu;
5715 if (netif_running(netdev))
5716 ixgbe_reinit_locked(adapter);
5722 * ixgbe_open - Called when a network interface is made active
5723 * @netdev: network interface device structure
5725 * Returns 0 on success, negative value on failure
5727 * The open entry point is called when a network interface is made
5728 * active by the system (IFF_UP). At this point all resources needed
5729 * for transmit and receive operations are allocated, the interrupt
5730 * handler is registered with the OS, the watchdog timer is started,
5731 * and the stack is notified that the interface is ready.
5733 static int ixgbe_open(struct net_device *netdev)
5735 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5736 struct ixgbe_hw *hw = &adapter->hw;
5739 /* disallow open during test */
5740 if (test_bit(__IXGBE_TESTING, &adapter->state))
5743 netif_carrier_off(netdev);
5745 /* allocate transmit descriptors */
5746 err = ixgbe_setup_all_tx_resources(adapter);
5750 /* allocate receive descriptors */
5751 err = ixgbe_setup_all_rx_resources(adapter);
5755 ixgbe_configure(adapter);
5757 err = ixgbe_request_irq(adapter);
5761 /* Notify the stack of the actual queue counts. */
5762 if (adapter->num_rx_pools > 1)
5763 queues = adapter->num_rx_queues_per_pool;
5765 queues = adapter->num_tx_queues;
5767 err = netif_set_real_num_tx_queues(netdev, queues);
5769 goto err_set_queues;
5771 if (adapter->num_rx_pools > 1 &&
5772 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5773 queues = IXGBE_MAX_L2A_QUEUES;
5775 queues = adapter->num_rx_queues;
5776 err = netif_set_real_num_rx_queues(netdev, queues);
5778 goto err_set_queues;
5780 ixgbe_ptp_init(adapter);
5782 ixgbe_up_complete(adapter);
5784 ixgbe_clear_vxlan_port(adapter);
5785 #ifdef CONFIG_IXGBE_VXLAN
5786 vxlan_get_rx_port(netdev);
5792 ixgbe_free_irq(adapter);
5794 ixgbe_free_all_rx_resources(adapter);
5795 if (hw->phy.ops.set_phy_power && !adapter->wol)
5796 hw->phy.ops.set_phy_power(&adapter->hw, false);
5798 ixgbe_free_all_tx_resources(adapter);
5800 ixgbe_reset(adapter);
5805 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5807 ixgbe_ptp_suspend(adapter);
5809 if (adapter->hw.phy.ops.enter_lplu) {
5810 adapter->hw.phy.reset_disable = true;
5811 ixgbe_down(adapter);
5812 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5813 adapter->hw.phy.reset_disable = false;
5815 ixgbe_down(adapter);
5818 ixgbe_free_irq(adapter);
5820 ixgbe_free_all_tx_resources(adapter);
5821 ixgbe_free_all_rx_resources(adapter);
5825 * ixgbe_close - Disables a network interface
5826 * @netdev: network interface device structure
5828 * Returns 0, this is not allowed to fail
5830 * The close entry point is called when an interface is de-activated
5831 * by the OS. The hardware is still under the drivers control, but
5832 * needs to be disabled. A global MAC reset is issued to stop the
5833 * hardware, and all transmit and receive resources are freed.
5835 static int ixgbe_close(struct net_device *netdev)
5837 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5839 ixgbe_ptp_stop(adapter);
5841 ixgbe_close_suspend(adapter);
5843 ixgbe_fdir_filter_exit(adapter);
5845 ixgbe_release_hw_control(adapter);
5851 static int ixgbe_resume(struct pci_dev *pdev)
5853 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5854 struct net_device *netdev = adapter->netdev;
5857 adapter->hw.hw_addr = adapter->io_addr;
5858 pci_set_power_state(pdev, PCI_D0);
5859 pci_restore_state(pdev);
5861 * pci_restore_state clears dev->state_saved so call
5862 * pci_save_state to restore it.
5864 pci_save_state(pdev);
5866 err = pci_enable_device_mem(pdev);
5868 e_dev_err("Cannot enable PCI device from suspend\n");
5871 smp_mb__before_atomic();
5872 clear_bit(__IXGBE_DISABLED, &adapter->state);
5873 pci_set_master(pdev);
5875 pci_wake_from_d3(pdev, false);
5877 ixgbe_reset(adapter);
5879 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5882 err = ixgbe_init_interrupt_scheme(adapter);
5883 if (!err && netif_running(netdev))
5884 err = ixgbe_open(netdev);
5891 netif_device_attach(netdev);
5895 #endif /* CONFIG_PM */
5897 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5899 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5900 struct net_device *netdev = adapter->netdev;
5901 struct ixgbe_hw *hw = &adapter->hw;
5903 u32 wufc = adapter->wol;
5908 netif_device_detach(netdev);
5911 if (netif_running(netdev))
5912 ixgbe_close_suspend(adapter);
5915 ixgbe_clear_interrupt_scheme(adapter);
5918 retval = pci_save_state(pdev);
5923 if (hw->mac.ops.stop_link_on_d3)
5924 hw->mac.ops.stop_link_on_d3(hw);
5927 ixgbe_set_rx_mode(netdev);
5929 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5930 if (hw->mac.ops.enable_tx_laser)
5931 hw->mac.ops.enable_tx_laser(hw);
5933 /* turn on all-multi mode if wake on multicast is enabled */
5934 if (wufc & IXGBE_WUFC_MC) {
5935 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5936 fctrl |= IXGBE_FCTRL_MPE;
5937 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5940 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5941 ctrl |= IXGBE_CTRL_GIO_DIS;
5942 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5944 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5946 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5947 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5950 switch (hw->mac.type) {
5951 case ixgbe_mac_82598EB:
5952 pci_wake_from_d3(pdev, false);
5954 case ixgbe_mac_82599EB:
5955 case ixgbe_mac_X540:
5956 case ixgbe_mac_X550:
5957 case ixgbe_mac_X550EM_x:
5958 pci_wake_from_d3(pdev, !!wufc);
5964 *enable_wake = !!wufc;
5965 if (hw->phy.ops.set_phy_power && !*enable_wake)
5966 hw->phy.ops.set_phy_power(hw, false);
5968 ixgbe_release_hw_control(adapter);
5970 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5971 pci_disable_device(pdev);
5977 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5982 retval = __ixgbe_shutdown(pdev, &wake);
5987 pci_prepare_to_sleep(pdev);
5989 pci_wake_from_d3(pdev, false);
5990 pci_set_power_state(pdev, PCI_D3hot);
5995 #endif /* CONFIG_PM */
5997 static void ixgbe_shutdown(struct pci_dev *pdev)
6001 __ixgbe_shutdown(pdev, &wake);
6003 if (system_state == SYSTEM_POWER_OFF) {
6004 pci_wake_from_d3(pdev, wake);
6005 pci_set_power_state(pdev, PCI_D3hot);
6010 * ixgbe_update_stats - Update the board statistics counters.
6011 * @adapter: board private structure
6013 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6015 struct net_device *netdev = adapter->netdev;
6016 struct ixgbe_hw *hw = &adapter->hw;
6017 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6019 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6020 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6021 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6022 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6024 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6025 test_bit(__IXGBE_RESETTING, &adapter->state))
6028 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6031 for (i = 0; i < adapter->num_rx_queues; i++) {
6032 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6033 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6035 adapter->rsc_total_count = rsc_count;
6036 adapter->rsc_total_flush = rsc_flush;
6039 for (i = 0; i < adapter->num_rx_queues; i++) {
6040 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6041 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6042 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6043 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6044 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6045 bytes += rx_ring->stats.bytes;
6046 packets += rx_ring->stats.packets;
6048 adapter->non_eop_descs = non_eop_descs;
6049 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6050 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6051 adapter->hw_csum_rx_error = hw_csum_rx_error;
6052 netdev->stats.rx_bytes = bytes;
6053 netdev->stats.rx_packets = packets;
6057 /* gather some stats to the adapter struct that are per queue */
6058 for (i = 0; i < adapter->num_tx_queues; i++) {
6059 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6060 restart_queue += tx_ring->tx_stats.restart_queue;
6061 tx_busy += tx_ring->tx_stats.tx_busy;
6062 bytes += tx_ring->stats.bytes;
6063 packets += tx_ring->stats.packets;
6065 adapter->restart_queue = restart_queue;
6066 adapter->tx_busy = tx_busy;
6067 netdev->stats.tx_bytes = bytes;
6068 netdev->stats.tx_packets = packets;
6070 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6072 /* 8 register reads */
6073 for (i = 0; i < 8; i++) {
6074 /* for packet buffers not used, the register should read 0 */
6075 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6077 hwstats->mpc[i] += mpc;
6078 total_mpc += hwstats->mpc[i];
6079 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6080 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6081 switch (hw->mac.type) {
6082 case ixgbe_mac_82598EB:
6083 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6084 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6085 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6086 hwstats->pxonrxc[i] +=
6087 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6089 case ixgbe_mac_82599EB:
6090 case ixgbe_mac_X540:
6091 case ixgbe_mac_X550:
6092 case ixgbe_mac_X550EM_x:
6093 hwstats->pxonrxc[i] +=
6094 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6101 /*16 register reads */
6102 for (i = 0; i < 16; i++) {
6103 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6104 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6105 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6106 (hw->mac.type == ixgbe_mac_X540) ||
6107 (hw->mac.type == ixgbe_mac_X550) ||
6108 (hw->mac.type == ixgbe_mac_X550EM_x)) {
6109 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6110 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6111 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6112 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6116 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6117 /* work around hardware counting issue */
6118 hwstats->gprc -= missed_rx;
6120 ixgbe_update_xoff_received(adapter);
6122 /* 82598 hardware only has a 32 bit counter in the high register */
6123 switch (hw->mac.type) {
6124 case ixgbe_mac_82598EB:
6125 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6126 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6127 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6128 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6130 case ixgbe_mac_X540:
6131 case ixgbe_mac_X550:
6132 case ixgbe_mac_X550EM_x:
6133 /* OS2BMC stats are X540 and later */
6134 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6135 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6136 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6137 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6138 case ixgbe_mac_82599EB:
6139 for (i = 0; i < 16; i++)
6140 adapter->hw_rx_no_dma_resources +=
6141 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6142 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6143 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6144 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6145 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6146 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6147 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6148 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6149 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6150 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6152 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6153 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6154 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6155 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6156 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6157 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6158 /* Add up per cpu counters for total ddp aloc fail */
6159 if (adapter->fcoe.ddp_pool) {
6160 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6161 struct ixgbe_fcoe_ddp_pool *ddp_pool;
6163 u64 noddp = 0, noddp_ext_buff = 0;
6164 for_each_possible_cpu(cpu) {
6165 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6166 noddp += ddp_pool->noddp;
6167 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6169 hwstats->fcoe_noddp = noddp;
6170 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6172 #endif /* IXGBE_FCOE */
6177 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6178 hwstats->bprc += bprc;
6179 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6180 if (hw->mac.type == ixgbe_mac_82598EB)
6181 hwstats->mprc -= bprc;
6182 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6183 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6184 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6185 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6186 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6187 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6188 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6189 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6190 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6191 hwstats->lxontxc += lxon;
6192 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6193 hwstats->lxofftxc += lxoff;
6194 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6195 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6197 * 82598 errata - tx of flow control packets is included in tx counters
6199 xon_off_tot = lxon + lxoff;
6200 hwstats->gptc -= xon_off_tot;
6201 hwstats->mptc -= xon_off_tot;
6202 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6203 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6204 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6205 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6206 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6207 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6208 hwstats->ptc64 -= xon_off_tot;
6209 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6210 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6211 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6212 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6213 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6214 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6216 /* Fill out the OS statistics structure */
6217 netdev->stats.multicast = hwstats->mprc;
6220 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6221 netdev->stats.rx_dropped = 0;
6222 netdev->stats.rx_length_errors = hwstats->rlec;
6223 netdev->stats.rx_crc_errors = hwstats->crcerrs;
6224 netdev->stats.rx_missed_errors = total_mpc;
6228 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6229 * @adapter: pointer to the device adapter structure
6231 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6233 struct ixgbe_hw *hw = &adapter->hw;
6236 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6239 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6241 /* if interface is down do nothing */
6242 if (test_bit(__IXGBE_DOWN, &adapter->state))
6245 /* do nothing if we are not using signature filters */
6246 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6249 adapter->fdir_overflow++;
6251 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6252 for (i = 0; i < adapter->num_tx_queues; i++)
6253 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6254 &(adapter->tx_ring[i]->state));
6255 /* re-enable flow director interrupts */
6256 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6258 e_err(probe, "failed to finish FDIR re-initialization, "
6259 "ignored adding FDIR ATR filters\n");
6264 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6265 * @adapter: pointer to the device adapter structure
6267 * This function serves two purposes. First it strobes the interrupt lines
6268 * in order to make certain interrupts are occurring. Secondly it sets the
6269 * bits needed to check for TX hangs. As a result we should immediately
6270 * determine if a hang has occurred.
6272 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6274 struct ixgbe_hw *hw = &adapter->hw;
6278 /* If we're down, removing or resetting, just bail */
6279 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6280 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6281 test_bit(__IXGBE_RESETTING, &adapter->state))
6284 /* Force detection of hung controller */
6285 if (netif_carrier_ok(adapter->netdev)) {
6286 for (i = 0; i < adapter->num_tx_queues; i++)
6287 set_check_for_tx_hang(adapter->tx_ring[i]);
6290 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6292 * for legacy and MSI interrupts don't set any bits
6293 * that are enabled for EIAM, because this operation
6294 * would set *both* EIMS and EICS for any bit in EIAM
6296 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6297 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6299 /* get one bit for every active tx/rx interrupt vector */
6300 for (i = 0; i < adapter->num_q_vectors; i++) {
6301 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6302 if (qv->rx.ring || qv->tx.ring)
6303 eics |= ((u64)1 << i);
6307 /* Cause software interrupt to ensure rings are cleaned */
6308 ixgbe_irq_rearm_queues(adapter, eics);
6312 * ixgbe_watchdog_update_link - update the link status
6313 * @adapter: pointer to the device adapter structure
6314 * @link_speed: pointer to a u32 to store the link_speed
6316 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6318 struct ixgbe_hw *hw = &adapter->hw;
6319 u32 link_speed = adapter->link_speed;
6320 bool link_up = adapter->link_up;
6321 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6323 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6326 if (hw->mac.ops.check_link) {
6327 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6329 /* always assume link is up, if no check link function */
6330 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6334 if (adapter->ixgbe_ieee_pfc)
6335 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6337 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6338 hw->mac.ops.fc_enable(hw);
6339 ixgbe_set_rx_drop_en(adapter);
6343 time_after(jiffies, (adapter->link_check_timeout +
6344 IXGBE_TRY_LINK_TIMEOUT))) {
6345 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6346 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6347 IXGBE_WRITE_FLUSH(hw);
6350 adapter->link_up = link_up;
6351 adapter->link_speed = link_speed;
6354 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6356 #ifdef CONFIG_IXGBE_DCB
6357 struct net_device *netdev = adapter->netdev;
6358 struct dcb_app app = {
6359 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6364 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6365 up = dcb_ieee_getapp_mask(netdev, &app);
6367 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6372 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6373 * print link up message
6374 * @adapter: pointer to the device adapter structure
6376 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6378 struct net_device *netdev = adapter->netdev;
6379 struct ixgbe_hw *hw = &adapter->hw;
6380 struct net_device *upper;
6381 struct list_head *iter;
6382 u32 link_speed = adapter->link_speed;
6383 const char *speed_str;
6384 bool flow_rx, flow_tx;
6386 /* only continue if link was previously down */
6387 if (netif_carrier_ok(netdev))
6390 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6392 switch (hw->mac.type) {
6393 case ixgbe_mac_82598EB: {
6394 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6395 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6396 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6397 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6400 case ixgbe_mac_X540:
6401 case ixgbe_mac_X550:
6402 case ixgbe_mac_X550EM_x:
6403 case ixgbe_mac_82599EB: {
6404 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6405 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6406 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6407 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6416 adapter->last_rx_ptp_check = jiffies;
6418 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6419 ixgbe_ptp_start_cyclecounter(adapter);
6421 switch (link_speed) {
6422 case IXGBE_LINK_SPEED_10GB_FULL:
6423 speed_str = "10 Gbps";
6425 case IXGBE_LINK_SPEED_2_5GB_FULL:
6426 speed_str = "2.5 Gbps";
6428 case IXGBE_LINK_SPEED_1GB_FULL:
6429 speed_str = "1 Gbps";
6431 case IXGBE_LINK_SPEED_100_FULL:
6432 speed_str = "100 Mbps";
6435 speed_str = "unknown speed";
6438 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6439 ((flow_rx && flow_tx) ? "RX/TX" :
6441 (flow_tx ? "TX" : "None"))));
6443 netif_carrier_on(netdev);
6444 ixgbe_check_vf_rate_limit(adapter);
6446 /* enable transmits */
6447 netif_tx_wake_all_queues(adapter->netdev);
6449 /* enable any upper devices */
6451 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6452 if (netif_is_macvlan(upper)) {
6453 struct macvlan_dev *vlan = netdev_priv(upper);
6456 netif_tx_wake_all_queues(upper);
6461 /* update the default user priority for VFs */
6462 ixgbe_update_default_up(adapter);
6464 /* ping all the active vfs to let them know link has changed */
6465 ixgbe_ping_all_vfs(adapter);
6469 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6470 * print link down message
6471 * @adapter: pointer to the adapter structure
6473 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6475 struct net_device *netdev = adapter->netdev;
6476 struct ixgbe_hw *hw = &adapter->hw;
6478 adapter->link_up = false;
6479 adapter->link_speed = 0;
6481 /* only continue if link was up previously */
6482 if (!netif_carrier_ok(netdev))
6485 /* poll for SFP+ cable when link is down */
6486 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6487 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6489 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6490 ixgbe_ptp_start_cyclecounter(adapter);
6492 e_info(drv, "NIC Link is Down\n");
6493 netif_carrier_off(netdev);
6495 /* ping all the active vfs to let them know link has changed */
6496 ixgbe_ping_all_vfs(adapter);
6499 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6503 for (i = 0; i < adapter->num_tx_queues; i++) {
6504 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6506 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6513 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6515 struct ixgbe_hw *hw = &adapter->hw;
6516 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6517 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6521 if (!adapter->num_vfs)
6524 /* resetting the PF is only needed for MAC before X550 */
6525 if (hw->mac.type >= ixgbe_mac_X550)
6528 for (i = 0; i < adapter->num_vfs; i++) {
6529 for (j = 0; j < q_per_pool; j++) {
6532 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6533 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6544 * ixgbe_watchdog_flush_tx - flush queues on link down
6545 * @adapter: pointer to the device adapter structure
6547 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6549 if (!netif_carrier_ok(adapter->netdev)) {
6550 if (ixgbe_ring_tx_pending(adapter) ||
6551 ixgbe_vf_tx_pending(adapter)) {
6552 /* We've lost link, so the controller stops DMA,
6553 * but we've got queued Tx work that's never going
6554 * to get done, so reset controller to flush Tx.
6555 * (Do the reset outside of interrupt context).
6557 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6558 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6563 #ifdef CONFIG_PCI_IOV
6564 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6565 struct pci_dev *vfdev)
6567 if (!pci_wait_for_pending_transaction(vfdev))
6568 e_dev_warn("Issuing VFLR with pending transactions\n");
6570 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6571 pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6576 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6578 struct ixgbe_hw *hw = &adapter->hw;
6579 struct pci_dev *pdev = adapter->pdev;
6580 struct pci_dev *vfdev;
6583 unsigned short vf_id;
6585 if (!(netif_carrier_ok(adapter->netdev)))
6588 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6589 if (gpc) /* If incrementing then no need for the check below */
6591 /* Check to see if a bad DMA write target from an errant or
6592 * malicious VF has caused a PCIe error. If so then we can
6593 * issue a VFLR to the offending VF(s) and then resume without
6594 * requesting a full slot reset.
6600 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6604 /* get the device ID for the VF */
6605 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6607 /* check status reg for all VFs owned by this PF */
6608 vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6610 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6613 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6614 if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6616 ixgbe_issue_vf_flr(adapter, vfdev);
6619 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6623 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6627 /* Do not perform spoof check for 82598 or if not in IOV mode */
6628 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6629 adapter->num_vfs == 0)
6632 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6635 * ssvpc register is cleared on read, if zero then no
6636 * spoofed packets in the last interval.
6641 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6644 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6649 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6652 #endif /* CONFIG_PCI_IOV */
6656 * ixgbe_watchdog_subtask - check and bring link up
6657 * @adapter: pointer to the device adapter structure
6659 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6661 /* if interface is down, removing or resetting, do nothing */
6662 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6663 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6664 test_bit(__IXGBE_RESETTING, &adapter->state))
6667 ixgbe_watchdog_update_link(adapter);
6669 if (adapter->link_up)
6670 ixgbe_watchdog_link_is_up(adapter);
6672 ixgbe_watchdog_link_is_down(adapter);
6674 ixgbe_check_for_bad_vf(adapter);
6675 ixgbe_spoof_check(adapter);
6676 ixgbe_update_stats(adapter);
6678 ixgbe_watchdog_flush_tx(adapter);
6682 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6683 * @adapter: the ixgbe adapter structure
6685 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6687 struct ixgbe_hw *hw = &adapter->hw;
6690 /* not searching for SFP so there is nothing to do here */
6691 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6692 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6695 /* someone else is in init, wait until next service event */
6696 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6699 err = hw->phy.ops.identify_sfp(hw);
6700 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6703 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6704 /* If no cable is present, then we need to reset
6705 * the next time we find a good cable. */
6706 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6713 /* exit if reset not needed */
6714 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6717 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6720 * A module may be identified correctly, but the EEPROM may not have
6721 * support for that module. setup_sfp() will fail in that case, so
6722 * we should not allow that module to load.
6724 if (hw->mac.type == ixgbe_mac_82598EB)
6725 err = hw->phy.ops.reset(hw);
6727 err = hw->mac.ops.setup_sfp(hw);
6729 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6732 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6733 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6736 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6738 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6739 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6740 e_dev_err("failed to initialize because an unsupported "
6741 "SFP+ module type was detected.\n");
6742 e_dev_err("Reload the driver after installing a "
6743 "supported module.\n");
6744 unregister_netdev(adapter->netdev);
6749 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6750 * @adapter: the ixgbe adapter structure
6752 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6754 struct ixgbe_hw *hw = &adapter->hw;
6756 bool autoneg = false;
6758 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6761 /* someone else is in init, wait until next service event */
6762 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6765 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6767 speed = hw->phy.autoneg_advertised;
6768 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6769 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6771 /* setup the highest link when no autoneg */
6773 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6774 speed = IXGBE_LINK_SPEED_10GB_FULL;
6778 if (hw->mac.ops.setup_link)
6779 hw->mac.ops.setup_link(hw, speed, true);
6781 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6782 adapter->link_check_timeout = jiffies;
6783 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6787 * ixgbe_service_timer - Timer Call-back
6788 * @data: pointer to adapter cast into an unsigned long
6790 static void ixgbe_service_timer(unsigned long data)
6792 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6793 unsigned long next_event_offset;
6795 /* poll faster when waiting for link */
6796 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6797 next_event_offset = HZ / 10;
6799 next_event_offset = HZ * 2;
6801 /* Reset the timer */
6802 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6804 ixgbe_service_event_schedule(adapter);
6807 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6809 struct ixgbe_hw *hw = &adapter->hw;
6812 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6815 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6817 if (!hw->phy.ops.handle_lasi)
6820 status = hw->phy.ops.handle_lasi(&adapter->hw);
6821 if (status != IXGBE_ERR_OVERTEMP)
6824 e_crit(drv, "%s\n", ixgbe_overheat_msg);
6827 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6829 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6832 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6834 /* If we're already down, removing or resetting, just bail */
6835 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6836 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6837 test_bit(__IXGBE_RESETTING, &adapter->state))
6840 ixgbe_dump(adapter);
6841 netdev_err(adapter->netdev, "Reset adapter\n");
6842 adapter->tx_timeout_count++;
6845 ixgbe_reinit_locked(adapter);
6850 * ixgbe_service_task - manages and runs subtasks
6851 * @work: pointer to work_struct containing our data
6853 static void ixgbe_service_task(struct work_struct *work)
6855 struct ixgbe_adapter *adapter = container_of(work,
6856 struct ixgbe_adapter,
6858 if (ixgbe_removed(adapter->hw.hw_addr)) {
6859 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6861 ixgbe_down(adapter);
6864 ixgbe_service_event_complete(adapter);
6867 #ifdef CONFIG_IXGBE_VXLAN
6868 if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6869 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6870 vxlan_get_rx_port(adapter->netdev);
6872 #endif /* CONFIG_IXGBE_VXLAN */
6873 ixgbe_reset_subtask(adapter);
6874 ixgbe_phy_interrupt_subtask(adapter);
6875 ixgbe_sfp_detection_subtask(adapter);
6876 ixgbe_sfp_link_config_subtask(adapter);
6877 ixgbe_check_overtemp_subtask(adapter);
6878 ixgbe_watchdog_subtask(adapter);
6879 ixgbe_fdir_reinit_subtask(adapter);
6880 ixgbe_check_hang_subtask(adapter);
6882 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6883 ixgbe_ptp_overflow_check(adapter);
6884 ixgbe_ptp_rx_hang(adapter);
6887 ixgbe_service_event_complete(adapter);
6890 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6891 struct ixgbe_tx_buffer *first,
6894 struct sk_buff *skb = first->skb;
6895 u32 vlan_macip_lens, type_tucmd;
6896 u32 mss_l4len_idx, l4len;
6899 if (skb->ip_summed != CHECKSUM_PARTIAL)
6902 if (!skb_is_gso(skb))
6905 err = skb_cow_head(skb, 0);
6909 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6910 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6912 if (first->protocol == htons(ETH_P_IP)) {
6913 struct iphdr *iph = ip_hdr(skb);
6916 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6920 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6921 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6922 IXGBE_TX_FLAGS_CSUM |
6923 IXGBE_TX_FLAGS_IPV4;
6924 } else if (skb_is_gso_v6(skb)) {
6925 ipv6_hdr(skb)->payload_len = 0;
6926 tcp_hdr(skb)->check =
6927 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6928 &ipv6_hdr(skb)->daddr,
6930 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6931 IXGBE_TX_FLAGS_CSUM;
6934 /* compute header lengths */
6935 l4len = tcp_hdrlen(skb);
6936 *hdr_len = skb_transport_offset(skb) + l4len;
6938 /* update gso size and bytecount with header size */
6939 first->gso_segs = skb_shinfo(skb)->gso_segs;
6940 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6942 /* mss_l4len_id: use 0 as index for TSO */
6943 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6944 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6946 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6947 vlan_macip_lens = skb_network_header_len(skb);
6948 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6949 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6951 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6957 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6958 struct ixgbe_tx_buffer *first)
6960 struct sk_buff *skb = first->skb;
6961 u32 vlan_macip_lens = 0;
6962 u32 mss_l4len_idx = 0;
6965 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6966 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6967 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6969 vlan_macip_lens = skb_network_offset(skb) <<
6970 IXGBE_ADVTXD_MACLEN_SHIFT;
6975 struct ipv6hdr *ipv6;
6979 struct tcphdr *tcphdr;
6983 if (skb->encapsulation) {
6984 network_hdr.raw = skb_inner_network_header(skb);
6985 transport_hdr.raw = skb_inner_transport_header(skb);
6986 vlan_macip_lens = skb_inner_network_offset(skb) <<
6987 IXGBE_ADVTXD_MACLEN_SHIFT;
6989 network_hdr.raw = skb_network_header(skb);
6990 transport_hdr.raw = skb_transport_header(skb);
6991 vlan_macip_lens = skb_network_offset(skb) <<
6992 IXGBE_ADVTXD_MACLEN_SHIFT;
6995 /* use first 4 bits to determine IP version */
6996 switch (network_hdr.ipv4->version) {
6998 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
6999 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7000 l4_hdr = network_hdr.ipv4->protocol;
7003 vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7004 l4_hdr = network_hdr.ipv6->nexthdr;
7007 if (unlikely(net_ratelimit())) {
7008 dev_warn(tx_ring->dev,
7009 "partial checksum but version=%d\n",
7010 network_hdr.ipv4->version);
7016 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7017 mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7018 IXGBE_ADVTXD_L4LEN_SHIFT;
7021 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7022 mss_l4len_idx = sizeof(struct sctphdr) <<
7023 IXGBE_ADVTXD_L4LEN_SHIFT;
7026 mss_l4len_idx = sizeof(struct udphdr) <<
7027 IXGBE_ADVTXD_L4LEN_SHIFT;
7030 if (unlikely(net_ratelimit())) {
7031 dev_warn(tx_ring->dev,
7032 "partial checksum but l4 proto=%x!\n",
7038 /* update TX checksum flag */
7039 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7042 /* vlan_macip_lens: MACLEN, VLAN tag */
7043 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7045 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7046 type_tucmd, mss_l4len_idx);
7049 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7050 ((_flag <= _result) ? \
7051 ((u32)(_input & _flag) * (_result / _flag)) : \
7052 ((u32)(_input & _flag) / (_flag / _result)))
7054 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7056 /* set type for advanced descriptor with frame checksum insertion */
7057 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7058 IXGBE_ADVTXD_DCMD_DEXT |
7059 IXGBE_ADVTXD_DCMD_IFCS;
7061 /* set HW vlan bit if vlan is present */
7062 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7063 IXGBE_ADVTXD_DCMD_VLE);
7065 /* set segmentation enable bits for TSO/FSO */
7066 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7067 IXGBE_ADVTXD_DCMD_TSE);
7069 /* set timestamp bit if present */
7070 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7071 IXGBE_ADVTXD_MAC_TSTAMP);
7073 /* insert frame checksum */
7074 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7079 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7080 u32 tx_flags, unsigned int paylen)
7082 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7084 /* enable L4 checksum for TSO and TX checksum offload */
7085 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7086 IXGBE_TX_FLAGS_CSUM,
7087 IXGBE_ADVTXD_POPTS_TXSM);
7089 /* enble IPv4 checksum for TSO */
7090 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7091 IXGBE_TX_FLAGS_IPV4,
7092 IXGBE_ADVTXD_POPTS_IXSM);
7095 * Check Context must be set if Tx switch is enabled, which it
7096 * always is for case where virtual functions are running
7098 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7102 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7105 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7107 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7109 /* Herbert's original patch had:
7110 * smp_mb__after_netif_stop_queue();
7111 * but since that doesn't exist yet, just open code it.
7115 /* We need to check again in a case another CPU has just
7116 * made room available.
7118 if (likely(ixgbe_desc_unused(tx_ring) < size))
7121 /* A reprieve! - use start_queue because it doesn't call schedule */
7122 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7123 ++tx_ring->tx_stats.restart_queue;
7127 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7129 if (likely(ixgbe_desc_unused(tx_ring) >= size))
7132 return __ixgbe_maybe_stop_tx(tx_ring, size);
7135 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7138 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7139 struct ixgbe_tx_buffer *first,
7142 struct sk_buff *skb = first->skb;
7143 struct ixgbe_tx_buffer *tx_buffer;
7144 union ixgbe_adv_tx_desc *tx_desc;
7145 struct skb_frag_struct *frag;
7147 unsigned int data_len, size;
7148 u32 tx_flags = first->tx_flags;
7149 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7150 u16 i = tx_ring->next_to_use;
7152 tx_desc = IXGBE_TX_DESC(tx_ring, i);
7154 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7156 size = skb_headlen(skb);
7157 data_len = skb->data_len;
7160 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7161 if (data_len < sizeof(struct fcoe_crc_eof)) {
7162 size -= sizeof(struct fcoe_crc_eof) - data_len;
7165 data_len -= sizeof(struct fcoe_crc_eof);
7170 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7174 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7175 if (dma_mapping_error(tx_ring->dev, dma))
7178 /* record length, and DMA address */
7179 dma_unmap_len_set(tx_buffer, len, size);
7180 dma_unmap_addr_set(tx_buffer, dma, dma);
7182 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7184 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7185 tx_desc->read.cmd_type_len =
7186 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7190 if (i == tx_ring->count) {
7191 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7194 tx_desc->read.olinfo_status = 0;
7196 dma += IXGBE_MAX_DATA_PER_TXD;
7197 size -= IXGBE_MAX_DATA_PER_TXD;
7199 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7202 if (likely(!data_len))
7205 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7209 if (i == tx_ring->count) {
7210 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7213 tx_desc->read.olinfo_status = 0;
7216 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7218 size = skb_frag_size(frag);
7222 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7225 tx_buffer = &tx_ring->tx_buffer_info[i];
7228 /* write last descriptor with RS and EOP bits */
7229 cmd_type |= size | IXGBE_TXD_CMD;
7230 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7232 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7234 /* set the timestamp */
7235 first->time_stamp = jiffies;
7238 * Force memory writes to complete before letting h/w know there
7239 * are new descriptors to fetch. (Only applicable for weak-ordered
7240 * memory model archs, such as IA-64).
7242 * We also need this memory barrier to make certain all of the
7243 * status bits have been updated before next_to_watch is written.
7247 /* set next_to_watch value indicating a packet is present */
7248 first->next_to_watch = tx_desc;
7251 if (i == tx_ring->count)
7254 tx_ring->next_to_use = i;
7256 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7258 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7259 writel(i, tx_ring->tail);
7261 /* we need this if more than one processor can write to our tail
7262 * at a time, it synchronizes IO on IA64/Altix systems
7269 dev_err(tx_ring->dev, "TX DMA map failed\n");
7271 /* clear dma mappings for failed tx_buffer_info map */
7273 tx_buffer = &tx_ring->tx_buffer_info[i];
7274 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7275 if (tx_buffer == first)
7282 tx_ring->next_to_use = i;
7285 static void ixgbe_atr(struct ixgbe_ring *ring,
7286 struct ixgbe_tx_buffer *first)
7288 struct ixgbe_q_vector *q_vector = ring->q_vector;
7289 union ixgbe_atr_hash_dword input = { .dword = 0 };
7290 union ixgbe_atr_hash_dword common = { .dword = 0 };
7292 unsigned char *network;
7294 struct ipv6hdr *ipv6;
7297 struct sk_buff *skb;
7298 #ifdef CONFIG_IXGBE_VXLAN
7300 #endif /* CONFIG_IXGBE_VXLAN */
7303 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7307 /* do nothing if sampling is disabled */
7308 if (!ring->atr_sample_rate)
7313 /* snag network header to get L4 type and address */
7315 hdr.network = skb_network_header(skb);
7316 if (skb->encapsulation) {
7317 #ifdef CONFIG_IXGBE_VXLAN
7318 struct ixgbe_adapter *adapter = q_vector->adapter;
7320 if (!adapter->vxlan_port)
7322 if (first->protocol != htons(ETH_P_IP) ||
7323 hdr.ipv4->version != IPVERSION ||
7324 hdr.ipv4->protocol != IPPROTO_UDP) {
7327 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7330 hdr.network = skb_inner_network_header(skb);
7331 th = inner_tcp_hdr(skb);
7334 #endif /* CONFIG_IXGBE_VXLAN */
7336 /* Currently only IPv4/IPv6 with TCP is supported */
7337 if ((first->protocol != htons(ETH_P_IPV6) ||
7338 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7339 (first->protocol != htons(ETH_P_IP) ||
7340 hdr.ipv4->protocol != IPPROTO_TCP))
7345 /* skip this packet since it is invalid or the socket is closing */
7349 /* sample on all syn packets or once every atr sample count */
7350 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7353 /* reset sample count */
7354 ring->atr_count = 0;
7356 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7359 * src and dst are inverted, think how the receiver sees them
7361 * The input is broken into two sections, a non-compressed section
7362 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7363 * is XORed together and stored in the compressed dword.
7365 input.formatted.vlan_id = vlan_id;
7368 * since src port and flex bytes occupy the same word XOR them together
7369 * and write the value to source port portion of compressed dword
7371 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7372 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7374 common.port.src ^= th->dest ^ first->protocol;
7375 common.port.dst ^= th->source;
7377 if (first->protocol == htons(ETH_P_IP)) {
7378 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7379 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7381 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7382 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7383 hdr.ipv6->saddr.s6_addr32[1] ^
7384 hdr.ipv6->saddr.s6_addr32[2] ^
7385 hdr.ipv6->saddr.s6_addr32[3] ^
7386 hdr.ipv6->daddr.s6_addr32[0] ^
7387 hdr.ipv6->daddr.s6_addr32[1] ^
7388 hdr.ipv6->daddr.s6_addr32[2] ^
7389 hdr.ipv6->daddr.s6_addr32[3];
7392 #ifdef CONFIG_IXGBE_VXLAN
7394 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7395 #endif /* CONFIG_IXGBE_VXLAN */
7397 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7398 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7399 input, common, ring->queue_index);
7402 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7403 void *accel_priv, select_queue_fallback_t fallback)
7405 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7407 struct ixgbe_adapter *adapter;
7408 struct ixgbe_ring_feature *f;
7413 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7418 * only execute the code below if protocol is FCoE
7419 * or FIP and we have FCoE enabled on the adapter
7421 switch (vlan_get_protocol(skb)) {
7422 case htons(ETH_P_FCOE):
7423 case htons(ETH_P_FIP):
7424 adapter = netdev_priv(dev);
7426 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7429 return fallback(dev, skb);
7432 f = &adapter->ring_feature[RING_F_FCOE];
7434 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7437 while (txq >= f->indices)
7440 return txq + f->offset;
7442 return fallback(dev, skb);
7446 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7447 struct ixgbe_adapter *adapter,
7448 struct ixgbe_ring *tx_ring)
7450 struct ixgbe_tx_buffer *first;
7454 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7455 __be16 protocol = skb->protocol;
7459 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7460 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7461 * + 2 desc gap to keep tail from touching head,
7462 * + 1 desc for context descriptor,
7463 * otherwise try next time
7465 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7466 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7468 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7469 tx_ring->tx_stats.tx_busy++;
7470 return NETDEV_TX_BUSY;
7473 /* record the location of the first descriptor for this packet */
7474 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7476 first->bytecount = skb->len;
7477 first->gso_segs = 1;
7479 /* if we have a HW VLAN tag being added default to the HW one */
7480 if (skb_vlan_tag_present(skb)) {
7481 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7482 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7483 /* else if it is a SW VLAN check the next protocol and store the tag */
7484 } else if (protocol == htons(ETH_P_8021Q)) {
7485 struct vlan_hdr *vhdr, _vhdr;
7486 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7490 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7491 IXGBE_TX_FLAGS_VLAN_SHIFT;
7492 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7494 protocol = vlan_get_protocol(skb);
7496 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7497 adapter->ptp_clock &&
7498 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7500 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7501 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7503 /* schedule check for Tx timestamp */
7504 adapter->ptp_tx_skb = skb_get(skb);
7505 adapter->ptp_tx_start = jiffies;
7506 schedule_work(&adapter->ptp_tx_work);
7509 skb_tx_timestamp(skb);
7511 #ifdef CONFIG_PCI_IOV
7513 * Use the l2switch_enable flag - would be false if the DMA
7514 * Tx switch had been disabled.
7516 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7517 tx_flags |= IXGBE_TX_FLAGS_CC;
7520 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7521 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7522 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7523 (skb->priority != TC_PRIO_CONTROL))) {
7524 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7525 tx_flags |= (skb->priority & 0x7) <<
7526 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7527 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7528 struct vlan_ethhdr *vhdr;
7530 if (skb_cow_head(skb, 0))
7532 vhdr = (struct vlan_ethhdr *)skb->data;
7533 vhdr->h_vlan_TCI = htons(tx_flags >>
7534 IXGBE_TX_FLAGS_VLAN_SHIFT);
7536 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7540 /* record initial flags and protocol */
7541 first->tx_flags = tx_flags;
7542 first->protocol = protocol;
7545 /* setup tx offload for FCoE */
7546 if ((protocol == htons(ETH_P_FCOE)) &&
7547 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7548 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7555 #endif /* IXGBE_FCOE */
7556 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7560 ixgbe_tx_csum(tx_ring, first);
7562 /* add the ATR filter if ATR is on */
7563 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7564 ixgbe_atr(tx_ring, first);
7568 #endif /* IXGBE_FCOE */
7569 ixgbe_tx_map(tx_ring, first, hdr_len);
7571 return NETDEV_TX_OK;
7574 dev_kfree_skb_any(first->skb);
7577 return NETDEV_TX_OK;
7580 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7581 struct net_device *netdev,
7582 struct ixgbe_ring *ring)
7584 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7585 struct ixgbe_ring *tx_ring;
7588 * The minimum packet size for olinfo paylen is 17 so pad the skb
7589 * in order to meet this minimum size requirement.
7591 if (skb_put_padto(skb, 17))
7592 return NETDEV_TX_OK;
7594 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7596 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7599 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7600 struct net_device *netdev)
7602 return __ixgbe_xmit_frame(skb, netdev, NULL);
7606 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7607 * @netdev: network interface device structure
7608 * @p: pointer to an address structure
7610 * Returns 0 on success, negative on failure
7612 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7614 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7615 struct ixgbe_hw *hw = &adapter->hw;
7616 struct sockaddr *addr = p;
7619 if (!is_valid_ether_addr(addr->sa_data))
7620 return -EADDRNOTAVAIL;
7622 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7623 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7624 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7626 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7627 return ret > 0 ? 0 : ret;
7631 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7633 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7634 struct ixgbe_hw *hw = &adapter->hw;
7638 if (prtad != hw->phy.mdio.prtad)
7640 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7646 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7647 u16 addr, u16 value)
7649 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7650 struct ixgbe_hw *hw = &adapter->hw;
7652 if (prtad != hw->phy.mdio.prtad)
7654 return hw->phy.ops.write_reg(hw, addr, devad, value);
7657 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7659 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7663 return ixgbe_ptp_set_ts_config(adapter, req);
7665 return ixgbe_ptp_get_ts_config(adapter, req);
7667 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7672 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7674 * @netdev: network interface device structure
7676 * Returns non-zero on failure
7678 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7681 struct ixgbe_adapter *adapter = netdev_priv(dev);
7682 struct ixgbe_hw *hw = &adapter->hw;
7684 if (is_valid_ether_addr(hw->mac.san_addr)) {
7686 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7689 /* update SAN MAC vmdq pool selection */
7690 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7696 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7698 * @netdev: network interface device structure
7700 * Returns non-zero on failure
7702 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7705 struct ixgbe_adapter *adapter = netdev_priv(dev);
7706 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7708 if (is_valid_ether_addr(mac->san_addr)) {
7710 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7716 #ifdef CONFIG_NET_POLL_CONTROLLER
7718 * Polling 'interrupt' - used by things like netconsole to send skbs
7719 * without having to re-enable interrupts. It's not called while
7720 * the interrupt routine is executing.
7722 static void ixgbe_netpoll(struct net_device *netdev)
7724 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7727 /* if interface is down do nothing */
7728 if (test_bit(__IXGBE_DOWN, &adapter->state))
7731 /* loop through and schedule all active queues */
7732 for (i = 0; i < adapter->num_q_vectors; i++)
7733 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7737 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7738 struct rtnl_link_stats64 *stats)
7740 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7744 for (i = 0; i < adapter->num_rx_queues; i++) {
7745 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7751 start = u64_stats_fetch_begin_irq(&ring->syncp);
7752 packets = ring->stats.packets;
7753 bytes = ring->stats.bytes;
7754 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7755 stats->rx_packets += packets;
7756 stats->rx_bytes += bytes;
7760 for (i = 0; i < adapter->num_tx_queues; i++) {
7761 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7767 start = u64_stats_fetch_begin_irq(&ring->syncp);
7768 packets = ring->stats.packets;
7769 bytes = ring->stats.bytes;
7770 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7771 stats->tx_packets += packets;
7772 stats->tx_bytes += bytes;
7776 /* following stats updated by ixgbe_watchdog_task() */
7777 stats->multicast = netdev->stats.multicast;
7778 stats->rx_errors = netdev->stats.rx_errors;
7779 stats->rx_length_errors = netdev->stats.rx_length_errors;
7780 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7781 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7785 #ifdef CONFIG_IXGBE_DCB
7787 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7788 * @adapter: pointer to ixgbe_adapter
7789 * @tc: number of traffic classes currently enabled
7791 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7792 * 802.1Q priority maps to a packet buffer that exists.
7794 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7796 struct ixgbe_hw *hw = &adapter->hw;
7800 /* 82598 have a static priority to TC mapping that can not
7801 * be changed so no validation is needed.
7803 if (hw->mac.type == ixgbe_mac_82598EB)
7806 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7809 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7810 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7812 /* If up2tc is out of bounds default to zero */
7814 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7818 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7824 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7825 * @adapter: Pointer to adapter struct
7827 * Populate the netdev user priority to tc map
7829 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7831 struct net_device *dev = adapter->netdev;
7832 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7833 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7836 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7839 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7840 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7842 tc = ets->prio_tc[prio];
7844 netdev_set_prio_tc_map(dev, prio, tc);
7848 #endif /* CONFIG_IXGBE_DCB */
7850 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7852 * @netdev: net device to configure
7853 * @tc: number of traffic classes to enable
7855 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7857 struct ixgbe_adapter *adapter = netdev_priv(dev);
7858 struct ixgbe_hw *hw = &adapter->hw;
7861 /* Hardware supports up to 8 traffic classes */
7862 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7865 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7868 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7869 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7872 /* Hardware has to reinitialize queues and interrupts to
7873 * match packet buffer alignment. Unfortunately, the
7874 * hardware is not flexible enough to do this dynamically.
7876 if (netif_running(dev))
7878 ixgbe_clear_interrupt_scheme(adapter);
7880 #ifdef CONFIG_IXGBE_DCB
7882 netdev_set_num_tc(dev, tc);
7883 ixgbe_set_prio_tc_map(adapter);
7885 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7887 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7888 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7889 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7892 netdev_reset_tc(dev);
7894 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7895 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7897 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7899 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7900 adapter->dcb_cfg.pfc_mode_enable = false;
7903 ixgbe_validate_rtr(adapter, tc);
7905 #endif /* CONFIG_IXGBE_DCB */
7906 ixgbe_init_interrupt_scheme(adapter);
7908 if (netif_running(dev))
7909 return ixgbe_open(dev);
7914 #ifdef CONFIG_PCI_IOV
7915 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7917 struct net_device *netdev = adapter->netdev;
7920 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7925 void ixgbe_do_reset(struct net_device *netdev)
7927 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7929 if (netif_running(netdev))
7930 ixgbe_reinit_locked(adapter);
7932 ixgbe_reset(adapter);
7935 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7936 netdev_features_t features)
7938 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7940 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7941 if (!(features & NETIF_F_RXCSUM))
7942 features &= ~NETIF_F_LRO;
7944 /* Turn off LRO if not RSC capable */
7945 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7946 features &= ~NETIF_F_LRO;
7951 static int ixgbe_set_features(struct net_device *netdev,
7952 netdev_features_t features)
7954 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7955 netdev_features_t changed = netdev->features ^ features;
7956 bool need_reset = false;
7958 /* Make sure RSC matches LRO, reset if change */
7959 if (!(features & NETIF_F_LRO)) {
7960 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7962 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7963 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7964 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7965 if (adapter->rx_itr_setting == 1 ||
7966 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7967 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7969 } else if ((changed ^ features) & NETIF_F_LRO) {
7970 e_info(probe, "rx-usecs set too low, "
7976 * Check if Flow Director n-tuple support was enabled or disabled. If
7977 * the state changed, we need to reset.
7979 switch (features & NETIF_F_NTUPLE) {
7980 case NETIF_F_NTUPLE:
7981 /* turn off ATR, enable perfect filters and reset */
7982 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7985 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7986 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7989 /* turn off perfect filters, enable ATR and reset */
7990 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7993 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7995 /* We cannot enable ATR if SR-IOV is enabled */
7996 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7999 /* We cannot enable ATR if we have 2 or more traffic classes */
8000 if (netdev_get_num_tc(netdev) > 1)
8003 /* We cannot enable ATR if RSS is disabled */
8004 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8007 /* A sample rate of 0 indicates ATR disabled */
8008 if (!adapter->atr_sample_rate)
8011 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8015 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8016 ixgbe_vlan_strip_enable(adapter);
8018 ixgbe_vlan_strip_disable(adapter);
8020 if (changed & NETIF_F_RXALL)
8023 netdev->features = features;
8025 #ifdef CONFIG_IXGBE_VXLAN
8026 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8027 if (features & NETIF_F_RXCSUM)
8028 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8030 ixgbe_clear_vxlan_port(adapter);
8032 #endif /* CONFIG_IXGBE_VXLAN */
8035 ixgbe_do_reset(netdev);
8040 #ifdef CONFIG_IXGBE_VXLAN
8042 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8043 * @dev: The port's netdev
8044 * @sa_family: Socket Family that VXLAN is notifiying us about
8045 * @port: New UDP port number that VXLAN started listening to
8047 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8050 struct ixgbe_adapter *adapter = netdev_priv(dev);
8051 struct ixgbe_hw *hw = &adapter->hw;
8052 u16 new_port = ntohs(port);
8054 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8057 if (sa_family == AF_INET6)
8060 if (adapter->vxlan_port == new_port)
8063 if (adapter->vxlan_port) {
8065 "Hit Max num of VXLAN ports, not adding port %d\n",
8070 adapter->vxlan_port = new_port;
8071 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8075 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8076 * @dev: The port's netdev
8077 * @sa_family: Socket Family that VXLAN is notifying us about
8078 * @port: UDP port number that VXLAN stopped listening to
8080 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8083 struct ixgbe_adapter *adapter = netdev_priv(dev);
8084 u16 new_port = ntohs(port);
8086 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8089 if (sa_family == AF_INET6)
8092 if (adapter->vxlan_port != new_port) {
8093 netdev_info(dev, "Port %d was not found, not deleting\n",
8098 ixgbe_clear_vxlan_port(adapter);
8099 adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8101 #endif /* CONFIG_IXGBE_VXLAN */
8103 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8104 struct net_device *dev,
8105 const unsigned char *addr, u16 vid,
8108 /* guarantee we can provide a unique filter for the unicast address */
8109 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8110 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8114 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8118 * ixgbe_configure_bridge_mode - set various bridge modes
8119 * @adapter - the private structure
8120 * @mode - requested bridge mode
8122 * Configure some settings require for various bridge modes.
8124 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8127 struct ixgbe_hw *hw = &adapter->hw;
8128 unsigned int p, num_pools;
8132 case BRIDGE_MODE_VEPA:
8133 /* disable Tx loopback, rely on switch hairpin mode */
8134 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8136 /* must enable Rx switching replication to allow multicast
8137 * packet reception on all VFs, and to enable source address
8140 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8141 vmdctl |= IXGBE_VT_CTL_REPLEN;
8142 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8144 /* enable Rx source address pruning. Note, this requires
8145 * replication to be enabled or else it does nothing.
8147 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8148 for (p = 0; p < num_pools; p++) {
8149 if (hw->mac.ops.set_source_address_pruning)
8150 hw->mac.ops.set_source_address_pruning(hw,
8155 case BRIDGE_MODE_VEB:
8156 /* enable Tx loopback for internal VF/PF communication */
8157 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8158 IXGBE_PFDTXGSWC_VT_LBEN);
8160 /* disable Rx switching replication unless we have SR-IOV
8163 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8164 if (!adapter->num_vfs)
8165 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8166 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8168 /* disable Rx source address pruning, since we don't expect to
8169 * be receiving external loopback of our transmitted frames.
8171 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8172 for (p = 0; p < num_pools; p++) {
8173 if (hw->mac.ops.set_source_address_pruning)
8174 hw->mac.ops.set_source_address_pruning(hw,
8183 adapter->bridge_mode = mode;
8185 e_info(drv, "enabling bridge mode: %s\n",
8186 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8191 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8192 struct nlmsghdr *nlh, u16 flags)
8194 struct ixgbe_adapter *adapter = netdev_priv(dev);
8195 struct nlattr *attr, *br_spec;
8198 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8201 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8205 nla_for_each_nested(attr, br_spec, rem) {
8209 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8212 if (nla_len(attr) < sizeof(mode))
8215 mode = nla_get_u16(attr);
8216 status = ixgbe_configure_bridge_mode(adapter, mode);
8226 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8227 struct net_device *dev,
8228 u32 filter_mask, int nlflags)
8230 struct ixgbe_adapter *adapter = netdev_priv(dev);
8232 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8235 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8236 adapter->bridge_mode, 0, 0, nlflags,
8240 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8242 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8243 struct ixgbe_adapter *adapter = netdev_priv(pdev);
8244 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8248 /* Hardware has a limited number of available pools. Each VF, and the
8249 * PF require a pool. Check to ensure we don't attempt to use more
8250 * then the available number of pools.
8252 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8253 return ERR_PTR(-EINVAL);
8256 if (vdev->num_rx_queues != vdev->num_tx_queues) {
8257 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8259 return ERR_PTR(-EINVAL);
8262 /* Check for hardware restriction on number of rx/tx queues */
8263 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8264 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8266 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8268 return ERR_PTR(-EINVAL);
8271 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8272 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8273 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8274 return ERR_PTR(-EBUSY);
8276 fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8278 return ERR_PTR(-ENOMEM);
8280 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8281 adapter->num_rx_pools++;
8282 set_bit(pool, &adapter->fwd_bitmask);
8283 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8285 /* Enable VMDq flag so device will be set in VM mode */
8286 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8287 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8288 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8290 /* Force reinit of ring allocation with VMDQ enabled */
8291 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8294 fwd_adapter->pool = pool;
8295 fwd_adapter->real_adapter = adapter;
8296 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8299 netif_tx_start_all_queues(vdev);
8302 /* unwind counter and free adapter struct */
8304 "%s: dfwd hardware acceleration failed\n", vdev->name);
8305 clear_bit(pool, &adapter->fwd_bitmask);
8306 adapter->num_rx_pools--;
8308 return ERR_PTR(err);
8311 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8313 struct ixgbe_fwd_adapter *fwd_adapter = priv;
8314 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8317 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8318 adapter->num_rx_pools--;
8320 limit = find_last_bit(&adapter->fwd_bitmask, 32);
8321 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8322 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8323 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8324 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8325 fwd_adapter->pool, adapter->num_rx_pools,
8326 fwd_adapter->rx_base_queue,
8327 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8328 adapter->fwd_bitmask);
8332 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8333 static netdev_features_t
8334 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8335 netdev_features_t features)
8337 if (!skb->encapsulation)
8340 if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8341 IXGBE_MAX_TUNNEL_HDR_LEN))
8342 return features & ~NETIF_F_ALL_CSUM;
8347 static const struct net_device_ops ixgbe_netdev_ops = {
8348 .ndo_open = ixgbe_open,
8349 .ndo_stop = ixgbe_close,
8350 .ndo_start_xmit = ixgbe_xmit_frame,
8351 .ndo_select_queue = ixgbe_select_queue,
8352 .ndo_set_rx_mode = ixgbe_set_rx_mode,
8353 .ndo_validate_addr = eth_validate_addr,
8354 .ndo_set_mac_address = ixgbe_set_mac,
8355 .ndo_change_mtu = ixgbe_change_mtu,
8356 .ndo_tx_timeout = ixgbe_tx_timeout,
8357 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
8358 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
8359 .ndo_do_ioctl = ixgbe_ioctl,
8360 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
8361 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
8362 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
8363 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
8364 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8365 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
8366 .ndo_get_stats64 = ixgbe_get_stats64,
8367 #ifdef CONFIG_IXGBE_DCB
8368 .ndo_setup_tc = ixgbe_setup_tc,
8370 #ifdef CONFIG_NET_POLL_CONTROLLER
8371 .ndo_poll_controller = ixgbe_netpoll,
8373 #ifdef CONFIG_NET_RX_BUSY_POLL
8374 .ndo_busy_poll = ixgbe_low_latency_recv,
8377 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8378 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8379 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8380 .ndo_fcoe_enable = ixgbe_fcoe_enable,
8381 .ndo_fcoe_disable = ixgbe_fcoe_disable,
8382 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8383 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8384 #endif /* IXGBE_FCOE */
8385 .ndo_set_features = ixgbe_set_features,
8386 .ndo_fix_features = ixgbe_fix_features,
8387 .ndo_fdb_add = ixgbe_ndo_fdb_add,
8388 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
8389 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
8390 .ndo_dfwd_add_station = ixgbe_fwd_add,
8391 .ndo_dfwd_del_station = ixgbe_fwd_del,
8392 #ifdef CONFIG_IXGBE_VXLAN
8393 .ndo_add_vxlan_port = ixgbe_add_vxlan_port,
8394 .ndo_del_vxlan_port = ixgbe_del_vxlan_port,
8395 #endif /* CONFIG_IXGBE_VXLAN */
8396 .ndo_features_check = ixgbe_features_check,
8400 * ixgbe_enumerate_functions - Get the number of ports this device has
8401 * @adapter: adapter structure
8403 * This function enumerates the phsyical functions co-located on a single slot,
8404 * in order to determine how many ports a device has. This is most useful in
8405 * determining the required GT/s of PCIe bandwidth necessary for optimal
8408 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8410 struct pci_dev *entry, *pdev = adapter->pdev;
8413 /* Some cards can not use the generic count PCIe functions method,
8414 * because they are behind a parent switch, so we hardcode these with
8415 * the correct number of functions.
8417 if (ixgbe_pcie_from_parent(&adapter->hw))
8420 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8421 /* don't count virtual functions */
8422 if (entry->is_virtfn)
8425 /* When the devices on the bus don't all match our device ID,
8426 * we can't reliably determine the correct number of
8427 * functions. This can occur if a function has been direct
8428 * attached to a virtual machine using VT-d, for example. In
8429 * this case, simply return -1 to indicate this.
8431 if ((entry->vendor != pdev->vendor) ||
8432 (entry->device != pdev->device))
8442 * ixgbe_wol_supported - Check whether device supports WoL
8443 * @hw: hw specific details
8444 * @device_id: the device ID
8445 * @subdev_id: the subsystem device ID
8447 * This function is used by probe and ethtool to determine
8448 * which devices have WoL support
8451 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8454 struct ixgbe_hw *hw = &adapter->hw;
8455 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8456 int is_wol_supported = 0;
8458 switch (device_id) {
8459 case IXGBE_DEV_ID_82599_SFP:
8460 /* Only these subdevices could supports WOL */
8461 switch (subdevice_id) {
8462 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8463 case IXGBE_SUBDEV_ID_82599_560FLR:
8464 /* only support first port */
8465 if (hw->bus.func != 0)
8467 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8468 case IXGBE_SUBDEV_ID_82599_SFP:
8469 case IXGBE_SUBDEV_ID_82599_RNDC:
8470 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8471 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8472 is_wol_supported = 1;
8476 case IXGBE_DEV_ID_82599EN_SFP:
8477 /* Only this subdevice supports WOL */
8478 switch (subdevice_id) {
8479 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8480 is_wol_supported = 1;
8484 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8485 /* All except this subdevice support WOL */
8486 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8487 is_wol_supported = 1;
8489 case IXGBE_DEV_ID_82599_KX4:
8490 is_wol_supported = 1;
8492 case IXGBE_DEV_ID_X540T:
8493 case IXGBE_DEV_ID_X540T1:
8494 case IXGBE_DEV_ID_X550T:
8495 case IXGBE_DEV_ID_X550EM_X_KX4:
8496 case IXGBE_DEV_ID_X550EM_X_KR:
8497 case IXGBE_DEV_ID_X550EM_X_10G_T:
8498 /* check eeprom to see if enabled wol */
8499 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8500 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8501 (hw->bus.func == 0))) {
8502 is_wol_supported = 1;
8507 return is_wol_supported;
8511 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8512 * @adapter: Pointer to adapter struct
8514 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8517 struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8518 struct ixgbe_hw *hw = &adapter->hw;
8519 const unsigned char *addr;
8521 addr = of_get_mac_address(dp);
8523 ether_addr_copy(hw->mac.perm_addr, addr);
8526 #endif /* CONFIG_OF */
8529 ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8530 #endif /* CONFIG_SPARC */
8534 * ixgbe_probe - Device Initialization Routine
8535 * @pdev: PCI device information struct
8536 * @ent: entry in ixgbe_pci_tbl
8538 * Returns 0 on success, negative on failure
8540 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8541 * The OS initialization, configuring of the adapter private structure,
8542 * and a hardware reset occur.
8544 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8546 struct net_device *netdev;
8547 struct ixgbe_adapter *adapter = NULL;
8548 struct ixgbe_hw *hw;
8549 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8550 int i, err, pci_using_dac, expected_gts;
8551 unsigned int indices = MAX_TX_QUEUES;
8552 u8 part_str[IXGBE_PBANUM_LENGTH];
8553 bool disable_dev = false;
8559 /* Catch broken hardware that put the wrong VF device ID in
8560 * the PCIe SR-IOV capability.
8562 if (pdev->is_virtfn) {
8563 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8564 pci_name(pdev), pdev->vendor, pdev->device);
8568 err = pci_enable_device_mem(pdev);
8572 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8575 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8578 "No usable DMA configuration, aborting\n");
8584 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8585 IORESOURCE_MEM), ixgbe_driver_name);
8588 "pci_request_selected_regions failed 0x%x\n", err);
8592 pci_enable_pcie_error_reporting(pdev);
8594 pci_set_master(pdev);
8595 pci_save_state(pdev);
8597 if (ii->mac == ixgbe_mac_82598EB) {
8598 #ifdef CONFIG_IXGBE_DCB
8599 /* 8 TC w/ 4 queues per TC */
8600 indices = 4 * MAX_TRAFFIC_CLASS;
8602 indices = IXGBE_MAX_RSS_INDICES;
8606 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8609 goto err_alloc_etherdev;
8612 SET_NETDEV_DEV(netdev, &pdev->dev);
8614 adapter = netdev_priv(netdev);
8616 adapter->netdev = netdev;
8617 adapter->pdev = pdev;
8620 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8622 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8623 pci_resource_len(pdev, 0));
8624 adapter->io_addr = hw->hw_addr;
8630 netdev->netdev_ops = &ixgbe_netdev_ops;
8631 ixgbe_set_ethtool_ops(netdev);
8632 netdev->watchdog_timeo = 5 * HZ;
8633 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8636 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8637 hw->mac.type = ii->mac;
8638 hw->mvals = ii->mvals;
8641 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8642 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8643 if (ixgbe_removed(hw->hw_addr)) {
8647 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8648 if (!(eec & (1 << 8)))
8649 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8652 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8653 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8654 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8655 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8656 hw->phy.mdio.mmds = 0;
8657 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8658 hw->phy.mdio.dev = netdev;
8659 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8660 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8662 ii->get_invariants(hw);
8664 /* setup the private structure */
8665 err = ixgbe_sw_init(adapter);
8669 /* Make it possible the adapter to be woken up via WOL */
8670 switch (adapter->hw.mac.type) {
8671 case ixgbe_mac_82599EB:
8672 case ixgbe_mac_X540:
8673 case ixgbe_mac_X550:
8674 case ixgbe_mac_X550EM_x:
8675 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8682 * If there is a fan on this device and it has failed log the
8685 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8686 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8687 if (esdp & IXGBE_ESDP_SDP1)
8688 e_crit(probe, "Fan has stopped, replace the adapter\n");
8691 if (allow_unsupported_sfp)
8692 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8694 /* reset_hw fills in the perm_addr as well */
8695 hw->phy.reset_if_overtemp = true;
8696 err = hw->mac.ops.reset_hw(hw);
8697 hw->phy.reset_if_overtemp = false;
8698 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8699 hw->mac.type == ixgbe_mac_82598EB) {
8701 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8702 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8703 e_dev_err("Reload the driver after installing a supported module.\n");
8706 e_dev_err("HW Init failed: %d\n", err);
8710 #ifdef CONFIG_PCI_IOV
8711 /* SR-IOV not supported on the 82598 */
8712 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8715 ixgbe_init_mbx_params_pf(hw);
8716 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8717 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8718 ixgbe_enable_sriov(adapter);
8722 netdev->features = NETIF_F_SG |
8725 NETIF_F_HW_VLAN_CTAG_TX |
8726 NETIF_F_HW_VLAN_CTAG_RX |
8732 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8734 switch (adapter->hw.mac.type) {
8735 case ixgbe_mac_82599EB:
8736 case ixgbe_mac_X540:
8737 case ixgbe_mac_X550:
8738 case ixgbe_mac_X550EM_x:
8739 netdev->features |= NETIF_F_SCTP_CSUM;
8740 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8747 netdev->hw_features |= NETIF_F_RXALL;
8748 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8750 netdev->vlan_features |= NETIF_F_TSO;
8751 netdev->vlan_features |= NETIF_F_TSO6;
8752 netdev->vlan_features |= NETIF_F_IP_CSUM;
8753 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8754 netdev->vlan_features |= NETIF_F_SG;
8756 netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8759 netdev->priv_flags |= IFF_UNICAST_FLT;
8760 netdev->priv_flags |= IFF_SUPP_NOFCS;
8762 #ifdef CONFIG_IXGBE_VXLAN
8763 switch (adapter->hw.mac.type) {
8764 case ixgbe_mac_X550:
8765 case ixgbe_mac_X550EM_x:
8766 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8773 #endif /* CONFIG_IXGBE_VXLAN */
8775 #ifdef CONFIG_IXGBE_DCB
8776 netdev->dcbnl_ops = &dcbnl_ops;
8780 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8781 unsigned int fcoe_l;
8783 if (hw->mac.ops.get_device_caps) {
8784 hw->mac.ops.get_device_caps(hw, &device_caps);
8785 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8786 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8790 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8791 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8793 netdev->features |= NETIF_F_FSO |
8796 netdev->vlan_features |= NETIF_F_FSO |
8800 #endif /* IXGBE_FCOE */
8801 if (pci_using_dac) {
8802 netdev->features |= NETIF_F_HIGHDMA;
8803 netdev->vlan_features |= NETIF_F_HIGHDMA;
8806 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8807 netdev->hw_features |= NETIF_F_LRO;
8808 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8809 netdev->features |= NETIF_F_LRO;
8811 /* make sure the EEPROM is good */
8812 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8813 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8818 ixgbe_get_platform_mac_addr(adapter);
8820 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8822 if (!is_valid_ether_addr(netdev->dev_addr)) {
8823 e_dev_err("invalid MAC address\n");
8828 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8830 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8831 (unsigned long) adapter);
8833 if (ixgbe_removed(hw->hw_addr)) {
8837 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8838 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8839 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8841 err = ixgbe_init_interrupt_scheme(adapter);
8845 /* WOL not supported for all devices */
8847 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8848 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8849 pdev->subsystem_device);
8850 if (hw->wol_enabled)
8851 adapter->wol = IXGBE_WUFC_MAG;
8853 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8855 /* save off EEPROM version number */
8856 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8857 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8859 /* pick up the PCI bus settings for reporting later */
8860 if (ixgbe_pcie_from_parent(hw))
8861 ixgbe_get_parent_bus_info(adapter);
8863 hw->mac.ops.get_bus_info(hw);
8865 /* calculate the expected PCIe bandwidth required for optimal
8866 * performance. Note that some older parts will never have enough
8867 * bandwidth due to being older generation PCIe parts. We clamp these
8868 * parts to ensure no warning is displayed if it can't be fixed.
8870 switch (hw->mac.type) {
8871 case ixgbe_mac_82598EB:
8872 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8875 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8879 /* don't check link if we failed to enumerate functions */
8880 if (expected_gts > 0)
8881 ixgbe_check_minimum_link(adapter, expected_gts);
8883 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8885 strlcpy(part_str, "Unknown", sizeof(part_str));
8886 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8887 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8888 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8891 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8892 hw->mac.type, hw->phy.type, part_str);
8894 e_dev_info("%pM\n", netdev->dev_addr);
8896 /* reset the hardware with the new settings */
8897 err = hw->mac.ops.start_hw(hw);
8898 if (err == IXGBE_ERR_EEPROM_VERSION) {
8899 /* We are running on a pre-production device, log a warning */
8900 e_dev_warn("This device is a pre-production adapter/LOM. "
8901 "Please be aware there may be issues associated "
8902 "with your hardware. If you are experiencing "
8903 "problems please contact your Intel or hardware "
8904 "representative who provided you with this "
8907 strcpy(netdev->name, "eth%d");
8908 err = register_netdev(netdev);
8912 pci_set_drvdata(pdev, adapter);
8914 /* power down the optics for 82599 SFP+ fiber */
8915 if (hw->mac.ops.disable_tx_laser)
8916 hw->mac.ops.disable_tx_laser(hw);
8918 /* carrier off reporting is important to ethtool even BEFORE open */
8919 netif_carrier_off(netdev);
8921 #ifdef CONFIG_IXGBE_DCA
8922 if (dca_add_requester(&pdev->dev) == 0) {
8923 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8924 ixgbe_setup_dca(adapter);
8927 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8928 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8929 for (i = 0; i < adapter->num_vfs; i++)
8930 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8933 /* firmware requires driver version to be 0xFFFFFFFF
8934 * since os does not support feature
8936 if (hw->mac.ops.set_fw_drv_ver)
8937 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8940 /* add san mac addr to netdev */
8941 ixgbe_add_sanmac_netdev(netdev);
8943 e_dev_info("%s\n", ixgbe_default_device_descr);
8945 #ifdef CONFIG_IXGBE_HWMON
8946 if (ixgbe_sysfs_init(adapter))
8947 e_err(probe, "failed to allocate sysfs resources\n");
8948 #endif /* CONFIG_IXGBE_HWMON */
8950 ixgbe_dbg_adapter_init(adapter);
8952 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8953 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8954 hw->mac.ops.setup_link(hw,
8955 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8961 ixgbe_release_hw_control(adapter);
8962 ixgbe_clear_interrupt_scheme(adapter);
8964 ixgbe_disable_sriov(adapter);
8965 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8966 iounmap(adapter->io_addr);
8967 kfree(adapter->mac_table);
8969 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8970 free_netdev(netdev);
8972 pci_release_selected_regions(pdev,
8973 pci_select_bars(pdev, IORESOURCE_MEM));
8976 if (!adapter || disable_dev)
8977 pci_disable_device(pdev);
8982 * ixgbe_remove - Device Removal Routine
8983 * @pdev: PCI device information struct
8985 * ixgbe_remove is called by the PCI subsystem to alert the driver
8986 * that it should release a PCI device. The could be caused by a
8987 * Hot-Plug event, or because the driver is going to be removed from
8990 static void ixgbe_remove(struct pci_dev *pdev)
8992 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8993 struct net_device *netdev;
8996 /* if !adapter then we already cleaned up in probe */
9000 netdev = adapter->netdev;
9001 ixgbe_dbg_adapter_exit(adapter);
9003 set_bit(__IXGBE_REMOVING, &adapter->state);
9004 cancel_work_sync(&adapter->service_task);
9007 #ifdef CONFIG_IXGBE_DCA
9008 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9009 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9010 dca_remove_requester(&pdev->dev);
9011 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
9015 #ifdef CONFIG_IXGBE_HWMON
9016 ixgbe_sysfs_exit(adapter);
9017 #endif /* CONFIG_IXGBE_HWMON */
9019 /* remove the added san mac */
9020 ixgbe_del_sanmac_netdev(netdev);
9022 if (netdev->reg_state == NETREG_REGISTERED)
9023 unregister_netdev(netdev);
9025 #ifdef CONFIG_PCI_IOV
9026 ixgbe_disable_sriov(adapter);
9028 ixgbe_clear_interrupt_scheme(adapter);
9030 ixgbe_release_hw_control(adapter);
9033 kfree(adapter->ixgbe_ieee_pfc);
9034 kfree(adapter->ixgbe_ieee_ets);
9037 iounmap(adapter->io_addr);
9038 pci_release_selected_regions(pdev, pci_select_bars(pdev,
9041 e_dev_info("complete\n");
9043 kfree(adapter->mac_table);
9044 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9045 free_netdev(netdev);
9047 pci_disable_pcie_error_reporting(pdev);
9050 pci_disable_device(pdev);
9054 * ixgbe_io_error_detected - called when PCI error is detected
9055 * @pdev: Pointer to PCI device
9056 * @state: The current pci connection state
9058 * This function is called after a PCI bus error affecting
9059 * this device has been detected.
9061 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9062 pci_channel_state_t state)
9064 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9065 struct net_device *netdev = adapter->netdev;
9067 #ifdef CONFIG_PCI_IOV
9068 struct ixgbe_hw *hw = &adapter->hw;
9069 struct pci_dev *bdev, *vfdev;
9070 u32 dw0, dw1, dw2, dw3;
9072 u16 req_id, pf_func;
9074 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9075 adapter->num_vfs == 0)
9076 goto skip_bad_vf_detection;
9078 bdev = pdev->bus->self;
9079 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9080 bdev = bdev->bus->self;
9083 goto skip_bad_vf_detection;
9085 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9087 goto skip_bad_vf_detection;
9089 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9090 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9091 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9092 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9093 if (ixgbe_removed(hw->hw_addr))
9094 goto skip_bad_vf_detection;
9097 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9098 if (!(req_id & 0x0080))
9099 goto skip_bad_vf_detection;
9101 pf_func = req_id & 0x01;
9102 if ((pf_func & 1) == (pdev->devfn & 1)) {
9103 unsigned int device_id;
9105 vf = (req_id & 0x7F) >> 1;
9106 e_dev_err("VF %d has caused a PCIe error\n", vf);
9107 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9108 "%8.8x\tdw3: %8.8x\n",
9109 dw0, dw1, dw2, dw3);
9110 switch (adapter->hw.mac.type) {
9111 case ixgbe_mac_82599EB:
9112 device_id = IXGBE_82599_VF_DEVICE_ID;
9114 case ixgbe_mac_X540:
9115 device_id = IXGBE_X540_VF_DEVICE_ID;
9117 case ixgbe_mac_X550:
9118 device_id = IXGBE_DEV_ID_X550_VF;
9120 case ixgbe_mac_X550EM_x:
9121 device_id = IXGBE_DEV_ID_X550EM_X_VF;
9128 /* Find the pci device of the offending VF */
9129 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9131 if (vfdev->devfn == (req_id & 0xFF))
9133 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9137 * There's a slim chance the VF could have been hot plugged,
9138 * so if it is no longer present we don't need to issue the
9139 * VFLR. Just clean up the AER in that case.
9142 ixgbe_issue_vf_flr(adapter, vfdev);
9143 /* Free device reference count */
9147 pci_cleanup_aer_uncorrect_error_status(pdev);
9151 * Even though the error may have occurred on the other port
9152 * we still need to increment the vf error reference count for
9153 * both ports because the I/O resume function will be called
9156 adapter->vferr_refcount++;
9158 return PCI_ERS_RESULT_RECOVERED;
9160 skip_bad_vf_detection:
9161 #endif /* CONFIG_PCI_IOV */
9162 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9163 return PCI_ERS_RESULT_DISCONNECT;
9166 netif_device_detach(netdev);
9168 if (state == pci_channel_io_perm_failure) {
9170 return PCI_ERS_RESULT_DISCONNECT;
9173 if (netif_running(netdev))
9174 ixgbe_down(adapter);
9176 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9177 pci_disable_device(pdev);
9180 /* Request a slot reset. */
9181 return PCI_ERS_RESULT_NEED_RESET;
9185 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9186 * @pdev: Pointer to PCI device
9188 * Restart the card from scratch, as if from a cold-boot.
9190 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9192 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9193 pci_ers_result_t result;
9196 if (pci_enable_device_mem(pdev)) {
9197 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9198 result = PCI_ERS_RESULT_DISCONNECT;
9200 smp_mb__before_atomic();
9201 clear_bit(__IXGBE_DISABLED, &adapter->state);
9202 adapter->hw.hw_addr = adapter->io_addr;
9203 pci_set_master(pdev);
9204 pci_restore_state(pdev);
9205 pci_save_state(pdev);
9207 pci_wake_from_d3(pdev, false);
9209 ixgbe_reset(adapter);
9210 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9211 result = PCI_ERS_RESULT_RECOVERED;
9214 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9216 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9217 "failed 0x%0x\n", err);
9218 /* non-fatal, continue */
9225 * ixgbe_io_resume - called when traffic can start flowing again.
9226 * @pdev: Pointer to PCI device
9228 * This callback is called when the error recovery driver tells us that
9229 * its OK to resume normal operation.
9231 static void ixgbe_io_resume(struct pci_dev *pdev)
9233 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9234 struct net_device *netdev = adapter->netdev;
9236 #ifdef CONFIG_PCI_IOV
9237 if (adapter->vferr_refcount) {
9238 e_info(drv, "Resuming after VF err\n");
9239 adapter->vferr_refcount--;
9244 if (netif_running(netdev))
9247 netif_device_attach(netdev);
9250 static const struct pci_error_handlers ixgbe_err_handler = {
9251 .error_detected = ixgbe_io_error_detected,
9252 .slot_reset = ixgbe_io_slot_reset,
9253 .resume = ixgbe_io_resume,
9256 static struct pci_driver ixgbe_driver = {
9257 .name = ixgbe_driver_name,
9258 .id_table = ixgbe_pci_tbl,
9259 .probe = ixgbe_probe,
9260 .remove = ixgbe_remove,
9262 .suspend = ixgbe_suspend,
9263 .resume = ixgbe_resume,
9265 .shutdown = ixgbe_shutdown,
9266 .sriov_configure = ixgbe_pci_sriov_configure,
9267 .err_handler = &ixgbe_err_handler
9271 * ixgbe_init_module - Driver Registration Routine
9273 * ixgbe_init_module is the first routine called when the driver is
9274 * loaded. All it does is register with the PCI subsystem.
9276 static int __init ixgbe_init_module(void)
9279 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9280 pr_info("%s\n", ixgbe_copyright);
9284 ret = pci_register_driver(&ixgbe_driver);
9290 #ifdef CONFIG_IXGBE_DCA
9291 dca_register_notify(&dca_notifier);
9297 module_init(ixgbe_init_module);
9300 * ixgbe_exit_module - Driver Exit Cleanup Routine
9302 * ixgbe_exit_module is called just before the driver is removed
9305 static void __exit ixgbe_exit_module(void)
9307 #ifdef CONFIG_IXGBE_DCA
9308 dca_unregister_notify(&dca_notifier);
9310 pci_unregister_driver(&ixgbe_driver);
9315 #ifdef CONFIG_IXGBE_DCA
9316 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9321 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9322 __ixgbe_notify_dca);
9324 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9327 #endif /* CONFIG_IXGBE_DCA */
9329 module_exit(ixgbe_exit_module);