drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2015 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/vxlan.h>
  54
  55 #ifdef CONFIG_OF
  56 #include <linux/of_net.h>
  57 #endif
  58
  59 #ifdef CONFIG_SPARC
  60 #include <asm/idprom.h>
  61 #include <asm/prom.h>
  62 #endif
  63
  64 #include "ixgbe.h"
  65 #include "ixgbe_common.h"
  66 #include "ixgbe_dcb_82599.h"
  67 #include "ixgbe_sriov.h"
  68 #ifdef CONFIG_IXGBE_VXLAN
  69 #include <net/vxlan.h>
  70 #endif
  71
  72 char ixgbe_driver_name[] = "ixgbe";
  73 static const char ixgbe_driver_string[] =
  74                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  75 #ifdef IXGBE_FCOE
  76 char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #else
  79 static char ixgbe_default_device_descr[] =
  80                               "Intel(R) 10 Gigabit Network Connection";
  81 #endif
  82 #define DRV_VERSION "4.0.1-k"
  83 const char ixgbe_driver_version[] = DRV_VERSION;
  84 static const char ixgbe_copyright[] =
  85                                 "Copyright (c) 1999-2015 Intel Corporation.";
  86
  87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  88
  89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  90         [board_82598]           = &ixgbe_82598_info,
  91         [board_82599]           = &ixgbe_82599_info,
  92         [board_X540]            = &ixgbe_X540_info,
  93         [board_X550]            = &ixgbe_X550_info,
  94         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 140         /* required last entry */
 141         {0, }
 142 };
 143 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 144
 145 #ifdef CONFIG_IXGBE_DCA
 146 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 147                             void *p);
 148 static struct notifier_block dca_notifier = {
 149         .notifier_call = ixgbe_notify_dca,
 150         .next          = NULL,
 151         .priority      = 0
 152 };
 153 #endif
 154
 155 #ifdef CONFIG_PCI_IOV
 156 static unsigned int max_vfs;
 157 module_param(max_vfs, uint, 0);
 158 MODULE_PARM_DESC(max_vfs,
 159                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 160 #endif /* CONFIG_PCI_IOV */
 161
 162 static unsigned int allow_unsupported_sfp;
 163 module_param(allow_unsupported_sfp, uint, 0);
 164 MODULE_PARM_DESC(allow_unsupported_sfp,
 165                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 166
 167 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 168 static int debug = -1;
 169 module_param(debug, int, 0);
 170 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 171
 172 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 173 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 174 MODULE_LICENSE("GPL");
 175 MODULE_VERSION(DRV_VERSION);
 176
 177 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 178
 179 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 180                                           u32 reg, u16 *value)
 181 {
 182         struct pci_dev *parent_dev;
 183         struct pci_bus *parent_bus;
 184
 185         parent_bus = adapter->pdev->bus->parent;
 186         if (!parent_bus)
 187                 return -1;
 188
 189         parent_dev = parent_bus->self;
 190         if (!parent_dev)
 191                 return -1;
 192
 193         if (!pci_is_pcie(parent_dev))
 194                 return -1;
 195
 196         pcie_capability_read_word(parent_dev, reg, value);
 197         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 198             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 199                 return -1;
 200         return 0;
 201 }
 202
 203 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 204 {
 205         struct ixgbe_hw *hw = &adapter->hw;
 206         u16 link_status = 0;
 207         int err;
 208
 209         hw->bus.type = ixgbe_bus_type_pci_express;
 210
 211         /* Get the negotiated link width and speed from PCI config space of the
 212          * parent, as this device is behind a switch
 213          */
 214         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 215
 216         /* assume caller will handle error case */
 217         if (err)
 218                 return err;
 219
 220         hw->bus.width = ixgbe_convert_bus_width(link_status);
 221         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 222
 223         return 0;
 224 }
 225
 226 /**
 227  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 228  * @hw: hw specific details
 229  *
 230  * This function is used by probe to determine whether a device's PCI-Express
 231  * bandwidth details should be gathered from the parent bus instead of from the
 232  * device. Used to ensure that various locations all have the correct device ID
 233  * checks.
 234  */
 235 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 236 {
 237         switch (hw->device_id) {
 238         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 239         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 240                 return true;
 241         default:
 242                 return false;
 243         }
 244 }
 245
 246 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 247                                      int expected_gts)
 248 {
 249         struct ixgbe_hw *hw = &adapter->hw;
 250         int max_gts = 0;
 251         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 252         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 253         struct pci_dev *pdev;
 254
 255         /* Some devices are not connected over PCIe and thus do not negotiate
 256          * speed. These devices do not have valid bus info, and thus any report
 257          * we generate may not be correct.
 258          */
 259         if (hw->bus.type == ixgbe_bus_type_internal)
 260                 return;
 261
 262         /* determine whether to use the parent device */
 263         if (ixgbe_pcie_from_parent(&adapter->hw))
 264                 pdev = adapter->pdev->bus->parent->self;
 265         else
 266                 pdev = adapter->pdev;
 267
 268         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 269             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 270                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 271                 return;
 272         }
 273
 274         switch (speed) {
 275         case PCIE_SPEED_2_5GT:
 276                 /* 8b/10b encoding reduces max throughput by 20% */
 277                 max_gts = 2 * width;
 278                 break;
 279         case PCIE_SPEED_5_0GT:
 280                 /* 8b/10b encoding reduces max throughput by 20% */
 281                 max_gts = 4 * width;
 282                 break;
 283         case PCIE_SPEED_8_0GT:
 284                 /* 128b/130b encoding reduces throughput by less than 2% */
 285                 max_gts = 8 * width;
 286                 break;
 287         default:
 288                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 289                 return;
 290         }
 291
 292         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 293                    max_gts);
 294         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 295                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 296                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 297                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 298                     "Unknown"),
 299                    width,
 300                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 301                     speed == PCIE_SPEED_5_0GT ? "20%" :
 302                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 303                     "Unknown"));
 304
 305         if (max_gts < expected_gts) {
 306                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 307                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 308                         expected_gts);
 309                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 310         }
 311 }
 312
 313 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 314 {
 315         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 316             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 317             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 318                 schedule_work(&adapter->service_task);
 319 }
 320
 321 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 322 {
 323         struct ixgbe_adapter *adapter = hw->back;
 324
 325         if (!hw->hw_addr)
 326                 return;
 327         hw->hw_addr = NULL;
 328         e_dev_err("Adapter removed\n");
 329         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 330                 ixgbe_service_event_schedule(adapter);
 331 }
 332
 333 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 334 {
 335         u32 value;
 336
 337         /* The following check not only optimizes a bit by not
 338          * performing a read on the status register when the
 339          * register just read was a status register read that
 340          * returned IXGBE_FAILED_READ_REG. It also blocks any
 341          * potential recursion.
 342          */
 343         if (reg == IXGBE_STATUS) {
 344                 ixgbe_remove_adapter(hw);
 345                 return;
 346         }
 347         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 348         if (value == IXGBE_FAILED_READ_REG)
 349                 ixgbe_remove_adapter(hw);
 350 }
 351
 352 /**
 353  * ixgbe_read_reg - Read from device register
 354  * @hw: hw specific details
 355  * @reg: offset of register to read
 356  *
 357  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 358  *
 359  * This function is used to read device registers. It checks for device
 360  * removal by confirming any read that returns all ones by checking the
 361  * status register value for all ones. This function avoids reading from
 362  * the hardware if a removal was previously detected in which case it
 363  * returns IXGBE_FAILED_READ_REG (all ones).
 364  */
 365 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 366 {
 367         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 368         u32 value;
 369
 370         if (ixgbe_removed(reg_addr))
 371                 return IXGBE_FAILED_READ_REG;
 372         value = readl(reg_addr + reg);
 373         if (unlikely(value == IXGBE_FAILED_READ_REG))
 374                 ixgbe_check_remove(hw, reg);
 375         return value;
 376 }
 377
 378 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 379 {
 380         u16 value;
 381
 382         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 383         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 384                 ixgbe_remove_adapter(hw);
 385                 return true;
 386         }
 387         return false;
 388 }
 389
 390 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 391 {
 392         struct ixgbe_adapter *adapter = hw->back;
 393         u16 value;
 394
 395         if (ixgbe_removed(hw->hw_addr))
 396                 return IXGBE_FAILED_READ_CFG_WORD;
 397         pci_read_config_word(adapter->pdev, reg, &value);
 398         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 399             ixgbe_check_cfg_remove(hw, adapter->pdev))
 400                 return IXGBE_FAILED_READ_CFG_WORD;
 401         return value;
 402 }
 403
 404 #ifdef CONFIG_PCI_IOV
 405 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 406 {
 407         struct ixgbe_adapter *adapter = hw->back;
 408         u32 value;
 409
 410         if (ixgbe_removed(hw->hw_addr))
 411                 return IXGBE_FAILED_READ_CFG_DWORD;
 412         pci_read_config_dword(adapter->pdev, reg, &value);
 413         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 414             ixgbe_check_cfg_remove(hw, adapter->pdev))
 415                 return IXGBE_FAILED_READ_CFG_DWORD;
 416         return value;
 417 }
 418 #endif /* CONFIG_PCI_IOV */
 419
 420 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 421 {
 422         struct ixgbe_adapter *adapter = hw->back;
 423
 424         if (ixgbe_removed(hw->hw_addr))
 425                 return;
 426         pci_write_config_word(adapter->pdev, reg, value);
 427 }
 428
 429 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 430 {
 431         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 432
 433         /* flush memory to make sure state is correct before next watchdog */
 434         smp_mb__before_atomic();
 435         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 436 }
 437
 438 struct ixgbe_reg_info {
 439         u32 ofs;
 440         char *name;
 441 };
 442
 443 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 444
 445         /* General Registers */
 446         {IXGBE_CTRL, "CTRL"},
 447         {IXGBE_STATUS, "STATUS"},
 448         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 449
 450         /* Interrupt Registers */
 451         {IXGBE_EICR, "EICR"},
 452
 453         /* RX Registers */
 454         {IXGBE_SRRCTL(0), "SRRCTL"},
 455         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 456         {IXGBE_RDLEN(0), "RDLEN"},
 457         {IXGBE_RDH(0), "RDH"},
 458         {IXGBE_RDT(0), "RDT"},
 459         {IXGBE_RXDCTL(0), "RXDCTL"},
 460         {IXGBE_RDBAL(0), "RDBAL"},
 461         {IXGBE_RDBAH(0), "RDBAH"},
 462
 463         /* TX Registers */
 464         {IXGBE_TDBAL(0), "TDBAL"},
 465         {IXGBE_TDBAH(0), "TDBAH"},
 466         {IXGBE_TDLEN(0), "TDLEN"},
 467         {IXGBE_TDH(0), "TDH"},
 468         {IXGBE_TDT(0), "TDT"},
 469         {IXGBE_TXDCTL(0), "TXDCTL"},
 470
 471         /* List Terminator */
 472         { .name = NULL }
 473 };
 474
 475
 476 /*
 477  * ixgbe_regdump - register printout routine
 478  */
 479 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 480 {
 481         int i = 0, j = 0;
 482         char rname[16];
 483         u32 regs[64];
 484
 485         switch (reginfo->ofs) {
 486         case IXGBE_SRRCTL(0):
 487                 for (i = 0; i < 64; i++)
 488                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 489                 break;
 490         case IXGBE_DCA_RXCTRL(0):
 491                 for (i = 0; i < 64; i++)
 492                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 493                 break;
 494         case IXGBE_RDLEN(0):
 495                 for (i = 0; i < 64; i++)
 496                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 497                 break;
 498         case IXGBE_RDH(0):
 499                 for (i = 0; i < 64; i++)
 500                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 501                 break;
 502         case IXGBE_RDT(0):
 503                 for (i = 0; i < 64; i++)
 504                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 505                 break;
 506         case IXGBE_RXDCTL(0):
 507                 for (i = 0; i < 64; i++)
 508                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 509                 break;
 510         case IXGBE_RDBAL(0):
 511                 for (i = 0; i < 64; i++)
 512                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 513                 break;
 514         case IXGBE_RDBAH(0):
 515                 for (i = 0; i < 64; i++)
 516                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 517                 break;
 518         case IXGBE_TDBAL(0):
 519                 for (i = 0; i < 64; i++)
 520                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 521                 break;
 522         case IXGBE_TDBAH(0):
 523                 for (i = 0; i < 64; i++)
 524                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 525                 break;
 526         case IXGBE_TDLEN(0):
 527                 for (i = 0; i < 64; i++)
 528                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 529                 break;
 530         case IXGBE_TDH(0):
 531                 for (i = 0; i < 64; i++)
 532                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 533                 break;
 534         case IXGBE_TDT(0):
 535                 for (i = 0; i < 64; i++)
 536                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 537                 break;
 538         case IXGBE_TXDCTL(0):
 539                 for (i = 0; i < 64; i++)
 540                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 541                 break;
 542         default:
 543                 pr_info("%-15s %08x\n", reginfo->name,
 544                         IXGBE_READ_REG(hw, reginfo->ofs));
 545                 return;
 546         }
 547
 548         for (i = 0; i < 8; i++) {
 549                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 550                 pr_err("%-15s", rname);
 551                 for (j = 0; j < 8; j++)
 552                         pr_cont(" %08x", regs[i*8+j]);
 553                 pr_cont("\n");
 554         }
 555
 556 }
 557
 558 /*
 559  * ixgbe_dump - Print registers, tx-rings and rx-rings
 560  */
 561 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 562 {
 563         struct net_device *netdev = adapter->netdev;
 564         struct ixgbe_hw *hw = &adapter->hw;
 565         struct ixgbe_reg_info *reginfo;
 566         int n = 0;
 567         struct ixgbe_ring *tx_ring;
 568         struct ixgbe_tx_buffer *tx_buffer;
 569         union ixgbe_adv_tx_desc *tx_desc;
 570         struct my_u0 { u64 a; u64 b; } *u0;
 571         struct ixgbe_ring *rx_ring;
 572         union ixgbe_adv_rx_desc *rx_desc;
 573         struct ixgbe_rx_buffer *rx_buffer_info;
 574         u32 staterr;
 575         int i = 0;
 576
 577         if (!netif_msg_hw(adapter))
 578                 return;
 579
 580         /* Print netdevice Info */
 581         if (netdev) {
 582                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 583                 pr_info("Device Name     state            "
 584                         "trans_start      last_rx\n");
 585                 pr_info("%-15s %016lX %016lX %016lX\n",
 586                         netdev->name,
 587                         netdev->state,
 588                         netdev->trans_start,
 589                         netdev->last_rx);
 590         }
 591
 592         /* Print Registers */
 593         dev_info(&adapter->pdev->dev, "Register Dump\n");
 594         pr_info(" Register Name   Value\n");
 595         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 596              reginfo->name; reginfo++) {
 597                 ixgbe_regdump(hw, reginfo);
 598         }
 599
 600         /* Print TX Ring Summary */
 601         if (!netdev || !netif_running(netdev))
 602                 return;
 603
 604         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 605         pr_info(" %s     %s              %s        %s\n",
 606                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 607                 "leng", "ntw", "timestamp");
 608         for (n = 0; n < adapter->num_tx_queues; n++) {
 609                 tx_ring = adapter->tx_ring[n];
 610                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 611                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 612                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 613                            (u64)dma_unmap_addr(tx_buffer, dma),
 614                            dma_unmap_len(tx_buffer, len),
 615                            tx_buffer->next_to_watch,
 616                            (u64)tx_buffer->time_stamp);
 617         }
 618
 619         /* Print TX Rings */
 620         if (!netif_msg_tx_done(adapter))
 621                 goto rx_ring_summary;
 622
 623         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 624
 625         /* Transmit Descriptor Formats
 626          *
 627          * 82598 Advanced Transmit Descriptor
 628          *   +--------------------------------------------------------------+
 629          * 0 |         Buffer Address [63:0]                                |
 630          *   +--------------------------------------------------------------+
 631          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 632          *   +--------------------------------------------------------------+
 633          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 634          *
 635          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 636          *   +--------------------------------------------------------------+
 637          * 0 |                          RSV [63:0]                          |
 638          *   +--------------------------------------------------------------+
 639          * 8 |            RSV           |  STA  |          NXTSEQ           |
 640          *   +--------------------------------------------------------------+
 641          *   63                       36 35   32 31                         0
 642          *
 643          * 82599+ Advanced Transmit Descriptor
 644          *   +--------------------------------------------------------------+
 645          * 0 |         Buffer Address [63:0]                                |
 646          *   +--------------------------------------------------------------+
 647          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 648          *   +--------------------------------------------------------------+
 649          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 650          *
 651          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 652          *   +--------------------------------------------------------------+
 653          * 0 |                          RSV [63:0]                          |
 654          *   +--------------------------------------------------------------+
 655          * 8 |            RSV           |  STA  |           RSV             |
 656          *   +--------------------------------------------------------------+
 657          *   63                       36 35   32 31                         0
 658          */
 659
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 tx_ring = adapter->tx_ring[n];
 662                 pr_info("------------------------------------\n");
 663                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 664                 pr_info("------------------------------------\n");
 665                 pr_info("%s%s    %s              %s        %s          %s\n",
 666                         "T [desc]     [address 63:0  ] ",
 667                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 668                         "leng", "ntw", "timestamp", "bi->skb");
 669
 670                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 671                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 672                         tx_buffer = &tx_ring->tx_buffer_info[i];
 673                         u0 = (struct my_u0 *)tx_desc;
 674                         if (dma_unmap_len(tx_buffer, len) > 0) {
 675                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 676                                         i,
 677                                         le64_to_cpu(u0->a),
 678                                         le64_to_cpu(u0->b),
 679                                         (u64)dma_unmap_addr(tx_buffer, dma),
 680                                         dma_unmap_len(tx_buffer, len),
 681                                         tx_buffer->next_to_watch,
 682                                         (u64)tx_buffer->time_stamp,
 683                                         tx_buffer->skb);
 684                                 if (i == tx_ring->next_to_use &&
 685                                         i == tx_ring->next_to_clean)
 686                                         pr_cont(" NTC/U\n");
 687                                 else if (i == tx_ring->next_to_use)
 688                                         pr_cont(" NTU\n");
 689                                 else if (i == tx_ring->next_to_clean)
 690                                         pr_cont(" NTC\n");
 691                                 else
 692                                         pr_cont("\n");
 693
 694                                 if (netif_msg_pktdata(adapter) &&
 695                                     tx_buffer->skb)
 696                                         print_hex_dump(KERN_INFO, "",
 697                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 698                                                 tx_buffer->skb->data,
 699                                                 dma_unmap_len(tx_buffer, len),
 700                                                 true);
 701                         }
 702                 }
 703         }
 704
 705         /* Print RX Rings Summary */
 706 rx_ring_summary:
 707         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 708         pr_info("Queue [NTU] [NTC]\n");
 709         for (n = 0; n < adapter->num_rx_queues; n++) {
 710                 rx_ring = adapter->rx_ring[n];
 711                 pr_info("%5d %5X %5X\n",
 712                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 713         }
 714
 715         /* Print RX Rings */
 716         if (!netif_msg_rx_status(adapter))
 717                 return;
 718
 719         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 720
 721         /* Receive Descriptor Formats
 722          *
 723          * 82598 Advanced Receive Descriptor (Read) Format
 724          *    63                                           1        0
 725          *    +-----------------------------------------------------+
 726          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 727          *    +----------------------------------------------+------+
 728          *  8 |       Header Buffer Address [63:1]           |  DD  |
 729          *    +-----------------------------------------------------+
 730          *
 731          *
 732          * 82598 Advanced Receive Descriptor (Write-Back) Format
 733          *
 734          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 735          *   +------------------------------------------------------+
 736          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 737          *   | Packet   | IP     |   |          |     | Type | Type |
 738          *   | Checksum | Ident  |   |          |     |      |      |
 739          *   +------------------------------------------------------+
 740          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 741          *   +------------------------------------------------------+
 742          *   63       48 47    32 31            20 19               0
 743          *
 744          * 82599+ Advanced Receive Descriptor (Read) Format
 745          *    63                                           1        0
 746          *    +-----------------------------------------------------+
 747          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 748          *    +----------------------------------------------+------+
 749          *  8 |       Header Buffer Address [63:1]           |  DD  |
 750          *    +-----------------------------------------------------+
 751          *
 752          *
 753          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 754          *
 755          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 756          *   +------------------------------------------------------+
 757          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 758          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 759          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 760          *   +------------------------------------------------------+
 761          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 762          *   +------------------------------------------------------+
 763          *   63       48 47    32 31          20 19                 0
 764          */
 765
 766         for (n = 0; n < adapter->num_rx_queues; n++) {
 767                 rx_ring = adapter->rx_ring[n];
 768                 pr_info("------------------------------------\n");
 769                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 770                 pr_info("------------------------------------\n");
 771                 pr_info("%s%s%s",
 772                         "R  [desc]      [ PktBuf     A0] ",
 773                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 774                         "<-- Adv Rx Read format\n");
 775                 pr_info("%s%s%s",
 776                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 777                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 778                         "<-- Adv Rx Write-Back format\n");
 779
 780                 for (i = 0; i < rx_ring->count; i++) {
 781                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 782                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 783                         u0 = (struct my_u0 *)rx_desc;
 784                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 785                         if (staterr & IXGBE_RXD_STAT_DD) {
 786                                 /* Descriptor Done */
 787                                 pr_info("RWB[0x%03X]     %016llX "
 788                                         "%016llX ---------------- %p", i,
 789                                         le64_to_cpu(u0->a),
 790                                         le64_to_cpu(u0->b),
 791                                         rx_buffer_info->skb);
 792                         } else {
 793                                 pr_info("R  [0x%03X]     %016llX "
 794                                         "%016llX %016llX %p", i,
 795                                         le64_to_cpu(u0->a),
 796                                         le64_to_cpu(u0->b),
 797                                         (u64)rx_buffer_info->dma,
 798                                         rx_buffer_info->skb);
 799
 800                                 if (netif_msg_pktdata(adapter) &&
 801                                     rx_buffer_info->dma) {
 802                                         print_hex_dump(KERN_INFO, "",
 803                                            DUMP_PREFIX_ADDRESS, 16, 1,
 804                                            page_address(rx_buffer_info->page) +
 805                                                     rx_buffer_info->page_offset,
 806                                            ixgbe_rx_bufsz(rx_ring), true);
 807                                 }
 808                         }
 809
 810                         if (i == rx_ring->next_to_use)
 811                                 pr_cont(" NTU\n");
 812                         else if (i == rx_ring->next_to_clean)
 813                                 pr_cont(" NTC\n");
 814                         else
 815                                 pr_cont("\n");
 816
 817                 }
 818         }
 819 }
 820
 821 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 822 {
 823         u32 ctrl_ext;
 824
 825         /* Let firmware take over control of h/w */
 826         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 827         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 828                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 829 }
 830
 831 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 832 {
 833         u32 ctrl_ext;
 834
 835         /* Let firmware know the driver has taken over */
 836         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 837         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 838                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 839 }
 840
 841 /**
 842  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 843  * @adapter: pointer to adapter struct
 844  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 845  * @queue: queue to map the corresponding interrupt to
 846  * @msix_vector: the vector to map to the corresponding queue
 847  *
 848  */
 849 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 850                            u8 queue, u8 msix_vector)
 851 {
 852         u32 ivar, index;
 853         struct ixgbe_hw *hw = &adapter->hw;
 854         switch (hw->mac.type) {
 855         case ixgbe_mac_82598EB:
 856                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 857                 if (direction == -1)
 858                         direction = 0;
 859                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 860                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 861                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 862                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 863                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 864                 break;
 865         case ixgbe_mac_82599EB:
 866         case ixgbe_mac_X540:
 867         case ixgbe_mac_X550:
 868         case ixgbe_mac_X550EM_x:
 869                 if (direction == -1) {
 870                         /* other causes */
 871                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 872                         index = ((queue & 1) * 8);
 873                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 874                         ivar &= ~(0xFF << index);
 875                         ivar |= (msix_vector << index);
 876                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 877                         break;
 878                 } else {
 879                         /* tx or rx causes */
 880                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 881                         index = ((16 * (queue & 1)) + (8 * direction));
 882                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 883                         ivar &= ~(0xFF << index);
 884                         ivar |= (msix_vector << index);
 885                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 886                         break;
 887                 }
 888         default:
 889                 break;
 890         }
 891 }
 892
 893 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 894                                           u64 qmask)
 895 {
 896         u32 mask;
 897
 898         switch (adapter->hw.mac.type) {
 899         case ixgbe_mac_82598EB:
 900                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 901                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 902                 break;
 903         case ixgbe_mac_82599EB:
 904         case ixgbe_mac_X540:
 905         case ixgbe_mac_X550:
 906         case ixgbe_mac_X550EM_x:
 907                 mask = (qmask & 0xFFFFFFFF);
 908                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 909                 mask = (qmask >> 32);
 910                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 911                 break;
 912         default:
 913                 break;
 914         }
 915 }
 916
 917 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 918                                       struct ixgbe_tx_buffer *tx_buffer)
 919 {
 920         if (tx_buffer->skb) {
 921                 dev_kfree_skb_any(tx_buffer->skb);
 922                 if (dma_unmap_len(tx_buffer, len))
 923                         dma_unmap_single(ring->dev,
 924                                          dma_unmap_addr(tx_buffer, dma),
 925                                          dma_unmap_len(tx_buffer, len),
 926                                          DMA_TO_DEVICE);
 927         } else if (dma_unmap_len(tx_buffer, len)) {
 928                 dma_unmap_page(ring->dev,
 929                                dma_unmap_addr(tx_buffer, dma),
 930                                dma_unmap_len(tx_buffer, len),
 931                                DMA_TO_DEVICE);
 932         }
 933         tx_buffer->next_to_watch = NULL;
 934         tx_buffer->skb = NULL;
 935         dma_unmap_len_set(tx_buffer, len, 0);
 936         /* tx_buffer must be completely set up in the transmit path */
 937 }
 938
 939 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 940 {
 941         struct ixgbe_hw *hw = &adapter->hw;
 942         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 943         int i;
 944         u32 data;
 945
 946         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 947             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 948                 return;
 949
 950         switch (hw->mac.type) {
 951         case ixgbe_mac_82598EB:
 952                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 953                 break;
 954         default:
 955                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 956         }
 957         hwstats->lxoffrxc += data;
 958
 959         /* refill credits (no tx hang) if we received xoff */
 960         if (!data)
 961                 return;
 962
 963         for (i = 0; i < adapter->num_tx_queues; i++)
 964                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 965                           &adapter->tx_ring[i]->state);
 966 }
 967
 968 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 969 {
 970         struct ixgbe_hw *hw = &adapter->hw;
 971         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 972         u32 xoff[8] = {0};
 973         u8 tc;
 974         int i;
 975         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 976
 977         if (adapter->ixgbe_ieee_pfc)
 978                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 979
 980         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 981                 ixgbe_update_xoff_rx_lfc(adapter);
 982                 return;
 983         }
 984
 985         /* update stats for each tc, only valid with PFC enabled */
 986         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 987                 u32 pxoffrxc;
 988
 989                 switch (hw->mac.type) {
 990                 case ixgbe_mac_82598EB:
 991                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 992                         break;
 993                 default:
 994                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 995                 }
 996                 hwstats->pxoffrxc[i] += pxoffrxc;
 997                 /* Get the TC for given UP */
 998                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 999                 xoff[tc] += pxoffrxc;
1000         }
1001
1002         /* disarm tx queues that have received xoff frames */
1003         for (i = 0; i < adapter->num_tx_queues; i++) {
1004                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1005
1006                 tc = tx_ring->dcb_tc;
1007                 if (xoff[tc])
1008                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1009         }
1010 }
1011
1012 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1013 {
1014         return ring->stats.packets;
1015 }
1016
1017 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1018 {
1019         struct ixgbe_adapter *adapter;
1020         struct ixgbe_hw *hw;
1021         u32 head, tail;
1022
1023         if (ring->l2_accel_priv)
1024                 adapter = ring->l2_accel_priv->real_adapter;
1025         else
1026                 adapter = netdev_priv(ring->netdev);
1027
1028         hw = &adapter->hw;
1029         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1030         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1031
1032         if (head != tail)
1033                 return (head < tail) ?
1034                         tail - head : (tail + ring->count - head);
1035
1036         return 0;
1037 }
1038
1039 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1040 {
1041         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1042         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1043         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1044
1045         clear_check_for_tx_hang(tx_ring);
1046
1047         /*
1048          * Check for a hung queue, but be thorough. This verifies
1049          * that a transmit has been completed since the previous
1050          * check AND there is at least one packet pending. The
1051          * ARMED bit is set to indicate a potential hang. The
1052          * bit is cleared if a pause frame is received to remove
1053          * false hang detection due to PFC or 802.3x frames. By
1054          * requiring this to fail twice we avoid races with
1055          * pfc clearing the ARMED bit and conditions where we
1056          * run the check_tx_hang logic with a transmit completion
1057          * pending but without time to complete it yet.
1058          */
1059         if (tx_done_old == tx_done && tx_pending)
1060                 /* make sure it is true for two checks in a row */
1061                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1062                                         &tx_ring->state);
1063         /* update completed stats and continue */
1064         tx_ring->tx_stats.tx_done_old = tx_done;
1065         /* reset the countdown */
1066         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1067
1068         return false;
1069 }
1070
1071 /**
1072  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1073  * @adapter: driver private struct
1074  **/
1075 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1076 {
1077
1078         /* Do the reset outside of interrupt context */
1079         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1080                 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1081                 e_warn(drv, "initiating reset due to tx timeout\n");
1082                 ixgbe_service_event_schedule(adapter);
1083         }
1084 }
1085
1086 /**
1087  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1088  * @q_vector: structure containing interrupt and ring information
1089  * @tx_ring: tx ring to clean
1090  **/
1091 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1092                                struct ixgbe_ring *tx_ring)
1093 {
1094         struct ixgbe_adapter *adapter = q_vector->adapter;
1095         struct ixgbe_tx_buffer *tx_buffer;
1096         union ixgbe_adv_tx_desc *tx_desc;
1097         unsigned int total_bytes = 0, total_packets = 0;
1098         unsigned int budget = q_vector->tx.work_limit;
1099         unsigned int i = tx_ring->next_to_clean;
1100
1101         if (test_bit(__IXGBE_DOWN, &adapter->state))
1102                 return true;
1103
1104         tx_buffer = &tx_ring->tx_buffer_info[i];
1105         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1106         i -= tx_ring->count;
1107
1108         do {
1109                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1110
1111                 /* if next_to_watch is not set then there is no work pending */
1112                 if (!eop_desc)
1113                         break;
1114
1115                 /* prevent any other reads prior to eop_desc */
1116                 read_barrier_depends();
1117
1118                 /* if DD is not set pending work has not been completed */
1119                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1120                         break;
1121
1122                 /* clear next_to_watch to prevent false hangs */
1123                 tx_buffer->next_to_watch = NULL;
1124
1125                 /* update the statistics for this packet */
1126                 total_bytes += tx_buffer->bytecount;
1127                 total_packets += tx_buffer->gso_segs;
1128
1129                 /* free the skb */
1130                 dev_consume_skb_any(tx_buffer->skb);
1131
1132                 /* unmap skb header data */
1133                 dma_unmap_single(tx_ring->dev,
1134                                  dma_unmap_addr(tx_buffer, dma),
1135                                  dma_unmap_len(tx_buffer, len),
1136                                  DMA_TO_DEVICE);
1137
1138                 /* clear tx_buffer data */
1139                 tx_buffer->skb = NULL;
1140                 dma_unmap_len_set(tx_buffer, len, 0);
1141
1142                 /* unmap remaining buffers */
1143                 while (tx_desc != eop_desc) {
1144                         tx_buffer++;
1145                         tx_desc++;
1146                         i++;
1147                         if (unlikely(!i)) {
1148                                 i -= tx_ring->count;
1149                                 tx_buffer = tx_ring->tx_buffer_info;
1150                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1151                         }
1152
1153                         /* unmap any remaining paged data */
1154                         if (dma_unmap_len(tx_buffer, len)) {
1155                                 dma_unmap_page(tx_ring->dev,
1156                                                dma_unmap_addr(tx_buffer, dma),
1157                                                dma_unmap_len(tx_buffer, len),
1158                                                DMA_TO_DEVICE);
1159                                 dma_unmap_len_set(tx_buffer, len, 0);
1160                         }
1161                 }
1162
1163                 /* move us one more past the eop_desc for start of next pkt */
1164                 tx_buffer++;
1165                 tx_desc++;
1166                 i++;
1167                 if (unlikely(!i)) {
1168                         i -= tx_ring->count;
1169                         tx_buffer = tx_ring->tx_buffer_info;
1170                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1171                 }
1172
1173                 /* issue prefetch for next Tx descriptor */
1174                 prefetch(tx_desc);
1175
1176                 /* update budget accounting */
1177                 budget--;
1178         } while (likely(budget));
1179
1180         i += tx_ring->count;
1181         tx_ring->next_to_clean = i;
1182         u64_stats_update_begin(&tx_ring->syncp);
1183         tx_ring->stats.bytes += total_bytes;
1184         tx_ring->stats.packets += total_packets;
1185         u64_stats_update_end(&tx_ring->syncp);
1186         q_vector->tx.total_bytes += total_bytes;
1187         q_vector->tx.total_packets += total_packets;
1188
1189         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1190                 /* schedule immediate reset if we believe we hung */
1191                 struct ixgbe_hw *hw = &adapter->hw;
1192                 e_err(drv, "Detected Tx Unit Hang\n"
1193                         "  Tx Queue             <%d>\n"
1194                         "  TDH, TDT             <%x>, <%x>\n"
1195                         "  next_to_use          <%x>\n"
1196                         "  next_to_clean        <%x>\n"
1197                         "tx_buffer_info[next_to_clean]\n"
1198                         "  time_stamp           <%lx>\n"
1199                         "  jiffies              <%lx>\n",
1200                         tx_ring->queue_index,
1201                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1202                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1203                         tx_ring->next_to_use, i,
1204                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1205
1206                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1207
1208                 e_info(probe,
1209                        "tx hang %d detected on queue %d, resetting adapter\n",
1210                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1211
1212                 /* schedule immediate reset if we believe we hung */
1213                 ixgbe_tx_timeout_reset(adapter);
1214
1215                 /* the adapter is about to reset, no point in enabling stuff */
1216                 return true;
1217         }
1218
1219         netdev_tx_completed_queue(txring_txq(tx_ring),
1220                                   total_packets, total_bytes);
1221
1222 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1223         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1224                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1225                 /* Make sure that anybody stopping the queue after this
1226                  * sees the new next_to_clean.
1227                  */
1228                 smp_mb();
1229                 if (__netif_subqueue_stopped(tx_ring->netdev,
1230                                              tx_ring->queue_index)
1231                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1232                         netif_wake_subqueue(tx_ring->netdev,
1233                                             tx_ring->queue_index);
1234                         ++tx_ring->tx_stats.restart_queue;
1235                 }
1236         }
1237
1238         return !!budget;
1239 }
1240
1241 #ifdef CONFIG_IXGBE_DCA
1242 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1243                                 struct ixgbe_ring *tx_ring,
1244                                 int cpu)
1245 {
1246         struct ixgbe_hw *hw = &adapter->hw;
1247         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1248         u16 reg_offset;
1249
1250         switch (hw->mac.type) {
1251         case ixgbe_mac_82598EB:
1252                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1253                 break;
1254         case ixgbe_mac_82599EB:
1255         case ixgbe_mac_X540:
1256                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1257                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1258                 break;
1259         default:
1260                 /* for unknown hardware do not write register */
1261                 return;
1262         }
1263
1264         /*
1265          * We can enable relaxed ordering for reads, but not writes when
1266          * DCA is enabled.  This is due to a known issue in some chipsets
1267          * which will cause the DCA tag to be cleared.
1268          */
1269         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1270                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1271                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1272
1273         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1274 }
1275
1276 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1277                                 struct ixgbe_ring *rx_ring,
1278                                 int cpu)
1279 {
1280         struct ixgbe_hw *hw = &adapter->hw;
1281         u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1282         u8 reg_idx = rx_ring->reg_idx;
1283
1284
1285         switch (hw->mac.type) {
1286         case ixgbe_mac_82599EB:
1287         case ixgbe_mac_X540:
1288                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1289                 break;
1290         default:
1291                 break;
1292         }
1293
1294         /*
1295          * We can enable relaxed ordering for reads, but not writes when
1296          * DCA is enabled.  This is due to a known issue in some chipsets
1297          * which will cause the DCA tag to be cleared.
1298          */
1299         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1300                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1301
1302         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1303 }
1304
1305 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1306 {
1307         struct ixgbe_adapter *adapter = q_vector->adapter;
1308         struct ixgbe_ring *ring;
1309         int cpu = get_cpu();
1310
1311         if (q_vector->cpu == cpu)
1312                 goto out_no_update;
1313
1314         ixgbe_for_each_ring(ring, q_vector->tx)
1315                 ixgbe_update_tx_dca(adapter, ring, cpu);
1316
1317         ixgbe_for_each_ring(ring, q_vector->rx)
1318                 ixgbe_update_rx_dca(adapter, ring, cpu);
1319
1320         q_vector->cpu = cpu;
1321 out_no_update:
1322         put_cpu();
1323 }
1324
1325 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1326 {
1327         int i;
1328
1329         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1330                 return;
1331
1332         /* always use CB2 mode, difference is masked in the CB driver */
1333         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1334
1335         for (i = 0; i < adapter->num_q_vectors; i++) {
1336                 adapter->q_vector[i]->cpu = -1;
1337                 ixgbe_update_dca(adapter->q_vector[i]);
1338         }
1339 }
1340
1341 static int __ixgbe_notify_dca(struct device *dev, void *data)
1342 {
1343         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1344         unsigned long event = *(unsigned long *)data;
1345
1346         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1347                 return 0;
1348
1349         switch (event) {
1350         case DCA_PROVIDER_ADD:
1351                 /* if we're already enabled, don't do it again */
1352                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1353                         break;
1354                 if (dca_add_requester(dev) == 0) {
1355                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1356                         ixgbe_setup_dca(adapter);
1357                         break;
1358                 }
1359                 /* Fall Through since DCA is disabled. */
1360         case DCA_PROVIDER_REMOVE:
1361                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1362                         dca_remove_requester(dev);
1363                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1364                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1365                 }
1366                 break;
1367         }
1368
1369         return 0;
1370 }
1371
1372 #endif /* CONFIG_IXGBE_DCA */
1373
1374 #define IXGBE_RSS_L4_TYPES_MASK \
1375         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1376          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1377          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1378          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1379
1380 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1381                                  union ixgbe_adv_rx_desc *rx_desc,
1382                                  struct sk_buff *skb)
1383 {
1384         u16 rss_type;
1385
1386         if (!(ring->netdev->features & NETIF_F_RXHASH))
1387                 return;
1388
1389         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1390                    IXGBE_RXDADV_RSSTYPE_MASK;
1391
1392         if (!rss_type)
1393                 return;
1394
1395         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1396                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1397                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1398 }
1399
1400 #ifdef IXGBE_FCOE
1401 /**
1402  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1403  * @ring: structure containing ring specific data
1404  * @rx_desc: advanced rx descriptor
1405  *
1406  * Returns : true if it is FCoE pkt
1407  */
1408 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1409                                     union ixgbe_adv_rx_desc *rx_desc)
1410 {
1411         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1412
1413         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1414                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1415                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1416                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1417 }
1418
1419 #endif /* IXGBE_FCOE */
1420 /**
1421  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1422  * @ring: structure containing ring specific data
1423  * @rx_desc: current Rx descriptor being processed
1424  * @skb: skb currently being received and modified
1425  **/
1426 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1427                                      union ixgbe_adv_rx_desc *rx_desc,
1428                                      struct sk_buff *skb)
1429 {
1430         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1431         __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1432         bool encap_pkt = false;
1433
1434         skb_checksum_none_assert(skb);
1435
1436         /* Rx csum disabled */
1437         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1438                 return;
1439
1440         if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1441             (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1442                 encap_pkt = true;
1443                 skb->encapsulation = 1;
1444         }
1445
1446         /* if IP and error */
1447         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1448             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1449                 ring->rx_stats.csum_err++;
1450                 return;
1451         }
1452
1453         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1454                 return;
1455
1456         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1457                 /*
1458                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1459                  * checksum errors.
1460                  */
1461                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1462                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1463                         return;
1464
1465                 ring->rx_stats.csum_err++;
1466                 return;
1467         }
1468
1469         /* It must be a TCP or UDP packet with a valid checksum */
1470         skb->ip_summed = CHECKSUM_UNNECESSARY;
1471         if (encap_pkt) {
1472                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1473                         return;
1474
1475                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1476                         ring->rx_stats.csum_err++;
1477                         return;
1478                 }
1479                 /* If we checked the outer header let the stack know */
1480                 skb->csum_level = 1;
1481         }
1482 }
1483
1484 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1485                                     struct ixgbe_rx_buffer *bi)
1486 {
1487         struct page *page = bi->page;
1488         dma_addr_t dma;
1489
1490         /* since we are recycling buffers we should seldom need to alloc */
1491         if (likely(page))
1492                 return true;
1493
1494         /* alloc new page for storage */
1495         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1496         if (unlikely(!page)) {
1497                 rx_ring->rx_stats.alloc_rx_page_failed++;
1498                 return false;
1499         }
1500
1501         /* map page for use */
1502         dma = dma_map_page(rx_ring->dev, page, 0,
1503                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1504
1505         /*
1506          * if mapping failed free memory back to system since
1507          * there isn't much point in holding memory we can't use
1508          */
1509         if (dma_mapping_error(rx_ring->dev, dma)) {
1510                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1511
1512                 rx_ring->rx_stats.alloc_rx_page_failed++;
1513                 return false;
1514         }
1515
1516         bi->dma = dma;
1517         bi->page = page;
1518         bi->page_offset = 0;
1519
1520         return true;
1521 }
1522
1523 /**
1524  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1525  * @rx_ring: ring to place buffers on
1526  * @cleaned_count: number of buffers to replace
1527  **/
1528 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1529 {
1530         union ixgbe_adv_rx_desc *rx_desc;
1531         struct ixgbe_rx_buffer *bi;
1532         u16 i = rx_ring->next_to_use;
1533
1534         /* nothing to do */
1535         if (!cleaned_count)
1536                 return;
1537
1538         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1539         bi = &rx_ring->rx_buffer_info[i];
1540         i -= rx_ring->count;
1541
1542         do {
1543                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1544                         break;
1545
1546                 /*
1547                  * Refresh the desc even if buffer_addrs didn't change
1548                  * because each write-back erases this info.
1549                  */
1550                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1551
1552                 rx_desc++;
1553                 bi++;
1554                 i++;
1555                 if (unlikely(!i)) {
1556                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1557                         bi = rx_ring->rx_buffer_info;
1558                         i -= rx_ring->count;
1559                 }
1560
1561                 /* clear the status bits for the next_to_use descriptor */
1562                 rx_desc->wb.upper.status_error = 0;
1563
1564                 cleaned_count--;
1565         } while (cleaned_count);
1566
1567         i += rx_ring->count;
1568
1569         if (rx_ring->next_to_use != i) {
1570                 rx_ring->next_to_use = i;
1571
1572                 /* update next to alloc since we have filled the ring */
1573                 rx_ring->next_to_alloc = i;
1574
1575                 /* Force memory writes to complete before letting h/w
1576                  * know there are new descriptors to fetch.  (Only
1577                  * applicable for weak-ordered memory model archs,
1578                  * such as IA-64).
1579                  */
1580                 wmb();
1581                 writel(i, rx_ring->tail);
1582         }
1583 }
1584
1585 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1586                                    struct sk_buff *skb)
1587 {
1588         u16 hdr_len = skb_headlen(skb);
1589
1590         /* set gso_size to avoid messing up TCP MSS */
1591         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1592                                                  IXGBE_CB(skb)->append_cnt);
1593         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1594 }
1595
1596 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1597                                    struct sk_buff *skb)
1598 {
1599         /* if append_cnt is 0 then frame is not RSC */
1600         if (!IXGBE_CB(skb)->append_cnt)
1601                 return;
1602
1603         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1604         rx_ring->rx_stats.rsc_flush++;
1605
1606         ixgbe_set_rsc_gso_size(rx_ring, skb);
1607
1608         /* gso_size is computed using append_cnt so always clear it last */
1609         IXGBE_CB(skb)->append_cnt = 0;
1610 }
1611
1612 /**
1613  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1614  * @rx_ring: rx descriptor ring packet is being transacted on
1615  * @rx_desc: pointer to the EOP Rx descriptor
1616  * @skb: pointer to current skb being populated
1617  *
1618  * This function checks the ring, descriptor, and packet information in
1619  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1620  * other fields within the skb.
1621  **/
1622 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1623                                      union ixgbe_adv_rx_desc *rx_desc,
1624                                      struct sk_buff *skb)
1625 {
1626         struct net_device *dev = rx_ring->netdev;
1627
1628         ixgbe_update_rsc_stats(rx_ring, skb);
1629
1630         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1631
1632         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1633
1634         if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1635                 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1636
1637         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1638             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1639                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1640                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1641         }
1642
1643         skb_record_rx_queue(skb, rx_ring->queue_index);
1644
1645         skb->protocol = eth_type_trans(skb, dev);
1646 }
1647
1648 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1649                          struct sk_buff *skb)
1650 {
1651         if (ixgbe_qv_busy_polling(q_vector))
1652                 netif_receive_skb(skb);
1653         else
1654                 napi_gro_receive(&q_vector->napi, skb);
1655 }
1656
1657 /**
1658  * ixgbe_is_non_eop - process handling of non-EOP buffers
1659  * @rx_ring: Rx ring being processed
1660  * @rx_desc: Rx descriptor for current buffer
1661  * @skb: Current socket buffer containing buffer in progress
1662  *
1663  * This function updates next to clean.  If the buffer is an EOP buffer
1664  * this function exits returning false, otherwise it will place the
1665  * sk_buff in the next buffer to be chained and return true indicating
1666  * that this is in fact a non-EOP buffer.
1667  **/
1668 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1669                              union ixgbe_adv_rx_desc *rx_desc,
1670                              struct sk_buff *skb)
1671 {
1672         u32 ntc = rx_ring->next_to_clean + 1;
1673
1674         /* fetch, update, and store next to clean */
1675         ntc = (ntc < rx_ring->count) ? ntc : 0;
1676         rx_ring->next_to_clean = ntc;
1677
1678         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1679
1680         /* update RSC append count if present */
1681         if (ring_is_rsc_enabled(rx_ring)) {
1682                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1683                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1684
1685                 if (unlikely(rsc_enabled)) {
1686                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1687
1688                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1689                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1690
1691                         /* update ntc based on RSC value */
1692                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1693                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1694                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1695                 }
1696         }
1697
1698         /* if we are the last buffer then there is nothing else to do */
1699         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1700                 return false;
1701
1702         /* place skb in next buffer to be received */
1703         rx_ring->rx_buffer_info[ntc].skb = skb;
1704         rx_ring->rx_stats.non_eop_descs++;
1705
1706         return true;
1707 }
1708
1709 /**
1710  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1711  * @rx_ring: rx descriptor ring packet is being transacted on
1712  * @skb: pointer to current skb being adjusted
1713  *
1714  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1715  * main difference between this version and the original function is that
1716  * this function can make several assumptions about the state of things
1717  * that allow for significant optimizations versus the standard function.
1718  * As a result we can do things like drop a frag and maintain an accurate
1719  * truesize for the skb.
1720  */
1721 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1722                             struct sk_buff *skb)
1723 {
1724         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1725         unsigned char *va;
1726         unsigned int pull_len;
1727
1728         /*
1729          * it is valid to use page_address instead of kmap since we are
1730          * working with pages allocated out of the lomem pool per
1731          * alloc_page(GFP_ATOMIC)
1732          */
1733         va = skb_frag_address(frag);
1734
1735         /*
1736          * we need the header to contain the greater of either ETH_HLEN or
1737          * 60 bytes if the skb->len is less than 60 for skb_pad.
1738          */
1739         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1740
1741         /* align pull length to size of long to optimize memcpy performance */
1742         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1743
1744         /* update all of the pointers */
1745         skb_frag_size_sub(frag, pull_len);
1746         frag->page_offset += pull_len;
1747         skb->data_len -= pull_len;
1748         skb->tail += pull_len;
1749 }
1750
1751 /**
1752  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1753  * @rx_ring: rx descriptor ring packet is being transacted on
1754  * @skb: pointer to current skb being updated
1755  *
1756  * This function provides a basic DMA sync up for the first fragment of an
1757  * skb.  The reason for doing this is that the first fragment cannot be
1758  * unmapped until we have reached the end of packet descriptor for a buffer
1759  * chain.
1760  */
1761 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1762                                 struct sk_buff *skb)
1763 {
1764         /* if the page was released unmap it, else just sync our portion */
1765         if (unlikely(IXGBE_CB(skb)->page_released)) {
1766                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1767                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1768                 IXGBE_CB(skb)->page_released = false;
1769         } else {
1770                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1771
1772                 dma_sync_single_range_for_cpu(rx_ring->dev,
1773                                               IXGBE_CB(skb)->dma,
1774                                               frag->page_offset,
1775                                               ixgbe_rx_bufsz(rx_ring),
1776                                               DMA_FROM_DEVICE);
1777         }
1778         IXGBE_CB(skb)->dma = 0;
1779 }
1780
1781 /**
1782  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1783  * @rx_ring: rx descriptor ring packet is being transacted on
1784  * @rx_desc: pointer to the EOP Rx descriptor
1785  * @skb: pointer to current skb being fixed
1786  *
1787  * Check for corrupted packet headers caused by senders on the local L2
1788  * embedded NIC switch not setting up their Tx Descriptors right.  These
1789  * should be very rare.
1790  *
1791  * Also address the case where we are pulling data in on pages only
1792  * and as such no data is present in the skb header.
1793  *
1794  * In addition if skb is not at least 60 bytes we need to pad it so that
1795  * it is large enough to qualify as a valid Ethernet frame.
1796  *
1797  * Returns true if an error was encountered and skb was freed.
1798  **/
1799 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1800                                   union ixgbe_adv_rx_desc *rx_desc,
1801                                   struct sk_buff *skb)
1802 {
1803         struct net_device *netdev = rx_ring->netdev;
1804
1805         /* verify that the packet does not have any known errors */
1806         if (unlikely(ixgbe_test_staterr(rx_desc,
1807                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1808             !(netdev->features & NETIF_F_RXALL))) {
1809                 dev_kfree_skb_any(skb);
1810                 return true;
1811         }
1812
1813         /* place header in linear portion of buffer */
1814         if (skb_is_nonlinear(skb))
1815                 ixgbe_pull_tail(rx_ring, skb);
1816
1817 #ifdef IXGBE_FCOE
1818         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1819         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1820                 return false;
1821
1822 #endif
1823         /* if eth_skb_pad returns an error the skb was freed */
1824         if (eth_skb_pad(skb))
1825                 return true;
1826
1827         return false;
1828 }
1829
1830 /**
1831  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1832  * @rx_ring: rx descriptor ring to store buffers on
1833  * @old_buff: donor buffer to have page reused
1834  *
1835  * Synchronizes page for reuse by the adapter
1836  **/
1837 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1838                                 struct ixgbe_rx_buffer *old_buff)
1839 {
1840         struct ixgbe_rx_buffer *new_buff;
1841         u16 nta = rx_ring->next_to_alloc;
1842
1843         new_buff = &rx_ring->rx_buffer_info[nta];
1844
1845         /* update, and store next to alloc */
1846         nta++;
1847         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1848
1849         /* transfer page from old buffer to new buffer */
1850         *new_buff = *old_buff;
1851
1852         /* sync the buffer for use by the device */
1853         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1854                                          new_buff->page_offset,
1855                                          ixgbe_rx_bufsz(rx_ring),
1856                                          DMA_FROM_DEVICE);
1857 }
1858
1859 static inline bool ixgbe_page_is_reserved(struct page *page)
1860 {
1861         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1862 }
1863
1864 /**
1865  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1866  * @rx_ring: rx descriptor ring to transact packets on
1867  * @rx_buffer: buffer containing page to add
1868  * @rx_desc: descriptor containing length of buffer written by hardware
1869  * @skb: sk_buff to place the data into
1870  *
1871  * This function will add the data contained in rx_buffer->page to the skb.
1872  * This is done either through a direct copy if the data in the buffer is
1873  * less than the skb header size, otherwise it will just attach the page as
1874  * a frag to the skb.
1875  *
1876  * The function will then update the page offset if necessary and return
1877  * true if the buffer can be reused by the adapter.
1878  **/
1879 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1880                               struct ixgbe_rx_buffer *rx_buffer,
1881                               union ixgbe_adv_rx_desc *rx_desc,
1882                               struct sk_buff *skb)
1883 {
1884         struct page *page = rx_buffer->page;
1885         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1886 #if (PAGE_SIZE < 8192)
1887         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1888 #else
1889         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1890         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1891                                    ixgbe_rx_bufsz(rx_ring);
1892 #endif
1893
1894         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1895                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1896
1897                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1898
1899                 /* page is not reserved, we can reuse buffer as-is */
1900                 if (likely(!ixgbe_page_is_reserved(page)))
1901                         return true;
1902
1903                 /* this page cannot be reused so discard it */
1904                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1905                 return false;
1906         }
1907
1908         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1909                         rx_buffer->page_offset, size, truesize);
1910
1911         /* avoid re-using remote pages */
1912         if (unlikely(ixgbe_page_is_reserved(page)))
1913                 return false;
1914
1915 #if (PAGE_SIZE < 8192)
1916         /* if we are only owner of page we can reuse it */
1917         if (unlikely(page_count(page) != 1))
1918                 return false;
1919
1920         /* flip page offset to other buffer */
1921         rx_buffer->page_offset ^= truesize;
1922 #else
1923         /* move offset up to the next cache line */
1924         rx_buffer->page_offset += truesize;
1925
1926         if (rx_buffer->page_offset > last_offset)
1927                 return false;
1928 #endif
1929
1930         /* Even if we own the page, we are not allowed to use atomic_set()
1931          * This would break get_page_unless_zero() users.
1932          */
1933         atomic_inc(&page->_count);
1934
1935         return true;
1936 }
1937
1938 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1939                                              union ixgbe_adv_rx_desc *rx_desc)
1940 {
1941         struct ixgbe_rx_buffer *rx_buffer;
1942         struct sk_buff *skb;
1943         struct page *page;
1944
1945         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1946         page = rx_buffer->page;
1947         prefetchw(page);
1948
1949         skb = rx_buffer->skb;
1950
1951         if (likely(!skb)) {
1952                 void *page_addr = page_address(page) +
1953                                   rx_buffer->page_offset;
1954
1955                 /* prefetch first cache line of first page */
1956                 prefetch(page_addr);
1957 #if L1_CACHE_BYTES < 128
1958                 prefetch(page_addr + L1_CACHE_BYTES);
1959 #endif
1960
1961                 /* allocate a skb to store the frags */
1962                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1963                                      IXGBE_RX_HDR_SIZE);
1964                 if (unlikely(!skb)) {
1965                         rx_ring->rx_stats.alloc_rx_buff_failed++;
1966                         return NULL;
1967                 }
1968
1969                 /*
1970                  * we will be copying header into skb->data in
1971                  * pskb_may_pull so it is in our interest to prefetch
1972                  * it now to avoid a possible cache miss
1973                  */
1974                 prefetchw(skb->data);
1975
1976                 /*
1977                  * Delay unmapping of the first packet. It carries the
1978                  * header information, HW may still access the header
1979                  * after the writeback.  Only unmap it when EOP is
1980                  * reached
1981                  */
1982                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1983                         goto dma_sync;
1984
1985                 IXGBE_CB(skb)->dma = rx_buffer->dma;
1986         } else {
1987                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1988                         ixgbe_dma_sync_frag(rx_ring, skb);
1989
1990 dma_sync:
1991                 /* we are reusing so sync this buffer for CPU use */
1992                 dma_sync_single_range_for_cpu(rx_ring->dev,
1993                                               rx_buffer->dma,
1994                                               rx_buffer->page_offset,
1995                                               ixgbe_rx_bufsz(rx_ring),
1996                                               DMA_FROM_DEVICE);
1997
1998                 rx_buffer->skb = NULL;
1999         }
2000
2001         /* pull page into skb */
2002         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2003                 /* hand second half of page back to the ring */
2004                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2005         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2006                 /* the page has been released from the ring */
2007                 IXGBE_CB(skb)->page_released = true;
2008         } else {
2009                 /* we are not reusing the buffer so unmap it */
2010                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2011                                ixgbe_rx_pg_size(rx_ring),
2012                                DMA_FROM_DEVICE);
2013         }
2014
2015         /* clear contents of buffer_info */
2016         rx_buffer->page = NULL;
2017
2018         return skb;
2019 }
2020
2021 /**
2022  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2023  * @q_vector: structure containing interrupt and ring information
2024  * @rx_ring: rx descriptor ring to transact packets on
2025  * @budget: Total limit on number of packets to process
2026  *
2027  * This function provides a "bounce buffer" approach to Rx interrupt
2028  * processing.  The advantage to this is that on systems that have
2029  * expensive overhead for IOMMU access this provides a means of avoiding
2030  * it by maintaining the mapping of the page to the syste.
2031  *
2032  * Returns amount of work completed
2033  **/
2034 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2035                                struct ixgbe_ring *rx_ring,
2036                                const int budget)
2037 {
2038         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2039 #ifdef IXGBE_FCOE
2040         struct ixgbe_adapter *adapter = q_vector->adapter;
2041         int ddp_bytes;
2042         unsigned int mss = 0;
2043 #endif /* IXGBE_FCOE */
2044         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2045
2046         while (likely(total_rx_packets < budget)) {
2047                 union ixgbe_adv_rx_desc *rx_desc;
2048                 struct sk_buff *skb;
2049
2050                 /* return some buffers to hardware, one at a time is too slow */
2051                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2052                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2053                         cleaned_count = 0;
2054                 }
2055
2056                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2057
2058                 if (!rx_desc->wb.upper.status_error)
2059                         break;
2060
2061                 /* This memory barrier is needed to keep us from reading
2062                  * any other fields out of the rx_desc until we know the
2063                  * descriptor has been written back
2064                  */
2065                 dma_rmb();
2066
2067                 /* retrieve a buffer from the ring */
2068                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2069
2070                 /* exit if we failed to retrieve a buffer */
2071                 if (!skb)
2072                         break;
2073
2074                 cleaned_count++;
2075
2076                 /* place incomplete frames back on ring for completion */
2077                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2078                         continue;
2079
2080                 /* verify the packet layout is correct */
2081                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2082                         continue;
2083
2084                 /* probably a little skewed due to removing CRC */
2085                 total_rx_bytes += skb->len;
2086
2087                 /* populate checksum, timestamp, VLAN, and protocol */
2088                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2089
2090 #ifdef IXGBE_FCOE
2091                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2092                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2093                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2094                         /* include DDPed FCoE data */
2095                         if (ddp_bytes > 0) {
2096                                 if (!mss) {
2097                                         mss = rx_ring->netdev->mtu -
2098                                                 sizeof(struct fcoe_hdr) -
2099                                                 sizeof(struct fc_frame_header) -
2100                                                 sizeof(struct fcoe_crc_eof);
2101                                         if (mss > 512)
2102                                                 mss &= ~511;
2103                                 }
2104                                 total_rx_bytes += ddp_bytes;
2105                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2106                                                                  mss);
2107                         }
2108                         if (!ddp_bytes) {
2109                                 dev_kfree_skb_any(skb);
2110                                 continue;
2111                         }
2112                 }
2113
2114 #endif /* IXGBE_FCOE */
2115                 skb_mark_napi_id(skb, &q_vector->napi);
2116                 ixgbe_rx_skb(q_vector, skb);
2117
2118                 /* update budget accounting */
2119                 total_rx_packets++;
2120         }
2121
2122         u64_stats_update_begin(&rx_ring->syncp);
2123         rx_ring->stats.packets += total_rx_packets;
2124         rx_ring->stats.bytes += total_rx_bytes;
2125         u64_stats_update_end(&rx_ring->syncp);
2126         q_vector->rx.total_packets += total_rx_packets;
2127         q_vector->rx.total_bytes += total_rx_bytes;
2128
2129         return total_rx_packets;
2130 }
2131
2132 #ifdef CONFIG_NET_RX_BUSY_POLL
2133 /* must be called with local_bh_disable()d */
2134 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2135 {
2136         struct ixgbe_q_vector *q_vector =
2137                         container_of(napi, struct ixgbe_q_vector, napi);
2138         struct ixgbe_adapter *adapter = q_vector->adapter;
2139         struct ixgbe_ring  *ring;
2140         int found = 0;
2141
2142         if (test_bit(__IXGBE_DOWN, &adapter->state))
2143                 return LL_FLUSH_FAILED;
2144
2145         if (!ixgbe_qv_lock_poll(q_vector))
2146                 return LL_FLUSH_BUSY;
2147
2148         ixgbe_for_each_ring(ring, q_vector->rx) {
2149                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2150 #ifdef BP_EXTENDED_STATS
2151                 if (found)
2152                         ring->stats.cleaned += found;
2153                 else
2154                         ring->stats.misses++;
2155 #endif
2156                 if (found)
2157                         break;
2158         }
2159
2160         ixgbe_qv_unlock_poll(q_vector);
2161
2162         return found;
2163 }
2164 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2165
2166 /**
2167  * ixgbe_configure_msix - Configure MSI-X hardware
2168  * @adapter: board private structure
2169  *
2170  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2171  * interrupts.
2172  **/
2173 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2174 {
2175         struct ixgbe_q_vector *q_vector;
2176         int v_idx;
2177         u32 mask;
2178
2179         /* Populate MSIX to EITR Select */
2180         if (adapter->num_vfs > 32) {
2181                 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2182                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2183         }
2184
2185         /*
2186          * Populate the IVAR table and set the ITR values to the
2187          * corresponding register.
2188          */
2189         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2190                 struct ixgbe_ring *ring;
2191                 q_vector = adapter->q_vector[v_idx];
2192
2193                 ixgbe_for_each_ring(ring, q_vector->rx)
2194                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2195
2196                 ixgbe_for_each_ring(ring, q_vector->tx)
2197                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2198
2199                 ixgbe_write_eitr(q_vector);
2200         }
2201
2202         switch (adapter->hw.mac.type) {
2203         case ixgbe_mac_82598EB:
2204                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2205                                v_idx);
2206                 break;
2207         case ixgbe_mac_82599EB:
2208         case ixgbe_mac_X540:
2209         case ixgbe_mac_X550:
2210         case ixgbe_mac_X550EM_x:
2211                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2212                 break;
2213         default:
2214                 break;
2215         }
2216         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2217
2218         /* set up to autoclear timer, and the vectors */
2219         mask = IXGBE_EIMS_ENABLE_MASK;
2220         mask &= ~(IXGBE_EIMS_OTHER |
2221                   IXGBE_EIMS_MAILBOX |
2222                   IXGBE_EIMS_LSC);
2223
2224         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2225 }
2226
2227 enum latency_range {
2228         lowest_latency = 0,
2229         low_latency = 1,
2230         bulk_latency = 2,
2231         latency_invalid = 255
2232 };
2233
2234 /**
2235  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2236  * @q_vector: structure containing interrupt and ring information
2237  * @ring_container: structure containing ring performance data
2238  *
2239  *      Stores a new ITR value based on packets and byte
2240  *      counts during the last interrupt.  The advantage of per interrupt
2241  *      computation is faster updates and more accurate ITR for the current
2242  *      traffic pattern.  Constants in this function were computed
2243  *      based on theoretical maximum wire speed and thresholds were set based
2244  *      on testing data as well as attempting to minimize response time
2245  *      while increasing bulk throughput.
2246  *      this functionality is controlled by the InterruptThrottleRate module
2247  *      parameter (see ixgbe_param.c)
2248  **/
2249 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2250                              struct ixgbe_ring_container *ring_container)
2251 {
2252         int bytes = ring_container->total_bytes;
2253         int packets = ring_container->total_packets;
2254         u32 timepassed_us;
2255         u64 bytes_perint;
2256         u8 itr_setting = ring_container->itr;
2257
2258         if (packets == 0)
2259                 return;
2260
2261         /* simple throttlerate management
2262          *   0-10MB/s   lowest (100000 ints/s)
2263          *  10-20MB/s   low    (20000 ints/s)
2264          *  20-1249MB/s bulk   (12000 ints/s)
2265          */
2266         /* what was last interrupt timeslice? */
2267         timepassed_us = q_vector->itr >> 2;
2268         if (timepassed_us == 0)
2269                 return;
2270
2271         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2272
2273         switch (itr_setting) {
2274         case lowest_latency:
2275                 if (bytes_perint > 10)
2276                         itr_setting = low_latency;
2277                 break;
2278         case low_latency:
2279                 if (bytes_perint > 20)
2280                         itr_setting = bulk_latency;
2281                 else if (bytes_perint <= 10)
2282                         itr_setting = lowest_latency;
2283                 break;
2284         case bulk_latency:
2285                 if (bytes_perint <= 20)
2286                         itr_setting = low_latency;
2287                 break;
2288         }
2289
2290         /* clear work counters since we have the values we need */
2291         ring_container->total_bytes = 0;
2292         ring_container->total_packets = 0;
2293
2294         /* write updated itr to ring container */
2295         ring_container->itr = itr_setting;
2296 }
2297
2298 /**
2299  * ixgbe_write_eitr - write EITR register in hardware specific way
2300  * @q_vector: structure containing interrupt and ring information
2301  *
2302  * This function is made to be called by ethtool and by the driver
2303  * when it needs to update EITR registers at runtime.  Hardware
2304  * specific quirks/differences are taken care of here.
2305  */
2306 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2307 {
2308         struct ixgbe_adapter *adapter = q_vector->adapter;
2309         struct ixgbe_hw *hw = &adapter->hw;
2310         int v_idx = q_vector->v_idx;
2311         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2312
2313         switch (adapter->hw.mac.type) {
2314         case ixgbe_mac_82598EB:
2315                 /* must write high and low 16 bits to reset counter */
2316                 itr_reg |= (itr_reg << 16);
2317                 break;
2318         case ixgbe_mac_82599EB:
2319         case ixgbe_mac_X540:
2320         case ixgbe_mac_X550:
2321         case ixgbe_mac_X550EM_x:
2322                 /*
2323                  * set the WDIS bit to not clear the timer bits and cause an
2324                  * immediate assertion of the interrupt
2325                  */
2326                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2327                 break;
2328         default:
2329                 break;
2330         }
2331         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2332 }
2333
2334 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2335 {
2336         u32 new_itr = q_vector->itr;
2337         u8 current_itr;
2338
2339         ixgbe_update_itr(q_vector, &q_vector->tx);
2340         ixgbe_update_itr(q_vector, &q_vector->rx);
2341
2342         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2343
2344         switch (current_itr) {
2345         /* counts and packets in update_itr are dependent on these numbers */
2346         case lowest_latency:
2347                 new_itr = IXGBE_100K_ITR;
2348                 break;
2349         case low_latency:
2350                 new_itr = IXGBE_20K_ITR;
2351                 break;
2352         case bulk_latency:
2353                 new_itr = IXGBE_12K_ITR;
2354                 break;
2355         default:
2356                 break;
2357         }
2358
2359         if (new_itr != q_vector->itr) {
2360                 /* do an exponential smoothing */
2361                 new_itr = (10 * new_itr * q_vector->itr) /
2362                           ((9 * new_itr) + q_vector->itr);
2363
2364                 /* save the algorithm value here */
2365                 q_vector->itr = new_itr;
2366
2367                 ixgbe_write_eitr(q_vector);
2368         }
2369 }
2370
2371 /**
2372  * ixgbe_check_overtemp_subtask - check for over temperature
2373  * @adapter: pointer to adapter
2374  **/
2375 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2376 {
2377         struct ixgbe_hw *hw = &adapter->hw;
2378         u32 eicr = adapter->interrupt_event;
2379
2380         if (test_bit(__IXGBE_DOWN, &adapter->state))
2381                 return;
2382
2383         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2384             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2385                 return;
2386
2387         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2388
2389         switch (hw->device_id) {
2390         case IXGBE_DEV_ID_82599_T3_LOM:
2391                 /*
2392                  * Since the warning interrupt is for both ports
2393                  * we don't have to check if:
2394                  *  - This interrupt wasn't for our port.
2395                  *  - We may have missed the interrupt so always have to
2396                  *    check if we  got a LSC
2397                  */
2398                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2399                     !(eicr & IXGBE_EICR_LSC))
2400                         return;
2401
2402                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2403                         u32 speed;
2404                         bool link_up = false;
2405
2406                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2407
2408                         if (link_up)
2409                                 return;
2410                 }
2411
2412                 /* Check if this is not due to overtemp */
2413                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2414                         return;
2415
2416                 break;
2417         default:
2418                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2419                         return;
2420                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2421                         return;
2422                 break;
2423         }
2424         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2425
2426         adapter->interrupt_event = 0;
2427 }
2428
2429 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2430 {
2431         struct ixgbe_hw *hw = &adapter->hw;
2432
2433         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2434             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2435                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2436                 /* write to clear the interrupt */
2437                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2438         }
2439 }
2440
2441 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2442 {
2443         struct ixgbe_hw *hw = &adapter->hw;
2444
2445         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2446                 return;
2447
2448         switch (adapter->hw.mac.type) {
2449         case ixgbe_mac_82599EB:
2450                 /*
2451                  * Need to check link state so complete overtemp check
2452                  * on service task
2453                  */
2454                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2455                      (eicr & IXGBE_EICR_LSC)) &&
2456                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2457                         adapter->interrupt_event = eicr;
2458                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2459                         ixgbe_service_event_schedule(adapter);
2460                         return;
2461                 }
2462                 return;
2463         case ixgbe_mac_X540:
2464                 if (!(eicr & IXGBE_EICR_TS))
2465                         return;
2466                 break;
2467         default:
2468                 return;
2469         }
2470
2471         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2472 }
2473
2474 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2475 {
2476         switch (hw->mac.type) {
2477         case ixgbe_mac_82598EB:
2478                 if (hw->phy.type == ixgbe_phy_nl)
2479                         return true;
2480                 return false;
2481         case ixgbe_mac_82599EB:
2482         case ixgbe_mac_X550EM_x:
2483                 switch (hw->mac.ops.get_media_type(hw)) {
2484                 case ixgbe_media_type_fiber:
2485                 case ixgbe_media_type_fiber_qsfp:
2486                         return true;
2487                 default:
2488                         return false;
2489                 }
2490         default:
2491                 return false;
2492         }
2493 }
2494
2495 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2496 {
2497         struct ixgbe_hw *hw = &adapter->hw;
2498         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2499
2500         if (!ixgbe_is_sfp(hw))
2501                 return;
2502
2503         /* Later MAC's use different SDP */
2504         if (hw->mac.type >= ixgbe_mac_X540)
2505                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2506
2507         if (eicr & eicr_mask) {
2508                 /* Clear the interrupt */
2509                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2510                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2511                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2512                         ixgbe_service_event_schedule(adapter);
2513                 }
2514         }
2515
2516         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2517             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2518                 /* Clear the interrupt */
2519                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2520                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2521                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2522                         ixgbe_service_event_schedule(adapter);
2523                 }
2524         }
2525 }
2526
2527 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2528 {
2529         struct ixgbe_hw *hw = &adapter->hw;
2530
2531         adapter->lsc_int++;
2532         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2533         adapter->link_check_timeout = jiffies;
2534         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2535                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2536                 IXGBE_WRITE_FLUSH(hw);
2537                 ixgbe_service_event_schedule(adapter);
2538         }
2539 }
2540
2541 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2542                                            u64 qmask)
2543 {
2544         u32 mask;
2545         struct ixgbe_hw *hw = &adapter->hw;
2546
2547         switch (hw->mac.type) {
2548         case ixgbe_mac_82598EB:
2549                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2550                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2551                 break;
2552         case ixgbe_mac_82599EB:
2553         case ixgbe_mac_X540:
2554         case ixgbe_mac_X550:
2555         case ixgbe_mac_X550EM_x:
2556                 mask = (qmask & 0xFFFFFFFF);
2557                 if (mask)
2558                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2559                 mask = (qmask >> 32);
2560                 if (mask)
2561                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2562                 break;
2563         default:
2564                 break;
2565         }
2566         /* skip the flush */
2567 }
2568
2569 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2570                                             u64 qmask)
2571 {
2572         u32 mask;
2573         struct ixgbe_hw *hw = &adapter->hw;
2574
2575         switch (hw->mac.type) {
2576         case ixgbe_mac_82598EB:
2577                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2578                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2579                 break;
2580         case ixgbe_mac_82599EB:
2581         case ixgbe_mac_X540:
2582         case ixgbe_mac_X550:
2583         case ixgbe_mac_X550EM_x:
2584                 mask = (qmask & 0xFFFFFFFF);
2585                 if (mask)
2586                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2587                 mask = (qmask >> 32);
2588                 if (mask)
2589                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2590                 break;
2591         default:
2592                 break;
2593         }
2594         /* skip the flush */
2595 }
2596
2597 /**
2598  * ixgbe_irq_enable - Enable default interrupt generation settings
2599  * @adapter: board private structure
2600  **/
2601 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2602                                     bool flush)
2603 {
2604         struct ixgbe_hw *hw = &adapter->hw;
2605         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2606
2607         /* don't reenable LSC while waiting for link */
2608         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2609                 mask &= ~IXGBE_EIMS_LSC;
2610
2611         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2612                 switch (adapter->hw.mac.type) {
2613                 case ixgbe_mac_82599EB:
2614                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2615                         break;
2616                 case ixgbe_mac_X540:
2617                 case ixgbe_mac_X550:
2618                 case ixgbe_mac_X550EM_x:
2619                         mask |= IXGBE_EIMS_TS;
2620                         break;
2621                 default:
2622                         break;
2623                 }
2624         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2625                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2626         switch (adapter->hw.mac.type) {
2627         case ixgbe_mac_82599EB:
2628                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2629                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2630                 /* fall through */
2631         case ixgbe_mac_X540:
2632         case ixgbe_mac_X550:
2633         case ixgbe_mac_X550EM_x:
2634                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2635                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2636                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2637                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2638                 mask |= IXGBE_EIMS_ECC;
2639                 mask |= IXGBE_EIMS_MAILBOX;
2640                 break;
2641         default:
2642                 break;
2643         }
2644
2645         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2646             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2647                 mask |= IXGBE_EIMS_FLOW_DIR;
2648
2649         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2650         if (queues)
2651                 ixgbe_irq_enable_queues(adapter, ~0);
2652         if (flush)
2653                 IXGBE_WRITE_FLUSH(&adapter->hw);
2654 }
2655
2656 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2657 {
2658         struct ixgbe_adapter *adapter = data;
2659         struct ixgbe_hw *hw = &adapter->hw;
2660         u32 eicr;
2661
2662         /*
2663          * Workaround for Silicon errata.  Use clear-by-write instead
2664          * of clear-by-read.  Reading with EICS will return the
2665          * interrupt causes without clearing, which later be done
2666          * with the write to EICR.
2667          */
2668         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2669
2670         /* The lower 16bits of the EICR register are for the queue interrupts
2671          * which should be masked here in order to not accidentally clear them if
2672          * the bits are high when ixgbe_msix_other is called. There is a race
2673          * condition otherwise which results in possible performance loss
2674          * especially if the ixgbe_msix_other interrupt is triggering
2675          * consistently (as it would when PPS is turned on for the X540 device)
2676          */
2677         eicr &= 0xFFFF0000;
2678
2679         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2680
2681         if (eicr & IXGBE_EICR_LSC)
2682                 ixgbe_check_lsc(adapter);
2683
2684         if (eicr & IXGBE_EICR_MAILBOX)
2685                 ixgbe_msg_task(adapter);
2686
2687         switch (hw->mac.type) {
2688         case ixgbe_mac_82599EB:
2689         case ixgbe_mac_X540:
2690         case ixgbe_mac_X550:
2691         case ixgbe_mac_X550EM_x:
2692                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2693                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2694                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2695                         ixgbe_service_event_schedule(adapter);
2696                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2697                                         IXGBE_EICR_GPI_SDP0_X540);
2698                 }
2699                 if (eicr & IXGBE_EICR_ECC) {
2700                         e_info(link, "Received ECC Err, initiating reset\n");
2701                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2702                         ixgbe_service_event_schedule(adapter);
2703                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2704                 }
2705                 /* Handle Flow Director Full threshold interrupt */
2706                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2707                         int reinit_count = 0;
2708                         int i;
2709                         for (i = 0; i < adapter->num_tx_queues; i++) {
2710                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2711                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2712                                                        &ring->state))
2713                                         reinit_count++;
2714                         }
2715                         if (reinit_count) {
2716                                 /* no more flow director interrupts until after init */
2717                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2718                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2719                                 ixgbe_service_event_schedule(adapter);
2720                         }
2721                 }
2722                 ixgbe_check_sfp_event(adapter, eicr);
2723                 ixgbe_check_overtemp_event(adapter, eicr);
2724                 break;
2725         default:
2726                 break;
2727         }
2728
2729         ixgbe_check_fan_failure(adapter, eicr);
2730
2731         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2732                 ixgbe_ptp_check_pps_event(adapter, eicr);
2733
2734         /* re-enable the original interrupt state, no lsc, no queues */
2735         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2736                 ixgbe_irq_enable(adapter, false, false);
2737
2738         return IRQ_HANDLED;
2739 }
2740
2741 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2742 {
2743         struct ixgbe_q_vector *q_vector = data;
2744
2745         /* EIAM disabled interrupts (on this vector) for us */
2746
2747         if (q_vector->rx.ring || q_vector->tx.ring)
2748                 napi_schedule(&q_vector->napi);
2749
2750         return IRQ_HANDLED;
2751 }
2752
2753 /**
2754  * ixgbe_poll - NAPI Rx polling callback
2755  * @napi: structure for representing this polling device
2756  * @budget: how many packets driver is allowed to clean
2757  *
2758  * This function is used for legacy and MSI, NAPI mode
2759  **/
2760 int ixgbe_poll(struct napi_struct *napi, int budget)
2761 {
2762         struct ixgbe_q_vector *q_vector =
2763                                 container_of(napi, struct ixgbe_q_vector, napi);
2764         struct ixgbe_adapter *adapter = q_vector->adapter;
2765         struct ixgbe_ring *ring;
2766         int per_ring_budget;
2767         bool clean_complete = true;
2768
2769 #ifdef CONFIG_IXGBE_DCA
2770         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2771                 ixgbe_update_dca(q_vector);
2772 #endif
2773
2774         ixgbe_for_each_ring(ring, q_vector->tx)
2775                 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2776
2777         if (!ixgbe_qv_lock_napi(q_vector))
2778                 return budget;
2779
2780         /* attempt to distribute budget to each queue fairly, but don't allow
2781          * the budget to go below 1 because we'll exit polling */
2782         if (q_vector->rx.count > 1)
2783                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2784         else
2785                 per_ring_budget = budget;
2786
2787         ixgbe_for_each_ring(ring, q_vector->rx)
2788                 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2789                                    per_ring_budget) < per_ring_budget);
2790
2791         ixgbe_qv_unlock_napi(q_vector);
2792         /* If all work not completed, return budget and keep polling */
2793         if (!clean_complete)
2794                 return budget;
2795
2796         /* all work done, exit the polling mode */
2797         napi_complete(napi);
2798         if (adapter->rx_itr_setting & 1)
2799                 ixgbe_set_itr(q_vector);
2800         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2801                 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2802
2803         return 0;
2804 }
2805
2806 /**
2807  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2808  * @adapter: board private structure
2809  *
2810  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2811  * interrupts from the kernel.
2812  **/
2813 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2814 {
2815         struct net_device *netdev = adapter->netdev;
2816         int vector, err;
2817         int ri = 0, ti = 0;
2818
2819         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2820                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2821                 struct msix_entry *entry = &adapter->msix_entries[vector];
2822
2823                 if (q_vector->tx.ring && q_vector->rx.ring) {
2824                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2825                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2826                         ti++;
2827                 } else if (q_vector->rx.ring) {
2828                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2829                                  "%s-%s-%d", netdev->name, "rx", ri++);
2830                 } else if (q_vector->tx.ring) {
2831                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2832                                  "%s-%s-%d", netdev->name, "tx", ti++);
2833                 } else {
2834                         /* skip this unused q_vector */
2835                         continue;
2836                 }
2837                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2838                                   q_vector->name, q_vector);
2839                 if (err) {
2840                         e_err(probe, "request_irq failed for MSIX interrupt "
2841                               "Error: %d\n", err);
2842                         goto free_queue_irqs;
2843                 }
2844                 /* If Flow Director is enabled, set interrupt affinity */
2845                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2846                         /* assign the mask for this irq */
2847                         irq_set_affinity_hint(entry->vector,
2848                                               &q_vector->affinity_mask);
2849                 }
2850         }
2851
2852         err = request_irq(adapter->msix_entries[vector].vector,
2853                           ixgbe_msix_other, 0, netdev->name, adapter);
2854         if (err) {
2855                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2856                 goto free_queue_irqs;
2857         }
2858
2859         return 0;
2860
2861 free_queue_irqs:
2862         while (vector) {
2863                 vector--;
2864                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2865                                       NULL);
2866                 free_irq(adapter->msix_entries[vector].vector,
2867                          adapter->q_vector[vector]);
2868         }
2869         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2870         pci_disable_msix(adapter->pdev);
2871         kfree(adapter->msix_entries);
2872         adapter->msix_entries = NULL;
2873         return err;
2874 }
2875
2876 /**
2877  * ixgbe_intr - legacy mode Interrupt Handler
2878  * @irq: interrupt number
2879  * @data: pointer to a network interface device structure
2880  **/
2881 static irqreturn_t ixgbe_intr(int irq, void *data)
2882 {
2883         struct ixgbe_adapter *adapter = data;
2884         struct ixgbe_hw *hw = &adapter->hw;
2885         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2886         u32 eicr;
2887
2888         /*
2889          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2890          * before the read of EICR.
2891          */
2892         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2893
2894         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2895          * therefore no explicit interrupt disable is necessary */
2896         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2897         if (!eicr) {
2898                 /*
2899                  * shared interrupt alert!
2900                  * make sure interrupts are enabled because the read will
2901                  * have disabled interrupts due to EIAM
2902                  * finish the workaround of silicon errata on 82598.  Unmask
2903                  * the interrupt that we masked before the EICR read.
2904                  */
2905                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2906                         ixgbe_irq_enable(adapter, true, true);
2907                 return IRQ_NONE;        /* Not our interrupt */
2908         }
2909
2910         if (eicr & IXGBE_EICR_LSC)
2911                 ixgbe_check_lsc(adapter);
2912
2913         switch (hw->mac.type) {
2914         case ixgbe_mac_82599EB:
2915                 ixgbe_check_sfp_event(adapter, eicr);
2916                 /* Fall through */
2917         case ixgbe_mac_X540:
2918         case ixgbe_mac_X550:
2919         case ixgbe_mac_X550EM_x:
2920                 if (eicr & IXGBE_EICR_ECC) {
2921                         e_info(link, "Received ECC Err, initiating reset\n");
2922                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2923                         ixgbe_service_event_schedule(adapter);
2924                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2925                 }
2926                 ixgbe_check_overtemp_event(adapter, eicr);
2927                 break;
2928         default:
2929                 break;
2930         }
2931
2932         ixgbe_check_fan_failure(adapter, eicr);
2933         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2934                 ixgbe_ptp_check_pps_event(adapter, eicr);
2935
2936         /* would disable interrupts here but EIAM disabled it */
2937         napi_schedule(&q_vector->napi);
2938
2939         /*
2940          * re-enable link(maybe) and non-queue interrupts, no flush.
2941          * ixgbe_poll will re-enable the queue interrupts
2942          */
2943         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2944                 ixgbe_irq_enable(adapter, false, false);
2945
2946         return IRQ_HANDLED;
2947 }
2948
2949 /**
2950  * ixgbe_request_irq - initialize interrupts
2951  * @adapter: board private structure
2952  *
2953  * Attempts to configure interrupts using the best available
2954  * capabilities of the hardware and kernel.
2955  **/
2956 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2957 {
2958         struct net_device *netdev = adapter->netdev;
2959         int err;
2960
2961         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2962                 err = ixgbe_request_msix_irqs(adapter);
2963         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2964                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2965                                   netdev->name, adapter);
2966         else
2967                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2968                                   netdev->name, adapter);
2969
2970         if (err)
2971                 e_err(probe, "request_irq failed, Error %d\n", err);
2972
2973         return err;
2974 }
2975
2976 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2977 {
2978         int vector;
2979
2980         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2981                 free_irq(adapter->pdev->irq, adapter);
2982                 return;
2983         }
2984
2985         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2986                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2987                 struct msix_entry *entry = &adapter->msix_entries[vector];
2988
2989                 /* free only the irqs that were actually requested */
2990                 if (!q_vector->rx.ring && !q_vector->tx.ring)
2991                         continue;
2992
2993                 /* clear the affinity_mask in the IRQ descriptor */
2994                 irq_set_affinity_hint(entry->vector, NULL);
2995
2996                 free_irq(entry->vector, q_vector);
2997         }
2998
2999         free_irq(adapter->msix_entries[vector++].vector, adapter);
3000 }
3001
3002 /**
3003  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3004  * @adapter: board private structure
3005  **/
3006 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3007 {
3008         switch (adapter->hw.mac.type) {
3009         case ixgbe_mac_82598EB:
3010                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3011                 break;
3012         case ixgbe_mac_82599EB:
3013         case ixgbe_mac_X540:
3014         case ixgbe_mac_X550:
3015         case ixgbe_mac_X550EM_x:
3016                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3017                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3018                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3019                 break;
3020         default:
3021                 break;
3022         }
3023         IXGBE_WRITE_FLUSH(&adapter->hw);
3024         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3025                 int vector;
3026
3027                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3028                         synchronize_irq(adapter->msix_entries[vector].vector);
3029
3030                 synchronize_irq(adapter->msix_entries[vector++].vector);
3031         } else {
3032                 synchronize_irq(adapter->pdev->irq);
3033         }
3034 }
3035
3036 /**
3037  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3038  *
3039  **/
3040 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3041 {
3042         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3043
3044         ixgbe_write_eitr(q_vector);
3045
3046         ixgbe_set_ivar(adapter, 0, 0, 0);
3047         ixgbe_set_ivar(adapter, 1, 0, 0);
3048
3049         e_info(hw, "Legacy interrupt IVAR setup done\n");
3050 }
3051
3052 /**
3053  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3054  * @adapter: board private structure
3055  * @ring: structure containing ring specific data
3056  *
3057  * Configure the Tx descriptor ring after a reset.
3058  **/
3059 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3060                              struct ixgbe_ring *ring)
3061 {
3062         struct ixgbe_hw *hw = &adapter->hw;
3063         u64 tdba = ring->dma;
3064         int wait_loop = 10;
3065         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3066         u8 reg_idx = ring->reg_idx;
3067
3068         /* disable queue to avoid issues while updating state */
3069         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3070         IXGBE_WRITE_FLUSH(hw);
3071
3072         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3073                         (tdba & DMA_BIT_MASK(32)));
3074         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3075         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3076                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3077         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3078         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3079         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3080
3081         /*
3082          * set WTHRESH to encourage burst writeback, it should not be set
3083          * higher than 1 when:
3084          * - ITR is 0 as it could cause false TX hangs
3085          * - ITR is set to > 100k int/sec and BQL is enabled
3086          *
3087          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3088          * to or less than the number of on chip descriptors, which is
3089          * currently 40.
3090          */
3091         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3092                 txdctl |= (1 << 16);    /* WTHRESH = 1 */
3093         else
3094                 txdctl |= (8 << 16);    /* WTHRESH = 8 */
3095
3096         /*
3097          * Setting PTHRESH to 32 both improves performance
3098          * and avoids a TX hang with DFP enabled
3099          */
3100         txdctl |= (1 << 8) |    /* HTHRESH = 1 */
3101                    32;          /* PTHRESH = 32 */
3102
3103         /* reinitialize flowdirector state */
3104         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3105                 ring->atr_sample_rate = adapter->atr_sample_rate;
3106                 ring->atr_count = 0;
3107                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3108         } else {
3109                 ring->atr_sample_rate = 0;
3110         }
3111
3112         /* initialize XPS */
3113         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3114                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3115
3116                 if (q_vector)
3117                         netif_set_xps_queue(ring->netdev,
3118                                             &q_vector->affinity_mask,
3119                                             ring->queue_index);
3120         }
3121
3122         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3123
3124         /* enable queue */
3125         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3126
3127         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3128         if (hw->mac.type == ixgbe_mac_82598EB &&
3129             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3130                 return;
3131
3132         /* poll to verify queue is enabled */
3133         do {
3134                 usleep_range(1000, 2000);
3135                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3136         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3137         if (!wait_loop)
3138                 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3139 }
3140
3141 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3142 {
3143         struct ixgbe_hw *hw = &adapter->hw;
3144         u32 rttdcs, mtqc;
3145         u8 tcs = netdev_get_num_tc(adapter->netdev);
3146
3147         if (hw->mac.type == ixgbe_mac_82598EB)
3148                 return;
3149
3150         /* disable the arbiter while setting MTQC */
3151         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3152         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3153         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3154
3155         /* set transmit pool layout */
3156         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3157                 mtqc = IXGBE_MTQC_VT_ENA;
3158                 if (tcs > 4)
3159                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3160                 else if (tcs > 1)
3161                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3162                 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3163                         mtqc |= IXGBE_MTQC_32VF;
3164                 else
3165                         mtqc |= IXGBE_MTQC_64VF;
3166         } else {
3167                 if (tcs > 4)
3168                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3169                 else if (tcs > 1)
3170                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3171                 else
3172                         mtqc = IXGBE_MTQC_64Q_1PB;
3173         }
3174
3175         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3176
3177         /* Enable Security TX Buffer IFG for multiple pb */
3178         if (tcs) {
3179                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3180                 sectx |= IXGBE_SECTX_DCB;
3181                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3182         }
3183
3184         /* re-enable the arbiter */
3185         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3186         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3187 }
3188
3189 /**
3190  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3191  * @adapter: board private structure
3192  *
3193  * Configure the Tx unit of the MAC after a reset.
3194  **/
3195 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3196 {
3197         struct ixgbe_hw *hw = &adapter->hw;
3198         u32 dmatxctl;
3199         u32 i;
3200
3201         ixgbe_setup_mtqc(adapter);
3202
3203         if (hw->mac.type != ixgbe_mac_82598EB) {
3204                 /* DMATXCTL.EN must be before Tx queues are enabled */
3205                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3206                 dmatxctl |= IXGBE_DMATXCTL_TE;
3207                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3208         }
3209
3210         /* Setup the HW Tx Head and Tail descriptor pointers */
3211         for (i = 0; i < adapter->num_tx_queues; i++)
3212                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3213 }
3214
3215 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3216                                  struct ixgbe_ring *ring)
3217 {
3218         struct ixgbe_hw *hw = &adapter->hw;
3219         u8 reg_idx = ring->reg_idx;
3220         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3221
3222         srrctl |= IXGBE_SRRCTL_DROP_EN;
3223
3224         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3225 }
3226
3227 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3228                                   struct ixgbe_ring *ring)
3229 {
3230         struct ixgbe_hw *hw = &adapter->hw;
3231         u8 reg_idx = ring->reg_idx;
3232         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3233
3234         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3235
3236         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3237 }
3238
3239 #ifdef CONFIG_IXGBE_DCB
3240 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3241 #else
3242 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3243 #endif
3244 {
3245         int i;
3246         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3247
3248         if (adapter->ixgbe_ieee_pfc)
3249                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3250
3251         /*
3252          * We should set the drop enable bit if:
3253          *  SR-IOV is enabled
3254          *   or
3255          *  Number of Rx queues > 1 and flow control is disabled
3256          *
3257          *  This allows us to avoid head of line blocking for security
3258          *  and performance reasons.
3259          */
3260         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3261             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3262                 for (i = 0; i < adapter->num_rx_queues; i++)
3263                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3264         } else {
3265                 for (i = 0; i < adapter->num_rx_queues; i++)
3266                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3267         }
3268 }
3269
3270 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3271
3272 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3273                                    struct ixgbe_ring *rx_ring)
3274 {
3275         struct ixgbe_hw *hw = &adapter->hw;
3276         u32 srrctl;
3277         u8 reg_idx = rx_ring->reg_idx;
3278
3279         if (hw->mac.type == ixgbe_mac_82598EB) {
3280                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3281
3282                 /*
3283                  * if VMDq is not active we must program one srrctl register
3284                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3285                  */
3286                 reg_idx &= mask;
3287         }
3288
3289         /* configure header buffer length, needed for RSC */
3290         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3291
3292         /* configure the packet buffer length */
3293         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3294
3295         /* configure descriptor type */
3296         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3297
3298         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3299 }
3300
3301 /**
3302  * Return a number of entries in the RSS indirection table
3303  *
3304  * @adapter: device handle
3305  *
3306  *  - 82598/82599/X540:     128
3307  *  - X550(non-SRIOV mode): 512
3308  *  - X550(SRIOV mode):     64
3309  */
3310 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3311 {
3312         if (adapter->hw.mac.type < ixgbe_mac_X550)
3313                 return 128;
3314         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3315                 return 64;
3316         else
3317                 return 512;
3318 }
3319
3320 /**
3321  * Write the RETA table to HW
3322  *
3323  * @adapter: device handle
3324  *
3325  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3326  */
3327 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3328 {
3329         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3330         struct ixgbe_hw *hw = &adapter->hw;
3331         u32 reta = 0;
3332         u32 indices_multi;
3333         u8 *indir_tbl = adapter->rss_indir_tbl;
3334
3335         /* Fill out the redirection table as follows:
3336          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3337          *    indices.
3338          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3339          *  - X550:       8 bit wide entries containing 6 bit RSS index
3340          */
3341         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3342                 indices_multi = 0x11;
3343         else
3344                 indices_multi = 0x1;
3345
3346         /* Write redirection table to HW */
3347         for (i = 0; i < reta_entries; i++) {
3348                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3349                 if ((i & 3) == 3) {
3350                         if (i < 128)
3351                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3352                         else
3353                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3354                                                 reta);
3355                         reta = 0;
3356                 }
3357         }
3358 }
3359
3360 /**
3361  * Write the RETA table to HW (for x550 devices in SRIOV mode)
3362  *
3363  * @adapter: device handle
3364  *
3365  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3366  */
3367 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3368 {
3369         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3370         struct ixgbe_hw *hw = &adapter->hw;
3371         u32 vfreta = 0;
3372         unsigned int pf_pool = adapter->num_vfs;
3373
3374         /* Write redirection table to HW */
3375         for (i = 0; i < reta_entries; i++) {
3376                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3377                 if ((i & 3) == 3) {
3378                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3379                                         vfreta);
3380                         vfreta = 0;
3381                 }
3382         }
3383 }
3384
3385 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3386 {
3387         struct ixgbe_hw *hw = &adapter->hw;
3388         u32 i, j;
3389         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3390         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3391
3392         /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3393          * make full use of any rings they may have.  We will use the
3394          * PSRTYPE register to control how many rings we use within the PF.
3395          */
3396         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3397                 rss_i = 2;
3398
3399         /* Fill out hash function seeds */
3400         for (i = 0; i < 10; i++)
3401                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3402
3403         /* Fill out redirection table */
3404         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3405
3406         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3407                 if (j == rss_i)
3408                         j = 0;
3409
3410                 adapter->rss_indir_tbl[i] = j;
3411         }
3412
3413         ixgbe_store_reta(adapter);
3414 }
3415
3416 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3417 {
3418         struct ixgbe_hw *hw = &adapter->hw;
3419         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3420         unsigned int pf_pool = adapter->num_vfs;
3421         int i, j;
3422
3423         /* Fill out hash function seeds */
3424         for (i = 0; i < 10; i++)
3425                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3426                                 adapter->rss_key[i]);
3427
3428         /* Fill out the redirection table */
3429         for (i = 0, j = 0; i < 64; i++, j++) {
3430                 if (j == rss_i)
3431                         j = 0;
3432
3433                 adapter->rss_indir_tbl[i] = j;
3434         }
3435
3436         ixgbe_store_vfreta(adapter);
3437 }
3438
3439 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3440 {
3441         struct ixgbe_hw *hw = &adapter->hw;
3442         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3443         u32 rxcsum;
3444
3445         /* Disable indicating checksum in descriptor, enables RSS hash */
3446         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3447         rxcsum |= IXGBE_RXCSUM_PCSD;
3448         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3449
3450         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3451                 if (adapter->ring_feature[RING_F_RSS].mask)
3452                         mrqc = IXGBE_MRQC_RSSEN;
3453         } else {
3454                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3455
3456                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3457                         if (tcs > 4)
3458                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3459                         else if (tcs > 1)
3460                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3461                         else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3462                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3463                         else
3464                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3465                 } else {
3466                         if (tcs > 4)
3467                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3468                         else if (tcs > 1)
3469                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3470                         else
3471                                 mrqc = IXGBE_MRQC_RSSEN;
3472                 }
3473         }
3474
3475         /* Perform hash on these packet types */
3476         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3477                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3478                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3479                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3480
3481         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3482                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3483         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3484                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3485
3486         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3487         if ((hw->mac.type >= ixgbe_mac_X550) &&
3488             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3489                 unsigned int pf_pool = adapter->num_vfs;
3490
3491                 /* Enable VF RSS mode */
3492                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3493                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3494
3495                 /* Setup RSS through the VF registers */
3496                 ixgbe_setup_vfreta(adapter);
3497                 vfmrqc = IXGBE_MRQC_RSSEN;
3498                 vfmrqc |= rss_field;
3499                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3500         } else {
3501                 ixgbe_setup_reta(adapter);
3502                 mrqc |= rss_field;
3503                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3504         }
3505 }
3506
3507 /**
3508  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3509  * @adapter:    address of board private structure
3510  * @index:      index of ring to set
3511  **/
3512 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3513                                    struct ixgbe_ring *ring)
3514 {
3515         struct ixgbe_hw *hw = &adapter->hw;
3516         u32 rscctrl;
3517         u8 reg_idx = ring->reg_idx;
3518
3519         if (!ring_is_rsc_enabled(ring))
3520                 return;
3521
3522         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3523         rscctrl |= IXGBE_RSCCTL_RSCEN;
3524         /*
3525          * we must limit the number of descriptors so that the
3526          * total size of max desc * buf_len is not greater
3527          * than 65536
3528          */
3529         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3530         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3531 }
3532
3533 #define IXGBE_MAX_RX_DESC_POLL 10
3534 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3535                                        struct ixgbe_ring *ring)
3536 {
3537         struct ixgbe_hw *hw = &adapter->hw;
3538         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3539         u32 rxdctl;
3540         u8 reg_idx = ring->reg_idx;
3541
3542         if (ixgbe_removed(hw->hw_addr))
3543                 return;
3544         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3545         if (hw->mac.type == ixgbe_mac_82598EB &&
3546             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3547                 return;
3548
3549         do {
3550                 usleep_range(1000, 2000);
3551                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3552         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3553
3554         if (!wait_loop) {
3555                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3556                       "the polling period\n", reg_idx);
3557         }
3558 }
3559
3560 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3561                             struct ixgbe_ring *ring)
3562 {
3563         struct ixgbe_hw *hw = &adapter->hw;
3564         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3565         u32 rxdctl;
3566         u8 reg_idx = ring->reg_idx;
3567
3568         if (ixgbe_removed(hw->hw_addr))
3569                 return;
3570         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3571         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3572
3573         /* write value back with RXDCTL.ENABLE bit cleared */
3574         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3575
3576         if (hw->mac.type == ixgbe_mac_82598EB &&
3577             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3578                 return;
3579
3580         /* the hardware may take up to 100us to really disable the rx queue */
3581         do {
3582                 udelay(10);
3583                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3584         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3585
3586         if (!wait_loop) {
3587                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3588                       "the polling period\n", reg_idx);
3589         }
3590 }
3591
3592 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3593                              struct ixgbe_ring *ring)
3594 {
3595         struct ixgbe_hw *hw = &adapter->hw;
3596         u64 rdba = ring->dma;
3597         u32 rxdctl;
3598         u8 reg_idx = ring->reg_idx;
3599
3600         /* disable queue to avoid issues while updating state */
3601         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3602         ixgbe_disable_rx_queue(adapter, ring);
3603
3604         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3605         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3606         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3607                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3608         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3609         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3610         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3611
3612         ixgbe_configure_srrctl(adapter, ring);
3613         ixgbe_configure_rscctl(adapter, ring);
3614
3615         if (hw->mac.type == ixgbe_mac_82598EB) {
3616                 /*
3617                  * enable cache line friendly hardware writes:
3618                  * PTHRESH=32 descriptors (half the internal cache),
3619                  * this also removes ugly rx_no_buffer_count increment
3620                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3621                  * WTHRESH=8 burst writeback up to two cache lines
3622                  */
3623                 rxdctl &= ~0x3FFFFF;
3624                 rxdctl |=  0x080420;
3625         }
3626
3627         /* enable receive descriptor ring */
3628         rxdctl |= IXGBE_RXDCTL_ENABLE;
3629         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3630
3631         ixgbe_rx_desc_queue_enable(adapter, ring);
3632         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3633 }
3634
3635 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3636 {
3637         struct ixgbe_hw *hw = &adapter->hw;
3638         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3639         u16 pool;
3640
3641         /* PSRTYPE must be initialized in non 82598 adapters */
3642         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3643                       IXGBE_PSRTYPE_UDPHDR |
3644                       IXGBE_PSRTYPE_IPV4HDR |
3645                       IXGBE_PSRTYPE_L2HDR |
3646                       IXGBE_PSRTYPE_IPV6HDR;
3647
3648         if (hw->mac.type == ixgbe_mac_82598EB)
3649                 return;
3650
3651         if (rss_i > 3)
3652                 psrtype |= 2 << 29;
3653         else if (rss_i > 1)
3654                 psrtype |= 1 << 29;
3655
3656         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3657                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3658 }
3659
3660 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3661 {
3662         struct ixgbe_hw *hw = &adapter->hw;
3663         u32 reg_offset, vf_shift;
3664         u32 gcr_ext, vmdctl;
3665         int i;
3666
3667         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3668                 return;
3669
3670         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3671         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3672         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3673         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3674         vmdctl |= IXGBE_VT_CTL_REPLEN;
3675         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3676
3677         vf_shift = VMDQ_P(0) % 32;
3678         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3679
3680         /* Enable only the PF's pool for Tx/Rx */
3681         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3682         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3683         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3684         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3685         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3686                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3687
3688         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3689         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3690
3691         /*
3692          * Set up VF register offsets for selected VT Mode,
3693          * i.e. 32 or 64 VFs for SR-IOV
3694          */
3695         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3696         case IXGBE_82599_VMDQ_8Q_MASK:
3697                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3698                 break;
3699         case IXGBE_82599_VMDQ_4Q_MASK:
3700                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3701                 break;
3702         default:
3703                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3704                 break;
3705         }
3706
3707         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3708
3709
3710         /* Enable MAC Anti-Spoofing */
3711         hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3712                                           adapter->num_vfs);
3713
3714         /* Ensure LLDP is set for Ethertype Antispoofing if we will be
3715          * calling set_ethertype_anti_spoofing for each VF in loop below
3716          */
3717         if (hw->mac.ops.set_ethertype_anti_spoofing)
3718                 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3719                                 (IXGBE_ETQF_FILTER_EN    | /* enable filter */
3720                                  IXGBE_ETQF_TX_ANTISPOOF | /* tx antispoof */
3721                                  IXGBE_ETH_P_LLDP));       /* LLDP eth type */
3722
3723         /* For VFs that have spoof checking turned off */
3724         for (i = 0; i < adapter->num_vfs; i++) {
3725                 if (!adapter->vfinfo[i].spoofchk_enabled)
3726                         ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3727
3728                 /* enable ethertype anti spoofing if hw supports it */
3729                 if (hw->mac.ops.set_ethertype_anti_spoofing)
3730                         hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3731
3732                 /* Enable/Disable RSS query feature  */
3733                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3734                                           adapter->vfinfo[i].rss_query_enabled);
3735         }
3736 }
3737
3738 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3739 {
3740         struct ixgbe_hw *hw = &adapter->hw;
3741         struct net_device *netdev = adapter->netdev;
3742         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3743         struct ixgbe_ring *rx_ring;
3744         int i;
3745         u32 mhadd, hlreg0;
3746
3747 #ifdef IXGBE_FCOE
3748         /* adjust max frame to be able to do baby jumbo for FCoE */
3749         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3750             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3751                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3752
3753 #endif /* IXGBE_FCOE */
3754
3755         /* adjust max frame to be at least the size of a standard frame */
3756         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3757                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3758
3759         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3760         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3761                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3762                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3763
3764                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3765         }
3766
3767         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3768         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3769         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3770         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3771
3772         /*
3773          * Setup the HW Rx Head and Tail Descriptor Pointers and
3774          * the Base and Length of the Rx Descriptor Ring
3775          */
3776         for (i = 0; i < adapter->num_rx_queues; i++) {
3777                 rx_ring = adapter->rx_ring[i];
3778                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3779                         set_ring_rsc_enabled(rx_ring);
3780                 else
3781                         clear_ring_rsc_enabled(rx_ring);
3782         }
3783 }
3784
3785 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3786 {
3787         struct ixgbe_hw *hw = &adapter->hw;
3788         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3789
3790         switch (hw->mac.type) {
3791         case ixgbe_mac_X550:
3792         case ixgbe_mac_X550EM_x:
3793         case ixgbe_mac_82598EB:
3794                 /*
3795                  * For VMDq support of different descriptor types or
3796                  * buffer sizes through the use of multiple SRRCTL
3797                  * registers, RDRXCTL.MVMEN must be set to 1
3798                  *
3799                  * also, the manual doesn't mention it clearly but DCA hints
3800                  * will only use queue 0's tags unless this bit is set.  Side
3801                  * effects of setting this bit are only that SRRCTL must be
3802                  * fully programmed [0..15]
3803                  */
3804                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3805                 break;
3806         case ixgbe_mac_82599EB:
3807         case ixgbe_mac_X540:
3808                 /* Disable RSC for ACK packets */
3809                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3810                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3811                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3812                 /* hardware requires some bits to be set by default */
3813                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3814                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3815                 break;
3816         default:
3817                 /* We should do nothing since we don't know this hardware */
3818                 return;
3819         }
3820
3821         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3822 }
3823
3824 /**
3825  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3826  * @adapter: board private structure
3827  *
3828  * Configure the Rx unit of the MAC after a reset.
3829  **/
3830 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3831 {
3832         struct ixgbe_hw *hw = &adapter->hw;
3833         int i;
3834         u32 rxctrl, rfctl;
3835
3836         /* disable receives while setting up the descriptors */
3837         hw->mac.ops.disable_rx(hw);
3838
3839         ixgbe_setup_psrtype(adapter);
3840         ixgbe_setup_rdrxctl(adapter);
3841
3842         /* RSC Setup */
3843         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3844         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3845         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3846                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3847         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3848
3849         /* Program registers for the distribution of queues */
3850         ixgbe_setup_mrqc(adapter);
3851
3852         /* set_rx_buffer_len must be called before ring initialization */
3853         ixgbe_set_rx_buffer_len(adapter);
3854
3855         /*
3856          * Setup the HW Rx Head and Tail Descriptor Pointers and
3857          * the Base and Length of the Rx Descriptor Ring
3858          */
3859         for (i = 0; i < adapter->num_rx_queues; i++)
3860                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3861
3862         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3863         /* disable drop enable for 82598 parts */
3864         if (hw->mac.type == ixgbe_mac_82598EB)
3865                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3866
3867         /* enable all receives */
3868         rxctrl |= IXGBE_RXCTRL_RXEN;
3869         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3870 }
3871
3872 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3873                                  __be16 proto, u16 vid)
3874 {
3875         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3876         struct ixgbe_hw *hw = &adapter->hw;
3877
3878         /* add VID to filter table */
3879         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3880         set_bit(vid, adapter->active_vlans);
3881
3882         return 0;
3883 }
3884
3885 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3886                                   __be16 proto, u16 vid)
3887 {
3888         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3889         struct ixgbe_hw *hw = &adapter->hw;
3890
3891         /* remove VID from filter table */
3892         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3893         clear_bit(vid, adapter->active_vlans);
3894
3895         return 0;
3896 }
3897
3898 /**
3899  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3900  * @adapter: driver data
3901  */
3902 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3903 {
3904         struct ixgbe_hw *hw = &adapter->hw;
3905         u32 vlnctrl;
3906         int i, j;
3907
3908         switch (hw->mac.type) {
3909         case ixgbe_mac_82598EB:
3910                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3911                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3912                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3913                 break;
3914         case ixgbe_mac_82599EB:
3915         case ixgbe_mac_X540:
3916         case ixgbe_mac_X550:
3917         case ixgbe_mac_X550EM_x:
3918                 for (i = 0; i < adapter->num_rx_queues; i++) {
3919                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3920
3921                         if (ring->l2_accel_priv)
3922                                 continue;
3923                         j = ring->reg_idx;
3924                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3925                         vlnctrl &= ~IXGBE_RXDCTL_VME;
3926                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3927                 }
3928                 break;
3929         default:
3930                 break;
3931         }
3932 }
3933
3934 /**
3935  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3936  * @adapter: driver data
3937  */
3938 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3939 {
3940         struct ixgbe_hw *hw = &adapter->hw;
3941         u32 vlnctrl;
3942         int i, j;
3943
3944         switch (hw->mac.type) {
3945         case ixgbe_mac_82598EB:
3946                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3947                 vlnctrl |= IXGBE_VLNCTRL_VME;
3948                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3949                 break;
3950         case ixgbe_mac_82599EB:
3951         case ixgbe_mac_X540:
3952         case ixgbe_mac_X550:
3953         case ixgbe_mac_X550EM_x:
3954                 for (i = 0; i < adapter->num_rx_queues; i++) {
3955                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3956
3957                         if (ring->l2_accel_priv)
3958                                 continue;
3959                         j = ring->reg_idx;
3960                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3961                         vlnctrl |= IXGBE_RXDCTL_VME;
3962                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3963                 }
3964                 break;
3965         default:
3966                 break;
3967         }
3968 }
3969
3970 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3971 {
3972         u16 vid;
3973
3974         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3975
3976         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3977                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3978 }
3979
3980 /**
3981  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3982  * @netdev: network interface device structure
3983  *
3984  * Writes multicast address list to the MTA hash table.
3985  * Returns: -ENOMEM on failure
3986  *                0 on no addresses written
3987  *                X on writing X addresses to MTA
3988  **/
3989 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3990 {
3991         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3992         struct ixgbe_hw *hw = &adapter->hw;
3993
3994         if (!netif_running(netdev))
3995                 return 0;
3996
3997         if (hw->mac.ops.update_mc_addr_list)
3998                 hw->mac.ops.update_mc_addr_list(hw, netdev);
3999         else
4000                 return -ENOMEM;
4001
4002 #ifdef CONFIG_PCI_IOV
4003         ixgbe_restore_vf_multicasts(adapter);
4004 #endif
4005
4006         return netdev_mc_count(netdev);
4007 }
4008
4009 #ifdef CONFIG_PCI_IOV
4010 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4011 {
4012         struct ixgbe_hw *hw = &adapter->hw;
4013         int i;
4014         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4015                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4016                         hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4017                                             adapter->mac_table[i].queue,
4018                                             IXGBE_RAH_AV);
4019                 else
4020                         hw->mac.ops.clear_rar(hw, i);
4021
4022                 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4023         }
4024 }
4025 #endif
4026
4027 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4028 {
4029         struct ixgbe_hw *hw = &adapter->hw;
4030         int i;
4031         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4032                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4033                         if (adapter->mac_table[i].state &
4034                             IXGBE_MAC_STATE_IN_USE)
4035                                 hw->mac.ops.set_rar(hw, i,
4036                                                 adapter->mac_table[i].addr,
4037                                                 adapter->mac_table[i].queue,
4038                                                 IXGBE_RAH_AV);
4039                         else
4040                                 hw->mac.ops.clear_rar(hw, i);
4041
4042                         adapter->mac_table[i].state &=
4043                                                 ~(IXGBE_MAC_STATE_MODIFIED);
4044                 }
4045         }
4046 }
4047
4048 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4049 {
4050         int i;
4051         struct ixgbe_hw *hw = &adapter->hw;
4052
4053         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4054                 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4055                 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4056                 eth_zero_addr(adapter->mac_table[i].addr);
4057                 adapter->mac_table[i].queue = 0;
4058         }
4059         ixgbe_sync_mac_table(adapter);
4060 }
4061
4062 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4063 {
4064         struct ixgbe_hw *hw = &adapter->hw;
4065         int i, count = 0;
4066
4067         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4068                 if (adapter->mac_table[i].state == 0)
4069                         count++;
4070         }
4071         return count;
4072 }
4073
4074 /* this function destroys the first RAR entry */
4075 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4076                                          u8 *addr)
4077 {
4078         struct ixgbe_hw *hw = &adapter->hw;
4079
4080         memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4081         adapter->mac_table[0].queue = VMDQ_P(0);
4082         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4083                                        IXGBE_MAC_STATE_IN_USE);
4084         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4085                             adapter->mac_table[0].queue,
4086                             IXGBE_RAH_AV);
4087 }
4088
4089 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4090 {
4091         struct ixgbe_hw *hw = &adapter->hw;
4092         int i;
4093
4094         if (is_zero_ether_addr(addr))
4095                 return -EINVAL;
4096
4097         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4098                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4099                         continue;
4100                 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4101                                                 IXGBE_MAC_STATE_IN_USE);
4102                 ether_addr_copy(adapter->mac_table[i].addr, addr);
4103                 adapter->mac_table[i].queue = queue;
4104                 ixgbe_sync_mac_table(adapter);
4105                 return i;
4106         }
4107         return -ENOMEM;
4108 }
4109
4110 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4111 {
4112         /* search table for addr, if found, set to 0 and sync */
4113         int i;
4114         struct ixgbe_hw *hw = &adapter->hw;
4115
4116         if (is_zero_ether_addr(addr))
4117                 return -EINVAL;
4118
4119         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4120                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4121                     adapter->mac_table[i].queue == queue) {
4122                         adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4123                         adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4124                         eth_zero_addr(adapter->mac_table[i].addr);
4125                         adapter->mac_table[i].queue = 0;
4126                         ixgbe_sync_mac_table(adapter);
4127                         return 0;
4128                 }
4129         }
4130         return -ENOMEM;
4131 }
4132 /**
4133  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4134  * @netdev: network interface device structure
4135  *
4136  * Writes unicast address list to the RAR table.
4137  * Returns: -ENOMEM on failure/insufficient address space
4138  *                0 on no addresses written
4139  *                X on writing X addresses to the RAR table
4140  **/
4141 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4142 {
4143         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4144         int count = 0;
4145
4146         /* return ENOMEM indicating insufficient memory for addresses */
4147         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4148                 return -ENOMEM;
4149
4150         if (!netdev_uc_empty(netdev)) {
4151                 struct netdev_hw_addr *ha;
4152                 netdev_for_each_uc_addr(ha, netdev) {
4153                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4154                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4155                         count++;
4156                 }
4157         }
4158         return count;
4159 }
4160
4161 /**
4162  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4163  * @netdev: network interface device structure
4164  *
4165  * The set_rx_method entry point is called whenever the unicast/multicast
4166  * address list or the network interface flags are updated.  This routine is
4167  * responsible for configuring the hardware for proper unicast, multicast and
4168  * promiscuous mode.
4169  **/
4170 void ixgbe_set_rx_mode(struct net_device *netdev)
4171 {
4172         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4173         struct ixgbe_hw *hw = &adapter->hw;
4174         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4175         u32 vlnctrl;
4176         int count;
4177
4178         /* Check for Promiscuous and All Multicast modes */
4179         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4180         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4181
4182         /* set all bits that we expect to always be set */
4183         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4184         fctrl |= IXGBE_FCTRL_BAM;
4185         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4186         fctrl |= IXGBE_FCTRL_PMCF;
4187
4188         /* clear the bits we are changing the status of */
4189         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4190         vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4191         if (netdev->flags & IFF_PROMISC) {
4192                 hw->addr_ctrl.user_set_promisc = true;
4193                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4194                 vmolr |= IXGBE_VMOLR_MPE;
4195                 /* Only disable hardware filter vlans in promiscuous mode
4196                  * if SR-IOV and VMDQ are disabled - otherwise ensure
4197                  * that hardware VLAN filters remain enabled.
4198                  */
4199                 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4200                                       IXGBE_FLAG_SRIOV_ENABLED))
4201                         vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4202         } else {
4203                 if (netdev->flags & IFF_ALLMULTI) {
4204                         fctrl |= IXGBE_FCTRL_MPE;
4205                         vmolr |= IXGBE_VMOLR_MPE;
4206                 }
4207                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4208                 hw->addr_ctrl.user_set_promisc = false;
4209         }
4210
4211         /*
4212          * Write addresses to available RAR registers, if there is not
4213          * sufficient space to store all the addresses then enable
4214          * unicast promiscuous mode
4215          */
4216         count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4217         if (count < 0) {
4218                 fctrl |= IXGBE_FCTRL_UPE;
4219                 vmolr |= IXGBE_VMOLR_ROPE;
4220         }
4221
4222         /* Write addresses to the MTA, if the attempt fails
4223          * then we should just turn on promiscuous mode so
4224          * that we can at least receive multicast traffic
4225          */
4226         count = ixgbe_write_mc_addr_list(netdev);
4227         if (count < 0) {
4228                 fctrl |= IXGBE_FCTRL_MPE;
4229                 vmolr |= IXGBE_VMOLR_MPE;
4230         } else if (count) {
4231                 vmolr |= IXGBE_VMOLR_ROMPE;
4232         }
4233
4234         if (hw->mac.type != ixgbe_mac_82598EB) {
4235                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4236                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4237                            IXGBE_VMOLR_ROPE);
4238                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4239         }
4240
4241         /* This is useful for sniffing bad packets. */
4242         if (adapter->netdev->features & NETIF_F_RXALL) {
4243                 /* UPE and MPE will be handled by normal PROMISC logic
4244                  * in e1000e_set_rx_mode */
4245                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4246                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4247                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4248
4249                 fctrl &= ~(IXGBE_FCTRL_DPF);
4250                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4251         }
4252
4253         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4254         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4255
4256         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4257                 ixgbe_vlan_strip_enable(adapter);
4258         else
4259                 ixgbe_vlan_strip_disable(adapter);
4260 }
4261
4262 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4263 {
4264         int q_idx;
4265
4266         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4267                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4268                 napi_enable(&adapter->q_vector[q_idx]->napi);
4269         }
4270 }
4271
4272 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4273 {
4274         int q_idx;
4275
4276         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4277                 napi_disable(&adapter->q_vector[q_idx]->napi);
4278                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4279                         pr_info("QV %d locked\n", q_idx);
4280                         usleep_range(1000, 20000);
4281                 }
4282         }
4283 }
4284
4285 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4286 {
4287         switch (adapter->hw.mac.type) {
4288         case ixgbe_mac_X550:
4289         case ixgbe_mac_X550EM_x:
4290                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4291 #ifdef CONFIG_IXGBE_VXLAN
4292                 adapter->vxlan_port = 0;
4293 #endif
4294                 break;
4295         default:
4296                 break;
4297         }
4298 }
4299
4300 #ifdef CONFIG_IXGBE_DCB
4301 /**
4302  * ixgbe_configure_dcb - Configure DCB hardware
4303  * @adapter: ixgbe adapter struct
4304  *
4305  * This is called by the driver on open to configure the DCB hardware.
4306  * This is also called by the gennetlink interface when reconfiguring
4307  * the DCB state.
4308  */
4309 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4310 {
4311         struct ixgbe_hw *hw = &adapter->hw;
4312         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4313
4314         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4315                 if (hw->mac.type == ixgbe_mac_82598EB)
4316                         netif_set_gso_max_size(adapter->netdev, 65536);
4317                 return;
4318         }
4319
4320         if (hw->mac.type == ixgbe_mac_82598EB)
4321                 netif_set_gso_max_size(adapter->netdev, 32768);
4322
4323 #ifdef IXGBE_FCOE
4324         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4325                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4326 #endif
4327
4328         /* reconfigure the hardware */
4329         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4330                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4331                                                 DCB_TX_CONFIG);
4332                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4333                                                 DCB_RX_CONFIG);
4334                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4335         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4336                 ixgbe_dcb_hw_ets(&adapter->hw,
4337                                  adapter->ixgbe_ieee_ets,
4338                                  max_frame);
4339                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4340                                         adapter->ixgbe_ieee_pfc->pfc_en,
4341                                         adapter->ixgbe_ieee_ets->prio_tc);
4342         }
4343
4344         /* Enable RSS Hash per TC */
4345         if (hw->mac.type != ixgbe_mac_82598EB) {
4346                 u32 msb = 0;
4347                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4348
4349                 while (rss_i) {
4350                         msb++;
4351                         rss_i >>= 1;
4352                 }
4353
4354                 /* write msb to all 8 TCs in one write */
4355                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4356         }
4357 }
4358 #endif
4359
4360 /* Additional bittime to account for IXGBE framing */
4361 #define IXGBE_ETH_FRAMING 20
4362
4363 /**
4364  * ixgbe_hpbthresh - calculate high water mark for flow control
4365  *
4366  * @adapter: board private structure to calculate for
4367  * @pb: packet buffer to calculate
4368  */
4369 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4370 {
4371         struct ixgbe_hw *hw = &adapter->hw;
4372         struct net_device *dev = adapter->netdev;
4373         int link, tc, kb, marker;
4374         u32 dv_id, rx_pba;
4375
4376         /* Calculate max LAN frame size */
4377         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4378
4379 #ifdef IXGBE_FCOE
4380         /* FCoE traffic class uses FCOE jumbo frames */
4381         if ((dev->features & NETIF_F_FCOE_MTU) &&
4382             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4383             (pb == ixgbe_fcoe_get_tc(adapter)))
4384                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4385 #endif
4386
4387         /* Calculate delay value for device */
4388         switch (hw->mac.type) {
4389         case ixgbe_mac_X540:
4390         case ixgbe_mac_X550:
4391         case ixgbe_mac_X550EM_x:
4392                 dv_id = IXGBE_DV_X540(link, tc);
4393                 break;
4394         default:
4395                 dv_id = IXGBE_DV(link, tc);
4396                 break;
4397         }
4398
4399         /* Loopback switch introduces additional latency */
4400         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4401                 dv_id += IXGBE_B2BT(tc);
4402
4403         /* Delay value is calculated in bit times convert to KB */
4404         kb = IXGBE_BT2KB(dv_id);
4405         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4406
4407         marker = rx_pba - kb;
4408
4409         /* It is possible that the packet buffer is not large enough
4410          * to provide required headroom. In this case throw an error
4411          * to user and a do the best we can.
4412          */
4413         if (marker < 0) {
4414                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4415                             "headroom to support flow control."
4416                             "Decrease MTU or number of traffic classes\n", pb);
4417                 marker = tc + 1;
4418         }
4419
4420         return marker;
4421 }
4422
4423 /**
4424  * ixgbe_lpbthresh - calculate low water mark for for flow control
4425  *
4426  * @adapter: board private structure to calculate for
4427  * @pb: packet buffer to calculate
4428  */
4429 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4430 {
4431         struct ixgbe_hw *hw = &adapter->hw;
4432         struct net_device *dev = adapter->netdev;
4433         int tc;
4434         u32 dv_id;
4435
4436         /* Calculate max LAN frame size */
4437         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4438
4439 #ifdef IXGBE_FCOE
4440         /* FCoE traffic class uses FCOE jumbo frames */
4441         if ((dev->features & NETIF_F_FCOE_MTU) &&
4442             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4443             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4444                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4445 #endif
4446
4447         /* Calculate delay value for device */
4448         switch (hw->mac.type) {
4449         case ixgbe_mac_X540:
4450         case ixgbe_mac_X550:
4451         case ixgbe_mac_X550EM_x:
4452                 dv_id = IXGBE_LOW_DV_X540(tc);
4453                 break;
4454         default:
4455                 dv_id = IXGBE_LOW_DV(tc);
4456                 break;
4457         }
4458
4459         /* Delay value is calculated in bit times convert to KB */
4460         return IXGBE_BT2KB(dv_id);
4461 }
4462
4463 /*
4464  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4465  */
4466 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4467 {
4468         struct ixgbe_hw *hw = &adapter->hw;
4469         int num_tc = netdev_get_num_tc(adapter->netdev);
4470         int i;
4471
4472         if (!num_tc)
4473                 num_tc = 1;
4474
4475         for (i = 0; i < num_tc; i++) {
4476                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4477                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4478
4479                 /* Low water marks must not be larger than high water marks */
4480                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4481                         hw->fc.low_water[i] = 0;
4482         }
4483
4484         for (; i < MAX_TRAFFIC_CLASS; i++)
4485                 hw->fc.high_water[i] = 0;
4486 }
4487
4488 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4489 {
4490         struct ixgbe_hw *hw = &adapter->hw;
4491         int hdrm;
4492         u8 tc = netdev_get_num_tc(adapter->netdev);
4493
4494         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4495             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4496                 hdrm = 32 << adapter->fdir_pballoc;
4497         else
4498                 hdrm = 0;
4499
4500         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4501         ixgbe_pbthresh_setup(adapter);
4502 }
4503
4504 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4505 {
4506         struct ixgbe_hw *hw = &adapter->hw;
4507         struct hlist_node *node2;
4508         struct ixgbe_fdir_filter *filter;
4509
4510         spin_lock(&adapter->fdir_perfect_lock);
4511
4512         if (!hlist_empty(&adapter->fdir_filter_list))
4513                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4514
4515         hlist_for_each_entry_safe(filter, node2,
4516                                   &adapter->fdir_filter_list, fdir_node) {
4517                 ixgbe_fdir_write_perfect_filter_82599(hw,
4518                                 &filter->filter,
4519                                 filter->sw_idx,
4520                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4521                                 IXGBE_FDIR_DROP_QUEUE :
4522                                 adapter->rx_ring[filter->action]->reg_idx);
4523         }
4524
4525         spin_unlock(&adapter->fdir_perfect_lock);
4526 }
4527
4528 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4529                                       struct ixgbe_adapter *adapter)
4530 {
4531         struct ixgbe_hw *hw = &adapter->hw;
4532         u32 vmolr;
4533
4534         /* No unicast promiscuous support for VMDQ devices. */
4535         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4536         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4537
4538         /* clear the affected bit */
4539         vmolr &= ~IXGBE_VMOLR_MPE;
4540
4541         if (dev->flags & IFF_ALLMULTI) {
4542                 vmolr |= IXGBE_VMOLR_MPE;
4543         } else {
4544                 vmolr |= IXGBE_VMOLR_ROMPE;
4545                 hw->mac.ops.update_mc_addr_list(hw, dev);
4546         }
4547         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4548         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4549 }
4550
4551 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4552 {
4553         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4554         int rss_i = adapter->num_rx_queues_per_pool;
4555         struct ixgbe_hw *hw = &adapter->hw;
4556         u16 pool = vadapter->pool;
4557         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4558                       IXGBE_PSRTYPE_UDPHDR |
4559                       IXGBE_PSRTYPE_IPV4HDR |
4560                       IXGBE_PSRTYPE_L2HDR |
4561                       IXGBE_PSRTYPE_IPV6HDR;
4562
4563         if (hw->mac.type == ixgbe_mac_82598EB)
4564                 return;
4565
4566         if (rss_i > 3)
4567                 psrtype |= 2 << 29;
4568         else if (rss_i > 1)
4569                 psrtype |= 1 << 29;
4570
4571         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4572 }
4573
4574 /**
4575  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4576  * @rx_ring: ring to free buffers from
4577  **/
4578 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4579 {
4580         struct device *dev = rx_ring->dev;
4581         unsigned long size;
4582         u16 i;
4583
4584         /* ring already cleared, nothing to do */
4585         if (!rx_ring->rx_buffer_info)
4586                 return;
4587
4588         /* Free all the Rx ring sk_buffs */
4589         for (i = 0; i < rx_ring->count; i++) {
4590                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4591
4592                 if (rx_buffer->skb) {
4593                         struct sk_buff *skb = rx_buffer->skb;
4594                         if (IXGBE_CB(skb)->page_released)
4595                                 dma_unmap_page(dev,
4596                                                IXGBE_CB(skb)->dma,
4597                                                ixgbe_rx_bufsz(rx_ring),
4598                                                DMA_FROM_DEVICE);
4599                         dev_kfree_skb(skb);
4600                         rx_buffer->skb = NULL;
4601                 }
4602
4603                 if (!rx_buffer->page)
4604                         continue;
4605
4606                 dma_unmap_page(dev, rx_buffer->dma,
4607                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4608                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4609
4610                 rx_buffer->page = NULL;
4611         }
4612
4613         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4614         memset(rx_ring->rx_buffer_info, 0, size);
4615
4616         /* Zero out the descriptor ring */
4617         memset(rx_ring->desc, 0, rx_ring->size);
4618
4619         rx_ring->next_to_alloc = 0;
4620         rx_ring->next_to_clean = 0;
4621         rx_ring->next_to_use = 0;
4622 }
4623
4624 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4625                                    struct ixgbe_ring *rx_ring)
4626 {
4627         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4628         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4629
4630         /* shutdown specific queue receive and wait for dma to settle */
4631         ixgbe_disable_rx_queue(adapter, rx_ring);
4632         usleep_range(10000, 20000);
4633         ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4634         ixgbe_clean_rx_ring(rx_ring);
4635         rx_ring->l2_accel_priv = NULL;
4636 }
4637
4638 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4639                                struct ixgbe_fwd_adapter *accel)
4640 {
4641         struct ixgbe_adapter *adapter = accel->real_adapter;
4642         unsigned int rxbase = accel->rx_base_queue;
4643         unsigned int txbase = accel->tx_base_queue;
4644         int i;
4645
4646         netif_tx_stop_all_queues(vdev);
4647
4648         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4649                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4650                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4651         }
4652
4653         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4654                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4655                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4656         }
4657
4658
4659         return 0;
4660 }
4661
4662 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4663                              struct ixgbe_fwd_adapter *accel)
4664 {
4665         struct ixgbe_adapter *adapter = accel->real_adapter;
4666         unsigned int rxbase, txbase, queues;
4667         int i, baseq, err = 0;
4668
4669         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4670                 return 0;
4671
4672         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4673         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4674                    accel->pool, adapter->num_rx_pools,
4675                    baseq, baseq + adapter->num_rx_queues_per_pool,
4676                    adapter->fwd_bitmask);
4677
4678         accel->netdev = vdev;
4679         accel->rx_base_queue = rxbase = baseq;
4680         accel->tx_base_queue = txbase = baseq;
4681
4682         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4683                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4684
4685         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4686                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4687                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4688                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4689         }
4690
4691         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4692                 adapter->tx_ring[txbase + i]->netdev = vdev;
4693                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4694         }
4695
4696         queues = min_t(unsigned int,
4697                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4698         err = netif_set_real_num_tx_queues(vdev, queues);
4699         if (err)
4700                 goto fwd_queue_err;
4701
4702         err = netif_set_real_num_rx_queues(vdev, queues);
4703         if (err)
4704                 goto fwd_queue_err;
4705
4706         if (is_valid_ether_addr(vdev->dev_addr))
4707                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4708
4709         ixgbe_fwd_psrtype(accel);
4710         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4711         return err;
4712 fwd_queue_err:
4713         ixgbe_fwd_ring_down(vdev, accel);
4714         return err;
4715 }
4716
4717 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4718 {
4719         struct net_device *upper;
4720         struct list_head *iter;
4721         int err;
4722
4723         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4724                 if (netif_is_macvlan(upper)) {
4725                         struct macvlan_dev *dfwd = netdev_priv(upper);
4726                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4727
4728                         if (dfwd->fwd_priv) {
4729                                 err = ixgbe_fwd_ring_up(upper, vadapter);
4730                                 if (err)
4731                                         continue;
4732                         }
4733                 }
4734         }
4735 }
4736
4737 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4738 {
4739         struct ixgbe_hw *hw = &adapter->hw;
4740
4741         ixgbe_configure_pb(adapter);
4742 #ifdef CONFIG_IXGBE_DCB
4743         ixgbe_configure_dcb(adapter);
4744 #endif
4745         /*
4746          * We must restore virtualization before VLANs or else
4747          * the VLVF registers will not be populated
4748          */
4749         ixgbe_configure_virtualization(adapter);
4750
4751         ixgbe_set_rx_mode(adapter->netdev);
4752         ixgbe_restore_vlan(adapter);
4753
4754         switch (hw->mac.type) {
4755         case ixgbe_mac_82599EB:
4756         case ixgbe_mac_X540:
4757                 hw->mac.ops.disable_rx_buff(hw);
4758                 break;
4759         default:
4760                 break;
4761         }
4762
4763         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4764                 ixgbe_init_fdir_signature_82599(&adapter->hw,
4765                                                 adapter->fdir_pballoc);
4766         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4767                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4768                                               adapter->fdir_pballoc);
4769                 ixgbe_fdir_filter_restore(adapter);
4770         }
4771
4772         switch (hw->mac.type) {
4773         case ixgbe_mac_82599EB:
4774         case ixgbe_mac_X540:
4775                 hw->mac.ops.enable_rx_buff(hw);
4776                 break;
4777         default:
4778                 break;
4779         }
4780
4781 #ifdef IXGBE_FCOE
4782         /* configure FCoE L2 filters, redirection table, and Rx control */
4783         ixgbe_configure_fcoe(adapter);
4784
4785 #endif /* IXGBE_FCOE */
4786         ixgbe_configure_tx(adapter);
4787         ixgbe_configure_rx(adapter);
4788         ixgbe_configure_dfwd(adapter);
4789 }
4790
4791 /**
4792  * ixgbe_sfp_link_config - set up SFP+ link
4793  * @adapter: pointer to private adapter struct
4794  **/
4795 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4796 {
4797         /*
4798          * We are assuming the worst case scenario here, and that
4799          * is that an SFP was inserted/removed after the reset
4800          * but before SFP detection was enabled.  As such the best
4801          * solution is to just start searching as soon as we start
4802          */
4803         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4804                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4805
4806         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4807 }
4808
4809 /**
4810  * ixgbe_non_sfp_link_config - set up non-SFP+ link
4811  * @hw: pointer to private hardware struct
4812  *
4813  * Returns 0 on success, negative on failure
4814  **/
4815 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4816 {
4817         u32 speed;
4818         bool autoneg, link_up = false;
4819         int ret = IXGBE_ERR_LINK_SETUP;
4820
4821         if (hw->mac.ops.check_link)
4822                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4823
4824         if (ret)
4825                 return ret;
4826
4827         speed = hw->phy.autoneg_advertised;
4828         if ((!speed) && (hw->mac.ops.get_link_capabilities))
4829                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4830                                                         &autoneg);
4831         if (ret)
4832                 return ret;
4833
4834         if (hw->mac.ops.setup_link)
4835                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4836
4837         return ret;
4838 }
4839
4840 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4841 {
4842         struct ixgbe_hw *hw = &adapter->hw;
4843         u32 gpie = 0;
4844
4845         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4846                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4847                        IXGBE_GPIE_OCD;
4848                 gpie |= IXGBE_GPIE_EIAME;
4849                 /*
4850                  * use EIAM to auto-mask when MSI-X interrupt is asserted
4851                  * this saves a register write for every interrupt
4852                  */
4853                 switch (hw->mac.type) {
4854                 case ixgbe_mac_82598EB:
4855                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4856                         break;
4857                 case ixgbe_mac_82599EB:
4858                 case ixgbe_mac_X540:
4859                 case ixgbe_mac_X550:
4860                 case ixgbe_mac_X550EM_x:
4861                 default:
4862                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4863                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4864                         break;
4865                 }
4866         } else {
4867                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4868                  * specifically only auto mask tx and rx interrupts */
4869                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4870         }
4871
4872         /* XXX: to interrupt immediately for EICS writes, enable this */
4873         /* gpie |= IXGBE_GPIE_EIMEN; */
4874
4875         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4876                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4877
4878                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4879                 case IXGBE_82599_VMDQ_8Q_MASK:
4880                         gpie |= IXGBE_GPIE_VTMODE_16;
4881                         break;
4882                 case IXGBE_82599_VMDQ_4Q_MASK:
4883                         gpie |= IXGBE_GPIE_VTMODE_32;
4884                         break;
4885                 default:
4886                         gpie |= IXGBE_GPIE_VTMODE_64;
4887                         break;
4888                 }
4889         }
4890
4891         /* Enable Thermal over heat sensor interrupt */
4892         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4893                 switch (adapter->hw.mac.type) {
4894                 case ixgbe_mac_82599EB:
4895                         gpie |= IXGBE_SDP0_GPIEN_8259X;
4896                         break;
4897                 case ixgbe_mac_X540:
4898                         gpie |= IXGBE_EIMS_TS;
4899                         break;
4900                 default:
4901                         break;
4902                 }
4903         }
4904
4905         /* Enable fan failure interrupt */
4906         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4907                 gpie |= IXGBE_SDP1_GPIEN(hw);
4908
4909         switch (hw->mac.type) {
4910         case ixgbe_mac_82599EB:
4911                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
4912                 break;
4913         case ixgbe_mac_X550EM_x:
4914                 gpie |= IXGBE_SDP0_GPIEN_X540;
4915                 break;
4916         default:
4917                 break;
4918         }
4919
4920         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4921 }
4922
4923 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4924 {
4925         struct ixgbe_hw *hw = &adapter->hw;
4926         int err;
4927         u32 ctrl_ext;
4928
4929         ixgbe_get_hw_control(adapter);
4930         ixgbe_setup_gpie(adapter);
4931
4932         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4933                 ixgbe_configure_msix(adapter);
4934         else
4935                 ixgbe_configure_msi_and_legacy(adapter);
4936
4937         /* enable the optics for 82599 SFP+ fiber */
4938         if (hw->mac.ops.enable_tx_laser)
4939                 hw->mac.ops.enable_tx_laser(hw);
4940
4941         if (hw->phy.ops.set_phy_power)
4942                 hw->phy.ops.set_phy_power(hw, true);
4943
4944         smp_mb__before_atomic();
4945         clear_bit(__IXGBE_DOWN, &adapter->state);
4946         ixgbe_napi_enable_all(adapter);
4947
4948         if (ixgbe_is_sfp(hw)) {
4949                 ixgbe_sfp_link_config(adapter);
4950         } else {
4951                 err = ixgbe_non_sfp_link_config(hw);
4952                 if (err)
4953                         e_err(probe, "link_config FAILED %d\n", err);
4954         }
4955
4956         /* clear any pending interrupts, may auto mask */
4957         IXGBE_READ_REG(hw, IXGBE_EICR);
4958         ixgbe_irq_enable(adapter, true, true);
4959
4960         /*
4961          * If this adapter has a fan, check to see if we had a failure
4962          * before we enabled the interrupt.
4963          */
4964         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4965                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4966                 if (esdp & IXGBE_ESDP_SDP1)
4967                         e_crit(drv, "Fan has stopped, replace the adapter\n");
4968         }
4969
4970         /* bring the link up in the watchdog, this could race with our first
4971          * link up interrupt but shouldn't be a problem */
4972         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4973         adapter->link_check_timeout = jiffies;
4974         mod_timer(&adapter->service_timer, jiffies);
4975
4976         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4977         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4978         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4979         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4980 }
4981
4982 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4983 {
4984         WARN_ON(in_interrupt());
4985         /* put off any impending NetWatchDogTimeout */
4986         adapter->netdev->trans_start = jiffies;
4987
4988         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4989                 usleep_range(1000, 2000);
4990         ixgbe_down(adapter);
4991         /*
4992          * If SR-IOV enabled then wait a bit before bringing the adapter
4993          * back up to give the VFs time to respond to the reset.  The
4994          * two second wait is based upon the watchdog timer cycle in
4995          * the VF driver.
4996          */
4997         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4998                 msleep(2000);
4999         ixgbe_up(adapter);
5000         clear_bit(__IXGBE_RESETTING, &adapter->state);
5001 }
5002
5003 void ixgbe_up(struct ixgbe_adapter *adapter)
5004 {
5005         /* hardware has been reset, we need to reload some things */
5006         ixgbe_configure(adapter);
5007
5008         ixgbe_up_complete(adapter);
5009 }
5010
5011 void ixgbe_reset(struct ixgbe_adapter *adapter)
5012 {
5013         struct ixgbe_hw *hw = &adapter->hw;
5014         struct net_device *netdev = adapter->netdev;
5015         int err;
5016         u8 old_addr[ETH_ALEN];
5017
5018         if (ixgbe_removed(hw->hw_addr))
5019                 return;
5020         /* lock SFP init bit to prevent race conditions with the watchdog */
5021         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5022                 usleep_range(1000, 2000);
5023
5024         /* clear all SFP and link config related flags while holding SFP_INIT */
5025         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5026                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5027         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5028
5029         err = hw->mac.ops.init_hw(hw);
5030         switch (err) {
5031         case 0:
5032         case IXGBE_ERR_SFP_NOT_PRESENT:
5033         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5034                 break;
5035         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5036                 e_dev_err("master disable timed out\n");
5037                 break;
5038         case IXGBE_ERR_EEPROM_VERSION:
5039                 /* We are running on a pre-production device, log a warning */
5040                 e_dev_warn("This device is a pre-production adapter/LOM. "
5041                            "Please be aware there may be issues associated with "
5042                            "your hardware.  If you are experiencing problems "
5043                            "please contact your Intel or hardware "
5044                            "representative who provided you with this "
5045                            "hardware.\n");
5046                 break;
5047         default:
5048                 e_dev_err("Hardware Error: %d\n", err);
5049         }
5050
5051         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5052         /* do not flush user set addresses */
5053         memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5054         ixgbe_flush_sw_mac_table(adapter);
5055         ixgbe_mac_set_default_filter(adapter, old_addr);
5056
5057         /* update SAN MAC vmdq pool selection */
5058         if (hw->mac.san_mac_rar_index)
5059                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5060
5061         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5062                 ixgbe_ptp_reset(adapter);
5063
5064         if (hw->phy.ops.set_phy_power) {
5065                 if (!netif_running(adapter->netdev) && !adapter->wol)
5066                         hw->phy.ops.set_phy_power(hw, false);
5067                 else
5068                         hw->phy.ops.set_phy_power(hw, true);
5069         }
5070 }
5071
5072 /**
5073  * ixgbe_clean_tx_ring - Free Tx Buffers
5074  * @tx_ring: ring to be cleaned
5075  **/
5076 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5077 {
5078         struct ixgbe_tx_buffer *tx_buffer_info;
5079         unsigned long size;
5080         u16 i;
5081
5082         /* ring already cleared, nothing to do */
5083         if (!tx_ring->tx_buffer_info)
5084                 return;
5085
5086         /* Free all the Tx ring sk_buffs */
5087         for (i = 0; i < tx_ring->count; i++) {
5088                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5089                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5090         }
5091
5092         netdev_tx_reset_queue(txring_txq(tx_ring));
5093
5094         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5095         memset(tx_ring->tx_buffer_info, 0, size);
5096
5097         /* Zero out the descriptor ring */
5098         memset(tx_ring->desc, 0, tx_ring->size);
5099
5100         tx_ring->next_to_use = 0;
5101         tx_ring->next_to_clean = 0;
5102 }
5103
5104 /**
5105  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5106  * @adapter: board private structure
5107  **/
5108 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5109 {
5110         int i;
5111
5112         for (i = 0; i < adapter->num_rx_queues; i++)
5113                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5114 }
5115
5116 /**
5117  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5118  * @adapter: board private structure
5119  **/
5120 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5121 {
5122         int i;
5123
5124         for (i = 0; i < adapter->num_tx_queues; i++)
5125                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5126 }
5127
5128 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5129 {
5130         struct hlist_node *node2;
5131         struct ixgbe_fdir_filter *filter;
5132
5133         spin_lock(&adapter->fdir_perfect_lock);
5134
5135         hlist_for_each_entry_safe(filter, node2,
5136                                   &adapter->fdir_filter_list, fdir_node) {
5137                 hlist_del(&filter->fdir_node);
5138                 kfree(filter);
5139         }
5140         adapter->fdir_filter_count = 0;
5141
5142         spin_unlock(&adapter->fdir_perfect_lock);
5143 }
5144
5145 void ixgbe_down(struct ixgbe_adapter *adapter)
5146 {
5147         struct net_device *netdev = adapter->netdev;
5148         struct ixgbe_hw *hw = &adapter->hw;
5149         struct net_device *upper;
5150         struct list_head *iter;
5151         int i;
5152
5153         /* signal that we are down to the interrupt handler */
5154         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5155                 return; /* do nothing if already down */
5156
5157         /* disable receives */
5158         hw->mac.ops.disable_rx(hw);
5159
5160         /* disable all enabled rx queues */
5161         for (i = 0; i < adapter->num_rx_queues; i++)
5162                 /* this call also flushes the previous write */
5163                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5164
5165         usleep_range(10000, 20000);
5166
5167         netif_tx_stop_all_queues(netdev);
5168
5169         /* call carrier off first to avoid false dev_watchdog timeouts */
5170         netif_carrier_off(netdev);
5171         netif_tx_disable(netdev);
5172
5173         /* disable any upper devices */
5174         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5175                 if (netif_is_macvlan(upper)) {
5176                         struct macvlan_dev *vlan = netdev_priv(upper);
5177
5178                         if (vlan->fwd_priv) {
5179                                 netif_tx_stop_all_queues(upper);
5180                                 netif_carrier_off(upper);
5181                                 netif_tx_disable(upper);
5182                         }
5183                 }
5184         }
5185
5186         ixgbe_irq_disable(adapter);
5187
5188         ixgbe_napi_disable_all(adapter);
5189
5190         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5191                              IXGBE_FLAG2_RESET_REQUESTED);
5192         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5193
5194         del_timer_sync(&adapter->service_timer);
5195
5196         if (adapter->num_vfs) {
5197                 /* Clear EITR Select mapping */
5198                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5199
5200                 /* Mark all the VFs as inactive */
5201                 for (i = 0 ; i < adapter->num_vfs; i++)
5202                         adapter->vfinfo[i].clear_to_send = false;
5203
5204                 /* ping all the active vfs to let them know we are going down */
5205                 ixgbe_ping_all_vfs(adapter);
5206
5207                 /* Disable all VFTE/VFRE TX/RX */
5208                 ixgbe_disable_tx_rx(adapter);
5209         }
5210
5211         /* disable transmits in the hardware now that interrupts are off */
5212         for (i = 0; i < adapter->num_tx_queues; i++) {
5213                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5214                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5215         }
5216
5217         /* Disable the Tx DMA engine on 82599 and later MAC */
5218         switch (hw->mac.type) {
5219         case ixgbe_mac_82599EB:
5220         case ixgbe_mac_X540:
5221         case ixgbe_mac_X550:
5222         case ixgbe_mac_X550EM_x:
5223                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5224                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5225                                  ~IXGBE_DMATXCTL_TE));
5226                 break;
5227         default:
5228                 break;
5229         }
5230
5231         if (!pci_channel_offline(adapter->pdev))
5232                 ixgbe_reset(adapter);
5233
5234         /* power down the optics for 82599 SFP+ fiber */
5235         if (hw->mac.ops.disable_tx_laser)
5236                 hw->mac.ops.disable_tx_laser(hw);
5237
5238         ixgbe_clean_all_tx_rings(adapter);
5239         ixgbe_clean_all_rx_rings(adapter);
5240
5241 #ifdef CONFIG_IXGBE_DCA
5242         /* since we reset the hardware DCA settings were cleared */
5243         ixgbe_setup_dca(adapter);
5244 #endif
5245 }
5246
5247 /**
5248  * ixgbe_tx_timeout - Respond to a Tx Hang
5249  * @netdev: network interface device structure
5250  **/
5251 static void ixgbe_tx_timeout(struct net_device *netdev)
5252 {
5253         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5254
5255         /* Do the reset outside of interrupt context */
5256         ixgbe_tx_timeout_reset(adapter);
5257 }
5258
5259 /**
5260  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5261  * @adapter: board private structure to initialize
5262  *
5263  * ixgbe_sw_init initializes the Adapter private data structure.
5264  * Fields are initialized based on PCI device information and
5265  * OS network device settings (MTU size).
5266  **/
5267 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5268 {
5269         struct ixgbe_hw *hw = &adapter->hw;
5270         struct pci_dev *pdev = adapter->pdev;
5271         unsigned int rss, fdir;
5272         u32 fwsm;
5273 #ifdef CONFIG_IXGBE_DCB
5274         int j;
5275         struct tc_configuration *tc;
5276 #endif
5277
5278         /* PCI config space info */
5279
5280         hw->vendor_id = pdev->vendor;
5281         hw->device_id = pdev->device;
5282         hw->revision_id = pdev->revision;
5283         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5284         hw->subsystem_device_id = pdev->subsystem_device;
5285
5286         /* Set common capability flags and settings */
5287         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5288         adapter->ring_feature[RING_F_RSS].limit = rss;
5289         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5290         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5291         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5292         adapter->atr_sample_rate = 20;
5293         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5294         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5295         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5296 #ifdef CONFIG_IXGBE_DCA
5297         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5298 #endif
5299 #ifdef IXGBE_FCOE
5300         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5301         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5302 #ifdef CONFIG_IXGBE_DCB
5303         /* Default traffic class to use for FCoE */
5304         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5305 #endif /* CONFIG_IXGBE_DCB */
5306 #endif /* IXGBE_FCOE */
5307
5308         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5309                                      hw->mac.num_rar_entries,
5310                                      GFP_ATOMIC);
5311
5312         /* Set MAC specific capability flags and exceptions */
5313         switch (hw->mac.type) {
5314         case ixgbe_mac_82598EB:
5315                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5316                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5317
5318                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5319                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5320
5321                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5322                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5323                 adapter->atr_sample_rate = 0;
5324                 adapter->fdir_pballoc = 0;
5325 #ifdef IXGBE_FCOE
5326                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5327                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5328 #ifdef CONFIG_IXGBE_DCB
5329                 adapter->fcoe.up = 0;
5330 #endif /* IXGBE_DCB */
5331 #endif /* IXGBE_FCOE */
5332                 break;
5333         case ixgbe_mac_82599EB:
5334                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5335                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5336                 break;
5337         case ixgbe_mac_X540:
5338                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5339                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5340                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5341                 break;
5342         case ixgbe_mac_X550EM_x:
5343         case ixgbe_mac_X550:
5344 #ifdef CONFIG_IXGBE_DCA
5345                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5346 #endif
5347 #ifdef CONFIG_IXGBE_VXLAN
5348                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5349 #endif
5350                 break;
5351         default:
5352                 break;
5353         }
5354
5355 #ifdef IXGBE_FCOE
5356         /* FCoE support exists, always init the FCoE lock */
5357         spin_lock_init(&adapter->fcoe.lock);
5358
5359 #endif
5360         /* n-tuple support exists, always init our spinlock */
5361         spin_lock_init(&adapter->fdir_perfect_lock);
5362
5363 #ifdef CONFIG_IXGBE_DCB
5364         switch (hw->mac.type) {
5365         case ixgbe_mac_X540:
5366         case ixgbe_mac_X550:
5367         case ixgbe_mac_X550EM_x:
5368                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5369                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5370                 break;
5371         default:
5372                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5373                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5374                 break;
5375         }
5376
5377         /* Configure DCB traffic classes */
5378         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5379                 tc = &adapter->dcb_cfg.tc_config[j];
5380                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5381                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5382                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5383                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5384                 tc->dcb_pfc = pfc_disabled;
5385         }
5386
5387         /* Initialize default user to priority mapping, UPx->TC0 */
5388         tc = &adapter->dcb_cfg.tc_config[0];
5389         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5390         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5391
5392         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5393         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5394         adapter->dcb_cfg.pfc_mode_enable = false;
5395         adapter->dcb_set_bitmap = 0x00;
5396         adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5397         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5398                sizeof(adapter->temp_dcb_cfg));
5399
5400 #endif
5401
5402         /* default flow control settings */
5403         hw->fc.requested_mode = ixgbe_fc_full;
5404         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5405         ixgbe_pbthresh_setup(adapter);
5406         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5407         hw->fc.send_xon = true;
5408         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5409
5410 #ifdef CONFIG_PCI_IOV
5411         if (max_vfs > 0)
5412                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5413
5414         /* assign number of SR-IOV VFs */
5415         if (hw->mac.type != ixgbe_mac_82598EB) {
5416                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5417                         adapter->num_vfs = 0;
5418                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5419                 } else {
5420                         adapter->num_vfs = max_vfs;
5421                 }
5422         }
5423 #endif /* CONFIG_PCI_IOV */
5424
5425         /* enable itr by default in dynamic mode */
5426         adapter->rx_itr_setting = 1;
5427         adapter->tx_itr_setting = 1;
5428
5429         /* set default ring sizes */
5430         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5431         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5432
5433         /* set default work limits */
5434         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5435
5436         /* initialize eeprom parameters */
5437         if (ixgbe_init_eeprom_params_generic(hw)) {
5438                 e_dev_err("EEPROM initialization failed\n");
5439                 return -EIO;
5440         }
5441
5442         /* PF holds first pool slot */
5443         set_bit(0, &adapter->fwd_bitmask);
5444         set_bit(__IXGBE_DOWN, &adapter->state);
5445
5446         return 0;
5447 }
5448
5449 /**
5450  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5451  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5452  *
5453  * Return 0 on success, negative on failure
5454  **/
5455 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5456 {
5457         struct device *dev = tx_ring->dev;
5458         int orig_node = dev_to_node(dev);
5459         int ring_node = -1;
5460         int size;
5461
5462         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5463
5464         if (tx_ring->q_vector)
5465                 ring_node = tx_ring->q_vector->numa_node;
5466
5467         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5468         if (!tx_ring->tx_buffer_info)
5469                 tx_ring->tx_buffer_info = vzalloc(size);
5470         if (!tx_ring->tx_buffer_info)
5471                 goto err;
5472
5473         u64_stats_init(&tx_ring->syncp);
5474
5475         /* round up to nearest 4K */
5476         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5477         tx_ring->size = ALIGN(tx_ring->size, 4096);
5478
5479         set_dev_node(dev, ring_node);
5480         tx_ring->desc = dma_alloc_coherent(dev,
5481                                            tx_ring->size,
5482                                            &tx_ring->dma,
5483                                            GFP_KERNEL);
5484         set_dev_node(dev, orig_node);
5485         if (!tx_ring->desc)
5486                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5487                                                    &tx_ring->dma, GFP_KERNEL);
5488         if (!tx_ring->desc)
5489                 goto err;
5490
5491         tx_ring->next_to_use = 0;
5492         tx_ring->next_to_clean = 0;
5493         return 0;
5494
5495 err:
5496         vfree(tx_ring->tx_buffer_info);
5497         tx_ring->tx_buffer_info = NULL;
5498         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5499         return -ENOMEM;
5500 }
5501
5502 /**
5503  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5504  * @adapter: board private structure
5505  *
5506  * If this function returns with an error, then it's possible one or
5507  * more of the rings is populated (while the rest are not).  It is the
5508  * callers duty to clean those orphaned rings.
5509  *
5510  * Return 0 on success, negative on failure
5511  **/
5512 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5513 {
5514         int i, err = 0;
5515
5516         for (i = 0; i < adapter->num_tx_queues; i++) {
5517                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5518                 if (!err)
5519                         continue;
5520
5521                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5522                 goto err_setup_tx;
5523         }
5524
5525         return 0;
5526 err_setup_tx:
5527         /* rewind the index freeing the rings as we go */
5528         while (i--)
5529                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5530         return err;
5531 }
5532
5533 /**
5534  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5535  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5536  *
5537  * Returns 0 on success, negative on failure
5538  **/
5539 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5540 {
5541         struct device *dev = rx_ring->dev;
5542         int orig_node = dev_to_node(dev);
5543         int ring_node = -1;
5544         int size;
5545
5546         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5547
5548         if (rx_ring->q_vector)
5549                 ring_node = rx_ring->q_vector->numa_node;
5550
5551         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5552         if (!rx_ring->rx_buffer_info)
5553                 rx_ring->rx_buffer_info = vzalloc(size);
5554         if (!rx_ring->rx_buffer_info)
5555                 goto err;
5556
5557         u64_stats_init(&rx_ring->syncp);
5558
5559         /* Round up to nearest 4K */
5560         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5561         rx_ring->size = ALIGN(rx_ring->size, 4096);
5562
5563         set_dev_node(dev, ring_node);
5564         rx_ring->desc = dma_alloc_coherent(dev,
5565                                            rx_ring->size,
5566                                            &rx_ring->dma,
5567                                            GFP_KERNEL);
5568         set_dev_node(dev, orig_node);
5569         if (!rx_ring->desc)
5570                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5571                                                    &rx_ring->dma, GFP_KERNEL);
5572         if (!rx_ring->desc)
5573                 goto err;
5574
5575         rx_ring->next_to_clean = 0;
5576         rx_ring->next_to_use = 0;
5577
5578         return 0;
5579 err:
5580         vfree(rx_ring->rx_buffer_info);
5581         rx_ring->rx_buffer_info = NULL;
5582         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5583         return -ENOMEM;
5584 }
5585
5586 /**
5587  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5588  * @adapter: board private structure
5589  *
5590  * If this function returns with an error, then it's possible one or
5591  * more of the rings is populated (while the rest are not).  It is the
5592  * callers duty to clean those orphaned rings.
5593  *
5594  * Return 0 on success, negative on failure
5595  **/
5596 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5597 {
5598         int i, err = 0;
5599
5600         for (i = 0; i < adapter->num_rx_queues; i++) {
5601                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5602                 if (!err)
5603                         continue;
5604
5605                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5606                 goto err_setup_rx;
5607         }
5608
5609 #ifdef IXGBE_FCOE
5610         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5611         if (!err)
5612 #endif
5613                 return 0;
5614 err_setup_rx:
5615         /* rewind the index freeing the rings as we go */
5616         while (i--)
5617                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5618         return err;
5619 }
5620
5621 /**
5622  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5623  * @tx_ring: Tx descriptor ring for a specific queue
5624  *
5625  * Free all transmit software resources
5626  **/
5627 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5628 {
5629         ixgbe_clean_tx_ring(tx_ring);
5630
5631         vfree(tx_ring->tx_buffer_info);
5632         tx_ring->tx_buffer_info = NULL;
5633
5634         /* if not set, then don't free */
5635         if (!tx_ring->desc)
5636                 return;
5637
5638         dma_free_coherent(tx_ring->dev, tx_ring->size,
5639                           tx_ring->desc, tx_ring->dma);
5640
5641         tx_ring->desc = NULL;
5642 }
5643
5644 /**
5645  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5646  * @adapter: board private structure
5647  *
5648  * Free all transmit software resources
5649  **/
5650 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5651 {
5652         int i;
5653
5654         for (i = 0; i < adapter->num_tx_queues; i++)
5655                 if (adapter->tx_ring[i]->desc)
5656                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
5657 }
5658
5659 /**
5660  * ixgbe_free_rx_resources - Free Rx Resources
5661  * @rx_ring: ring to clean the resources from
5662  *
5663  * Free all receive software resources
5664  **/
5665 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5666 {
5667         ixgbe_clean_rx_ring(rx_ring);
5668
5669         vfree(rx_ring->rx_buffer_info);
5670         rx_ring->rx_buffer_info = NULL;
5671
5672         /* if not set, then don't free */
5673         if (!rx_ring->desc)
5674                 return;
5675
5676         dma_free_coherent(rx_ring->dev, rx_ring->size,
5677                           rx_ring->desc, rx_ring->dma);
5678
5679         rx_ring->desc = NULL;
5680 }
5681
5682 /**
5683  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5684  * @adapter: board private structure
5685  *
5686  * Free all receive software resources
5687  **/
5688 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5689 {
5690         int i;
5691
5692 #ifdef IXGBE_FCOE
5693         ixgbe_free_fcoe_ddp_resources(adapter);
5694
5695 #endif
5696         for (i = 0; i < adapter->num_rx_queues; i++)
5697                 if (adapter->rx_ring[i]->desc)
5698                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
5699 }
5700
5701 /**
5702  * ixgbe_change_mtu - Change the Maximum Transfer Unit
5703  * @netdev: network interface device structure
5704  * @new_mtu: new value for maximum frame size
5705  *
5706  * Returns 0 on success, negative on failure
5707  **/
5708 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5709 {
5710         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5711         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5712
5713         /* MTU < 68 is an error and causes problems on some kernels */
5714         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5715                 return -EINVAL;
5716
5717         /*
5718          * For 82599EB we cannot allow legacy VFs to enable their receive
5719          * paths when MTU greater than 1500 is configured.  So display a
5720          * warning that legacy VFs will be disabled.
5721          */
5722         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5723             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5724             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5725                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5726
5727         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5728
5729         /* must set new MTU before calling down or up */
5730         netdev->mtu = new_mtu;
5731
5732         if (netif_running(netdev))
5733                 ixgbe_reinit_locked(adapter);
5734
5735         return 0;
5736 }
5737
5738 /**
5739  * ixgbe_open - Called when a network interface is made active
5740  * @netdev: network interface device structure
5741  *
5742  * Returns 0 on success, negative value on failure
5743  *
5744  * The open entry point is called when a network interface is made
5745  * active by the system (IFF_UP).  At this point all resources needed
5746  * for transmit and receive operations are allocated, the interrupt
5747  * handler is registered with the OS, the watchdog timer is started,
5748  * and the stack is notified that the interface is ready.
5749  **/
5750 static int ixgbe_open(struct net_device *netdev)
5751 {
5752         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5753         struct ixgbe_hw *hw = &adapter->hw;
5754         int err, queues;
5755
5756         /* disallow open during test */
5757         if (test_bit(__IXGBE_TESTING, &adapter->state))
5758                 return -EBUSY;
5759
5760         netif_carrier_off(netdev);
5761
5762         /* allocate transmit descriptors */
5763         err = ixgbe_setup_all_tx_resources(adapter);
5764         if (err)
5765                 goto err_setup_tx;
5766
5767         /* allocate receive descriptors */
5768         err = ixgbe_setup_all_rx_resources(adapter);
5769         if (err)
5770                 goto err_setup_rx;
5771
5772         ixgbe_configure(adapter);
5773
5774         err = ixgbe_request_irq(adapter);
5775         if (err)
5776                 goto err_req_irq;
5777
5778         /* Notify the stack of the actual queue counts. */
5779         if (adapter->num_rx_pools > 1)
5780                 queues = adapter->num_rx_queues_per_pool;
5781         else
5782                 queues = adapter->num_tx_queues;
5783
5784         err = netif_set_real_num_tx_queues(netdev, queues);
5785         if (err)
5786                 goto err_set_queues;
5787
5788         if (adapter->num_rx_pools > 1 &&
5789             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5790                 queues = IXGBE_MAX_L2A_QUEUES;
5791         else
5792                 queues = adapter->num_rx_queues;
5793         err = netif_set_real_num_rx_queues(netdev, queues);
5794         if (err)
5795                 goto err_set_queues;
5796
5797         ixgbe_ptp_init(adapter);
5798
5799         ixgbe_up_complete(adapter);
5800
5801         ixgbe_clear_vxlan_port(adapter);
5802 #ifdef CONFIG_IXGBE_VXLAN
5803         vxlan_get_rx_port(netdev);
5804 #endif
5805
5806         return 0;
5807
5808 err_set_queues:
5809         ixgbe_free_irq(adapter);
5810 err_req_irq:
5811         ixgbe_free_all_rx_resources(adapter);
5812         if (hw->phy.ops.set_phy_power && !adapter->wol)
5813                 hw->phy.ops.set_phy_power(&adapter->hw, false);
5814 err_setup_rx:
5815         ixgbe_free_all_tx_resources(adapter);
5816 err_setup_tx:
5817         ixgbe_reset(adapter);
5818
5819         return err;
5820 }
5821
5822 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5823 {
5824         ixgbe_ptp_suspend(adapter);
5825
5826         if (adapter->hw.phy.ops.enter_lplu) {
5827                 adapter->hw.phy.reset_disable = true;
5828                 ixgbe_down(adapter);
5829                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5830                 adapter->hw.phy.reset_disable = false;
5831         } else {
5832                 ixgbe_down(adapter);
5833         }
5834
5835         ixgbe_free_irq(adapter);
5836
5837         ixgbe_free_all_tx_resources(adapter);
5838         ixgbe_free_all_rx_resources(adapter);
5839 }
5840
5841 /**
5842  * ixgbe_close - Disables a network interface
5843  * @netdev: network interface device structure
5844  *
5845  * Returns 0, this is not allowed to fail
5846  *
5847  * The close entry point is called when an interface is de-activated
5848  * by the OS.  The hardware is still under the drivers control, but
5849  * needs to be disabled.  A global MAC reset is issued to stop the
5850  * hardware, and all transmit and receive resources are freed.
5851  **/
5852 static int ixgbe_close(struct net_device *netdev)
5853 {
5854         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5855
5856         ixgbe_ptp_stop(adapter);
5857
5858         ixgbe_close_suspend(adapter);
5859
5860         ixgbe_fdir_filter_exit(adapter);
5861
5862         ixgbe_release_hw_control(adapter);
5863
5864         return 0;
5865 }
5866
5867 #ifdef CONFIG_PM
5868 static int ixgbe_resume(struct pci_dev *pdev)
5869 {
5870         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5871         struct net_device *netdev = adapter->netdev;
5872         u32 err;
5873
5874         adapter->hw.hw_addr = adapter->io_addr;
5875         pci_set_power_state(pdev, PCI_D0);
5876         pci_restore_state(pdev);
5877         /*
5878          * pci_restore_state clears dev->state_saved so call
5879          * pci_save_state to restore it.
5880          */
5881         pci_save_state(pdev);
5882
5883         err = pci_enable_device_mem(pdev);
5884         if (err) {
5885                 e_dev_err("Cannot enable PCI device from suspend\n");
5886                 return err;
5887         }
5888         smp_mb__before_atomic();
5889         clear_bit(__IXGBE_DISABLED, &adapter->state);
5890         pci_set_master(pdev);
5891
5892         pci_wake_from_d3(pdev, false);
5893
5894         ixgbe_reset(adapter);
5895
5896         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5897
5898         rtnl_lock();
5899         err = ixgbe_init_interrupt_scheme(adapter);
5900         if (!err && netif_running(netdev))
5901                 err = ixgbe_open(netdev);
5902
5903         rtnl_unlock();
5904
5905         if (err)
5906                 return err;
5907
5908         netif_device_attach(netdev);
5909
5910         return 0;
5911 }
5912 #endif /* CONFIG_PM */
5913
5914 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5915 {
5916         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5917         struct net_device *netdev = adapter->netdev;
5918         struct ixgbe_hw *hw = &adapter->hw;
5919         u32 ctrl, fctrl;
5920         u32 wufc = adapter->wol;
5921 #ifdef CONFIG_PM
5922         int retval = 0;
5923 #endif
5924
5925         netif_device_detach(netdev);
5926
5927         rtnl_lock();
5928         if (netif_running(netdev))
5929                 ixgbe_close_suspend(adapter);
5930         rtnl_unlock();
5931
5932         ixgbe_clear_interrupt_scheme(adapter);
5933
5934 #ifdef CONFIG_PM
5935         retval = pci_save_state(pdev);
5936         if (retval)
5937                 return retval;
5938
5939 #endif
5940         if (hw->mac.ops.stop_link_on_d3)
5941                 hw->mac.ops.stop_link_on_d3(hw);
5942
5943         if (wufc) {
5944                 ixgbe_set_rx_mode(netdev);
5945
5946                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5947                 if (hw->mac.ops.enable_tx_laser)
5948                         hw->mac.ops.enable_tx_laser(hw);
5949
5950                 /* turn on all-multi mode if wake on multicast is enabled */
5951                 if (wufc & IXGBE_WUFC_MC) {
5952                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5953                         fctrl |= IXGBE_FCTRL_MPE;
5954                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5955                 }
5956
5957                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5958                 ctrl |= IXGBE_CTRL_GIO_DIS;
5959                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5960
5961                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5962         } else {
5963                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5964                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5965         }
5966
5967         switch (hw->mac.type) {
5968         case ixgbe_mac_82598EB:
5969                 pci_wake_from_d3(pdev, false);
5970                 break;
5971         case ixgbe_mac_82599EB:
5972         case ixgbe_mac_X540:
5973         case ixgbe_mac_X550:
5974         case ixgbe_mac_X550EM_x:
5975                 pci_wake_from_d3(pdev, !!wufc);
5976                 break;
5977         default:
5978                 break;
5979         }
5980
5981         *enable_wake = !!wufc;
5982         if (hw->phy.ops.set_phy_power && !*enable_wake)
5983                 hw->phy.ops.set_phy_power(hw, false);
5984
5985         ixgbe_release_hw_control(adapter);
5986
5987         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5988                 pci_disable_device(pdev);
5989
5990         return 0;
5991 }
5992
5993 #ifdef CONFIG_PM
5994 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5995 {
5996         int retval;
5997         bool wake;
5998
5999         retval = __ixgbe_shutdown(pdev, &wake);
6000         if (retval)
6001                 return retval;
6002
6003         if (wake) {
6004                 pci_prepare_to_sleep(pdev);
6005         } else {
6006                 pci_wake_from_d3(pdev, false);
6007                 pci_set_power_state(pdev, PCI_D3hot);
6008         }
6009
6010         return 0;
6011 }
6012 #endif /* CONFIG_PM */
6013
6014 static void ixgbe_shutdown(struct pci_dev *pdev)
6015 {
6016         bool wake;
6017
6018         __ixgbe_shutdown(pdev, &wake);
6019
6020         if (system_state == SYSTEM_POWER_OFF) {
6021                 pci_wake_from_d3(pdev, wake);
6022                 pci_set_power_state(pdev, PCI_D3hot);
6023         }
6024 }
6025
6026 /**
6027  * ixgbe_update_stats - Update the board statistics counters.
6028  * @adapter: board private structure
6029  **/
6030 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6031 {
6032         struct net_device *netdev = adapter->netdev;
6033         struct ixgbe_hw *hw = &adapter->hw;
6034         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6035         u64 total_mpc = 0;
6036         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6037         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6038         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6039         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6040
6041         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6042             test_bit(__IXGBE_RESETTING, &adapter->state))
6043                 return;
6044
6045         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6046                 u64 rsc_count = 0;
6047                 u64 rsc_flush = 0;
6048                 for (i = 0; i < adapter->num_rx_queues; i++) {
6049                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6050                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6051                 }
6052                 adapter->rsc_total_count = rsc_count;
6053                 adapter->rsc_total_flush = rsc_flush;
6054         }
6055
6056         for (i = 0; i < adapter->num_rx_queues; i++) {
6057                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6058                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6059                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6060                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6061                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6062                 bytes += rx_ring->stats.bytes;
6063                 packets += rx_ring->stats.packets;
6064         }
6065         adapter->non_eop_descs = non_eop_descs;
6066         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6067         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6068         adapter->hw_csum_rx_error = hw_csum_rx_error;
6069         netdev->stats.rx_bytes = bytes;
6070         netdev->stats.rx_packets = packets;
6071
6072         bytes = 0;
6073         packets = 0;
6074         /* gather some stats to the adapter struct that are per queue */
6075         for (i = 0; i < adapter->num_tx_queues; i++) {
6076                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6077                 restart_queue += tx_ring->tx_stats.restart_queue;
6078                 tx_busy += tx_ring->tx_stats.tx_busy;
6079                 bytes += tx_ring->stats.bytes;
6080                 packets += tx_ring->stats.packets;
6081         }
6082         adapter->restart_queue = restart_queue;
6083         adapter->tx_busy = tx_busy;
6084         netdev->stats.tx_bytes = bytes;
6085         netdev->stats.tx_packets = packets;
6086
6087         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6088
6089         /* 8 register reads */
6090         for (i = 0; i < 8; i++) {
6091                 /* for packet buffers not used, the register should read 0 */
6092                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6093                 missed_rx += mpc;
6094                 hwstats->mpc[i] += mpc;
6095                 total_mpc += hwstats->mpc[i];
6096                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6097                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6098                 switch (hw->mac.type) {
6099                 case ixgbe_mac_82598EB:
6100                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6101                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6102                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6103                         hwstats->pxonrxc[i] +=
6104                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6105                         break;
6106                 case ixgbe_mac_82599EB:
6107                 case ixgbe_mac_X540:
6108                 case ixgbe_mac_X550:
6109                 case ixgbe_mac_X550EM_x:
6110                         hwstats->pxonrxc[i] +=
6111                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6112                         break;
6113                 default:
6114                         break;
6115                 }
6116         }
6117
6118         /*16 register reads */
6119         for (i = 0; i < 16; i++) {
6120                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6121                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6122                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6123                     (hw->mac.type == ixgbe_mac_X540) ||
6124                     (hw->mac.type == ixgbe_mac_X550) ||
6125                     (hw->mac.type == ixgbe_mac_X550EM_x)) {
6126                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6127                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6128                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6129                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6130                 }
6131         }
6132
6133         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6134         /* work around hardware counting issue */
6135         hwstats->gprc -= missed_rx;
6136
6137         ixgbe_update_xoff_received(adapter);
6138
6139         /* 82598 hardware only has a 32 bit counter in the high register */
6140         switch (hw->mac.type) {
6141         case ixgbe_mac_82598EB:
6142                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6143                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6144                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6145                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6146                 break;
6147         case ixgbe_mac_X540:
6148         case ixgbe_mac_X550:
6149         case ixgbe_mac_X550EM_x:
6150                 /* OS2BMC stats are X540 and later */
6151                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6152                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6153                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6154                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6155         case ixgbe_mac_82599EB:
6156                 for (i = 0; i < 16; i++)
6157                         adapter->hw_rx_no_dma_resources +=
6158                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6159                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6160                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6161                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6162                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6163                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6164                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6165                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6166                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6167                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6168 #ifdef IXGBE_FCOE
6169                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6170                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6171                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6172                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6173                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6174                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6175                 /* Add up per cpu counters for total ddp aloc fail */
6176                 if (adapter->fcoe.ddp_pool) {
6177                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6178                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6179                         unsigned int cpu;
6180                         u64 noddp = 0, noddp_ext_buff = 0;
6181                         for_each_possible_cpu(cpu) {
6182                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6183                                 noddp += ddp_pool->noddp;
6184                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6185                         }
6186                         hwstats->fcoe_noddp = noddp;
6187                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6188                 }
6189 #endif /* IXGBE_FCOE */
6190                 break;
6191         default:
6192                 break;
6193         }
6194         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6195         hwstats->bprc += bprc;
6196         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6197         if (hw->mac.type == ixgbe_mac_82598EB)
6198                 hwstats->mprc -= bprc;
6199         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6200         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6201         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6202         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6203         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6204         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6205         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6206         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6207         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6208         hwstats->lxontxc += lxon;
6209         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6210         hwstats->lxofftxc += lxoff;
6211         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6212         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6213         /*
6214          * 82598 errata - tx of flow control packets is included in tx counters
6215          */
6216         xon_off_tot = lxon + lxoff;
6217         hwstats->gptc -= xon_off_tot;
6218         hwstats->mptc -= xon_off_tot;
6219         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6220         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6221         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6222         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6223         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6224         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6225         hwstats->ptc64 -= xon_off_tot;
6226         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6227         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6228         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6229         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6230         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6231         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6232
6233         /* Fill out the OS statistics structure */
6234         netdev->stats.multicast = hwstats->mprc;
6235
6236         /* Rx Errors */
6237         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6238         netdev->stats.rx_dropped = 0;
6239         netdev->stats.rx_length_errors = hwstats->rlec;
6240         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6241         netdev->stats.rx_missed_errors = total_mpc;
6242 }
6243
6244 /**
6245  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6246  * @adapter: pointer to the device adapter structure
6247  **/
6248 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6249 {
6250         struct ixgbe_hw *hw = &adapter->hw;
6251         int i;
6252
6253         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6254                 return;
6255
6256         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6257
6258         /* if interface is down do nothing */
6259         if (test_bit(__IXGBE_DOWN, &adapter->state))
6260                 return;
6261
6262         /* do nothing if we are not using signature filters */
6263         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6264                 return;
6265
6266         adapter->fdir_overflow++;
6267
6268         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6269                 for (i = 0; i < adapter->num_tx_queues; i++)
6270                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6271                                 &(adapter->tx_ring[i]->state));
6272                 /* re-enable flow director interrupts */
6273                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6274         } else {
6275                 e_err(probe, "failed to finish FDIR re-initialization, "
6276                       "ignored adding FDIR ATR filters\n");
6277         }
6278 }
6279
6280 /**
6281  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6282  * @adapter: pointer to the device adapter structure
6283  *
6284  * This function serves two purposes.  First it strobes the interrupt lines
6285  * in order to make certain interrupts are occurring.  Secondly it sets the
6286  * bits needed to check for TX hangs.  As a result we should immediately
6287  * determine if a hang has occurred.
6288  */
6289 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6290 {
6291         struct ixgbe_hw *hw = &adapter->hw;
6292         u64 eics = 0;
6293         int i;
6294
6295         /* If we're down, removing or resetting, just bail */
6296         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6297             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6298             test_bit(__IXGBE_RESETTING, &adapter->state))
6299                 return;
6300
6301         /* Force detection of hung controller */
6302         if (netif_carrier_ok(adapter->netdev)) {
6303                 for (i = 0; i < adapter->num_tx_queues; i++)
6304                         set_check_for_tx_hang(adapter->tx_ring[i]);
6305         }
6306
6307         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6308                 /*
6309                  * for legacy and MSI interrupts don't set any bits
6310                  * that are enabled for EIAM, because this operation
6311                  * would set *both* EIMS and EICS for any bit in EIAM
6312                  */
6313                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6314                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6315         } else {
6316                 /* get one bit for every active tx/rx interrupt vector */
6317                 for (i = 0; i < adapter->num_q_vectors; i++) {
6318                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6319                         if (qv->rx.ring || qv->tx.ring)
6320                                 eics |= ((u64)1 << i);
6321                 }
6322         }
6323
6324         /* Cause software interrupt to ensure rings are cleaned */
6325         ixgbe_irq_rearm_queues(adapter, eics);
6326 }
6327
6328 /**
6329  * ixgbe_watchdog_update_link - update the link status
6330  * @adapter: pointer to the device adapter structure
6331  * @link_speed: pointer to a u32 to store the link_speed
6332  **/
6333 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6334 {
6335         struct ixgbe_hw *hw = &adapter->hw;
6336         u32 link_speed = adapter->link_speed;
6337         bool link_up = adapter->link_up;
6338         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6339
6340         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6341                 return;
6342
6343         if (hw->mac.ops.check_link) {
6344                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6345         } else {
6346                 /* always assume link is up, if no check link function */
6347                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6348                 link_up = true;
6349         }
6350
6351         if (adapter->ixgbe_ieee_pfc)
6352                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6353
6354         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6355                 hw->mac.ops.fc_enable(hw);
6356                 ixgbe_set_rx_drop_en(adapter);
6357         }
6358
6359         if (link_up ||
6360             time_after(jiffies, (adapter->link_check_timeout +
6361                                  IXGBE_TRY_LINK_TIMEOUT))) {
6362                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6363                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6364                 IXGBE_WRITE_FLUSH(hw);
6365         }
6366
6367         adapter->link_up = link_up;
6368         adapter->link_speed = link_speed;
6369 }
6370
6371 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6372 {
6373 #ifdef CONFIG_IXGBE_DCB
6374         struct net_device *netdev = adapter->netdev;
6375         struct dcb_app app = {
6376                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6377                               .protocol = 0,
6378                              };
6379         u8 up = 0;
6380
6381         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6382                 up = dcb_ieee_getapp_mask(netdev, &app);
6383
6384         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6385 #endif
6386 }
6387
6388 /**
6389  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6390  *                             print link up message
6391  * @adapter: pointer to the device adapter structure
6392  **/
6393 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6394 {
6395         struct net_device *netdev = adapter->netdev;
6396         struct ixgbe_hw *hw = &adapter->hw;
6397         struct net_device *upper;
6398         struct list_head *iter;
6399         u32 link_speed = adapter->link_speed;
6400         const char *speed_str;
6401         bool flow_rx, flow_tx;
6402
6403         /* only continue if link was previously down */
6404         if (netif_carrier_ok(netdev))
6405                 return;
6406
6407         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6408
6409         switch (hw->mac.type) {
6410         case ixgbe_mac_82598EB: {
6411                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6412                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6413                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6414                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6415         }
6416                 break;
6417         case ixgbe_mac_X540:
6418         case ixgbe_mac_X550:
6419         case ixgbe_mac_X550EM_x:
6420         case ixgbe_mac_82599EB: {
6421                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6422                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6423                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6424                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6425         }
6426                 break;
6427         default:
6428                 flow_tx = false;
6429                 flow_rx = false;
6430                 break;
6431         }
6432
6433         adapter->last_rx_ptp_check = jiffies;
6434
6435         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6436                 ixgbe_ptp_start_cyclecounter(adapter);
6437
6438         switch (link_speed) {
6439         case IXGBE_LINK_SPEED_10GB_FULL:
6440                 speed_str = "10 Gbps";
6441                 break;
6442         case IXGBE_LINK_SPEED_2_5GB_FULL:
6443                 speed_str = "2.5 Gbps";
6444                 break;
6445         case IXGBE_LINK_SPEED_1GB_FULL:
6446                 speed_str = "1 Gbps";
6447                 break;
6448         case IXGBE_LINK_SPEED_100_FULL:
6449                 speed_str = "100 Mbps";
6450                 break;
6451         default:
6452                 speed_str = "unknown speed";
6453                 break;
6454         }
6455         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6456                ((flow_rx && flow_tx) ? "RX/TX" :
6457                (flow_rx ? "RX" :
6458                (flow_tx ? "TX" : "None"))));
6459
6460         netif_carrier_on(netdev);
6461         ixgbe_check_vf_rate_limit(adapter);
6462
6463         /* enable transmits */
6464         netif_tx_wake_all_queues(adapter->netdev);
6465
6466         /* enable any upper devices */
6467         rtnl_lock();
6468         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6469                 if (netif_is_macvlan(upper)) {
6470                         struct macvlan_dev *vlan = netdev_priv(upper);
6471
6472                         if (vlan->fwd_priv)
6473                                 netif_tx_wake_all_queues(upper);
6474                 }
6475         }
6476         rtnl_unlock();
6477
6478         /* update the default user priority for VFs */
6479         ixgbe_update_default_up(adapter);
6480
6481         /* ping all the active vfs to let them know link has changed */
6482         ixgbe_ping_all_vfs(adapter);
6483 }
6484
6485 /**
6486  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6487  *                               print link down message
6488  * @adapter: pointer to the adapter structure
6489  **/
6490 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6491 {
6492         struct net_device *netdev = adapter->netdev;
6493         struct ixgbe_hw *hw = &adapter->hw;
6494
6495         adapter->link_up = false;
6496         adapter->link_speed = 0;
6497
6498         /* only continue if link was up previously */
6499         if (!netif_carrier_ok(netdev))
6500                 return;
6501
6502         /* poll for SFP+ cable when link is down */
6503         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6504                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6505
6506         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6507                 ixgbe_ptp_start_cyclecounter(adapter);
6508
6509         e_info(drv, "NIC Link is Down\n");
6510         netif_carrier_off(netdev);
6511
6512         /* ping all the active vfs to let them know link has changed */
6513         ixgbe_ping_all_vfs(adapter);
6514 }
6515
6516 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6517 {
6518         int i;
6519
6520         for (i = 0; i < adapter->num_tx_queues; i++) {
6521                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6522
6523                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6524                         return true;
6525         }
6526
6527         return false;
6528 }
6529
6530 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6531 {
6532         struct ixgbe_hw *hw = &adapter->hw;
6533         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6534         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6535
6536         int i, j;
6537
6538         if (!adapter->num_vfs)
6539                 return false;
6540
6541         /* resetting the PF is only needed for MAC before X550 */
6542         if (hw->mac.type >= ixgbe_mac_X550)
6543                 return false;
6544
6545         for (i = 0; i < adapter->num_vfs; i++) {
6546                 for (j = 0; j < q_per_pool; j++) {
6547                         u32 h, t;
6548
6549                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6550                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6551
6552                         if (h != t)
6553                                 return true;
6554                 }
6555         }
6556
6557         return false;
6558 }
6559
6560 /**
6561  * ixgbe_watchdog_flush_tx - flush queues on link down
6562  * @adapter: pointer to the device adapter structure
6563  **/
6564 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6565 {
6566         if (!netif_carrier_ok(adapter->netdev)) {
6567                 if (ixgbe_ring_tx_pending(adapter) ||
6568                     ixgbe_vf_tx_pending(adapter)) {
6569                         /* We've lost link, so the controller stops DMA,
6570                          * but we've got queued Tx work that's never going
6571                          * to get done, so reset controller to flush Tx.
6572                          * (Do the reset outside of interrupt context).
6573                          */
6574                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6575                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6576                 }
6577         }
6578 }
6579
6580 #ifdef CONFIG_PCI_IOV
6581 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6582                                       struct pci_dev *vfdev)
6583 {
6584         if (!pci_wait_for_pending_transaction(vfdev))
6585                 e_dev_warn("Issuing VFLR with pending transactions\n");
6586
6587         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6588         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6589
6590         msleep(100);
6591 }
6592
6593 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6594 {
6595         struct ixgbe_hw *hw = &adapter->hw;
6596         struct pci_dev *pdev = adapter->pdev;
6597         struct pci_dev *vfdev;
6598         u32 gpc;
6599         int pos;
6600         unsigned short vf_id;
6601
6602         if (!(netif_carrier_ok(adapter->netdev)))
6603                 return;
6604
6605         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6606         if (gpc) /* If incrementing then no need for the check below */
6607                 return;
6608         /* Check to see if a bad DMA write target from an errant or
6609          * malicious VF has caused a PCIe error.  If so then we can
6610          * issue a VFLR to the offending VF(s) and then resume without
6611          * requesting a full slot reset.
6612          */
6613
6614         if (!pdev)
6615                 return;
6616
6617         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6618         if (!pos)
6619                 return;
6620
6621         /* get the device ID for the VF */
6622         pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6623
6624         /* check status reg for all VFs owned by this PF */
6625         vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6626         while (vfdev) {
6627                 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6628                         u16 status_reg;
6629
6630                         pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6631                         if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6632                                 /* issue VFLR */
6633                                 ixgbe_issue_vf_flr(adapter, vfdev);
6634                 }
6635
6636                 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6637         }
6638 }
6639
6640 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6641 {
6642         u32 ssvpc;
6643
6644         /* Do not perform spoof check for 82598 or if not in IOV mode */
6645         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6646             adapter->num_vfs == 0)
6647                 return;
6648
6649         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6650
6651         /*
6652          * ssvpc register is cleared on read, if zero then no
6653          * spoofed packets in the last interval.
6654          */
6655         if (!ssvpc)
6656                 return;
6657
6658         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6659 }
6660 #else
6661 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6662 {
6663 }
6664
6665 static void
6666 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6667 {
6668 }
6669 #endif /* CONFIG_PCI_IOV */
6670
6671
6672 /**
6673  * ixgbe_watchdog_subtask - check and bring link up
6674  * @adapter: pointer to the device adapter structure
6675  **/
6676 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6677 {
6678         /* if interface is down, removing or resetting, do nothing */
6679         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6680             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6681             test_bit(__IXGBE_RESETTING, &adapter->state))
6682                 return;
6683
6684         ixgbe_watchdog_update_link(adapter);
6685
6686         if (adapter->link_up)
6687                 ixgbe_watchdog_link_is_up(adapter);
6688         else
6689                 ixgbe_watchdog_link_is_down(adapter);
6690
6691         ixgbe_check_for_bad_vf(adapter);
6692         ixgbe_spoof_check(adapter);
6693         ixgbe_update_stats(adapter);
6694
6695         ixgbe_watchdog_flush_tx(adapter);
6696 }
6697
6698 /**
6699  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6700  * @adapter: the ixgbe adapter structure
6701  **/
6702 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6703 {
6704         struct ixgbe_hw *hw = &adapter->hw;
6705         s32 err;
6706
6707         /* not searching for SFP so there is nothing to do here */
6708         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6709             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6710                 return;
6711
6712         /* someone else is in init, wait until next service event */
6713         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6714                 return;
6715
6716         err = hw->phy.ops.identify_sfp(hw);
6717         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6718                 goto sfp_out;
6719
6720         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6721                 /* If no cable is present, then we need to reset
6722                  * the next time we find a good cable. */
6723                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6724         }
6725
6726         /* exit on error */
6727         if (err)
6728                 goto sfp_out;
6729
6730         /* exit if reset not needed */
6731         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6732                 goto sfp_out;
6733
6734         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6735
6736         /*
6737          * A module may be identified correctly, but the EEPROM may not have
6738          * support for that module.  setup_sfp() will fail in that case, so
6739          * we should not allow that module to load.
6740          */
6741         if (hw->mac.type == ixgbe_mac_82598EB)
6742                 err = hw->phy.ops.reset(hw);
6743         else
6744                 err = hw->mac.ops.setup_sfp(hw);
6745
6746         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6747                 goto sfp_out;
6748
6749         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6750         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6751
6752 sfp_out:
6753         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6754
6755         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6756             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6757                 e_dev_err("failed to initialize because an unsupported "
6758                           "SFP+ module type was detected.\n");
6759                 e_dev_err("Reload the driver after installing a "
6760                           "supported module.\n");
6761                 unregister_netdev(adapter->netdev);
6762         }
6763 }
6764
6765 /**
6766  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6767  * @adapter: the ixgbe adapter structure
6768  **/
6769 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6770 {
6771         struct ixgbe_hw *hw = &adapter->hw;
6772         u32 speed;
6773         bool autoneg = false;
6774
6775         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6776                 return;
6777
6778         /* someone else is in init, wait until next service event */
6779         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6780                 return;
6781
6782         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6783
6784         speed = hw->phy.autoneg_advertised;
6785         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6786                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6787
6788                 /* setup the highest link when no autoneg */
6789                 if (!autoneg) {
6790                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6791                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
6792                 }
6793         }
6794
6795         if (hw->mac.ops.setup_link)
6796                 hw->mac.ops.setup_link(hw, speed, true);
6797
6798         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6799         adapter->link_check_timeout = jiffies;
6800         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6801 }
6802
6803 /**
6804  * ixgbe_service_timer - Timer Call-back
6805  * @data: pointer to adapter cast into an unsigned long
6806  **/
6807 static void ixgbe_service_timer(unsigned long data)
6808 {
6809         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6810         unsigned long next_event_offset;
6811
6812         /* poll faster when waiting for link */
6813         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6814                 next_event_offset = HZ / 10;
6815         else
6816                 next_event_offset = HZ * 2;
6817
6818         /* Reset the timer */
6819         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6820
6821         ixgbe_service_event_schedule(adapter);
6822 }
6823
6824 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6825 {
6826         struct ixgbe_hw *hw = &adapter->hw;
6827         u32 status;
6828
6829         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6830                 return;
6831
6832         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6833
6834         if (!hw->phy.ops.handle_lasi)
6835                 return;
6836
6837         status = hw->phy.ops.handle_lasi(&adapter->hw);
6838         if (status != IXGBE_ERR_OVERTEMP)
6839                 return;
6840
6841         e_crit(drv, "%s\n", ixgbe_overheat_msg);
6842 }
6843
6844 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6845 {
6846         if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6847                 return;
6848
6849         adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6850
6851         /* If we're already down, removing or resetting, just bail */
6852         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6853             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6854             test_bit(__IXGBE_RESETTING, &adapter->state))
6855                 return;
6856
6857         ixgbe_dump(adapter);
6858         netdev_err(adapter->netdev, "Reset adapter\n");
6859         adapter->tx_timeout_count++;
6860
6861         rtnl_lock();
6862         ixgbe_reinit_locked(adapter);
6863         rtnl_unlock();
6864 }
6865
6866 /**
6867  * ixgbe_service_task - manages and runs subtasks
6868  * @work: pointer to work_struct containing our data
6869  **/
6870 static void ixgbe_service_task(struct work_struct *work)
6871 {
6872         struct ixgbe_adapter *adapter = container_of(work,
6873                                                      struct ixgbe_adapter,
6874                                                      service_task);
6875         if (ixgbe_removed(adapter->hw.hw_addr)) {
6876                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6877                         rtnl_lock();
6878                         ixgbe_down(adapter);
6879                         rtnl_unlock();
6880                 }
6881                 ixgbe_service_event_complete(adapter);
6882                 return;
6883         }
6884 #ifdef CONFIG_IXGBE_VXLAN
6885         if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6886                 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6887                 vxlan_get_rx_port(adapter->netdev);
6888         }
6889 #endif /* CONFIG_IXGBE_VXLAN */
6890         ixgbe_reset_subtask(adapter);
6891         ixgbe_phy_interrupt_subtask(adapter);
6892         ixgbe_sfp_detection_subtask(adapter);
6893         ixgbe_sfp_link_config_subtask(adapter);
6894         ixgbe_check_overtemp_subtask(adapter);
6895         ixgbe_watchdog_subtask(adapter);
6896         ixgbe_fdir_reinit_subtask(adapter);
6897         ixgbe_check_hang_subtask(adapter);
6898
6899         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6900                 ixgbe_ptp_overflow_check(adapter);
6901                 ixgbe_ptp_rx_hang(adapter);
6902         }
6903
6904         ixgbe_service_event_complete(adapter);
6905 }
6906
6907 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6908                      struct ixgbe_tx_buffer *first,
6909                      u8 *hdr_len)
6910 {
6911         struct sk_buff *skb = first->skb;
6912         u32 vlan_macip_lens, type_tucmd;
6913         u32 mss_l4len_idx, l4len;
6914         int err;
6915
6916         if (skb->ip_summed != CHECKSUM_PARTIAL)
6917                 return 0;
6918
6919         if (!skb_is_gso(skb))
6920                 return 0;
6921
6922         err = skb_cow_head(skb, 0);
6923         if (err < 0)
6924                 return err;
6925
6926         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6927         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6928
6929         if (first->protocol == htons(ETH_P_IP)) {
6930                 struct iphdr *iph = ip_hdr(skb);
6931                 iph->tot_len = 0;
6932                 iph->check = 0;
6933                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6934                                                          iph->daddr, 0,
6935                                                          IPPROTO_TCP,
6936                                                          0);
6937                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6938                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6939                                    IXGBE_TX_FLAGS_CSUM |
6940                                    IXGBE_TX_FLAGS_IPV4;
6941         } else if (skb_is_gso_v6(skb)) {
6942                 ipv6_hdr(skb)->payload_len = 0;
6943                 tcp_hdr(skb)->check =
6944                     ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6945                                      &ipv6_hdr(skb)->daddr,
6946                                      0, IPPROTO_TCP, 0);
6947                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6948                                    IXGBE_TX_FLAGS_CSUM;
6949         }
6950
6951         /* compute header lengths */
6952         l4len = tcp_hdrlen(skb);
6953         *hdr_len = skb_transport_offset(skb) + l4len;
6954
6955         /* update gso size and bytecount with header size */
6956         first->gso_segs = skb_shinfo(skb)->gso_segs;
6957         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6958
6959         /* mss_l4len_id: use 0 as index for TSO */
6960         mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6961         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6962
6963         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6964         vlan_macip_lens = skb_network_header_len(skb);
6965         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6966         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6967
6968         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6969                           mss_l4len_idx);
6970
6971         return 1;
6972 }
6973
6974 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6975                           struct ixgbe_tx_buffer *first)
6976 {
6977         struct sk_buff *skb = first->skb;
6978         u32 vlan_macip_lens = 0;
6979         u32 mss_l4len_idx = 0;
6980         u32 type_tucmd = 0;
6981
6982         if (skb->ip_summed != CHECKSUM_PARTIAL) {
6983                 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6984                     !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6985                         return;
6986                 vlan_macip_lens = skb_network_offset(skb) <<
6987                                   IXGBE_ADVTXD_MACLEN_SHIFT;
6988         } else {
6989                 u8 l4_hdr = 0;
6990                 union {
6991                         struct iphdr *ipv4;
6992                         struct ipv6hdr *ipv6;
6993                         u8 *raw;
6994                 } network_hdr;
6995                 union {
6996                         struct tcphdr *tcphdr;
6997                         u8 *raw;
6998                 } transport_hdr;
6999
7000                 if (skb->encapsulation) {
7001                         network_hdr.raw = skb_inner_network_header(skb);
7002                         transport_hdr.raw = skb_inner_transport_header(skb);
7003                         vlan_macip_lens = skb_inner_network_offset(skb) <<
7004                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7005                 } else {
7006                         network_hdr.raw = skb_network_header(skb);
7007                         transport_hdr.raw = skb_transport_header(skb);
7008                         vlan_macip_lens = skb_network_offset(skb) <<
7009                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7010                 }
7011
7012                 /* use first 4 bits to determine IP version */
7013                 switch (network_hdr.ipv4->version) {
7014                 case IPVERSION:
7015                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7016                         type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7017                         l4_hdr = network_hdr.ipv4->protocol;
7018                         break;
7019                 case 6:
7020                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7021                         l4_hdr = network_hdr.ipv6->nexthdr;
7022                         break;
7023                 default:
7024                         if (unlikely(net_ratelimit())) {
7025                                 dev_warn(tx_ring->dev,
7026                                          "partial checksum but version=%d\n",
7027                                          network_hdr.ipv4->version);
7028                         }
7029                 }
7030
7031                 switch (l4_hdr) {
7032                 case IPPROTO_TCP:
7033                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7034                         mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7035                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7036                         break;
7037                 case IPPROTO_SCTP:
7038                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7039                         mss_l4len_idx = sizeof(struct sctphdr) <<
7040                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7041                         break;
7042                 case IPPROTO_UDP:
7043                         mss_l4len_idx = sizeof(struct udphdr) <<
7044                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7045                         break;
7046                 default:
7047                         if (unlikely(net_ratelimit())) {
7048                                 dev_warn(tx_ring->dev,
7049                                  "partial checksum but l4 proto=%x!\n",
7050                                  l4_hdr);
7051                         }
7052                         break;
7053                 }
7054
7055                 /* update TX checksum flag */
7056                 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7057         }
7058
7059         /* vlan_macip_lens: MACLEN, VLAN tag */
7060         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7061
7062         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7063                           type_tucmd, mss_l4len_idx);
7064 }
7065
7066 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7067         ((_flag <= _result) ? \
7068          ((u32)(_input & _flag) * (_result / _flag)) : \
7069          ((u32)(_input & _flag) / (_flag / _result)))
7070
7071 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7072 {
7073         /* set type for advanced descriptor with frame checksum insertion */
7074         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7075                        IXGBE_ADVTXD_DCMD_DEXT |
7076                        IXGBE_ADVTXD_DCMD_IFCS;
7077
7078         /* set HW vlan bit if vlan is present */
7079         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7080                                    IXGBE_ADVTXD_DCMD_VLE);
7081
7082         /* set segmentation enable bits for TSO/FSO */
7083         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7084                                    IXGBE_ADVTXD_DCMD_TSE);
7085
7086         /* set timestamp bit if present */
7087         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7088                                    IXGBE_ADVTXD_MAC_TSTAMP);
7089
7090         /* insert frame checksum */
7091         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7092
7093         return cmd_type;
7094 }
7095
7096 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7097                                    u32 tx_flags, unsigned int paylen)
7098 {
7099         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7100
7101         /* enable L4 checksum for TSO and TX checksum offload */
7102         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7103                                         IXGBE_TX_FLAGS_CSUM,
7104                                         IXGBE_ADVTXD_POPTS_TXSM);
7105
7106         /* enble IPv4 checksum for TSO */
7107         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7108                                         IXGBE_TX_FLAGS_IPV4,
7109                                         IXGBE_ADVTXD_POPTS_IXSM);
7110
7111         /*
7112          * Check Context must be set if Tx switch is enabled, which it
7113          * always is for case where virtual functions are running
7114          */
7115         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7116                                         IXGBE_TX_FLAGS_CC,
7117                                         IXGBE_ADVTXD_CC);
7118
7119         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7120 }
7121
7122 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7123 {
7124         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7125
7126         /* Herbert's original patch had:
7127          *  smp_mb__after_netif_stop_queue();
7128          * but since that doesn't exist yet, just open code it.
7129          */
7130         smp_mb();
7131
7132         /* We need to check again in a case another CPU has just
7133          * made room available.
7134          */
7135         if (likely(ixgbe_desc_unused(tx_ring) < size))
7136                 return -EBUSY;
7137
7138         /* A reprieve! - use start_queue because it doesn't call schedule */
7139         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7140         ++tx_ring->tx_stats.restart_queue;
7141         return 0;
7142 }
7143
7144 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7145 {
7146         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7147                 return 0;
7148
7149         return __ixgbe_maybe_stop_tx(tx_ring, size);
7150 }
7151
7152 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7153                        IXGBE_TXD_CMD_RS)
7154
7155 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7156                          struct ixgbe_tx_buffer *first,
7157                          const u8 hdr_len)
7158 {
7159         struct sk_buff *skb = first->skb;
7160         struct ixgbe_tx_buffer *tx_buffer;
7161         union ixgbe_adv_tx_desc *tx_desc;
7162         struct skb_frag_struct *frag;
7163         dma_addr_t dma;
7164         unsigned int data_len, size;
7165         u32 tx_flags = first->tx_flags;
7166         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7167         u16 i = tx_ring->next_to_use;
7168
7169         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7170
7171         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7172
7173         size = skb_headlen(skb);
7174         data_len = skb->data_len;
7175
7176 #ifdef IXGBE_FCOE
7177         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7178                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7179                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7180                         data_len = 0;
7181                 } else {
7182                         data_len -= sizeof(struct fcoe_crc_eof);
7183                 }
7184         }
7185
7186 #endif
7187         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7188
7189         tx_buffer = first;
7190
7191         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7192                 if (dma_mapping_error(tx_ring->dev, dma))
7193                         goto dma_error;
7194
7195                 /* record length, and DMA address */
7196                 dma_unmap_len_set(tx_buffer, len, size);
7197                 dma_unmap_addr_set(tx_buffer, dma, dma);
7198
7199                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7200
7201                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7202                         tx_desc->read.cmd_type_len =
7203                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7204
7205                         i++;
7206                         tx_desc++;
7207                         if (i == tx_ring->count) {
7208                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7209                                 i = 0;
7210                         }
7211                         tx_desc->read.olinfo_status = 0;
7212
7213                         dma += IXGBE_MAX_DATA_PER_TXD;
7214                         size -= IXGBE_MAX_DATA_PER_TXD;
7215
7216                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7217                 }
7218
7219                 if (likely(!data_len))
7220                         break;
7221
7222                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7223
7224                 i++;
7225                 tx_desc++;
7226                 if (i == tx_ring->count) {
7227                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7228                         i = 0;
7229                 }
7230                 tx_desc->read.olinfo_status = 0;
7231
7232 #ifdef IXGBE_FCOE
7233                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7234 #else
7235                 size = skb_frag_size(frag);
7236 #endif
7237                 data_len -= size;
7238
7239                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7240                                        DMA_TO_DEVICE);
7241
7242                 tx_buffer = &tx_ring->tx_buffer_info[i];
7243         }
7244
7245         /* write last descriptor with RS and EOP bits */
7246         cmd_type |= size | IXGBE_TXD_CMD;
7247         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7248
7249         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7250
7251         /* set the timestamp */
7252         first->time_stamp = jiffies;
7253
7254         /*
7255          * Force memory writes to complete before letting h/w know there
7256          * are new descriptors to fetch.  (Only applicable for weak-ordered
7257          * memory model archs, such as IA-64).
7258          *
7259          * We also need this memory barrier to make certain all of the
7260          * status bits have been updated before next_to_watch is written.
7261          */
7262         wmb();
7263
7264         /* set next_to_watch value indicating a packet is present */
7265         first->next_to_watch = tx_desc;
7266
7267         i++;
7268         if (i == tx_ring->count)
7269                 i = 0;
7270
7271         tx_ring->next_to_use = i;
7272
7273         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7274
7275         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7276                 writel(i, tx_ring->tail);
7277
7278                 /* we need this if more than one processor can write to our tail
7279                  * at a time, it synchronizes IO on IA64/Altix systems
7280                  */
7281                 mmiowb();
7282         }
7283
7284         return;
7285 dma_error:
7286         dev_err(tx_ring->dev, "TX DMA map failed\n");
7287
7288         /* clear dma mappings for failed tx_buffer_info map */
7289         for (;;) {
7290                 tx_buffer = &tx_ring->tx_buffer_info[i];
7291                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7292                 if (tx_buffer == first)
7293                         break;
7294                 if (i == 0)
7295                         i = tx_ring->count;
7296                 i--;
7297         }
7298
7299         tx_ring->next_to_use = i;
7300 }
7301
7302 static void ixgbe_atr(struct ixgbe_ring *ring,
7303                       struct ixgbe_tx_buffer *first)
7304 {
7305         struct ixgbe_q_vector *q_vector = ring->q_vector;
7306         union ixgbe_atr_hash_dword input = { .dword = 0 };
7307         union ixgbe_atr_hash_dword common = { .dword = 0 };
7308         union {
7309                 unsigned char *network;
7310                 struct iphdr *ipv4;
7311                 struct ipv6hdr *ipv6;
7312         } hdr;
7313         struct tcphdr *th;
7314         struct sk_buff *skb;
7315 #ifdef CONFIG_IXGBE_VXLAN
7316         u8 encap = false;
7317 #endif /* CONFIG_IXGBE_VXLAN */
7318         __be16 vlan_id;
7319
7320         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7321         if (!q_vector)
7322                 return;
7323
7324         /* do nothing if sampling is disabled */
7325         if (!ring->atr_sample_rate)
7326                 return;
7327
7328         ring->atr_count++;
7329
7330         /* snag network header to get L4 type and address */
7331         skb = first->skb;
7332         hdr.network = skb_network_header(skb);
7333         if (skb->encapsulation) {
7334 #ifdef CONFIG_IXGBE_VXLAN
7335                 struct ixgbe_adapter *adapter = q_vector->adapter;
7336
7337                 if (!adapter->vxlan_port)
7338                         return;
7339                 if (first->protocol != htons(ETH_P_IP) ||
7340                     hdr.ipv4->version != IPVERSION ||
7341                     hdr.ipv4->protocol != IPPROTO_UDP) {
7342                         return;
7343                 }
7344                 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7345                         return;
7346                 encap = true;
7347                 hdr.network = skb_inner_network_header(skb);
7348                 th = inner_tcp_hdr(skb);
7349 #else
7350                 return;
7351 #endif /* CONFIG_IXGBE_VXLAN */
7352         } else {
7353                 /* Currently only IPv4/IPv6 with TCP is supported */
7354                 if ((first->protocol != htons(ETH_P_IPV6) ||
7355                      hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7356                     (first->protocol != htons(ETH_P_IP) ||
7357                      hdr.ipv4->protocol != IPPROTO_TCP))
7358                         return;
7359                 th = tcp_hdr(skb);
7360         }
7361
7362         /* skip this packet since it is invalid or the socket is closing */
7363         if (!th || th->fin)
7364                 return;
7365
7366         /* sample on all syn packets or once every atr sample count */
7367         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7368                 return;
7369
7370         /* reset sample count */
7371         ring->atr_count = 0;
7372
7373         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7374
7375         /*
7376          * src and dst are inverted, think how the receiver sees them
7377          *
7378          * The input is broken into two sections, a non-compressed section
7379          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7380          * is XORed together and stored in the compressed dword.
7381          */
7382         input.formatted.vlan_id = vlan_id;
7383
7384         /*
7385          * since src port and flex bytes occupy the same word XOR them together
7386          * and write the value to source port portion of compressed dword
7387          */
7388         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7389                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7390         else
7391                 common.port.src ^= th->dest ^ first->protocol;
7392         common.port.dst ^= th->source;
7393
7394         if (first->protocol == htons(ETH_P_IP)) {
7395                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7396                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7397         } else {
7398                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7399                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7400                              hdr.ipv6->saddr.s6_addr32[1] ^
7401                              hdr.ipv6->saddr.s6_addr32[2] ^
7402                              hdr.ipv6->saddr.s6_addr32[3] ^
7403                              hdr.ipv6->daddr.s6_addr32[0] ^
7404                              hdr.ipv6->daddr.s6_addr32[1] ^
7405                              hdr.ipv6->daddr.s6_addr32[2] ^
7406                              hdr.ipv6->daddr.s6_addr32[3];
7407         }
7408
7409 #ifdef CONFIG_IXGBE_VXLAN
7410         if (encap)
7411                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7412 #endif /* CONFIG_IXGBE_VXLAN */
7413
7414         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7415         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7416                                               input, common, ring->queue_index);
7417 }
7418
7419 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7420                               void *accel_priv, select_queue_fallback_t fallback)
7421 {
7422         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7423 #ifdef IXGBE_FCOE
7424         struct ixgbe_adapter *adapter;
7425         struct ixgbe_ring_feature *f;
7426         int txq;
7427 #endif
7428
7429         if (fwd_adapter)
7430                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7431
7432 #ifdef IXGBE_FCOE
7433
7434         /*
7435          * only execute the code below if protocol is FCoE
7436          * or FIP and we have FCoE enabled on the adapter
7437          */
7438         switch (vlan_get_protocol(skb)) {
7439         case htons(ETH_P_FCOE):
7440         case htons(ETH_P_FIP):
7441                 adapter = netdev_priv(dev);
7442
7443                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7444                         break;
7445         default:
7446                 return fallback(dev, skb);
7447         }
7448
7449         f = &adapter->ring_feature[RING_F_FCOE];
7450
7451         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7452                                            smp_processor_id();
7453
7454         while (txq >= f->indices)
7455                 txq -= f->indices;
7456
7457         return txq + f->offset;
7458 #else
7459         return fallback(dev, skb);
7460 #endif
7461 }
7462
7463 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7464                           struct ixgbe_adapter *adapter,
7465                           struct ixgbe_ring *tx_ring)
7466 {
7467         struct ixgbe_tx_buffer *first;
7468         int tso;
7469         u32 tx_flags = 0;
7470         unsigned short f;
7471         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7472         __be16 protocol = skb->protocol;
7473         u8 hdr_len = 0;
7474
7475         /*
7476          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7477          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7478          *       + 2 desc gap to keep tail from touching head,
7479          *       + 1 desc for context descriptor,
7480          * otherwise try next time
7481          */
7482         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7483                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7484
7485         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7486                 tx_ring->tx_stats.tx_busy++;
7487                 return NETDEV_TX_BUSY;
7488         }
7489
7490         /* record the location of the first descriptor for this packet */
7491         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7492         first->skb = skb;
7493         first->bytecount = skb->len;
7494         first->gso_segs = 1;
7495
7496         /* if we have a HW VLAN tag being added default to the HW one */
7497         if (skb_vlan_tag_present(skb)) {
7498                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7499                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7500         /* else if it is a SW VLAN check the next protocol and store the tag */
7501         } else if (protocol == htons(ETH_P_8021Q)) {
7502                 struct vlan_hdr *vhdr, _vhdr;
7503                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7504                 if (!vhdr)
7505                         goto out_drop;
7506
7507                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7508                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7509                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7510         }
7511         protocol = vlan_get_protocol(skb);
7512
7513         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7514             adapter->ptp_clock &&
7515             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7516                                    &adapter->state)) {
7517                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7518                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7519
7520                 /* schedule check for Tx timestamp */
7521                 adapter->ptp_tx_skb = skb_get(skb);
7522                 adapter->ptp_tx_start = jiffies;
7523                 schedule_work(&adapter->ptp_tx_work);
7524         }
7525
7526         skb_tx_timestamp(skb);
7527
7528 #ifdef CONFIG_PCI_IOV
7529         /*
7530          * Use the l2switch_enable flag - would be false if the DMA
7531          * Tx switch had been disabled.
7532          */
7533         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7534                 tx_flags |= IXGBE_TX_FLAGS_CC;
7535
7536 #endif
7537         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7538         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7539             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7540              (skb->priority != TC_PRIO_CONTROL))) {
7541                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7542                 tx_flags |= (skb->priority & 0x7) <<
7543                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7544                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7545                         struct vlan_ethhdr *vhdr;
7546
7547                         if (skb_cow_head(skb, 0))
7548                                 goto out_drop;
7549                         vhdr = (struct vlan_ethhdr *)skb->data;
7550                         vhdr->h_vlan_TCI = htons(tx_flags >>
7551                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7552                 } else {
7553                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7554                 }
7555         }
7556
7557         /* record initial flags and protocol */
7558         first->tx_flags = tx_flags;
7559         first->protocol = protocol;
7560
7561 #ifdef IXGBE_FCOE
7562         /* setup tx offload for FCoE */
7563         if ((protocol == htons(ETH_P_FCOE)) &&
7564             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7565                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7566                 if (tso < 0)
7567                         goto out_drop;
7568
7569                 goto xmit_fcoe;
7570         }
7571
7572 #endif /* IXGBE_FCOE */
7573         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7574         if (tso < 0)
7575                 goto out_drop;
7576         else if (!tso)
7577                 ixgbe_tx_csum(tx_ring, first);
7578
7579         /* add the ATR filter if ATR is on */
7580         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7581                 ixgbe_atr(tx_ring, first);
7582
7583 #ifdef IXGBE_FCOE
7584 xmit_fcoe:
7585 #endif /* IXGBE_FCOE */
7586         ixgbe_tx_map(tx_ring, first, hdr_len);
7587
7588         return NETDEV_TX_OK;
7589
7590 out_drop:
7591         dev_kfree_skb_any(first->skb);
7592         first->skb = NULL;
7593
7594         return NETDEV_TX_OK;
7595 }
7596
7597 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7598                                       struct net_device *netdev,
7599                                       struct ixgbe_ring *ring)
7600 {
7601         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7602         struct ixgbe_ring *tx_ring;
7603
7604         /*
7605          * The minimum packet size for olinfo paylen is 17 so pad the skb
7606          * in order to meet this minimum size requirement.
7607          */
7608         if (skb_put_padto(skb, 17))
7609                 return NETDEV_TX_OK;
7610
7611         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7612
7613         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7614 }
7615
7616 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7617                                     struct net_device *netdev)
7618 {
7619         return __ixgbe_xmit_frame(skb, netdev, NULL);
7620 }
7621
7622 /**
7623  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7624  * @netdev: network interface device structure
7625  * @p: pointer to an address structure
7626  *
7627  * Returns 0 on success, negative on failure
7628  **/
7629 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7630 {
7631         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7632         struct ixgbe_hw *hw = &adapter->hw;
7633         struct sockaddr *addr = p;
7634         int ret;
7635
7636         if (!is_valid_ether_addr(addr->sa_data))
7637                 return -EADDRNOTAVAIL;
7638
7639         ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7640         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7641         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7642
7643         ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7644         return ret > 0 ? 0 : ret;
7645 }
7646
7647 static int
7648 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7649 {
7650         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7651         struct ixgbe_hw *hw = &adapter->hw;
7652         u16 value;
7653         int rc;
7654
7655         if (prtad != hw->phy.mdio.prtad)
7656                 return -EINVAL;
7657         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7658         if (!rc)
7659                 rc = value;
7660         return rc;
7661 }
7662
7663 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7664                             u16 addr, u16 value)
7665 {
7666         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7667         struct ixgbe_hw *hw = &adapter->hw;
7668
7669         if (prtad != hw->phy.mdio.prtad)
7670                 return -EINVAL;
7671         return hw->phy.ops.write_reg(hw, addr, devad, value);
7672 }
7673
7674 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7675 {
7676         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7677
7678         switch (cmd) {
7679         case SIOCSHWTSTAMP:
7680                 return ixgbe_ptp_set_ts_config(adapter, req);
7681         case SIOCGHWTSTAMP:
7682                 return ixgbe_ptp_get_ts_config(adapter, req);
7683         default:
7684                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7685         }
7686 }
7687
7688 /**
7689  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7690  * netdev->dev_addrs
7691  * @netdev: network interface device structure
7692  *
7693  * Returns non-zero on failure
7694  **/
7695 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7696 {
7697         int err = 0;
7698         struct ixgbe_adapter *adapter = netdev_priv(dev);
7699         struct ixgbe_hw *hw = &adapter->hw;
7700
7701         if (is_valid_ether_addr(hw->mac.san_addr)) {
7702                 rtnl_lock();
7703                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7704                 rtnl_unlock();
7705
7706                 /* update SAN MAC vmdq pool selection */
7707                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7708         }
7709         return err;
7710 }
7711
7712 /**
7713  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7714  * netdev->dev_addrs
7715  * @netdev: network interface device structure
7716  *
7717  * Returns non-zero on failure
7718  **/
7719 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7720 {
7721         int err = 0;
7722         struct ixgbe_adapter *adapter = netdev_priv(dev);
7723         struct ixgbe_mac_info *mac = &adapter->hw.mac;
7724
7725         if (is_valid_ether_addr(mac->san_addr)) {
7726                 rtnl_lock();
7727                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7728                 rtnl_unlock();
7729         }
7730         return err;
7731 }
7732
7733 #ifdef CONFIG_NET_POLL_CONTROLLER
7734 /*
7735  * Polling 'interrupt' - used by things like netconsole to send skbs
7736  * without having to re-enable interrupts. It's not called while
7737  * the interrupt routine is executing.
7738  */
7739 static void ixgbe_netpoll(struct net_device *netdev)
7740 {
7741         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7742         int i;
7743
7744         /* if interface is down do nothing */
7745         if (test_bit(__IXGBE_DOWN, &adapter->state))
7746                 return;
7747
7748         /* loop through and schedule all active queues */
7749         for (i = 0; i < adapter->num_q_vectors; i++)
7750                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7751 }
7752
7753 #endif
7754 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7755                                                    struct rtnl_link_stats64 *stats)
7756 {
7757         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7758         int i;
7759
7760         rcu_read_lock();
7761         for (i = 0; i < adapter->num_rx_queues; i++) {
7762                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7763                 u64 bytes, packets;
7764                 unsigned int start;
7765
7766                 if (ring) {
7767                         do {
7768                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7769                                 packets = ring->stats.packets;
7770                                 bytes   = ring->stats.bytes;
7771                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7772                         stats->rx_packets += packets;
7773                         stats->rx_bytes   += bytes;
7774                 }
7775         }
7776
7777         for (i = 0; i < adapter->num_tx_queues; i++) {
7778                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7779                 u64 bytes, packets;
7780                 unsigned int start;
7781
7782                 if (ring) {
7783                         do {
7784                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7785                                 packets = ring->stats.packets;
7786                                 bytes   = ring->stats.bytes;
7787                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7788                         stats->tx_packets += packets;
7789                         stats->tx_bytes   += bytes;
7790                 }
7791         }
7792         rcu_read_unlock();
7793         /* following stats updated by ixgbe_watchdog_task() */
7794         stats->multicast        = netdev->stats.multicast;
7795         stats->rx_errors        = netdev->stats.rx_errors;
7796         stats->rx_length_errors = netdev->stats.rx_length_errors;
7797         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
7798         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7799         return stats;
7800 }
7801
7802 #ifdef CONFIG_IXGBE_DCB
7803 /**
7804  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7805  * @adapter: pointer to ixgbe_adapter
7806  * @tc: number of traffic classes currently enabled
7807  *
7808  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7809  * 802.1Q priority maps to a packet buffer that exists.
7810  */
7811 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7812 {
7813         struct ixgbe_hw *hw = &adapter->hw;
7814         u32 reg, rsave;
7815         int i;
7816
7817         /* 82598 have a static priority to TC mapping that can not
7818          * be changed so no validation is needed.
7819          */
7820         if (hw->mac.type == ixgbe_mac_82598EB)
7821                 return;
7822
7823         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7824         rsave = reg;
7825
7826         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7827                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7828
7829                 /* If up2tc is out of bounds default to zero */
7830                 if (up2tc > tc)
7831                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7832         }
7833
7834         if (reg != rsave)
7835                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7836
7837         return;
7838 }
7839
7840 /**
7841  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7842  * @adapter: Pointer to adapter struct
7843  *
7844  * Populate the netdev user priority to tc map
7845  */
7846 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7847 {
7848         struct net_device *dev = adapter->netdev;
7849         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7850         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7851         u8 prio;
7852
7853         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7854                 u8 tc = 0;
7855
7856                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7857                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7858                 else if (ets)
7859                         tc = ets->prio_tc[prio];
7860
7861                 netdev_set_prio_tc_map(dev, prio, tc);
7862         }
7863 }
7864
7865 #endif /* CONFIG_IXGBE_DCB */
7866 /**
7867  * ixgbe_setup_tc - configure net_device for multiple traffic classes
7868  *
7869  * @netdev: net device to configure
7870  * @tc: number of traffic classes to enable
7871  */
7872 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7873 {
7874         struct ixgbe_adapter *adapter = netdev_priv(dev);
7875         struct ixgbe_hw *hw = &adapter->hw;
7876         bool pools;
7877
7878         /* Hardware supports up to 8 traffic classes */
7879         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7880                 return -EINVAL;
7881
7882         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7883                 return -EINVAL;
7884
7885         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7886         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7887                 return -EBUSY;
7888
7889         /* Hardware has to reinitialize queues and interrupts to
7890          * match packet buffer alignment. Unfortunately, the
7891          * hardware is not flexible enough to do this dynamically.
7892          */
7893         if (netif_running(dev))
7894                 ixgbe_close(dev);
7895         ixgbe_clear_interrupt_scheme(adapter);
7896
7897 #ifdef CONFIG_IXGBE_DCB
7898         if (tc) {
7899                 netdev_set_num_tc(dev, tc);
7900                 ixgbe_set_prio_tc_map(adapter);
7901
7902                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7903
7904                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7905                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7906                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
7907                 }
7908         } else {
7909                 netdev_reset_tc(dev);
7910
7911                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7912                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7913
7914                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7915
7916                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7917                 adapter->dcb_cfg.pfc_mode_enable = false;
7918         }
7919
7920         ixgbe_validate_rtr(adapter, tc);
7921
7922 #endif /* CONFIG_IXGBE_DCB */
7923         ixgbe_init_interrupt_scheme(adapter);
7924
7925         if (netif_running(dev))
7926                 return ixgbe_open(dev);
7927
7928         return 0;
7929 }
7930
7931 #ifdef CONFIG_PCI_IOV
7932 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7933 {
7934         struct net_device *netdev = adapter->netdev;
7935
7936         rtnl_lock();
7937         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7938         rtnl_unlock();
7939 }
7940
7941 #endif
7942 void ixgbe_do_reset(struct net_device *netdev)
7943 {
7944         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7945
7946         if (netif_running(netdev))
7947                 ixgbe_reinit_locked(adapter);
7948         else
7949                 ixgbe_reset(adapter);
7950 }
7951
7952 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7953                                             netdev_features_t features)
7954 {
7955         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7956
7957         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7958         if (!(features & NETIF_F_RXCSUM))
7959                 features &= ~NETIF_F_LRO;
7960
7961         /* Turn off LRO if not RSC capable */
7962         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7963                 features &= ~NETIF_F_LRO;
7964
7965         return features;
7966 }
7967
7968 static int ixgbe_set_features(struct net_device *netdev,
7969                               netdev_features_t features)
7970 {
7971         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7972         netdev_features_t changed = netdev->features ^ features;
7973         bool need_reset = false;
7974
7975         /* Make sure RSC matches LRO, reset if change */
7976         if (!(features & NETIF_F_LRO)) {
7977                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7978                         need_reset = true;
7979                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7980         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7981                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7982                 if (adapter->rx_itr_setting == 1 ||
7983                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7984                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7985                         need_reset = true;
7986                 } else if ((changed ^ features) & NETIF_F_LRO) {
7987                         e_info(probe, "rx-usecs set too low, "
7988                                "disabling RSC\n");
7989                 }
7990         }
7991
7992         /*
7993          * Check if Flow Director n-tuple support was enabled or disabled.  If
7994          * the state changed, we need to reset.
7995          */
7996         switch (features & NETIF_F_NTUPLE) {
7997         case NETIF_F_NTUPLE:
7998                 /* turn off ATR, enable perfect filters and reset */
7999                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8000                         need_reset = true;
8001
8002                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8003                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8004                 break;
8005         default:
8006                 /* turn off perfect filters, enable ATR and reset */
8007                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8008                         need_reset = true;
8009
8010                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8011
8012                 /* We cannot enable ATR if SR-IOV is enabled */
8013                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8014                         break;
8015
8016                 /* We cannot enable ATR if we have 2 or more traffic classes */
8017                 if (netdev_get_num_tc(netdev) > 1)
8018                         break;
8019
8020                 /* We cannot enable ATR if RSS is disabled */
8021                 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8022                         break;
8023
8024                 /* A sample rate of 0 indicates ATR disabled */
8025                 if (!adapter->atr_sample_rate)
8026                         break;
8027
8028                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8029                 break;
8030         }
8031
8032         if (features & NETIF_F_HW_VLAN_CTAG_RX)
8033                 ixgbe_vlan_strip_enable(adapter);
8034         else
8035                 ixgbe_vlan_strip_disable(adapter);
8036
8037         if (changed & NETIF_F_RXALL)
8038                 need_reset = true;
8039
8040         netdev->features = features;
8041
8042 #ifdef CONFIG_IXGBE_VXLAN
8043         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8044                 if (features & NETIF_F_RXCSUM)
8045                         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8046                 else
8047                         ixgbe_clear_vxlan_port(adapter);
8048         }
8049 #endif /* CONFIG_IXGBE_VXLAN */
8050
8051         if (need_reset)
8052                 ixgbe_do_reset(netdev);
8053
8054         return 0;
8055 }
8056
8057 #ifdef CONFIG_IXGBE_VXLAN
8058 /**
8059  * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8060  * @dev: The port's netdev
8061  * @sa_family: Socket Family that VXLAN is notifiying us about
8062  * @port: New UDP port number that VXLAN started listening to
8063  **/
8064 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8065                                  __be16 port)
8066 {
8067         struct ixgbe_adapter *adapter = netdev_priv(dev);
8068         struct ixgbe_hw *hw = &adapter->hw;
8069         u16 new_port = ntohs(port);
8070
8071         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8072                 return;
8073
8074         if (sa_family == AF_INET6)
8075                 return;
8076
8077         if (adapter->vxlan_port == new_port)
8078                 return;
8079
8080         if (adapter->vxlan_port) {
8081                 netdev_info(dev,
8082                             "Hit Max num of VXLAN ports, not adding port %d\n",
8083                             new_port);
8084                 return;
8085         }
8086
8087         adapter->vxlan_port = new_port;
8088         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8089 }
8090
8091 /**
8092  * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8093  * @dev: The port's netdev
8094  * @sa_family: Socket Family that VXLAN is notifying us about
8095  * @port: UDP port number that VXLAN stopped listening to
8096  **/
8097 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8098                                  __be16 port)
8099 {
8100         struct ixgbe_adapter *adapter = netdev_priv(dev);
8101         u16 new_port = ntohs(port);
8102
8103         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8104                 return;
8105
8106         if (sa_family == AF_INET6)
8107                 return;
8108
8109         if (adapter->vxlan_port != new_port) {
8110                 netdev_info(dev, "Port %d was not found, not deleting\n",
8111                             new_port);
8112                 return;
8113         }
8114
8115         ixgbe_clear_vxlan_port(adapter);
8116         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8117 }
8118 #endif /* CONFIG_IXGBE_VXLAN */
8119
8120 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8121                              struct net_device *dev,
8122                              const unsigned char *addr, u16 vid,
8123                              u16 flags)
8124 {
8125         /* guarantee we can provide a unique filter for the unicast address */
8126         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8127                 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8128                         return -ENOMEM;
8129         }
8130
8131         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8132 }
8133
8134 /**
8135  * ixgbe_configure_bridge_mode - set various bridge modes
8136  * @adapter - the private structure
8137  * @mode - requested bridge mode
8138  *
8139  * Configure some settings require for various bridge modes.
8140  **/
8141 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8142                                        __u16 mode)
8143 {
8144         struct ixgbe_hw *hw = &adapter->hw;
8145         unsigned int p, num_pools;
8146         u32 vmdctl;
8147
8148         switch (mode) {
8149         case BRIDGE_MODE_VEPA:
8150                 /* disable Tx loopback, rely on switch hairpin mode */
8151                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8152
8153                 /* must enable Rx switching replication to allow multicast
8154                  * packet reception on all VFs, and to enable source address
8155                  * pruning.
8156                  */
8157                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8158                 vmdctl |= IXGBE_VT_CTL_REPLEN;
8159                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8160
8161                 /* enable Rx source address pruning. Note, this requires
8162                  * replication to be enabled or else it does nothing.
8163                  */
8164                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8165                 for (p = 0; p < num_pools; p++) {
8166                         if (hw->mac.ops.set_source_address_pruning)
8167                                 hw->mac.ops.set_source_address_pruning(hw,
8168                                                                        true,
8169                                                                        p);
8170                 }
8171                 break;
8172         case BRIDGE_MODE_VEB:
8173                 /* enable Tx loopback for internal VF/PF communication */
8174                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8175                                 IXGBE_PFDTXGSWC_VT_LBEN);
8176
8177                 /* disable Rx switching replication unless we have SR-IOV
8178                  * virtual functions
8179                  */
8180                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8181                 if (!adapter->num_vfs)
8182                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8183                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8184
8185                 /* disable Rx source address pruning, since we don't expect to
8186                  * be receiving external loopback of our transmitted frames.
8187                  */
8188                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8189                 for (p = 0; p < num_pools; p++) {
8190                         if (hw->mac.ops.set_source_address_pruning)
8191                                 hw->mac.ops.set_source_address_pruning(hw,
8192                                                                        false,
8193                                                                        p);
8194                 }
8195                 break;
8196         default:
8197                 return -EINVAL;
8198         }
8199
8200         adapter->bridge_mode = mode;
8201
8202         e_info(drv, "enabling bridge mode: %s\n",
8203                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8204
8205         return 0;
8206 }
8207
8208 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8209                                     struct nlmsghdr *nlh, u16 flags)
8210 {
8211         struct ixgbe_adapter *adapter = netdev_priv(dev);
8212         struct nlattr *attr, *br_spec;
8213         int rem;
8214
8215         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8216                 return -EOPNOTSUPP;
8217
8218         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8219         if (!br_spec)
8220                 return -EINVAL;
8221
8222         nla_for_each_nested(attr, br_spec, rem) {
8223                 int status;
8224                 __u16 mode;
8225
8226                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8227                         continue;
8228
8229                 if (nla_len(attr) < sizeof(mode))
8230                         return -EINVAL;
8231
8232                 mode = nla_get_u16(attr);
8233                 status = ixgbe_configure_bridge_mode(adapter, mode);
8234                 if (status)
8235                         return status;
8236
8237                 break;
8238         }
8239
8240         return 0;
8241 }
8242
8243 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8244                                     struct net_device *dev,
8245                                     u32 filter_mask, int nlflags)
8246 {
8247         struct ixgbe_adapter *adapter = netdev_priv(dev);
8248
8249         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8250                 return 0;
8251
8252         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8253                                        adapter->bridge_mode, 0, 0, nlflags,
8254                                        filter_mask, NULL);
8255 }
8256
8257 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8258 {
8259         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8260         struct ixgbe_adapter *adapter = netdev_priv(pdev);
8261         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8262         unsigned int limit;
8263         int pool, err;
8264
8265         /* Hardware has a limited number of available pools. Each VF, and the
8266          * PF require a pool. Check to ensure we don't attempt to use more
8267          * then the available number of pools.
8268          */
8269         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8270                 return ERR_PTR(-EINVAL);
8271
8272 #ifdef CONFIG_RPS
8273         if (vdev->num_rx_queues != vdev->num_tx_queues) {
8274                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8275                             vdev->name);
8276                 return ERR_PTR(-EINVAL);
8277         }
8278 #endif
8279         /* Check for hardware restriction on number of rx/tx queues */
8280         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8281             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8282                 netdev_info(pdev,
8283                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8284                             pdev->name);
8285                 return ERR_PTR(-EINVAL);
8286         }
8287
8288         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8289               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8290             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8291                 return ERR_PTR(-EBUSY);
8292
8293         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8294         if (!fwd_adapter)
8295                 return ERR_PTR(-ENOMEM);
8296
8297         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8298         adapter->num_rx_pools++;
8299         set_bit(pool, &adapter->fwd_bitmask);
8300         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8301
8302         /* Enable VMDq flag so device will be set in VM mode */
8303         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8304         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8305         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8306
8307         /* Force reinit of ring allocation with VMDQ enabled */
8308         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8309         if (err)
8310                 goto fwd_add_err;
8311         fwd_adapter->pool = pool;
8312         fwd_adapter->real_adapter = adapter;
8313         err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8314         if (err)
8315                 goto fwd_add_err;
8316         netif_tx_start_all_queues(vdev);
8317         return fwd_adapter;
8318 fwd_add_err:
8319         /* unwind counter and free adapter struct */
8320         netdev_info(pdev,
8321                     "%s: dfwd hardware acceleration failed\n", vdev->name);
8322         clear_bit(pool, &adapter->fwd_bitmask);
8323         adapter->num_rx_pools--;
8324         kfree(fwd_adapter);
8325         return ERR_PTR(err);
8326 }
8327
8328 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8329 {
8330         struct ixgbe_fwd_adapter *fwd_adapter = priv;
8331         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8332         unsigned int limit;
8333
8334         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8335         adapter->num_rx_pools--;
8336
8337         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8338         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8339         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8340         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8341         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8342                    fwd_adapter->pool, adapter->num_rx_pools,
8343                    fwd_adapter->rx_base_queue,
8344                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8345                    adapter->fwd_bitmask);
8346         kfree(fwd_adapter);
8347 }
8348
8349 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8350 static netdev_features_t
8351 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8352                      netdev_features_t features)
8353 {
8354         if (!skb->encapsulation)
8355                 return features;
8356
8357         if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8358                      IXGBE_MAX_TUNNEL_HDR_LEN))
8359                 return features & ~NETIF_F_ALL_CSUM;
8360
8361         return features;
8362 }
8363
8364 static const struct net_device_ops ixgbe_netdev_ops = {
8365         .ndo_open               = ixgbe_open,
8366         .ndo_stop               = ixgbe_close,
8367         .ndo_start_xmit         = ixgbe_xmit_frame,
8368         .ndo_select_queue       = ixgbe_select_queue,
8369         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
8370         .ndo_validate_addr      = eth_validate_addr,
8371         .ndo_set_mac_address    = ixgbe_set_mac,
8372         .ndo_change_mtu         = ixgbe_change_mtu,
8373         .ndo_tx_timeout         = ixgbe_tx_timeout,
8374         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
8375         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
8376         .ndo_do_ioctl           = ixgbe_ioctl,
8377         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
8378         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
8379         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
8380         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
8381         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8382         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
8383         .ndo_get_stats64        = ixgbe_get_stats64,
8384 #ifdef CONFIG_IXGBE_DCB
8385         .ndo_setup_tc           = ixgbe_setup_tc,
8386 #endif
8387 #ifdef CONFIG_NET_POLL_CONTROLLER
8388         .ndo_poll_controller    = ixgbe_netpoll,
8389 #endif
8390 #ifdef CONFIG_NET_RX_BUSY_POLL
8391         .ndo_busy_poll          = ixgbe_low_latency_recv,
8392 #endif
8393 #ifdef IXGBE_FCOE
8394         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8395         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8396         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8397         .ndo_fcoe_enable = ixgbe_fcoe_enable,
8398         .ndo_fcoe_disable = ixgbe_fcoe_disable,
8399         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8400         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8401 #endif /* IXGBE_FCOE */
8402         .ndo_set_features = ixgbe_set_features,
8403         .ndo_fix_features = ixgbe_fix_features,
8404         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
8405         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
8406         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
8407         .ndo_dfwd_add_station   = ixgbe_fwd_add,
8408         .ndo_dfwd_del_station   = ixgbe_fwd_del,
8409 #ifdef CONFIG_IXGBE_VXLAN
8410         .ndo_add_vxlan_port     = ixgbe_add_vxlan_port,
8411         .ndo_del_vxlan_port     = ixgbe_del_vxlan_port,
8412 #endif /* CONFIG_IXGBE_VXLAN */
8413         .ndo_features_check     = ixgbe_features_check,
8414 };
8415
8416 /**
8417  * ixgbe_enumerate_functions - Get the number of ports this device has
8418  * @adapter: adapter structure
8419  *
8420  * This function enumerates the phsyical functions co-located on a single slot,
8421  * in order to determine how many ports a device has. This is most useful in
8422  * determining the required GT/s of PCIe bandwidth necessary for optimal
8423  * performance.
8424  **/
8425 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8426 {
8427         struct pci_dev *entry, *pdev = adapter->pdev;
8428         int physfns = 0;
8429
8430         /* Some cards can not use the generic count PCIe functions method,
8431          * because they are behind a parent switch, so we hardcode these with
8432          * the correct number of functions.
8433          */
8434         if (ixgbe_pcie_from_parent(&adapter->hw))
8435                 physfns = 4;
8436
8437         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8438                 /* don't count virtual functions */
8439                 if (entry->is_virtfn)
8440                         continue;
8441
8442                 /* When the devices on the bus don't all match our device ID,
8443                  * we can't reliably determine the correct number of
8444                  * functions. This can occur if a function has been direct
8445                  * attached to a virtual machine using VT-d, for example. In
8446                  * this case, simply return -1 to indicate this.
8447                  */
8448                 if ((entry->vendor != pdev->vendor) ||
8449                     (entry->device != pdev->device))
8450                         return -1;
8451
8452                 physfns++;
8453         }
8454
8455         return physfns;
8456 }
8457
8458 /**
8459  * ixgbe_wol_supported - Check whether device supports WoL
8460  * @hw: hw specific details
8461  * @device_id: the device ID
8462  * @subdev_id: the subsystem device ID
8463  *
8464  * This function is used by probe and ethtool to determine
8465  * which devices have WoL support
8466  *
8467  **/
8468 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8469                         u16 subdevice_id)
8470 {
8471         struct ixgbe_hw *hw = &adapter->hw;
8472         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8473         int is_wol_supported = 0;
8474
8475         switch (device_id) {
8476         case IXGBE_DEV_ID_82599_SFP:
8477                 /* Only these subdevices could supports WOL */
8478                 switch (subdevice_id) {
8479                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8480                 case IXGBE_SUBDEV_ID_82599_560FLR:
8481                         /* only support first port */
8482                         if (hw->bus.func != 0)
8483                                 break;
8484                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8485                 case IXGBE_SUBDEV_ID_82599_SFP:
8486                 case IXGBE_SUBDEV_ID_82599_RNDC:
8487                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8488                 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8489                         is_wol_supported = 1;
8490                         break;
8491                 }
8492                 break;
8493         case IXGBE_DEV_ID_82599EN_SFP:
8494                 /* Only this subdevice supports WOL */
8495                 switch (subdevice_id) {
8496                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8497                         is_wol_supported = 1;
8498                         break;
8499                 }
8500                 break;
8501         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8502                 /* All except this subdevice support WOL */
8503                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8504                         is_wol_supported = 1;
8505                 break;
8506         case IXGBE_DEV_ID_82599_KX4:
8507                 is_wol_supported = 1;
8508                 break;
8509         case IXGBE_DEV_ID_X540T:
8510         case IXGBE_DEV_ID_X540T1:
8511         case IXGBE_DEV_ID_X550T:
8512         case IXGBE_DEV_ID_X550EM_X_KX4:
8513         case IXGBE_DEV_ID_X550EM_X_KR:
8514         case IXGBE_DEV_ID_X550EM_X_10G_T:
8515                 /* check eeprom to see if enabled wol */
8516                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8517                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8518                      (hw->bus.func == 0))) {
8519                         is_wol_supported = 1;
8520                 }
8521                 break;
8522         }
8523
8524         return is_wol_supported;
8525 }
8526
8527 /**
8528  * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8529  * @adapter: Pointer to adapter struct
8530  */
8531 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8532 {
8533 #ifdef CONFIG_OF
8534         struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8535         struct ixgbe_hw *hw = &adapter->hw;
8536         const unsigned char *addr;
8537
8538         addr = of_get_mac_address(dp);
8539         if (addr) {
8540                 ether_addr_copy(hw->mac.perm_addr, addr);
8541                 return;
8542         }
8543 #endif /* CONFIG_OF */
8544
8545 #ifdef CONFIG_SPARC
8546         ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8547 #endif /* CONFIG_SPARC */
8548 }
8549
8550 /**
8551  * ixgbe_probe - Device Initialization Routine
8552  * @pdev: PCI device information struct
8553  * @ent: entry in ixgbe_pci_tbl
8554  *
8555  * Returns 0 on success, negative on failure
8556  *
8557  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8558  * The OS initialization, configuring of the adapter private structure,
8559  * and a hardware reset occur.
8560  **/
8561 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8562 {
8563         struct net_device *netdev;
8564         struct ixgbe_adapter *adapter = NULL;
8565         struct ixgbe_hw *hw;
8566         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8567         int i, err, pci_using_dac, expected_gts;
8568         unsigned int indices = MAX_TX_QUEUES;
8569         u8 part_str[IXGBE_PBANUM_LENGTH];
8570         bool disable_dev = false;
8571 #ifdef IXGBE_FCOE
8572         u16 device_caps;
8573 #endif
8574         u32 eec;
8575
8576         /* Catch broken hardware that put the wrong VF device ID in
8577          * the PCIe SR-IOV capability.
8578          */
8579         if (pdev->is_virtfn) {
8580                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8581                      pci_name(pdev), pdev->vendor, pdev->device);
8582                 return -EINVAL;
8583         }
8584
8585         err = pci_enable_device_mem(pdev);
8586         if (err)
8587                 return err;
8588
8589         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8590                 pci_using_dac = 1;
8591         } else {
8592                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8593                 if (err) {
8594                         dev_err(&pdev->dev,
8595                                 "No usable DMA configuration, aborting\n");
8596                         goto err_dma;
8597                 }
8598                 pci_using_dac = 0;
8599         }
8600
8601         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8602                                            IORESOURCE_MEM), ixgbe_driver_name);
8603         if (err) {
8604                 dev_err(&pdev->dev,
8605                         "pci_request_selected_regions failed 0x%x\n", err);
8606                 goto err_pci_reg;
8607         }
8608
8609         pci_enable_pcie_error_reporting(pdev);
8610
8611         pci_set_master(pdev);
8612         pci_save_state(pdev);
8613
8614         if (ii->mac == ixgbe_mac_82598EB) {
8615 #ifdef CONFIG_IXGBE_DCB
8616                 /* 8 TC w/ 4 queues per TC */
8617                 indices = 4 * MAX_TRAFFIC_CLASS;
8618 #else
8619                 indices = IXGBE_MAX_RSS_INDICES;
8620 #endif
8621         }
8622
8623         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8624         if (!netdev) {
8625                 err = -ENOMEM;
8626                 goto err_alloc_etherdev;
8627         }
8628
8629         SET_NETDEV_DEV(netdev, &pdev->dev);
8630
8631         adapter = netdev_priv(netdev);
8632
8633         adapter->netdev = netdev;
8634         adapter->pdev = pdev;
8635         hw = &adapter->hw;
8636         hw->back = adapter;
8637         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8638
8639         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8640                               pci_resource_len(pdev, 0));
8641         adapter->io_addr = hw->hw_addr;
8642         if (!hw->hw_addr) {
8643                 err = -EIO;
8644                 goto err_ioremap;
8645         }
8646
8647         netdev->netdev_ops = &ixgbe_netdev_ops;
8648         ixgbe_set_ethtool_ops(netdev);
8649         netdev->watchdog_timeo = 5 * HZ;
8650         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8651
8652         /* Setup hw api */
8653         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8654         hw->mac.type  = ii->mac;
8655         hw->mvals     = ii->mvals;
8656
8657         /* EEPROM */
8658         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8659         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8660         if (ixgbe_removed(hw->hw_addr)) {
8661                 err = -EIO;
8662                 goto err_ioremap;
8663         }
8664         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8665         if (!(eec & (1 << 8)))
8666                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8667
8668         /* PHY */
8669         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8670         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8671         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8672         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8673         hw->phy.mdio.mmds = 0;
8674         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8675         hw->phy.mdio.dev = netdev;
8676         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8677         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8678
8679         ii->get_invariants(hw);
8680
8681         /* setup the private structure */
8682         err = ixgbe_sw_init(adapter);
8683         if (err)
8684                 goto err_sw_init;
8685
8686         /* Make it possible the adapter to be woken up via WOL */
8687         switch (adapter->hw.mac.type) {
8688         case ixgbe_mac_82599EB:
8689         case ixgbe_mac_X540:
8690         case ixgbe_mac_X550:
8691         case ixgbe_mac_X550EM_x:
8692                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8693                 break;
8694         default:
8695                 break;
8696         }
8697
8698         /*
8699          * If there is a fan on this device and it has failed log the
8700          * failure.
8701          */
8702         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8703                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8704                 if (esdp & IXGBE_ESDP_SDP1)
8705                         e_crit(probe, "Fan has stopped, replace the adapter\n");
8706         }
8707
8708         if (allow_unsupported_sfp)
8709                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8710
8711         /* reset_hw fills in the perm_addr as well */
8712         hw->phy.reset_if_overtemp = true;
8713         err = hw->mac.ops.reset_hw(hw);
8714         hw->phy.reset_if_overtemp = false;
8715         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8716                 err = 0;
8717         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8718                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8719                 e_dev_err("Reload the driver after installing a supported module.\n");
8720                 goto err_sw_init;
8721         } else if (err) {
8722                 e_dev_err("HW Init failed: %d\n", err);
8723                 goto err_sw_init;
8724         }
8725
8726 #ifdef CONFIG_PCI_IOV
8727         /* SR-IOV not supported on the 82598 */
8728         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8729                 goto skip_sriov;
8730         /* Mailbox */
8731         ixgbe_init_mbx_params_pf(hw);
8732         memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8733         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8734         ixgbe_enable_sriov(adapter);
8735 skip_sriov:
8736
8737 #endif
8738         netdev->features = NETIF_F_SG |
8739                            NETIF_F_IP_CSUM |
8740                            NETIF_F_IPV6_CSUM |
8741                            NETIF_F_HW_VLAN_CTAG_TX |
8742                            NETIF_F_HW_VLAN_CTAG_RX |
8743                            NETIF_F_TSO |
8744                            NETIF_F_TSO6 |
8745                            NETIF_F_RXHASH |
8746                            NETIF_F_RXCSUM;
8747
8748         netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8749
8750         switch (adapter->hw.mac.type) {
8751         case ixgbe_mac_82599EB:
8752         case ixgbe_mac_X540:
8753         case ixgbe_mac_X550:
8754         case ixgbe_mac_X550EM_x:
8755                 netdev->features |= NETIF_F_SCTP_CSUM;
8756                 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8757                                        NETIF_F_NTUPLE;
8758                 break;
8759         default:
8760                 break;
8761         }
8762
8763         netdev->hw_features |= NETIF_F_RXALL;
8764         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8765
8766         netdev->vlan_features |= NETIF_F_TSO;
8767         netdev->vlan_features |= NETIF_F_TSO6;
8768         netdev->vlan_features |= NETIF_F_IP_CSUM;
8769         netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8770         netdev->vlan_features |= NETIF_F_SG;
8771
8772         netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8773                                    NETIF_F_IPV6_CSUM;
8774
8775         netdev->priv_flags |= IFF_UNICAST_FLT;
8776         netdev->priv_flags |= IFF_SUPP_NOFCS;
8777
8778 #ifdef CONFIG_IXGBE_VXLAN
8779         switch (adapter->hw.mac.type) {
8780         case ixgbe_mac_X550:
8781         case ixgbe_mac_X550EM_x:
8782                 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8783                                            NETIF_F_IP_CSUM |
8784                                            NETIF_F_IPV6_CSUM;
8785                 break;
8786         default:
8787                 break;
8788         }
8789 #endif /* CONFIG_IXGBE_VXLAN */
8790
8791 #ifdef CONFIG_IXGBE_DCB
8792         netdev->dcbnl_ops = &dcbnl_ops;
8793 #endif
8794
8795 #ifdef IXGBE_FCOE
8796         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8797                 unsigned int fcoe_l;
8798
8799                 if (hw->mac.ops.get_device_caps) {
8800                         hw->mac.ops.get_device_caps(hw, &device_caps);
8801                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8802                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8803                 }
8804
8805
8806                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8807                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8808
8809                 netdev->features |= NETIF_F_FSO |
8810                                     NETIF_F_FCOE_CRC;
8811
8812                 netdev->vlan_features |= NETIF_F_FSO |
8813                                          NETIF_F_FCOE_CRC |
8814                                          NETIF_F_FCOE_MTU;
8815         }
8816 #endif /* IXGBE_FCOE */
8817         if (pci_using_dac) {
8818                 netdev->features |= NETIF_F_HIGHDMA;
8819                 netdev->vlan_features |= NETIF_F_HIGHDMA;
8820         }
8821
8822         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8823                 netdev->hw_features |= NETIF_F_LRO;
8824         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8825                 netdev->features |= NETIF_F_LRO;
8826
8827         /* make sure the EEPROM is good */
8828         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8829                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8830                 err = -EIO;
8831                 goto err_sw_init;
8832         }
8833
8834         ixgbe_get_platform_mac_addr(adapter);
8835
8836         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8837
8838         if (!is_valid_ether_addr(netdev->dev_addr)) {
8839                 e_dev_err("invalid MAC address\n");
8840                 err = -EIO;
8841                 goto err_sw_init;
8842         }
8843
8844         ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8845
8846         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8847                     (unsigned long) adapter);
8848
8849         if (ixgbe_removed(hw->hw_addr)) {
8850                 err = -EIO;
8851                 goto err_sw_init;
8852         }
8853         INIT_WORK(&adapter->service_task, ixgbe_service_task);
8854         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8855         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8856
8857         err = ixgbe_init_interrupt_scheme(adapter);
8858         if (err)
8859                 goto err_sw_init;
8860
8861         /* WOL not supported for all devices */
8862         adapter->wol = 0;
8863         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8864         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8865                                                 pdev->subsystem_device);
8866         if (hw->wol_enabled)
8867                 adapter->wol = IXGBE_WUFC_MAG;
8868
8869         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8870
8871         /* save off EEPROM version number */
8872         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8873         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8874
8875         /* pick up the PCI bus settings for reporting later */
8876         if (ixgbe_pcie_from_parent(hw))
8877                 ixgbe_get_parent_bus_info(adapter);
8878         else
8879                  hw->mac.ops.get_bus_info(hw);
8880
8881         /* calculate the expected PCIe bandwidth required for optimal
8882          * performance. Note that some older parts will never have enough
8883          * bandwidth due to being older generation PCIe parts. We clamp these
8884          * parts to ensure no warning is displayed if it can't be fixed.
8885          */
8886         switch (hw->mac.type) {
8887         case ixgbe_mac_82598EB:
8888                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8889                 break;
8890         default:
8891                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8892                 break;
8893         }
8894
8895         /* don't check link if we failed to enumerate functions */
8896         if (expected_gts > 0)
8897                 ixgbe_check_minimum_link(adapter, expected_gts);
8898
8899         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8900         if (err)
8901                 strlcpy(part_str, "Unknown", sizeof(part_str));
8902         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8903                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8904                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8905                            part_str);
8906         else
8907                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8908                            hw->mac.type, hw->phy.type, part_str);
8909
8910         e_dev_info("%pM\n", netdev->dev_addr);
8911
8912         /* reset the hardware with the new settings */
8913         err = hw->mac.ops.start_hw(hw);
8914         if (err == IXGBE_ERR_EEPROM_VERSION) {
8915                 /* We are running on a pre-production device, log a warning */
8916                 e_dev_warn("This device is a pre-production adapter/LOM. "
8917                            "Please be aware there may be issues associated "
8918                            "with your hardware.  If you are experiencing "
8919                            "problems please contact your Intel or hardware "
8920                            "representative who provided you with this "
8921                            "hardware.\n");
8922         }
8923         strcpy(netdev->name, "eth%d");
8924         err = register_netdev(netdev);
8925         if (err)
8926                 goto err_register;
8927
8928         pci_set_drvdata(pdev, adapter);
8929
8930         /* power down the optics for 82599 SFP+ fiber */
8931         if (hw->mac.ops.disable_tx_laser)
8932                 hw->mac.ops.disable_tx_laser(hw);
8933
8934         /* carrier off reporting is important to ethtool even BEFORE open */
8935         netif_carrier_off(netdev);
8936
8937 #ifdef CONFIG_IXGBE_DCA
8938         if (dca_add_requester(&pdev->dev) == 0) {
8939                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8940                 ixgbe_setup_dca(adapter);
8941         }
8942 #endif
8943         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8944                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8945                 for (i = 0; i < adapter->num_vfs; i++)
8946                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
8947         }
8948
8949         /* firmware requires driver version to be 0xFFFFFFFF
8950          * since os does not support feature
8951          */
8952         if (hw->mac.ops.set_fw_drv_ver)
8953                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8954                                            0xFF);
8955
8956         /* add san mac addr to netdev */
8957         ixgbe_add_sanmac_netdev(netdev);
8958
8959         e_dev_info("%s\n", ixgbe_default_device_descr);
8960
8961 #ifdef CONFIG_IXGBE_HWMON
8962         if (ixgbe_sysfs_init(adapter))
8963                 e_err(probe, "failed to allocate sysfs resources\n");
8964 #endif /* CONFIG_IXGBE_HWMON */
8965
8966         ixgbe_dbg_adapter_init(adapter);
8967
8968         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8969         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8970                 hw->mac.ops.setup_link(hw,
8971                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8972                         true);
8973
8974         return 0;
8975
8976 err_register:
8977         ixgbe_release_hw_control(adapter);
8978         ixgbe_clear_interrupt_scheme(adapter);
8979 err_sw_init:
8980         ixgbe_disable_sriov(adapter);
8981         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8982         iounmap(adapter->io_addr);
8983         kfree(adapter->mac_table);
8984 err_ioremap:
8985         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8986         free_netdev(netdev);
8987 err_alloc_etherdev:
8988         pci_release_selected_regions(pdev,
8989                                      pci_select_bars(pdev, IORESOURCE_MEM));
8990 err_pci_reg:
8991 err_dma:
8992         if (!adapter || disable_dev)
8993                 pci_disable_device(pdev);
8994         return err;
8995 }
8996
8997 /**
8998  * ixgbe_remove - Device Removal Routine
8999  * @pdev: PCI device information struct
9000  *
9001  * ixgbe_remove is called by the PCI subsystem to alert the driver
9002  * that it should release a PCI device.  The could be caused by a
9003  * Hot-Plug event, or because the driver is going to be removed from
9004  * memory.
9005  **/
9006 static void ixgbe_remove(struct pci_dev *pdev)
9007 {
9008         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9009         struct net_device *netdev;
9010         bool disable_dev;
9011
9012         /* if !adapter then we already cleaned up in probe */
9013         if (!adapter)
9014                 return;
9015
9016         netdev  = adapter->netdev;
9017         ixgbe_dbg_adapter_exit(adapter);
9018
9019         set_bit(__IXGBE_REMOVING, &adapter->state);
9020         cancel_work_sync(&adapter->service_task);
9021
9022
9023 #ifdef CONFIG_IXGBE_DCA
9024         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9025                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9026                 dca_remove_requester(&pdev->dev);
9027                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
9028         }
9029
9030 #endif
9031 #ifdef CONFIG_IXGBE_HWMON
9032         ixgbe_sysfs_exit(adapter);
9033 #endif /* CONFIG_IXGBE_HWMON */
9034
9035         /* remove the added san mac */
9036         ixgbe_del_sanmac_netdev(netdev);
9037
9038 #ifdef CONFIG_PCI_IOV
9039         ixgbe_disable_sriov(adapter);
9040 #endif
9041         if (netdev->reg_state == NETREG_REGISTERED)
9042                 unregister_netdev(netdev);
9043
9044         ixgbe_clear_interrupt_scheme(adapter);
9045
9046         ixgbe_release_hw_control(adapter);
9047
9048 #ifdef CONFIG_DCB
9049         kfree(adapter->ixgbe_ieee_pfc);
9050         kfree(adapter->ixgbe_ieee_ets);
9051
9052 #endif
9053         iounmap(adapter->io_addr);
9054         pci_release_selected_regions(pdev, pci_select_bars(pdev,
9055                                      IORESOURCE_MEM));
9056
9057         e_dev_info("complete\n");
9058
9059         kfree(adapter->mac_table);
9060         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9061         free_netdev(netdev);
9062
9063         pci_disable_pcie_error_reporting(pdev);
9064
9065         if (disable_dev)
9066                 pci_disable_device(pdev);
9067 }
9068
9069 /**
9070  * ixgbe_io_error_detected - called when PCI error is detected
9071  * @pdev: Pointer to PCI device
9072  * @state: The current pci connection state
9073  *
9074  * This function is called after a PCI bus error affecting
9075  * this device has been detected.
9076  */
9077 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9078                                                 pci_channel_state_t state)
9079 {
9080         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9081         struct net_device *netdev = adapter->netdev;
9082
9083 #ifdef CONFIG_PCI_IOV
9084         struct ixgbe_hw *hw = &adapter->hw;
9085         struct pci_dev *bdev, *vfdev;
9086         u32 dw0, dw1, dw2, dw3;
9087         int vf, pos;
9088         u16 req_id, pf_func;
9089
9090         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9091             adapter->num_vfs == 0)
9092                 goto skip_bad_vf_detection;
9093
9094         bdev = pdev->bus->self;
9095         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9096                 bdev = bdev->bus->self;
9097
9098         if (!bdev)
9099                 goto skip_bad_vf_detection;
9100
9101         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9102         if (!pos)
9103                 goto skip_bad_vf_detection;
9104
9105         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9106         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9107         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9108         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9109         if (ixgbe_removed(hw->hw_addr))
9110                 goto skip_bad_vf_detection;
9111
9112         req_id = dw1 >> 16;
9113         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9114         if (!(req_id & 0x0080))
9115                 goto skip_bad_vf_detection;
9116
9117         pf_func = req_id & 0x01;
9118         if ((pf_func & 1) == (pdev->devfn & 1)) {
9119                 unsigned int device_id;
9120
9121                 vf = (req_id & 0x7F) >> 1;
9122                 e_dev_err("VF %d has caused a PCIe error\n", vf);
9123                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9124                                 "%8.8x\tdw3: %8.8x\n",
9125                 dw0, dw1, dw2, dw3);
9126                 switch (adapter->hw.mac.type) {
9127                 case ixgbe_mac_82599EB:
9128                         device_id = IXGBE_82599_VF_DEVICE_ID;
9129                         break;
9130                 case ixgbe_mac_X540:
9131                         device_id = IXGBE_X540_VF_DEVICE_ID;
9132                         break;
9133                 case ixgbe_mac_X550:
9134                         device_id = IXGBE_DEV_ID_X550_VF;
9135                         break;
9136                 case ixgbe_mac_X550EM_x:
9137                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
9138                         break;
9139                 default:
9140                         device_id = 0;
9141                         break;
9142                 }
9143
9144                 /* Find the pci device of the offending VF */
9145                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9146                 while (vfdev) {
9147                         if (vfdev->devfn == (req_id & 0xFF))
9148                                 break;
9149                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9150                                                device_id, vfdev);
9151                 }
9152                 /*
9153                  * There's a slim chance the VF could have been hot plugged,
9154                  * so if it is no longer present we don't need to issue the
9155                  * VFLR.  Just clean up the AER in that case.
9156                  */
9157                 if (vfdev) {
9158                         ixgbe_issue_vf_flr(adapter, vfdev);
9159                         /* Free device reference count */
9160                         pci_dev_put(vfdev);
9161                 }
9162
9163                 pci_cleanup_aer_uncorrect_error_status(pdev);
9164         }
9165
9166         /*
9167          * Even though the error may have occurred on the other port
9168          * we still need to increment the vf error reference count for
9169          * both ports because the I/O resume function will be called
9170          * for both of them.
9171          */
9172         adapter->vferr_refcount++;
9173
9174         return PCI_ERS_RESULT_RECOVERED;
9175
9176 skip_bad_vf_detection:
9177 #endif /* CONFIG_PCI_IOV */
9178         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9179                 return PCI_ERS_RESULT_DISCONNECT;
9180
9181         rtnl_lock();
9182         netif_device_detach(netdev);
9183
9184         if (state == pci_channel_io_perm_failure) {
9185                 rtnl_unlock();
9186                 return PCI_ERS_RESULT_DISCONNECT;
9187         }
9188
9189         if (netif_running(netdev))
9190                 ixgbe_down(adapter);
9191
9192         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9193                 pci_disable_device(pdev);
9194         rtnl_unlock();
9195
9196         /* Request a slot reset. */
9197         return PCI_ERS_RESULT_NEED_RESET;
9198 }
9199
9200 /**
9201  * ixgbe_io_slot_reset - called after the pci bus has been reset.
9202  * @pdev: Pointer to PCI device
9203  *
9204  * Restart the card from scratch, as if from a cold-boot.
9205  */
9206 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9207 {
9208         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9209         pci_ers_result_t result;
9210         int err;
9211
9212         if (pci_enable_device_mem(pdev)) {
9213                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9214                 result = PCI_ERS_RESULT_DISCONNECT;
9215         } else {
9216                 smp_mb__before_atomic();
9217                 clear_bit(__IXGBE_DISABLED, &adapter->state);
9218                 adapter->hw.hw_addr = adapter->io_addr;
9219                 pci_set_master(pdev);
9220                 pci_restore_state(pdev);
9221                 pci_save_state(pdev);
9222
9223                 pci_wake_from_d3(pdev, false);
9224
9225                 ixgbe_reset(adapter);
9226                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9227                 result = PCI_ERS_RESULT_RECOVERED;
9228         }
9229
9230         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9231         if (err) {
9232                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9233                           "failed 0x%0x\n", err);
9234                 /* non-fatal, continue */
9235         }
9236
9237         return result;
9238 }
9239
9240 /**
9241  * ixgbe_io_resume - called when traffic can start flowing again.
9242  * @pdev: Pointer to PCI device
9243  *
9244  * This callback is called when the error recovery driver tells us that
9245  * its OK to resume normal operation.
9246  */
9247 static void ixgbe_io_resume(struct pci_dev *pdev)
9248 {
9249         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9250         struct net_device *netdev = adapter->netdev;
9251
9252 #ifdef CONFIG_PCI_IOV
9253         if (adapter->vferr_refcount) {
9254                 e_info(drv, "Resuming after VF err\n");
9255                 adapter->vferr_refcount--;
9256                 return;
9257         }
9258
9259 #endif
9260         if (netif_running(netdev))
9261                 ixgbe_up(adapter);
9262
9263         netif_device_attach(netdev);
9264 }
9265
9266 static const struct pci_error_handlers ixgbe_err_handler = {
9267         .error_detected = ixgbe_io_error_detected,
9268         .slot_reset = ixgbe_io_slot_reset,
9269         .resume = ixgbe_io_resume,
9270 };
9271
9272 static struct pci_driver ixgbe_driver = {
9273         .name     = ixgbe_driver_name,
9274         .id_table = ixgbe_pci_tbl,
9275         .probe    = ixgbe_probe,
9276         .remove   = ixgbe_remove,
9277 #ifdef CONFIG_PM
9278         .suspend  = ixgbe_suspend,
9279         .resume   = ixgbe_resume,
9280 #endif
9281         .shutdown = ixgbe_shutdown,
9282         .sriov_configure = ixgbe_pci_sriov_configure,
9283         .err_handler = &ixgbe_err_handler
9284 };
9285
9286 /**
9287  * ixgbe_init_module - Driver Registration Routine
9288  *
9289  * ixgbe_init_module is the first routine called when the driver is
9290  * loaded. All it does is register with the PCI subsystem.
9291  **/
9292 static int __init ixgbe_init_module(void)
9293 {
9294         int ret;
9295         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9296         pr_info("%s\n", ixgbe_copyright);
9297
9298         ixgbe_dbg_init();
9299
9300         ret = pci_register_driver(&ixgbe_driver);
9301         if (ret) {
9302                 ixgbe_dbg_exit();
9303                 return ret;
9304         }
9305
9306 #ifdef CONFIG_IXGBE_DCA
9307         dca_register_notify(&dca_notifier);
9308 #endif
9309
9310         return 0;
9311 }
9312
9313 module_init(ixgbe_init_module);
9314
9315 /**
9316  * ixgbe_exit_module - Driver Exit Cleanup Routine
9317  *
9318  * ixgbe_exit_module is called just before the driver is removed
9319  * from memory.
9320  **/
9321 static void __exit ixgbe_exit_module(void)
9322 {
9323 #ifdef CONFIG_IXGBE_DCA
9324         dca_unregister_notify(&dca_notifier);
9325 #endif
9326         pci_unregister_driver(&ixgbe_driver);
9327
9328         ixgbe_dbg_exit();
9329 }
9330
9331 #ifdef CONFIG_IXGBE_DCA
9332 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9333                             void *p)
9334 {
9335         int ret_val;
9336
9337         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9338                                          __ixgbe_notify_dca);
9339
9340         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9341 }
9342
9343 #endif /* CONFIG_IXGBE_DCA */
9344
9345 module_exit(ixgbe_exit_module);
9346
9347 /* ixgbe_main.c */