drivers/regulator/anatop-regulator.c

   1 /*
   2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include <linux/slab.h>
  22 #include <linux/device.h>
  23 #include <linux/module.h>
  24 #include <linux/mfd/syscon.h>
  25 #include <linux/err.h>
  26 #include <linux/io.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/of.h>
  29 #include <linux/of_address.h>
  30 #include <linux/regmap.h>
  31 #include <linux/regulator/driver.h>
  32 #include <linux/regulator/of_regulator.h>
  33
  34 #define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
  35 #define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */
  36
  37 struct anatop_regulator {
  38         const char *name;
  39         u32 control_reg;
  40         struct regmap *anatop;
  41         int vol_bit_shift;
  42         int vol_bit_width;
  43         u32 delay_reg;
  44         int delay_bit_shift;
  45         int delay_bit_width;
  46         int min_bit_val;
  47         int min_voltage;
  48         int max_voltage;
  49         struct regulator_desc rdesc;
  50         struct regulator_init_data *initdata;
  51 };
  52
  53 static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
  54                                         unsigned selector)
  55 {
  56         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  57
  58         if (!anatop_reg->control_reg)
  59                 return -ENOTSUPP;
  60
  61         return regulator_set_voltage_sel_regmap(reg, selector);
  62 }
  63
  64 static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
  65         unsigned int old_sel,
  66         unsigned int new_sel)
  67 {
  68         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  69         u32 val;
  70         int ret = 0;
  71
  72         /* check whether need to care about LDO ramp up speed */
  73         if (anatop_reg->delay_bit_width && new_sel > old_sel) {
  74                 /*
  75                  * the delay for LDO ramp up time is
  76                  * based on the register setting, we need
  77                  * to calculate how many steps LDO need to
  78                  * ramp up, and how much delay needed. (us)
  79                  */
  80                 regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
  81                 val = (val >> anatop_reg->delay_bit_shift) &
  82                         ((1 << anatop_reg->delay_bit_width) - 1);
  83                 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
  84                         val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
  85         }
  86
  87         return ret;
  88 }
  89
  90 static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
  91 {
  92         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
  93
  94         if (!anatop_reg->control_reg)
  95                 return -ENOTSUPP;
  96
  97         return regulator_get_voltage_sel_regmap(reg);
  98 }
  99
 100 static struct regulator_ops anatop_rops = {
 101         .set_voltage_sel = anatop_regmap_set_voltage_sel,
 102         .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
 103         .get_voltage_sel = anatop_regmap_get_voltage_sel,
 104         .list_voltage = regulator_list_voltage_linear,
 105         .map_voltage = regulator_map_voltage_linear,
 106 };
 107
 108 static int anatop_regulator_probe(struct platform_device *pdev)
 109 {
 110         struct device *dev = &pdev->dev;
 111         struct device_node *np = dev->of_node;
 112         struct device_node *anatop_np;
 113         struct regulator_desc *rdesc;
 114         struct regulator_dev *rdev;
 115         struct anatop_regulator *sreg;
 116         struct regulator_init_data *initdata;
 117         struct regulator_config config = { };
 118         int ret = 0;
 119
 120         initdata = of_get_regulator_init_data(dev, np);
 121         sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
 122         if (!sreg)
 123                 return -ENOMEM;
 124         sreg->initdata = initdata;
 125         sreg->name = of_get_property(np, "regulator-name", NULL);
 126         rdesc = &sreg->rdesc;
 127         rdesc->name = sreg->name;
 128         rdesc->ops = &anatop_rops;
 129         rdesc->type = REGULATOR_VOLTAGE;
 130         rdesc->owner = THIS_MODULE;
 131
 132         anatop_np = of_get_parent(np);
 133         if (!anatop_np)
 134                 return -ENODEV;
 135         sreg->anatop = syscon_node_to_regmap(anatop_np);
 136         of_node_put(anatop_np);
 137         if (IS_ERR(sreg->anatop))
 138                 return PTR_ERR(sreg->anatop);
 139
 140         ret = of_property_read_u32(np, "anatop-reg-offset",
 141                                    &sreg->control_reg);
 142         if (ret) {
 143                 dev_err(dev, "no anatop-reg-offset property set\n");
 144                 return ret;
 145         }
 146         ret = of_property_read_u32(np, "anatop-vol-bit-width",
 147                                    &sreg->vol_bit_width);
 148         if (ret) {
 149                 dev_err(dev, "no anatop-vol-bit-width property set\n");
 150                 return ret;
 151         }
 152         ret = of_property_read_u32(np, "anatop-vol-bit-shift",
 153                                    &sreg->vol_bit_shift);
 154         if (ret) {
 155                 dev_err(dev, "no anatop-vol-bit-shift property set\n");
 156                 return ret;
 157         }
 158         ret = of_property_read_u32(np, "anatop-min-bit-val",
 159                                    &sreg->min_bit_val);
 160         if (ret) {
 161                 dev_err(dev, "no anatop-min-bit-val property set\n");
 162                 return ret;
 163         }
 164         ret = of_property_read_u32(np, "anatop-min-voltage",
 165                                    &sreg->min_voltage);
 166         if (ret) {
 167                 dev_err(dev, "no anatop-min-voltage property set\n");
 168                 return ret;
 169         }
 170         ret = of_property_read_u32(np, "anatop-max-voltage",
 171                                    &sreg->max_voltage);
 172         if (ret) {
 173                 dev_err(dev, "no anatop-max-voltage property set\n");
 174                 return ret;
 175         }
 176
 177         /* read LDO ramp up setting, only for core reg */
 178         of_property_read_u32(np, "anatop-delay-reg-offset",
 179                              &sreg->delay_reg);
 180         of_property_read_u32(np, "anatop-delay-bit-width",
 181                              &sreg->delay_bit_width);
 182         of_property_read_u32(np, "anatop-delay-bit-shift",
 183                              &sreg->delay_bit_shift);
 184
 185         rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
 186                             + sreg->min_bit_val;
 187         rdesc->min_uV = sreg->min_voltage;
 188         rdesc->uV_step = 25000;
 189         rdesc->linear_min_sel = sreg->min_bit_val;
 190         rdesc->vsel_reg = sreg->control_reg;
 191         rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
 192                            sreg->vol_bit_shift;
 193
 194         config.dev = &pdev->dev;
 195         config.init_data = initdata;
 196         config.driver_data = sreg;
 197         config.of_node = pdev->dev.of_node;
 198         config.regmap = sreg->anatop;
 199
 200         /* register regulator */
 201         rdev = devm_regulator_register(dev, rdesc, &config);
 202         if (IS_ERR(rdev)) {
 203                 dev_err(dev, "failed to register %s\n",
 204                         rdesc->name);
 205                 return PTR_ERR(rdev);
 206         }
 207
 208         platform_set_drvdata(pdev, rdev);
 209
 210         return 0;
 211 }
 212
 213 static struct of_device_id of_anatop_regulator_match_tbl[] = {
 214         { .compatible = "fsl,anatop-regulator", },
 215         { /* end */ }
 216 };
 217
 218 static struct platform_driver anatop_regulator_driver = {
 219         .driver = {
 220                 .name   = "anatop_regulator",
 221                 .owner  = THIS_MODULE,
 222                 .of_match_table = of_anatop_regulator_match_tbl,
 223         },
 224         .probe  = anatop_regulator_probe,
 225 };
 226
 227 static int __init anatop_regulator_init(void)
 228 {
 229         return platform_driver_register(&anatop_regulator_driver);
 230 }
 231 postcore_initcall(anatop_regulator_init);
 232
 233 static void __exit anatop_regulator_exit(void)
 234 {
 235         platform_driver_unregister(&anatop_regulator_driver);
 236 }
 237 module_exit(anatop_regulator_exit);
 238
 239 MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
 240 MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
 241 MODULE_DESCRIPTION("ANATOP Regulator driver");
 242 MODULE_LICENSE("GPL v2");
 243 MODULE_ALIAS("platform:anatop_regulator");