drivers/scsi/gdth.c

   1 /************************************************************************
   2  * Linux driver for                                                     *
   3  * ICP vortex GmbH:    GDT ISA/EISA/PCI Disk Array Controllers          *
   4  * Intel Corporation:  Storage RAID Controllers                         *
   5  *                                                                      *
   6  * gdth.c                                                               *
   7  * Copyright (C) 1995-06 ICP vortex GmbH, Achim Leubner                 *
   8  * Copyright (C) 2002-04 Intel Corporation                              *
   9  * Copyright (C) 2003-06 Adaptec Inc.                                   *
  10  * <achim_leubner@adaptec.com>                                          *
  11  *                                                                      *
  12  * Additions/Fixes:                                                     *
  13  * Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>               *
  14  * Johannes Dinner <johannes_dinner@adaptec.com>                        *
  15  *                                                                      *
  16  * This program is free software; you can redistribute it and/or modify *
  17  * it under the terms of the GNU General Public License as published    *
  18  * by the Free Software Foundation; either version 2 of the License,    *
  19  * or (at your option) any later version.                               *
  20  *                                                                      *
  21  * This program is distributed in the hope that it will be useful,      *
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of       *
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the         *
  24  * GNU General Public License for more details.                         *
  25  *                                                                      *
  26  * You should have received a copy of the GNU General Public License    *
  27  * along with this kernel; if not, write to the Free Software           *
  28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.            *
  29  *                                                                      *
  30  * Linux kernel 2.6.x supported                                         *
  31  *                                                                      *
  32  ************************************************************************/
  33
  34 /* All GDT Disk Array Controllers are fully supported by this driver.
  35  * This includes the PCI/EISA/ISA SCSI Disk Array Controllers and the
  36  * PCI Fibre Channel Disk Array Controllers. See gdth.h for a complete
  37  * list of all controller types.
  38  *
  39  * If you have one or more GDT3000/3020 EISA controllers with
  40  * controller BIOS disabled, you have to set the IRQ values with the
  41  * command line option "gdth=irq1,irq2,...", where the irq1,irq2,... are
  42  * the IRQ values for the EISA controllers.
  43  *
  44  * After the optional list of IRQ values, other possible
  45  * command line options are:
  46  * disable:Y                    disable driver
  47  * disable:N                    enable driver
  48  * reserve_mode:0               reserve no drives for the raw service
  49  * reserve_mode:1               reserve all not init., removable drives
  50  * reserve_mode:2               reserve all not init. drives
  51  * reserve_list:h,b,t,l,h,b,t,l,...     reserve particular drive(s) with
  52  *                              h- controller no., b- channel no.,
  53  *                              t- target ID, l- LUN
  54  * reverse_scan:Y               reverse scan order for PCI controllers
  55  * reverse_scan:N               scan PCI controllers like BIOS
  56  * max_ids:x                    x - target ID count per channel (1..MAXID)
  57  * rescan:Y                     rescan all channels/IDs
  58  * rescan:N                     use all devices found until now
  59  * hdr_channel:x                x - number of virtual bus for host drives
  60  * shared_access:Y              disable driver reserve/release protocol to
  61  *                              access a shared resource from several nodes,
  62  *                              appropriate controller firmware required
  63  * shared_access:N              enable driver reserve/release protocol
  64  * probe_eisa_isa:Y             scan for EISA/ISA controllers
  65  * probe_eisa_isa:N             do not scan for EISA/ISA controllers
  66  * force_dma32:Y                use only 32 bit DMA mode
  67  * force_dma32:N                use 64 bit DMA mode, if supported
  68  *
  69  * The default values are: "gdth=disable:N,reserve_mode:1,reverse_scan:N,
  70  *                          max_ids:127,rescan:N,hdr_channel:0,
  71  *                          shared_access:Y,probe_eisa_isa:N,force_dma32:N".
  72  * Here is another example: "gdth=reserve_list:0,1,2,0,0,1,3,0,rescan:Y".
  73  *
  74  * When loading the gdth driver as a module, the same options are available.
  75  * You can set the IRQs with "IRQ=...". However, the syntax to specify the
  76  * options changes slightly. You must replace all ',' between options
  77  * with ' ' and all ':' with '=' and you must use
  78  * '1' in place of 'Y' and '0' in place of 'N'.
  79  *
  80  * Default: "modprobe gdth disable=0 reserve_mode=1 reverse_scan=0
  81  *           max_ids=127 rescan=0 hdr_channel=0 shared_access=0
  82  *           probe_eisa_isa=0 force_dma32=0"
  83  * The other example: "modprobe gdth reserve_list=0,1,2,0,0,1,3,0 rescan=1".
  84  */
  85
  86 /* The meaning of the Scsi_Pointer members in this driver is as follows:
  87  * ptr:                     Chaining
  88  * this_residual:           unused
  89  * buffer:                  unused
  90  * dma_handle:              unused
  91  * buffers_residual:        unused
  92  * Status:                  unused
  93  * Message:                 unused
  94  * have_data_in:            unused
  95  * sent_command:            unused
  96  * phase:                   unused
  97  */
  98
  99
 100 /* interrupt coalescing */
 101 /* #define INT_COAL */
 102
 103 /* statistics */
 104 #define GDTH_STATISTICS
 105
 106 #include <linux/module.h>
 107
 108 #include <linux/version.h>
 109 #include <linux/kernel.h>
 110 #include <linux/types.h>
 111 #include <linux/pci.h>
 112 #include <linux/string.h>
 113 #include <linux/ctype.h>
 114 #include <linux/ioport.h>
 115 #include <linux/delay.h>
 116 #include <linux/interrupt.h>
 117 #include <linux/in.h>
 118 #include <linux/proc_fs.h>
 119 #include <linux/time.h>
 120 #include <linux/timer.h>
 121 #include <linux/dma-mapping.h>
 122 #include <linux/list.h>
 123 #include <linux/mutex.h>
 124 #include <linux/slab.h>
 125
 126 #ifdef GDTH_RTC
 127 #include <linux/mc146818rtc.h>
 128 #endif
 129 #include <linux/reboot.h>
 130
 131 #include <asm/dma.h>
 132 #include <asm/io.h>
 133 #include <asm/uaccess.h>
 134 #include <linux/spinlock.h>
 135 #include <linux/blkdev.h>
 136 #include <linux/scatterlist.h>
 137
 138 #include "scsi.h"
 139 #include <scsi/scsi_host.h>
 140 #include "gdth.h"
 141
 142 static DEFINE_MUTEX(gdth_mutex);
 143 static void gdth_delay(int milliseconds);
 144 static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs);
 145 static irqreturn_t gdth_interrupt(int irq, void *dev_id);
 146 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
 147                                     int gdth_from_wait, int* pIndex);
 148 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
 149                                                                Scsi_Cmnd *scp);
 150 static int gdth_async_event(gdth_ha_str *ha);
 151 static void gdth_log_event(gdth_evt_data *dvr, char *buffer);
 152
 153 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority);
 154 static void gdth_next(gdth_ha_str *ha);
 155 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b);
 156 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
 157 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
 158                                       u16 idx, gdth_evt_data *evt);
 159 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
 160 static void gdth_readapp_event(gdth_ha_str *ha, u8 application,
 161                                gdth_evt_str *estr);
 162 static void gdth_clear_events(void);
 163
 164 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
 165                                     char *buffer, u16 count);
 166 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
 167 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u16 hdrive);
 168
 169 static void gdth_enable_int(gdth_ha_str *ha);
 170 static int gdth_test_busy(gdth_ha_str *ha);
 171 static int gdth_get_cmd_index(gdth_ha_str *ha);
 172 static void gdth_release_event(gdth_ha_str *ha);
 173 static int gdth_wait(gdth_ha_str *ha, int index,u32 time);
 174 static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode,
 175                                              u32 p1, u64 p2,u64 p3);
 176 static int gdth_search_drives(gdth_ha_str *ha);
 177 static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive);
 178
 179 static const char *gdth_ctr_name(gdth_ha_str *ha);
 180
 181 static int gdth_open(struct inode *inode, struct file *filep);
 182 static int gdth_close(struct inode *inode, struct file *filep);
 183 static long gdth_unlocked_ioctl(struct file *filep, unsigned int cmd,
 184                                 unsigned long arg);
 185
 186 static void gdth_flush(gdth_ha_str *ha);
 187 static int gdth_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 188 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
 189                                 struct gdth_cmndinfo *cmndinfo);
 190 static void gdth_scsi_done(struct scsi_cmnd *scp);
 191
 192 #ifdef DEBUG_GDTH
 193 static u8   DebugState = DEBUG_GDTH;
 194
 195 #ifdef __SERIAL__
 196 #define MAX_SERBUF 160
 197 static void ser_init(void);
 198 static void ser_puts(char *str);
 199 static void ser_putc(char c);
 200 static int  ser_printk(const char *fmt, ...);
 201 static char strbuf[MAX_SERBUF+1];
 202 #ifdef __COM2__
 203 #define COM_BASE 0x2f8
 204 #else
 205 #define COM_BASE 0x3f8
 206 #endif
 207 static void ser_init()
 208 {
 209     unsigned port=COM_BASE;
 210
 211     outb(0x80,port+3);
 212     outb(0,port+1);
 213     /* 19200 Baud, if 9600: outb(12,port) */
 214     outb(6, port);
 215     outb(3,port+3);
 216     outb(0,port+1);
 217     /*
 218     ser_putc('I');
 219     ser_putc(' ');
 220     */
 221 }
 222
 223 static void ser_puts(char *str)
 224 {
 225     char *ptr;
 226
 227     ser_init();
 228     for (ptr=str;*ptr;++ptr)
 229         ser_putc(*ptr);
 230 }
 231
 232 static void ser_putc(char c)
 233 {
 234     unsigned port=COM_BASE;
 235
 236     while ((inb(port+5) & 0x20)==0);
 237     outb(c,port);
 238     if (c==0x0a)
 239     {
 240         while ((inb(port+5) & 0x20)==0);
 241         outb(0x0d,port);
 242     }
 243 }
 244
 245 static int ser_printk(const char *fmt, ...)
 246 {
 247     va_list args;
 248     int i;
 249
 250     va_start(args,fmt);
 251     i = vsprintf(strbuf,fmt,args);
 252     ser_puts(strbuf);
 253     va_end(args);
 254     return i;
 255 }
 256
 257 #define TRACE(a)    {if (DebugState==1) {ser_printk a;}}
 258 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {ser_printk a;}}
 259 #define TRACE3(a)   {if (DebugState!=0) {ser_printk a;}}
 260
 261 #else /* !__SERIAL__ */
 262 #define TRACE(a)    {if (DebugState==1) {printk a;}}
 263 #define TRACE2(a)   {if (DebugState==1 || DebugState==2) {printk a;}}
 264 #define TRACE3(a)   {if (DebugState!=0) {printk a;}}
 265 #endif
 266
 267 #else /* !DEBUG */
 268 #define TRACE(a)
 269 #define TRACE2(a)
 270 #define TRACE3(a)
 271 #endif
 272
 273 #ifdef GDTH_STATISTICS
 274 static u32 max_rq=0, max_index=0, max_sg=0;
 275 #ifdef INT_COAL
 276 static u32 max_int_coal=0;
 277 #endif
 278 static u32 act_ints=0, act_ios=0, act_stats=0, act_rq=0;
 279 static struct timer_list gdth_timer;
 280 #endif
 281
 282 #define PTR2USHORT(a)   (u16)(unsigned long)(a)
 283 #define GDTOFFSOF(a,b)  (size_t)&(((a*)0)->b)
 284 #define INDEX_OK(i,t)   ((i)<ARRAY_SIZE(t))
 285
 286 #define BUS_L2P(a,b)    ((b)>(a)->virt_bus ? (b-1):(b))
 287
 288 #ifdef CONFIG_ISA
 289 static u8   gdth_drq_tab[4] = {5,6,7,7};            /* DRQ table */
 290 #endif
 291 #if defined(CONFIG_EISA) || defined(CONFIG_ISA)
 292 static u8   gdth_irq_tab[6] = {0,10,11,12,14,0};    /* IRQ table */
 293 #endif
 294 static u8   gdth_polling;                           /* polling if TRUE */
 295 static int      gdth_ctr_count  = 0;                    /* controller count */
 296 static LIST_HEAD(gdth_instances);                       /* controller list */
 297 static u8   gdth_write_through = FALSE;             /* write through */
 298 static gdth_evt_str ebuffer[MAX_EVENTS];                /* event buffer */
 299 static int elastidx;
 300 static int eoldidx;
 301 static int major;
 302
 303 #define DIN     1                               /* IN data direction */
 304 #define DOU     2                               /* OUT data direction */
 305 #define DNO     DIN                             /* no data transfer */
 306 #define DUN     DIN                             /* unknown data direction */
 307 static u8 gdth_direction_tab[0x100] = {
 308     DNO,DNO,DIN,DIN,DOU,DIN,DIN,DOU,DIN,DUN,DOU,DOU,DUN,DUN,DUN,DIN,
 309     DNO,DIN,DIN,DOU,DIN,DOU,DNO,DNO,DOU,DNO,DIN,DNO,DIN,DOU,DNO,DUN,
 310     DIN,DUN,DIN,DUN,DOU,DIN,DUN,DUN,DIN,DIN,DOU,DNO,DUN,DIN,DOU,DOU,
 311     DOU,DOU,DOU,DNO,DIN,DNO,DNO,DIN,DOU,DOU,DOU,DOU,DIN,DOU,DIN,DOU,
 312     DOU,DOU,DIN,DIN,DIN,DNO,DUN,DNO,DNO,DNO,DUN,DNO,DOU,DIN,DUN,DUN,
 313     DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DIN,DUN,DUN,DUN,DUN,DUN,
 314     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 315     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 316     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 317     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DIN,DUN,
 318     DUN,DUN,DUN,DUN,DUN,DNO,DNO,DUN,DIN,DNO,DOU,DUN,DNO,DUN,DOU,DOU,
 319     DOU,DOU,DOU,DNO,DUN,DIN,DOU,DIN,DIN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 320     DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 321     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,
 322     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DOU,DUN,DUN,DUN,DUN,DUN,
 323     DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN,DUN
 324 };
 325
 326 /* LILO and modprobe/insmod parameters */
 327 /* IRQ list for GDT3000/3020 EISA controllers */
 328 static int irq[MAXHA] __initdata =
 329 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 330  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 331 /* disable driver flag */
 332 static int disable __initdata = 0;
 333 /* reserve flag */
 334 static int reserve_mode = 1;
 335 /* reserve list */
 336 static int reserve_list[MAX_RES_ARGS] =
 337 {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 338  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
 339  0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
 340 /* scan order for PCI controllers */
 341 static int reverse_scan = 0;
 342 /* virtual channel for the host drives */
 343 static int hdr_channel = 0;
 344 /* max. IDs per channel */
 345 static int max_ids = MAXID;
 346 /* rescan all IDs */
 347 static int rescan = 0;
 348 /* shared access */
 349 static int shared_access = 1;
 350 /* enable support for EISA and ISA controllers */
 351 static int probe_eisa_isa = 0;
 352 /* 64 bit DMA mode, support for drives > 2 TB, if force_dma32 = 0 */
 353 static int force_dma32 = 0;
 354
 355 /* parameters for modprobe/insmod */
 356 module_param_array(irq, int, NULL, 0);
 357 module_param(disable, int, 0);
 358 module_param(reserve_mode, int, 0);
 359 module_param_array(reserve_list, int, NULL, 0);
 360 module_param(reverse_scan, int, 0);
 361 module_param(hdr_channel, int, 0);
 362 module_param(max_ids, int, 0);
 363 module_param(rescan, int, 0);
 364 module_param(shared_access, int, 0);
 365 module_param(probe_eisa_isa, int, 0);
 366 module_param(force_dma32, int, 0);
 367 MODULE_AUTHOR("Achim Leubner");
 368 MODULE_LICENSE("GPL");
 369
 370 /* ioctl interface */
 371 static const struct file_operations gdth_fops = {
 372     .unlocked_ioctl   = gdth_unlocked_ioctl,
 373     .open    = gdth_open,
 374     .release = gdth_close,
 375     .llseek = noop_llseek,
 376 };
 377
 378 #include "gdth_proc.h"
 379 #include "gdth_proc.c"
 380
 381 static gdth_ha_str *gdth_find_ha(int hanum)
 382 {
 383         gdth_ha_str *ha;
 384
 385         list_for_each_entry(ha, &gdth_instances, list)
 386                 if (hanum == ha->hanum)
 387                         return ha;
 388
 389         return NULL;
 390 }
 391
 392 static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha)
 393 {
 394         struct gdth_cmndinfo *priv = NULL;
 395         unsigned long flags;
 396         int i;
 397
 398         spin_lock_irqsave(&ha->smp_lock, flags);
 399
 400         for (i=0; i<GDTH_MAXCMDS; ++i) {
 401                 if (ha->cmndinfo[i].index == 0) {
 402                         priv = &ha->cmndinfo[i];
 403                         memset(priv, 0, sizeof(*priv));
 404                         priv->index = i+1;
 405                         break;
 406                 }
 407         }
 408
 409         spin_unlock_irqrestore(&ha->smp_lock, flags);
 410
 411         return priv;
 412 }
 413
 414 static void gdth_put_cmndinfo(struct gdth_cmndinfo *priv)
 415 {
 416         BUG_ON(!priv);
 417         priv->index = 0;
 418 }
 419
 420 static void gdth_delay(int milliseconds)
 421 {
 422     if (milliseconds == 0) {
 423         udelay(1);
 424     } else {
 425         mdelay(milliseconds);
 426     }
 427 }
 428
 429 static void gdth_scsi_done(struct scsi_cmnd *scp)
 430 {
 431         struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
 432         int internal_command = cmndinfo->internal_command;
 433
 434         TRACE2(("gdth_scsi_done()\n"));
 435
 436         gdth_put_cmndinfo(cmndinfo);
 437         scp->host_scribble = NULL;
 438
 439         if (internal_command)
 440                 complete((struct completion *)scp->request);
 441         else
 442                 scp->scsi_done(scp);
 443 }
 444
 445 int __gdth_execute(struct scsi_device *sdev, gdth_cmd_str *gdtcmd, char *cmnd,
 446                    int timeout, u32 *info)
 447 {
 448     gdth_ha_str *ha = shost_priv(sdev->host);
 449     Scsi_Cmnd *scp;
 450     struct gdth_cmndinfo cmndinfo;
 451     DECLARE_COMPLETION_ONSTACK(wait);
 452     int rval;
 453
 454     scp = kzalloc(sizeof(*scp), GFP_KERNEL);
 455     if (!scp)
 456         return -ENOMEM;
 457
 458     scp->sense_buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
 459     if (!scp->sense_buffer) {
 460         kfree(scp);
 461         return -ENOMEM;
 462     }
 463
 464     scp->device = sdev;
 465     memset(&cmndinfo, 0, sizeof(cmndinfo));
 466
 467     /* use request field to save the ptr. to completion struct. */
 468     scp->request = (struct request *)&wait;
 469     scp->cmd_len = 12;
 470     scp->cmnd = cmnd;
 471     cmndinfo.priority = IOCTL_PRI;
 472     cmndinfo.internal_cmd_str = gdtcmd;
 473     cmndinfo.internal_command = 1;
 474
 475     TRACE(("__gdth_execute() cmd 0x%x\n", scp->cmnd[0]));
 476     __gdth_queuecommand(ha, scp, &cmndinfo);
 477
 478     wait_for_completion(&wait);
 479
 480     rval = cmndinfo.status;
 481     if (info)
 482         *info = cmndinfo.info;
 483     kfree(scp->sense_buffer);
 484     kfree(scp);
 485     return rval;
 486 }
 487
 488 int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
 489                  int timeout, u32 *info)
 490 {
 491     struct scsi_device *sdev = scsi_get_host_dev(shost);
 492     int rval = __gdth_execute(sdev, gdtcmd, cmnd, timeout, info);
 493
 494     scsi_free_host_dev(sdev);
 495     return rval;
 496 }
 497
 498 static void gdth_eval_mapping(u32 size, u32 *cyls, int *heads, int *secs)
 499 {
 500     *cyls = size /HEADS/SECS;
 501     if (*cyls <= MAXCYLS) {
 502         *heads = HEADS;
 503         *secs = SECS;
 504     } else {                                        /* too high for 64*32 */
 505         *cyls = size /MEDHEADS/MEDSECS;
 506         if (*cyls <= MAXCYLS) {
 507             *heads = MEDHEADS;
 508             *secs = MEDSECS;
 509         } else {                                    /* too high for 127*63 */
 510             *cyls = size /BIGHEADS/BIGSECS;
 511             *heads = BIGHEADS;
 512             *secs = BIGSECS;
 513         }
 514     }
 515 }
 516
 517 /* controller search and initialization functions */
 518 #ifdef CONFIG_EISA
 519 static int __init gdth_search_eisa(u16 eisa_adr)
 520 {
 521     u32 id;
 522
 523     TRACE(("gdth_search_eisa() adr. %x\n",eisa_adr));
 524     id = inl(eisa_adr+ID0REG);
 525     if (id == GDT3A_ID || id == GDT3B_ID) {     /* GDT3000A or GDT3000B */
 526         if ((inb(eisa_adr+EISAREG) & 8) == 0)
 527             return 0;                           /* not EISA configured */
 528         return 1;
 529     }
 530     if (id == GDT3_ID)                          /* GDT3000 */
 531         return 1;
 532
 533     return 0;
 534 }
 535 #endif /* CONFIG_EISA */
 536
 537 #ifdef CONFIG_ISA
 538 static int __init gdth_search_isa(u32 bios_adr)
 539 {
 540     void __iomem *addr;
 541     u32 id;
 542
 543     TRACE(("gdth_search_isa() bios adr. %x\n",bios_adr));
 544     if ((addr = ioremap(bios_adr+BIOS_ID_OFFS, sizeof(u32))) != NULL) {
 545         id = readl(addr);
 546         iounmap(addr);
 547         if (id == GDT2_ID)                          /* GDT2000 */
 548             return 1;
 549     }
 550     return 0;
 551 }
 552 #endif /* CONFIG_ISA */
 553
 554 #ifdef CONFIG_PCI
 555
 556 static bool gdth_search_vortex(u16 device)
 557 {
 558         if (device <= PCI_DEVICE_ID_VORTEX_GDT6555)
 559                 return true;
 560         if (device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP &&
 561             device <= PCI_DEVICE_ID_VORTEX_GDTMAXRP)
 562                 return true;
 563         if (device == PCI_DEVICE_ID_VORTEX_GDTNEWRX ||
 564             device == PCI_DEVICE_ID_VORTEX_GDTNEWRX2)
 565                 return true;
 566         return false;
 567 }
 568
 569 static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out);
 570 static int gdth_pci_init_one(struct pci_dev *pdev,
 571                              const struct pci_device_id *ent);
 572 static void gdth_pci_remove_one(struct pci_dev *pdev);
 573 static void gdth_remove_one(gdth_ha_str *ha);
 574
 575 /* Vortex only makes RAID controllers.
 576  * We do not really want to specify all 550 ids here, so wildcard match.
 577  */
 578 static const struct pci_device_id gdthtable[] = {
 579         { PCI_VDEVICE(VORTEX, PCI_ANY_ID) },
 580         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC) },
 581         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SRC_XSCALE) },
 582         { }     /* terminate list */
 583 };
 584 MODULE_DEVICE_TABLE(pci, gdthtable);
 585
 586 static struct pci_driver gdth_pci_driver = {
 587         .name           = "gdth",
 588         .id_table       = gdthtable,
 589         .probe          = gdth_pci_init_one,
 590         .remove         = gdth_pci_remove_one,
 591 };
 592
 593 static void gdth_pci_remove_one(struct pci_dev *pdev)
 594 {
 595         gdth_ha_str *ha = pci_get_drvdata(pdev);
 596
 597         pci_set_drvdata(pdev, NULL);
 598
 599         list_del(&ha->list);
 600         gdth_remove_one(ha);
 601
 602         pci_disable_device(pdev);
 603 }
 604
 605 static int gdth_pci_init_one(struct pci_dev *pdev,
 606                              const struct pci_device_id *ent)
 607 {
 608         u16 vendor = pdev->vendor;
 609         u16 device = pdev->device;
 610         unsigned long base0, base1, base2;
 611         int rc;
 612         gdth_pci_str gdth_pcistr;
 613         gdth_ha_str *ha = NULL;
 614
 615         TRACE(("gdth_search_dev() cnt %d vendor %x device %x\n",
 616                gdth_ctr_count, vendor, device));
 617
 618         memset(&gdth_pcistr, 0, sizeof(gdth_pcistr));
 619
 620         if (vendor == PCI_VENDOR_ID_VORTEX && !gdth_search_vortex(device))
 621                 return -ENODEV;
 622
 623         rc = pci_enable_device(pdev);
 624         if (rc)
 625                 return rc;
 626
 627         if (gdth_ctr_count >= MAXHA)
 628                 return -EBUSY;
 629
 630         /* GDT PCI controller found, resources are already in pdev */
 631         gdth_pcistr.pdev = pdev;
 632         base0 = pci_resource_flags(pdev, 0);
 633         base1 = pci_resource_flags(pdev, 1);
 634         base2 = pci_resource_flags(pdev, 2);
 635         if (device <= PCI_DEVICE_ID_VORTEX_GDT6000B ||   /* GDT6000/B */
 636             device >= PCI_DEVICE_ID_VORTEX_GDT6x17RP) {  /* MPR */
 637             if (!(base0 & IORESOURCE_MEM))
 638                 return -ENODEV;
 639             gdth_pcistr.dpmem = pci_resource_start(pdev, 0);
 640         } else {                                  /* GDT6110, GDT6120, .. */
 641             if (!(base0 & IORESOURCE_MEM) ||
 642                 !(base2 & IORESOURCE_MEM) ||
 643                 !(base1 & IORESOURCE_IO))
 644                 return -ENODEV;
 645             gdth_pcistr.dpmem = pci_resource_start(pdev, 2);
 646             gdth_pcistr.io    = pci_resource_start(pdev, 1);
 647         }
 648         TRACE2(("Controller found at %d/%d, irq %d, dpmem 0x%lx\n",
 649                 gdth_pcistr.pdev->bus->number,
 650                 PCI_SLOT(gdth_pcistr.pdev->devfn),
 651                 gdth_pcistr.irq,
 652                 gdth_pcistr.dpmem));
 653
 654         rc = gdth_pci_probe_one(&gdth_pcistr, &ha);
 655         if (rc)
 656                 return rc;
 657
 658         return 0;
 659 }
 660 #endif /* CONFIG_PCI */
 661
 662 #ifdef CONFIG_EISA
 663 static int __init gdth_init_eisa(u16 eisa_adr,gdth_ha_str *ha)
 664 {
 665     u32 retries,id;
 666     u8 prot_ver,eisacf,i,irq_found;
 667
 668     TRACE(("gdth_init_eisa() adr. %x\n",eisa_adr));
 669
 670     /* disable board interrupts, deinitialize services */
 671     outb(0xff,eisa_adr+EDOORREG);
 672     outb(0x00,eisa_adr+EDENABREG);
 673     outb(0x00,eisa_adr+EINTENABREG);
 674
 675     outb(0xff,eisa_adr+LDOORREG);
 676     retries = INIT_RETRIES;
 677     gdth_delay(20);
 678     while (inb(eisa_adr+EDOORREG) != 0xff) {
 679         if (--retries == 0) {
 680             printk("GDT-EISA: Initialization error (DEINIT failed)\n");
 681             return 0;
 682         }
 683         gdth_delay(1);
 684         TRACE2(("wait for DEINIT: retries=%d\n",retries));
 685     }
 686     prot_ver = inb(eisa_adr+MAILBOXREG);
 687     outb(0xff,eisa_adr+EDOORREG);
 688     if (prot_ver != PROTOCOL_VERSION) {
 689         printk("GDT-EISA: Illegal protocol version\n");
 690         return 0;
 691     }
 692     ha->bmic = eisa_adr;
 693     ha->brd_phys = (u32)eisa_adr >> 12;
 694
 695     outl(0,eisa_adr+MAILBOXREG);
 696     outl(0,eisa_adr+MAILBOXREG+4);
 697     outl(0,eisa_adr+MAILBOXREG+8);
 698     outl(0,eisa_adr+MAILBOXREG+12);
 699
 700     /* detect IRQ */
 701     if ((id = inl(eisa_adr+ID0REG)) == GDT3_ID) {
 702         ha->oem_id = OEM_ID_ICP;
 703         ha->type = GDT_EISA;
 704         ha->stype = id;
 705         outl(1,eisa_adr+MAILBOXREG+8);
 706         outb(0xfe,eisa_adr+LDOORREG);
 707         retries = INIT_RETRIES;
 708         gdth_delay(20);
 709         while (inb(eisa_adr+EDOORREG) != 0xfe) {
 710             if (--retries == 0) {
 711                 printk("GDT-EISA: Initialization error (get IRQ failed)\n");
 712                 return 0;
 713             }
 714             gdth_delay(1);
 715         }
 716         ha->irq = inb(eisa_adr+MAILBOXREG);
 717         outb(0xff,eisa_adr+EDOORREG);
 718         TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
 719         /* check the result */
 720         if (ha->irq == 0) {
 721                 TRACE2(("Unknown IRQ, use IRQ table from cmd line !\n"));
 722                 for (i = 0, irq_found = FALSE;
 723                      i < MAXHA && irq[i] != 0xff; ++i) {
 724                 if (irq[i]==10 || irq[i]==11 || irq[i]==12 || irq[i]==14) {
 725                     irq_found = TRUE;
 726                     break;
 727                 }
 728                 }
 729             if (irq_found) {
 730                 ha->irq = irq[i];
 731                 irq[i] = 0;
 732                 printk("GDT-EISA: Can not detect controller IRQ,\n");
 733                 printk("Use IRQ setting from command line (IRQ = %d)\n",
 734                        ha->irq);
 735             } else {
 736                 printk("GDT-EISA: Initialization error (unknown IRQ), Enable\n");
 737                 printk("the controller BIOS or use command line parameters\n");
 738                 return 0;
 739             }
 740         }
 741     } else {
 742         eisacf = inb(eisa_adr+EISAREG) & 7;
 743         if (eisacf > 4)                         /* level triggered */
 744             eisacf -= 4;
 745         ha->irq = gdth_irq_tab[eisacf];
 746         ha->oem_id = OEM_ID_ICP;
 747         ha->type = GDT_EISA;
 748         ha->stype = id;
 749     }
 750
 751     ha->dma64_support = 0;
 752     return 1;
 753 }
 754 #endif /* CONFIG_EISA */
 755
 756 #ifdef CONFIG_ISA
 757 static int __init gdth_init_isa(u32 bios_adr,gdth_ha_str *ha)
 758 {
 759     register gdt2_dpram_str __iomem *dp2_ptr;
 760     int i;
 761     u8 irq_drq,prot_ver;
 762     u32 retries;
 763
 764     TRACE(("gdth_init_isa() bios adr. %x\n",bios_adr));
 765
 766     ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
 767     if (ha->brd == NULL) {
 768         printk("GDT-ISA: Initialization error (DPMEM remap error)\n");
 769         return 0;
 770     }
 771     dp2_ptr = ha->brd;
 772     writeb(1, &dp2_ptr->io.memlock); /* switch off write protection */
 773     /* reset interface area */
 774     memset_io(&dp2_ptr->u, 0, sizeof(dp2_ptr->u));
 775     if (readl(&dp2_ptr->u) != 0) {
 776         printk("GDT-ISA: Initialization error (DPMEM write error)\n");
 777         iounmap(ha->brd);
 778         return 0;
 779     }
 780
 781     /* disable board interrupts, read DRQ and IRQ */
 782     writeb(0xff, &dp2_ptr->io.irqdel);
 783     writeb(0x00, &dp2_ptr->io.irqen);
 784     writeb(0x00, &dp2_ptr->u.ic.S_Status);
 785     writeb(0x00, &dp2_ptr->u.ic.Cmd_Index);
 786
 787     irq_drq = readb(&dp2_ptr->io.rq);
 788     for (i=0; i<3; ++i) {
 789         if ((irq_drq & 1)==0)
 790             break;
 791         irq_drq >>= 1;
 792     }
 793     ha->drq = gdth_drq_tab[i];
 794
 795     irq_drq = readb(&dp2_ptr->io.rq) >> 3;
 796     for (i=1; i<5; ++i) {
 797         if ((irq_drq & 1)==0)
 798             break;
 799         irq_drq >>= 1;
 800     }
 801     ha->irq = gdth_irq_tab[i];
 802
 803     /* deinitialize services */
 804     writel(bios_adr, &dp2_ptr->u.ic.S_Info[0]);
 805     writeb(0xff, &dp2_ptr->u.ic.S_Cmd_Indx);
 806     writeb(0, &dp2_ptr->io.event);
 807     retries = INIT_RETRIES;
 808     gdth_delay(20);
 809     while (readb(&dp2_ptr->u.ic.S_Status) != 0xff) {
 810         if (--retries == 0) {
 811             printk("GDT-ISA: Initialization error (DEINIT failed)\n");
 812             iounmap(ha->brd);
 813             return 0;
 814         }
 815         gdth_delay(1);
 816     }
 817     prot_ver = (u8)readl(&dp2_ptr->u.ic.S_Info[0]);
 818     writeb(0, &dp2_ptr->u.ic.Status);
 819     writeb(0xff, &dp2_ptr->io.irqdel);
 820     if (prot_ver != PROTOCOL_VERSION) {
 821         printk("GDT-ISA: Illegal protocol version\n");
 822         iounmap(ha->brd);
 823         return 0;
 824     }
 825
 826     ha->oem_id = OEM_ID_ICP;
 827     ha->type = GDT_ISA;
 828     ha->ic_all_size = sizeof(dp2_ptr->u);
 829     ha->stype= GDT2_ID;
 830     ha->brd_phys = bios_adr >> 4;
 831
 832     /* special request to controller BIOS */
 833     writel(0x00, &dp2_ptr->u.ic.S_Info[0]);
 834     writel(0x00, &dp2_ptr->u.ic.S_Info[1]);
 835     writel(0x01, &dp2_ptr->u.ic.S_Info[2]);
 836     writel(0x00, &dp2_ptr->u.ic.S_Info[3]);
 837     writeb(0xfe, &dp2_ptr->u.ic.S_Cmd_Indx);
 838     writeb(0, &dp2_ptr->io.event);
 839     retries = INIT_RETRIES;
 840     gdth_delay(20);
 841     while (readb(&dp2_ptr->u.ic.S_Status) != 0xfe) {
 842         if (--retries == 0) {
 843             printk("GDT-ISA: Initialization error\n");
 844             iounmap(ha->brd);
 845             return 0;
 846         }
 847         gdth_delay(1);
 848     }
 849     writeb(0, &dp2_ptr->u.ic.Status);
 850     writeb(0xff, &dp2_ptr->io.irqdel);
 851
 852     ha->dma64_support = 0;
 853     return 1;
 854 }
 855 #endif /* CONFIG_ISA */
 856
 857 #ifdef CONFIG_PCI
 858 static int gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr,
 859                          gdth_ha_str *ha)
 860 {
 861     register gdt6_dpram_str __iomem *dp6_ptr;
 862     register gdt6c_dpram_str __iomem *dp6c_ptr;
 863     register gdt6m_dpram_str __iomem *dp6m_ptr;
 864     u32 retries;
 865     u8 prot_ver;
 866     u16 command;
 867     int i, found = FALSE;
 868
 869     TRACE(("gdth_init_pci()\n"));
 870
 871     if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 872         ha->oem_id = OEM_ID_INTEL;
 873     else
 874         ha->oem_id = OEM_ID_ICP;
 875     ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8);
 876     ha->stype = (u32)pdev->device;
 877     ha->irq = pdev->irq;
 878     ha->pdev = pdev;
 879
 880     if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) {  /* GDT6000/B */
 881         TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
 882         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
 883         if (ha->brd == NULL) {
 884             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 885             return 0;
 886         }
 887         /* check and reset interface area */
 888         dp6_ptr = ha->brd;
 889         writel(DPMEM_MAGIC, &dp6_ptr->u);
 890         if (readl(&dp6_ptr->u) != DPMEM_MAGIC) {
 891             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
 892                    pcistr->dpmem);
 893             found = FALSE;
 894             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
 895                 iounmap(ha->brd);
 896                 ha->brd = ioremap(i, sizeof(u16));
 897                 if (ha->brd == NULL) {
 898                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 899                     return 0;
 900                 }
 901                 if (readw(ha->brd) != 0xffff) {
 902                     TRACE2(("init_pci_old() address 0x%x busy\n", i));
 903                     continue;
 904                 }
 905                 iounmap(ha->brd);
 906                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
 907                 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
 908                 if (ha->brd == NULL) {
 909                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 910                     return 0;
 911                 }
 912                 dp6_ptr = ha->brd;
 913                 writel(DPMEM_MAGIC, &dp6_ptr->u);
 914                 if (readl(&dp6_ptr->u) == DPMEM_MAGIC) {
 915                     printk("GDT-PCI: Use free address at 0x%x\n", i);
 916                     found = TRUE;
 917                     break;
 918                 }
 919             }
 920             if (!found) {
 921                 printk("GDT-PCI: No free address found!\n");
 922                 iounmap(ha->brd);
 923                 return 0;
 924             }
 925         }
 926         memset_io(&dp6_ptr->u, 0, sizeof(dp6_ptr->u));
 927         if (readl(&dp6_ptr->u) != 0) {
 928             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
 929             iounmap(ha->brd);
 930             return 0;
 931         }
 932
 933         /* disable board interrupts, deinit services */
 934         writeb(0xff, &dp6_ptr->io.irqdel);
 935         writeb(0x00, &dp6_ptr->io.irqen);
 936         writeb(0x00, &dp6_ptr->u.ic.S_Status);
 937         writeb(0x00, &dp6_ptr->u.ic.Cmd_Index);
 938
 939         writel(pcistr->dpmem, &dp6_ptr->u.ic.S_Info[0]);
 940         writeb(0xff, &dp6_ptr->u.ic.S_Cmd_Indx);
 941         writeb(0, &dp6_ptr->io.event);
 942         retries = INIT_RETRIES;
 943         gdth_delay(20);
 944         while (readb(&dp6_ptr->u.ic.S_Status) != 0xff) {
 945             if (--retries == 0) {
 946                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
 947                 iounmap(ha->brd);
 948                 return 0;
 949             }
 950             gdth_delay(1);
 951         }
 952         prot_ver = (u8)readl(&dp6_ptr->u.ic.S_Info[0]);
 953         writeb(0, &dp6_ptr->u.ic.S_Status);
 954         writeb(0xff, &dp6_ptr->io.irqdel);
 955         if (prot_ver != PROTOCOL_VERSION) {
 956             printk("GDT-PCI: Illegal protocol version\n");
 957             iounmap(ha->brd);
 958             return 0;
 959         }
 960
 961         ha->type = GDT_PCI;
 962         ha->ic_all_size = sizeof(dp6_ptr->u);
 963
 964         /* special command to controller BIOS */
 965         writel(0x00, &dp6_ptr->u.ic.S_Info[0]);
 966         writel(0x00, &dp6_ptr->u.ic.S_Info[1]);
 967         writel(0x00, &dp6_ptr->u.ic.S_Info[2]);
 968         writel(0x00, &dp6_ptr->u.ic.S_Info[3]);
 969         writeb(0xfe, &dp6_ptr->u.ic.S_Cmd_Indx);
 970         writeb(0, &dp6_ptr->io.event);
 971         retries = INIT_RETRIES;
 972         gdth_delay(20);
 973         while (readb(&dp6_ptr->u.ic.S_Status) != 0xfe) {
 974             if (--retries == 0) {
 975                 printk("GDT-PCI: Initialization error\n");
 976                 iounmap(ha->brd);
 977                 return 0;
 978             }
 979             gdth_delay(1);
 980         }
 981         writeb(0, &dp6_ptr->u.ic.S_Status);
 982         writeb(0xff, &dp6_ptr->io.irqdel);
 983
 984         ha->dma64_support = 0;
 985
 986     } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
 987         ha->plx = (gdt6c_plx_regs *)pcistr->io;
 988         TRACE2(("init_pci_new() dpmem %lx irq %d\n",
 989             pcistr->dpmem,ha->irq));
 990         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
 991         if (ha->brd == NULL) {
 992             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
 993             iounmap(ha->brd);
 994             return 0;
 995         }
 996         /* check and reset interface area */
 997         dp6c_ptr = ha->brd;
 998         writel(DPMEM_MAGIC, &dp6c_ptr->u);
 999         if (readl(&dp6c_ptr->u) != DPMEM_MAGIC) {
1000             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1001                    pcistr->dpmem);
1002             found = FALSE;
1003             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1004                 iounmap(ha->brd);
1005                 ha->brd = ioremap(i, sizeof(u16));
1006                 if (ha->brd == NULL) {
1007                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1008                     return 0;
1009                 }
1010                 if (readw(ha->brd) != 0xffff) {
1011                     TRACE2(("init_pci_plx() address 0x%x busy\n", i));
1012                     continue;
1013                 }
1014                 iounmap(ha->brd);
1015                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_2, i);
1016                 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1017                 if (ha->brd == NULL) {
1018                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1019                     return 0;
1020                 }
1021                 dp6c_ptr = ha->brd;
1022                 writel(DPMEM_MAGIC, &dp6c_ptr->u);
1023                 if (readl(&dp6c_ptr->u) == DPMEM_MAGIC) {
1024                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1025                     found = TRUE;
1026                     break;
1027                 }
1028             }
1029             if (!found) {
1030                 printk("GDT-PCI: No free address found!\n");
1031                 iounmap(ha->brd);
1032                 return 0;
1033             }
1034         }
1035         memset_io(&dp6c_ptr->u, 0, sizeof(dp6c_ptr->u));
1036         if (readl(&dp6c_ptr->u) != 0) {
1037             printk("GDT-PCI: Initialization error (DPMEM write error)\n");
1038             iounmap(ha->brd);
1039             return 0;
1040         }
1041
1042         /* disable board interrupts, deinit services */
1043         outb(0x00,PTR2USHORT(&ha->plx->control1));
1044         outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1045
1046         writeb(0x00, &dp6c_ptr->u.ic.S_Status);
1047         writeb(0x00, &dp6c_ptr->u.ic.Cmd_Index);
1048
1049         writel(pcistr->dpmem, &dp6c_ptr->u.ic.S_Info[0]);
1050         writeb(0xff, &dp6c_ptr->u.ic.S_Cmd_Indx);
1051
1052         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1053
1054         retries = INIT_RETRIES;
1055         gdth_delay(20);
1056         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xff) {
1057             if (--retries == 0) {
1058                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1059                 iounmap(ha->brd);
1060                 return 0;
1061             }
1062             gdth_delay(1);
1063         }
1064         prot_ver = (u8)readl(&dp6c_ptr->u.ic.S_Info[0]);
1065         writeb(0, &dp6c_ptr->u.ic.Status);
1066         if (prot_ver != PROTOCOL_VERSION) {
1067             printk("GDT-PCI: Illegal protocol version\n");
1068             iounmap(ha->brd);
1069             return 0;
1070         }
1071
1072         ha->type = GDT_PCINEW;
1073         ha->ic_all_size = sizeof(dp6c_ptr->u);
1074
1075         /* special command to controller BIOS */
1076         writel(0x00, &dp6c_ptr->u.ic.S_Info[0]);
1077         writel(0x00, &dp6c_ptr->u.ic.S_Info[1]);
1078         writel(0x00, &dp6c_ptr->u.ic.S_Info[2]);
1079         writel(0x00, &dp6c_ptr->u.ic.S_Info[3]);
1080         writeb(0xfe, &dp6c_ptr->u.ic.S_Cmd_Indx);
1081
1082         outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1083
1084         retries = INIT_RETRIES;
1085         gdth_delay(20);
1086         while (readb(&dp6c_ptr->u.ic.S_Status) != 0xfe) {
1087             if (--retries == 0) {
1088                 printk("GDT-PCI: Initialization error\n");
1089                 iounmap(ha->brd);
1090                 return 0;
1091             }
1092             gdth_delay(1);
1093         }
1094         writeb(0, &dp6c_ptr->u.ic.S_Status);
1095
1096         ha->dma64_support = 0;
1097
1098     } else {                                            /* MPR */
1099         TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1100         ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1101         if (ha->brd == NULL) {
1102             printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1103             return 0;
1104         }
1105
1106         /* manipulate config. space to enable DPMEM, start RP controller */
1107         pci_read_config_word(pdev, PCI_COMMAND, &command);
1108         command |= 6;
1109         pci_write_config_word(pdev, PCI_COMMAND, command);
1110         if (pci_resource_start(pdev, 8) == 1UL)
1111             pci_resource_start(pdev, 8) = 0UL;
1112         i = 0xFEFF0001UL;
1113         pci_write_config_dword(pdev, PCI_ROM_ADDRESS, i);
1114         gdth_delay(1);
1115         pci_write_config_dword(pdev, PCI_ROM_ADDRESS,
1116                                pci_resource_start(pdev, 8));
1117
1118         dp6m_ptr = ha->brd;
1119
1120         /* Ensure that it is safe to access the non HW portions of DPMEM.
1121          * Aditional check needed for Xscale based RAID controllers */
1122         while( ((int)readb(&dp6m_ptr->i960r.sema0_reg) ) & 3 )
1123             gdth_delay(1);
1124
1125         /* check and reset interface area */
1126         writel(DPMEM_MAGIC, &dp6m_ptr->u);
1127         if (readl(&dp6m_ptr->u) != DPMEM_MAGIC) {
1128             printk("GDT-PCI: Cannot access DPMEM at 0x%lx (shadowed?)\n",
1129                    pcistr->dpmem);
1130             found = FALSE;
1131             for (i = 0xC8000; i < 0xE8000; i += 0x4000) {
1132                 iounmap(ha->brd);
1133                 ha->brd = ioremap(i, sizeof(u16));
1134                 if (ha->brd == NULL) {
1135                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1136                     return 0;
1137                 }
1138                 if (readw(ha->brd) != 0xffff) {
1139                     TRACE2(("init_pci_mpr() address 0x%x busy\n", i));
1140                     continue;
1141                 }
1142                 iounmap(ha->brd);
1143                 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, i);
1144                 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1145                 if (ha->brd == NULL) {
1146                     printk("GDT-PCI: Initialization error (DPMEM remap error)\n");
1147                     return 0;
1148                 }
1149                 dp6m_ptr = ha->brd;
1150                 writel(DPMEM_MAGIC, &dp6m_ptr->u);
1151                 if (readl(&dp6m_ptr->u) == DPMEM_MAGIC) {
1152                     printk("GDT-PCI: Use free address at 0x%x\n", i);
1153                     found = TRUE;
1154                     break;
1155                 }
1156             }
1157             if (!found) {
1158                 printk("GDT-PCI: No free address found!\n");
1159                 iounmap(ha->brd);
1160                 return 0;
1161             }
1162         }
1163         memset_io(&dp6m_ptr->u, 0, sizeof(dp6m_ptr->u));
1164
1165         /* disable board interrupts, deinit services */
1166         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) | 4,
1167                     &dp6m_ptr->i960r.edoor_en_reg);
1168         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1169         writeb(0x00, &dp6m_ptr->u.ic.S_Status);
1170         writeb(0x00, &dp6m_ptr->u.ic.Cmd_Index);
1171
1172         writel(pcistr->dpmem, &dp6m_ptr->u.ic.S_Info[0]);
1173         writeb(0xff, &dp6m_ptr->u.ic.S_Cmd_Indx);
1174         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1175         retries = INIT_RETRIES;
1176         gdth_delay(20);
1177         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xff) {
1178             if (--retries == 0) {
1179                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1180                 iounmap(ha->brd);
1181                 return 0;
1182             }
1183             gdth_delay(1);
1184         }
1185         prot_ver = (u8)readl(&dp6m_ptr->u.ic.S_Info[0]);
1186         writeb(0, &dp6m_ptr->u.ic.S_Status);
1187         if (prot_ver != PROTOCOL_VERSION) {
1188             printk("GDT-PCI: Illegal protocol version\n");
1189             iounmap(ha->brd);
1190             return 0;
1191         }
1192
1193         ha->type = GDT_PCIMPR;
1194         ha->ic_all_size = sizeof(dp6m_ptr->u);
1195
1196         /* special command to controller BIOS */
1197         writel(0x00, &dp6m_ptr->u.ic.S_Info[0]);
1198         writel(0x00, &dp6m_ptr->u.ic.S_Info[1]);
1199         writel(0x00, &dp6m_ptr->u.ic.S_Info[2]);
1200         writel(0x00, &dp6m_ptr->u.ic.S_Info[3]);
1201         writeb(0xfe, &dp6m_ptr->u.ic.S_Cmd_Indx);
1202         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1203         retries = INIT_RETRIES;
1204         gdth_delay(20);
1205         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfe) {
1206             if (--retries == 0) {
1207                 printk("GDT-PCI: Initialization error\n");
1208                 iounmap(ha->brd);
1209                 return 0;
1210             }
1211             gdth_delay(1);
1212         }
1213         writeb(0, &dp6m_ptr->u.ic.S_Status);
1214
1215         /* read FW version to detect 64-bit DMA support */
1216         writeb(0xfd, &dp6m_ptr->u.ic.S_Cmd_Indx);
1217         writeb(1, &dp6m_ptr->i960r.ldoor_reg);
1218         retries = INIT_RETRIES;
1219         gdth_delay(20);
1220         while (readb(&dp6m_ptr->u.ic.S_Status) != 0xfd) {
1221             if (--retries == 0) {
1222                 printk("GDT-PCI: Initialization error (DEINIT failed)\n");
1223                 iounmap(ha->brd);
1224                 return 0;
1225             }
1226             gdth_delay(1);
1227         }
1228         prot_ver = (u8)(readl(&dp6m_ptr->u.ic.S_Info[0]) >> 16);
1229         writeb(0, &dp6m_ptr->u.ic.S_Status);
1230         if (prot_ver < 0x2b)      /* FW < x.43: no 64-bit DMA support */
1231             ha->dma64_support = 0;
1232         else
1233             ha->dma64_support = 1;
1234     }
1235
1236     return 1;
1237 }
1238 #endif /* CONFIG_PCI */
1239
1240 /* controller protocol functions */
1241
1242 static void gdth_enable_int(gdth_ha_str *ha)
1243 {
1244     unsigned long flags;
1245     gdt2_dpram_str __iomem *dp2_ptr;
1246     gdt6_dpram_str __iomem *dp6_ptr;
1247     gdt6m_dpram_str __iomem *dp6m_ptr;
1248
1249     TRACE(("gdth_enable_int() hanum %d\n",ha->hanum));
1250     spin_lock_irqsave(&ha->smp_lock, flags);
1251
1252     if (ha->type == GDT_EISA) {
1253         outb(0xff, ha->bmic + EDOORREG);
1254         outb(0xff, ha->bmic + EDENABREG);
1255         outb(0x01, ha->bmic + EINTENABREG);
1256     } else if (ha->type == GDT_ISA) {
1257         dp2_ptr = ha->brd;
1258         writeb(1, &dp2_ptr->io.irqdel);
1259         writeb(0, &dp2_ptr->u.ic.Cmd_Index);
1260         writeb(1, &dp2_ptr->io.irqen);
1261     } else if (ha->type == GDT_PCI) {
1262         dp6_ptr = ha->brd;
1263         writeb(1, &dp6_ptr->io.irqdel);
1264         writeb(0, &dp6_ptr->u.ic.Cmd_Index);
1265         writeb(1, &dp6_ptr->io.irqen);
1266     } else if (ha->type == GDT_PCINEW) {
1267         outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1268         outb(0x03, PTR2USHORT(&ha->plx->control1));
1269     } else if (ha->type == GDT_PCIMPR) {
1270         dp6m_ptr = ha->brd;
1271         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
1272         writeb(readb(&dp6m_ptr->i960r.edoor_en_reg) & ~4,
1273                     &dp6m_ptr->i960r.edoor_en_reg);
1274     }
1275     spin_unlock_irqrestore(&ha->smp_lock, flags);
1276 }
1277
1278 /* return IStatus if interrupt was from this card else 0 */
1279 static u8 gdth_get_status(gdth_ha_str *ha)
1280 {
1281     u8 IStatus = 0;
1282
1283     TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count));
1284
1285         if (ha->type == GDT_EISA)
1286             IStatus = inb((u16)ha->bmic + EDOORREG);
1287         else if (ha->type == GDT_ISA)
1288             IStatus =
1289                 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1290         else if (ha->type == GDT_PCI)
1291             IStatus =
1292                 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1293         else if (ha->type == GDT_PCINEW)
1294             IStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1295         else if (ha->type == GDT_PCIMPR)
1296             IStatus =
1297                 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1298
1299         return IStatus;
1300 }
1301
1302 static int gdth_test_busy(gdth_ha_str *ha)
1303 {
1304     register int gdtsema0 = 0;
1305
1306     TRACE(("gdth_test_busy() hanum %d\n", ha->hanum));
1307
1308     if (ha->type == GDT_EISA)
1309         gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1310     else if (ha->type == GDT_ISA)
1311         gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1312     else if (ha->type == GDT_PCI)
1313         gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1314     else if (ha->type == GDT_PCINEW)
1315         gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1316     else if (ha->type == GDT_PCIMPR)
1317         gdtsema0 =
1318             (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1319
1320     return (gdtsema0 & 1);
1321 }
1322
1323
1324 static int gdth_get_cmd_index(gdth_ha_str *ha)
1325 {
1326     int i;
1327
1328     TRACE(("gdth_get_cmd_index() hanum %d\n", ha->hanum));
1329
1330     for (i=0; i<GDTH_MAXCMDS; ++i) {
1331         if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1332             ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1333             ha->cmd_tab[i].service = ha->pccb->Service;
1334             ha->pccb->CommandIndex = (u32)i+2;
1335             return (i+2);
1336         }
1337     }
1338     return 0;
1339 }
1340
1341
1342 static void gdth_set_sema0(gdth_ha_str *ha)
1343 {
1344     TRACE(("gdth_set_sema0() hanum %d\n", ha->hanum));
1345
1346     if (ha->type == GDT_EISA) {
1347         outb(1, ha->bmic + SEMA0REG);
1348     } else if (ha->type == GDT_ISA) {
1349         writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1350     } else if (ha->type == GDT_PCI) {
1351         writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1352     } else if (ha->type == GDT_PCINEW) {
1353         outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1354     } else if (ha->type == GDT_PCIMPR) {
1355         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1356     }
1357 }
1358
1359
1360 static void gdth_copy_command(gdth_ha_str *ha)
1361 {
1362     register gdth_cmd_str *cmd_ptr;
1363     register gdt6m_dpram_str __iomem *dp6m_ptr;
1364     register gdt6c_dpram_str __iomem *dp6c_ptr;
1365     gdt6_dpram_str __iomem *dp6_ptr;
1366     gdt2_dpram_str __iomem *dp2_ptr;
1367     u16 cp_count,dp_offset,cmd_no;
1368
1369     TRACE(("gdth_copy_command() hanum %d\n", ha->hanum));
1370
1371     cp_count = ha->cmd_len;
1372     dp_offset= ha->cmd_offs_dpmem;
1373     cmd_no   = ha->cmd_cnt;
1374     cmd_ptr  = ha->pccb;
1375
1376     ++ha->cmd_cnt;
1377     if (ha->type == GDT_EISA)
1378         return;                                 /* no DPMEM, no copy */
1379
1380     /* set cpcount dword aligned */
1381     if (cp_count & 3)
1382         cp_count += (4 - (cp_count & 3));
1383
1384     ha->cmd_offs_dpmem += cp_count;
1385
1386     /* set offset and service, copy command to DPMEM */
1387     if (ha->type == GDT_ISA) {
1388         dp2_ptr = ha->brd;
1389         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1390                     &dp2_ptr->u.ic.comm_queue[cmd_no].offset);
1391         writew((u16)cmd_ptr->Service,
1392                     &dp2_ptr->u.ic.comm_queue[cmd_no].serv_id);
1393         memcpy_toio(&dp2_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1394     } else if (ha->type == GDT_PCI) {
1395         dp6_ptr = ha->brd;
1396         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1397                     &dp6_ptr->u.ic.comm_queue[cmd_no].offset);
1398         writew((u16)cmd_ptr->Service,
1399                     &dp6_ptr->u.ic.comm_queue[cmd_no].serv_id);
1400         memcpy_toio(&dp6_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1401     } else if (ha->type == GDT_PCINEW) {
1402         dp6c_ptr = ha->brd;
1403         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1404                     &dp6c_ptr->u.ic.comm_queue[cmd_no].offset);
1405         writew((u16)cmd_ptr->Service,
1406                     &dp6c_ptr->u.ic.comm_queue[cmd_no].serv_id);
1407         memcpy_toio(&dp6c_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1408     } else if (ha->type == GDT_PCIMPR) {
1409         dp6m_ptr = ha->brd;
1410         writew(dp_offset + DPMEM_COMMAND_OFFSET,
1411                     &dp6m_ptr->u.ic.comm_queue[cmd_no].offset);
1412         writew((u16)cmd_ptr->Service,
1413                     &dp6m_ptr->u.ic.comm_queue[cmd_no].serv_id);
1414         memcpy_toio(&dp6m_ptr->u.ic.gdt_dpr_cmd[dp_offset],cmd_ptr,cp_count);
1415     }
1416 }
1417
1418
1419 static void gdth_release_event(gdth_ha_str *ha)
1420 {
1421     TRACE(("gdth_release_event() hanum %d\n", ha->hanum));
1422
1423 #ifdef GDTH_STATISTICS
1424     {
1425         u32 i,j;
1426         for (i=0,j=0; j<GDTH_MAXCMDS; ++j) {
1427             if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1428                 ++i;
1429         }
1430         if (max_index < i) {
1431             max_index = i;
1432             TRACE3(("GDT: max_index = %d\n",(u16)i));
1433         }
1434     }
1435 #endif
1436
1437     if (ha->pccb->OpCode == GDT_INIT)
1438         ha->pccb->Service |= 0x80;
1439
1440     if (ha->type == GDT_EISA) {
1441         if (ha->pccb->OpCode == GDT_INIT)               /* store DMA buffer */
1442             outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1443         outb(ha->pccb->Service, ha->bmic + LDOORREG);
1444     } else if (ha->type == GDT_ISA) {
1445         writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1446     } else if (ha->type == GDT_PCI) {
1447         writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1448     } else if (ha->type == GDT_PCINEW) {
1449         outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1450     } else if (ha->type == GDT_PCIMPR) {
1451         writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1452     }
1453 }
1454
1455 static int gdth_wait(gdth_ha_str *ha, int index, u32 time)
1456 {
1457     int answer_found = FALSE;
1458     int wait_index = 0;
1459
1460     TRACE(("gdth_wait() hanum %d index %d time %d\n", ha->hanum, index, time));
1461
1462     if (index == 0)
1463         return 1;                               /* no wait required */
1464
1465     do {
1466         __gdth_interrupt(ha, true, &wait_index);
1467         if (wait_index == index) {
1468             answer_found = TRUE;
1469             break;
1470         }
1471         gdth_delay(1);
1472     } while (--time);
1473
1474     while (gdth_test_busy(ha))
1475         gdth_delay(0);
1476
1477     return (answer_found);
1478 }
1479
1480
1481 static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode,
1482                                             u32 p1, u64 p2, u64 p3)
1483 {
1484     register gdth_cmd_str *cmd_ptr;
1485     int retries,index;
1486
1487     TRACE2(("gdth_internal_cmd() service %d opcode %d\n",service,opcode));
1488
1489     cmd_ptr = ha->pccb;
1490     memset((char*)cmd_ptr,0,sizeof(gdth_cmd_str));
1491
1492     /* make command  */
1493     for (retries = INIT_RETRIES;;) {
1494         cmd_ptr->Service          = service;
1495         cmd_ptr->RequestBuffer    = INTERNAL_CMND;
1496         if (!(index=gdth_get_cmd_index(ha))) {
1497             TRACE(("GDT: No free command index found\n"));
1498             return 0;
1499         }
1500         gdth_set_sema0(ha);
1501         cmd_ptr->OpCode           = opcode;
1502         cmd_ptr->BoardNode        = LOCALBOARD;
1503         if (service == CACHESERVICE) {
1504             if (opcode == GDT_IOCTL) {
1505                 cmd_ptr->u.ioctl.subfunc = p1;
1506                 cmd_ptr->u.ioctl.channel = (u32)p2;
1507                 cmd_ptr->u.ioctl.param_size = (u16)p3;
1508                 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1509             } else {
1510                 if (ha->cache_feat & GDT_64BIT) {
1511                     cmd_ptr->u.cache64.DeviceNo = (u16)p1;
1512                     cmd_ptr->u.cache64.BlockNo  = p2;
1513                 } else {
1514                     cmd_ptr->u.cache.DeviceNo = (u16)p1;
1515                     cmd_ptr->u.cache.BlockNo  = (u32)p2;
1516                 }
1517             }
1518         } else if (service == SCSIRAWSERVICE) {
1519             if (ha->raw_feat & GDT_64BIT) {
1520                 cmd_ptr->u.raw64.direction  = p1;
1521                 cmd_ptr->u.raw64.bus        = (u8)p2;
1522                 cmd_ptr->u.raw64.target     = (u8)p3;
1523                 cmd_ptr->u.raw64.lun        = (u8)(p3 >> 8);
1524             } else {
1525                 cmd_ptr->u.raw.direction  = p1;
1526                 cmd_ptr->u.raw.bus        = (u8)p2;
1527                 cmd_ptr->u.raw.target     = (u8)p3;
1528                 cmd_ptr->u.raw.lun        = (u8)(p3 >> 8);
1529             }
1530         } else if (service == SCREENSERVICE) {
1531             if (opcode == GDT_REALTIME) {
1532                 *(u32 *)&cmd_ptr->u.screen.su.data[0] = p1;
1533                 *(u32 *)&cmd_ptr->u.screen.su.data[4] = (u32)p2;
1534                 *(u32 *)&cmd_ptr->u.screen.su.data[8] = (u32)p3;
1535             }
1536         }
1537         ha->cmd_len          = sizeof(gdth_cmd_str);
1538         ha->cmd_offs_dpmem   = 0;
1539         ha->cmd_cnt          = 0;
1540         gdth_copy_command(ha);
1541         gdth_release_event(ha);
1542         gdth_delay(20);
1543         if (!gdth_wait(ha, index, INIT_TIMEOUT)) {
1544             printk("GDT: Initialization error (timeout service %d)\n",service);
1545             return 0;
1546         }
1547         if (ha->status != S_BSY || --retries == 0)
1548             break;
1549         gdth_delay(1);
1550     }
1551
1552     return (ha->status != S_OK ? 0:1);
1553 }
1554
1555
1556 /* search for devices */
1557
1558 static int gdth_search_drives(gdth_ha_str *ha)
1559 {
1560     u16 cdev_cnt, i;
1561     int ok;
1562     u32 bus_no, drv_cnt, drv_no, j;
1563     gdth_getch_str *chn;
1564     gdth_drlist_str *drl;
1565     gdth_iochan_str *ioc;
1566     gdth_raw_iochan_str *iocr;
1567     gdth_arcdl_str *alst;
1568     gdth_alist_str *alst2;
1569     gdth_oem_str_ioctl *oemstr;
1570 #ifdef INT_COAL
1571     gdth_perf_modes *pmod;
1572 #endif
1573
1574 #ifdef GDTH_RTC
1575     u8 rtc[12];
1576     unsigned long flags;
1577 #endif
1578
1579     TRACE(("gdth_search_drives() hanum %d\n", ha->hanum));
1580     ok = 0;
1581
1582     /* initialize controller services, at first: screen service */
1583     ha->screen_feat = 0;
1584     if (!force_dma32) {
1585         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_X_INIT_SCR, 0, 0, 0);
1586         if (ok)
1587             ha->screen_feat = GDT_64BIT;
1588     }
1589     if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1590         ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0);
1591     if (!ok) {
1592         printk("GDT-HA %d: Initialization error screen service (code %d)\n",
1593                ha->hanum, ha->status);
1594         return 0;
1595     }
1596     TRACE2(("gdth_search_drives(): SCREENSERVICE initialized\n"));
1597
1598 #ifdef GDTH_RTC
1599     /* read realtime clock info, send to controller */
1600     /* 1. wait for the falling edge of update flag */
1601     spin_lock_irqsave(&rtc_lock, flags);
1602     for (j = 0; j < 1000000; ++j)
1603         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
1604             break;
1605     for (j = 0; j < 1000000; ++j)
1606         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
1607             break;
1608     /* 2. read info */
1609     do {
1610         for (j = 0; j < 12; ++j)
1611             rtc[j] = CMOS_READ(j);
1612     } while (rtc[0] != CMOS_READ(0));
1613     spin_unlock_irqrestore(&rtc_lock, flags);
1614     TRACE2(("gdth_search_drives(): RTC: %x/%x/%x\n",*(u32 *)&rtc[0],
1615             *(u32 *)&rtc[4], *(u32 *)&rtc[8]));
1616     /* 3. send to controller firmware */
1617     gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(u32 *)&rtc[0],
1618                       *(u32 *)&rtc[4], *(u32 *)&rtc[8]);
1619 #endif
1620
1621     /* unfreeze all IOs */
1622     gdth_internal_cmd(ha, CACHESERVICE, GDT_UNFREEZE_IO, 0, 0, 0);
1623
1624     /* initialize cache service */
1625     ha->cache_feat = 0;
1626     if (!force_dma32) {
1627         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INIT_HOST, LINUX_OS,
1628                                                                          0, 0);
1629         if (ok)
1630             ha->cache_feat = GDT_64BIT;
1631     }
1632     if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1633         ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0);
1634     if (!ok) {
1635         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1636                ha->hanum, ha->status);
1637         return 0;
1638     }
1639     TRACE2(("gdth_search_drives(): CACHESERVICE initialized\n"));
1640     cdev_cnt = (u16)ha->info;
1641     ha->fw_vers = ha->service;
1642
1643 #ifdef INT_COAL
1644     if (ha->type == GDT_PCIMPR) {
1645         /* set perf. modes */
1646         pmod = (gdth_perf_modes *)ha->pscratch;
1647         pmod->version          = 1;
1648         pmod->st_mode          = 1;    /* enable one status buffer */
1649         *((u64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
1650         pmod->st_buff_indx1    = COALINDEX;
1651         pmod->st_buff_addr2    = 0;
1652         pmod->st_buff_u_addr2  = 0;
1653         pmod->st_buff_indx2    = 0;
1654         pmod->st_buff_size     = sizeof(gdth_coal_status) * MAXOFFSETS;
1655         pmod->cmd_mode         = 0;    // disable all cmd buffers
1656         pmod->cmd_buff_addr1   = 0;
1657         pmod->cmd_buff_u_addr1 = 0;
1658         pmod->cmd_buff_indx1   = 0;
1659         pmod->cmd_buff_addr2   = 0;
1660         pmod->cmd_buff_u_addr2 = 0;
1661         pmod->cmd_buff_indx2   = 0;
1662         pmod->cmd_buff_size    = 0;
1663         pmod->reserved1        = 0;
1664         pmod->reserved2        = 0;
1665         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, SET_PERF_MODES,
1666                               INVALID_CHANNEL,sizeof(gdth_perf_modes))) {
1667             printk("GDT-HA %d: Interrupt coalescing activated\n", ha->hanum);
1668         }
1669     }
1670 #endif
1671
1672     /* detect number of buses - try new IOCTL */
1673     iocr = (gdth_raw_iochan_str *)ha->pscratch;
1674     iocr->hdr.version        = 0xffffffff;
1675     iocr->hdr.list_entries   = MAXBUS;
1676     iocr->hdr.first_chan     = 0;
1677     iocr->hdr.last_chan      = MAXBUS-1;
1678     iocr->hdr.list_offset    = GDTOFFSOF(gdth_raw_iochan_str, list[0]);
1679     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_RAW_DESC,
1680                           INVALID_CHANNEL,sizeof(gdth_raw_iochan_str))) {
1681         TRACE2(("IOCHAN_RAW_DESC supported!\n"));
1682         ha->bus_cnt = iocr->hdr.chan_count;
1683         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1684             if (iocr->list[bus_no].proc_id < MAXID)
1685                 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
1686             else
1687                 ha->bus_id[bus_no] = 0xff;
1688         }
1689     } else {
1690         /* old method */
1691         chn = (gdth_getch_str *)ha->pscratch;
1692         for (bus_no = 0; bus_no < MAXBUS; ++bus_no) {
1693             chn->channel_no = bus_no;
1694             if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1695                                    SCSI_CHAN_CNT | L_CTRL_PATTERN,
1696                                    IO_CHANNEL | INVALID_CHANNEL,
1697                                    sizeof(gdth_getch_str))) {
1698                 if (bus_no == 0) {
1699                     printk("GDT-HA %d: Error detecting channel count (0x%x)\n",
1700                            ha->hanum, ha->status);
1701                     return 0;
1702                 }
1703                 break;
1704             }
1705             if (chn->siop_id < MAXID)
1706                 ha->bus_id[bus_no] = chn->siop_id;
1707             else
1708                 ha->bus_id[bus_no] = 0xff;
1709         }
1710         ha->bus_cnt = (u8)bus_no;
1711     }
1712     TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
1713
1714     /* read cache configuration */
1715     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_INFO,
1716                            INVALID_CHANNEL,sizeof(gdth_cinfo_str))) {
1717         printk("GDT-HA %d: Initialization error cache service (code %d)\n",
1718                ha->hanum, ha->status);
1719         return 0;
1720     }
1721     ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
1722     TRACE2(("gdth_search_drives() cinfo: vs %x sta %d str %d dw %d b %d\n",
1723             ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
1724             ha->cpar.write_back,ha->cpar.block_size));
1725
1726     /* read board info and features */
1727     ha->more_proc = FALSE;
1728     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_INFO,
1729                           INVALID_CHANNEL,sizeof(gdth_binfo_str))) {
1730         memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
1731                sizeof(gdth_binfo_str));
1732         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_FEATURES,
1733                               INVALID_CHANNEL,sizeof(gdth_bfeat_str))) {
1734             TRACE2(("BOARD_INFO/BOARD_FEATURES supported\n"));
1735             ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
1736             ha->more_proc = TRUE;
1737         }
1738     } else {
1739         TRACE2(("BOARD_INFO requires firmware >= 1.10/2.08\n"));
1740         strcpy(ha->binfo.type_string, gdth_ctr_name(ha));
1741     }
1742     TRACE2(("Controller name: %s\n",ha->binfo.type_string));
1743
1744     /* read more informations */
1745     if (ha->more_proc) {
1746         /* physical drives, channel addresses */
1747         ioc = (gdth_iochan_str *)ha->pscratch;
1748         ioc->hdr.version        = 0xffffffff;
1749         ioc->hdr.list_entries   = MAXBUS;
1750         ioc->hdr.first_chan     = 0;
1751         ioc->hdr.last_chan      = MAXBUS-1;
1752         ioc->hdr.list_offset    = GDTOFFSOF(gdth_iochan_str, list[0]);
1753         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_DESC,
1754                               INVALID_CHANNEL,sizeof(gdth_iochan_str))) {
1755             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1756                 ha->raw[bus_no].address = ioc->list[bus_no].address;
1757                 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
1758             }
1759         } else {
1760             for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1761                 ha->raw[bus_no].address = IO_CHANNEL;
1762                 ha->raw[bus_no].local_no = bus_no;
1763             }
1764         }
1765         for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
1766             chn = (gdth_getch_str *)ha->pscratch;
1767             chn->channel_no = ha->raw[bus_no].local_no;
1768             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1769                                   SCSI_CHAN_CNT | L_CTRL_PATTERN,
1770                                   ha->raw[bus_no].address | INVALID_CHANNEL,
1771                                   sizeof(gdth_getch_str))) {
1772                 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
1773                 TRACE2(("Channel %d: %d phys. drives\n",
1774                         bus_no,chn->drive_cnt));
1775             }
1776             if (ha->raw[bus_no].pdev_cnt > 0) {
1777                 drl = (gdth_drlist_str *)ha->pscratch;
1778                 drl->sc_no = ha->raw[bus_no].local_no;
1779                 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
1780                 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1781                                       SCSI_DR_LIST | L_CTRL_PATTERN,
1782                                       ha->raw[bus_no].address | INVALID_CHANNEL,
1783                                       sizeof(gdth_drlist_str))) {
1784                     for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
1785                         ha->raw[bus_no].id_list[j] = drl->sc_list[j];
1786                 } else {
1787                     ha->raw[bus_no].pdev_cnt = 0;
1788                 }
1789             }
1790         }
1791
1792         /* logical drives */
1793         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT,
1794                               INVALID_CHANNEL,sizeof(u32))) {
1795             drv_cnt = *(u32 *)ha->pscratch;
1796             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST,
1797                                   INVALID_CHANNEL,drv_cnt * sizeof(u32))) {
1798                 for (j = 0; j < drv_cnt; ++j) {
1799                     drv_no = ((u32 *)ha->pscratch)[j];
1800                     if (drv_no < MAX_LDRIVES) {
1801                         ha->hdr[drv_no].is_logdrv = TRUE;
1802                         TRACE2(("Drive %d is log. drive\n",drv_no));
1803                     }
1804                 }
1805             }
1806             alst = (gdth_arcdl_str *)ha->pscratch;
1807             alst->entries_avail = MAX_LDRIVES;
1808             alst->first_entry = 0;
1809             alst->list_offset = GDTOFFSOF(gdth_arcdl_str, list[0]);
1810             if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1811                                   ARRAY_DRV_LIST2 | LA_CTRL_PATTERN,
1812                                   INVALID_CHANNEL, sizeof(gdth_arcdl_str) +
1813                                   (alst->entries_avail-1) * sizeof(gdth_alist_str))) {
1814                 for (j = 0; j < alst->entries_init; ++j) {
1815                     ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
1816                     ha->hdr[j].is_master = alst->list[j].is_master;
1817                     ha->hdr[j].is_parity = alst->list[j].is_parity;
1818                     ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
1819                     ha->hdr[j].master_no = alst->list[j].cd_handle;
1820                 }
1821             } else if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1822                                          ARRAY_DRV_LIST | LA_CTRL_PATTERN,
1823                                          0, 35 * sizeof(gdth_alist_str))) {
1824                 for (j = 0; j < 35; ++j) {
1825                     alst2 = &((gdth_alist_str *)ha->pscratch)[j];
1826                     ha->hdr[j].is_arraydrv = alst2->is_arrayd;
1827                     ha->hdr[j].is_master = alst2->is_master;
1828                     ha->hdr[j].is_parity = alst2->is_parity;
1829                     ha->hdr[j].is_hotfix = alst2->is_hotfix;
1830                     ha->hdr[j].master_no = alst2->cd_handle;
1831                 }
1832             }
1833         }
1834     }
1835
1836     /* initialize raw service */
1837     ha->raw_feat = 0;
1838     if (!force_dma32) {
1839         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_X_INIT_RAW, 0, 0, 0);
1840         if (ok)
1841             ha->raw_feat = GDT_64BIT;
1842     }
1843     if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC))
1844         ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0);
1845     if (!ok) {
1846         printk("GDT-HA %d: Initialization error raw service (code %d)\n",
1847                ha->hanum, ha->status);
1848         return 0;
1849     }
1850     TRACE2(("gdth_search_drives(): RAWSERVICE initialized\n"));
1851
1852     /* set/get features raw service (scatter/gather) */
1853     if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_SET_FEAT, SCATTER_GATHER,
1854                           0, 0)) {
1855         TRACE2(("gdth_search_drives(): set features RAWSERVICE OK\n"));
1856         if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1857             TRACE2(("gdth_search_dr(): get feat RAWSERVICE %d\n",
1858                     ha->info));
1859             ha->raw_feat |= (u16)ha->info;
1860         }
1861     }
1862
1863     /* set/get features cache service (equal to raw service) */
1864     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_SET_FEAT, 0,
1865                           SCATTER_GATHER,0)) {
1866         TRACE2(("gdth_search_drives(): set features CACHESERVICE OK\n"));
1867         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) {
1868             TRACE2(("gdth_search_dr(): get feat CACHESERV. %d\n",
1869                     ha->info));
1870             ha->cache_feat |= (u16)ha->info;
1871         }
1872     }
1873
1874     /* reserve drives for raw service */
1875     if (reserve_mode != 0) {
1876         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE_ALL,
1877                           reserve_mode == 1 ? 1 : 3, 0, 0);
1878         TRACE2(("gdth_search_drives(): RESERVE_ALL code %d\n",
1879                 ha->status));
1880     }
1881     for (i = 0; i < MAX_RES_ARGS; i += 4) {
1882         if (reserve_list[i] == ha->hanum && reserve_list[i+1] < ha->bus_cnt &&
1883             reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
1884             TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
1885                     reserve_list[i], reserve_list[i+1],
1886                     reserve_list[i+2], reserve_list[i+3]));
1887             if (!gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE, 0,
1888                                    reserve_list[i+1], reserve_list[i+2] |
1889                                    (reserve_list[i+3] << 8))) {
1890                 printk("GDT-HA %d: Error raw service (RESERVE, code %d)\n",
1891                        ha->hanum, ha->status);
1892              }
1893         }
1894     }
1895
1896     /* Determine OEM string using IOCTL */
1897     oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
1898     oemstr->params.ctl_version = 0x01;
1899     oemstr->params.buffer_size = sizeof(oemstr->text);
1900     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL,
1901                           CACHE_READ_OEM_STRING_RECORD,INVALID_CHANNEL,
1902                           sizeof(gdth_oem_str_ioctl))) {
1903         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD OK\n"));
1904         printk("GDT-HA %d: Vendor: %s Name: %s\n",
1905                ha->hanum, oemstr->text.oem_company_name, ha->binfo.type_string);
1906         /* Save the Host Drive inquiry data */
1907         strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
1908                 sizeof(ha->oem_name));
1909     } else {
1910         /* Old method, based on PCI ID */
1911         TRACE2(("gdth_search_drives(): CACHE_READ_OEM_STRING_RECORD failed\n"));
1912         printk("GDT-HA %d: Name: %s\n",
1913                ha->hanum, ha->binfo.type_string);
1914         if (ha->oem_id == OEM_ID_INTEL)
1915             strlcpy(ha->oem_name,"Intel  ", sizeof(ha->oem_name));
1916         else
1917             strlcpy(ha->oem_name,"ICP    ", sizeof(ha->oem_name));
1918     }
1919
1920     /* scanning for host drives */
1921     for (i = 0; i < cdev_cnt; ++i)
1922         gdth_analyse_hdrive(ha, i);
1923
1924     TRACE(("gdth_search_drives() OK\n"));
1925     return 1;
1926 }
1927
1928 static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive)
1929 {
1930     u32 drv_cyls;
1931     int drv_hds, drv_secs;
1932
1933     TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive));
1934     if (hdrive >= MAX_HDRIVES)
1935         return 0;
1936
1937     if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_INFO, hdrive, 0, 0))
1938         return 0;
1939     ha->hdr[hdrive].present = TRUE;
1940     ha->hdr[hdrive].size = ha->info;
1941
1942     /* evaluate mapping (sectors per head, heads per cylinder) */
1943     ha->hdr[hdrive].size &= ~SECS32;
1944     if (ha->info2 == 0) {
1945         gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
1946     } else {
1947         drv_hds = ha->info2 & 0xff;
1948         drv_secs = (ha->info2 >> 8) & 0xff;
1949         drv_cyls = (u32)ha->hdr[hdrive].size / drv_hds / drv_secs;
1950     }
1951     ha->hdr[hdrive].heads = (u8)drv_hds;
1952     ha->hdr[hdrive].secs  = (u8)drv_secs;
1953     /* round size */
1954     ha->hdr[hdrive].size  = drv_cyls * drv_hds * drv_secs;
1955
1956     if (ha->cache_feat & GDT_64BIT) {
1957         if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0)
1958             && ha->info2 != 0) {
1959             ha->hdr[hdrive].size = ((u64)ha->info2 << 32) | ha->info;
1960         }
1961     }
1962     TRACE2(("gdth_search_dr() cdr. %d size %d hds %d scs %d\n",
1963             hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
1964
1965     /* get informations about device */
1966     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) {
1967         TRACE2(("gdth_search_dr() cache drive %d devtype %d\n",
1968                 hdrive,ha->info));
1969         ha->hdr[hdrive].devtype = (u16)ha->info;
1970     }
1971
1972     /* cluster info */
1973     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_CLUST_INFO, hdrive, 0, 0)) {
1974         TRACE2(("gdth_search_dr() cache drive %d cluster info %d\n",
1975                 hdrive,ha->info));
1976         if (!shared_access)
1977             ha->hdr[hdrive].cluster_type = (u8)ha->info;
1978     }
1979
1980     /* R/W attributes */
1981     if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) {
1982         TRACE2(("gdth_search_dr() cache drive %d r/w attrib. %d\n",
1983                 hdrive,ha->info));
1984         ha->hdr[hdrive].rw_attribs = (u8)ha->info;
1985     }
1986
1987     return 1;
1988 }
1989
1990
1991 /* command queueing/sending functions */
1992
1993 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority)
1994 {
1995     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
1996     register Scsi_Cmnd *pscp;
1997     register Scsi_Cmnd *nscp;
1998     unsigned long flags;
1999
2000     TRACE(("gdth_putq() priority %d\n",priority));
2001     spin_lock_irqsave(&ha->smp_lock, flags);
2002
2003     if (!cmndinfo->internal_command)
2004         cmndinfo->priority = priority;
2005
2006     if (ha->req_first==NULL) {
2007         ha->req_first = scp;                    /* queue was empty */
2008         scp->SCp.ptr = NULL;
2009     } else {                                    /* queue not empty */
2010         pscp = ha->req_first;
2011         nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2012         /* priority: 0-highest,..,0xff-lowest */
2013         while (nscp && gdth_cmnd_priv(nscp)->priority <= priority) {
2014             pscp = nscp;
2015             nscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2016         }
2017         pscp->SCp.ptr = (char *)scp;
2018         scp->SCp.ptr  = (char *)nscp;
2019     }
2020     spin_unlock_irqrestore(&ha->smp_lock, flags);
2021
2022 #ifdef GDTH_STATISTICS
2023     flags = 0;
2024     for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2025         ++flags;
2026     if (max_rq < flags) {
2027         max_rq = flags;
2028         TRACE3(("GDT: max_rq = %d\n",(u16)max_rq));
2029     }
2030 #endif
2031 }
2032
2033 static void gdth_next(gdth_ha_str *ha)
2034 {
2035     register Scsi_Cmnd *pscp;
2036     register Scsi_Cmnd *nscp;
2037     u8 b, t, l, firsttime;
2038     u8 this_cmd, next_cmd;
2039     unsigned long flags = 0;
2040     int cmd_index;
2041
2042     TRACE(("gdth_next() hanum %d\n", ha->hanum));
2043     if (!gdth_polling)
2044         spin_lock_irqsave(&ha->smp_lock, flags);
2045
2046     ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2047     this_cmd = firsttime = TRUE;
2048     next_cmd = gdth_polling ? FALSE:TRUE;
2049     cmd_index = 0;
2050
2051     for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2052         struct gdth_cmndinfo *nscp_cmndinfo = gdth_cmnd_priv(nscp);
2053         if (nscp != pscp && nscp != (Scsi_Cmnd *)pscp->SCp.ptr)
2054             pscp = (Scsi_Cmnd *)pscp->SCp.ptr;
2055         if (!nscp_cmndinfo->internal_command) {
2056             b = nscp->device->channel;
2057             t = nscp->device->id;
2058             l = nscp->device->lun;
2059             if (nscp_cmndinfo->priority >= DEFAULT_PRI) {
2060                 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2061                     (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2062                     continue;
2063             }
2064         } else
2065             b = t = l = 0;
2066
2067         if (firsttime) {
2068             if (gdth_test_busy(ha)) {        /* controller busy ? */
2069                 TRACE(("gdth_next() controller %d busy !\n", ha->hanum));
2070                 if (!gdth_polling) {
2071                     spin_unlock_irqrestore(&ha->smp_lock, flags);
2072                     return;
2073                 }
2074                 while (gdth_test_busy(ha))
2075                     gdth_delay(1);
2076             }
2077             firsttime = FALSE;
2078         }
2079
2080         if (!nscp_cmndinfo->internal_command) {
2081         if (nscp_cmndinfo->phase == -1) {
2082             nscp_cmndinfo->phase = CACHESERVICE;           /* default: cache svc. */
2083             if (nscp->cmnd[0] == TEST_UNIT_READY) {
2084                 TRACE2(("TEST_UNIT_READY Bus %d Id %d LUN %d\n",
2085                         b, t, l));
2086                 /* TEST_UNIT_READY -> set scan mode */
2087                 if ((ha->scan_mode & 0x0f) == 0) {
2088                     if (b == 0 && t == 0 && l == 0) {
2089                         ha->scan_mode |= 1;
2090                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2091                     }
2092                 } else if ((ha->scan_mode & 0x0f) == 1) {
2093                     if (b == 0 && ((t == 0 && l == 1) ||
2094                          (t == 1 && l == 0))) {
2095                         nscp_cmndinfo->OpCode = GDT_SCAN_START;
2096                         nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2097                             | SCSIRAWSERVICE;
2098                         ha->scan_mode = 0x12;
2099                         TRACE2(("Scan mode: 0x%x (SCAN_START)\n",
2100                                 ha->scan_mode));
2101                     } else {
2102                         ha->scan_mode &= 0x10;
2103                         TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2104                     }
2105                 } else if (ha->scan_mode == 0x12) {
2106                     if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2107                         nscp_cmndinfo->phase = SCSIRAWSERVICE;
2108                         nscp_cmndinfo->OpCode = GDT_SCAN_END;
2109                         ha->scan_mode &= 0x10;
2110                         TRACE2(("Scan mode: 0x%x (SCAN_END)\n",
2111                                 ha->scan_mode));
2112                     }
2113                 }
2114             }
2115             if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2116                 nscp->cmnd[0] != READ_CAPACITY && nscp->cmnd[0] != MODE_SENSE &&
2117                 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2118                 /* always GDT_CLUST_INFO! */
2119                 nscp_cmndinfo->OpCode = GDT_CLUST_INFO;
2120             }
2121         }
2122         }
2123
2124         if (nscp_cmndinfo->OpCode != -1) {
2125             if ((nscp_cmndinfo->phase & 0xff) == CACHESERVICE) {
2126                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2127                     this_cmd = FALSE;
2128                 next_cmd = FALSE;
2129             } else if ((nscp_cmndinfo->phase & 0xff) == SCSIRAWSERVICE) {
2130                 if (!(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2131                     this_cmd = FALSE;
2132                 next_cmd = FALSE;
2133             } else {
2134                 memset((char*)nscp->sense_buffer,0,16);
2135                 nscp->sense_buffer[0] = 0x70;
2136                 nscp->sense_buffer[2] = NOT_READY;
2137                 nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2138                 if (!nscp_cmndinfo->wait_for_completion)
2139                     nscp_cmndinfo->wait_for_completion++;
2140                 else
2141                     gdth_scsi_done(nscp);
2142             }
2143         } else if (gdth_cmnd_priv(nscp)->internal_command) {
2144             if (!(cmd_index=gdth_special_cmd(ha, nscp)))
2145                 this_cmd = FALSE;
2146             next_cmd = FALSE;
2147         } else if (b != ha->virt_bus) {
2148             if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2149                 !(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b))))
2150                 this_cmd = FALSE;
2151             else
2152                 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2153         } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2154             TRACE2(("Command 0x%x to bus %d id %d lun %d -> IGNORE\n",
2155                     nscp->cmnd[0], b, t, l));
2156             nscp->result = DID_BAD_TARGET << 16;
2157             if (!nscp_cmndinfo->wait_for_completion)
2158                 nscp_cmndinfo->wait_for_completion++;
2159             else
2160                 gdth_scsi_done(nscp);
2161         } else {
2162             switch (nscp->cmnd[0]) {
2163               case TEST_UNIT_READY:
2164               case INQUIRY:
2165               case REQUEST_SENSE:
2166               case READ_CAPACITY:
2167               case VERIFY:
2168               case START_STOP:
2169               case MODE_SENSE:
2170               case SERVICE_ACTION_IN:
2171                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2172                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2173                        nscp->cmnd[4],nscp->cmnd[5]));
2174                 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2175                     /* return UNIT_ATTENTION */
2176                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2177                              nscp->cmnd[0], t));
2178                     ha->hdr[t].media_changed = FALSE;
2179                     memset((char*)nscp->sense_buffer,0,16);
2180                     nscp->sense_buffer[0] = 0x70;
2181                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2182                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2183                     if (!nscp_cmndinfo->wait_for_completion)
2184                         nscp_cmndinfo->wait_for_completion++;
2185                     else
2186                         gdth_scsi_done(nscp);
2187                 } else if (gdth_internal_cache_cmd(ha, nscp))
2188                     gdth_scsi_done(nscp);
2189                 break;
2190
2191               case ALLOW_MEDIUM_REMOVAL:
2192                 TRACE(("cache cmd %x/%x/%x/%x/%x/%x\n",nscp->cmnd[0],
2193                        nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2194                        nscp->cmnd[4],nscp->cmnd[5]));
2195                 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2196                     TRACE(("Prevent r. nonremov. drive->do nothing\n"));
2197                     nscp->result = DID_OK << 16;
2198                     nscp->sense_buffer[0] = 0;
2199                     if (!nscp_cmndinfo->wait_for_completion)
2200                         nscp_cmndinfo->wait_for_completion++;
2201                     else
2202                         gdth_scsi_done(nscp);
2203                 } else {
2204                     nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2205                     TRACE(("Prevent/allow r. %d rem. drive %d\n",
2206                            nscp->cmnd[4],nscp->cmnd[3]));
2207                     if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2208                         this_cmd = FALSE;
2209                 }
2210                 break;
2211
2212               case RESERVE:
2213               case RELEASE:
2214                 TRACE2(("cache cmd %s\n",nscp->cmnd[0] == RESERVE ?
2215                         "RESERVE" : "RELEASE"));
2216                 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2217                     this_cmd = FALSE;
2218                 break;
2219
2220               case READ_6:
2221               case WRITE_6:
2222               case READ_10:
2223               case WRITE_10:
2224               case READ_16:
2225               case WRITE_16:
2226                 if (ha->hdr[t].media_changed) {
2227                     /* return UNIT_ATTENTION */
2228                     TRACE2(("cmd 0x%x target %d: UNIT_ATTENTION\n",
2229                              nscp->cmnd[0], t));
2230                     ha->hdr[t].media_changed = FALSE;
2231                     memset((char*)nscp->sense_buffer,0,16);
2232                     nscp->sense_buffer[0] = 0x70;
2233                     nscp->sense_buffer[2] = UNIT_ATTENTION;
2234                     nscp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
2235                     if (!nscp_cmndinfo->wait_for_completion)
2236                         nscp_cmndinfo->wait_for_completion++;
2237                     else
2238                         gdth_scsi_done(nscp);
2239                 } else if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t)))
2240                     this_cmd = FALSE;
2241                 break;
2242
2243               default:
2244                 TRACE2(("cache cmd %x/%x/%x/%x/%x/%x unknown\n",nscp->cmnd[0],
2245                         nscp->cmnd[1],nscp->cmnd[2],nscp->cmnd[3],
2246                         nscp->cmnd[4],nscp->cmnd[5]));
2247                 printk("GDT-HA %d: Unknown SCSI command 0x%x to cache service !\n",
2248                        ha->hanum, nscp->cmnd[0]);
2249                 nscp->result = DID_ABORT << 16;
2250                 if (!nscp_cmndinfo->wait_for_completion)
2251                     nscp_cmndinfo->wait_for_completion++;
2252                 else
2253                     gdth_scsi_done(nscp);
2254                 break;
2255             }
2256         }
2257
2258         if (!this_cmd)
2259             break;
2260         if (nscp == ha->req_first)
2261             ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2262         else
2263             pscp->SCp.ptr = nscp->SCp.ptr;
2264         if (!next_cmd)
2265             break;
2266     }
2267
2268     if (ha->cmd_cnt > 0) {
2269         gdth_release_event(ha);
2270     }
2271
2272     if (!gdth_polling)
2273         spin_unlock_irqrestore(&ha->smp_lock, flags);
2274
2275     if (gdth_polling && ha->cmd_cnt > 0) {
2276         if (!gdth_wait(ha, cmd_index, POLL_TIMEOUT))
2277             printk("GDT-HA %d: Command %d timed out !\n",
2278                    ha->hanum, cmd_index);
2279     }
2280 }
2281
2282 /*
2283  * gdth_copy_internal_data() - copy to/from a buffer onto a scsi_cmnd's
2284  * buffers, kmap_atomic() as needed.
2285  */
2286 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp,
2287                                     char *buffer, u16 count)
2288 {
2289     u16 cpcount,i, max_sg = scsi_sg_count(scp);
2290     u16 cpsum,cpnow;
2291     struct scatterlist *sl;
2292     char *address;
2293
2294     cpcount = min_t(u16, count, scsi_bufflen(scp));
2295
2296     if (cpcount) {
2297         cpsum=0;
2298         scsi_for_each_sg(scp, sl, max_sg, i) {
2299             unsigned long flags;
2300             cpnow = (u16)sl->length;
2301             TRACE(("copy_internal() now %d sum %d count %d %d\n",
2302                           cpnow, cpsum, cpcount, scsi_bufflen(scp)));
2303             if (cpsum+cpnow > cpcount)
2304                 cpnow = cpcount - cpsum;
2305             cpsum += cpnow;
2306             if (!sg_page(sl)) {
2307                 printk("GDT-HA %d: invalid sc/gt element in gdth_copy_internal_data()\n",
2308                        ha->hanum);
2309                 return;
2310             }
2311             local_irq_save(flags);
2312             address = kmap_atomic(sg_page(sl)) + sl->offset;
2313             memcpy(address, buffer, cpnow);
2314             flush_dcache_page(sg_page(sl));
2315             kunmap_atomic(address);
2316             local_irq_restore(flags);
2317             if (cpsum == cpcount)
2318                 break;
2319             buffer += cpnow;
2320         }
2321     } else if (count) {
2322         printk("GDT-HA %d: SCSI command with no buffers but data transfer expected!\n",
2323                ha->hanum);
2324         WARN_ON(1);
2325     }
2326 }
2327
2328 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2329 {
2330     u8 t;
2331     gdth_inq_data inq;
2332     gdth_rdcap_data rdc;
2333     gdth_sense_data sd;
2334     gdth_modep_data mpd;
2335     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2336
2337     t  = scp->device->id;
2338     TRACE(("gdth_internal_cache_cmd() cmd 0x%x hdrive %d\n",
2339            scp->cmnd[0],t));
2340
2341     scp->result = DID_OK << 16;
2342     scp->sense_buffer[0] = 0;
2343
2344     switch (scp->cmnd[0]) {
2345       case TEST_UNIT_READY:
2346       case VERIFY:
2347       case START_STOP:
2348         TRACE2(("Test/Verify/Start hdrive %d\n",t));
2349         break;
2350
2351       case INQUIRY:
2352         TRACE2(("Inquiry hdrive %d devtype %d\n",
2353                 t,ha->hdr[t].devtype));
2354         inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2355         /* you can here set all disks to removable, if you want to do
2356            a flush using the ALLOW_MEDIUM_REMOVAL command */
2357         inq.modif_rmb = 0x00;
2358         if ((ha->hdr[t].devtype & 1) ||
2359             (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2360             inq.modif_rmb = 0x80;
2361         inq.version   = 2;
2362         inq.resp_aenc = 2;
2363         inq.add_length= 32;
2364         strcpy(inq.vendor,ha->oem_name);
2365         sprintf(inq.product,"Host Drive  #%02d",t);
2366         strcpy(inq.revision,"   ");
2367         gdth_copy_internal_data(ha, scp, (char*)&inq, sizeof(gdth_inq_data));
2368         break;
2369
2370       case REQUEST_SENSE:
2371         TRACE2(("Request sense hdrive %d\n",t));
2372         sd.errorcode = 0x70;
2373         sd.segno     = 0x00;
2374         sd.key       = NO_SENSE;
2375         sd.info      = 0;
2376         sd.add_length= 0;
2377         gdth_copy_internal_data(ha, scp, (char*)&sd, sizeof(gdth_sense_data));
2378         break;
2379
2380       case MODE_SENSE:
2381         TRACE2(("Mode sense hdrive %d\n",t));
2382         memset((char*)&mpd,0,sizeof(gdth_modep_data));
2383         mpd.hd.data_length = sizeof(gdth_modep_data);
2384         mpd.hd.dev_par     = (ha->hdr[t].devtype&2) ? 0x80:0;
2385         mpd.hd.bd_length   = sizeof(mpd.bd);
2386         mpd.bd.block_length[0] = (SECTOR_SIZE & 0x00ff0000) >> 16;
2387         mpd.bd.block_length[1] = (SECTOR_SIZE & 0x0000ff00) >> 8;
2388         mpd.bd.block_length[2] = (SECTOR_SIZE & 0x000000ff);
2389         gdth_copy_internal_data(ha, scp, (char*)&mpd, sizeof(gdth_modep_data));
2390         break;
2391
2392       case READ_CAPACITY:
2393         TRACE2(("Read capacity hdrive %d\n",t));
2394         if (ha->hdr[t].size > (u64)0xffffffff)
2395             rdc.last_block_no = 0xffffffff;
2396         else
2397             rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2398         rdc.block_length  = cpu_to_be32(SECTOR_SIZE);
2399         gdth_copy_internal_data(ha, scp, (char*)&rdc, sizeof(gdth_rdcap_data));
2400         break;
2401
2402       case SERVICE_ACTION_IN:
2403         if ((scp->cmnd[1] & 0x1f) == SAI_READ_CAPACITY_16 &&
2404             (ha->cache_feat & GDT_64BIT)) {
2405             gdth_rdcap16_data rdc16;
2406
2407             TRACE2(("Read capacity (16) hdrive %d\n",t));
2408             rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2409             rdc16.block_length  = cpu_to_be32(SECTOR_SIZE);
2410             gdth_copy_internal_data(ha, scp, (char*)&rdc16,
2411                                                  sizeof(gdth_rdcap16_data));
2412         } else {
2413             scp->result = DID_ABORT << 16;
2414         }
2415         break;
2416
2417       default:
2418         TRACE2(("Internal cache cmd 0x%x unknown\n",scp->cmnd[0]));
2419         break;
2420     }
2421
2422     if (!cmndinfo->wait_for_completion)
2423         cmndinfo->wait_for_completion++;
2424     else
2425         return 1;
2426
2427     return 0;
2428 }
2429
2430 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u16 hdrive)
2431 {
2432     register gdth_cmd_str *cmdp;
2433     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2434     u32 cnt, blockcnt;
2435     u64 no, blockno;
2436     int i, cmd_index, read_write, sgcnt, mode64;
2437
2438     cmdp = ha->pccb;
2439     TRACE(("gdth_fill_cache_cmd() cmd 0x%x cmdsize %d hdrive %d\n",
2440                  scp->cmnd[0],scp->cmd_len,hdrive));
2441
2442     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2443         return 0;
2444
2445     mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2446     /* test for READ_16, WRITE_16 if !mode64 ? ---
2447        not required, should not occur due to error return on
2448        READ_CAPACITY_16 */
2449
2450     cmdp->Service = CACHESERVICE;
2451     cmdp->RequestBuffer = scp;
2452     /* search free command index */
2453     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2454         TRACE(("GDT: No free command index found\n"));
2455         return 0;
2456     }
2457     /* if it's the first command, set command semaphore */
2458     if (ha->cmd_cnt == 0)
2459         gdth_set_sema0(ha);
2460
2461     /* fill command */
2462     read_write = 0;
2463     if (cmndinfo->OpCode != -1)
2464         cmdp->OpCode = cmndinfo->OpCode;   /* special cache cmd. */
2465     else if (scp->cmnd[0] == RESERVE)
2466         cmdp->OpCode = GDT_RESERVE_DRV;
2467     else if (scp->cmnd[0] == RELEASE)
2468         cmdp->OpCode = GDT_RELEASE_DRV;
2469     else if (scp->cmnd[0] == ALLOW_MEDIUM_REMOVAL) {
2470         if (scp->cmnd[4] & 1)                   /* prevent ? */
2471             cmdp->OpCode = GDT_MOUNT;
2472         else if (scp->cmnd[3] & 1)              /* removable drive ? */
2473             cmdp->OpCode = GDT_UNMOUNT;
2474         else
2475             cmdp->OpCode = GDT_FLUSH;
2476     } else if (scp->cmnd[0] == WRITE_6 || scp->cmnd[0] == WRITE_10 ||
2477                scp->cmnd[0] == WRITE_12 || scp->cmnd[0] == WRITE_16
2478     ) {
2479         read_write = 1;
2480         if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2481                                    (ha->cache_feat & GDT_WR_THROUGH)))
2482             cmdp->OpCode = GDT_WRITE_THR;
2483         else
2484             cmdp->OpCode = GDT_WRITE;
2485     } else {
2486         read_write = 2;
2487         cmdp->OpCode = GDT_READ;
2488     }
2489
2490     cmdp->BoardNode = LOCALBOARD;
2491     if (mode64) {
2492         cmdp->u.cache64.DeviceNo = hdrive;
2493         cmdp->u.cache64.BlockNo  = 1;
2494         cmdp->u.cache64.sg_canz  = 0;
2495     } else {
2496         cmdp->u.cache.DeviceNo = hdrive;
2497         cmdp->u.cache.BlockNo  = 1;
2498         cmdp->u.cache.sg_canz  = 0;
2499     }
2500
2501     if (read_write) {
2502         if (scp->cmd_len == 16) {
2503             memcpy(&no, &scp->cmnd[2], sizeof(u64));
2504             blockno = be64_to_cpu(no);
2505             memcpy(&cnt, &scp->cmnd[10], sizeof(u32));
2506             blockcnt = be32_to_cpu(cnt);
2507         } else if (scp->cmd_len == 10) {
2508             memcpy(&no, &scp->cmnd[2], sizeof(u32));
2509             blockno = be32_to_cpu(no);
2510             memcpy(&cnt, &scp->cmnd[7], sizeof(u16));
2511             blockcnt = be16_to_cpu(cnt);
2512         } else {
2513             memcpy(&no, &scp->cmnd[0], sizeof(u32));
2514             blockno = be32_to_cpu(no) & 0x001fffffUL;
2515             blockcnt= scp->cmnd[4]==0 ? 0x100 : scp->cmnd[4];
2516         }
2517         if (mode64) {
2518             cmdp->u.cache64.BlockNo = blockno;
2519             cmdp->u.cache64.BlockCnt = blockcnt;
2520         } else {
2521             cmdp->u.cache.BlockNo = (u32)blockno;
2522             cmdp->u.cache.BlockCnt = blockcnt;
2523         }
2524
2525         if (scsi_bufflen(scp)) {
2526             cmndinfo->dma_dir = (read_write == 1 ?
2527                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
2528             sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
2529                                cmndinfo->dma_dir);
2530             if (mode64) {
2531                 struct scatterlist *sl;
2532
2533                 cmdp->u.cache64.DestAddr= (u64)-1;
2534                 cmdp->u.cache64.sg_canz = sgcnt;
2535                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2536                     cmdp->u.cache64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2537 #ifdef GDTH_DMA_STATISTICS
2538                     if (cmdp->u.cache64.sg_lst[i].sg_ptr > (u64)0xffffffff)
2539                         ha->dma64_cnt++;
2540                     else
2541                         ha->dma32_cnt++;
2542 #endif
2543                     cmdp->u.cache64.sg_lst[i].sg_len = sg_dma_len(sl);
2544                 }
2545             } else {
2546                 struct scatterlist *sl;
2547
2548                 cmdp->u.cache.DestAddr= 0xffffffff;
2549                 cmdp->u.cache.sg_canz = sgcnt;
2550                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2551                     cmdp->u.cache.sg_lst[i].sg_ptr = sg_dma_address(sl);
2552 #ifdef GDTH_DMA_STATISTICS
2553                     ha->dma32_cnt++;
2554 #endif
2555                     cmdp->u.cache.sg_lst[i].sg_len = sg_dma_len(sl);
2556                 }
2557             }
2558
2559 #ifdef GDTH_STATISTICS
2560             if (max_sg < (u32)sgcnt) {
2561                 max_sg = (u32)sgcnt;
2562                 TRACE3(("GDT: max_sg = %d\n",max_sg));
2563             }
2564 #endif
2565
2566         }
2567     }
2568     /* evaluate command size, check space */
2569     if (mode64) {
2570         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2571                cmdp->u.cache64.DestAddr,cmdp->u.cache64.sg_canz,
2572                cmdp->u.cache64.sg_lst[0].sg_ptr,
2573                cmdp->u.cache64.sg_lst[0].sg_len));
2574         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2575                cmdp->OpCode,cmdp->u.cache64.BlockNo,cmdp->u.cache64.BlockCnt));
2576         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2577             (u16)cmdp->u.cache64.sg_canz * sizeof(gdth_sg64_str);
2578     } else {
2579         TRACE(("cache cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2580                cmdp->u.cache.DestAddr,cmdp->u.cache.sg_canz,
2581                cmdp->u.cache.sg_lst[0].sg_ptr,
2582                cmdp->u.cache.sg_lst[0].sg_len));
2583         TRACE(("cache cmd: cmd %d blockno. %d, blockcnt %d\n",
2584                cmdp->OpCode,cmdp->u.cache.BlockNo,cmdp->u.cache.BlockCnt));
2585         ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
2586             (u16)cmdp->u.cache.sg_canz * sizeof(gdth_sg_str);
2587     }
2588     if (ha->cmd_len & 3)
2589         ha->cmd_len += (4 - (ha->cmd_len & 3));
2590
2591     if (ha->cmd_cnt > 0) {
2592         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2593             ha->ic_all_size) {
2594             TRACE2(("gdth_fill_cache() DPMEM overflow\n"));
2595             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2596             return 0;
2597         }
2598     }
2599
2600     /* copy command */
2601     gdth_copy_command(ha);
2602     return cmd_index;
2603 }
2604
2605 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b)
2606 {
2607     register gdth_cmd_str *cmdp;
2608     u16 i;
2609     dma_addr_t sense_paddr;
2610     int cmd_index, sgcnt, mode64;
2611     u8 t,l;
2612     struct page *page;
2613     unsigned long offset;
2614     struct gdth_cmndinfo *cmndinfo;
2615
2616     t = scp->device->id;
2617     l = scp->device->lun;
2618     cmdp = ha->pccb;
2619     TRACE(("gdth_fill_raw_cmd() cmd 0x%x bus %d ID %d LUN %d\n",
2620            scp->cmnd[0],b,t,l));
2621
2622     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2623         return 0;
2624
2625     mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
2626
2627     cmdp->Service = SCSIRAWSERVICE;
2628     cmdp->RequestBuffer = scp;
2629     /* search free command index */
2630     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2631         TRACE(("GDT: No free command index found\n"));
2632         return 0;
2633     }
2634     /* if it's the first command, set command semaphore */
2635     if (ha->cmd_cnt == 0)
2636         gdth_set_sema0(ha);
2637
2638     cmndinfo = gdth_cmnd_priv(scp);
2639     /* fill command */
2640     if (cmndinfo->OpCode != -1) {
2641         cmdp->OpCode           = cmndinfo->OpCode; /* special raw cmd. */
2642         cmdp->BoardNode        = LOCALBOARD;
2643         if (mode64) {
2644             cmdp->u.raw64.direction = (cmndinfo->phase >> 8);
2645             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2646                     cmdp->OpCode, cmdp->u.raw64.direction));
2647             /* evaluate command size */
2648             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
2649         } else {
2650             cmdp->u.raw.direction  = (cmndinfo->phase >> 8);
2651             TRACE2(("special raw cmd 0x%x param 0x%x\n",
2652                     cmdp->OpCode, cmdp->u.raw.direction));
2653             /* evaluate command size */
2654             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
2655         }
2656
2657     } else {
2658         page = virt_to_page(scp->sense_buffer);
2659         offset = (unsigned long)scp->sense_buffer & ~PAGE_MASK;
2660         sense_paddr = pci_map_page(ha->pdev,page,offset,
2661                                    16,PCI_DMA_FROMDEVICE);
2662
2663         cmndinfo->sense_paddr  = sense_paddr;
2664         cmdp->OpCode           = GDT_WRITE;             /* always */
2665         cmdp->BoardNode        = LOCALBOARD;
2666         if (mode64) {
2667             cmdp->u.raw64.reserved   = 0;
2668             cmdp->u.raw64.mdisc_time = 0;
2669             cmdp->u.raw64.mcon_time  = 0;
2670             cmdp->u.raw64.clen       = scp->cmd_len;
2671             cmdp->u.raw64.target     = t;
2672             cmdp->u.raw64.lun        = l;
2673             cmdp->u.raw64.bus        = b;
2674             cmdp->u.raw64.priority   = 0;
2675             cmdp->u.raw64.sdlen      = scsi_bufflen(scp);
2676             cmdp->u.raw64.sense_len  = 16;
2677             cmdp->u.raw64.sense_data = sense_paddr;
2678             cmdp->u.raw64.direction  =
2679                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2680             memcpy(cmdp->u.raw64.cmd,scp->cmnd,16);
2681             cmdp->u.raw64.sg_ranz    = 0;
2682         } else {
2683             cmdp->u.raw.reserved   = 0;
2684             cmdp->u.raw.mdisc_time = 0;
2685             cmdp->u.raw.mcon_time  = 0;
2686             cmdp->u.raw.clen       = scp->cmd_len;
2687             cmdp->u.raw.target     = t;
2688             cmdp->u.raw.lun        = l;
2689             cmdp->u.raw.bus        = b;
2690             cmdp->u.raw.priority   = 0;
2691             cmdp->u.raw.link_p     = 0;
2692             cmdp->u.raw.sdlen      = scsi_bufflen(scp);
2693             cmdp->u.raw.sense_len  = 16;
2694             cmdp->u.raw.sense_data = sense_paddr;
2695             cmdp->u.raw.direction  =
2696                 gdth_direction_tab[scp->cmnd[0]]==DOU ? GDTH_DATA_OUT:GDTH_DATA_IN;
2697             memcpy(cmdp->u.raw.cmd,scp->cmnd,12);
2698             cmdp->u.raw.sg_ranz    = 0;
2699         }
2700
2701         if (scsi_bufflen(scp)) {
2702             cmndinfo->dma_dir = PCI_DMA_BIDIRECTIONAL;
2703             sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
2704                                cmndinfo->dma_dir);
2705             if (mode64) {
2706                 struct scatterlist *sl;
2707
2708                 cmdp->u.raw64.sdata = (u64)-1;
2709                 cmdp->u.raw64.sg_ranz = sgcnt;
2710                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2711                     cmdp->u.raw64.sg_lst[i].sg_ptr = sg_dma_address(sl);
2712 #ifdef GDTH_DMA_STATISTICS
2713                     if (cmdp->u.raw64.sg_lst[i].sg_ptr > (u64)0xffffffff)
2714                         ha->dma64_cnt++;
2715                     else
2716                         ha->dma32_cnt++;
2717 #endif
2718                     cmdp->u.raw64.sg_lst[i].sg_len = sg_dma_len(sl);
2719                 }
2720             } else {
2721                 struct scatterlist *sl;
2722
2723                 cmdp->u.raw.sdata = 0xffffffff;
2724                 cmdp->u.raw.sg_ranz = sgcnt;
2725                 scsi_for_each_sg(scp, sl, sgcnt, i) {
2726                     cmdp->u.raw.sg_lst[i].sg_ptr = sg_dma_address(sl);
2727 #ifdef GDTH_DMA_STATISTICS
2728                     ha->dma32_cnt++;
2729 #endif
2730                     cmdp->u.raw.sg_lst[i].sg_len = sg_dma_len(sl);
2731                 }
2732             }
2733
2734 #ifdef GDTH_STATISTICS
2735             if (max_sg < sgcnt) {
2736                 max_sg = sgcnt;
2737                 TRACE3(("GDT: max_sg = %d\n",sgcnt));
2738             }
2739 #endif
2740
2741         }
2742         if (mode64) {
2743             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2744                    cmdp->u.raw64.sdata,cmdp->u.raw64.sg_ranz,
2745                    cmdp->u.raw64.sg_lst[0].sg_ptr,
2746                    cmdp->u.raw64.sg_lst[0].sg_len));
2747             /* evaluate command size */
2748             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
2749                 (u16)cmdp->u.raw64.sg_ranz * sizeof(gdth_sg64_str);
2750         } else {
2751             TRACE(("raw cmd: addr. %x sganz %x sgptr0 %x sglen0 %x\n",
2752                    cmdp->u.raw.sdata,cmdp->u.raw.sg_ranz,
2753                    cmdp->u.raw.sg_lst[0].sg_ptr,
2754                    cmdp->u.raw.sg_lst[0].sg_len));
2755             /* evaluate command size */
2756             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
2757                 (u16)cmdp->u.raw.sg_ranz * sizeof(gdth_sg_str);
2758         }
2759     }
2760     /* check space */
2761     if (ha->cmd_len & 3)
2762         ha->cmd_len += (4 - (ha->cmd_len & 3));
2763
2764     if (ha->cmd_cnt > 0) {
2765         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2766             ha->ic_all_size) {
2767             TRACE2(("gdth_fill_raw() DPMEM overflow\n"));
2768             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2769             return 0;
2770         }
2771     }
2772
2773     /* copy command */
2774     gdth_copy_command(ha);
2775     return cmd_index;
2776 }
2777
2778 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp)
2779 {
2780     register gdth_cmd_str *cmdp;
2781     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
2782     int cmd_index;
2783
2784     cmdp= ha->pccb;
2785     TRACE2(("gdth_special_cmd(): "));
2786
2787     if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2788         return 0;
2789
2790     *cmdp = *cmndinfo->internal_cmd_str;
2791     cmdp->RequestBuffer = scp;
2792
2793     /* search free command index */
2794     if (!(cmd_index=gdth_get_cmd_index(ha))) {
2795         TRACE(("GDT: No free command index found\n"));
2796         return 0;
2797     }
2798
2799     /* if it's the first command, set command semaphore */
2800     if (ha->cmd_cnt == 0)
2801        gdth_set_sema0(ha);
2802
2803     /* evaluate command size, check space */
2804     if (cmdp->OpCode == GDT_IOCTL) {
2805         TRACE2(("IOCTL\n"));
2806         ha->cmd_len =
2807             GDTOFFSOF(gdth_cmd_str,u.ioctl.p_param) + sizeof(u64);
2808     } else if (cmdp->Service == CACHESERVICE) {
2809         TRACE2(("cache command %d\n",cmdp->OpCode));
2810         if (ha->cache_feat & GDT_64BIT)
2811             ha->cmd_len =
2812                 GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + sizeof(gdth_sg64_str);
2813         else
2814             ha->cmd_len =
2815                 GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + sizeof(gdth_sg_str);
2816     } else if (cmdp->Service == SCSIRAWSERVICE) {
2817         TRACE2(("raw command %d\n",cmdp->OpCode));
2818         if (ha->raw_feat & GDT_64BIT)
2819             ha->cmd_len =
2820                 GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + sizeof(gdth_sg64_str);
2821         else
2822             ha->cmd_len =
2823                 GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + sizeof(gdth_sg_str);
2824     }
2825
2826     if (ha->cmd_len & 3)
2827         ha->cmd_len += (4 - (ha->cmd_len & 3));
2828
2829     if (ha->cmd_cnt > 0) {
2830         if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
2831             ha->ic_all_size) {
2832             TRACE2(("gdth_special_cmd() DPMEM overflow\n"));
2833             ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
2834             return 0;
2835         }
2836     }
2837
2838     /* copy command */
2839     gdth_copy_command(ha);
2840     return cmd_index;
2841 }
2842
2843
2844 /* Controller event handling functions */
2845 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
2846                                       u16 idx, gdth_evt_data *evt)
2847 {
2848     gdth_evt_str *e;
2849     struct timeval tv;
2850
2851     /* no GDTH_LOCK_HA() ! */
2852     TRACE2(("gdth_store_event() source %d idx %d\n", source, idx));
2853     if (source == 0)                        /* no source -> no event */
2854         return NULL;
2855
2856     if (ebuffer[elastidx].event_source == source &&
2857         ebuffer[elastidx].event_idx == idx &&
2858         ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
2859             !memcmp((char *)&ebuffer[elastidx].event_data.eu,
2860             (char *)&evt->eu, evt->size)) ||
2861         (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
2862             !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
2863             (char *)&evt->event_string)))) {
2864         e = &ebuffer[elastidx];
2865         do_gettimeofday(&tv);
2866         e->last_stamp = tv.tv_sec;
2867         ++e->same_count;
2868     } else {
2869         if (ebuffer[elastidx].event_source != 0) {  /* entry not free ? */
2870             ++elastidx;
2871             if (elastidx == MAX_EVENTS)
2872                 elastidx = 0;
2873             if (elastidx == eoldidx) {              /* reached mark ? */
2874                 ++eoldidx;
2875                 if (eoldidx == MAX_EVENTS)
2876                     eoldidx = 0;
2877             }
2878         }
2879         e = &ebuffer[elastidx];
2880         e->event_source = source;
2881         e->event_idx = idx;
2882         do_gettimeofday(&tv);
2883         e->first_stamp = e->last_stamp = tv.tv_sec;
2884         e->same_count = 1;
2885         e->event_data = *evt;
2886         e->application = 0;
2887     }
2888     return e;
2889 }
2890
2891 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2892 {
2893     gdth_evt_str *e;
2894     int eindex;
2895     unsigned long flags;
2896
2897     TRACE2(("gdth_read_event() handle %d\n", handle));
2898     spin_lock_irqsave(&ha->smp_lock, flags);
2899     if (handle == -1)
2900         eindex = eoldidx;
2901     else
2902         eindex = handle;
2903     estr->event_source = 0;
2904
2905     if (eindex < 0 || eindex >= MAX_EVENTS) {
2906         spin_unlock_irqrestore(&ha->smp_lock, flags);
2907         return eindex;
2908     }
2909     e = &ebuffer[eindex];
2910     if (e->event_source != 0) {
2911         if (eindex != elastidx) {
2912             if (++eindex == MAX_EVENTS)
2913                 eindex = 0;
2914         } else {
2915             eindex = -1;
2916         }
2917         memcpy(estr, e, sizeof(gdth_evt_str));
2918     }
2919     spin_unlock_irqrestore(&ha->smp_lock, flags);
2920     return eindex;
2921 }
2922
2923 static void gdth_readapp_event(gdth_ha_str *ha,
2924                                u8 application, gdth_evt_str *estr)
2925 {
2926     gdth_evt_str *e;
2927     int eindex;
2928     unsigned long flags;
2929     u8 found = FALSE;
2930
2931     TRACE2(("gdth_readapp_event() app. %d\n", application));
2932     spin_lock_irqsave(&ha->smp_lock, flags);
2933     eindex = eoldidx;
2934     for (;;) {
2935         e = &ebuffer[eindex];
2936         if (e->event_source == 0)
2937             break;
2938         if ((e->application & application) == 0) {
2939             e->application |= application;
2940             found = TRUE;
2941             break;
2942         }
2943         if (eindex == elastidx)
2944             break;
2945         if (++eindex == MAX_EVENTS)
2946             eindex = 0;
2947     }
2948     if (found)
2949         memcpy(estr, e, sizeof(gdth_evt_str));
2950     else
2951         estr->event_source = 0;
2952     spin_unlock_irqrestore(&ha->smp_lock, flags);
2953 }
2954
2955 static void gdth_clear_events(void)
2956 {
2957     TRACE(("gdth_clear_events()"));
2958
2959     eoldidx = elastidx = 0;
2960     ebuffer[0].event_source = 0;
2961 }
2962
2963
2964 /* SCSI interface functions */
2965
2966 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
2967                                     int gdth_from_wait, int* pIndex)
2968 {
2969     gdt6m_dpram_str __iomem *dp6m_ptr = NULL;
2970     gdt6_dpram_str __iomem *dp6_ptr;
2971     gdt2_dpram_str __iomem *dp2_ptr;
2972     Scsi_Cmnd *scp;
2973     int rval, i;
2974     u8 IStatus;
2975     u16 Service;
2976     unsigned long flags = 0;
2977 #ifdef INT_COAL
2978     int coalesced = FALSE;
2979     int next = FALSE;
2980     gdth_coal_status *pcs = NULL;
2981     int act_int_coal = 0;
2982 #endif
2983
2984     TRACE(("gdth_interrupt() IRQ %d\n", ha->irq));
2985
2986     /* if polling and not from gdth_wait() -> return */
2987     if (gdth_polling) {
2988         if (!gdth_from_wait) {
2989             return IRQ_HANDLED;
2990         }
2991     }
2992
2993     if (!gdth_polling)
2994         spin_lock_irqsave(&ha->smp_lock, flags);
2995
2996     /* search controller */
2997     IStatus = gdth_get_status(ha);
2998     if (IStatus == 0) {
2999         /* spurious interrupt */
3000         if (!gdth_polling)
3001             spin_unlock_irqrestore(&ha->smp_lock, flags);
3002         return IRQ_HANDLED;
3003     }
3004
3005 #ifdef GDTH_STATISTICS
3006     ++act_ints;
3007 #endif
3008
3009 #ifdef INT_COAL
3010     /* See if the fw is returning coalesced status */
3011     if (IStatus == COALINDEX) {
3012         /* Coalesced status.  Setup the initial status
3013            buffer pointer and flags */
3014         pcs = ha->coal_stat;
3015         coalesced = TRUE;
3016         next = TRUE;
3017     }
3018
3019     do {
3020         if (coalesced) {
3021             /* For coalesced requests all status
3022                information is found in the status buffer */
3023             IStatus = (u8)(pcs->status & 0xff);
3024         }
3025 #endif
3026
3027         if (ha->type == GDT_EISA) {
3028             if (IStatus & 0x80) {                       /* error flag */
3029                 IStatus &= ~0x80;
3030                 ha->status = inw(ha->bmic + MAILBOXREG+8);
3031                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3032             } else                                      /* no error */
3033                 ha->status = S_OK;
3034             ha->info = inl(ha->bmic + MAILBOXREG+12);
3035             ha->service = inw(ha->bmic + MAILBOXREG+10);
3036             ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3037
3038             outb(0xff, ha->bmic + EDOORREG);    /* acknowledge interrupt */
3039             outb(0x00, ha->bmic + SEMA1REG);    /* reset status semaphore */
3040         } else if (ha->type == GDT_ISA) {
3041             dp2_ptr = ha->brd;
3042             if (IStatus & 0x80) {                       /* error flag */
3043                 IStatus &= ~0x80;
3044                 ha->status = readw(&dp2_ptr->u.ic.Status);
3045                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3046             } else                                      /* no error */
3047                 ha->status = S_OK;
3048             ha->info = readl(&dp2_ptr->u.ic.Info[0]);
3049             ha->service = readw(&dp2_ptr->u.ic.Service);
3050             ha->info2 = readl(&dp2_ptr->u.ic.Info[1]);
3051
3052             writeb(0xff, &dp2_ptr->io.irqdel); /* acknowledge interrupt */
3053             writeb(0, &dp2_ptr->u.ic.Cmd_Index);/* reset command index */
3054             writeb(0, &dp2_ptr->io.Sema1);     /* reset status semaphore */
3055         } else if (ha->type == GDT_PCI) {
3056             dp6_ptr = ha->brd;
3057             if (IStatus & 0x80) {                       /* error flag */
3058                 IStatus &= ~0x80;
3059                 ha->status = readw(&dp6_ptr->u.ic.Status);
3060                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3061             } else                                      /* no error */
3062                 ha->status = S_OK;
3063             ha->info = readl(&dp6_ptr->u.ic.Info[0]);
3064             ha->service = readw(&dp6_ptr->u.ic.Service);
3065             ha->info2 = readl(&dp6_ptr->u.ic.Info[1]);
3066
3067             writeb(0xff, &dp6_ptr->io.irqdel); /* acknowledge interrupt */
3068             writeb(0, &dp6_ptr->u.ic.Cmd_Index);/* reset command index */
3069             writeb(0, &dp6_ptr->io.Sema1);     /* reset status semaphore */
3070         } else if (ha->type == GDT_PCINEW) {
3071             if (IStatus & 0x80) {                       /* error flag */
3072                 IStatus &= ~0x80;
3073                 ha->status = inw(PTR2USHORT(&ha->plx->status));
3074                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3075             } else
3076                 ha->status = S_OK;
3077             ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3078             ha->service = inw(PTR2USHORT(&ha->plx->service));
3079             ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3080
3081             outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3082             outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3083         } else if (ha->type == GDT_PCIMPR) {
3084             dp6m_ptr = ha->brd;
3085             if (IStatus & 0x80) {                       /* error flag */
3086                 IStatus &= ~0x80;
3087 #ifdef INT_COAL
3088                 if (coalesced)
3089                     ha->status = pcs->ext_status & 0xffff;
3090                 else
3091 #endif
3092                     ha->status = readw(&dp6m_ptr->i960r.status);
3093                 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3094             } else                                      /* no error */
3095                 ha->status = S_OK;
3096 #ifdef INT_COAL
3097             /* get information */
3098             if (coalesced) {
3099                 ha->info = pcs->info0;
3100                 ha->info2 = pcs->info1;
3101                 ha->service = (pcs->ext_status >> 16) & 0xffff;
3102             } else
3103 #endif
3104             {
3105                 ha->info = readl(&dp6m_ptr->i960r.info[0]);
3106                 ha->service = readw(&dp6m_ptr->i960r.service);
3107                 ha->info2 = readl(&dp6m_ptr->i960r.info[1]);
3108             }
3109             /* event string */
3110             if (IStatus == ASYNCINDEX) {
3111                 if (ha->service != SCREENSERVICE &&
3112                     (ha->fw_vers & 0xff) >= 0x1a) {
3113                     ha->dvr.severity = readb
3114                         (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3115                     for (i = 0; i < 256; ++i) {
3116                         ha->dvr.event_string[i] = readb
3117                             (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3118                         if (ha->dvr.event_string[i] == 0)
3119                             break;
3120                     }
3121                 }
3122             }
3123 #ifdef INT_COAL
3124             /* Make sure that non coalesced interrupts get cleared
3125                before being handled by gdth_async_event/gdth_sync_event */
3126             if (!coalesced)
3127 #endif
3128             {
3129                 writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3130                 writeb(0, &dp6m_ptr->i960r.sema1_reg);
3131             }
3132         } else {
3133             TRACE2(("gdth_interrupt() unknown controller type\n"));
3134             if (!gdth_polling)
3135                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3136             return IRQ_HANDLED;
3137         }
3138
3139         TRACE(("gdth_interrupt() index %d stat %d info %d\n",
3140                IStatus,ha->status,ha->info));
3141
3142         if (gdth_from_wait) {
3143             *pIndex = (int)IStatus;
3144         }
3145
3146         if (IStatus == ASYNCINDEX) {
3147             TRACE2(("gdth_interrupt() async. event\n"));
3148             gdth_async_event(ha);
3149             if (!gdth_polling)
3150                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3151             gdth_next(ha);
3152             return IRQ_HANDLED;
3153         }
3154
3155         if (IStatus == SPEZINDEX) {
3156             TRACE2(("Service unknown or not initialized !\n"));
3157             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3158             ha->dvr.eu.driver.ionode = ha->hanum;
3159             gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3160             if (!gdth_polling)
3161                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3162             return IRQ_HANDLED;
3163         }
3164         scp     = ha->cmd_tab[IStatus-2].cmnd;
3165         Service = ha->cmd_tab[IStatus-2].service;
3166         ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3167         if (scp == UNUSED_CMND) {
3168             TRACE2(("gdth_interrupt() index to unused command (%d)\n",IStatus));
3169             ha->dvr.size = sizeof(ha->dvr.eu.driver);
3170             ha->dvr.eu.driver.ionode = ha->hanum;
3171             ha->dvr.eu.driver.index = IStatus;
3172             gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3173             if (!gdth_polling)
3174                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3175             return IRQ_HANDLED;
3176         }
3177         if (scp == INTERNAL_CMND) {
3178             TRACE(("gdth_interrupt() answer to internal command\n"));
3179             if (!gdth_polling)
3180                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3181             return IRQ_HANDLED;
3182         }
3183
3184         TRACE(("gdth_interrupt() sync. status\n"));
3185         rval = gdth_sync_event(ha,Service,IStatus,scp);
3186         if (!gdth_polling)
3187             spin_unlock_irqrestore(&ha->smp_lock, flags);
3188         if (rval == 2) {
3189             gdth_putq(ha, scp, gdth_cmnd_priv(scp)->priority);
3190         } else if (rval == 1) {
3191             gdth_scsi_done(scp);
3192         }
3193
3194 #ifdef INT_COAL
3195         if (coalesced) {
3196             /* go to the next status in the status buffer */
3197             ++pcs;
3198 #ifdef GDTH_STATISTICS
3199             ++act_int_coal;
3200             if (act_int_coal > max_int_coal) {
3201                 max_int_coal = act_int_coal;
3202                 printk("GDT: max_int_coal = %d\n",(u16)max_int_coal);
3203             }
3204 #endif
3205             /* see if there is another status */
3206             if (pcs->status == 0)
3207                 /* Stop the coalesce loop */
3208                 next = FALSE;
3209         }
3210     } while (next);
3211
3212     /* coalescing only for new GDT_PCIMPR controllers available */
3213     if (ha->type == GDT_PCIMPR && coalesced) {
3214         writeb(0xff, &dp6m_ptr->i960r.edoor_reg);
3215         writeb(0, &dp6m_ptr->i960r.sema1_reg);
3216     }
3217 #endif
3218
3219     gdth_next(ha);
3220     return IRQ_HANDLED;
3221 }
3222
3223 static irqreturn_t gdth_interrupt(int irq, void *dev_id)
3224 {
3225         gdth_ha_str *ha = dev_id;
3226
3227         return __gdth_interrupt(ha, false, NULL);
3228 }
3229
3230 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
3231                                                               Scsi_Cmnd *scp)
3232 {
3233     gdth_msg_str *msg;
3234     gdth_cmd_str *cmdp;
3235     u8 b, t;
3236     struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3237
3238     cmdp = ha->pccb;
3239     TRACE(("gdth_sync_event() serv %d status %d\n",
3240            service,ha->status));
3241
3242     if (service == SCREENSERVICE) {
3243         msg  = ha->pmsg;
3244         TRACE(("len: %d, answer: %d, ext: %d, alen: %d\n",
3245                msg->msg_len,msg->msg_answer,msg->msg_ext,msg->msg_alen));
3246         if (msg->msg_len > MSGLEN+1)
3247             msg->msg_len = MSGLEN+1;
3248         if (msg->msg_len)
3249             if (!(msg->msg_answer && msg->msg_ext)) {
3250                 msg->msg_text[msg->msg_len] = '\0';
3251                 printk("%s",msg->msg_text);
3252             }
3253
3254         if (msg->msg_ext && !msg->msg_answer) {
3255             while (gdth_test_busy(ha))
3256                 gdth_delay(0);
3257             cmdp->Service       = SCREENSERVICE;
3258             cmdp->RequestBuffer = SCREEN_CMND;
3259             gdth_get_cmd_index(ha);
3260             gdth_set_sema0(ha);
3261             cmdp->OpCode        = GDT_READ;
3262             cmdp->BoardNode     = LOCALBOARD;
3263             cmdp->u.screen.reserved  = 0;
3264             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3265             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3266             ha->cmd_offs_dpmem = 0;
3267             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3268                 + sizeof(u64);
3269             ha->cmd_cnt = 0;
3270             gdth_copy_command(ha);
3271             gdth_release_event(ha);
3272             return 0;
3273         }
3274
3275         if (msg->msg_answer && msg->msg_alen) {
3276             /* default answers (getchar() not possible) */
3277             if (msg->msg_alen == 1) {
3278                 msg->msg_alen = 0;
3279                 msg->msg_len = 1;
3280                 msg->msg_text[0] = 0;
3281             } else {
3282                 msg->msg_alen -= 2;
3283                 msg->msg_len = 2;
3284                 msg->msg_text[0] = 1;
3285                 msg->msg_text[1] = 0;
3286             }
3287             msg->msg_ext    = 0;
3288             msg->msg_answer = 0;
3289             while (gdth_test_busy(ha))
3290                 gdth_delay(0);
3291             cmdp->Service       = SCREENSERVICE;
3292             cmdp->RequestBuffer = SCREEN_CMND;
3293             gdth_get_cmd_index(ha);
3294             gdth_set_sema0(ha);
3295             cmdp->OpCode        = GDT_WRITE;
3296             cmdp->BoardNode     = LOCALBOARD;
3297             cmdp->u.screen.reserved  = 0;
3298             cmdp->u.screen.su.msg.msg_handle= msg->msg_handle;
3299             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3300             ha->cmd_offs_dpmem = 0;
3301             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3302                 + sizeof(u64);
3303             ha->cmd_cnt = 0;
3304             gdth_copy_command(ha);
3305             gdth_release_event(ha);
3306             return 0;
3307         }
3308         printk("\n");
3309
3310     } else {
3311         b = scp->device->channel;
3312         t = scp->device->id;
3313         if (cmndinfo->OpCode == -1 && b != ha->virt_bus) {
3314             ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3315         }
3316         /* cache or raw service */
3317         if (ha->status == S_BSY) {
3318             TRACE2(("Controller busy -> retry !\n"));
3319             if (cmndinfo->OpCode == GDT_MOUNT)
3320                 cmndinfo->OpCode = GDT_CLUST_INFO;
3321             /* retry */
3322             return 2;
3323         }
3324         if (scsi_bufflen(scp))
3325             pci_unmap_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp),
3326                          cmndinfo->dma_dir);
3327
3328         if (cmndinfo->sense_paddr)
3329             pci_unmap_page(ha->pdev, cmndinfo->sense_paddr, 16,
3330                                                            PCI_DMA_FROMDEVICE);
3331
3332         if (ha->status == S_OK) {
3333             cmndinfo->status = S_OK;
3334             cmndinfo->info = ha->info;
3335             if (cmndinfo->OpCode != -1) {
3336                 TRACE2(("gdth_sync_event(): special cmd 0x%x OK\n",
3337                         cmndinfo->OpCode));
3338                 /* special commands GDT_CLUST_INFO/GDT_MOUNT ? */
3339                 if (cmndinfo->OpCode == GDT_CLUST_INFO) {
3340                     ha->hdr[t].cluster_type = (u8)ha->info;
3341                     if (!(ha->hdr[t].cluster_type &
3342                         CLUSTER_MOUNTED)) {
3343                         /* NOT MOUNTED -> MOUNT */
3344                         cmndinfo->OpCode = GDT_MOUNT;
3345                         if (ha->hdr[t].cluster_type &
3346                             CLUSTER_RESERVED) {
3347                             /* cluster drive RESERVED (on the other node) */
3348                             cmndinfo->phase = -2;      /* reservation conflict */
3349                         }
3350                     } else {
3351                         cmndinfo->OpCode = -1;
3352                     }
3353                 } else {
3354                     if (cmndinfo->OpCode == GDT_MOUNT) {
3355                         ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3356                         ha->hdr[t].media_changed = TRUE;
3357                     } else if (cmndinfo->OpCode == GDT_UNMOUNT) {
3358                         ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3359                         ha->hdr[t].media_changed = TRUE;
3360                     }
3361                     cmndinfo->OpCode = -1;
3362                 }
3363                 /* retry */
3364                 cmndinfo->priority = HIGH_PRI;
3365                 return 2;
3366             } else {
3367                 /* RESERVE/RELEASE ? */
3368                 if (scp->cmnd[0] == RESERVE) {
3369                     ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3370                 } else if (scp->cmnd[0] == RELEASE) {
3371                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3372                 }
3373                 scp->result = DID_OK << 16;
3374                 scp->sense_buffer[0] = 0;
3375             }
3376         } else {
3377             cmndinfo->status = ha->status;
3378             cmndinfo->info = ha->info;
3379
3380             if (cmndinfo->OpCode != -1) {
3381                 TRACE2(("gdth_sync_event(): special cmd 0x%x error 0x%x\n",
3382                         cmndinfo->OpCode, ha->status));
3383                 if (cmndinfo->OpCode == GDT_SCAN_START ||
3384                     cmndinfo->OpCode == GDT_SCAN_END) {
3385                     cmndinfo->OpCode = -1;
3386                     /* retry */
3387                     cmndinfo->priority = HIGH_PRI;
3388                     return 2;
3389                 }
3390                 memset((char*)scp->sense_buffer,0,16);
3391                 scp->sense_buffer[0] = 0x70;
3392                 scp->sense_buffer[2] = NOT_READY;
3393                 scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3394             } else if (service == CACHESERVICE) {
3395                 if (ha->status == S_CACHE_UNKNOWN &&
3396                     (ha->hdr[t].cluster_type &
3397                      CLUSTER_RESERVE_STATE) == CLUSTER_RESERVE_STATE) {
3398                     /* bus reset -> force GDT_CLUST_INFO */
3399                     ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3400                 }
3401                 memset((char*)scp->sense_buffer,0,16);
3402                 if (ha->status == (u16)S_CACHE_RESERV) {
3403                     scp->result = (DID_OK << 16) | (RESERVATION_CONFLICT << 1);
3404                 } else {
3405                     scp->sense_buffer[0] = 0x70;
3406                     scp->sense_buffer[2] = NOT_READY;
3407                     scp->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
3408                 }
3409                 if (!cmndinfo->internal_command) {
3410                     ha->dvr.size = sizeof(ha->dvr.eu.sync);
3411                     ha->dvr.eu.sync.ionode  = ha->hanum;
3412                     ha->dvr.eu.sync.service = service;
3413                     ha->dvr.eu.sync.status  = ha->status;
3414                     ha->dvr.eu.sync.info    = ha->info;
3415                     ha->dvr.eu.sync.hostdrive = t;
3416                     if (ha->status >= 0x8000)
3417                         gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3418                     else
3419                         gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3420                 }
3421             } else {
3422                 /* sense buffer filled from controller firmware (DMA) */
3423                 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3424                     scp->result = DID_BAD_TARGET << 16;
3425                 } else {
3426                     scp->result = (DID_OK << 16) | ha->info;
3427                 }
3428             }
3429         }
3430         if (!cmndinfo->wait_for_completion)
3431             cmndinfo->wait_for_completion++;
3432         else
3433             return 1;
3434     }
3435
3436     return 0;
3437 }
3438
3439 static char *async_cache_tab[] = {
3440 /* 0*/  "\011\000\002\002\002\004\002\006\004"
3441         "GDT HA %u, service %u, async. status %u/%lu unknown",
3442 /* 1*/  "\011\000\002\002\002\004\002\006\004"
3443         "GDT HA %u, service %u, async. status %u/%lu unknown",
3444 /* 2*/  "\005\000\002\006\004"
3445         "GDT HA %u, Host Drive %lu not ready",
3446 /* 3*/  "\005\000\002\006\004"
3447         "GDT HA %u, Host Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3448 /* 4*/  "\005\000\002\006\004"
3449         "GDT HA %u, mirror update on Host Drive %lu failed",
3450 /* 5*/  "\005\000\002\006\004"
3451         "GDT HA %u, Mirror Drive %lu failed",
3452 /* 6*/  "\005\000\002\006\004"
3453         "GDT HA %u, Mirror Drive %lu: REASSIGN not successful and/or data error on reassigned blocks. Drive may crash in the future and should be replaced",
3454 /* 7*/  "\005\000\002\006\004"
3455         "GDT HA %u, Host Drive %lu write protected",
3456 /* 8*/  "\005\000\002\006\004"
3457         "GDT HA %u, media changed in Host Drive %lu",
3458 /* 9*/  "\005\000\002\006\004"
3459         "GDT HA %u, Host Drive %lu is offline",
3460 /*10*/  "\005\000\002\006\004"
3461         "GDT HA %u, media change of Mirror Drive %lu",
3462 /*11*/  "\005\000\002\006\004"
3463         "GDT HA %u, Mirror Drive %lu is write protected",
3464 /*12*/  "\005\000\002\006\004"
3465         "GDT HA %u, general error on Host Drive %lu. Please check the devices of this drive!",
3466 /*13*/  "\007\000\002\006\002\010\002"
3467         "GDT HA %u, Array Drive %u: Cache Drive %u failed",
3468 /*14*/  "\005\000\002\006\002"
3469         "GDT HA %u, Array Drive %u: FAIL state entered",
3470 /*15*/  "\005\000\002\006\002"
3471         "GDT HA %u, Array Drive %u: error",
3472 /*16*/  "\007\000\002\006\002\010\002"
3473         "GDT HA %u, Array Drive %u: failed drive replaced by Cache Drive %u",
3474 /*17*/  "\005\000\002\006\002"
3475         "GDT HA %u, Array Drive %u: parity build failed",
3476 /*18*/  "\005\000\002\006\002"
3477         "GDT HA %u, Array Drive %u: drive rebuild failed",
3478 /*19*/  "\005\000\002\010\002"
3479         "GDT HA %u, Test of Hot Fix %u failed",
3480 /*20*/  "\005\000\002\006\002"
3481         "GDT HA %u, Array Drive %u: drive build finished successfully",
3482 /*21*/  "\005\000\002\006\002"
3483         "GDT HA %u, Array Drive %u: drive rebuild finished successfully",
3484 /*22*/  "\007\000\002\006\002\010\002"
3485         "GDT HA %u, Array Drive %u: Hot Fix %u activated",
3486 /*23*/  "\005\000\002\006\002"
3487         "GDT HA %u, Host Drive %u: processing of i/o aborted due to serious drive error",
3488 /*24*/  "\005\000\002\010\002"
3489         "GDT HA %u, mirror update on Cache Drive %u completed",
3490 /*25*/  "\005\000\002\010\002"
3491         "GDT HA %u, mirror update on Cache Drive %lu failed",
3492 /*26*/  "\005\000\002\006\002"
3493         "GDT HA %u, Array Drive %u: drive rebuild started",
3494 /*27*/  "\005\000\002\012\001"
3495         "GDT HA %u, Fault bus %u: SHELF OK detected",
3496 /*28*/  "\005\000\002\012\001"
3497         "GDT HA %u, Fault bus %u: SHELF not OK detected",
3498 /*29*/  "\007\000\002\012\001\013\001"
3499         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug started",
3500 /*30*/  "\007\000\002\012\001\013\001"
3501         "GDT HA %u, Fault bus %u, ID %u: new disk detected",
3502 /*31*/  "\007\000\002\012\001\013\001"
3503         "GDT HA %u, Fault bus %u, ID %u: old disk detected",
3504 /*32*/  "\007\000\002\012\001\013\001"
3505         "GDT HA %u, Fault bus %u, ID %u: plugging an active disk is invalid",
3506 /*33*/  "\007\000\002\012\001\013\001"
3507         "GDT HA %u, Fault bus %u, ID %u: invalid device detected",
3508 /*34*/  "\011\000\002\012\001\013\001\006\004"
3509         "GDT HA %u, Fault bus %u, ID %u: insufficient disk capacity (%lu MB required)",
3510 /*35*/  "\007\000\002\012\001\013\001"
3511         "GDT HA %u, Fault bus %u, ID %u: disk write protected",
3512 /*36*/  "\007\000\002\012\001\013\001"
3513         "GDT HA %u, Fault bus %u, ID %u: disk not available",
3514 /*37*/  "\007\000\002\012\001\006\004"
3515         "GDT HA %u, Fault bus %u: swap detected (%lu)",
3516 /*38*/  "\007\000\002\012\001\013\001"
3517         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug finished successfully",
3518 /*39*/  "\007\000\002\012\001\013\001"
3519         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted due to user Hot Plug",
3520 /*40*/  "\007\000\002\012\001\013\001"
3521         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug aborted",
3522 /*41*/  "\007\000\002\012\001\013\001"
3523         "GDT HA %u, Fault bus %u, ID %u: Auto Hot Plug for Hot Fix started",
3524 /*42*/  "\005\000\002\006\002"
3525         "GDT HA %u, Array Drive %u: drive build started",
3526 /*43*/  "\003\000\002"
3527         "GDT HA %u, DRAM parity error detected",
3528 /*44*/  "\005\000\002\006\002"
3529         "GDT HA %u, Mirror Drive %u: update started",
3530 /*45*/  "\007\000\002\006\002\010\002"
3531         "GDT HA %u, Mirror Drive %u: Hot Fix %u activated",
3532 /*46*/  "\005\000\002\006\002"
3533         "GDT HA %u, Array Drive %u: no matching Pool Hot Fix Drive available",
3534 /*47*/  "\005\000\002\006\002"
3535         "GDT HA %u, Array Drive %u: Pool Hot Fix Drive available",
3536 /*48*/  "\005\000\002\006\002"
3537         "GDT HA %u, Mirror Drive %u: no matching Pool Hot Fix Drive available",
3538 /*49*/  "\005\000\002\006\002"
3539         "GDT HA %u, Mirror Drive %u: Pool Hot Fix Drive available",
3540 /*50*/  "\007\000\002\012\001\013\001"
3541         "GDT HA %u, SCSI bus %u, ID %u: IGNORE_WIDE_RESIDUE message received",
3542 /*51*/  "\005\000\002\006\002"
3543         "GDT HA %u, Array Drive %u: expand started",
3544 /*52*/  "\005\000\002\006\002"
3545         "GDT HA %u, Array Drive %u: expand finished successfully",
3546 /*53*/  "\005\000\002\006\002"
3547         "GDT HA %u, Array Drive %u: expand failed",
3548 /*54*/  "\003\000\002"
3549         "GDT HA %u, CPU temperature critical",
3550 /*55*/  "\003\000\002"
3551         "GDT HA %u, CPU temperature OK",
3552 /*56*/  "\005\000\002\006\004"
3553         "GDT HA %u, Host drive %lu created",
3554 /*57*/  "\005\000\002\006\002"
3555         "GDT HA %u, Array Drive %u: expand restarted",
3556 /*58*/  "\005\000\002\006\002"
3557         "GDT HA %u, Array Drive %u: expand stopped",
3558 /*59*/  "\005\000\002\010\002"
3559         "GDT HA %u, Mirror Drive %u: drive build quited",
3560 /*60*/  "\005\000\002\006\002"
3561         "GDT HA %u, Array Drive %u: parity build quited",
3562 /*61*/  "\005\000\002\006\002"
3563         "GDT HA %u, Array Drive %u: drive rebuild quited",
3564 /*62*/  "\005\000\002\006\002"
3565         "GDT HA %u, Array Drive %u: parity verify started",
3566 /*63*/  "\005\000\002\006\002"
3567         "GDT HA %u, Array Drive %u: parity verify done",
3568 /*64*/  "\005\000\002\006\002"
3569         "GDT HA %u, Array Drive %u: parity verify failed",
3570 /*65*/  "\005\000\002\006\002"
3571         "GDT HA %u, Array Drive %u: parity error detected",
3572 /*66*/  "\005\000\002\006\002"
3573         "GDT HA %u, Array Drive %u: parity verify quited",
3574 /*67*/  "\005\000\002\006\002"
3575         "GDT HA %u, Host Drive %u reserved",
3576 /*68*/  "\005\000\002\006\002"
3577         "GDT HA %u, Host Drive %u mounted and released",
3578 /*69*/  "\005\000\002\006\002"
3579         "GDT HA %u, Host Drive %u released",
3580 /*70*/  "\003\000\002"
3581         "GDT HA %u, DRAM error detected and corrected with ECC",
3582 /*71*/  "\003\000\002"
3583         "GDT HA %u, Uncorrectable DRAM error detected with ECC",
3584 /*72*/  "\011\000\002\012\001\013\001\014\001"
3585         "GDT HA %u, SCSI bus %u, ID %u, LUN %u: reassigning block",
3586 /*73*/  "\005\000\002\006\002"
3587         "GDT HA %u, Host drive %u resetted locally",
3588 /*74*/  "\005\000\002\006\002"
3589         "GDT HA %u, Host drive %u resetted remotely",
3590 /*75*/  "\003\000\002"
3591         "GDT HA %u, async. status 75 unknown",
3592 };
3593
3594
3595 static int gdth_async_event(gdth_ha_str *ha)
3596 {
3597     gdth_cmd_str *cmdp;
3598     int cmd_index;
3599
3600     cmdp= ha->pccb;
3601     TRACE2(("gdth_async_event() ha %d serv %d\n",
3602             ha->hanum, ha->service));
3603
3604     if (ha->service == SCREENSERVICE) {
3605         if (ha->status == MSG_REQUEST) {
3606             while (gdth_test_busy(ha))
3607                 gdth_delay(0);
3608             cmdp->Service       = SCREENSERVICE;
3609             cmdp->RequestBuffer = SCREEN_CMND;
3610             cmd_index = gdth_get_cmd_index(ha);
3611             gdth_set_sema0(ha);
3612             cmdp->OpCode        = GDT_READ;
3613             cmdp->BoardNode     = LOCALBOARD;
3614             cmdp->u.screen.reserved  = 0;
3615             cmdp->u.screen.su.msg.msg_handle= MSG_INV_HANDLE;
3616             cmdp->u.screen.su.msg.msg_addr  = ha->msg_phys;
3617             ha->cmd_offs_dpmem = 0;
3618             ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3619                 + sizeof(u64);
3620             ha->cmd_cnt = 0;
3621             gdth_copy_command(ha);
3622             if (ha->type == GDT_EISA)
3623                 printk("[EISA slot %d] ",(u16)ha->brd_phys);
3624             else if (ha->type == GDT_ISA)
3625                 printk("[DPMEM 0x%4X] ",(u16)ha->brd_phys);
3626             else
3627                 printk("[PCI %d/%d] ",(u16)(ha->brd_phys>>8),
3628                        (u16)((ha->brd_phys>>3)&0x1f));
3629             gdth_release_event(ha);
3630         }
3631
3632     } else {
3633         if (ha->type == GDT_PCIMPR &&
3634             (ha->fw_vers & 0xff) >= 0x1a) {
3635             ha->dvr.size = 0;
3636             ha->dvr.eu.async.ionode = ha->hanum;
3637             ha->dvr.eu.async.status  = ha->status;
3638             /* severity and event_string already set! */
3639         } else {
3640             ha->dvr.size = sizeof(ha->dvr.eu.async);
3641             ha->dvr.eu.async.ionode   = ha->hanum;
3642             ha->dvr.eu.async.service = ha->service;
3643             ha->dvr.eu.async.status  = ha->status;
3644             ha->dvr.eu.async.info    = ha->info;
3645             *(u32 *)ha->dvr.eu.async.scsi_coord  = ha->info2;
3646         }
3647         gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
3648         gdth_log_event( &ha->dvr, NULL );
3649
3650         /* new host drive from expand? */
3651         if (ha->service == CACHESERVICE && ha->status == 56) {
3652             TRACE2(("gdth_async_event(): new host drive %d created\n",
3653                     (u16)ha->info));
3654             /* gdth_analyse_hdrive(hanum, (u16)ha->info); */
3655         }
3656     }
3657     return 1;
3658 }
3659
3660 static void gdth_log_event(gdth_evt_data *dvr, char *buffer)
3661 {
3662     gdth_stackframe stack;
3663     char *f = NULL;
3664     int i,j;
3665
3666     TRACE2(("gdth_log_event()\n"));
3667     if (dvr->size == 0) {
3668         if (buffer == NULL) {
3669             printk("Adapter %d: %s\n",dvr->eu.async.ionode,dvr->event_string);
3670         } else {
3671             sprintf(buffer,"Adapter %d: %s\n",
3672                 dvr->eu.async.ionode,dvr->event_string);
3673         }
3674     } else if (dvr->eu.async.service == CACHESERVICE &&
3675         INDEX_OK(dvr->eu.async.status, async_cache_tab)) {
3676         TRACE2(("GDT: Async. event cache service, event no.: %d\n",
3677                 dvr->eu.async.status));
3678
3679         f = async_cache_tab[dvr->eu.async.status];
3680
3681         /* i: parameter to push, j: stack element to fill */
3682         for (j=0,i=1; i < f[0]; i+=2) {
3683             switch (f[i+1]) {
3684               case 4:
3685                 stack.b[j++] = *(u32*)&dvr->eu.stream[(int)f[i]];
3686                 break;
3687               case 2:
3688                 stack.b[j++] = *(u16*)&dvr->eu.stream[(int)f[i]];
3689                 break;
3690               case 1:
3691                 stack.b[j++] = *(u8*)&dvr->eu.stream[(int)f[i]];
3692                 break;
3693               default:
3694                 break;
3695             }
3696         }
3697
3698         if (buffer == NULL) {
3699             printk(&f[(int)f[0]],stack);
3700             printk("\n");
3701         } else {
3702             sprintf(buffer,&f[(int)f[0]],stack);
3703         }
3704
3705     } else {
3706         if (buffer == NULL) {
3707             printk("GDT HA %u, Unknown async. event service %d event no. %d\n",
3708                    dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3709         } else {
3710             sprintf(buffer,"GDT HA %u, Unknown async. event service %d event no. %d",
3711                     dvr->eu.async.ionode,dvr->eu.async.service,dvr->eu.async.status);
3712         }
3713     }
3714 }
3715
3716 #ifdef GDTH_STATISTICS
3717 static u8       gdth_timer_running;
3718
3719 static void gdth_timeout(unsigned long data)
3720 {
3721     u32 i;
3722     Scsi_Cmnd *nscp;
3723     gdth_ha_str *ha;
3724     unsigned long flags;
3725
3726     if(unlikely(list_empty(&gdth_instances))) {
3727             gdth_timer_running = 0;
3728             return;
3729     }
3730
3731     ha = list_first_entry(&gdth_instances, gdth_ha_str, list);
3732     spin_lock_irqsave(&ha->smp_lock, flags);
3733
3734     for (act_stats=0,i=0; i<GDTH_MAXCMDS; ++i)
3735         if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
3736             ++act_stats;
3737
3738     for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
3739         ++act_rq;
3740
3741     TRACE2(("gdth_to(): ints %d, ios %d, act_stats %d, act_rq %d\n",
3742             act_ints, act_ios, act_stats, act_rq));
3743     act_ints = act_ios = 0;
3744
3745     gdth_timer.expires = jiffies + 30 * HZ;
3746     add_timer(&gdth_timer);
3747     spin_unlock_irqrestore(&ha->smp_lock, flags);
3748 }
3749
3750 static void gdth_timer_init(void)
3751 {
3752         if (gdth_timer_running)
3753                 return;
3754         gdth_timer_running = 1;
3755         TRACE2(("gdth_detect(): Initializing timer !\n"));
3756         gdth_timer.expires = jiffies + HZ;
3757         gdth_timer.data = 0L;
3758         gdth_timer.function = gdth_timeout;
3759         add_timer(&gdth_timer);
3760 }
3761 #else
3762 static inline void gdth_timer_init(void)
3763 {
3764 }
3765 #endif
3766
3767 static void __init internal_setup(char *str,int *ints)
3768 {
3769     int i, argc;
3770     char *cur_str, *argv;
3771
3772     TRACE2(("internal_setup() str %s ints[0] %d\n",
3773             str ? str:"NULL", ints ? ints[0]:0));
3774
3775     /* read irq[] from ints[] */
3776     if (ints) {
3777         argc = ints[0];
3778         if (argc > 0) {
3779             if (argc > MAXHA)
3780                 argc = MAXHA;
3781             for (i = 0; i < argc; ++i)
3782                 irq[i] = ints[i+1];
3783         }
3784     }
3785
3786     /* analyse string */
3787     argv = str;
3788     while (argv && (cur_str = strchr(argv, ':'))) {
3789         int val = 0, c = *++cur_str;
3790
3791         if (c == 'n' || c == 'N')
3792             val = 0;
3793         else if (c == 'y' || c == 'Y')
3794             val = 1;
3795         else
3796             val = (int)simple_strtoul(cur_str, NULL, 0);
3797
3798         if (!strncmp(argv, "disable:", 8))
3799             disable = val;
3800         else if (!strncmp(argv, "reserve_mode:", 13))
3801             reserve_mode = val;
3802         else if (!strncmp(argv, "reverse_scan:", 13))
3803             reverse_scan = val;
3804         else if (!strncmp(argv, "hdr_channel:", 12))
3805             hdr_channel = val;
3806         else if (!strncmp(argv, "max_ids:", 8))
3807             max_ids = val;
3808         else if (!strncmp(argv, "rescan:", 7))
3809             rescan = val;
3810         else if (!strncmp(argv, "shared_access:", 14))
3811             shared_access = val;
3812         else if (!strncmp(argv, "probe_eisa_isa:", 15))
3813             probe_eisa_isa = val;
3814         else if (!strncmp(argv, "reserve_list:", 13)) {
3815             reserve_list[0] = val;
3816             for (i = 1; i < MAX_RES_ARGS; i++) {
3817                 cur_str = strchr(cur_str, ',');
3818                 if (!cur_str)
3819                     break;
3820                 if (!isdigit((int)*++cur_str)) {
3821                     --cur_str;
3822                     break;
3823                 }
3824                 reserve_list[i] =
3825                     (int)simple_strtoul(cur_str, NULL, 0);
3826             }
3827             if (!cur_str)
3828                 break;
3829             argv = ++cur_str;
3830             continue;
3831         }
3832
3833         if ((argv = strchr(argv, ',')))
3834             ++argv;
3835     }
3836 }
3837
3838 int __init option_setup(char *str)
3839 {
3840     int ints[MAXHA];
3841     char *cur = str;
3842     int i = 1;
3843
3844     TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
3845
3846     while (cur && isdigit(*cur) && i < MAXHA) {
3847         ints[i++] = simple_strtoul(cur, NULL, 0);
3848         if ((cur = strchr(cur, ',')) != NULL) cur++;
3849     }
3850
3851     ints[0] = i - 1;
3852     internal_setup(cur, ints);
3853     return 1;
3854 }
3855
3856 static const char *gdth_ctr_name(gdth_ha_str *ha)
3857 {
3858     TRACE2(("gdth_ctr_name()\n"));
3859
3860     if (ha->type == GDT_EISA) {
3861         switch (ha->stype) {
3862           case GDT3_ID:
3863             return("GDT3000/3020");
3864           case GDT3A_ID:
3865             return("GDT3000A/3020A/3050A");
3866           case GDT3B_ID:
3867             return("GDT3000B/3010A");
3868         }
3869     } else if (ha->type == GDT_ISA) {
3870         return("GDT2000/2020");
3871     } else if (ha->type == GDT_PCI) {
3872         switch (ha->pdev->device) {
3873           case PCI_DEVICE_ID_VORTEX_GDT60x0:
3874             return("GDT6000/6020/6050");
3875           case PCI_DEVICE_ID_VORTEX_GDT6000B:
3876             return("GDT6000B/6010");
3877         }
3878     }
3879     /* new controllers (GDT_PCINEW, GDT_PCIMPR, ..) use board_info IOCTL! */
3880
3881     return("");
3882 }
3883
3884 static const char *gdth_info(struct Scsi_Host *shp)
3885 {
3886     gdth_ha_str *ha = shost_priv(shp);
3887
3888     TRACE2(("gdth_info()\n"));
3889     return ((const char *)ha->binfo.type_string);
3890 }
3891
3892 static enum blk_eh_timer_return gdth_timed_out(struct scsi_cmnd *scp)
3893 {
3894         gdth_ha_str *ha = shost_priv(scp->device->host);
3895         struct gdth_cmndinfo *cmndinfo = gdth_cmnd_priv(scp);
3896         u8 b, t;
3897         unsigned long flags;
3898         enum blk_eh_timer_return retval = BLK_EH_NOT_HANDLED;
3899
3900         TRACE(("%s() cmd 0x%x\n", scp->cmnd[0], __func__));
3901         b = scp->device->channel;
3902         t = scp->device->id;
3903
3904         /*
3905          * We don't really honor the command timeout, but we try to
3906          * honor 6 times of the actual command timeout! So reset the
3907          * timer if this is less than 6th timeout on this command!
3908          */
3909         if (++cmndinfo->timeout_count < 6)
3910                 retval = BLK_EH_RESET_TIMER;
3911
3912         /* Reset the timeout if it is locked IO */
3913         spin_lock_irqsave(&ha->smp_lock, flags);
3914         if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha, b)].lock) ||
3915             (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) {
3916                 TRACE2(("%s(): locked IO, reset timeout\n", __func__));
3917                 retval = BLK_EH_RESET_TIMER;
3918         }
3919         spin_unlock_irqrestore(&ha->smp_lock, flags);
3920
3921         return retval;
3922 }
3923
3924
3925 static int gdth_eh_bus_reset(Scsi_Cmnd *scp)
3926 {
3927     gdth_ha_str *ha = shost_priv(scp->device->host);
3928     int i;
3929     unsigned long flags;
3930     Scsi_Cmnd *cmnd;
3931     u8 b;
3932
3933     TRACE2(("gdth_eh_bus_reset()\n"));
3934
3935     b = scp->device->channel;
3936
3937     /* clear command tab */
3938     spin_lock_irqsave(&ha->smp_lock, flags);
3939     for (i = 0; i < GDTH_MAXCMDS; ++i) {
3940         cmnd = ha->cmd_tab[i].cmnd;
3941         if (!SPECIAL_SCP(cmnd) && cmnd->device->channel == b)
3942             ha->cmd_tab[i].cmnd = UNUSED_CMND;
3943     }
3944     spin_unlock_irqrestore(&ha->smp_lock, flags);
3945
3946     if (b == ha->virt_bus) {
3947         /* host drives */
3948         for (i = 0; i < MAX_HDRIVES; ++i) {
3949             if (ha->hdr[i].present) {
3950                 spin_lock_irqsave(&ha->smp_lock, flags);
3951                 gdth_polling = TRUE;
3952                 while (gdth_test_busy(ha))
3953                     gdth_delay(0);
3954                 if (gdth_internal_cmd(ha, CACHESERVICE,
3955                                       GDT_CLUST_RESET, i, 0, 0))
3956                     ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
3957                 gdth_polling = FALSE;
3958                 spin_unlock_irqrestore(&ha->smp_lock, flags);
3959             }
3960         }
3961     } else {
3962         /* raw devices */
3963         spin_lock_irqsave(&ha->smp_lock, flags);
3964         for (i = 0; i < MAXID; ++i)
3965             ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
3966         gdth_polling = TRUE;
3967         while (gdth_test_busy(ha))
3968             gdth_delay(0);
3969         gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESET_BUS,
3970                           BUS_L2P(ha,b), 0, 0);
3971         gdth_polling = FALSE;
3972         spin_unlock_irqrestore(&ha->smp_lock, flags);
3973     }
3974     return SUCCESS;
3975 }
3976
3977 static int gdth_bios_param(struct scsi_device *sdev,struct block_device *bdev,sector_t cap,int *ip)
3978 {
3979     u8 b, t;
3980     gdth_ha_str *ha = shost_priv(sdev->host);
3981     struct scsi_device *sd;
3982     unsigned capacity;
3983
3984     sd = sdev;
3985     capacity = cap;
3986     b = sd->channel;
3987     t = sd->id;
3988     TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", ha->hanum, b, t));
3989
3990     if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
3991         /* raw device or host drive without mapping information */
3992         TRACE2(("Evaluate mapping\n"));
3993         gdth_eval_mapping(capacity,&ip[2],&ip[0],&ip[1]);
3994     } else {
3995         ip[0] = ha->hdr[t].heads;
3996         ip[1] = ha->hdr[t].secs;
3997         ip[2] = capacity / ip[0] / ip[1];
3998     }
3999
4000     TRACE2(("gdth_bios_param(): %d heads, %d secs, %d cyls\n",
4001             ip[0],ip[1],ip[2]));
4002     return 0;
4003 }
4004
4005
4006 static int gdth_queuecommand_lck(struct scsi_cmnd *scp,
4007                                 void (*done)(struct scsi_cmnd *))
4008 {
4009     gdth_ha_str *ha = shost_priv(scp->device->host);
4010     struct gdth_cmndinfo *cmndinfo;
4011
4012     TRACE(("gdth_queuecommand() cmd 0x%x\n", scp->cmnd[0]));
4013
4014     cmndinfo = gdth_get_cmndinfo(ha);
4015     BUG_ON(!cmndinfo);
4016
4017     scp->scsi_done = done;
4018     cmndinfo->timeout_count = 0;
4019     cmndinfo->priority = DEFAULT_PRI;
4020
4021     return __gdth_queuecommand(ha, scp, cmndinfo);
4022 }
4023
4024 static DEF_SCSI_QCMD(gdth_queuecommand)
4025
4026 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp,
4027                                 struct gdth_cmndinfo *cmndinfo)
4028 {
4029     scp->host_scribble = (unsigned char *)cmndinfo;
4030     cmndinfo->wait_for_completion = 1;
4031     cmndinfo->phase = -1;
4032     cmndinfo->OpCode = -1;
4033
4034 #ifdef GDTH_STATISTICS
4035     ++act_ios;
4036 #endif
4037
4038     gdth_putq(ha, scp, cmndinfo->priority);
4039     gdth_next(ha);
4040     return 0;
4041 }
4042
4043
4044 static int gdth_open(struct inode *inode, struct file *filep)
4045 {
4046     gdth_ha_str *ha;
4047
4048     mutex_lock(&gdth_mutex);
4049     list_for_each_entry(ha, &gdth_instances, list) {
4050         if (!ha->sdev)
4051             ha->sdev = scsi_get_host_dev(ha->shost);
4052     }
4053     mutex_unlock(&gdth_mutex);
4054
4055     TRACE(("gdth_open()\n"));
4056     return 0;
4057 }
4058
4059 static int gdth_close(struct inode *inode, struct file *filep)
4060 {
4061     TRACE(("gdth_close()\n"));
4062     return 0;
4063 }
4064
4065 static int ioc_event(void __user *arg)
4066 {
4067     gdth_ioctl_event evt;
4068     gdth_ha_str *ha;
4069     unsigned long flags;
4070
4071     if (copy_from_user(&evt, arg, sizeof(gdth_ioctl_event)))
4072         return -EFAULT;
4073     ha = gdth_find_ha(evt.ionode);
4074     if (!ha)
4075         return -EFAULT;
4076
4077     if (evt.erase == 0xff) {
4078         if (evt.event.event_source == ES_TEST)
4079             evt.event.event_data.size=sizeof(evt.event.event_data.eu.test);
4080         else if (evt.event.event_source == ES_DRIVER)
4081             evt.event.event_data.size=sizeof(evt.event.event_data.eu.driver);
4082         else if (evt.event.event_source == ES_SYNC)
4083             evt.event.event_data.size=sizeof(evt.event.event_data.eu.sync);
4084         else
4085             evt.event.event_data.size=sizeof(evt.event.event_data.eu.async);
4086         spin_lock_irqsave(&ha->smp_lock, flags);
4087         gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
4088                          &evt.event.event_data);
4089         spin_unlock_irqrestore(&ha->smp_lock, flags);
4090     } else if (evt.erase == 0xfe) {
4091         gdth_clear_events();
4092     } else if (evt.erase == 0) {
4093         evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
4094     } else {
4095         gdth_readapp_event(ha, evt.erase, &evt.event);
4096     }
4097     if (copy_to_user(arg, &evt, sizeof(gdth_ioctl_event)))
4098         return -EFAULT;
4099     return 0;
4100 }
4101
4102 static int ioc_lockdrv(void __user *arg)
4103 {
4104     gdth_ioctl_lockdrv ldrv;
4105     u8 i, j;
4106     unsigned long flags;
4107     gdth_ha_str *ha;
4108
4109     if (copy_from_user(&ldrv, arg, sizeof(gdth_ioctl_lockdrv)))
4110         return -EFAULT;
4111     ha = gdth_find_ha(ldrv.ionode);
4112     if (!ha)
4113         return -EFAULT;
4114
4115     for (i = 0; i < ldrv.drive_cnt && i < MAX_HDRIVES; ++i) {
4116         j = ldrv.drives[i];
4117         if (j >= MAX_HDRIVES || !ha->hdr[j].present)
4118             continue;
4119         if (ldrv.lock) {
4120             spin_lock_irqsave(&ha->smp_lock, flags);
4121             ha->hdr[j].lock = 1;
4122             spin_unlock_irqrestore(&ha->smp_lock, flags);
4123             gdth_wait_completion(ha, ha->bus_cnt, j);
4124         } else {
4125             spin_lock_irqsave(&ha->smp_lock, flags);
4126             ha->hdr[j].lock = 0;
4127             spin_unlock_irqrestore(&ha->smp_lock, flags);
4128             gdth_next(ha);
4129         }
4130     }
4131     return 0;
4132 }
4133
4134 static int ioc_resetdrv(void __user *arg, char *cmnd)
4135 {
4136     gdth_ioctl_reset res;
4137     gdth_cmd_str cmd;
4138     gdth_ha_str *ha;
4139     int rval;
4140
4141     if (copy_from_user(&res, arg, sizeof(gdth_ioctl_reset)) ||
4142         res.number >= MAX_HDRIVES)
4143         return -EFAULT;
4144     ha = gdth_find_ha(res.ionode);
4145     if (!ha)
4146         return -EFAULT;
4147
4148     if (!ha->hdr[res.number].present)
4149         return 0;
4150     memset(&cmd, 0, sizeof(gdth_cmd_str));
4151     cmd.Service = CACHESERVICE;
4152     cmd.OpCode = GDT_CLUST_RESET;
4153     if (ha->cache_feat & GDT_64BIT)
4154         cmd.u.cache64.DeviceNo = res.number;
4155     else
4156         cmd.u.cache.DeviceNo = res.number;
4157
4158     rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
4159     if (rval < 0)
4160         return rval;
4161     res.status = rval;
4162
4163     if (copy_to_user(arg, &res, sizeof(gdth_ioctl_reset)))
4164         return -EFAULT;
4165     return 0;
4166 }
4167
4168 static int ioc_general(void __user *arg, char *cmnd)
4169 {
4170     gdth_ioctl_general gen;
4171     char *buf = NULL;
4172     u64 paddr;
4173     gdth_ha_str *ha;
4174     int rval;
4175
4176     if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)))
4177         return -EFAULT;
4178     ha = gdth_find_ha(gen.ionode);
4179     if (!ha)
4180         return -EFAULT;
4181
4182     if (gen.data_len > INT_MAX)
4183         return -EINVAL;
4184     if (gen.sense_len > INT_MAX)
4185         return -EINVAL;
4186     if (gen.data_len + gen.sense_len > INT_MAX)
4187         return -EINVAL;
4188
4189     if (gen.data_len + gen.sense_len != 0) {
4190         if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len,
4191                                      FALSE, &paddr)))
4192             return -EFAULT;
4193         if (copy_from_user(buf, arg + sizeof(gdth_ioctl_general),
4194                            gen.data_len + gen.sense_len)) {
4195             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4196             return -EFAULT;
4197         }
4198
4199         if (gen.command.OpCode == GDT_IOCTL) {
4200             gen.command.u.ioctl.p_param = paddr;
4201         } else if (gen.command.Service == CACHESERVICE) {
4202             if (ha->cache_feat & GDT_64BIT) {
4203                 /* copy elements from 32-bit IOCTL structure */
4204                 gen.command.u.cache64.BlockCnt = gen.command.u.cache.BlockCnt;
4205                 gen.command.u.cache64.BlockNo = gen.command.u.cache.BlockNo;
4206                 gen.command.u.cache64.DeviceNo = gen.command.u.cache.DeviceNo;
4207                 /* addresses */
4208                 if (ha->cache_feat & SCATTER_GATHER) {
4209                     gen.command.u.cache64.DestAddr = (u64)-1;
4210                     gen.command.u.cache64.sg_canz = 1;
4211                     gen.command.u.cache64.sg_lst[0].sg_ptr = paddr;
4212                     gen.command.u.cache64.sg_lst[0].sg_len = gen.data_len;
4213                     gen.command.u.cache64.sg_lst[1].sg_len = 0;
4214                 } else {
4215                     gen.command.u.cache64.DestAddr = paddr;
4216                     gen.command.u.cache64.sg_canz = 0;
4217                 }
4218             } else {
4219                 if (ha->cache_feat & SCATTER_GATHER) {
4220                     gen.command.u.cache.DestAddr = 0xffffffff;
4221                     gen.command.u.cache.sg_canz = 1;
4222                     gen.command.u.cache.sg_lst[0].sg_ptr = (u32)paddr;
4223                     gen.command.u.cache.sg_lst[0].sg_len = gen.data_len;
4224                     gen.command.u.cache.sg_lst[1].sg_len = 0;
4225                 } else {
4226                     gen.command.u.cache.DestAddr = paddr;
4227                     gen.command.u.cache.sg_canz = 0;
4228                 }
4229             }
4230         } else if (gen.command.Service == SCSIRAWSERVICE) {
4231             if (ha->raw_feat & GDT_64BIT) {
4232                 /* copy elements from 32-bit IOCTL structure */
4233                 char cmd[16];
4234                 gen.command.u.raw64.sense_len = gen.command.u.raw.sense_len;
4235                 gen.command.u.raw64.bus = gen.command.u.raw.bus;
4236                 gen.command.u.raw64.lun = gen.command.u.raw.lun;
4237                 gen.command.u.raw64.target = gen.command.u.raw.target;
4238                 memcpy(cmd, gen.command.u.raw.cmd, 16);
4239                 memcpy(gen.command.u.raw64.cmd, cmd, 16);
4240                 gen.command.u.raw64.clen = gen.command.u.raw.clen;
4241                 gen.command.u.raw64.sdlen = gen.command.u.raw.sdlen;
4242                 gen.command.u.raw64.direction = gen.command.u.raw.direction;
4243                 /* addresses */
4244                 if (ha->raw_feat & SCATTER_GATHER) {
4245                     gen.command.u.raw64.sdata = (u64)-1;
4246                     gen.command.u.raw64.sg_ranz = 1;
4247                     gen.command.u.raw64.sg_lst[0].sg_ptr = paddr;
4248                     gen.command.u.raw64.sg_lst[0].sg_len = gen.data_len;
4249                     gen.command.u.raw64.sg_lst[1].sg_len = 0;
4250                 } else {
4251                     gen.command.u.raw64.sdata = paddr;
4252                     gen.command.u.raw64.sg_ranz = 0;
4253                 }
4254                 gen.command.u.raw64.sense_data = paddr + gen.data_len;
4255             } else {
4256                 if (ha->raw_feat & SCATTER_GATHER) {
4257                     gen.command.u.raw.sdata = 0xffffffff;
4258                     gen.command.u.raw.sg_ranz = 1;
4259                     gen.command.u.raw.sg_lst[0].sg_ptr = (u32)paddr;
4260                     gen.command.u.raw.sg_lst[0].sg_len = gen.data_len;
4261                     gen.command.u.raw.sg_lst[1].sg_len = 0;
4262                 } else {
4263                     gen.command.u.raw.sdata = paddr;
4264                     gen.command.u.raw.sg_ranz = 0;
4265                 }
4266                 gen.command.u.raw.sense_data = (u32)paddr + gen.data_len;
4267             }
4268         } else {
4269             gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4270             return -EFAULT;
4271         }
4272     }
4273
4274     rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
4275     if (rval < 0) {
4276         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4277         return rval;
4278     }
4279     gen.status = rval;
4280
4281     if (copy_to_user(arg + sizeof(gdth_ioctl_general), buf,
4282                      gen.data_len + gen.sense_len)) {
4283         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4284         return -EFAULT;
4285     }
4286     if (copy_to_user(arg, &gen,
4287         sizeof(gdth_ioctl_general) - sizeof(gdth_cmd_str))) {
4288         gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4289         return -EFAULT;
4290     }
4291     gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
4292     return 0;
4293 }
4294
4295 static int ioc_hdrlist(void __user *arg, char *cmnd)
4296 {
4297     gdth_ioctl_rescan *rsc;
4298     gdth_cmd_str *cmd;
4299     gdth_ha_str *ha;
4300     u8 i;
4301     int rc = -ENOMEM;
4302     u32 cluster_type = 0;
4303
4304     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4305     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4306     if (!rsc || !cmd)
4307         goto free_fail;
4308
4309     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4310         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4311         rc = -EFAULT;
4312         goto free_fail;
4313     }
4314     memset(cmd, 0, sizeof(gdth_cmd_str));
4315
4316     for (i = 0; i < MAX_HDRIVES; ++i) {
4317         if (!ha->hdr[i].present) {
4318             rsc->hdr_list[i].bus = 0xff;
4319             continue;
4320         }
4321         rsc->hdr_list[i].bus = ha->virt_bus;
4322         rsc->hdr_list[i].target = i;
4323         rsc->hdr_list[i].lun = 0;
4324         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4325         if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
4326             cmd->Service = CACHESERVICE;
4327             cmd->OpCode = GDT_CLUST_INFO;
4328             if (ha->cache_feat & GDT_64BIT)
4329                 cmd->u.cache64.DeviceNo = i;
4330             else
4331                 cmd->u.cache.DeviceNo = i;
4332             if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
4333                 rsc->hdr_list[i].cluster_type = cluster_type;
4334         }
4335     }
4336
4337     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4338         rc = -EFAULT;
4339     else
4340         rc = 0;
4341
4342 free_fail:
4343     kfree(rsc);
4344     kfree(cmd);
4345     return rc;
4346 }
4347
4348 static int ioc_rescan(void __user *arg, char *cmnd)
4349 {
4350     gdth_ioctl_rescan *rsc;
4351     gdth_cmd_str *cmd;
4352     u16 i, status, hdr_cnt;
4353     u32 info;
4354     int cyls, hds, secs;
4355     int rc = -ENOMEM;
4356     unsigned long flags;
4357     gdth_ha_str *ha;
4358
4359     rsc = kmalloc(sizeof(*rsc), GFP_KERNEL);
4360     cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
4361     if (!cmd || !rsc)
4362         goto free_fail;
4363
4364     if (copy_from_user(rsc, arg, sizeof(gdth_ioctl_rescan)) ||
4365         (NULL == (ha = gdth_find_ha(rsc->ionode)))) {
4366         rc = -EFAULT;
4367         goto free_fail;
4368     }
4369     memset(cmd, 0, sizeof(gdth_cmd_str));
4370
4371     if (rsc->flag == 0) {
4372         /* old method: re-init. cache service */
4373         cmd->Service = CACHESERVICE;
4374         if (ha->cache_feat & GDT_64BIT) {
4375             cmd->OpCode = GDT_X_INIT_HOST;
4376             cmd->u.cache64.DeviceNo = LINUX_OS;
4377         } else {
4378             cmd->OpCode = GDT_INIT;
4379             cmd->u.cache.DeviceNo = LINUX_OS;
4380         }
4381
4382         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4383         i = 0;
4384         hdr_cnt = (status == S_OK ? (u16)info : 0);
4385     } else {
4386         i = rsc->hdr_no;
4387         hdr_cnt = i + 1;
4388     }
4389
4390     for (; i < hdr_cnt && i < MAX_HDRIVES; ++i) {
4391         cmd->Service = CACHESERVICE;
4392         cmd->OpCode = GDT_INFO;
4393         if (ha->cache_feat & GDT_64BIT)
4394             cmd->u.cache64.DeviceNo = i;
4395         else
4396             cmd->u.cache.DeviceNo = i;
4397
4398         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4399
4400         spin_lock_irqsave(&ha->smp_lock, flags);
4401         rsc->hdr_list[i].bus = ha->virt_bus;
4402         rsc->hdr_list[i].target = i;
4403         rsc->hdr_list[i].lun = 0;
4404         if (status != S_OK) {
4405             ha->hdr[i].present = FALSE;
4406         } else {
4407             ha->hdr[i].present = TRUE;
4408             ha->hdr[i].size = info;
4409             /* evaluate mapping */
4410             ha->hdr[i].size &= ~SECS32;
4411             gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
4412             ha->hdr[i].heads = hds;
4413             ha->hdr[i].secs = secs;
4414             /* round size */
4415             ha->hdr[i].size = cyls * hds * secs;
4416         }
4417         spin_unlock_irqrestore(&ha->smp_lock, flags);
4418         if (status != S_OK)
4419             continue;
4420
4421         /* extended info, if GDT_64BIT, for drives > 2 TB */
4422         /* but we need ha->info2, not yet stored in scp->SCp */
4423
4424         /* devtype, cluster info, R/W attribs */
4425         cmd->Service = CACHESERVICE;
4426         cmd->OpCode = GDT_DEVTYPE;
4427         if (ha->cache_feat & GDT_64BIT)
4428             cmd->u.cache64.DeviceNo = i;
4429         else
4430             cmd->u.cache.DeviceNo = i;
4431
4432         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4433
4434         spin_lock_irqsave(&ha->smp_lock, flags);
4435         ha->hdr[i].devtype = (status == S_OK ? (u16)info : 0);
4436         spin_unlock_irqrestore(&ha->smp_lock, flags);
4437
4438         cmd->Service = CACHESERVICE;
4439         cmd->OpCode = GDT_CLUST_INFO;
4440         if (ha->cache_feat & GDT_64BIT)
4441             cmd->u.cache64.DeviceNo = i;
4442         else
4443             cmd->u.cache.DeviceNo = i;
4444
4445         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4446
4447         spin_lock_irqsave(&ha->smp_lock, flags);
4448         ha->hdr[i].cluster_type =
4449             ((status == S_OK && !shared_access) ? (u16)info : 0);
4450         spin_unlock_irqrestore(&ha->smp_lock, flags);
4451         rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
4452
4453         cmd->Service = CACHESERVICE;
4454         cmd->OpCode = GDT_RW_ATTRIBS;
4455         if (ha->cache_feat & GDT_64BIT)
4456             cmd->u.cache64.DeviceNo = i;
4457         else
4458             cmd->u.cache.DeviceNo = i;
4459
4460         status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
4461
4462         spin_lock_irqsave(&ha->smp_lock, flags);
4463         ha->hdr[i].rw_attribs = (status == S_OK ? (u16)info : 0);
4464         spin_unlock_irqrestore(&ha->smp_lock, flags);
4465     }
4466
4467     if (copy_to_user(arg, rsc, sizeof(gdth_ioctl_rescan)))
4468         rc = -EFAULT;
4469     else
4470         rc = 0;
4471
4472 free_fail:
4473     kfree(rsc);
4474     kfree(cmd);
4475     return rc;
4476 }
4477
4478 static int gdth_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
4479 {
4480     gdth_ha_str *ha;
4481     Scsi_Cmnd *scp;
4482     unsigned long flags;
4483     char cmnd[MAX_COMMAND_SIZE];
4484     void __user *argp = (void __user *)arg;
4485
4486     memset(cmnd, 0xff, 12);
4487
4488     TRACE(("gdth_ioctl() cmd 0x%x\n", cmd));
4489
4490     switch (cmd) {
4491       case GDTIOCTL_CTRCNT:
4492       {
4493         int cnt = gdth_ctr_count;
4494         if (put_user(cnt, (int __user *)argp))
4495                 return -EFAULT;
4496         break;
4497       }
4498
4499       case GDTIOCTL_DRVERS:
4500       {
4501         int ver = (GDTH_VERSION<<8) | GDTH_SUBVERSION;
4502         if (put_user(ver, (int __user *)argp))
4503                 return -EFAULT;
4504         break;
4505       }
4506
4507       case GDTIOCTL_OSVERS:
4508       {
4509         gdth_ioctl_osvers osv;
4510
4511         osv.version = (u8)(LINUX_VERSION_CODE >> 16);
4512         osv.subversion = (u8)(LINUX_VERSION_CODE >> 8);
4513         osv.revision = (u16)(LINUX_VERSION_CODE & 0xff);
4514         if (copy_to_user(argp, &osv, sizeof(gdth_ioctl_osvers)))
4515                 return -EFAULT;
4516         break;
4517       }
4518
4519       case GDTIOCTL_CTRTYPE:
4520       {
4521         gdth_ioctl_ctrtype ctrt;
4522
4523         if (copy_from_user(&ctrt, argp, sizeof(gdth_ioctl_ctrtype)) ||
4524             (NULL == (ha = gdth_find_ha(ctrt.ionode))))
4525             return -EFAULT;
4526
4527         if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
4528             ctrt.type = (u8)((ha->stype>>20) - 0x10);
4529         } else {
4530             if (ha->type != GDT_PCIMPR) {
4531                 ctrt.type = (u8)((ha->stype<<4) + 6);
4532             } else {
4533                 ctrt.type =
4534                     (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
4535                 if (ha->stype >= 0x300)
4536                     ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device;
4537                 else
4538                     ctrt.ext_type = 0x6000 | ha->stype;
4539             }
4540             ctrt.device_id = ha->pdev->device;
4541             ctrt.sub_device_id = ha->pdev->subsystem_device;
4542         }
4543         ctrt.info = ha->brd_phys;
4544         ctrt.oem_id = ha->oem_id;
4545         if (copy_to_user(argp, &ctrt, sizeof(gdth_ioctl_ctrtype)))
4546             return -EFAULT;
4547         break;
4548       }
4549
4550       case GDTIOCTL_GENERAL:
4551         return ioc_general(argp, cmnd);
4552
4553       case GDTIOCTL_EVENT:
4554         return ioc_event(argp);
4555
4556       case GDTIOCTL_LOCKDRV:
4557         return ioc_lockdrv(argp);
4558
4559       case GDTIOCTL_LOCKCHN:
4560       {
4561         gdth_ioctl_lockchn lchn;
4562         u8 i, j;
4563
4564         if (copy_from_user(&lchn, argp, sizeof(gdth_ioctl_lockchn)) ||
4565             (NULL == (ha = gdth_find_ha(lchn.ionode))))
4566             return -EFAULT;
4567
4568         i = lchn.channel;
4569         if (i < ha->bus_cnt) {
4570             if (lchn.lock) {
4571                 spin_lock_irqsave(&ha->smp_lock, flags);
4572                 ha->raw[i].lock = 1;
4573                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4574                 for (j = 0; j < ha->tid_cnt; ++j)
4575                     gdth_wait_completion(ha, i, j);
4576             } else {
4577                 spin_lock_irqsave(&ha->smp_lock, flags);
4578                 ha->raw[i].lock = 0;
4579                 spin_unlock_irqrestore(&ha->smp_lock, flags);
4580                 for (j = 0; j < ha->tid_cnt; ++j)
4581                     gdth_next(ha);
4582             }
4583         }
4584         break;
4585       }
4586
4587       case GDTIOCTL_RESCAN:
4588         return ioc_rescan(argp, cmnd);
4589
4590       case GDTIOCTL_HDRLIST:
4591         return ioc_hdrlist(argp, cmnd);
4592
4593       case GDTIOCTL_RESET_BUS:
4594       {
4595         gdth_ioctl_reset res;
4596         int rval;
4597
4598         if (copy_from_user(&res, argp, sizeof(gdth_ioctl_reset)) ||
4599             (NULL == (ha = gdth_find_ha(res.ionode))))
4600             return -EFAULT;
4601
4602         scp  = kzalloc(sizeof(*scp), GFP_KERNEL);
4603         if (!scp)
4604             return -ENOMEM;
4605         scp->device = ha->sdev;
4606         scp->cmd_len = 12;
4607         scp->device->channel = res.number;
4608         rval = gdth_eh_bus_reset(scp);
4609         res.status = (rval == SUCCESS ? S_OK : S_GENERR);
4610         kfree(scp);
4611
4612         if (copy_to_user(argp, &res, sizeof(gdth_ioctl_reset)))
4613             return -EFAULT;
4614         break;
4615       }
4616
4617       case GDTIOCTL_RESET_DRV:
4618         return ioc_resetdrv(argp, cmnd);
4619
4620       default:
4621         break;
4622     }
4623     return 0;
4624 }
4625
4626 static long gdth_unlocked_ioctl(struct file *file, unsigned int cmd,
4627                                 unsigned long arg)
4628 {
4629         int ret;
4630
4631         mutex_lock(&gdth_mutex);
4632         ret = gdth_ioctl(file, cmd, arg);
4633         mutex_unlock(&gdth_mutex);
4634
4635         return ret;
4636 }
4637
4638 /* flush routine */
4639 static void gdth_flush(gdth_ha_str *ha)
4640 {
4641     int             i;
4642     gdth_cmd_str    gdtcmd;
4643     char            cmnd[MAX_COMMAND_SIZE];
4644     memset(cmnd, 0xff, MAX_COMMAND_SIZE);
4645
4646     TRACE2(("gdth_flush() hanum %d\n", ha->hanum));
4647
4648     for (i = 0; i < MAX_HDRIVES; ++i) {
4649         if (ha->hdr[i].present) {
4650             gdtcmd.BoardNode = LOCALBOARD;
4651             gdtcmd.Service = CACHESERVICE;
4652             gdtcmd.OpCode = GDT_FLUSH;
4653             if (ha->cache_feat & GDT_64BIT) {
4654                 gdtcmd.u.cache64.DeviceNo = i;
4655                 gdtcmd.u.cache64.BlockNo = 1;
4656                 gdtcmd.u.cache64.sg_canz = 0;
4657             } else {
4658                 gdtcmd.u.cache.DeviceNo = i;
4659                 gdtcmd.u.cache.BlockNo = 1;
4660                 gdtcmd.u.cache.sg_canz = 0;
4661             }
4662             TRACE2(("gdth_flush(): flush ha %d drive %d\n", ha->hanum, i));
4663
4664             gdth_execute(ha->shost, &gdtcmd, cmnd, 30, NULL);
4665         }
4666     }
4667 }
4668
4669 /* configure lun */
4670 static int gdth_slave_configure(struct scsi_device *sdev)
4671 {
4672     scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
4673     sdev->skip_ms_page_3f = 1;
4674     sdev->skip_ms_page_8 = 1;
4675     return 0;
4676 }
4677
4678 static struct scsi_host_template gdth_template = {
4679         .name                   = "GDT SCSI Disk Array Controller",
4680         .info                   = gdth_info,
4681         .queuecommand           = gdth_queuecommand,
4682         .eh_bus_reset_handler   = gdth_eh_bus_reset,
4683         .slave_configure        = gdth_slave_configure,
4684         .bios_param             = gdth_bios_param,
4685         .proc_info              = gdth_proc_info,
4686         .eh_timed_out           = gdth_timed_out,
4687         .proc_name              = "gdth",
4688         .can_queue              = GDTH_MAXCMDS,
4689         .this_id                = -1,
4690         .sg_tablesize           = GDTH_MAXSG,
4691         .cmd_per_lun            = GDTH_MAXC_P_L,
4692         .unchecked_isa_dma      = 1,
4693         .use_clustering         = ENABLE_CLUSTERING,
4694 };
4695
4696 #ifdef CONFIG_ISA
4697 static int __init gdth_isa_probe_one(u32 isa_bios)
4698 {
4699         struct Scsi_Host *shp;
4700         gdth_ha_str *ha;
4701         dma_addr_t scratch_dma_handle = 0;
4702         int error, i;
4703
4704         if (!gdth_search_isa(isa_bios))
4705                 return -ENXIO;
4706
4707         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4708         if (!shp)
4709                 return -ENOMEM;
4710         ha = shost_priv(shp);
4711
4712         error = -ENODEV;
4713         if (!gdth_init_isa(isa_bios,ha))
4714                 goto out_host_put;
4715
4716         /* controller found and initialized */
4717         printk("Configuring GDT-ISA HA at BIOS 0x%05X IRQ %u DRQ %u\n",
4718                 isa_bios, ha->irq, ha->drq);
4719
4720         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4721         if (error) {
4722                 printk("GDT-ISA: Unable to allocate IRQ\n");
4723                 goto out_host_put;
4724         }
4725
4726         error = request_dma(ha->drq, "gdth");
4727         if (error) {
4728                 printk("GDT-ISA: Unable to allocate DMA channel\n");
4729                 goto out_free_irq;
4730         }
4731
4732         set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4733         enable_dma(ha->drq);
4734         shp->unchecked_isa_dma = 1;
4735         shp->irq = ha->irq;
4736         shp->dma_channel = ha->drq;
4737
4738         ha->hanum = gdth_ctr_count++;
4739         ha->shost = shp;
4740
4741         ha->pccb = &ha->cmdext;
4742         ha->ccb_phys = 0L;
4743         ha->pdev = NULL;
4744
4745         error = -ENOMEM;
4746
4747         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4748                                                 &scratch_dma_handle);
4749         if (!ha->pscratch)
4750                 goto out_dec_counters;
4751         ha->scratch_phys = scratch_dma_handle;
4752
4753         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4754                                                 &scratch_dma_handle);
4755         if (!ha->pmsg)
4756                 goto out_free_pscratch;
4757         ha->msg_phys = scratch_dma_handle;
4758
4759 #ifdef INT_COAL
4760         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4761                                 sizeof(gdth_coal_status) * MAXOFFSETS,
4762                                 &scratch_dma_handle);
4763         if (!ha->coal_stat)
4764                 goto out_free_pmsg;
4765         ha->coal_stat_phys = scratch_dma_handle;
4766 #endif
4767
4768         ha->scratch_busy = FALSE;
4769         ha->req_first = NULL;
4770         ha->tid_cnt = MAX_HDRIVES;
4771         if (max_ids > 0 && max_ids < ha->tid_cnt)
4772                 ha->tid_cnt = max_ids;
4773         for (i = 0; i < GDTH_MAXCMDS; ++i)
4774                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4775         ha->scan_mode = rescan ? 0x10 : 0;
4776
4777         error = -ENODEV;
4778         if (!gdth_search_drives(ha)) {
4779                 printk("GDT-ISA: Error during device scan\n");
4780                 goto out_free_coal_stat;
4781         }
4782
4783         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4784                 hdr_channel = ha->bus_cnt;
4785         ha->virt_bus = hdr_channel;
4786
4787         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4788                 shp->max_cmd_len = 16;
4789
4790         shp->max_id      = ha->tid_cnt;
4791         shp->max_lun     = MAXLUN;
4792         shp->max_channel = ha->bus_cnt;
4793
4794         spin_lock_init(&ha->smp_lock);
4795         gdth_enable_int(ha);
4796
4797         error = scsi_add_host(shp, NULL);
4798         if (error)
4799                 goto out_free_coal_stat;
4800         list_add_tail(&ha->list, &gdth_instances);
4801         gdth_timer_init();
4802
4803         scsi_scan_host(shp);
4804
4805         return 0;
4806
4807  out_free_coal_stat:
4808 #ifdef INT_COAL
4809         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4810                                 ha->coal_stat, ha->coal_stat_phys);
4811  out_free_pmsg:
4812 #endif
4813         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4814                                 ha->pmsg, ha->msg_phys);
4815  out_free_pscratch:
4816         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4817                                 ha->pscratch, ha->scratch_phys);
4818  out_dec_counters:
4819         gdth_ctr_count--;
4820  out_free_irq:
4821         free_irq(ha->irq, ha);
4822  out_host_put:
4823         scsi_host_put(shp);
4824         return error;
4825 }
4826 #endif /* CONFIG_ISA */
4827
4828 #ifdef CONFIG_EISA
4829 static int __init gdth_eisa_probe_one(u16 eisa_slot)
4830 {
4831         struct Scsi_Host *shp;
4832         gdth_ha_str *ha;
4833         dma_addr_t scratch_dma_handle = 0;
4834         int error, i;
4835
4836         if (!gdth_search_eisa(eisa_slot))
4837                 return -ENXIO;
4838
4839         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4840         if (!shp)
4841                 return -ENOMEM;
4842         ha = shost_priv(shp);
4843
4844         error = -ENODEV;
4845         if (!gdth_init_eisa(eisa_slot,ha))
4846                 goto out_host_put;
4847
4848         /* controller found and initialized */
4849         printk("Configuring GDT-EISA HA at Slot %d IRQ %u\n",
4850                 eisa_slot >> 12, ha->irq);
4851
4852         error = request_irq(ha->irq, gdth_interrupt, IRQF_DISABLED, "gdth", ha);
4853         if (error) {
4854                 printk("GDT-EISA: Unable to allocate IRQ\n");
4855                 goto out_host_put;
4856         }
4857
4858         shp->unchecked_isa_dma = 0;
4859         shp->irq = ha->irq;
4860         shp->dma_channel = 0xff;
4861
4862         ha->hanum = gdth_ctr_count++;
4863         ha->shost = shp;
4864
4865         TRACE2(("EISA detect Bus 0: hanum %d\n", ha->hanum));
4866
4867         ha->pccb = &ha->cmdext;
4868         ha->ccb_phys = 0L;
4869
4870         error = -ENOMEM;
4871
4872         ha->pdev = NULL;
4873         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4874                                                 &scratch_dma_handle);
4875         if (!ha->pscratch)
4876                 goto out_free_irq;
4877         ha->scratch_phys = scratch_dma_handle;
4878
4879         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4880                                                 &scratch_dma_handle);
4881         if (!ha->pmsg)
4882                 goto out_free_pscratch;
4883         ha->msg_phys = scratch_dma_handle;
4884
4885 #ifdef INT_COAL
4886         ha->coal_stat = pci_alloc_consistent(ha->pdev,
4887                         sizeof(gdth_coal_status) * MAXOFFSETS,
4888                         &scratch_dma_handle);
4889         if (!ha->coal_stat)
4890                 goto out_free_pmsg;
4891         ha->coal_stat_phys = scratch_dma_handle;
4892 #endif
4893
4894         ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb,
4895                         sizeof(gdth_cmd_str), PCI_DMA_BIDIRECTIONAL);
4896         if (!ha->ccb_phys)
4897                 goto out_free_coal_stat;
4898
4899         ha->scratch_busy = FALSE;
4900         ha->req_first = NULL;
4901         ha->tid_cnt = MAX_HDRIVES;
4902         if (max_ids > 0 && max_ids < ha->tid_cnt)
4903                 ha->tid_cnt = max_ids;
4904         for (i = 0; i < GDTH_MAXCMDS; ++i)
4905                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4906         ha->scan_mode = rescan ? 0x10 : 0;
4907
4908         if (!gdth_search_drives(ha)) {
4909                 printk("GDT-EISA: Error during device scan\n");
4910                 error = -ENODEV;
4911                 goto out_free_ccb_phys;
4912         }
4913
4914         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4915                 hdr_channel = ha->bus_cnt;
4916         ha->virt_bus = hdr_channel;
4917
4918         if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4919                 shp->max_cmd_len = 16;
4920
4921         shp->max_id      = ha->tid_cnt;
4922         shp->max_lun     = MAXLUN;
4923         shp->max_channel = ha->bus_cnt;
4924
4925         spin_lock_init(&ha->smp_lock);
4926         gdth_enable_int(ha);
4927
4928         error = scsi_add_host(shp, NULL);
4929         if (error)
4930                 goto out_free_ccb_phys;
4931         list_add_tail(&ha->list, &gdth_instances);
4932         gdth_timer_init();
4933
4934         scsi_scan_host(shp);
4935
4936         return 0;
4937
4938  out_free_ccb_phys:
4939         pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str),
4940                         PCI_DMA_BIDIRECTIONAL);
4941  out_free_coal_stat:
4942 #ifdef INT_COAL
4943         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
4944                                 ha->coal_stat, ha->coal_stat_phys);
4945  out_free_pmsg:
4946 #endif
4947         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4948                                 ha->pmsg, ha->msg_phys);
4949  out_free_pscratch:
4950         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4951                                 ha->pscratch, ha->scratch_phys);
4952  out_free_irq:
4953         free_irq(ha->irq, ha);
4954         gdth_ctr_count--;
4955  out_host_put:
4956         scsi_host_put(shp);
4957         return error;
4958 }
4959 #endif /* CONFIG_EISA */
4960
4961 #ifdef CONFIG_PCI
4962 static int gdth_pci_probe_one(gdth_pci_str *pcistr, gdth_ha_str **ha_out)
4963 {
4964         struct Scsi_Host *shp;
4965         gdth_ha_str *ha;
4966         dma_addr_t scratch_dma_handle = 0;
4967         int error, i;
4968         struct pci_dev *pdev = pcistr->pdev;
4969
4970         *ha_out = NULL;
4971
4972         shp = scsi_host_alloc(&gdth_template, sizeof(gdth_ha_str));
4973         if (!shp)
4974                 return -ENOMEM;
4975         ha = shost_priv(shp);
4976
4977         error = -ENODEV;
4978         if (!gdth_init_pci(pdev, pcistr, ha))
4979                 goto out_host_put;
4980
4981         /* controller found and initialized */
4982         printk("Configuring GDT-PCI HA at %d/%d IRQ %u\n",
4983                 pdev->bus->number,
4984                 PCI_SLOT(pdev->devfn),
4985                 ha->irq);
4986
4987         error = request_irq(ha->irq, gdth_interrupt,
4988                                 IRQF_DISABLED|IRQF_SHARED, "gdth", ha);
4989         if (error) {
4990                 printk("GDT-PCI: Unable to allocate IRQ\n");
4991                 goto out_host_put;
4992         }
4993
4994         shp->unchecked_isa_dma = 0;
4995         shp->irq = ha->irq;
4996         shp->dma_channel = 0xff;
4997
4998         ha->hanum = gdth_ctr_count++;
4999         ha->shost = shp;
5000
5001         ha->pccb = &ha->cmdext;
5002         ha->ccb_phys = 0L;
5003
5004         error = -ENOMEM;
5005
5006         ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
5007                                                 &scratch_dma_handle);
5008         if (!ha->pscratch)
5009                 goto out_free_irq;
5010         ha->scratch_phys = scratch_dma_handle;
5011
5012         ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
5013                                         &scratch_dma_handle);
5014         if (!ha->pmsg)
5015                 goto out_free_pscratch;
5016         ha->msg_phys = scratch_dma_handle;
5017
5018 #ifdef INT_COAL
5019         ha->coal_stat = pci_alloc_consistent(ha->pdev,
5020                         sizeof(gdth_coal_status) * MAXOFFSETS,
5021                         &scratch_dma_handle);
5022         if (!ha->coal_stat)
5023                 goto out_free_pmsg;
5024         ha->coal_stat_phys = scratch_dma_handle;
5025 #endif
5026
5027         ha->scratch_busy = FALSE;
5028         ha->req_first = NULL;
5029         ha->tid_cnt = pdev->device >= 0x200 ? MAXID : MAX_HDRIVES;
5030         if (max_ids > 0 && max_ids < ha->tid_cnt)
5031                 ha->tid_cnt = max_ids;
5032         for (i = 0; i < GDTH_MAXCMDS; ++i)
5033                 ha->cmd_tab[i].cmnd = UNUSED_CMND;
5034         ha->scan_mode = rescan ? 0x10 : 0;
5035
5036         error = -ENODEV;
5037         if (!gdth_search_drives(ha)) {
5038                 printk("GDT-PCI %d: Error during device scan\n", ha->hanum);
5039                 goto out_free_coal_stat;
5040         }
5041
5042         if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
5043                 hdr_channel = ha->bus_cnt;
5044         ha->virt_bus = hdr_channel;
5045
5046         /* 64-bit DMA only supported from FW >= x.43 */
5047         if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) ||
5048             !ha->dma64_support) {
5049                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
5050                         printk(KERN_WARNING "GDT-PCI %d: "
5051                                 "Unable to set 32-bit DMA\n", ha->hanum);
5052                                 goto out_free_coal_stat;
5053                 }
5054         } else {
5055                 shp->max_cmd_len = 16;
5056                 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
5057                         printk("GDT-PCI %d: 64-bit DMA enabled\n", ha->hanum);
5058                 } else if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
5059                         printk(KERN_WARNING "GDT-PCI %d: "
5060                                 "Unable to set 64/32-bit DMA\n", ha->hanum);
5061                         goto out_free_coal_stat;
5062                 }
5063         }
5064
5065         shp->max_id      = ha->tid_cnt;
5066         shp->max_lun     = MAXLUN;
5067         shp->max_channel = ha->bus_cnt;
5068
5069         spin_lock_init(&ha->smp_lock);
5070         gdth_enable_int(ha);
5071
5072         error = scsi_add_host(shp, &pdev->dev);
5073         if (error)
5074                 goto out_free_coal_stat;
5075         list_add_tail(&ha->list, &gdth_instances);
5076
5077         pci_set_drvdata(ha->pdev, ha);
5078         gdth_timer_init();
5079
5080         scsi_scan_host(shp);
5081
5082         *ha_out = ha;
5083
5084         return 0;
5085
5086  out_free_coal_stat:
5087 #ifdef INT_COAL
5088         pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS,
5089                                 ha->coal_stat, ha->coal_stat_phys);
5090  out_free_pmsg:
5091 #endif
5092         pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5093                                 ha->pmsg, ha->msg_phys);
5094  out_free_pscratch:
5095         pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5096                                 ha->pscratch, ha->scratch_phys);
5097  out_free_irq:
5098         free_irq(ha->irq, ha);
5099         gdth_ctr_count--;
5100  out_host_put:
5101         scsi_host_put(shp);
5102         return error;
5103 }
5104 #endif /* CONFIG_PCI */
5105
5106 static void gdth_remove_one(gdth_ha_str *ha)
5107 {
5108         struct Scsi_Host *shp = ha->shost;
5109
5110         TRACE2(("gdth_remove_one()\n"));
5111
5112         scsi_remove_host(shp);
5113
5114         gdth_flush(ha);
5115
5116         if (ha->sdev) {
5117                 scsi_free_host_dev(ha->sdev);
5118                 ha->sdev = NULL;
5119         }
5120
5121         if (shp->irq)
5122                 free_irq(shp->irq,ha);
5123
5124 #ifdef CONFIG_ISA
5125         if (shp->dma_channel != 0xff)
5126                 free_dma(shp->dma_channel);
5127 #endif
5128 #ifdef INT_COAL
5129         if (ha->coal_stat)
5130                 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
5131                         MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
5132 #endif
5133         if (ha->pscratch)
5134                 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
5135                         ha->pscratch, ha->scratch_phys);
5136         if (ha->pmsg)
5137                 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
5138                         ha->pmsg, ha->msg_phys);
5139         if (ha->ccb_phys)
5140                 pci_unmap_single(ha->pdev,ha->ccb_phys,
5141                         sizeof(gdth_cmd_str),PCI_DMA_BIDIRECTIONAL);
5142
5143         scsi_host_put(shp);
5144 }
5145
5146 static int gdth_halt(struct notifier_block *nb, unsigned long event, void *buf)
5147 {
5148         gdth_ha_str *ha;
5149
5150         TRACE2(("gdth_halt() event %d\n", (int)event));
5151         if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
5152                 return NOTIFY_DONE;
5153
5154         list_for_each_entry(ha, &gdth_instances, list)
5155                 gdth_flush(ha);
5156
5157         return NOTIFY_OK;
5158 }
5159
5160 static struct notifier_block gdth_notifier = {
5161     gdth_halt, NULL, 0
5162 };
5163
5164 static int __init gdth_init(void)
5165 {
5166         if (disable) {
5167                 printk("GDT-HA: Controller driver disabled from"
5168                        " command line !\n");
5169                 return 0;
5170         }
5171
5172         printk("GDT-HA: Storage RAID Controller Driver. Version: %s\n",
5173                GDTH_VERSION_STR);
5174
5175         /* initializations */
5176         gdth_polling = TRUE;
5177         gdth_clear_events();
5178         init_timer(&gdth_timer);
5179
5180         /* As default we do not probe for EISA or ISA controllers */
5181         if (probe_eisa_isa) {
5182                 /* scanning for controllers, at first: ISA controller */
5183 #ifdef CONFIG_ISA
5184                 u32 isa_bios;
5185                 for (isa_bios = 0xc8000UL; isa_bios <= 0xd8000UL;
5186                                 isa_bios += 0x8000UL)
5187                         gdth_isa_probe_one(isa_bios);
5188 #endif
5189 #ifdef CONFIG_EISA
5190                 {
5191                         u16 eisa_slot;
5192                         for (eisa_slot = 0x1000; eisa_slot <= 0x8000;
5193                                                  eisa_slot += 0x1000)
5194                                 gdth_eisa_probe_one(eisa_slot);
5195                 }
5196 #endif
5197         }
5198
5199 #ifdef CONFIG_PCI
5200         /* scanning for PCI controllers */
5201         if (pci_register_driver(&gdth_pci_driver)) {
5202                 gdth_ha_str *ha;
5203
5204                 list_for_each_entry(ha, &gdth_instances, list)
5205                         gdth_remove_one(ha);
5206                 return -ENODEV;
5207         }
5208 #endif /* CONFIG_PCI */
5209
5210         TRACE2(("gdth_detect() %d controller detected\n", gdth_ctr_count));
5211
5212         major = register_chrdev(0,"gdth", &gdth_fops);
5213         register_reboot_notifier(&gdth_notifier);
5214         gdth_polling = FALSE;
5215         return 0;
5216 }
5217
5218 static void __exit gdth_exit(void)
5219 {
5220         gdth_ha_str *ha;
5221
5222         unregister_chrdev(major, "gdth");
5223         unregister_reboot_notifier(&gdth_notifier);
5224
5225 #ifdef GDTH_STATISTICS
5226         del_timer_sync(&gdth_timer);
5227 #endif
5228
5229 #ifdef CONFIG_PCI
5230         pci_unregister_driver(&gdth_pci_driver);
5231 #endif
5232
5233         list_for_each_entry(ha, &gdth_instances, list)
5234                 gdth_remove_one(ha);
5235 }
5236
5237 module_init(gdth_init);
5238 module_exit(gdth_exit);
5239
5240 #ifndef MODULE
5241 __setup("gdth=", option_setup);
5242 #endif