2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
22 #include <chipcommon.h>
25 #include "phy/phy_hal.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
35 * Indication for txflowcontrol that all priority bits in
36 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
41 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
43 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
45 /* watchdog timer, in unit of ms */
46 #define TIMER_INTERVAL_WATCHDOG 1000
47 /* radio monitor timer, in unit of ms */
48 #define TIMER_INTERVAL_RADIOCHK 800
50 /* Max MPC timeout, in unit of watchdog */
51 #ifndef BRCMS_MPC_MAX_DELAYCNT
52 #define BRCMS_MPC_MAX_DELAYCNT 10
55 /* Min MPC timeout, in unit of watchdog */
56 #define BRCMS_MPC_MIN_DELAYCNT 1
57 #define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */
59 /* beacon interval, in unit of 1024TU */
60 #define BEACON_INTERVAL_DEFAULT 100
61 /* DTIM interval, in unit of beacon interval */
62 #define DTIM_INTERVAL_DEFAULT 3
64 /* Scale down delays to accommodate QT slow speed */
65 /* beacon interval, in unit of 1024TU */
66 #define BEACON_INTERVAL_DEF_QT 20
67 /* DTIM interval, in unit of beacon interval */
68 #define DTIM_INTERVAL_DEF_QT 1
70 #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */
72 /* n-mode support capability */
73 /* 2x2 includes both 1x1 & 2x2 devices
74 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
75 * control it independently
81 /* define 11n feature disable flags */
82 #define WLFEATURE_DISABLE_11N 0x00000001
83 #define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
84 #define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
85 #define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
86 #define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
87 #define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
88 #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
89 #define WLFEATURE_DISABLE_11N_GF 0x00000080
91 #define EDCF_ACI_MASK 0x60
92 #define EDCF_ACI_SHIFT 5
93 #define EDCF_ECWMIN_MASK 0x0f
94 #define EDCF_ECWMAX_SHIFT 4
95 #define EDCF_AIFSN_MASK 0x0f
96 #define EDCF_AIFSN_MAX 15
97 #define EDCF_ECWMAX_MASK 0xf0
99 #define EDCF_AC_BE_TXOP_STA 0x0000
100 #define EDCF_AC_BK_TXOP_STA 0x0000
101 #define EDCF_AC_VO_ACI_STA 0x62
102 #define EDCF_AC_VO_ECW_STA 0x32
103 #define EDCF_AC_VI_ACI_STA 0x42
104 #define EDCF_AC_VI_ECW_STA 0x43
105 #define EDCF_AC_BK_ECW_STA 0xA4
106 #define EDCF_AC_VI_TXOP_STA 0x005e
107 #define EDCF_AC_VO_TXOP_STA 0x002f
108 #define EDCF_AC_BE_ACI_STA 0x03
109 #define EDCF_AC_BE_ECW_STA 0xA4
110 #define EDCF_AC_BK_ACI_STA 0x27
111 #define EDCF_AC_VO_TXOP_AP 0x002f
113 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
114 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
116 #define APHY_SYMBOL_TIME 4
117 #define APHY_PREAMBLE_TIME 16
118 #define APHY_SIGNAL_TIME 4
119 #define APHY_SIFS_TIME 16
120 #define APHY_SERVICE_NBITS 16
121 #define APHY_TAIL_NBITS 6
122 #define BPHY_SIFS_TIME 10
123 #define BPHY_PLCP_SHORT_TIME 96
125 #define PREN_PREAMBLE 24
126 #define PREN_MM_EXT 12
127 #define PREN_PREAMBLE_EXT 4
129 #define DOT11_MAC_HDR_LEN 24
130 #define DOT11_ACK_LEN 10
131 #define DOT11_BA_LEN 4
132 #define DOT11_OFDM_SIGNAL_EXTENSION 6
133 #define DOT11_MIN_FRAG_LEN 256
134 #define DOT11_RTS_LEN 16
135 #define DOT11_CTS_LEN 10
136 #define DOT11_BA_BITMAP_LEN 128
137 #define DOT11_MIN_BEACON_PERIOD 1
138 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
139 #define DOT11_MAXNUMFRAGS 16
140 #define DOT11_MAX_FRAG_LEN 2346
142 #define BPHY_PLCP_TIME 192
143 #define RIFS_11N_TIME 2
146 #define WME_SUBTYPE_PARAM_IE 1
148 #define WME_OUI "\x00\x50\xf2"
155 #define BCN_TMPL_LEN 512 /* length of the BCN template area */
157 /* brcms_bss_info flag bit values */
158 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
160 /* Flags used in brcms_c_txq_info.stopped */
161 /* per prio flow control bits */
162 #define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF
163 /* stop txq enqueue for packet drain */
164 #define TXQ_STOP_FOR_PKT_DRAIN 0x00000100
165 /* stop txq enqueue for ampdu flow control */
166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200
168 #define BRCMS_HWRXOFF 38 /* chip rx buffer offset */
170 /* Find basic rate for a given rate */
171 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
173 if (is_mcs_rate(rspec))
174 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
176 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
179 static u16 frametype(u32 rspec, u8 mimoframe)
181 if (is_mcs_rate(rspec))
183 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
186 /* rfdisable delay timer 500 ms, runs of ALP clock */
187 #define RFDISABLE_DEFAULT 10000000
189 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
191 /* precedences numbers for wlc queues. These are twice as may levels as
193 * Odd numbers are used for HI priority traffic at same precedence levels
194 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
197 #define _BRCMS_PREC_NONE 0 /* None = - */
198 #define _BRCMS_PREC_BK 2 /* BK - Background */
199 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
200 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
201 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
202 #define _BRCMS_PREC_VI 10 /* Vi - Video */
203 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
204 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
206 /* The BSS is generating beacons in HW */
207 #define BRCMS_BSSCFG_HW_BCN 0x20
209 #define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */
210 #define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us */
211 #define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us */
212 #define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */
214 #define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */
216 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */
218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
219 #define EDCF_SHORT_S 0
221 #define EDCF_LONG_S 8
222 #define EDCF_LFB_S 12
223 #define EDCF_SHORT_M BITFIELD_MASK(4)
224 #define EDCF_SFB_M BITFIELD_MASK(4)
225 #define EDCF_LONG_M BITFIELD_MASK(4)
226 #define EDCF_LFB_M BITFIELD_MASK(4)
228 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
229 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
230 #define RETRY_LONG_DEF 4 /* Default Long retry count */
231 #define RETRY_SHORT_FB 3 /* Short count for fallback rate */
232 #define RETRY_LONG_FB 2 /* Long count for fallback rate */
234 #define APHY_CWMIN 15
235 #define PHY_CWMAX 1023
237 #define EDCF_AIFSN_MIN 1
239 #define FRAGNUM_MASK 0xF
241 #define APHY_SLOT_TIME 9
242 #define BPHY_SLOT_TIME 20
244 #define WL_SPURAVOID_OFF 0
245 #define WL_SPURAVOID_ON1 1
246 #define WL_SPURAVOID_ON2 2
248 /* invalid core flags, use the saved coreflags */
249 #define BRCMS_USE_COREFLAGS 0xffffffff
251 /* values for PLCPHdr_override */
252 #define BRCMS_PLCP_AUTO -1
253 #define BRCMS_PLCP_SHORT 0
254 #define BRCMS_PLCP_LONG 1
256 /* values for g_protection_override and n_protection_override */
257 #define BRCMS_PROTECTION_AUTO -1
258 #define BRCMS_PROTECTION_OFF 0
259 #define BRCMS_PROTECTION_ON 1
260 #define BRCMS_PROTECTION_MMHDR_ONLY 2
261 #define BRCMS_PROTECTION_CTS_ONLY 3
263 /* values for g_protection_control and n_protection_control */
264 #define BRCMS_PROTECTION_CTL_OFF 0
265 #define BRCMS_PROTECTION_CTL_LOCAL 1
266 #define BRCMS_PROTECTION_CTL_OVERLAP 2
268 /* values for n_protection */
269 #define BRCMS_N_PROTECTION_OFF 0
270 #define BRCMS_N_PROTECTION_OPTIONAL 1
271 #define BRCMS_N_PROTECTION_20IN40 2
272 #define BRCMS_N_PROTECTION_MIXEDMODE 3
274 /* values for band specific 40MHz capabilities */
275 #define BRCMS_N_BW_20ALL 0
276 #define BRCMS_N_BW_40ALL 1
277 #define BRCMS_N_BW_20IN2G_40IN5G 2
279 /* bitflags for SGI support (sgi_rx iovar) */
280 #define BRCMS_N_SGI_20 0x01
281 #define BRCMS_N_SGI_40 0x02
283 /* defines used by the nrate iovar */
284 /* MSC in use,indicates b0-6 holds an mcs */
285 #define NRATE_MCS_INUSE 0x00000080
287 #define NRATE_RATE_MASK 0x0000007f
288 /* stf mode mask: siso, cdd, stbc, sdm */
289 #define NRATE_STF_MASK 0x0000ff00
291 #define NRATE_STF_SHIFT 8
292 /* bit indicates override both rate & mode */
293 #define NRATE_OVERRIDE 0x80000000
294 /* bit indicate to override mcs only */
295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
296 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
297 #define NRATE_SGI_SHIFT 23 /* sgi mode */
298 #define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
299 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
301 #define NRATE_STF_SISO 0 /* stf mode SISO */
302 #define NRATE_STF_CDD 1 /* stf mode CDD */
303 #define NRATE_STF_STBC 2 /* stf mode STBC */
304 #define NRATE_STF_SDM 3 /* stf mode SDM */
306 #define MAX_DMA_SEGS 4
308 /* Max # of entries in Tx FIFO based on 4kb page size */
310 /* Max # of entries in Rx FIFO based on 4kb page size */
313 /* try to keep this # rbufs posted to the chip */
314 #define NRXBUFPOST 32
316 /* data msg txq hiwat mark */
317 #define BRCMS_DATAHIWAT 50
319 /* bounded rx loops */
320 #define RXBND 8 /* max # frames to process in brcms_c_recv() */
321 #define TXSBND 8 /* max # tx status to process in wlc_txstatus() */
324 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
326 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
329 * The following table lists the buffer memory allocated to xmt fifos in HW.
330 * the size is in units of 256bytes(one block), total size is HW dependent
331 * ucode has default fifo partition, sw can overwrite if necessary
333 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
334 * the twiki is updated before making changes.
337 /* Starting corerev for the fifo size table */
338 #define XMTFIFOTBL_STARTREV 20
346 /* currently the best mechanism for determining SIFS is the band in use */
347 static u16 get_sifs(struct brcms_band *band)
349 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
355 * Detect Card removed.
356 * Even checking an sbconfig register read will not false trigger when the core
357 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
358 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
359 * reg with fixed 0/1 pattern (some platforms return all 0).
360 * If clocks are present, call the sb routine which will figure out if the
363 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
366 return ai_deviceremoved(wlc->hw->sih);
367 return (R_REG(&wlc->hw->regs->maccontrol) &
368 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
371 /* sum the individual fifo tx pending packet counts */
372 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
374 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
375 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
378 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
380 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
383 static int brcms_chspec_bw(u16 chanspec)
385 if (CHSPEC_IS40(chanspec))
387 if (CHSPEC_IS20(chanspec))
393 /* dup state between BMAC(struct brcms_hardware) and HIGH(struct brcms_c_info)
395 struct brcms_b_state {
396 u32 machwcap; /* mac hw capibility */
397 u32 preamble_ovr; /* preamble override */
400 struct edcf_acparam {
406 const u8 prio2fifo[NUMPRIO] = {
407 TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
408 TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
409 TX_AC_BK_FIFO, /* 2 -- AC_BK Background */
410 TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */
411 TX_AC_VI_FIFO, /* 4 CL AC_VI Video */
412 TX_AC_VI_FIFO, /* 5 VI AC_VI Video */
413 TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */
414 TX_AC_VO_FIFO /* 7 NC AC_VO Voice */
418 uint brcm_msg_level =
425 /* TX FIFO number to WME/802.1E Access Category */
426 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
428 /* WME/802.1E Access Category to TX FIFO number */
429 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
431 /* 802.1D Priority to precedence queue mapping */
432 const u8 wlc_prio2prec_map[] = {
433 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
434 _BRCMS_PREC_BK, /* 1 BK - Background */
435 _BRCMS_PREC_NONE, /* 2 None = - */
436 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
437 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
438 _BRCMS_PREC_VI, /* 5 Vi - Video */
439 _BRCMS_PREC_VO, /* 6 Vo - Voice */
440 _BRCMS_PREC_NC, /* 7 NC - Network Control */
443 static const u16 xmtfifo_sz[][NFIFO] = {
444 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
445 {20, 192, 192, 21, 17, 5},
446 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
447 {9, 58, 22, 14, 14, 5},
448 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
449 {20, 192, 192, 21, 17, 5},
450 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
451 {20, 192, 192, 21, 17, 5},
452 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
453 {9, 58, 22, 14, 14, 5},
456 static const u8 acbitmap2maxprio[] = {
457 PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK,
458 PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI,
459 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO,
460 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO
464 static const char * const fifo_names[] = {
465 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
467 static const char fifo_names[6][0];
471 /* pointer to most recently allocated wl/wlc */
472 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
475 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
480 kfree(cfg->current_bss);
484 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
489 brcms_c_bsscfg_mfree(wlc->bsscfg);
491 kfree(wlc->modulecb);
492 kfree(wlc->default_bss);
493 kfree(wlc->protection);
495 kfree(wlc->bandstate[0]);
496 kfree(wlc->corestate->macstat_snapshot);
497 kfree(wlc->corestate);
498 kfree(wlc->hw->bandstate[0]);
506 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
508 struct brcms_bss_cfg *cfg;
510 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
514 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
515 if (cfg->current_bss == NULL)
521 brcms_c_bsscfg_mfree(cfg);
525 static struct brcms_c_info *
526 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
528 struct brcms_c_info *wlc;
530 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
536 /* allocate struct brcms_c_pub state structure */
537 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
538 if (wlc->pub == NULL) {
544 /* allocate struct brcms_hardware state structure */
546 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
547 if (wlc->hw == NULL) {
553 wlc->hw->bandstate[0] =
554 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
555 if (wlc->hw->bandstate[0] == NULL) {
561 for (i = 1; i < MAXBANDS; i++)
562 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
563 ((unsigned long)wlc->hw->bandstate[0] +
564 (sizeof(struct brcms_hw_band) * i));
568 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
569 if (wlc->modulecb == NULL) {
574 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
575 if (wlc->default_bss == NULL) {
580 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
581 if (wlc->bsscfg == NULL) {
586 wlc->protection = kzalloc(sizeof(struct brcms_protection),
588 if (wlc->protection == NULL) {
593 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
594 if (wlc->stf == NULL) {
600 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
601 if (wlc->bandstate[0] == NULL) {
607 for (i = 1; i < MAXBANDS; i++)
608 wlc->bandstate[i] = (struct brcms_band *)
609 ((unsigned long)wlc->bandstate[0]
610 + (sizeof(struct brcms_band)*i));
613 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
614 if (wlc->corestate == NULL) {
619 wlc->corestate->macstat_snapshot =
620 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
621 if (wlc->corestate->macstat_snapshot == NULL) {
629 brcms_c_detach_mfree(wlc);
634 * Update the slot timing for standard 11b/g (20us slots)
635 * or shortslot 11g (9us slots)
636 * The PSM needs to be suspended for this call.
638 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
641 struct d11regs *regs;
646 /* 11g short slot: 11a timing */
647 W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
648 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
650 /* 11g long slot: 11b timing */
651 W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
652 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
656 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
657 const struct d11init *inits)
665 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
667 base = (u8 *)wlc_hw->regs;
669 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
670 size = le16_to_cpu(inits[i].size);
671 addr = base + le16_to_cpu(inits[i].addr);
672 value = le32_to_cpu(inits[i].value);
674 W_REG((u16 *)addr, value);
676 W_REG((u32 *)addr, value);
682 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
686 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
690 for (idx = 0; idx < MHFMAX; idx++)
691 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
694 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
696 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
697 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
699 /* init microcode host flags */
700 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
702 /* do band-specific ucode IHR, SHM, and SCR inits */
703 if (D11REV_IS(wlc_hw->corerev, 23)) {
704 if (BRCMS_ISNPHY(wlc_hw->band))
705 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
707 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
708 " %d\n", __func__, wlc_hw->unit,
711 if (D11REV_IS(wlc_hw->corerev, 24)) {
712 if (BRCMS_ISLCNPHY(wlc_hw->band))
713 brcms_c_write_inits(wlc_hw,
714 ucode->d11lcn0bsinitvals24);
716 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
717 " core rev %d\n", __func__,
718 wlc_hw->unit, wlc_hw->corerev);
720 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
721 __func__, wlc_hw->unit, wlc_hw->corerev);
726 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
728 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
730 wlc_hw->phyclk = clk;
732 if (OFF == clk) { /* clear gmode bit, put phy into reset */
734 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
735 (SICF_PRST | SICF_FGC));
737 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
740 } else { /* take phy out of reset */
742 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
744 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
750 /* switch to new band but leave it inactive */
751 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
753 struct brcms_hardware *wlc_hw = wlc->hw;
756 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
758 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
760 /* disable interrupts */
761 macintmask = brcms_intrsoff(wlc->wl);
764 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
766 brcms_b_core_phy_clk(wlc_hw, OFF);
768 brcms_c_setxband(wlc_hw, bandunit);
773 /* Process received frames */
775 * Return true if more frames need to be processed. false otherwise.
776 * Param 'bound' indicates max. # frames to process before break out.
779 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
782 struct sk_buff *head = NULL;
783 struct sk_buff *tail = NULL;
785 uint bound_limit = bound ? RXBND : -1;
787 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
788 /* gather received frames */
789 while ((p = dma_rx(wlc_hw->di[fifo]))) {
798 /* !give others some time to run! */
799 if (++n >= bound_limit)
803 /* post more rbufs */
804 dma_rxfill(wlc_hw->di[fifo]);
806 /* process each frame */
807 while ((p = head) != NULL) {
808 struct d11rxhdr_le *rxh_le;
809 struct d11rxhdr *rxh;
813 rxh_le = (struct d11rxhdr_le *)p->data;
814 rxh = (struct d11rxhdr *)p->data;
816 /* fixup rx header endianness */
817 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
818 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
819 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
820 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
821 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
822 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
823 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
824 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
825 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
826 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
827 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
829 brcms_c_recv(wlc_hw->wlc, p);
832 return n >= bound_limit;
835 /* process an individual struct tx_status */
837 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
842 struct scb *scb = NULL;
844 int tx_rts, tx_frame_count, tx_rts_count;
845 uint totlen, supr_status;
847 struct ieee80211_hdr *h;
849 struct ieee80211_tx_info *tx_info;
850 struct ieee80211_tx_rate *txrate;
853 /* discard intermediate indications for ucode with one legitimate case:
854 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
855 * but the subsequent tx of DATA failed. so it will start rts/cts
856 * from the beginning (resetting the rts transmission count)
858 if (!(txs->status & TX_STATUS_AMPDU)
859 && (txs->status & TX_STATUS_INTERMEDIATE)) {
860 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
865 queue = txs->frameid & TXFID_QUEUE_MASK;
866 if (queue >= NFIFO) {
871 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
875 txh = (struct d11txh *) (p->data);
876 mcl = le16_to_cpu(txh->MacTxControlLow);
879 if (brcm_msg_level & LOG_ERROR_VAL) {
880 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
881 txs->phyerr, txh->MainRates);
882 brcms_c_print_txdesc(txh);
884 brcms_c_print_txstatus(txs);
887 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
889 tx_info = IEEE80211_SKB_CB(p);
890 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
892 if (tx_info->control.sta)
895 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
896 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
900 supr_status = txs->status & TX_STATUS_SUPR_MASK;
901 if (supr_status == TX_STATUS_SUPR_BADCH)
903 "%s: Pkt tx suppressed, possibly channel %d\n",
904 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
906 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
908 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
910 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
912 lastframe = !ieee80211_has_morefrags(h->frame_control);
915 wiphy_err(wlc->wiphy, "Not last frame!\n");
918 * Set information to be consumed by Minstrel ht.
920 * The "fallback limit" is the number of tx attempts a given
921 * MPDU is sent at the "primary" rate. Tx attempts beyond that
922 * limit are sent at the "secondary" rate.
923 * A 'short frame' does not exceed RTS treshold.
925 u16 sfbl, /* Short Frame Rate Fallback Limit */
926 lfbl, /* Long Frame Rate Fallback Limit */
929 if (queue < AC_COUNT) {
930 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
932 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
939 txrate = tx_info->status.rates;
940 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
945 ieee80211_tx_info_clear_status(tx_info);
947 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
949 * rate selection requested a fallback rate
952 txrate[0].count = fbl;
953 txrate[1].count = tx_frame_count - fbl;
956 * rate selection did not request fallback rate, or
959 txrate[0].count = tx_frame_count;
961 * rc80211_minstrel.c:minstrel_tx_status() expects
962 * unused rates to be marked with idx = -1
968 /* clear the rest of the rates */
969 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
974 if (txs->status & TX_STATUS_ACK_RCV)
975 tx_info->flags |= IEEE80211_TX_STAT_ACK;
978 totlen = brcmu_pkttotlen(p);
981 brcms_c_txfifo_complete(wlc, queue, 1);
986 /* remove PLCP & Broadcom tx descriptor header */
987 skb_pull(p, D11_PHY_HDR_LEN);
988 skb_pull(p, D11_TXH_LEN);
989 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
991 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
992 "tx_status\n", __func__);
999 brcmu_pkt_buf_free_skb(p);
1006 brcms_b_dotxstatus(struct brcms_hardware *wlc_hw, struct tx_status *txs)
1008 /* discard intermediate indications for ucode with one legitimate case:
1009 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
1010 * but the subsequent tx of DATA failed. so it will start rts/cts from
1011 * the beginning (resetting the rts transmission count)
1013 if (!(txs->status & TX_STATUS_AMPDU)
1014 && (txs->status & TX_STATUS_INTERMEDIATE))
1017 return brcms_c_dotxstatus(wlc_hw->wlc, txs);
1020 /* process tx completion events in BMAC
1021 * Return true if more tx status need to be processed. false otherwise.
1024 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1026 bool morepending = false;
1027 struct brcms_c_info *wlc = wlc_hw->wlc;
1028 struct d11regs *regs;
1029 struct tx_status txstatus, *txs;
1033 * Param 'max_tx_num' indicates max. # tx status to process before
1036 uint max_tx_num = bound ? TXSBND : -1;
1038 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1041 regs = wlc_hw->regs;
1043 && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) {
1045 if (s1 == 0xffffffff) {
1046 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1047 wlc_hw->unit, __func__);
1051 s2 = R_REG(®s->frmtxstatus2);
1053 txs->status = s1 & TXS_STATUS_MASK;
1054 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1055 txs->sequence = s2 & TXS_SEQ_MASK;
1056 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1057 txs->lasttxtime = 0;
1059 *fatal = brcms_b_dotxstatus(wlc_hw, txs);
1061 /* !give others some time to run! */
1062 if (++n >= max_tx_num)
1069 if (n >= max_tx_num)
1072 if (!pktq_empty(&wlc->pkt_queue->q))
1073 brcms_c_send_q(wlc);
1078 /* brcms_b_tx_fifo_suspended:
1079 * Check the MAC's tx suspend status for a tx fifo.
1081 * When the MAC acknowledges a tx suspend, it indicates that no more
1082 * packets will be transmitted out the radio. This is independent of
1083 * DMA channel suspension---the DMA may have finished suspending, or may still
1084 * be pulling data into a tx fifo, by the time the MAC acks the suspend
1087 static bool brcms_b_tx_fifo_suspended(struct brcms_hardware *wlc_hw,
1090 /* check that a suspend has been requested and is no longer pending */
1093 * for DMA mode, the suspend request is set in xmtcontrol of the DMA
1094 * engine, and the tx fifo suspend at the lower end of the MAC is
1095 * acknowledged in the chnstatus register.
1097 * The tx fifo suspend completion is independent of the DMA suspend
1098 * completion and may be acked before or after the DMA is suspended.
1100 if (dma_txsuspended(wlc_hw->di[tx_fifo]) &&
1101 (R_REG(&wlc_hw->regs->chnstatus) &
1102 (1 << tx_fifo)) == 0)
1108 /* second-level interrupt processing
1109 * Return true if another dpc needs to be re-scheduled. false otherwise.
1110 * Param 'bounded' indicates if applicable loops should be bounded.
1112 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
1115 struct brcms_hardware *wlc_hw = wlc->hw;
1116 struct d11regs *regs = wlc_hw->regs;
1118 struct wiphy *wiphy = wlc->wiphy;
1120 if (brcms_deviceremoved(wlc)) {
1121 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
1123 brcms_down(wlc->wl);
1127 /* grab and clear the saved software intstatus bits */
1128 macintstatus = wlc->macintstatus;
1129 wlc->macintstatus = 0;
1131 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
1132 wlc_hw->unit, macintstatus);
1134 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
1137 if (macintstatus & MI_TFS) {
1138 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
1139 wlc->macintstatus |= MI_TFS;
1141 wiphy_err(wiphy, "MI_TFS: fatal\n");
1146 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
1149 /* ATIM window end */
1150 if (macintstatus & MI_ATIMWINEND) {
1151 BCMMSG(wlc->wiphy, "end of ATIM window\n");
1152 OR_REG(®s->maccommand, wlc->qvalid);
1157 * received data or control frame, MI_DMAINT is
1158 * indication of RX_FIFO interrupt
1160 if (macintstatus & MI_DMAINT)
1161 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
1162 wlc->macintstatus |= MI_DMAINT;
1164 /* TX FIFO suspend/flush completion */
1165 if (macintstatus & MI_TXSTOP)
1166 brcms_b_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO);
1168 /* noise sample collected */
1169 if (macintstatus & MI_BG_NOISE)
1170 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
1172 if (macintstatus & MI_GP0) {
1173 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
1174 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
1176 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
1177 __func__, wlc_hw->sih->chip,
1178 wlc_hw->sih->chiprev);
1180 brcms_init(wlc->wl);
1183 /* gptimer timeout */
1184 if (macintstatus & MI_TO)
1185 W_REG(®s->gptimer, 0);
1187 if (macintstatus & MI_RFDISABLE) {
1188 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
1189 " RF Disable Input\n", wlc_hw->unit);
1190 brcms_rfkill_set_hw_state(wlc->wl);
1193 /* send any enq'd tx packets. Just makes sure to jump start tx */
1194 if (!pktq_empty(&wlc->pkt_queue->q))
1195 brcms_c_send_q(wlc);
1197 /* it isn't done and needs to be resched if macintstatus is non-zero */
1198 return wlc->macintstatus != 0;
1201 brcms_init(wlc->wl);
1202 return wlc->macintstatus != 0;
1205 static int brcms_b_state_get(struct brcms_hardware *wlc_hw,
1206 struct brcms_b_state *state)
1208 state->machwcap = wlc_hw->machwcap;
1213 /* set initial host flags value */
1215 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1217 struct brcms_hardware *wlc_hw = wlc->hw;
1219 memset(mhfs, 0, MHFMAX * sizeof(u16));
1221 mhfs[MHF2] |= mhf2_init;
1223 /* prohibit use of slowclock on multifunction boards */
1224 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1225 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1227 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1228 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1229 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1233 static struct dma64regs *
1234 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1236 if (direction == DMA_TX)
1237 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1238 return &(hw->regs->fifo64regs[fifonum].dmarcv);
1241 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1246 * ucode host flag 2 needed for pio mode, independent of band and fifo
1249 struct brcms_hardware *wlc_hw = wlc->hw;
1250 uint unit = wlc_hw->unit;
1251 struct wiphy *wiphy = wlc->wiphy;
1253 /* name and offsets for dma_attach */
1254 snprintf(name, sizeof(name), "wl%d", unit);
1256 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1257 int dma_attach_err = 0;
1261 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1262 * RX: RX_FIFO (RX data packets)
1264 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1265 (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1266 NULL), dmareg(wlc_hw, DMA_RX, 0),
1267 (wme ? NTXD : 0), NRXD,
1268 RXBUFSZ, -1, NRXBUFPOST,
1269 BRCMS_HWRXOFF, &brcm_msg_level);
1270 dma_attach_err |= (NULL == wlc_hw->di[0]);
1274 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1275 * (legacy) TX_DATA_FIFO (TX data packets)
1278 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1279 dmareg(wlc_hw, DMA_TX, 1), NULL,
1280 NTXD, 0, 0, -1, 0, 0,
1282 dma_attach_err |= (NULL == wlc_hw->di[1]);
1286 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1289 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1290 dmareg(wlc_hw, DMA_TX, 2), NULL,
1291 NTXD, 0, 0, -1, 0, 0,
1293 dma_attach_err |= (NULL == wlc_hw->di[2]);
1296 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1297 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1299 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1300 dmareg(wlc_hw, DMA_TX, 3),
1301 NULL, NTXD, 0, 0, -1,
1302 0, 0, &brcm_msg_level);
1303 dma_attach_err |= (NULL == wlc_hw->di[3]);
1304 /* Cleaner to leave this as if with AP defined */
1306 if (dma_attach_err) {
1307 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1312 /* get pointer to dma engine tx flow control variable */
1313 for (i = 0; i < NFIFO; i++)
1315 wlc_hw->txavail[i] =
1316 (uint *) dma_getvar(wlc_hw->di[i],
1320 /* initial ucode host flags */
1321 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1326 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1330 for (j = 0; j < NFIFO; j++) {
1331 if (wlc_hw->di[j]) {
1332 dma_detach(wlc_hw->di[j]);
1333 wlc_hw->di[j] = NULL;
1339 * Initialize brcms_c_info default values ...
1340 * may get overrides later in this function
1341 * BMAC_NOTES, move low out and resolve the dangling ones
1343 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1345 struct brcms_c_info *wlc = wlc_hw->wlc;
1347 /* set default sw macintmask value */
1348 wlc->defmacintmask = DEF_MACINTMASK;
1350 /* various 802.11g modes */
1351 wlc_hw->shortslot = false;
1353 wlc_hw->SFBL = RETRY_SHORT_FB;
1354 wlc_hw->LFBL = RETRY_LONG_FB;
1356 /* default mac retry limits */
1357 wlc_hw->SRL = RETRY_SHORT_DEF;
1358 wlc_hw->LRL = RETRY_LONG_DEF;
1359 wlc_hw->chanspec = ch20mhz_chspec(1);
1362 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1364 /* delay before first read of ucode state */
1367 /* wait until ucode is no longer asleep */
1368 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1369 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1372 static void brcms_b_hw_etheraddr(struct brcms_hardware *wlc_hw, u8 *ea)
1374 memcpy(ea, wlc_hw->etheraddr, ETH_ALEN);
1377 static int brcms_b_bandtype(struct brcms_hardware *wlc_hw)
1379 return wlc_hw->band->bandtype;
1382 /* control chip clock to save power, enable dynamic clock or force fast clock */
1383 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1385 if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1386 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1387 * on backplane, but mac core will still run on ALP(not HT) when
1388 * it enters powersave mode, which means the FCA bit may not be
1389 * set. Should wakeup mac if driver wants it to run on HT.
1393 if (mode == CLK_FAST) {
1394 OR_REG(&wlc_hw->regs->clk_ctl_st,
1401 clk_ctl_st) & CCS_HTAVAIL) == 0),
1402 PMU_MAX_TRANSITION_DLY);
1405 clk_ctl_st) & CCS_HTAVAIL));
1407 if ((wlc_hw->sih->pmurev == 0) &&
1410 clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1413 clk_ctl_st) & CCS_HTAVAIL)
1415 PMU_MAX_TRANSITION_DLY);
1416 AND_REG(&wlc_hw->regs->clk_ctl_st,
1420 wlc_hw->forcefastclk = (mode == CLK_FAST);
1423 /* old chips w/o PMU, force HT through cc,
1424 * then use FCA to verify mac is running fast clock
1427 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1429 /* check fast clock is available (if core is not in reset) */
1430 if (wlc_hw->forcefastclk && wlc_hw->clk)
1431 WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1435 * keep the ucode wake bit on if forcefastclk is on since we
1436 * do not want ucode to put us back to slow clock when it dozes
1437 * for PM mode. Code below matches the wake override bit with
1438 * current forcefastclk state. Only setting bit in wake_override
1439 * instead of waking ucode immediately since old code had this
1440 * behavior. Older code set wlc->forcefastclk but only had the
1441 * wake happen if the wakup_ucode work (protected by an up
1442 * check) was executed just below.
1444 if (wlc_hw->forcefastclk)
1445 mboolset(wlc_hw->wake_override,
1446 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1448 mboolclr(wlc_hw->wake_override,
1449 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1453 /* set or clear ucode host flag bits
1454 * it has an optimization for no-change write
1455 * it only writes through shared memory when the core has clock;
1456 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1459 * bands values are: BRCM_BAND_AUTO <--- Current band only
1460 * BRCM_BAND_5G <--- 5G band only
1461 * BRCM_BAND_2G <--- 2G band only
1462 * BRCM_BAND_ALL <--- All bands
1465 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1469 u16 addr[MHFMAX] = {
1470 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1473 struct brcms_hw_band *band;
1475 if ((val & ~mask) || idx >= MHFMAX)
1476 return; /* error condition */
1479 /* Current band only or all bands,
1480 * then set the band to current band
1482 case BRCM_BAND_AUTO:
1484 band = wlc_hw->band;
1487 band = wlc_hw->bandstate[BAND_5G_INDEX];
1490 band = wlc_hw->bandstate[BAND_2G_INDEX];
1493 band = NULL; /* error condition */
1497 save = band->mhfs[idx];
1498 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1500 /* optimization: only write through if changed, and
1501 * changed band is the current band
1503 if (wlc_hw->clk && (band->mhfs[idx] != save)
1504 && (band == wlc_hw->band))
1505 brcms_b_write_shm(wlc_hw, addr[idx],
1506 (u16) band->mhfs[idx]);
1509 if (bands == BRCM_BAND_ALL) {
1510 wlc_hw->bandstate[0]->mhfs[idx] =
1511 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1512 wlc_hw->bandstate[1]->mhfs[idx] =
1513 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1517 /* set the maccontrol register to desired reset state and
1518 * initialize the sw cache of the register
1520 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1522 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1523 wlc_hw->maccontrol = 0;
1524 wlc_hw->suspended_fifos = 0;
1525 wlc_hw->wake_override = 0;
1526 wlc_hw->mute_override = 0;
1527 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1531 * write the software state of maccontrol and
1532 * overrides to the maccontrol register
1534 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1536 u32 maccontrol = wlc_hw->maccontrol;
1538 /* OR in the wake bit if overridden */
1539 if (wlc_hw->wake_override)
1540 maccontrol |= MCTL_WAKE;
1542 /* set AP and INFRA bits for mute if needed */
1543 if (wlc_hw->mute_override) {
1544 maccontrol &= ~(MCTL_AP);
1545 maccontrol |= MCTL_INFRA;
1548 W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1551 /* set or clear maccontrol bits */
1552 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1558 return; /* error condition */
1559 maccontrol = wlc_hw->maccontrol;
1560 new_maccontrol = (maccontrol & ~mask) | val;
1562 /* if the new maccontrol value is the same as the old, nothing to do */
1563 if (new_maccontrol == maccontrol)
1566 /* something changed, cache the new value */
1567 wlc_hw->maccontrol = new_maccontrol;
1569 /* write the new values with overrides applied */
1570 brcms_c_mctrl_write(wlc_hw);
1573 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1576 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1577 mboolset(wlc_hw->wake_override, override_bit);
1581 mboolset(wlc_hw->wake_override, override_bit);
1583 brcms_c_mctrl_write(wlc_hw);
1584 brcms_b_wait_for_wake(wlc_hw);
1589 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1592 mboolclr(wlc_hw->wake_override, override_bit);
1594 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1597 brcms_c_mctrl_write(wlc_hw);
1602 /* When driver needs ucode to stop beaconing, it has to make sure that
1603 * MCTL_AP is clear and MCTL_INFRA is set
1604 * Mode MCTL_AP MCTL_INFRA
1606 * STA 0 1 <--- This will ensure no beacons
1609 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1611 wlc_hw->mute_override = 1;
1613 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1614 * override, then there is no change to write
1616 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1619 brcms_c_mctrl_write(wlc_hw);
1624 /* Clear the override on AP and INFRA bits */
1625 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1627 if (wlc_hw->mute_override == 0)
1630 wlc_hw->mute_override = 0;
1632 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1633 * override, then there is no change to write
1635 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1638 brcms_c_mctrl_write(wlc_hw);
1642 * Write a MAC address to the given match reg offset in the RXE match engine.
1645 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1648 struct d11regs *regs;
1653 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1656 regs = wlc_hw->regs;
1657 mac_l = addr[0] | (addr[1] << 8);
1658 mac_m = addr[2] | (addr[3] << 8);
1659 mac_h = addr[4] | (addr[5] << 8);
1661 /* enter the MAC addr into the RXE match registers */
1662 W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1663 W_REG(®s->rcm_mat_data, mac_l);
1664 W_REG(®s->rcm_mat_data, mac_m);
1665 W_REG(®s->rcm_mat_data, mac_h);
1670 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1673 struct d11regs *regs;
1678 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1680 regs = wlc_hw->regs;
1681 W_REG(®s->tplatewrptr, offset);
1683 /* if MCTL_BIGEND bit set in mac control register,
1684 * the chip swaps data in fifo, as well as data in
1687 be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0;
1690 memcpy(&word, buf, sizeof(u32));
1693 word_be = cpu_to_be32(word);
1694 word = *(u32 *)&word_be;
1696 word_le = cpu_to_le32(word);
1697 word = *(u32 *)&word_le;
1700 W_REG(®s->tplatewrdata, word);
1702 buf = (u8 *) buf + sizeof(u32);
1707 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1709 wlc_hw->band->CWmin = newmin;
1711 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1712 (void)R_REG(&wlc_hw->regs->objaddr);
1713 W_REG(&wlc_hw->regs->objdata, newmin);
1716 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1718 wlc_hw->band->CWmax = newmax;
1720 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1721 (void)R_REG(&wlc_hw->regs->objaddr);
1722 W_REG(&wlc_hw->regs->objdata, newmax);
1725 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1729 /* request FAST clock if not on */
1730 fastclk = wlc_hw->forcefastclk;
1732 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1734 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1736 brcms_b_phy_reset(wlc_hw);
1737 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1739 /* restore the clk */
1741 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1745 brcms_c_write_hw_bcntemplate0(struct brcms_hardware *wlc_hw, u16 bcn[],
1748 struct d11regs *regs = wlc_hw->regs;
1750 brcms_b_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3,
1752 /* write beacon length to SCR */
1753 brcms_b_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len);
1754 /* mark beacon0 valid */
1755 OR_REG(®s->maccommand, MCMD_BCN0VLD);
1759 brcms_c_write_hw_bcntemplate1(struct brcms_hardware *wlc_hw, u16 bcn[],
1762 struct d11regs *regs = wlc_hw->regs;
1764 brcms_b_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3,
1766 /* write beacon length to SCR */
1767 brcms_b_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len);
1768 /* mark beacon1 valid */
1769 OR_REG(®s->maccommand, MCMD_BCN1VLD);
1772 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1775 struct brcms_c_info *wlc = wlc_hw->wlc;
1776 /* update SYNTHPU_DLY */
1778 if (BRCMS_ISLCNPHY(wlc->band))
1779 v = SYNTHPU_DLY_LPPHY_US;
1780 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1781 v = SYNTHPU_DLY_NPHY_US;
1783 v = SYNTHPU_DLY_BPHY_US;
1785 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1788 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1791 u16 phytxant = wlc_hw->bmac_phytxant;
1792 u16 mask = PHY_TXC_ANT_MASK;
1794 /* set the Probe Response frame phy control word */
1795 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1796 phyctl = (phyctl & ~mask) | phytxant;
1797 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1799 /* set the Response (ACK/CTS) frame phy control word */
1800 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1801 phyctl = (phyctl & ~mask) | phytxant;
1802 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1805 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1810 struct plcp_signal_rate_lookup {
1814 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1815 const struct plcp_signal_rate_lookup rate_lookup[] = {
1816 {BRCM_RATE_6M, 0xB},
1817 {BRCM_RATE_9M, 0xF},
1818 {BRCM_RATE_12M, 0xA},
1819 {BRCM_RATE_18M, 0xE},
1820 {BRCM_RATE_24M, 0x9},
1821 {BRCM_RATE_36M, 0xD},
1822 {BRCM_RATE_48M, 0x8},
1823 {BRCM_RATE_54M, 0xC}
1826 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1827 if (rate == rate_lookup[i].rate) {
1828 plcp_rate = rate_lookup[i].signal_rate;
1833 /* Find the SHM pointer to the rate table entry by looking in the
1836 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1839 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1843 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1844 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1850 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1853 /* walk the phy rate table and update the entries */
1854 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1857 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1859 /* read the SHM Rate Table entry OFDM PCTL1 values */
1861 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1863 /* modify the value */
1864 pctl1 &= ~PHY_TXC1_MODE_MASK;
1865 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1867 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1868 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1873 /* band-specific init */
1874 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1876 struct brcms_hardware *wlc_hw = wlc->hw;
1878 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1879 wlc_hw->band->bandunit);
1881 brcms_c_ucode_bsinit(wlc_hw);
1883 wlc_phy_init(wlc_hw->band->pi, chanspec);
1885 brcms_c_ucode_txant_set(wlc_hw);
1888 * cwmin is band-specific, update hardware
1889 * with value for current band
1891 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1892 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1894 brcms_b_update_slot_timing(wlc_hw,
1895 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1896 true : wlc_hw->shortslot);
1898 /* write phytype and phyvers */
1899 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1900 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1903 * initialize the txphyctl1 rate table since
1904 * shmem is shared between bands
1906 brcms_upd_ofdm_pctl1_table(wlc_hw);
1908 brcms_b_upd_synthpu(wlc_hw);
1911 /* Perform a soft reset of the PHY PLL */
1912 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1914 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1916 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1917 offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1919 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1920 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1922 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1923 offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1925 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1926 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1930 /* light way to turn on phy clock without reset for NPHY only
1931 * refer to brcms_b_core_phy_clk for full version
1933 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1935 /* support(necessary for NPHY and HYPHY) only */
1936 if (!BRCMS_ISNPHY(wlc_hw->band))
1940 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1942 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1946 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1949 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1951 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1954 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1956 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1958 bool phy_in_reset = false;
1960 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1965 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1967 /* Specific reset sequence required for NPHY rev 3 and 4 */
1968 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1969 NREV_LE(wlc_hw->band->phyrev, 4)) {
1970 /* Set the PHY bandwidth */
1971 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1975 /* Perform a soft reset of the PHY PLL */
1976 brcms_b_core_phypll_reset(wlc_hw);
1979 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1980 (SICF_PRST | SICF_PCLKE));
1981 phy_in_reset = true;
1983 ai_core_cflags(wlc_hw->sih,
1984 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1985 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1989 brcms_b_core_phy_clk(wlc_hw, ON);
1992 wlc_phy_anacore(pih, ON);
1995 /* switch to and initialize new band */
1996 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1998 struct brcms_c_info *wlc = wlc_hw->wlc;
2001 /* Enable the d11 core before accessing it */
2002 if (!ai_iscoreup(wlc_hw->sih)) {
2003 ai_core_reset(wlc_hw->sih, 0, 0);
2004 brcms_c_mctrl_reset(wlc_hw);
2007 macintmask = brcms_c_setband_inact(wlc, bandunit);
2012 brcms_b_core_phy_clk(wlc_hw, ON);
2014 /* band-specific initializations */
2015 brcms_b_bsinit(wlc, chanspec);
2018 * If there are any pending software interrupt bits,
2019 * then replace these with a harmless nonzero value
2020 * so brcms_c_dpc() will re-enable interrupts when done.
2022 if (wlc->macintstatus)
2023 wlc->macintstatus = MI_DMAINT;
2025 /* restore macintmask */
2026 brcms_intrsrestore(wlc->wl, macintmask);
2028 /* ucode should still be suspended.. */
2029 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
2032 /* low-level band switch utility routine */
2033 void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
2035 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2038 wlc_hw->band = wlc_hw->bandstate[bandunit];
2042 * until we eliminate need for wlc->band refs in low level code
2044 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
2046 /* set gmode core flag */
2047 if (wlc_hw->sbclk && !wlc_hw->noreset)
2048 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
2049 ((bandunit == 0) ? SICF_GMODE : 0));
2052 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
2055 /* reject unsupported corerev */
2056 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
2057 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
2065 /* Validate some board info parameters */
2066 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
2068 uint boardrev = wlc_hw->boardrev;
2070 /* 4 bits each for board type, major, minor, and tiny version */
2071 uint brt = (boardrev & 0xf000) >> 12;
2072 uint b0 = (boardrev & 0xf00) >> 8;
2073 uint b1 = (boardrev & 0xf0) >> 4;
2074 uint b2 = boardrev & 0xf;
2076 /* voards from other vendors are always considered valid */
2077 if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
2080 /* do some boardrev sanity checks when boardvendor is Broadcom */
2084 if (boardrev <= 0xff)
2087 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
2094 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
2096 const char *varname = "macaddr";
2099 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
2100 macaddr = getvar(wlc_hw->vars, varname);
2101 if (macaddr != NULL)
2104 if (wlc_hw->_nbands > 1)
2105 varname = "et1macaddr";
2107 varname = "il0macaddr";
2109 macaddr = getvar(wlc_hw->vars, varname);
2110 if (macaddr == NULL)
2111 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
2112 "getvar(%s) not found\n", wlc_hw->unit, varname);
2117 /* power both the pll and external oscillator on/off */
2118 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
2120 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
2123 * dont power down if plldown is false or
2124 * we must poll hw radio disable
2126 if (!want && wlc_hw->pllreq)
2130 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
2132 wlc_hw->sbclk = want;
2133 if (!wlc_hw->sbclk) {
2134 wlc_hw->clk = false;
2135 if (wlc_hw->band && wlc_hw->band->pi)
2136 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2141 * Return true if radio is disabled, otherwise false.
2142 * hw radio disable signal is an external pin, users activate it asynchronously
2143 * this function could be called when driver is down and w/o clock
2144 * it operates on different registers depending on corerev and boardflag.
2146 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
2149 u32 resetbits = 0, flags = 0;
2151 xtal = wlc_hw->sbclk;
2153 brcms_b_xtal(wlc_hw, ON);
2155 /* may need to take core out of reset first */
2159 * mac no longer enables phyclk automatically when driver
2160 * accesses phyreg throughput mac. This can be skipped since
2161 * only mac reg is accessed below
2163 flags |= SICF_PCLKE;
2166 * AI chip doesn't restore bar0win2 on
2167 * hibernation/resume, need sw fixup
2169 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2170 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
2171 wlc_hw->regs = (struct d11regs *)
2172 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
2173 ai_core_reset(wlc_hw->sih, flags, resetbits);
2174 brcms_c_mctrl_reset(wlc_hw);
2177 v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
2179 /* put core back into reset */
2181 ai_core_disable(wlc_hw->sih, 0);
2184 brcms_b_xtal(wlc_hw, OFF);
2189 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2191 struct dma_pub *di = wlc_hw->di[fifo];
2192 return dma_rxreset(di);
2196 * ensure fask clock during reset
2198 * reset d11(out of reset)
2199 * reset phy(out of reset)
2200 * clear software macintstatus for fresh new start
2201 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2203 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2205 struct d11regs *regs;
2210 if (flags == BRCMS_USE_COREFLAGS)
2211 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2213 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2215 regs = wlc_hw->regs;
2217 /* request FAST clock if not on */
2218 fastclk = wlc_hw->forcefastclk;
2220 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2222 /* reset the dma engines except first time thru */
2223 if (ai_iscoreup(wlc_hw->sih)) {
2224 for (i = 0; i < NFIFO; i++)
2225 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2226 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2227 "dma_txreset[%d]: cannot stop dma\n",
2228 wlc_hw->unit, __func__, i);
2230 if ((wlc_hw->di[RX_FIFO])
2231 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2232 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2233 "[%d]: cannot stop dma\n",
2234 wlc_hw->unit, __func__, RX_FIFO);
2236 /* if noreset, just stop the psm and return */
2237 if (wlc_hw->noreset) {
2238 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2239 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2244 * mac no longer enables phyclk automatically when driver accesses
2245 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2246 * band->pi is invalid. need to enable PHY CLK
2248 flags |= SICF_PCLKE;
2252 * In chips with PMU, the fastclk request goes through d11 core
2253 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2255 * This adds some delay and we can optimize it by also requesting
2256 * fastclk through chipcommon during this period if necessary. But
2257 * that has to work coordinate with other driver like mips/arm since
2258 * they may touch chipcommon as well.
2260 wlc_hw->clk = false;
2261 ai_core_reset(wlc_hw->sih, flags, resetbits);
2263 if (wlc_hw->band && wlc_hw->band->pi)
2264 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2266 brcms_c_mctrl_reset(wlc_hw);
2268 if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2269 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2271 brcms_b_phy_reset(wlc_hw);
2273 /* turn on PHY_PLL */
2274 brcms_b_core_phypll_ctl(wlc_hw, true);
2276 /* clear sw intstatus */
2277 wlc_hw->wlc->macintstatus = 0;
2279 /* restore the clk setting */
2281 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2284 /* txfifo sizes needs to be modified(increased) since the newer cores
2287 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2289 struct d11regs *regs = wlc_hw->regs;
2291 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2292 u16 txfifo_def, txfifo_def1;
2295 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2296 txfifo_startblk = TXFIFO_START_BLK;
2298 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2299 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2301 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2302 txfifo_def = (txfifo_startblk & 0xff) |
2303 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2304 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2306 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2308 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2310 W_REG(®s->xmtfifocmd, txfifo_cmd);
2311 W_REG(®s->xmtfifodef, txfifo_def);
2312 W_REG(®s->xmtfifodef1, txfifo_def1);
2314 W_REG(®s->xmtfifocmd, txfifo_cmd);
2316 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2319 * need to propagate to shm location to be in sync since ucode/hw won't
2322 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2323 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2324 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2325 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2326 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2327 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2328 xmtfifo_sz[TX_AC_BK_FIFO]));
2329 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2330 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2331 xmtfifo_sz[TX_BCMC_FIFO]));
2334 /* This function is used for changing the tsf frac register
2335 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2336 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2337 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2338 * HTPHY Formula is 2^26/freq(MHz) e.g.
2339 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2340 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2341 * For spuron: 123MHz -> 2^26/123 = 545600.5
2342 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2343 * For spur off: 120MHz -> 2^26/120 = 559240.5
2344 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2347 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2349 struct d11regs *regs;
2350 regs = wlc_hw->regs;
2352 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2353 (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2354 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2355 W_REG(®s->tsf_clk_frac_l, 0x2082);
2356 W_REG(®s->tsf_clk_frac_h, 0x8);
2357 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2358 W_REG(®s->tsf_clk_frac_l, 0x5341);
2359 W_REG(®s->tsf_clk_frac_h, 0x8);
2360 } else { /* 120Mhz */
2361 W_REG(®s->tsf_clk_frac_l, 0x8889);
2362 W_REG(®s->tsf_clk_frac_h, 0x8);
2364 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2365 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2366 W_REG(®s->tsf_clk_frac_l, 0x7CE0);
2367 W_REG(®s->tsf_clk_frac_h, 0xC);
2368 } else { /* 80Mhz */
2369 W_REG(®s->tsf_clk_frac_l, 0xCCCD);
2370 W_REG(®s->tsf_clk_frac_h, 0xC);
2375 /* Initialize GPIOs that are controlled by D11 core */
2376 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2378 struct brcms_hardware *wlc_hw = wlc->hw;
2379 struct d11regs *regs;
2382 regs = wlc_hw->regs;
2384 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2385 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2388 * Common GPIO setup:
2389 * G0 = LED 0 = WLAN Activity
2390 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2391 * G2 = LED 2 = WLAN 5 GHz Radio State
2392 * G4 = radio disable input (HI enabled, LO disabled)
2397 /* Allocate GPIOs for mimo antenna diversity feature */
2398 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2399 /* Enable antenna diversity, use 2x3 mode */
2400 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2401 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2402 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2403 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2405 /* init superswitch control */
2406 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2408 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2409 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2411 * The board itself is powered by these GPIOs
2412 * (when not sending pattern) so set them high
2414 OR_REG(®s->psm_gpio_oe,
2415 (BOARD_GPIO_12 | BOARD_GPIO_13));
2416 OR_REG(®s->psm_gpio_out,
2417 (BOARD_GPIO_12 | BOARD_GPIO_13));
2419 /* Enable antenna diversity, use 2x4 mode */
2420 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2421 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2422 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2425 /* Configure the desired clock to be 4Mhz */
2426 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2427 ANTSEL_CLKDIV_4MHZ);
2431 * gpio 9 controls the PA. ucode is responsible
2432 * for wiggling out and oe
2434 if (wlc_hw->boardflags & BFL_PACTRL)
2435 gm |= gc |= BOARD_GPIO_PACTRL;
2437 /* apply to gpiocontrol register */
2438 ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2441 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2442 const __le32 ucode[], const size_t nbytes)
2444 struct d11regs *regs = wlc_hw->regs;
2448 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2450 count = (nbytes / sizeof(u32));
2452 W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2453 (void)R_REG(®s->objaddr);
2454 for (i = 0; i < count; i++)
2455 W_REG(®s->objdata, le32_to_cpu(ucode[i]));
2459 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2461 struct brcms_c_info *wlc;
2462 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2466 if (wlc_hw->ucode_loaded)
2469 if (D11REV_IS(wlc_hw->corerev, 23)) {
2470 if (BRCMS_ISNPHY(wlc_hw->band)) {
2471 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2472 ucode->bcm43xx_16_mimosz);
2473 wlc_hw->ucode_loaded = true;
2475 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2477 __func__, wlc_hw->unit, wlc_hw->corerev);
2478 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2479 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2480 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2481 ucode->bcm43xx_24_lcnsz);
2482 wlc_hw->ucode_loaded = true;
2484 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2486 __func__, wlc_hw->unit, wlc_hw->corerev);
2491 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2493 /* update sw state */
2494 wlc_hw->bmac_phytxant = phytxant;
2496 /* push to ucode if up */
2499 brcms_c_ucode_txant_set(wlc_hw);
2503 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2505 return (u16) wlc_hw->wlc->stf->txant;
2508 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2510 wlc_hw->antsel_type = antsel_type;
2512 /* Update the antsel type for phy module to use */
2513 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2516 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2520 uint intstatus, idx;
2521 struct d11regs *regs = wlc_hw->regs;
2522 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2524 unit = wlc_hw->unit;
2526 for (idx = 0; idx < NFIFO; idx++) {
2527 /* read intstatus register and ignore any non-error bits */
2529 R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS;
2533 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2534 unit, idx, intstatus);
2536 if (intstatus & I_RO) {
2537 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2538 "overflow\n", unit, idx);
2542 if (intstatus & I_PC) {
2543 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2548 if (intstatus & I_PD) {
2549 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2554 if (intstatus & I_DE) {
2555 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2556 "error\n", unit, idx);
2560 if (intstatus & I_RU)
2561 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2562 "underflow\n", idx, unit);
2564 if (intstatus & I_XU) {
2565 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2566 "underflow\n", idx, unit);
2571 brcms_c_fatal_error(wlc_hw->wlc); /* big hammer */
2574 W_REG(®s->intctrlregs[idx].intstatus,
2579 void brcms_c_intrson(struct brcms_c_info *wlc)
2581 struct brcms_hardware *wlc_hw = wlc->hw;
2582 wlc->macintmask = wlc->defmacintmask;
2583 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2587 * callback for siutils.c, which has only wlc handler, no wl they both check
2588 * up, not only because there is no need to off/restore d11 interrupt but also
2589 * because per-port code may require sync with valid interrupt.
2591 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2596 return brcms_intrsoff(wlc->wl);
2599 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2604 brcms_intrsrestore(wlc->wl, macintmask);
2607 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2609 struct brcms_hardware *wlc_hw = wlc->hw;
2615 macintmask = wlc->macintmask; /* isr can still happen */
2617 W_REG(&wlc_hw->regs->macintmask, 0);
2618 (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2619 udelay(1); /* ensure int line is no longer driven */
2620 wlc->macintmask = 0;
2622 /* return previous macintmask; resolve race between us and our isr */
2623 return wlc->macintstatus ? 0 : macintmask;
2626 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2628 struct brcms_hardware *wlc_hw = wlc->hw;
2632 wlc->macintmask = macintmask;
2633 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2636 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2639 u8 fifo = 1 << tx_fifo;
2641 /* Two clients of this code, 11h Quiet period and scanning. */
2643 /* only suspend if not already suspended */
2644 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2647 /* force the core awake only if not already */
2648 if (wlc_hw->suspended_fifos == 0)
2649 brcms_c_ucode_wake_override_set(wlc_hw,
2650 BRCMS_WAKE_OVERRIDE_TXFIFO);
2652 wlc_hw->suspended_fifos |= fifo;
2654 if (wlc_hw->di[tx_fifo]) {
2656 * Suspending AMPDU transmissions in the middle can cause
2657 * underflow which may result in mismatch between ucode and
2658 * driver so suspend the mac before suspending the FIFO
2660 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2661 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2663 dma_txsuspend(wlc_hw->di[tx_fifo]);
2665 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2666 brcms_c_enable_mac(wlc_hw->wlc);
2670 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2673 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2674 * but need to be done here for PIO otherwise the watchdog will catch
2675 * the inconsistency and fire
2677 /* Two clients of this code, 11h Quiet period and scanning. */
2678 if (wlc_hw->di[tx_fifo])
2679 dma_txresume(wlc_hw->di[tx_fifo]);
2681 /* allow core to sleep again */
2682 if (wlc_hw->suspended_fifos == 0)
2685 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2686 if (wlc_hw->suspended_fifos == 0)
2687 brcms_c_ucode_wake_override_clear(wlc_hw,
2688 BRCMS_WAKE_OVERRIDE_TXFIFO);
2692 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2694 u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2697 /* suspend tx fifos */
2698 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2699 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2700 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2701 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2703 /* zero the address match register so we do not send ACKs */
2704 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2707 /* resume tx fifos */
2708 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2709 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2710 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2711 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2713 /* Restore address */
2714 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2718 wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2721 brcms_c_ucode_mute_override_set(wlc_hw);
2723 brcms_c_ucode_mute_override_clear(wlc_hw);
2727 * Read and clear macintmask and macintstatus and intstatus registers.
2728 * This routine should be called with interrupts off
2730 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2731 * 0 if the interrupt is not for us, or we are in some special cases;
2732 * device interrupt status bits otherwise.
2734 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2736 struct brcms_hardware *wlc_hw = wlc->hw;
2737 struct d11regs *regs = wlc_hw->regs;
2740 /* macintstatus includes a DMA interrupt summary bit */
2741 macintstatus = R_REG(®s->macintstatus);
2743 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2746 /* detect cardbus removed, in power down(suspend) and in reset */
2747 if (brcms_deviceremoved(wlc))
2750 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2751 * handle that case here.
2753 if (macintstatus == 0xffffffff)
2756 /* defer unsolicited interrupts */
2757 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2760 if (macintstatus == 0)
2763 /* interrupts are already turned off for CFE build
2764 * Caution: For CFE Turning off the interrupts again has some undesired
2767 /* turn off the interrupts */
2768 W_REG(®s->macintmask, 0);
2769 (void)R_REG(®s->macintmask); /* sync readback */
2770 wlc->macintmask = 0;
2772 /* clear device interrupts */
2773 W_REG(®s->macintstatus, macintstatus);
2775 /* MI_DMAINT is indication of non-zero intstatus */
2776 if (macintstatus & MI_DMAINT)
2778 * only fifo interrupt enabled is I_RI in
2779 * RX_FIFO. If MI_DMAINT is set, assume it
2780 * is set and clear the interrupt.
2782 W_REG(®s->intctrlregs[RX_FIFO].intstatus,
2785 return macintstatus;
2788 /* Update wlc->macintstatus and wlc->intstatus[]. */
2789 /* Return true if they are updated successfully. false otherwise */
2790 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2794 /* read and clear macintstatus and intstatus registers */
2795 macintstatus = wlc_intstatus(wlc, false);
2797 /* device is removed */
2798 if (macintstatus == 0xffffffff)
2801 /* update interrupt status in software */
2802 wlc->macintstatus |= macintstatus;
2808 * First-level interrupt processing.
2809 * Return true if this was our interrupt, false otherwise.
2810 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2813 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2815 struct brcms_hardware *wlc_hw = wlc->hw;
2820 if (!wlc_hw->up || !wlc->macintmask)
2823 /* read and clear macintstatus and intstatus registers */
2824 macintstatus = wlc_intstatus(wlc, true);
2826 if (macintstatus == 0xffffffff)
2827 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2830 /* it is not for us */
2831 if (macintstatus == 0)
2836 /* save interrupt status bits */
2837 wlc->macintstatus = macintstatus;
2843 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2845 struct brcms_hardware *wlc_hw = wlc->hw;
2846 struct d11regs *regs = wlc_hw->regs;
2848 struct wiphy *wiphy = wlc->wiphy;
2850 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2851 wlc_hw->band->bandunit);
2854 * Track overlapping suspend requests
2856 wlc_hw->mac_suspend_depth++;
2857 if (wlc_hw->mac_suspend_depth > 1)
2860 /* force the core awake */
2861 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2863 mc = R_REG(®s->maccontrol);
2865 if (mc == 0xffffffff) {
2866 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2868 brcms_down(wlc->wl);
2871 WARN_ON(mc & MCTL_PSM_JMP_0);
2872 WARN_ON(!(mc & MCTL_PSM_RUN));
2873 WARN_ON(!(mc & MCTL_EN_MAC));
2875 mi = R_REG(®s->macintstatus);
2876 if (mi == 0xffffffff) {
2877 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2879 brcms_down(wlc->wl);
2882 WARN_ON(mi & MI_MACSSPNDD);
2884 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2886 SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD),
2887 BRCMS_MAX_MAC_SUSPEND);
2889 if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) {
2890 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2891 " and MI_MACSSPNDD is still not on.\n",
2892 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2893 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2894 "psm_brc 0x%04x\n", wlc_hw->unit,
2895 R_REG(®s->psmdebug),
2896 R_REG(®s->phydebug),
2897 R_REG(®s->psm_brc));
2900 mc = R_REG(®s->maccontrol);
2901 if (mc == 0xffffffff) {
2902 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2904 brcms_down(wlc->wl);
2907 WARN_ON(mc & MCTL_PSM_JMP_0);
2908 WARN_ON(!(mc & MCTL_PSM_RUN));
2909 WARN_ON(mc & MCTL_EN_MAC);
2912 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2914 struct brcms_hardware *wlc_hw = wlc->hw;
2915 struct d11regs *regs = wlc_hw->regs;
2918 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2919 wlc->band->bandunit);
2922 * Track overlapping suspend requests
2924 wlc_hw->mac_suspend_depth--;
2925 if (wlc_hw->mac_suspend_depth > 0)
2928 mc = R_REG(®s->maccontrol);
2929 WARN_ON(mc & MCTL_PSM_JMP_0);
2930 WARN_ON(mc & MCTL_EN_MAC);
2931 WARN_ON(!(mc & MCTL_PSM_RUN));
2933 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2934 W_REG(®s->macintstatus, MI_MACSSPNDD);
2936 mc = R_REG(®s->maccontrol);
2937 WARN_ON(mc & MCTL_PSM_JMP_0);
2938 WARN_ON(!(mc & MCTL_EN_MAC));
2939 WARN_ON(!(mc & MCTL_PSM_RUN));
2941 mi = R_REG(®s->macintstatus);
2942 WARN_ON(mi & MI_MACSSPNDD);
2944 brcms_c_ucode_wake_override_clear(wlc_hw,
2945 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2948 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2950 wlc_hw->hw_stf_ss_opmode = stf_mode;
2953 brcms_upd_ofdm_pctl1_table(wlc_hw);
2956 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2958 struct d11regs *regs;
2960 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2962 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2964 regs = wlc_hw->regs;
2966 /* Validate dchip register access */
2968 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2969 (void)R_REG(®s->objaddr);
2970 w = R_REG(®s->objdata);
2972 /* Can we write and read back a 32bit register? */
2973 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2974 (void)R_REG(®s->objaddr);
2975 W_REG(®s->objdata, (u32) 0xaa5555aa);
2977 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2978 (void)R_REG(®s->objaddr);
2979 val = R_REG(®s->objdata);
2980 if (val != (u32) 0xaa5555aa) {
2981 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2982 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2986 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2987 (void)R_REG(®s->objaddr);
2988 W_REG(®s->objdata, (u32) 0x55aaaa55);
2990 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2991 (void)R_REG(®s->objaddr);
2992 val = R_REG(®s->objdata);
2993 if (val != (u32) 0x55aaaa55) {
2994 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2995 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2999 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
3000 (void)R_REG(®s->objaddr);
3001 W_REG(®s->objdata, w);
3003 /* clear CFPStart */
3004 W_REG(®s->tsf_cfpstart, 0);
3006 w = R_REG(®s->maccontrol);
3007 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
3008 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
3009 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
3010 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
3011 (MCTL_IHR_EN | MCTL_WAKE),
3012 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
3019 #define PHYPLL_WAIT_US 100000
3021 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
3023 struct d11regs *regs;
3026 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3029 regs = wlc_hw->regs;
3032 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
3033 OR_REG(®s->clk_ctl_st,
3034 (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
3035 CCS_ERSRC_REQ_PHYPLL));
3036 SPINWAIT((R_REG(®s->clk_ctl_st) &
3037 (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
3040 tmp = R_REG(®s->clk_ctl_st);
3041 if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
3042 (CCS_ERSRC_AVAIL_HT))
3043 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
3044 " PLL failed\n", __func__);
3046 OR_REG(®s->clk_ctl_st,
3047 (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
3048 SPINWAIT((R_REG(®s->clk_ctl_st) &
3049 (CCS_ERSRC_AVAIL_D11PLL |
3050 CCS_ERSRC_AVAIL_PHYPLL)) !=
3051 (CCS_ERSRC_AVAIL_D11PLL |
3052 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
3054 tmp = R_REG(®s->clk_ctl_st);
3056 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
3058 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
3059 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
3060 "PHY PLL failed\n", __func__);
3064 * Since the PLL may be shared, other cores can still
3065 * be requesting it; so we'll deassert the request but
3066 * not wait for status to comply.
3068 AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
3069 tmp = R_REG(®s->clk_ctl_st);
3073 void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
3077 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3079 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
3084 if (wlc_hw->noreset)
3088 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
3090 /* turn off analog core */
3091 wlc_phy_anacore(wlc_hw->band->pi, OFF);
3093 /* turn off PHYPLL to save power */
3094 brcms_b_core_phypll_ctl(wlc_hw, false);
3096 wlc_hw->clk = false;
3097 ai_core_disable(wlc_hw->sih, 0);
3098 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
3101 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
3103 struct brcms_hardware *wlc_hw = wlc->hw;
3106 /* free any posted tx packets */
3107 for (i = 0; i < NFIFO; i++)
3108 if (wlc_hw->di[i]) {
3109 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
3110 wlc->core->txpktpend[i] = 0;
3111 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
3114 /* free any posted rx packets */
3115 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
3119 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
3121 struct d11regs *regs = wlc_hw->regs;
3122 u16 *objdata_lo = (u16 *)®s->objdata;
3123 u16 *objdata_hi = objdata_lo + 1;
3126 W_REG(®s->objaddr, sel | (offset >> 2));
3127 (void)R_REG(®s->objaddr);
3129 v = R_REG(objdata_hi);
3131 v = R_REG(objdata_lo);
3137 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
3140 struct d11regs *regs = wlc_hw->regs;
3141 u16 *objdata_lo = (u16 *)®s->objdata;
3142 u16 *objdata_hi = objdata_lo + 1;
3144 W_REG(®s->objaddr, sel | (offset >> 2));
3145 (void)R_REG(®s->objaddr);
3147 W_REG(objdata_hi, v);
3149 W_REG(objdata_lo, v);
3152 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
3154 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
3157 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
3159 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
3162 /* Copy a buffer to shared memory of specified type .
3163 * SHM 'offset' needs to be an even address and
3164 * Buffer length 'len' must be an even number of bytes
3165 * 'sel' selects the type of memory
3168 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
3169 const void *buf, int len, u32 sel)
3172 const u8 *p = (const u8 *)buf;
3175 if (len <= 0 || (offset & 1) || (len & 1))
3178 for (i = 0; i < len; i += 2) {
3179 v = p[i] | (p[i + 1] << 8);
3180 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
3184 /* Copy a piece of shared memory of specified type to a buffer .
3185 * SHM 'offset' needs to be an even address and
3186 * Buffer length 'len' must be an even number of bytes
3187 * 'sel' selects the type of memory
3190 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3197 if (len <= 0 || (offset & 1) || (len & 1))
3200 for (i = 0; i < len; i += 2) {
3201 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3203 p[i + 1] = (v >> 8) & 0xFF;
3207 static void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf,
3210 BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n",
3213 *buf = wlc_hw->vars;
3214 *len = wlc_hw->vars_size;
3217 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3223 /* write retry limit to SCR, shouldn't need to suspend */
3225 W_REG(&wlc_hw->regs->objaddr,
3226 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3227 (void)R_REG(&wlc_hw->regs->objaddr);
3228 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3229 W_REG(&wlc_hw->regs->objaddr,
3230 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3231 (void)R_REG(&wlc_hw->regs->objaddr);
3232 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3236 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3239 if (mboolisset(wlc_hw->pllreq, req_bit))
3242 mboolset(wlc_hw->pllreq, req_bit);
3244 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3246 brcms_b_xtal(wlc_hw, ON);
3249 if (!mboolisset(wlc_hw->pllreq, req_bit))
3252 mboolclr(wlc_hw->pllreq, req_bit);
3254 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3256 brcms_b_xtal(wlc_hw, OFF);
3263 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3265 wlc_hw->antsel_avail = antsel_avail;
3269 * conditions under which the PM bit should be set in outgoing frames
3270 * and STAY_AWAKE is meaningful
3272 bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3274 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3276 /* disallow PS when one of the following global conditions meets */
3277 if (!wlc->pub->associated)
3280 /* disallow PS when one of these meets when not scanning */
3284 if (cfg->associated) {
3286 * disallow PS when one of the following
3287 * bsscfg specific conditions meets
3292 if (!cfg->dtim_programmed)
3299 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3301 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3303 /* reset the core */
3304 if (!brcms_deviceremoved(wlc_hw->wlc))
3305 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3307 /* purge the dma rings */
3308 brcms_c_flushqueues(wlc_hw->wlc);
3310 brcms_c_reset_bmac_done(wlc_hw->wlc);
3313 void brcms_c_reset(struct brcms_c_info *wlc)
3315 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3317 /* slurp up hw mac counters before core reset */
3318 brcms_c_statsupd(wlc);
3320 /* reset our snapshot of macstat counters */
3321 memset((char *)wlc->core->macstat_snapshot, 0,
3322 sizeof(struct macstat));
3324 brcms_b_reset(wlc->hw);
3327 void brcms_c_fatal_error(struct brcms_c_info *wlc)
3329 wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
3331 brcms_init(wlc->wl);
3334 /* Return the channel the driver should initialize during brcms_c_init.
3335 * the channel may have to be changed from the currently configured channel
3336 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3337 * invalid channel for current country, etc.)
3339 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3342 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3343 WL_CHANSPEC_BAND_2G;
3348 void brcms_c_init_scb(struct scb *scb)
3352 memset(scb, 0, sizeof(struct scb));
3353 scb->flags = SCB_WMECAP | SCB_HTCAP;
3354 for (i = 0; i < NUMPRIO; i++) {
3356 scb->seqctl[i] = 0xFFFF;
3359 scb->seqctl_nonqos = 0xFFFF;
3360 scb->magic = SCB_MAGIC;
3365 * download ucode/PCM
3366 * let ucode run to suspended
3367 * download ucode inits
3368 * config other core registers
3371 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3373 struct brcms_hardware *wlc_hw = wlc->hw;
3374 struct d11regs *regs;
3378 bool fifosz_fixup = false;
3381 struct wiphy *wiphy = wlc->wiphy;
3382 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3384 regs = wlc_hw->regs;
3386 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3389 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3391 brcms_ucode_download(wlc_hw);
3393 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3395 fifosz_fixup = true;
3397 /* let the PSM run to the suspended state, set mode to BSS STA */
3398 W_REG(®s->macintstatus, -1);
3399 brcms_b_mctrl(wlc_hw, ~0,
3400 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3402 /* wait for ucode to self-suspend after auto-init */
3403 SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0),
3405 if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0)
3406 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3407 "suspend!\n", wlc_hw->unit);
3409 brcms_c_gpio_init(wlc);
3411 sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3413 if (D11REV_IS(wlc_hw->corerev, 23)) {
3414 if (BRCMS_ISNPHY(wlc_hw->band))
3415 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3417 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3418 " %d\n", __func__, wlc_hw->unit,
3420 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3421 if (BRCMS_ISLCNPHY(wlc_hw->band))
3422 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3424 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3425 " %d\n", __func__, wlc_hw->unit,
3428 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3429 __func__, wlc_hw->unit, wlc_hw->corerev);
3432 /* For old ucode, txfifo sizes needs to be modified(increased) */
3433 if (fifosz_fixup == true)
3434 brcms_b_corerev_fifofixup(wlc_hw);
3436 /* check txfifo allocations match between ucode and driver */
3437 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3438 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3442 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3443 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3447 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3448 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3449 buf[TX_AC_BK_FIFO] &= 0xff;
3450 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3454 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3458 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3459 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3460 buf[TX_BCMC_FIFO] &= 0xff;
3461 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3465 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3470 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3471 " driver size %d index %d\n", buf[i],
3472 wlc_hw->xmtfifo_sz[i], i);
3474 /* make sure we can still talk to the mac */
3475 WARN_ON(R_REG(®s->maccontrol) == 0xffffffff);
3477 /* band-specific inits done by wlc_bsinit() */
3479 /* Set up frame burst size and antenna swap threshold init values */
3480 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3481 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3483 /* enable one rx interrupt per received frame */
3484 W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3486 /* set the station mode (BSS STA) */
3487 brcms_b_mctrl(wlc_hw,
3488 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3489 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3491 /* set up Beacon interval */
3492 bcnint_us = 0x8000 << 10;
3493 W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3494 W_REG(®s->tsf_cfpstart, bcnint_us);
3495 W_REG(®s->macintstatus, MI_GP1);
3497 /* write interrupt mask */
3498 W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3500 /* allow the MAC to control the PHY clock (dynamic on/off) */
3501 brcms_b_macphyclk_set(wlc_hw, ON);
3503 /* program dynamic clock control fast powerup delay register */
3504 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3505 W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3507 /* tell the ucode the corerev */
3508 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3510 /* tell the ucode MAC capabilities */
3511 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3512 (u16) (wlc_hw->machwcap & 0xffff));
3513 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3515 machwcap >> 16) & 0xffff));
3517 /* write retry limits to SCR, this done after PSM init */
3518 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3519 (void)R_REG(®s->objaddr);
3520 W_REG(®s->objdata, wlc_hw->SRL);
3521 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3522 (void)R_REG(®s->objaddr);
3523 W_REG(®s->objdata, wlc_hw->LRL);
3525 /* write rate fallback retry limits */
3526 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3527 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3529 AND_REG(®s->ifs_ctl, 0x0FFF);
3530 W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN);
3532 /* init the tx dma engines */
3533 for (i = 0; i < NFIFO; i++) {
3535 dma_txinit(wlc_hw->di[i]);
3538 /* init the rx dma engine(s) and post receive buffers */
3539 dma_rxinit(wlc_hw->di[RX_FIFO]);
3540 dma_rxfill(wlc_hw->di[RX_FIFO]);
3544 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3548 struct brcms_c_info *wlc = wlc_hw->wlc;
3550 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3552 /* request FAST clock if not on */
3553 fastclk = wlc_hw->forcefastclk;
3555 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3557 /* disable interrupts */
3558 macintmask = brcms_intrsoff(wlc->wl);
3560 /* set up the specified band and chanspec */
3561 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3562 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3564 /* do one-time phy inits and calibration */
3565 wlc_phy_cal_init(wlc_hw->band->pi);
3567 /* core-specific initialization */
3568 brcms_b_coreinit(wlc);
3570 /* suspend the tx fifos and mute the phy for preism cac time */
3572 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3574 /* band-specific inits */
3575 brcms_b_bsinit(wlc, chanspec);
3577 /* restore macintmask */
3578 brcms_intrsrestore(wlc->wl, macintmask);
3580 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3581 * is suspended and brcms_c_enable_mac() will clear this override bit.
3583 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3586 * initialize mac_suspend_depth to 1 to match ucode
3587 * initial suspended state
3589 wlc_hw->mac_suspend_depth = 1;
3591 /* restore the clk */
3593 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3596 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3599 /* Save our copy of the chanspec */
3600 wlc->chanspec = chanspec;
3602 /* Set the chanspec and power limits for this locale */
3603 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3605 if (wlc->stf->ss_algosel_auto)
3606 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3609 brcms_c_stf_ss_update(wlc, wlc->band);
3613 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3616 struct brcms_c_rateset default_rateset;
3618 uint i, band_order[2];
3620 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3622 * We might have been bandlocked during down and the chip
3623 * power-cycled (hibernate). Figure out the right band to park on
3625 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3626 /* updated in brcms_c_bandlock() */
3627 parkband = wlc->band->bandunit;
3628 band_order[0] = band_order[1] = parkband;
3630 /* park on the band of the specified chanspec */
3631 parkband = chspec_bandunit(chanspec);
3633 /* order so that parkband initialize last */
3634 band_order[0] = parkband ^ 1;
3635 band_order[1] = parkband;
3638 /* make each band operational, software state init */
3639 for (i = 0; i < wlc->pub->_nbands; i++) {
3640 uint j = band_order[i];
3642 wlc->band = wlc->bandstate[j];
3644 brcms_default_rateset(wlc, &default_rateset);
3646 /* fill in hw_rate */
3647 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3648 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3649 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3651 /* init basic rate lookup */
3652 brcms_c_rate_lookup_init(wlc, &default_rateset);
3655 /* sync up phy/radio chanspec */
3656 brcms_c_set_phy_chanspec(wlc, chanspec);
3660 * ucode, hwmac update
3661 * Channel dependent updates for ucode and hw
3663 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3665 /* enable or disable any active IBSSs depending on whether or not
3666 * we are on the home channel
3668 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3669 if (wlc->pub->associated) {
3671 * BMAC_NOTE: This is something that should be fixed
3672 * in ucode inits. I think that the ucode inits set
3673 * up the bcn templates and shm values with a bogus
3674 * beacon. This should not be done in the inits. If
3675 * ucode needs to set up a beacon for testing, the
3676 * test routines should write it down, not expect the
3677 * inits to populate a bogus beacon.
3679 if (BRCMS_PHY_11N_CAP(wlc->band))
3680 brcms_c_write_shm(wlc, M_BCN_TXTSF_OFFSET, 0);
3683 /* disable an active IBSS if we are not on the home channel */
3686 /* update the various promisc bits */
3687 brcms_c_mac_bcn_promisc(wlc);
3688 brcms_c_mac_promisc(wlc);
3691 /* band-specific init */
3692 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3694 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3695 wlc->pub->unit, wlc->band->bandunit);
3697 /* write ucode ACK/CTS rate table */
3698 brcms_c_set_ratetable(wlc);
3700 /* update some band specific mac configuration */
3701 brcms_c_ucode_mac_upd(wlc);
3703 /* init antenna selection */
3704 brcms_c_antsel_init(wlc->asi);
3708 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3710 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3713 int idle_busy_ratio_x_16 = 0;
3715 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3716 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3717 if (duty_cycle > 100 || duty_cycle < 0) {
3718 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3723 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3724 /* Only write to shared memory when wl is up */
3726 brcms_c_write_shm(wlc, offset, (u16) idle_busy_ratio_x_16);
3729 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3731 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3737 * Initialize the base precedence map for dequeueing
3738 * from txq based on WME settings
3740 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3742 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3743 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3745 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3746 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3747 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3748 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3752 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3753 struct brcms_txq_info *qi, bool on, int prio)
3755 /* transmit flowcontrol is not yet implemented */
3758 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3760 struct brcms_txq_info *qi;
3762 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3764 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3770 void brcms_c_init(struct brcms_c_info *wlc)
3772 struct d11regs *regs;
3776 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3781 * This will happen if a big-hammer was executed. In
3782 * that case, we want to go back to the channel that
3783 * we were on and not new channel
3785 if (wlc->pub->associated)
3786 chanspec = wlc->home_chanspec;
3788 chanspec = brcms_c_init_chanspec(wlc);
3790 brcms_b_init(wlc->hw, chanspec, mute);
3792 /* update beacon listen interval */
3793 brcms_c_bcn_li_upd(wlc);
3795 /* the world is new again, so is our reported rate */
3796 brcms_c_reprate_init(wlc);
3798 /* write ethernet address to core */
3799 brcms_c_set_mac(wlc->bsscfg);
3800 brcms_c_set_bssid(wlc->bsscfg);
3802 /* Update tsf_cfprep if associated and up */
3803 if (wlc->pub->associated && wlc->bsscfg->up) {
3806 /* get beacon period and convert to uS */
3807 bi = wlc->bsscfg->current_bss->beacon_period << 10;
3809 * update since init path would reset
3812 W_REG(®s->tsf_cfprep,
3813 (bi << CFPREP_CBI_SHIFT));
3815 /* Update maccontrol PM related bits */
3816 brcms_c_set_ps_ctrl(wlc);
3819 brcms_c_bandinit_ordered(wlc, chanspec);
3821 /* init probe response timeout */
3822 brcms_c_write_shm(wlc, M_PRS_MAXTIME, wlc->prb_resp_timeout);
3824 /* init max burst txop (framebursting) */
3825 brcms_c_write_shm(wlc, M_MBURST_TXOP,
3827 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
3829 /* initialize maximum allowed duty cycle */
3830 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
3831 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
3834 * Update some shared memory locations related to
3835 * max AMPDU size allowed to received
3837 brcms_c_ampdu_shm_upd(wlc->ampdu);
3839 /* band-specific inits */
3840 brcms_c_bsinit(wlc);
3842 /* Enable EDCF mode (while the MAC is suspended) */
3843 OR_REG(®s->ifs_ctl, IFS_USEEDCF);
3844 brcms_c_edcf_setparams(wlc, false);
3846 /* Init precedence maps for empty FIFOs */
3847 brcms_c_tx_prec_map_init(wlc);
3849 /* read the ucode version if we have not yet done so */
3850 if (wlc->ucode_rev == 0) {
3852 brcms_c_read_shm(wlc, M_BOM_REV_MAJOR) << NBITS(u16);
3853 wlc->ucode_rev |= brcms_c_read_shm(wlc, M_BOM_REV_MINOR);
3856 /* ..now really unleash hell (allow the MAC out of suspend) */
3857 brcms_c_enable_mac(wlc);
3859 /* clear tx flow control */
3860 brcms_c_txflowcontrol_reset(wlc);
3862 /* enable the RF Disable Delay timer */
3863 W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
3865 /* initialize mpc delay */
3866 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
3869 * Initialize WME parameters; if they haven't been set by some other
3870 * mechanism (IOVar, etc) then read them from the hardware.
3872 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
3873 /* Uninitialized; read from HW */
3876 for (ac = 0; ac < AC_COUNT; ac++)
3877 wlc->wme_retries[ac] =
3878 brcms_c_read_shm(wlc, M_AC_TXLMT_ADDR(ac));
3882 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3884 wlc->bcnmisc_monitor = promisc;
3885 brcms_c_mac_bcn_promisc(wlc);
3888 void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3890 if (wlc->bcnmisc_monitor)
3891 brcms_c_mctrl(wlc, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3893 brcms_c_mctrl(wlc, MCTL_BCNS_PROMISC, 0);
3896 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3897 void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3899 u32 promisc_bits = 0;
3902 * promiscuous mode just sets MCTL_PROMISC
3903 * Note: APs get all BSS traffic without the need to set
3904 * the MCTL_PROMISC bit since all BSS data traffic is
3905 * directed at the AP
3907 if (wlc->pub->promisc)
3908 promisc_bits |= MCTL_PROMISC;
3910 /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3911 * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3912 * handled in brcms_c_mac_bcn_promisc()
3915 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3917 brcms_c_mctrl(wlc, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3920 /* push sw hps and wake state through hardware */
3921 void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3927 hps = brcms_c_ps_allowed(wlc);
3929 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3931 v1 = R_REG(&wlc->regs->maccontrol);
3936 brcms_c_mctrl(wlc, MCTL_WAKE | MCTL_HPS, v2);
3938 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3941 brcms_b_wait_for_wake(wlc->hw);
3946 * Write this BSS config's MAC address to core.
3947 * Updates RXE match engine.
3949 int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3952 struct brcms_c_info *wlc = bsscfg->wlc;
3954 /* enter the MAC addr into the RXE match registers */
3955 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3957 brcms_c_ampdu_macaddr_upd(wlc);
3962 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3963 * Updates RXE match engine.
3965 void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3967 /* we need to update BSSID in RXE match registers */
3968 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3971 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3973 wlc_hw->shortslot = shortslot;
3975 if (brcms_b_bandtype(wlc_hw) == BRCM_BAND_2G && wlc_hw->up) {
3976 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3977 brcms_b_update_slot_timing(wlc_hw, shortslot);
3978 brcms_c_enable_mac(wlc_hw->wlc);
3983 * Suspend the the MAC and update the slot timing
3984 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3986 void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3988 /* use the override if it is set */
3989 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3990 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3992 if (wlc->shortslot == shortslot)
3995 wlc->shortslot = shortslot;
3997 brcms_b_set_shortslot(wlc->hw, shortslot);
4000 void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
4002 if (wlc->home_chanspec != chanspec) {
4003 wlc->home_chanspec = chanspec;
4005 if (wlc->bsscfg->associated)
4006 wlc->bsscfg->current_bss->chanspec = chanspec;
4011 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
4012 bool mute, struct txpwr_limits *txpwr)
4016 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
4018 wlc_hw->chanspec = chanspec;
4020 /* Switch bands if necessary */
4021 if (wlc_hw->_nbands > 1) {
4022 bandunit = chspec_bandunit(chanspec);
4023 if (wlc_hw->band->bandunit != bandunit) {
4024 /* brcms_b_setband disables other bandunit,
4025 * use light band switch if not up yet
4028 wlc_phy_chanspec_radio_set(wlc_hw->
4029 bandstate[bandunit]->
4031 brcms_b_setband(wlc_hw, bandunit, chanspec);
4033 brcms_c_setxband(wlc_hw, bandunit);
4038 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
4042 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
4044 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
4046 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
4047 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
4049 /* Update muting of the channel */
4050 brcms_b_mute(wlc_hw, mute, 0);
4054 /* switch to and initialize new band */
4055 static void brcms_c_setband(struct brcms_c_info *wlc,
4058 struct brcms_bss_cfg *cfg = wlc->bsscfg;
4060 wlc->band = wlc->bandstate[bandunit];
4065 /* wait for at least one beacon before entering sleeping state */
4066 if (cfg->associated)
4067 cfg->PMawakebcn = true;
4069 brcms_c_set_ps_ctrl(wlc);
4071 /* band-specific initializations */
4072 brcms_c_bsinit(wlc);
4075 void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
4078 bool switchband = false;
4079 u16 old_chanspec = wlc->chanspec;
4081 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
4082 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
4083 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
4087 /* Switch bands if necessary */
4088 if (wlc->pub->_nbands > 1) {
4089 bandunit = chspec_bandunit(chanspec);
4090 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
4092 if (wlc->bandlocked) {
4093 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
4094 "band is locked!\n",
4095 wlc->pub->unit, __func__,
4096 CHSPEC_CHANNEL(chanspec));
4100 * should the setband call come after the
4101 * brcms_b_chanspec() ? if the setband updates
4102 * (brcms_c_bsinit) use low level calls to inspect and
4103 * set state, the state inspected may be from the wrong
4104 * band, or the following brcms_b_set_chanspec() may
4107 brcms_c_setband(wlc, bandunit);
4111 /* sync up phy/radio chanspec */
4112 brcms_c_set_phy_chanspec(wlc, chanspec);
4114 /* init antenna selection */
4115 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
4116 brcms_c_antsel_init(wlc->asi);
4118 /* Fix the hardware rateset based on bw.
4119 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4121 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4122 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4125 /* update some mac configuration since chanspec changed */
4126 brcms_c_ucode_mac_upd(wlc);
4129 u32 brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc,
4130 struct brcms_c_rateset *rs)
4132 u32 lowest_basic_rspec;
4135 /* Use the lowest basic rate */
4136 lowest_basic_rspec = rs->rates[0] & BRCMS_RATE_MASK;
4137 for (i = 0; i < rs->count; i++) {
4138 if (rs->rates[i] & BRCMS_RATE_FLAG) {
4139 lowest_basic_rspec = rs->rates[i] & BRCMS_RATE_MASK;
4145 * pick siso/cdd as default for OFDM (note no basic
4146 * rate MCSs are supported yet)
4148 if (is_ofdm_rate(lowest_basic_rspec))
4149 lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
4151 return lowest_basic_rspec;
4155 * This function changes the phytxctl for beacon based on current
4156 * beacon ratespec AND txant setting as per this table:
4157 * ratespec CCK ant = wlc->stf->txant
4160 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4164 u16 phytxant = wlc->stf->phytxant;
4165 u16 mask = PHY_TXC_ANT_MASK;
4167 /* for non-siso rates or default setting, use the available chains */
4168 if (BRCMS_PHY_11N_CAP(wlc->band))
4169 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4171 phyctl = brcms_c_read_shm(wlc, M_BCN_PCTLWD);
4172 phyctl = (phyctl & ~mask) | phytxant;
4173 brcms_c_write_shm(wlc, M_BCN_PCTLWD, phyctl);
4177 * centralized protection config change function to simplify debugging, no
4178 * consistency checking this should be called only on changes to avoid overhead
4179 * in periodic function
4181 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4183 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4186 case BRCMS_PROT_G_SPEC:
4187 wlc->protection->_g = (bool) val;
4189 case BRCMS_PROT_G_OVR:
4190 wlc->protection->g_override = (s8) val;
4192 case BRCMS_PROT_G_USER:
4193 wlc->protection->gmode_user = (u8) val;
4195 case BRCMS_PROT_OVERLAP:
4196 wlc->protection->overlap = (s8) val;
4198 case BRCMS_PROT_N_USER:
4199 wlc->protection->nmode_user = (s8) val;
4201 case BRCMS_PROT_N_CFG:
4202 wlc->protection->n_cfg = (s8) val;
4204 case BRCMS_PROT_N_CFG_OVR:
4205 wlc->protection->n_cfg_override = (s8) val;
4207 case BRCMS_PROT_N_NONGF:
4208 wlc->protection->nongf = (bool) val;
4210 case BRCMS_PROT_N_NONGF_OVR:
4211 wlc->protection->nongf_override = (s8) val;
4213 case BRCMS_PROT_N_PAM_OVR:
4214 wlc->protection->n_pam_override = (s8) val;
4216 case BRCMS_PROT_N_OBSS:
4217 wlc->protection->n_obss = (bool) val;
4226 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4229 brcms_c_update_beacon(wlc);
4230 brcms_c_update_probe_resp(wlc, true);
4234 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4236 wlc->stf->ldpc = val;
4239 brcms_c_update_beacon(wlc);
4240 brcms_c_update_probe_resp(wlc, true);
4241 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4245 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4246 const struct ieee80211_tx_queue_params *params,
4250 struct shm_acparams acp_shm;
4253 /* Only apply params if the core is out of reset and has clocks */
4255 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4261 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4262 /* fill in shm ac params struct */
4263 acp_shm.txop = params->txop;
4264 /* convert from units of 32us to us for ucode */
4265 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4266 EDCF_TXOP2USEC(acp_shm.txop);
4267 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4269 if (aci == AC_VI && acp_shm.txop == 0
4270 && acp_shm.aifs < EDCF_AIFSN_MAX)
4273 if (acp_shm.aifs < EDCF_AIFSN_MIN
4274 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4275 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4276 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4280 acp_shm.cwmin = params->cw_min;
4281 acp_shm.cwmax = params->cw_max;
4282 acp_shm.cwcur = acp_shm.cwmin;
4284 R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4285 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4286 /* Indicate the new params to the ucode */
4287 acp_shm.status = brcms_c_read_shm(wlc, (M_EDCF_QINFO +
4290 M_EDCF_STATUS_OFF));
4291 acp_shm.status |= WME_STATUS_NEWAC;
4293 /* Fill in shm acparam table */
4294 shm_entry = (u16 *) &acp_shm;
4295 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4296 brcms_c_write_shm(wlc,
4298 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4304 brcms_c_suspend_mac_and_wait(wlc);
4307 brcms_c_enable_mac(wlc);
4311 void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4315 struct ieee80211_tx_queue_params txq_pars;
4316 static const struct edcf_acparam default_edcf_acparams[] = {
4317 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4318 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4319 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4320 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4321 }; /* ucode needs these parameters during its initialization */
4322 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4324 for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4325 /* find out which ac this set of params applies to */
4326 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4328 /* fill in shm ac params struct */
4329 txq_pars.txop = edcf_acp->TXOP;
4330 txq_pars.aifs = edcf_acp->ACI;
4332 /* CWmin = 2^(ECWmin) - 1 */
4333 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4334 /* CWmax = 2^(ECWmax) - 1 */
4335 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4336 >> EDCF_ECWMAX_SHIFT);
4337 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4341 brcms_c_suspend_mac_and_wait(wlc);
4344 brcms_c_enable_mac(wlc);
4348 /* maintain LED behavior in down state */
4349 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4352 * maintain LEDs while in down state, turn on sbclk if
4353 * not available yet. Turn on sbclk if necessary
4355 brcms_c_pllreq(wlc, true, BRCMS_PLLREQ_FLIP);
4356 brcms_c_pllreq(wlc, false, BRCMS_PLLREQ_FLIP);
4359 static bool brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4361 /* Don't start the timer if HWRADIO feature is disabled */
4362 if (wlc->radio_monitor)
4365 wlc->radio_monitor = true;
4366 brcms_c_pllreq(wlc, true, BRCMS_PLLREQ_RADIO_MON);
4367 brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK,
4372 void brcms_c_radio_disable(struct brcms_c_info *wlc)
4374 if (!wlc->pub->up) {
4375 brcms_c_down_led_upd(wlc);
4379 brcms_c_radio_monitor_start(wlc);
4380 brcms_down(wlc->wl);
4383 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4388 if (brcms_deviceremoved(wlc))
4394 bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4396 if (!wlc->radio_monitor)
4399 wlc->radio_monitor = false;
4400 brcms_c_pllreq(wlc, false, BRCMS_PLLREQ_RADIO_MON);
4401 return brcms_del_timer(wlc->wl, wlc->radio_timer);
4404 /* read hwdisable state and propagate to wlc flag */
4405 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4407 if (wlc->pub->hw_off)
4410 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4411 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4413 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4417 * centralized radio disable/enable function,
4418 * invoke radio enable/disable after updating hwradio status
4420 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4422 if (wlc->pub->radio_disabled)
4423 brcms_c_radio_disable(wlc);
4425 brcms_c_radio_enable(wlc);
4428 /* update hwradio status and return it */
4429 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4431 brcms_c_radio_hwdisable_upd(wlc);
4433 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4437 /* periodical query hw radio button while driver is "down" */
4438 static void brcms_c_radio_timer(void *arg)
4440 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4442 if (brcms_deviceremoved(wlc)) {
4443 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4445 brcms_down(wlc->wl);
4449 /* cap mpc off count */
4450 if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT)
4453 brcms_c_radio_hwdisable_upd(wlc);
4454 brcms_c_radio_upd(wlc);
4457 /* common low-level watchdog code */
4458 static void brcms_b_watchdog(void *arg)
4460 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4461 struct brcms_hardware *wlc_hw = wlc->hw;
4463 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4468 /* increment second count */
4471 /* Check for FIFO error interrupts */
4472 brcms_b_fifoerrors(wlc_hw);
4474 /* make sure RX dma has buffers */
4475 dma_rxfill(wlc->hw->di[RX_FIFO]);
4477 wlc_phy_watchdog(wlc_hw->band->pi);
4480 /* common watchdog code */
4481 static void brcms_c_watchdog(void *arg)
4483 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4485 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4490 if (brcms_deviceremoved(wlc)) {
4491 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4493 brcms_down(wlc->wl);
4497 /* increment second count */
4500 /* delay radio disable */
4501 if (wlc->mpc_delay_off) {
4502 if (--wlc->mpc_delay_off == 0) {
4503 mboolset(wlc->pub->radio_disabled,
4504 WL_RADIO_MPC_DISABLE);
4505 if (wlc->mpc && brcms_c_ismpc(wlc))
4506 wlc->mpc_offcnt = 0;
4511 brcms_c_radio_mpc_upd(wlc);
4512 /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4513 brcms_c_radio_hwdisable_upd(wlc);
4514 brcms_c_radio_upd(wlc);
4515 /* if radio is disable, driver may be down, quit here */
4516 if (wlc->pub->radio_disabled)
4519 brcms_b_watchdog(wlc);
4522 * occasionally sample mac stat counters to
4523 * detect 16-bit counter wrap
4525 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4526 brcms_c_statsupd(wlc);
4528 if (BRCMS_ISNPHY(wlc->band) &&
4529 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4530 BRCMS_TEMPSENSE_PERIOD)) {
4531 wlc->tempsense_lasttime = wlc->pub->now;
4532 brcms_c_tempsense_upd(wlc);
4536 static void brcms_c_watchdog_by_timer(void *arg)
4538 brcms_c_watchdog(arg);
4541 bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4543 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4545 if (!wlc->wdtimer) {
4546 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4551 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4553 if (!wlc->radio_timer) {
4554 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4566 * Initialize brcms_c_info default values ...
4567 * may get overrides later in this function
4569 void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4573 /* Save our copy of the chanspec */
4574 wlc->chanspec = ch20mhz_chspec(1);
4576 /* various 802.11g modes */
4577 wlc->shortslot = false;
4578 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4580 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4581 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4583 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4584 BRCMS_PROTECTION_AUTO);
4585 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4586 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4587 BRCMS_PROTECTION_AUTO);
4588 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4589 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4591 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4592 BRCMS_PROTECTION_CTL_OVERLAP);
4594 /* 802.11g draft 4.0 NonERP elt advertisement */
4595 wlc->include_legacy_erp = true;
4597 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4598 wlc->stf->txant = ANT_TX_DEF;
4600 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4602 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4603 for (i = 0; i < NFIFO; i++)
4604 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4605 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4607 /* default rate fallback retry limits */
4608 wlc->SFBL = RETRY_SHORT_FB;
4609 wlc->LFBL = RETRY_LONG_FB;
4611 /* default mac retry limits */
4612 wlc->SRL = RETRY_SHORT_DEF;
4613 wlc->LRL = RETRY_LONG_DEF;
4615 /* WME QoS mode is Auto by default */
4616 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4617 wlc->pub->bcmerror = 0;
4619 /* initialize mpc delay */
4620 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4623 static bool brcms_c_state_bmac_sync(struct brcms_c_info *wlc)
4625 struct brcms_b_state state_bmac = {0};
4627 if (brcms_b_state_get(wlc->hw, &state_bmac) != 0)
4630 wlc->machwcap = state_bmac.machwcap;
4631 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR,
4632 (s8) state_bmac.preamble_ovr);
4637 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4641 unit = wlc->pub->unit;
4643 wlc->asi = brcms_c_antsel_attach(wlc);
4644 if (wlc->asi == NULL) {
4645 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4651 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4652 if (wlc->ampdu == NULL) {
4653 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4659 if ((brcms_c_stf_attach(wlc) != 0)) {
4660 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4669 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4675 * run backplane attach, init nvram
4677 * initialize software state for each core and band
4678 * put the whole chip in reset(driver down state), no clock
4680 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4681 uint unit, bool piomode, void __iomem *regsva,
4682 struct pci_dev *btparam)
4684 struct brcms_hardware *wlc_hw;
4685 struct d11regs *regs;
4686 char *macaddr = NULL;
4691 struct shared_phy_params sha_params;
4692 struct wiphy *wiphy = wlc->wiphy;
4696 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4703 wlc_hw->unit = unit;
4704 wlc_hw->band = wlc_hw->bandstate[0];
4705 wlc_hw->_piomode = piomode;
4707 /* populate struct brcms_hardware with default values */
4708 brcms_b_info_init(wlc_hw);
4711 * Do the hardware portion of the attach. Also initialize software
4712 * state that depends on the particular hardware we are running.
4714 wlc_hw->sih = ai_attach(regsva, btparam,
4715 &wlc_hw->vars, &wlc_hw->vars_size);
4716 if (wlc_hw->sih == NULL) {
4717 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4722 vars = wlc_hw->vars;
4725 * Get vendid/devid nvram overwrites, which could be different
4726 * than those the BIOS recognizes for devices on PCMCIA_BUS,
4727 * SDIO_BUS, and SROMless devices on PCI_BUS.
4729 var = getvar(vars, "vendid");
4730 if (var && !kstrtoul(var, 0, &res)) {
4732 wiphy_err(wiphy, "Overriding vendor id = 0x%x\n",
4735 var = getvar(vars, "devid");
4736 if (var && !kstrtoul(var, 0, &res)) {
4737 u16 devid = (u16)res;
4738 if (devid != 0xffff) {
4740 wiphy_err(wiphy, "Overriding device id = 0x%x"
4745 /* verify again the device is supported */
4746 if (!brcms_c_chipmatch(vendor, device)) {
4747 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4748 "vendor/device (0x%x/0x%x)\n",
4749 unit, vendor, device);
4754 wlc_hw->vendorid = vendor;
4755 wlc_hw->deviceid = device;
4757 /* set bar0 window to point at D11 core */
4758 wlc_hw->regs = (struct d11regs *) ai_setcore(wlc_hw->sih, D11_CORE_ID,
4760 wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4762 regs = wlc_hw->regs;
4764 wlc->regs = wlc_hw->regs;
4766 /* validate chip, chiprev and corerev */
4767 if (!brcms_c_isgoodchip(wlc_hw)) {
4772 /* initialize power control registers */
4773 ai_clkctl_init(wlc_hw->sih);
4775 /* request fastclock and force fastclock for the rest of attach
4776 * bring the d11 core out of reset.
4777 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4778 * is still false; But it will be called again inside wlc_corereset,
4779 * after d11 is out of reset.
4781 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4782 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4784 if (!brcms_b_validate_chip_access(wlc_hw)) {
4785 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4791 /* get the board rev, used just below */
4792 j = getintvar(vars, "boardrev");
4793 /* promote srom boardrev of 0xFF to 1 */
4794 if (j == BOARDREV_PROMOTABLE)
4795 j = BOARDREV_PROMOTED;
4796 wlc_hw->boardrev = (u16) j;
4797 if (!brcms_c_validboardtype(wlc_hw)) {
4798 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4799 "board type (0x%x)" " or revision level (0x%x)\n",
4800 unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4804 wlc_hw->sromrev = (u8) getintvar(vars, "sromrev");
4805 wlc_hw->boardflags = (u32) getintvar(vars, "boardflags");
4806 wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2");
4808 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4809 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4811 /* check device id(srom, nvram etc.) to set bands */
4812 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4813 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4814 /* Dualband boards */
4815 wlc_hw->_nbands = 2;
4817 wlc_hw->_nbands = 1;
4819 if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4820 wlc_hw->_nbands = 1;
4822 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4823 * unconditionally does the init of these values
4825 wlc->vendorid = wlc_hw->vendorid;
4826 wlc->deviceid = wlc_hw->deviceid;
4827 wlc->pub->sih = wlc_hw->sih;
4828 wlc->pub->corerev = wlc_hw->corerev;
4829 wlc->pub->sromrev = wlc_hw->sromrev;
4830 wlc->pub->boardrev = wlc_hw->boardrev;
4831 wlc->pub->boardflags = wlc_hw->boardflags;
4832 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4833 wlc->pub->_nbands = wlc_hw->_nbands;
4835 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4837 if (wlc_hw->physhim == NULL) {
4838 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4844 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4845 sha_params.sih = wlc_hw->sih;
4846 sha_params.physhim = wlc_hw->physhim;
4847 sha_params.unit = unit;
4848 sha_params.corerev = wlc_hw->corerev;
4849 sha_params.vars = vars;
4850 sha_params.vid = wlc_hw->vendorid;
4851 sha_params.did = wlc_hw->deviceid;
4852 sha_params.chip = wlc_hw->sih->chip;
4853 sha_params.chiprev = wlc_hw->sih->chiprev;
4854 sha_params.chippkg = wlc_hw->sih->chippkg;
4855 sha_params.sromrev = wlc_hw->sromrev;
4856 sha_params.boardtype = wlc_hw->sih->boardtype;
4857 sha_params.boardrev = wlc_hw->boardrev;
4858 sha_params.boardvendor = wlc_hw->sih->boardvendor;
4859 sha_params.boardflags = wlc_hw->boardflags;
4860 sha_params.boardflags2 = wlc_hw->boardflags2;
4861 sha_params.buscorerev = wlc_hw->sih->buscorerev;
4863 /* alloc and save pointer to shared phy state area */
4864 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4865 if (!wlc_hw->phy_sh) {
4870 /* initialize software state for each core and band */
4871 for (j = 0; j < wlc_hw->_nbands; j++) {
4873 * band0 is always 2.4Ghz
4874 * band1, if present, is 5Ghz
4877 brcms_c_setxband(wlc_hw, j);
4879 wlc_hw->band->bandunit = j;
4880 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4881 wlc->band->bandunit = j;
4882 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4883 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4885 wlc_hw->machwcap = R_REG(®s->machwcap);
4886 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4888 /* init tx fifo size */
4889 wlc_hw->xmtfifo_sz =
4890 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4892 /* Get a phy for this band */
4894 wlc_phy_attach(wlc_hw->phy_sh, regs,
4895 brcms_b_bandtype(wlc_hw), vars,
4897 if (wlc_hw->band->pi == NULL) {
4898 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4899 "attach failed\n", unit);
4904 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4906 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4907 &wlc_hw->band->phyrev,
4908 &wlc_hw->band->radioid,
4909 &wlc_hw->band->radiorev);
4910 wlc_hw->band->abgphy_encore =
4911 wlc_phy_get_encore(wlc_hw->band->pi);
4912 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4913 wlc_hw->band->core_flags =
4914 wlc_phy_get_coreflags(wlc_hw->band->pi);
4916 /* verify good phy_type & supported phy revision */
4917 if (BRCMS_ISNPHY(wlc_hw->band)) {
4918 if (NCONF_HAS(wlc_hw->band->phyrev))
4922 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4923 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4929 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4930 "phy type/rev (%d/%d)\n", unit,
4931 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4938 * BMAC_NOTE: wlc->band->pi should not be set below and should
4939 * be done in the high level attach. However we can not make
4940 * that change until all low level access is changed to
4941 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4942 * keeping wlc_hw->band->pi as well for incremental update of
4943 * low level fns, and cut over low only init when all fns
4946 wlc->band->pi = wlc_hw->band->pi;
4947 wlc->band->phytype = wlc_hw->band->phytype;
4948 wlc->band->phyrev = wlc_hw->band->phyrev;
4949 wlc->band->radioid = wlc_hw->band->radioid;
4950 wlc->band->radiorev = wlc_hw->band->radiorev;
4952 /* default contention windows size limits */
4953 wlc_hw->band->CWmin = APHY_CWMIN;
4954 wlc_hw->band->CWmax = PHY_CWMAX;
4956 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4962 /* disable core to match driver "down" state */
4963 brcms_c_coredisable(wlc_hw);
4965 /* Match driver "down" state */
4966 ai_pci_down(wlc_hw->sih);
4968 /* register sb interrupt callback functions */
4969 ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4970 (void *)brcms_c_wlintrsrestore, NULL, wlc);
4972 /* turn off pll and xtal to match driver "down" state */
4973 brcms_b_xtal(wlc_hw, OFF);
4975 /* *******************************************************************
4976 * The hardware is in the DOWN state at this point. D11 core
4977 * or cores are in reset with clocks off, and the board PLLs
4978 * are off if possible.
4980 * Beyond this point, wlc->sbclk == false and chip registers
4981 * should not be touched.
4982 *********************************************************************
4985 /* init etheraddr state variables */
4986 macaddr = brcms_c_get_macaddr(wlc_hw);
4987 if (macaddr == NULL) {
4988 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4993 if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4994 is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4995 is_zero_ether_addr(wlc_hw->etheraddr)) {
4996 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
5003 "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
5004 wlc_hw->deviceid, wlc_hw->_nbands,
5005 wlc_hw->sih->boardtype, macaddr);
5010 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
5015 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
5018 unit = wlc->pub->unit;
5020 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
5021 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
5022 wlc->band->antgain = 8;
5023 } else if (wlc->band->antgain == -1) {
5024 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
5025 " srom, using 2dB\n", unit, __func__);
5026 wlc->band->antgain = 8;
5029 /* Older sroms specified gain in whole dbm only. In order
5030 * be able to specify qdbm granularity and remain backward
5031 * compatible the whole dbms are now encoded in only
5032 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
5033 * 6 bit signed number ranges from -32 - 31.
5037 * 0xc1 = 1.75 db (1 + 3 quarters),
5038 * 0x3f = -1 (-1 + 0 quarters),
5039 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
5040 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
5042 gain = wlc->band->antgain & 0x3f;
5043 gain <<= 2; /* Sign extend */
5045 fract = (wlc->band->antgain & 0xc0) >> 6;
5046 wlc->band->antgain = 4 * gain + fract;
5050 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
5057 unit = wlc->pub->unit;
5058 vars = wlc->pub->vars;
5059 bandtype = wlc->band->bandtype;
5061 /* get antennas available */
5062 aa = (s8) getintvar(vars, bandtype == BRCM_BAND_5G ? "aa5g" : "aa2g");
5064 aa = (s8) getintvar(vars,
5065 bandtype == BRCM_BAND_5G ? "aa1" : "aa0");
5066 if ((aa < 1) || (aa > 15)) {
5067 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
5068 " srom (0x%x), using 3\n", unit, __func__, aa);
5072 /* reset the defaults if we have a single antenna */
5074 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
5075 wlc->stf->txant = ANT_TX_FORCE_0;
5076 } else if (aa == 2) {
5077 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
5078 wlc->stf->txant = ANT_TX_FORCE_1;
5082 /* Compute Antenna Gain */
5083 wlc->band->antgain =
5084 (s8) getintvar(vars, bandtype == BRCM_BAND_5G ? "ag1" : "ag0");
5085 brcms_c_attach_antgain_init(wlc);
5090 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
5093 struct brcms_band *band;
5094 struct brcms_bss_info *bi = wlc->default_bss;
5096 /* init default and target BSS with some sane initial values */
5097 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
5098 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
5100 /* fill the default channel as the first valid channel
5101 * starting from the 2G channels
5103 chanspec = ch20mhz_chspec(1);
5104 wlc->home_chanspec = bi->chanspec = chanspec;
5106 /* find the band of our default channel */
5108 if (wlc->pub->_nbands > 1 &&
5109 band->bandunit != chspec_bandunit(chanspec))
5110 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5112 /* init bss rates to the band specific default rate set */
5113 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
5114 band->bandtype, false, BRCMS_RATE_MASK_FULL,
5115 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
5116 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
5118 if (wlc->pub->_n_enab & SUPPORT_11N)
5119 bi->flags |= BRCMS_BSS_HT;
5122 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
5124 struct brcms_txq_info *qi, *p;
5126 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
5129 * Have enough room for control packets along with HI watermark
5130 * Also, add room to txq for total psq packets if all the SCBs
5131 * leave PS mode. The watermark for flowcontrol to OS packets
5132 * will remain the same
5134 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
5135 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
5137 /* add this queue to the the global list */
5140 wlc->tx_queues = qi;
5142 while (p->next != NULL)
5150 static void brcms_c_txq_free(struct brcms_c_info *wlc,
5151 struct brcms_txq_info *qi)
5153 struct brcms_txq_info *p;
5158 /* remove the queue from the linked list */
5161 wlc->tx_queues = p->next;
5163 while (p != NULL && p->next != qi)
5166 p->next = p->next->next;
5172 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5175 struct brcms_band *band;
5177 for (i = 0; i < wlc->pub->_nbands; i++) {
5178 band = wlc->bandstate[i];
5179 if (band->bandtype == BRCM_BAND_5G) {
5180 if ((bwcap == BRCMS_N_BW_40ALL)
5181 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5182 band->mimo_cap_40 = true;
5184 band->mimo_cap_40 = false;
5186 if (bwcap == BRCMS_N_BW_40ALL)
5187 band->mimo_cap_40 = true;
5189 band->mimo_cap_40 = false;
5195 * The common driver entry routine. Error codes should be unique
5197 struct brcms_c_info *
5198 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
5199 bool piomode, void __iomem *regsva, struct pci_dev *btparam,
5202 struct brcms_c_info *wlc;
5205 struct brcms_pub *pub;
5208 /* allocate struct brcms_c_info state and its substructures */
5209 wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
5212 wlc->wiphy = wl->wiphy;
5219 wlc->band = wlc->bandstate[0];
5220 wlc->core = wlc->corestate;
5223 pub->_piomode = piomode;
5224 wlc->bandinit_pending = false;
5226 /* populate struct brcms_c_info with default values */
5227 brcms_c_info_init(wlc, unit);
5229 /* update sta/ap related parameters */
5230 brcms_c_ap_upd(wlc);
5232 /* 11n_disable nvram */
5233 n_disabled = getintvar(pub->vars, "11n_disable");
5236 * low level attach steps(all hw accesses go
5237 * inside, no more in rest of the attach)
5239 err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
5245 * for some states, due to different info pointer(e,g, wlc, wlc_hw) or
5246 * master/slave split, HIGH driver(both monolithic and HIGH_ONLY) needs
5247 * to sync states FROM BMAC portion driver
5249 if (!brcms_c_state_bmac_sync(wlc)) {
5254 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
5256 /* propagate *vars* from BMAC driver to high driver */
5257 brcms_b_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size);
5260 /* set maximum allowed duty cycle */
5261 wlc->tx_duty_cycle_ofdm =
5262 (u16) getintvar(pub->vars, "tx_duty_cycle_ofdm");
5263 wlc->tx_duty_cycle_cck =
5264 (u16) getintvar(pub->vars, "tx_duty_cycle_cck");
5266 brcms_c_stf_phy_chain_calc(wlc);
5268 /* txchain 1: txant 0, txchain 2: txant 1 */
5269 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
5270 wlc->stf->txant = wlc->stf->hw_txchain - 1;
5272 /* push to BMAC driver */
5273 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
5274 wlc->stf->hw_rxchain);
5276 /* pull up some info resulting from the low attach */
5277 for (i = 0; i < NFIFO; i++)
5278 wlc->core->txavail[i] = wlc->hw->txavail[i];
5280 brcms_b_hw_etheraddr(wlc->hw, wlc->perm_etheraddr);
5282 memcpy(&pub->cur_etheraddr, &wlc->perm_etheraddr, ETH_ALEN);
5284 for (j = 0; j < wlc->pub->_nbands; j++) {
5285 wlc->band = wlc->bandstate[j];
5287 if (!brcms_c_attach_stf_ant_init(wlc)) {
5292 /* default contention windows size limits */
5293 wlc->band->CWmin = APHY_CWMIN;
5294 wlc->band->CWmax = PHY_CWMAX;
5296 /* init gmode value */
5297 if (wlc->band->bandtype == BRCM_BAND_2G) {
5298 wlc->band->gmode = GMODE_AUTO;
5299 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
5303 /* init _n_enab supported mode */
5304 if (BRCMS_PHY_11N_CAP(wlc->band)) {
5305 if (n_disabled & WLFEATURE_DISABLE_11N) {
5307 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
5310 pub->_n_enab = SUPPORT_11N;
5311 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
5313 SUPPORT_11N) ? WL_11N_2x2 :
5318 /* init per-band default rateset, depend on band->gmode */
5319 brcms_default_rateset(wlc, &wlc->band->defrateset);
5321 /* fill in hw_rateset */
5322 brcms_c_rateset_filter(&wlc->band->defrateset,
5323 &wlc->band->hw_rateset, false,
5324 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
5325 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
5329 * update antenna config due to
5330 * wlc->stf->txant/txchain/ant_rx_ovr change
5332 brcms_c_stf_phy_txant_upd(wlc);
5334 /* attach each modules */
5335 err = brcms_c_attach_module(wlc);
5339 if (!brcms_c_timers_init(wlc, unit)) {
5340 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
5346 /* depend on rateset, gmode */
5347 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
5349 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
5350 "\n", unit, __func__);
5355 /* init default when all parameters are ready, i.e. ->rateset */
5356 brcms_c_bss_default_init(wlc);
5359 * Complete the wlc default state initializations..
5362 /* allocate our initial queue */
5363 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
5364 if (wlc->pkt_queue == NULL) {
5365 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
5371 wlc->bsscfg->_idx = 0;
5372 wlc->bsscfg->wlc = wlc;
5374 wlc->mimoft = FT_HT;
5375 wlc->mimo_40txbw = AUTO;
5376 wlc->ofdm_40txbw = AUTO;
5377 wlc->cck_40txbw = AUTO;
5378 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
5380 /* Set default values of SGI */
5381 if (BRCMS_SGI_CAP_PHY(wlc)) {
5382 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5384 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
5385 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5388 brcms_c_ht_update_sgi_rx(wlc, 0);
5391 /* *******nvram 11n config overrides Start ********* */
5393 if (n_disabled & WLFEATURE_DISABLE_11N_SGI_RX)
5394 brcms_c_ht_update_sgi_rx(wlc, 0);
5396 /* apply the stbc override from nvram conf */
5397 if (n_disabled & WLFEATURE_DISABLE_11N_STBC_TX) {
5398 wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = OFF;
5399 wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF;
5401 if (n_disabled & WLFEATURE_DISABLE_11N_STBC_RX)
5402 brcms_c_stf_stbc_rx_set(wlc, HT_CAP_RX_STBC_NO);
5404 /* initialize radio_mpc_disable according to wlc->mpc */
5405 brcms_c_radio_mpc_upd(wlc);
5406 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
5414 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
5415 unit, __func__, err);
5417 brcms_c_detach(wlc);
5424 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5426 /* free timer state */
5428 brcms_free_timer(wlc->wl, wlc->wdtimer);
5429 wlc->wdtimer = NULL;
5431 if (wlc->radio_timer) {
5432 brcms_free_timer(wlc->wl, wlc->radio_timer);
5433 wlc->radio_timer = NULL;
5437 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5440 brcms_c_antsel_detach(wlc->asi);
5445 brcms_c_ampdu_detach(wlc->ampdu);
5449 brcms_c_stf_detach(wlc);
5455 static int brcms_b_detach(struct brcms_c_info *wlc)
5458 struct brcms_hw_band *band;
5459 struct brcms_hardware *wlc_hw = wlc->hw;
5466 * detach interrupt sync mechanism since interrupt is disabled
5467 * and per-port interrupt object may has been freed. this must
5468 * be done before sb core switch
5470 ai_deregister_intr_callback(wlc_hw->sih);
5471 ai_pci_sleep(wlc_hw->sih);
5474 brcms_b_detach_dmapio(wlc_hw);
5476 band = wlc_hw->band;
5477 for (i = 0; i < wlc_hw->_nbands; i++) {
5479 /* Detach this band's phy */
5480 wlc_phy_detach(band->pi);
5483 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5486 /* Free shared phy state */
5487 kfree(wlc_hw->phy_sh);
5489 wlc_phy_shim_detach(wlc_hw->physhim);
5492 kfree(wlc_hw->vars);
5493 wlc_hw->vars = NULL;
5496 ai_detach(wlc_hw->sih);
5505 * Return a count of the number of driver callbacks still pending.
5507 * General policy is that brcms_c_detach can only dealloc/free software states.
5508 * It can NOT touch hardware registers since the d11core may be in reset and
5509 * clock may not be available.
5510 * One exception is sb register access, which is possible if crystal is turned
5511 * on after "down" state, driver should avoid software timer with the exception
5514 uint brcms_c_detach(struct brcms_c_info *wlc)
5521 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5523 callbacks += brcms_b_detach(wlc);
5525 /* delete software timers */
5526 if (!brcms_c_radio_monitor_stop(wlc))
5529 brcms_c_channel_mgr_detach(wlc->cmi);
5531 brcms_c_timers_deinit(wlc);
5533 brcms_c_detach_module(wlc);
5536 while (wlc->tx_queues != NULL)
5537 brcms_c_txq_free(wlc, wlc->tx_queues);
5539 brcms_c_detach_mfree(wlc);
5543 /* update state that depends on the current value of "ap" */
5544 void brcms_c_ap_upd(struct brcms_c_info *wlc)
5546 /* STA-BSS; short capable */
5547 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5554 * return true if Minimum Power Consumption should
5555 * be entered, false otherwise
5557 bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc)
5562 bool brcms_c_ismpc(struct brcms_c_info *wlc)
5564 return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc));
5567 void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
5569 bool mpc_radio, radio_state;
5572 * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
5573 * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
5574 * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
5575 * the radio is going down.
5578 if (!wlc->pub->radio_disabled)
5580 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5581 brcms_c_radio_upd(wlc);
5582 if (!wlc->pub->radio_disabled)
5583 brcms_c_radio_monitor_stop(wlc);
5588 * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
5589 * wlc->pub->radio_disabled to go ON, always call radio_upd
5590 * synchronously to go OFF, postpone radio_upd to later when
5591 * context is safe(e.g. watchdog)
5594 (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF :
5596 mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON;
5598 if (radio_state == ON && mpc_radio == OFF)
5599 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5600 else if (radio_state == OFF && mpc_radio == ON) {
5601 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5602 brcms_c_radio_upd(wlc);
5603 if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD)
5604 wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT;
5606 wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
5609 * Below logic is meant to capture the transition from mpc off
5610 * to mpc on for reasons other than wlc->mpc_delay_off keeping
5611 * the mpc off. In that case reset wlc->mpc_delay_off to
5612 * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
5614 if ((wlc->prev_non_delay_mpc == false) &&
5615 (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off)
5616 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5618 wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc);
5620 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5621 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5623 if (wlc_hw->wlc->pub->hw_up)
5626 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5629 * Enable pll and xtal, initialize the power control registers,
5630 * and force fastclock for the remainder of brcms_c_up().
5632 brcms_b_xtal(wlc_hw, ON);
5633 ai_clkctl_init(wlc_hw->sih);
5634 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5636 ai_pci_fixcfg(wlc_hw->sih);
5639 * AI chip doesn't restore bar0win2 on
5640 * hibernation/resume, need sw fixup
5642 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5643 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5644 wlc_hw->regs = (struct d11regs *)
5645 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5648 * Inform phy that a POR reset has occurred so
5649 * it does a complete phy init
5651 wlc_phy_por_inform(wlc_hw->band->pi);
5653 wlc_hw->ucode_loaded = false;
5654 wlc_hw->wlc->pub->hw_up = true;
5656 if ((wlc_hw->boardflags & BFL_FEM)
5657 && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5659 (wlc_hw->boardrev >= 0x1250
5660 && (wlc_hw->boardflags & BFL_FEM_BT)))
5661 ai_epa_4313war(wlc_hw->sih);
5665 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5669 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5672 * Enable pll and xtal, initialize the power control registers,
5673 * and force fastclock for the remainder of brcms_c_up().
5675 brcms_b_xtal(wlc_hw, ON);
5676 ai_clkctl_init(wlc_hw->sih);
5677 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5680 * Configure pci/pcmcia here instead of in brcms_c_attach()
5681 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5683 coremask = (1 << wlc_hw->wlc->core->coreidx);
5685 ai_pci_setup(wlc_hw->sih, coremask);
5688 * Need to read the hwradio status here to cover the case where the
5689 * system is loaded with the hw radio disabled. We do not want to
5690 * bring the driver up in this case.
5692 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5693 /* put SB PCI in down state again */
5694 ai_pci_down(wlc_hw->sih);
5695 brcms_b_xtal(wlc_hw, OFF);
5699 ai_pci_up(wlc_hw->sih);
5701 /* reset the d11 core */
5702 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5707 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5709 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5712 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5714 /* FULLY enable dynamic power control and d11 core interrupt */
5715 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5716 brcms_intrson(wlc_hw->wlc->wl);
5721 * Write WME tunable parameters for retransmit/max rate
5722 * from wlc struct to ucode
5724 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5728 /* Need clock to do this */
5732 for (ac = 0; ac < AC_COUNT; ac++)
5733 brcms_c_write_shm(wlc, M_AC_TXLMT_ADDR(ac),
5734 wlc->wme_retries[ac]);
5737 /* make interface operational */
5738 int brcms_c_up(struct brcms_c_info *wlc)
5740 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5742 /* HW is turned off so don't try to access it */
5743 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5746 if (!wlc->pub->hw_up) {
5747 brcms_b_hw_up(wlc->hw);
5748 wlc->pub->hw_up = true;
5751 if ((wlc->pub->boardflags & BFL_FEM)
5752 && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5753 if (wlc->pub->boardrev >= 0x1250
5754 && (wlc->pub->boardflags & BFL_FEM_BT))
5755 brcms_c_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL,
5756 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5758 brcms_c_mhf(wlc, MHF4, MHF4_EXTPA_ENABLE,
5759 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5763 * Need to read the hwradio status here to cover the case where the
5764 * system is loaded with the hw radio disabled. We do not want to bring
5765 * the driver up in this case. If radio is disabled, abort up, lower
5766 * power, start radio timer and return 0(for NDIS) don't call
5767 * radio_update to avoid looping brcms_c_up.
5769 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5771 if (!wlc->pub->radio_disabled) {
5772 int status = brcms_b_up_prep(wlc->hw);
5773 if (status == -ENOMEDIUM) {
5775 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5776 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5777 mboolset(wlc->pub->radio_disabled,
5778 WL_RADIO_HW_DISABLE);
5780 if (bsscfg->enable && bsscfg->BSS)
5781 wiphy_err(wlc->wiphy, "wl%d: up"
5783 "bsscfg_disable()\n",
5789 if (wlc->pub->radio_disabled) {
5790 brcms_c_radio_monitor_start(wlc);
5794 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5797 brcms_c_radio_monitor_stop(wlc);
5799 /* Set EDCF hostflags */
5800 brcms_c_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5802 brcms_init(wlc->wl);
5803 wlc->pub->up = true;
5805 if (wlc->bandinit_pending) {
5806 brcms_c_suspend_mac_and_wait(wlc);
5807 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5808 wlc->bandinit_pending = false;
5809 brcms_c_enable_mac(wlc);
5812 brcms_b_up_finish(wlc->hw);
5814 /* Program the TX wme params with the current settings */
5815 brcms_c_wme_retries_write(wlc);
5817 /* start one second watchdog timer */
5818 brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5819 wlc->WDarmed = true;
5821 /* ensure antenna config is up to date */
5822 brcms_c_stf_phy_txant_upd(wlc);
5823 /* ensure LDPC config is in sync */
5824 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5829 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5836 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5841 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5846 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5848 /* disable interrupts */
5850 wlc_hw->wlc->macintmask = 0;
5852 /* now disable interrupts */
5853 brcms_intrsoff(wlc_hw->wlc->wl);
5855 /* ensure we're running on the pll clock again */
5856 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5858 /* down phy at the last of this stage */
5859 callbacks += wlc_phy_down(wlc_hw->band->pi);
5864 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5869 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5875 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5877 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5880 wlc_hw->sbclk = false;
5881 wlc_hw->clk = false;
5882 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5884 /* reclaim any posted packets */
5885 brcms_c_flushqueues(wlc_hw->wlc);
5888 /* Reset and disable the core */
5889 if (ai_iscoreup(wlc_hw->sih)) {
5890 if (R_REG(&wlc_hw->regs->maccontrol) &
5892 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5893 callbacks += brcms_reset(wlc_hw->wlc->wl);
5894 brcms_c_coredisable(wlc_hw);
5897 /* turn off primary xtal and pll */
5898 if (!wlc_hw->noreset) {
5899 ai_pci_down(wlc_hw->sih);
5900 brcms_b_xtal(wlc_hw, OFF);
5908 * Mark the interface nonoperational, stop the software mechanisms,
5909 * disable the hardware, free any transient buffer state.
5910 * Return a count of the number of driver callbacks still pending.
5912 uint brcms_c_down(struct brcms_c_info *wlc)
5917 bool dev_gone = false;
5918 struct brcms_txq_info *qi;
5920 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5922 /* check if we are already in the going down path */
5923 if (wlc->going_down) {
5924 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5925 "\n", wlc->pub->unit, __func__);
5931 /* in between, mpc could try to bring down again.. */
5932 wlc->going_down = true;
5934 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5936 dev_gone = brcms_deviceremoved(wlc);
5938 /* Call any registered down handlers */
5939 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5940 if (wlc->modulecb[i].down_fn)
5942 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5945 /* cancel the watchdog timer */
5947 if (!brcms_del_timer(wlc->wl, wlc->wdtimer))
5949 wlc->WDarmed = false;
5951 /* cancel all other timers */
5952 callbacks += brcms_c_down_del_timer(wlc);
5954 wlc->pub->up = false;
5956 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5958 /* clear txq flow control */
5959 brcms_c_txflowcontrol_reset(wlc);
5961 /* flush tx queues */
5962 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5963 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5965 callbacks += brcms_b_down_finish(wlc->hw);
5967 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5970 wlc->going_down = false;
5974 /* Set the current gmode configuration */
5975 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5979 struct brcms_c_rateset rs;
5980 /* Default to 54g Auto */
5981 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5982 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5983 bool shortslot_restrict = false; /* Restrict association to stations
5984 * that support shortslot
5986 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5987 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5988 int preamble = BRCMS_PLCP_LONG;
5989 bool preamble_restrict = false; /* Restrict association to stations
5990 * that support short preambles
5992 struct brcms_band *band;
5994 /* if N-support is enabled, allow Gmode set as long as requested
5995 * Gmode is not GMODE_LEGACY_B
5997 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
6000 /* verify that we are dealing with 2G band and grab the band pointer */
6001 if (wlc->band->bandtype == BRCM_BAND_2G)
6003 else if ((wlc->pub->_nbands > 1) &&
6004 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
6005 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
6009 /* Legacy or bust when no OFDM is supported by regulatory */
6010 if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
6011 BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
6014 /* update configuration value */
6016 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
6018 /* Clear rateset override */
6019 memset(&rs, 0, sizeof(struct brcms_c_rateset));
6022 case GMODE_LEGACY_B:
6023 shortslot = BRCMS_SHORTSLOT_OFF;
6024 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
6032 /* Accept defaults */
6037 preamble = BRCMS_PLCP_SHORT;
6038 preamble_restrict = true;
6041 case GMODE_PERFORMANCE:
6042 shortslot = BRCMS_SHORTSLOT_ON;
6043 shortslot_restrict = true;
6045 preamble = BRCMS_PLCP_SHORT;
6046 preamble_restrict = true;
6051 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
6052 wlc->pub->unit, __func__, gmode);
6057 * If we are switching to gmode == GMODE_LEGACY_B,
6058 * clean up rate info that may refer to OFDM rates.
6060 if ((gmode == GMODE_LEGACY_B) && (band->gmode != GMODE_LEGACY_B)) {
6061 band->gmode = gmode;
6064 band->gmode = gmode;
6066 wlc->shortslot_override = shortslot;
6068 /* Use the default 11g rateset */
6070 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
6073 for (i = 0; i < rs.count; i++) {
6074 if (rs.rates[i] == BRCM_RATE_6M
6075 || rs.rates[i] == BRCM_RATE_12M
6076 || rs.rates[i] == BRCM_RATE_24M)
6077 rs.rates[i] |= BRCMS_RATE_FLAG;
6081 /* Set default bss rateset */
6082 wlc->default_bss->rateset.count = rs.count;
6083 memcpy(wlc->default_bss->rateset.rates, rs.rates,
6084 sizeof(wlc->default_bss->rateset.rates));
6089 static int brcms_c_nmode_validate(struct brcms_c_info *wlc, s32 nmode)
6101 if (!(BRCMS_PHY_11N_CAP(wlc->band)))
6113 int brcms_c_set_nmode(struct brcms_c_info *wlc, s32 nmode)
6118 err = brcms_c_nmode_validate(wlc, nmode);
6124 wlc->pub->_n_enab = OFF;
6125 wlc->default_bss->flags &= ~BRCMS_BSS_HT;
6126 /* delete the mcs rates from the default and hw ratesets */
6127 brcms_c_rateset_mcs_clear(&wlc->default_bss->rateset);
6128 for (i = 0; i < wlc->pub->_nbands; i++) {
6129 memset(wlc->bandstate[i]->hw_rateset.mcs, 0,
6135 if (wlc->stf->txstreams == WL_11N_3x3)
6141 /* force GMODE_AUTO if NMODE is ON */
6142 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
6143 if (nmode == WL_11N_3x3)
6144 wlc->pub->_n_enab = SUPPORT_HT;
6146 wlc->pub->_n_enab = SUPPORT_11N;
6147 wlc->default_bss->flags |= BRCMS_BSS_HT;
6148 /* add the mcs rates to the default and hw ratesets */
6149 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
6150 wlc->stf->txstreams);
6151 for (i = 0; i < wlc->pub->_nbands; i++)
6152 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
6153 wlc->default_bss->rateset.mcs, MCSSET_LEN);
6164 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
6165 struct brcms_c_rateset *rs_arg)
6167 struct brcms_c_rateset rs, new;
6170 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
6172 /* check for bad count value */
6173 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
6176 /* try the current band */
6177 bandunit = wlc->band->bandunit;
6178 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
6179 if (brcms_c_rate_hwrs_filter_sort_validate
6180 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
6181 wlc->stf->txstreams))
6184 /* try the other band */
6185 if (brcms_is_mband_unlocked(wlc)) {
6186 bandunit = OTHERBANDUNIT(wlc);
6187 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
6188 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
6190 bandstate[bandunit]->
6192 wlc->stf->txstreams))
6199 /* apply new rateset */
6200 memcpy(&wlc->default_bss->rateset, &new,
6201 sizeof(struct brcms_c_rateset));
6202 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
6203 sizeof(struct brcms_c_rateset));
6207 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
6212 if (wlc->bsscfg->associated)
6213 r = wlc->bsscfg->current_bss->rateset.rates[0];
6215 r = wlc->default_bss->rateset.rates[0];
6217 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
6222 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
6224 u16 chspec = ch20mhz_chspec(channel);
6226 if (channel < 0 || channel > MAXCHANNEL)
6229 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
6233 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
6234 if (wlc->band->bandunit != chspec_bandunit(chspec))
6235 wlc->bandinit_pending = true;
6237 wlc->bandinit_pending = false;
6240 wlc->default_bss->chanspec = chspec;
6241 /* brcms_c_BSSinit() will sanitize the rateset before
6243 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
6244 brcms_c_set_home_chanspec(wlc, chspec);
6245 brcms_c_suspend_mac_and_wait(wlc);
6246 brcms_c_set_chanspec(wlc, chspec);
6247 brcms_c_enable_mac(wlc);
6252 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
6256 if (srl < 1 || srl > RETRY_SHORT_MAX ||
6257 lrl < 1 || lrl > RETRY_SHORT_MAX)
6263 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
6265 for (ac = 0; ac < AC_COUNT; ac++) {
6266 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6267 EDCF_SHORT, wlc->SRL);
6268 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6269 EDCF_LONG, wlc->LRL);
6271 brcms_c_wme_retries_write(wlc);
6276 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
6277 struct brcm_rateset *currs)
6279 struct brcms_c_rateset *rs;
6281 if (wlc->pub->associated)
6282 rs = &wlc->bsscfg->current_bss->rateset;
6284 rs = &wlc->default_bss->rateset;
6286 /* Copy only legacy rateset section */
6287 currs->count = rs->count;
6288 memcpy(&currs->rates, &rs->rates, rs->count);
6291 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
6293 struct brcms_c_rateset internal_rs;
6296 if (rs->count > BRCMS_NUMRATES)
6299 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
6301 /* Copy only legacy rateset section */
6302 internal_rs.count = rs->count;
6303 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
6305 /* merge rateset coming in with the current mcsset */
6306 if (wlc->pub->_n_enab & SUPPORT_11N) {
6307 struct brcms_bss_info *mcsset_bss;
6308 if (wlc->bsscfg->associated)
6309 mcsset_bss = wlc->bsscfg->current_bss;
6311 mcsset_bss = wlc->default_bss;
6312 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
6316 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
6318 brcms_c_ofdm_rateset_war(wlc);
6323 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
6325 if (period < DOT11_MIN_BEACON_PERIOD ||
6326 period > DOT11_MAX_BEACON_PERIOD)
6329 wlc->default_bss->beacon_period = period;
6333 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
6335 return wlc->band->phytype;
6338 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
6340 wlc->shortslot_override = sslot_override;
6343 * shortslot is an 11g feature, so no more work if we are
6344 * currently on the 5G band
6346 if (wlc->band->bandtype == BRCM_BAND_5G)
6349 if (wlc->pub->up && wlc->pub->associated) {
6350 /* let watchdog or beacon processing update shortslot */
6351 } else if (wlc->pub->up) {
6352 /* unassociated shortslot is off */
6353 brcms_c_switch_shortslot(wlc, false);
6355 /* driver is down, so just update the brcms_c_info
6357 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
6358 wlc->shortslot = false;
6361 (wlc->shortslot_override ==
6362 BRCMS_SHORTSLOT_ON);
6367 * register watchdog and down handlers.
6369 int brcms_c_module_register(struct brcms_pub *pub,
6370 const char *name, struct brcms_info *hdl,
6371 int (*d_fn)(void *handle))
6373 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6376 /* find an empty entry and just add, no duplication check! */
6377 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6378 if (wlc->modulecb[i].name[0] == '\0') {
6379 strncpy(wlc->modulecb[i].name, name,
6380 sizeof(wlc->modulecb[i].name) - 1);
6381 wlc->modulecb[i].hdl = hdl;
6382 wlc->modulecb[i].down_fn = d_fn;
6390 /* unregister module callbacks */
6391 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
6392 struct brcms_info *hdl)
6394 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6400 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6401 if (!strcmp(wlc->modulecb[i].name, name) &&
6402 (wlc->modulecb[i].hdl == hdl)) {
6403 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
6408 /* table not found! */
6413 static const char * const supr_reason[] = {
6414 "None", "PMQ Entry", "Flush request",
6415 "Previous frag failure", "Channel mismatch",
6416 "Lifetime Expiry", "Underflow"
6419 static void brcms_c_print_txs_status(u16 s)
6421 printk(KERN_DEBUG "[15:12] %d frame attempts\n",
6422 (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
6423 printk(KERN_DEBUG " [11:8] %d rts attempts\n",
6424 (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
6425 printk(KERN_DEBUG " [7] %d PM mode indicated\n",
6426 ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
6427 printk(KERN_DEBUG " [6] %d intermediate status\n",
6428 ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
6429 printk(KERN_DEBUG " [5] %d AMPDU\n",
6430 (s & TX_STATUS_AMPDU) ? 1 : 0);
6431 printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n",
6432 ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
6433 supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
6434 printk(KERN_DEBUG " [1] %d acked\n",
6435 ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
6439 void brcms_c_print_txstatus(struct tx_status *txs)
6442 u16 s = txs->status;
6443 u16 ackphyrxsh = txs->ackphyrxsh;
6445 printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
6447 printk(KERN_DEBUG "FrameID: %04x ", txs->frameid);
6448 printk(KERN_DEBUG "TxStatus: %04x", s);
6449 printk(KERN_DEBUG "\n");
6451 brcms_c_print_txs_status(s);
6453 printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
6454 printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
6455 printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
6456 printk(KERN_DEBUG "RxAckRSSI: %04x ",
6457 (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
6458 printk(KERN_DEBUG "RxAckSQ: %04x",
6459 (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
6460 printk(KERN_DEBUG "\n");
6461 #endif /* defined(BCMDBG) */
6464 void brcms_c_statsupd(struct brcms_c_info *wlc)
6467 struct macstat macstats;
6474 /* if driver down, make no sense to update stats */
6479 /* save last rx fifo 0 overflow count */
6480 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
6482 /* save last tx fifo underflow count */
6483 for (i = 0; i < NFIFO; i++)
6484 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
6487 /* Read mac stats from contiguous shared memory */
6488 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
6489 sizeof(struct macstat), OBJADDR_SHM_SEL);
6492 /* check for rx fifo 0 overflow */
6493 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
6495 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
6496 wlc->pub->unit, delta);
6498 /* check for tx fifo underflows */
6499 for (i = 0; i < NFIFO; i++) {
6501 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
6504 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
6505 "\n", wlc->pub->unit, delta, i);
6509 /* merge counters from dma module */
6510 for (i = 0; i < NFIFO; i++) {
6512 dma_counterreset(wlc->hw->di[i]);
6516 bool brcms_c_chipmatch(u16 vendor, u16 device)
6518 if (vendor != PCI_VENDOR_ID_BROADCOM) {
6519 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
6523 if (device == BCM43224_D11N_ID_VEN1)
6525 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
6527 if (device == BCM4313_D11N2G_ID)
6529 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
6532 pr_err("chipmatch: unknown device id %04x\n", device);
6537 void brcms_c_print_txdesc(struct d11txh *txh)
6539 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
6540 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
6541 u16 mfc = le16_to_cpu(txh->MacFrameControl);
6542 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
6543 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
6544 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
6545 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
6546 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
6547 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
6548 u16 mainrates = le16_to_cpu(txh->MainRates);
6549 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
6551 u8 *ra = txh->TxFrameRA;
6552 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
6553 u8 *rtspfb = txh->RTSPLCPFallback;
6554 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
6555 u8 *fragpfb = txh->FragPLCPFallback;
6556 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
6557 u16 mmodelen = le16_to_cpu(txh->MModeLen);
6558 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
6559 u16 tfid = le16_to_cpu(txh->TxFrameID);
6560 u16 txs = le16_to_cpu(txh->TxStatus);
6561 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
6562 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
6563 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
6564 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
6566 u8 *rtsph = txh->RTSPhyHeader;
6567 struct ieee80211_rts rts = txh->rts_frame;
6570 /* add plcp header along with txh descriptor */
6571 printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
6572 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
6573 txh, sizeof(struct d11txh) + 48);
6575 printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
6576 printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
6577 printk(KERN_DEBUG "FC: %04x ", mfc);
6578 printk(KERN_DEBUG "FES Time: %04x\n", tfest);
6579 printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
6580 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
6581 printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
6582 printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6583 printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6584 printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6585 printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6586 printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6587 printk(KERN_DEBUG "\n");
6589 brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
6590 printk(KERN_DEBUG "SecIV: %s\n", hexbuf);
6591 brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
6592 printk(KERN_DEBUG "RA: %s\n", hexbuf);
6594 printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6595 brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
6596 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6597 printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6598 brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
6599 printk(KERN_DEBUG "PLCP: %s ", hexbuf);
6600 printk(KERN_DEBUG "DUR: %04x", fragdfb);
6601 printk(KERN_DEBUG "\n");
6603 printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6604 printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6606 printk(KERN_DEBUG "FrameID: %04x\n", tfid);
6607 printk(KERN_DEBUG "TxStatus: %04x\n", txs);
6609 printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu);
6610 printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte);
6611 printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
6612 printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
6614 brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
6615 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6616 brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
6617 printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
6618 printk(KERN_DEBUG "\n");
6620 #endif /* defined(BCMDBG) */
6623 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6625 u16 len = rxh->RxFrameSize;
6626 u16 phystatus_0 = rxh->PhyRxStatus_0;
6627 u16 phystatus_1 = rxh->PhyRxStatus_1;
6628 u16 phystatus_2 = rxh->PhyRxStatus_2;
6629 u16 phystatus_3 = rxh->PhyRxStatus_3;
6630 u16 macstatus1 = rxh->RxStatus1;
6631 u16 macstatus2 = rxh->RxStatus2;
6634 static const struct brcmu_bit_desc macstat_flags[] = {
6635 {RXS_FCSERR, "FCSErr"},
6636 {RXS_RESPFRAMETX, "Reply"},
6637 {RXS_PBPRES, "PADDING"},
6638 {RXS_DECATMPT, "DeCr"},
6639 {RXS_DECERR, "DeCrErr"},
6640 {RXS_BCNSENT, "Bcn"},
6644 printk(KERN_DEBUG "Raw RxDesc:\n");
6645 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6646 sizeof(struct d11rxhdr));
6648 brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64);
6650 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6652 printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len,
6653 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6654 printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n",
6655 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6656 printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr);
6657 printk(KERN_DEBUG "RXMACaggtype: %x\n",
6658 (macstatus2 & RXS_AGGTYPE_MASK));
6659 printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime);
6661 #endif /* defined(BCMDBG) */
6663 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6668 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6669 if (is_ofdm_rate(rate))
6670 table_ptr = M_RT_DIRMAP_A;
6672 table_ptr = M_RT_DIRMAP_B;
6674 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6675 * the index into the rate table.
6677 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6678 index = phy_rate & 0xf;
6680 /* Find the SHM pointer to the rate table entry by looking in the
6683 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6686 static u16 brcms_c_rate_shm_offset(struct brcms_c_info *wlc, u8 rate)
6688 return brcms_b_rate_shm_offset(wlc->hw, rate);
6691 /* Callback for device removed */
6694 * Attempts to queue a packet onto a multiple-precedence queue,
6695 * if necessary evicting a lower precedence packet from the queue.
6697 * 'prec' is the precedence number that has already been mapped
6698 * from the packet priority.
6700 * Returns true if packet consumed (queued), false if not.
6702 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6703 struct sk_buff *pkt, int prec)
6705 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6709 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6710 struct sk_buff *pkt, int prec, bool head)
6713 int eprec = -1; /* precedence to evict from */
6715 /* Determine precedence from which to evict packet, if any */
6716 if (pktq_pfull(q, prec))
6718 else if (pktq_full(q)) {
6719 p = brcmu_pktq_peek_tail(q, &eprec);
6721 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6722 "\n", __func__, eprec, prec);
6727 /* Evict if needed */
6729 bool discard_oldest;
6731 discard_oldest = ac_bitmap_tst(0, eprec);
6733 /* Refuse newer packet unless configured to discard oldest */
6734 if (eprec == prec && !discard_oldest) {
6735 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6736 "\n", __func__, prec);
6740 /* Evict packet according to discard policy */
6741 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6742 brcmu_pktq_pdeq_tail(q, eprec);
6743 brcmu_pkt_buf_free_skb(p);
6748 p = brcmu_pktq_penq_head(q, prec, pkt);
6750 p = brcmu_pktq_penq(q, prec, pkt);
6755 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6756 struct sk_buff *sdu, uint prec)
6758 struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */
6759 struct pktq *q = &qi->q;
6762 prio = sdu->priority;
6764 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6766 * we might hit this condtion in case
6767 * packet flooding from mac80211 stack
6769 brcmu_pkt_buf_free_skb(sdu);
6774 * bcmc_fid_generate:
6775 * Generate frame ID for a BCMC packet. The frag field is not used
6776 * for MC frames so is used as part of the sequence number.
6779 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6784 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6788 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6795 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6800 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6801 wlc->pub->unit, rspec, preamble_type);
6803 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6804 * is less than or equal to the rate of the immediately previous
6807 rspec = brcms_basic_rate(wlc, rspec);
6808 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6810 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6811 (DOT11_ACK_LEN + FCS_LEN));
6816 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6819 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6820 wlc->pub->unit, rspec, preamble_type);
6821 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6825 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6828 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6829 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6831 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6832 * is less than or equal to the rate of the immediately previous
6835 rspec = brcms_basic_rate(wlc, rspec);
6836 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6837 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6838 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6842 /* brcms_c_compute_frame_dur()
6844 * Calculate the 802.11 MAC header DUR field for MPDU
6845 * DUR for a single frame = 1 SIFS + 1 ACK
6846 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6848 * rate MPDU rate in unit of 500kbps
6849 * next_frag_len next MPDU length in bytes
6850 * preamble_type use short/GF or long/MM PLCP header
6853 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6854 u8 preamble_type, uint next_frag_len)
6858 sifs = get_sifs(wlc->band);
6861 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6863 if (next_frag_len) {
6864 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6866 /* add another SIFS and the frag time */
6869 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6875 /* The opposite of brcms_c_calc_frame_time */
6877 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6878 u8 preamble_type, uint dur)
6880 uint nsyms, mac_len, Ndps, kNdps;
6881 uint rate = rspec2rate(ratespec);
6883 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6884 wlc->pub->unit, ratespec, preamble_type, dur);
6886 if (is_mcs_rate(ratespec)) {
6887 uint mcs = ratespec & RSPEC_RATE_MASK;
6888 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6889 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6890 /* payload calculation matches that of regular ofdm */
6891 if (wlc->band->bandtype == BRCM_BAND_2G)
6892 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6893 /* kNdbps = kbps * 4 */
6894 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6895 rspec_issgi(ratespec)) * 4;
6896 nsyms = dur / APHY_SYMBOL_TIME;
6899 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6900 } else if (is_ofdm_rate(ratespec)) {
6901 dur -= APHY_PREAMBLE_TIME;
6902 dur -= APHY_SIGNAL_TIME;
6903 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6905 nsyms = dur / APHY_SYMBOL_TIME;
6908 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6910 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6911 dur -= BPHY_PLCP_SHORT_TIME;
6913 dur -= BPHY_PLCP_TIME;
6914 mac_len = dur * rate;
6915 /* divide out factor of 2 in rate (1/2 mbps) */
6916 mac_len = mac_len / 8 / 2;
6922 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6925 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6926 u8 rate = int_val & NRATE_RATE_MASK;
6928 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6929 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6930 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6931 == NRATE_OVERRIDE_MCS_ONLY);
6937 /* validate the combination of rate/mcs/stf is allowed */
6938 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6939 /* mcs only allowed when nmode */
6940 if (stf > PHY_TXC1_MODE_SDM) {
6941 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6942 wlc->pub->unit, __func__);
6947 /* mcs 32 is a special case, DUP mode 40 only */
6949 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6950 ((stf != PHY_TXC1_MODE_SISO)
6951 && (stf != PHY_TXC1_MODE_CDD))) {
6952 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6953 "32\n", wlc->pub->unit, __func__);
6957 /* mcs > 7 must use stf SDM */
6958 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6959 /* mcs > 7 must use stf SDM */
6960 if (stf != PHY_TXC1_MODE_SDM) {
6961 BCMMSG(wlc->wiphy, "wl%d: enabling "
6962 "SDM mode for mcs %d\n",
6963 wlc->pub->unit, rate);
6964 stf = PHY_TXC1_MODE_SDM;
6968 * MCS 0-7 may use SISO, CDD, and for
6971 if ((stf > PHY_TXC1_MODE_STBC) ||
6972 (!BRCMS_STBC_CAP_PHY(wlc)
6973 && (stf == PHY_TXC1_MODE_STBC))) {
6974 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6975 "\n", wlc->pub->unit, __func__);
6980 } else if (is_ofdm_rate(rate)) {
6981 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6982 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6983 wlc->pub->unit, __func__);
6987 } else if (is_cck_rate(rate)) {
6988 if ((cur_band->bandtype != BRCM_BAND_2G)
6989 || (stf != PHY_TXC1_MODE_SISO)) {
6990 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6991 wlc->pub->unit, __func__);
6996 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6997 wlc->pub->unit, __func__);
7001 /* make sure multiple antennae are available for non-siso rates */
7002 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
7003 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
7004 "request\n", wlc->pub->unit, __func__);
7011 rspec |= RSPEC_MIMORATE;
7012 /* For STBC populate the STC field of the ratespec */
7013 if (stf == PHY_TXC1_MODE_STBC) {
7015 stc = 1; /* Nss for single stream is always 1 */
7016 rspec |= (stc << RSPEC_STC_SHIFT);
7020 rspec |= (stf << RSPEC_STF_SHIFT);
7022 if (override_mcs_only)
7023 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
7026 rspec |= RSPEC_SHORT_GI;
7029 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
7038 * Add struct d11txh, struct cck_phy_hdr.
7040 * 'p' data must start with 802.11 MAC header
7041 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
7043 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
7047 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
7048 struct sk_buff *p, struct scb *scb, uint frag,
7049 uint nfrags, uint queue, uint next_frag_len)
7051 struct ieee80211_hdr *h;
7053 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
7054 int len, phylen, rts_phylen;
7055 u16 mch, phyctl, xfts, mainrates;
7056 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
7057 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
7058 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
7059 bool use_rts = false;
7060 bool use_cts = false;
7061 bool use_rifs = false;
7062 bool short_preamble[2] = { false, false };
7063 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
7064 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
7065 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
7066 struct ieee80211_rts *rts = NULL;
7069 bool hwtkmic = false;
7070 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
7071 #define ANTCFG_NONE 0xFF
7072 u8 antcfg = ANTCFG_NONE;
7073 u8 fbantcfg = ANTCFG_NONE;
7074 uint phyctl1_stf = 0;
7076 struct ieee80211_tx_rate *txrate[2];
7078 struct ieee80211_tx_info *tx_info;
7081 u8 mimo_preamble_type;
7083 /* locate 802.11 MAC header */
7084 h = (struct ieee80211_hdr *)(p->data);
7085 qos = ieee80211_is_data_qos(h->frame_control);
7087 /* compute length of frame in bytes for use in PLCP computations */
7088 len = brcmu_pkttotlen(p);
7089 phylen = len + FCS_LEN;
7092 tx_info = IEEE80211_SKB_CB(p);
7095 plcp = skb_push(p, D11_PHY_HDR_LEN);
7097 /* add Broadcom tx descriptor header */
7098 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
7099 memset(txh, 0, D11_TXH_LEN);
7102 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
7103 /* non-AP STA should never use BCMC queue */
7104 if (queue == TX_BCMC_FIFO) {
7105 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
7106 "TX_BCMC!\n", wlc->pub->unit, __func__);
7107 frameid = bcmc_fid_generate(wlc, NULL, txh);
7109 /* Increment the counter for first fragment */
7110 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
7111 scb->seqnum[p->priority]++;
7113 /* extract fragment number from frame first */
7114 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
7115 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
7116 h->seq_ctrl = cpu_to_le16(seq);
7118 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
7119 (queue & TXFID_QUEUE_MASK);
7122 frameid |= queue & TXFID_QUEUE_MASK;
7124 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
7125 if (ieee80211_is_beacon(h->frame_control))
7126 mcl |= TXC_IGNOREPMQ;
7128 txrate[0] = tx_info->control.rates;
7129 txrate[1] = txrate[0] + 1;
7132 * if rate control algorithm didn't give us a fallback
7133 * rate, use the primary rate
7135 if (txrate[1]->idx < 0)
7136 txrate[1] = txrate[0];
7138 for (k = 0; k < hw->max_rates; k++) {
7139 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
7141 if ((txrate[k]->idx >= 0)
7142 && (txrate[k]->idx <
7143 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
7145 hw->wiphy->bands[tx_info->band]->
7146 bitrates[txrate[k]->idx].hw_value;
7149 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
7152 rspec[k] = BRCM_RATE_1M;
7155 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
7156 NRATE_MCS_INUSE | txrate[k]->idx);
7160 * Currently only support same setting for primay and
7161 * fallback rates. Unify flags for each rate into a
7162 * single value for the frame
7166 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
7169 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
7174 * determine and validate primary rate
7175 * and fallback rates
7177 if (!rspec_active(rspec[k])) {
7178 rspec[k] = BRCM_RATE_1M;
7180 if (!is_multicast_ether_addr(h->addr1)) {
7181 /* set tx antenna config */
7182 brcms_c_antsel_antcfg_get(wlc->asi, false,
7183 false, 0, 0, &antcfg, &fbantcfg);
7188 phyctl1_stf = wlc->stf->ss_opmode;
7190 if (wlc->pub->_n_enab & SUPPORT_11N) {
7191 for (k = 0; k < hw->max_rates; k++) {
7193 * apply siso/cdd to single stream mcs's or ofdm
7194 * if rspec is auto selected
7196 if (((is_mcs_rate(rspec[k]) &&
7197 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
7198 is_ofdm_rate(rspec[k]))
7199 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
7200 || !(rspec[k] & RSPEC_OVERRIDE))) {
7201 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
7203 /* For SISO MCS use STBC if possible */
7204 if (is_mcs_rate(rspec[k])
7205 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
7208 /* Nss for single stream is always 1 */
7210 rspec[k] |= (PHY_TXC1_MODE_STBC <<
7212 (stc << RSPEC_STC_SHIFT);
7215 (phyctl1_stf << RSPEC_STF_SHIFT);
7219 * Is the phy configured to use 40MHZ frames? If
7220 * so then pick the desired txbw
7222 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
7223 /* default txbw is 20in40 SB */
7224 mimo_ctlchbw = mimo_txbw =
7225 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
7227 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
7229 if (is_mcs_rate(rspec[k])) {
7230 /* mcs 32 must be 40b/w DUP */
7231 if ((rspec[k] & RSPEC_RATE_MASK)
7234 PHY_TXC1_BW_40MHZ_DUP;
7236 } else if (wlc->mimo_40txbw != AUTO)
7237 mimo_txbw = wlc->mimo_40txbw;
7238 /* else check if dst is using 40 Mhz */
7239 else if (scb->flags & SCB_IS40)
7240 mimo_txbw = PHY_TXC1_BW_40MHZ;
7241 } else if (is_ofdm_rate(rspec[k])) {
7242 if (wlc->ofdm_40txbw != AUTO)
7243 mimo_txbw = wlc->ofdm_40txbw;
7244 } else if (wlc->cck_40txbw != AUTO) {
7245 mimo_txbw = wlc->cck_40txbw;
7249 * mcs32 is 40 b/w only.
7250 * This is possible for probe packets on
7253 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
7255 rspec[k] = RSPEC_MIMORATE;
7257 mimo_txbw = PHY_TXC1_BW_20MHZ;
7260 /* Set channel width */
7261 rspec[k] &= ~RSPEC_BW_MASK;
7262 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
7263 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
7265 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7267 /* Disable short GI, not supported yet */
7268 rspec[k] &= ~RSPEC_SHORT_GI;
7270 mimo_preamble_type = BRCMS_MM_PREAMBLE;
7271 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
7272 mimo_preamble_type = BRCMS_GF_PREAMBLE;
7274 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
7275 && (!is_mcs_rate(rspec[k]))) {
7276 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
7277 "RC_MCS != is_mcs_rate(rspec)\n",
7278 wlc->pub->unit, __func__);
7281 if (is_mcs_rate(rspec[k])) {
7282 preamble_type[k] = mimo_preamble_type;
7285 * if SGI is selected, then forced mm
7288 if ((rspec[k] & RSPEC_SHORT_GI)
7289 && is_single_stream(rspec[k] &
7291 preamble_type[k] = BRCMS_MM_PREAMBLE;
7294 /* should be better conditionalized */
7295 if (!is_mcs_rate(rspec[0])
7296 && (tx_info->control.rates[0].
7297 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7298 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7301 for (k = 0; k < hw->max_rates; k++) {
7302 /* Set ctrlchbw as 20Mhz */
7303 rspec[k] &= ~RSPEC_BW_MASK;
7304 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7306 /* for nphy, stf of ofdm frames must follow policies */
7307 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7308 rspec[k] &= ~RSPEC_STF_MASK;
7309 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7314 /* Reset these for use with AMPDU's */
7315 txrate[0]->count = 0;
7316 txrate[1]->count = 0;
7318 /* (2) PROTECTION, may change rspec */
7319 if ((ieee80211_is_data(h->frame_control) ||
7320 ieee80211_is_mgmt(h->frame_control)) &&
7321 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7324 /* (3) PLCP: determine PLCP header and MAC duration,
7325 * fill struct d11txh */
7326 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7327 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7328 memcpy(&txh->FragPLCPFallback,
7329 plcp_fallback, sizeof(txh->FragPLCPFallback));
7331 /* Length field now put in CCK FBR CRC field */
7332 if (is_cck_rate(rspec[1])) {
7333 txh->FragPLCPFallback[4] = phylen & 0xff;
7334 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7337 /* MIMO-RATE: need validation ?? */
7338 mainrates = is_ofdm_rate(rspec[0]) ?
7339 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7342 /* DUR field for main rate */
7343 if (!ieee80211_is_pspoll(h->frame_control) &&
7344 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7346 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7348 h->duration_id = cpu_to_le16(durid);
7349 } else if (use_rifs) {
7350 /* NAV protect to end of next max packet size */
7352 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7354 DOT11_MAX_FRAG_LEN);
7355 durid += RIFS_11N_TIME;
7356 h->duration_id = cpu_to_le16(durid);
7359 /* DUR field for fallback rate */
7360 if (ieee80211_is_pspoll(h->frame_control))
7361 txh->FragDurFallback = h->duration_id;
7362 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7363 txh->FragDurFallback = 0;
7365 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7366 preamble_type[1], next_frag_len);
7367 txh->FragDurFallback = cpu_to_le16(durid);
7370 /* (4) MAC-HDR: MacTxControlLow */
7372 mcl |= TXC_STARTMSDU;
7374 if (!is_multicast_ether_addr(h->addr1))
7375 mcl |= TXC_IMMEDACK;
7377 if (wlc->band->bandtype == BRCM_BAND_5G)
7378 mcl |= TXC_FREQBAND_5G;
7380 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7383 /* set AMIC bit if using hardware TKIP MIC */
7387 txh->MacTxControlLow = cpu_to_le16(mcl);
7389 /* MacTxControlHigh */
7392 /* Set fallback rate preamble type */
7393 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7394 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7395 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7396 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7399 /* MacFrameControl */
7400 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7401 txh->TxFesTimeNormal = cpu_to_le16(0);
7403 txh->TxFesTimeFallback = cpu_to_le16(0);
7406 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7409 txh->TxFrameID = cpu_to_le16(frameid);
7412 * TxStatus, Note the case of recreating the first frag of a suppressed
7413 * frame then we may need to reset the retry cnt's via the status reg
7415 txh->TxStatus = cpu_to_le16(status);
7418 * extra fields for ucode AMPDU aggregation, the new fields are added to
7419 * the END of previous structure so that it's compatible in driver.
7421 txh->MaxNMpdus = cpu_to_le16(0);
7422 txh->MaxABytes_MRT = cpu_to_le16(0);
7423 txh->MaxABytes_FBR = cpu_to_le16(0);
7424 txh->MinMBytes = cpu_to_le16(0);
7426 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7427 * furnish struct d11txh */
7428 /* RTS PLCP header and RTS frame */
7429 if (use_rts || use_cts) {
7430 if (use_rts && use_cts)
7433 for (k = 0; k < 2; k++) {
7434 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7439 if (!is_ofdm_rate(rts_rspec[0]) &&
7440 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7441 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7442 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7443 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7446 if (!is_ofdm_rate(rts_rspec[1]) &&
7447 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7448 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7449 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7450 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7453 /* RTS/CTS additions to MacTxControlLow */
7455 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7457 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7458 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7461 /* RTS PLCP header */
7462 rts_plcp = txh->RTSPhyHeader;
7464 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7466 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7468 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7470 /* fallback rate version of RTS PLCP header */
7471 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7473 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7474 sizeof(txh->RTSPLCPFallback));
7476 /* RTS frame fields... */
7477 rts = (struct ieee80211_rts *)&txh->rts_frame;
7479 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7480 rspec[0], rts_preamble_type[0],
7481 preamble_type[0], phylen, false);
7482 rts->duration = cpu_to_le16(durid);
7483 /* fallback rate version of RTS DUR field */
7484 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7485 rts_rspec[1], rspec[1],
7486 rts_preamble_type[1],
7487 preamble_type[1], phylen, false);
7488 txh->RTSDurFallback = cpu_to_le16(durid);
7491 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7492 IEEE80211_STYPE_CTS);
7494 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7496 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7497 IEEE80211_STYPE_RTS);
7499 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7503 * low 8 bits: main frag rate/mcs,
7504 * high 8 bits: rts/cts rate/mcs
7506 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7508 (struct ofdm_phy_hdr *) rts_plcp) :
7511 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7512 memset((char *)&txh->rts_frame, 0,
7513 sizeof(struct ieee80211_rts));
7514 memset((char *)txh->RTSPLCPFallback, 0,
7515 sizeof(txh->RTSPLCPFallback));
7516 txh->RTSDurFallback = 0;
7519 #ifdef SUPPORT_40MHZ
7520 /* add null delimiter count */
7521 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7522 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7523 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7528 * Now that RTS/RTS FB preamble types are updated, write
7531 txh->MacTxControlHigh = cpu_to_le16(mch);
7534 * MainRates (both the rts and frag plcp rates have
7535 * been calculated now)
7537 txh->MainRates = cpu_to_le16(mainrates);
7539 /* XtraFrameTypes */
7540 xfts = frametype(rspec[1], wlc->mimoft);
7541 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7542 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7543 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7545 txh->XtraFrameTypes = cpu_to_le16(xfts);
7547 /* PhyTxControlWord */
7548 phyctl = frametype(rspec[0], wlc->mimoft);
7549 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7550 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7551 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7552 phyctl |= PHY_TXC_SHORT_HDR;
7555 /* phytxant is properly bit shifted */
7556 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7557 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7559 /* PhyTxControlWord_1 */
7560 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7563 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7564 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7565 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7566 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7568 if (use_rts || use_cts) {
7569 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7570 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7571 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7572 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7576 * For mcs frames, if mixedmode(overloaded with long preamble)
7577 * is going to be set, fill in non-zero MModeLen and/or
7578 * MModeFbrLen it will be unnecessary if they are separated
7580 if (is_mcs_rate(rspec[0]) &&
7581 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7583 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7584 txh->MModeLen = cpu_to_le16(mmodelen);
7587 if (is_mcs_rate(rspec[1]) &&
7588 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7590 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7591 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7595 ac = skb_get_queue_mapping(p);
7596 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7597 uint frag_dur, dur, dur_fallback;
7599 /* WME: Update TXOP threshold */
7600 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7602 brcms_c_calc_frame_time(wlc, rspec[0],
7603 preamble_type[0], phylen);
7606 /* 1 RTS or CTS-to-self frame */
7608 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7609 rts_preamble_type[0]);
7611 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7612 rts_preamble_type[1]);
7613 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7614 dur += le16_to_cpu(rts->duration);
7616 le16_to_cpu(txh->RTSDurFallback);
7617 } else if (use_rifs) {
7621 /* frame + SIFS + ACK */
7624 brcms_c_compute_frame_dur(wlc, rspec[0],
7625 preamble_type[0], 0);
7628 brcms_c_calc_frame_time(wlc, rspec[1],
7632 brcms_c_compute_frame_dur(wlc, rspec[1],
7633 preamble_type[1], 0);
7635 /* NEED to set TxFesTimeNormal (hard) */
7636 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7638 * NEED to set fallback rate version of
7639 * TxFesTimeNormal (hard)
7641 txh->TxFesTimeFallback =
7642 cpu_to_le16((u16) dur_fallback);
7645 * update txop byte threshold (txop minus intraframe
7648 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7652 brcms_c_calc_frame_len(wlc,
7653 rspec[0], preamble_type[0],
7654 (wlc->edcf_txop[ac] -
7656 /* range bound the fragthreshold */
7657 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7660 else if (newfragthresh >
7661 wlc->usr_fragthresh)
7663 wlc->usr_fragthresh;
7664 /* update the fragthresh and do txc update */
7665 if (wlc->fragthresh[queue] !=
7666 (u16) newfragthresh)
7667 wlc->fragthresh[queue] =
7668 (u16) newfragthresh;
7670 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7672 wlc->pub->unit, fifo_names[queue],
7673 rspec2rate(rspec[0]));
7676 if (dur > wlc->edcf_txop[ac])
7677 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7678 "exceeded phylen %d/%d dur %d/%d\n",
7679 wlc->pub->unit, __func__,
7681 phylen, wlc->fragthresh[queue],
7682 dur, wlc->edcf_txop[ac]);
7689 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7690 struct ieee80211_hw *hw)
7694 struct scb *scb = &wlc->pri_scb;
7695 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7698 * 802.11 standard requires management traffic
7699 * to go at highest priority
7701 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7703 fifo = prio2fifo[prio];
7704 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7706 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7707 brcms_c_send_q(wlc);
7710 void brcms_c_send_q(struct brcms_c_info *wlc)
7712 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7715 int err = 0, i, count;
7717 struct brcms_txq_info *qi = wlc->pkt_queue;
7718 struct pktq *q = &qi->q;
7719 struct ieee80211_tx_info *tx_info;
7721 prec_map = wlc->tx_prec_map;
7723 /* Send all the enq'd pkts that we can.
7724 * Dequeue packets with precedence with empty HW fifo only
7726 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7727 tx_info = IEEE80211_SKB_CB(pkt[0]);
7728 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7729 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7732 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7734 for (i = 0; i < count; i++)
7735 brcms_c_txfifo(wlc, fifo, pkt[i], true,
7740 if (err == -EBUSY) {
7741 brcmu_pktq_penq_head(q, prec, pkt[0]);
7743 * If send failed due to any other reason than a
7744 * change in HW FIFO condition, quit. Otherwise,
7745 * read the new prec_map!
7747 if (prec_map == wlc->tx_prec_map)
7749 prec_map = wlc->tx_prec_map;
7755 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7756 bool commit, s8 txpktpend)
7758 u16 frameid = INVALIDFID;
7761 txh = (struct d11txh *) (p->data);
7763 /* When a BC/MC frame is being committed to the BCMC fifo
7764 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7766 if (fifo == TX_BCMC_FIFO)
7767 frameid = le16_to_cpu(txh->TxFrameID);
7770 * Bump up pending count for if not using rpc. If rpc is
7771 * used, this will be handled in brcms_b_txfifo()
7774 wlc->core->txpktpend[fifo] += txpktpend;
7775 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7776 txpktpend, wlc->core->txpktpend[fifo]);
7779 /* Commit BCMC sequence number in the SHM frame ID location */
7780 if (frameid != INVALIDFID) {
7782 * To inform the ucode of the last mcast frame posted
7783 * so that it can clear moredata bit
7785 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7788 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7789 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7793 * Compute PLCP, but only requires actual rate and length of pkt.
7794 * Rate is given in the driver standard multiple of 500 kbps.
7795 * le is set for 11 Mbps rate if necessary.
7796 * Broken out for PRQ.
7799 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
7800 uint length, u8 *plcp)
7813 usec = (length << 4) / 11;
7814 if ((length << 4) - (usec * 11) > 0)
7818 usec = (length << 3) / 11;
7819 if ((length << 3) - (usec * 11) > 0) {
7821 if ((usec * 11) - (length << 3) >= 8)
7822 le = D11B_PLCP_SIGNAL_LE;
7827 wiphy_err(wlc->wiphy,
7828 "brcms_c_cck_plcp_set: unsupported rate %d\n",
7830 rate_500 = BRCM_RATE_1M;
7834 /* PLCP signal byte */
7835 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
7836 /* PLCP service byte */
7837 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
7838 /* PLCP length u16, little endian */
7839 plcp[2] = usec & 0xff;
7840 plcp[3] = (usec >> 8) & 0xff;
7846 /* Rate: 802.11 rate code, length: PSDU length in octets */
7847 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
7849 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
7851 if (rspec_is40mhz(rspec) || (mcs == 32))
7852 plcp[0] |= MIMO_PLCP_40MHZ;
7853 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
7854 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
7855 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
7856 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
7860 /* Rate: 802.11 rate code, length: PSDU length in octets */
7862 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
7866 int rate = rspec2rate(rspec);
7869 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
7872 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
7873 memset(plcp, 0, D11_PHY_HDR_LEN);
7874 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
7876 tmp = (length & 0xfff) << 5;
7877 plcp[2] |= (tmp >> 16) & 0xff;
7878 plcp[1] |= (tmp >> 8) & 0xff;
7879 plcp[0] |= tmp & 0xff;
7884 /* Rate: 802.11 rate code, length: PSDU length in octets */
7885 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
7886 uint length, u8 *plcp)
7888 int rate = rspec2rate(rspec);
7890 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
7894 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
7895 uint length, u8 *plcp)
7897 if (is_mcs_rate(rspec))
7898 brcms_c_compute_mimo_plcp(rspec, length, plcp);
7899 else if (is_ofdm_rate(rspec))
7900 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
7902 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
7906 /* brcms_c_compute_rtscts_dur()
7908 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
7909 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
7910 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
7912 * cts cts-to-self or rts/cts
7913 * rts_rate rts or cts rate in unit of 500kbps
7914 * rate next MPDU rate in unit of 500kbps
7915 * frame_len next MPDU frame length in bytes
7918 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
7920 u32 frame_rate, u8 rts_preamble_type,
7921 u8 frame_preamble_type, uint frame_len, bool ba)
7925 sifs = get_sifs(wlc->band);
7931 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
7939 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
7943 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
7944 BRCMS_SHORT_PREAMBLE);
7947 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
7948 frame_preamble_type);
7952 u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
7957 if (BRCMS_ISLCNPHY(wlc->band)) {
7958 bw = PHY_TXC1_BW_20MHZ;
7960 bw = rspec_get_bw(rspec);
7961 /* 10Mhz is not supported yet */
7962 if (bw < PHY_TXC1_BW_20MHZ) {
7963 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
7964 "not supported yet, set to 20L\n", bw);
7965 bw = PHY_TXC1_BW_20MHZ;
7969 if (is_mcs_rate(rspec)) {
7970 uint mcs = rspec & RSPEC_RATE_MASK;
7972 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
7973 phyctl1 = rspec_phytxbyte2(rspec);
7974 /* set the upper byte of phyctl1 */
7975 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
7976 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
7977 && !BRCMS_ISSSLPNPHY(wlc->band)) {
7979 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
7980 * Data Rate. Eventually MIMOPHY would also be converted to
7983 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
7984 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7985 } else { /* legacy OFDM/CCK */
7987 /* get the phyctl byte from rate phycfg table */
7988 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
7990 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
7991 "legacy OFDM/CCK rate\n");
7994 /* set the upper byte of phyctl1 */
7996 (bw | (phycfg << 8) |
7997 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
8003 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
8004 bool use_rspec, u16 mimo_ctlchbw)
8009 /* use frame rate as rts rate */
8011 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
8012 /* Use 11Mbps as the g protection RTS target rate and fallback.
8013 * Use the brcms_basic_rate() lookup to find the best basic rate
8014 * under the target in case 11 Mbps is not Basic.
8015 * 6 and 9 Mbps are not usually selected by rate selection, but
8016 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
8019 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
8021 /* calculate RTS rate and fallback rate based on the frame rate
8022 * RTS must be sent at a basic rate since it is a
8023 * control frame, sec 9.6 of 802.11 spec
8025 rts_rspec = brcms_basic_rate(wlc, rspec);
8027 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8028 /* set rts txbw to correct side band */
8029 rts_rspec &= ~RSPEC_BW_MASK;
8032 * if rspec/rspec_fallback is 40MHz, then send RTS on both
8033 * 20MHz channel (DUP), otherwise send RTS on control channel
8035 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
8036 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
8038 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
8040 /* pick siso/cdd as default for ofdm */
8041 if (is_ofdm_rate(rts_rspec)) {
8042 rts_rspec &= ~RSPEC_STF_MASK;
8043 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
8049 void brcms_c_tbtt(struct brcms_c_info *wlc)
8051 if (!wlc->bsscfg->BSS)
8053 * DirFrmQ is now valid...defer setting until end
8056 wlc->qvalid |= MCMD_DIRFRMQVAL;
8060 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
8062 wlc->core->txpktpend[fifo] -= txpktpend;
8063 BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
8064 wlc->core->txpktpend[fifo]);
8066 /* There is more room; mark precedences related to this FIFO sendable */
8067 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
8069 /* figure out which bsscfg is being worked on... */
8072 /* Update beacon listen interval in shared memory */
8073 void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
8075 /* wake up every DTIM is the default */
8076 if (wlc->bcn_li_dtim == 1)
8077 brcms_c_write_shm(wlc, M_BCN_LI, 0);
8079 brcms_c_write_shm(wlc, M_BCN_LI,
8080 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
8084 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
8087 struct d11regs *regs = wlc_hw->regs;
8089 /* read the tsf timer low, then high to get an atomic read */
8090 *tsf_l_ptr = R_REG(®s->tsf_timerlow);
8091 *tsf_h_ptr = R_REG(®s->tsf_timerhigh);
8097 * recover 64bit TSF value from the 16bit TSF value in the rx header
8098 * given the assumption that the TSF passed in header is within 65ms
8099 * of the current tsf.
8102 * 3.......6.......8.......0.......2.......4.......6.......8......0
8103 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
8105 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
8106 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
8107 * receive call sequence after rx interrupt. Only the higher 16 bits
8108 * are used. Finally, the tsf_h is read from the tsf register.
8110 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
8111 struct d11rxhdr *rxh)
8114 u16 rx_tsf_0_15, rx_tsf_16_31;
8116 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
8118 rx_tsf_16_31 = (u16)(tsf_l >> 16);
8119 rx_tsf_0_15 = rxh->RxTSFTime;
8122 * a greater tsf time indicates the low 16 bits of
8123 * tsf_l wrapped, so decrement the high 16 bits.
8125 if ((u16)tsf_l < rx_tsf_0_15) {
8127 if (rx_tsf_16_31 == 0xffff)
8131 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
8135 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
8137 struct ieee80211_rx_status *rx_status)
8142 unsigned char *plcp;
8144 /* fill in TSF and flag its presence */
8145 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
8146 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
8148 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
8151 rx_status->band = IEEE80211_BAND_5GHZ;
8152 rx_status->freq = ieee80211_ofdm_chan_to_freq(
8153 WF_CHAN_FACTOR_5_G/2, channel);
8156 rx_status->band = IEEE80211_BAND_2GHZ;
8157 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
8160 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
8164 rx_status->antenna =
8165 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
8169 rspec = brcms_c_compute_rspec(rxh, plcp);
8170 if (is_mcs_rate(rspec)) {
8171 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
8172 rx_status->flag |= RX_FLAG_HT;
8173 if (rspec_is40mhz(rspec))
8174 rx_status->flag |= RX_FLAG_40MHZ;
8176 switch (rspec2rate(rspec)) {
8178 rx_status->rate_idx = 0;
8181 rx_status->rate_idx = 1;
8184 rx_status->rate_idx = 2;
8187 rx_status->rate_idx = 3;
8190 rx_status->rate_idx = 4;
8193 rx_status->rate_idx = 5;
8196 rx_status->rate_idx = 6;
8199 rx_status->rate_idx = 7;
8202 rx_status->rate_idx = 8;
8205 rx_status->rate_idx = 9;
8208 rx_status->rate_idx = 10;
8211 rx_status->rate_idx = 11;
8214 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
8218 * For 5GHz, we should decrease the index as it is
8219 * a subset of the 2.4G rates. See bitrates field
8220 * of brcms_band_5GHz_nphy (in mac80211_if.c).
8222 if (rx_status->band == IEEE80211_BAND_5GHZ)
8223 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
8225 /* Determine short preamble and rate_idx */
8227 if (is_cck_rate(rspec)) {
8228 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
8229 rx_status->flag |= RX_FLAG_SHORTPRE;
8230 } else if (is_ofdm_rate(rspec)) {
8231 rx_status->flag |= RX_FLAG_SHORTPRE;
8233 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
8238 if (plcp3_issgi(plcp[3]))
8239 rx_status->flag |= RX_FLAG_SHORT_GI;
8241 if (rxh->RxStatus1 & RXS_DECERR) {
8242 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
8243 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
8246 if (rxh->RxStatus1 & RXS_FCSERR) {
8247 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
8248 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
8254 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
8258 struct ieee80211_rx_status rx_status;
8260 memset(&rx_status, 0, sizeof(rx_status));
8261 prep_mac80211_status(wlc, rxh, p, &rx_status);
8263 /* mac header+body length, exclude CRC and plcp header */
8264 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
8265 skb_pull(p, D11_PHY_HDR_LEN);
8266 __skb_trim(p, len_mpdu);
8268 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
8269 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
8273 /* Process received frames */
8275 * Return true if more frames need to be processed. false otherwise.
8276 * Param 'bound' indicates max. # frames to process before break out.
8278 void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8280 struct d11rxhdr *rxh;
8281 struct ieee80211_hdr *h;
8285 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8287 /* frame starts with rxhdr */
8288 rxh = (struct d11rxhdr *) (p->data);
8290 /* strip off rxhdr */
8291 skb_pull(p, BRCMS_HWRXOFF);
8293 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8294 if (rxh->RxStatus1 & RXS_PBPRES) {
8296 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8297 "len %d\n", wlc->pub->unit, p->len);
8303 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8306 if (rxh->RxStatus1 & RXS_FCSERR) {
8307 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8308 wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8312 wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8317 /* check received pkt has at least frame control field */
8318 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8321 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8323 /* explicitly test bad src address to avoid sending bad deauth */
8325 /* CTS and ACK CTL frames are w/o a2 */
8327 if (ieee80211_is_data(h->frame_control) ||
8328 ieee80211_is_mgmt(h->frame_control)) {
8329 if ((is_zero_ether_addr(h->addr2) ||
8330 is_multicast_ether_addr(h->addr2))) {
8331 wiphy_err(wlc->wiphy, "wl%d: %s: dropping a "
8332 "frame with invalid src mac address,"
8334 wlc->pub->unit, __func__, h->addr2);
8340 /* due to sheer numbers, toss out probe reqs for now */
8341 if (ieee80211_is_probe_req(h->frame_control))
8347 brcms_c_recvctl(wlc, rxh, p);
8351 brcmu_pkt_buf_free_skb(p);
8354 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
8355 * number of bytes goes in the length field
8357 * Formula given by HT PHY Spec v 1.13
8358 * len = 3(nsyms + nstream + 3) - 3
8361 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
8364 uint nsyms, len = 0, kNdps;
8366 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
8367 wlc->pub->unit, rspec2rate(ratespec), mac_len);
8369 if (is_mcs_rate(ratespec)) {
8370 uint mcs = ratespec & RSPEC_RATE_MASK;
8371 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
8372 rspec_stc(ratespec);
8375 * the payload duration calculation matches that
8378 /* 1000Ndbps = kbps * 4 */
8379 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8380 rspec_issgi(ratespec)) * 4;
8382 if (rspec_stc(ratespec) == 0)
8384 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8385 APHY_TAIL_NBITS) * 1000, kNdps);
8387 /* STBC needs to have even number of symbols */
8390 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8391 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8393 /* (+3) account for HT-SIG(2) and HT-STF(1) */
8394 nsyms += (tot_streams + 3);
8396 * 3 bytes/symbol @ legacy 6Mbps rate
8397 * (-3) excluding service bits and tail bits
8399 len = (3 * nsyms) - 3;
8406 * calculate frame duration of a given rate and length, return
8410 brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
8411 u8 preamble_type, uint mac_len)
8413 uint nsyms, dur = 0, Ndps, kNdps;
8414 uint rate = rspec2rate(ratespec);
8417 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
8419 rate = BRCM_RATE_1M;
8422 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
8423 wlc->pub->unit, ratespec, preamble_type, mac_len);
8425 if (is_mcs_rate(ratespec)) {
8426 uint mcs = ratespec & RSPEC_RATE_MASK;
8427 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
8429 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
8430 if (preamble_type == BRCMS_MM_PREAMBLE)
8432 /* 1000Ndbps = kbps * 4 */
8433 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8434 rspec_issgi(ratespec)) * 4;
8436 if (rspec_stc(ratespec) == 0)
8438 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8439 APHY_TAIL_NBITS) * 1000, kNdps);
8441 /* STBC needs to have even number of symbols */
8444 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8445 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8447 dur += APHY_SYMBOL_TIME * nsyms;
8448 if (wlc->band->bandtype == BRCM_BAND_2G)
8449 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8450 } else if (is_ofdm_rate(rate)) {
8451 dur = APHY_PREAMBLE_TIME;
8452 dur += APHY_SIGNAL_TIME;
8453 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
8455 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
8457 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
8459 dur += APHY_SYMBOL_TIME * nsyms;
8460 if (wlc->band->bandtype == BRCM_BAND_2G)
8461 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8464 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
8467 mac_len = mac_len * 8 * 2;
8468 /* calc ceiling of bits/rate = microseconds of air time */
8469 dur = (mac_len + rate - 1) / rate;
8470 if (preamble_type & BRCMS_SHORT_PREAMBLE)
8471 dur += BPHY_PLCP_SHORT_TIME;
8473 dur += BPHY_PLCP_TIME;
8478 /* derive wlc->band->basic_rate[] table from 'rateset' */
8479 void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
8480 struct brcms_c_rateset *rateset)
8486 u8 *br = wlc->band->basic_rate;
8489 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
8490 memset(br, 0, BRCM_MAXRATE + 1);
8492 /* For each basic rate in the rates list, make an entry in the
8493 * best basic lookup.
8495 for (i = 0; i < rateset->count; i++) {
8496 /* only make an entry for a basic rate */
8497 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
8500 /* mask off basic bit */
8501 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
8503 if (rate > BRCM_MAXRATE) {
8504 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
8505 "invalid rate 0x%X in rate set\n",
8513 /* The rate lookup table now has non-zero entries for each
8514 * basic rate, equal to the basic rate: br[basicN] = basicN
8516 * To look up the best basic rate corresponding to any
8517 * particular rate, code can use the basic_rate table
8520 * basic_rate = wlc->band->basic_rate[tx_rate]
8522 * Make sure there is a best basic rate entry for
8523 * every rate by walking up the table from low rates
8524 * to high, filling in holes in the lookup table
8527 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
8528 rate = wlc->band->hw_rateset.rates[i];
8530 if (br[rate] != 0) {
8531 /* This rate is a basic rate.
8532 * Keep track of the best basic rate so far by
8535 if (is_ofdm_rate(rate))
8543 /* This rate is not a basic rate so figure out the
8544 * best basic rate less than this rate and fill in
8545 * the hole in the table
8548 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
8553 if (is_ofdm_rate(rate)) {
8555 * In 11g and 11a, the OFDM mandatory rates
8556 * are 6, 12, and 24 Mbps
8558 if (rate >= BRCM_RATE_24M)
8559 mandatory = BRCM_RATE_24M;
8560 else if (rate >= BRCM_RATE_12M)
8561 mandatory = BRCM_RATE_12M;
8563 mandatory = BRCM_RATE_6M;
8565 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
8569 br[rate] = mandatory;
8573 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
8577 u8 basic_phy_rate, basic_index;
8578 u16 dir_table, basic_table;
8581 /* Shared memory address for the table we are reading */
8582 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
8584 /* Shared memory address for the table we are writing */
8585 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
8588 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
8589 * the index into the rate table.
8591 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
8592 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
8593 index = phy_rate & 0xf;
8594 basic_index = basic_phy_rate & 0xf;
8596 /* Find the SHM pointer to the ACK rate entry by looking in the
8599 basic_ptr = brcms_c_read_shm(wlc, (dir_table + basic_index * 2));
8601 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
8602 * to the correct basic rate for the given incoming rate
8604 brcms_c_write_shm(wlc, (basic_table + index * 2), basic_ptr);
8607 static const struct brcms_c_rateset *
8608 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
8610 const struct brcms_c_rateset *rs_dflt;
8612 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8613 if (wlc->band->bandtype == BRCM_BAND_5G)
8614 rs_dflt = &ofdm_mimo_rates;
8616 rs_dflt = &cck_ofdm_mimo_rates;
8617 } else if (wlc->band->gmode)
8618 rs_dflt = &cck_ofdm_rates;
8620 rs_dflt = &cck_rates;
8625 void brcms_c_set_ratetable(struct brcms_c_info *wlc)
8627 const struct brcms_c_rateset *rs_dflt;
8628 struct brcms_c_rateset rs;
8629 u8 rate, basic_rate;
8632 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8634 brcms_c_rateset_copy(rs_dflt, &rs);
8635 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8637 /* walk the phy rate table and update SHM basic rate lookup table */
8638 for (i = 0; i < rs.count; i++) {
8639 rate = rs.rates[i] & BRCMS_RATE_MASK;
8641 /* for a given rate brcms_basic_rate returns the rate at
8642 * which a response ACK/CTS should be sent.
8644 basic_rate = brcms_basic_rate(wlc, rate);
8645 if (basic_rate == 0)
8646 /* This should only happen if we are using a
8647 * restricted rateset.
8649 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
8651 brcms_c_write_rate_shm(wlc, rate, basic_rate);
8656 * Return true if the specified rate is supported by the specified band.
8657 * BRCM_BAND_AUTO indicates the current band.
8659 bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
8662 struct brcms_c_rateset *hw_rateset;
8665 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
8666 hw_rateset = &wlc->band->hw_rateset;
8667 else if (wlc->pub->_nbands > 1)
8668 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
8670 /* other band specified and we are a single band device */
8673 /* check if this is a mimo rate */
8674 if (is_mcs_rate(rspec)) {
8675 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
8678 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
8681 for (i = 0; i < hw_rateset->count; i++)
8682 if (hw_rateset->rates[i] == rspec2rate(rspec))
8686 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
8687 "not in hw_rateset\n", wlc->pub->unit, rspec);
8692 void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
8694 const struct brcms_c_rateset *rs_dflt;
8695 struct brcms_c_rateset rs;
8698 u8 plcp[D11_PHY_HDR_LEN];
8702 sifs = get_sifs(wlc->band);
8704 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8706 brcms_c_rateset_copy(rs_dflt, &rs);
8707 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8710 * walk the phy rate table and update MAC core SHM
8711 * basic rate table entries
8713 for (i = 0; i < rs.count; i++) {
8714 rate = rs.rates[i] & BRCMS_RATE_MASK;
8716 entry_ptr = brcms_c_rate_shm_offset(wlc, rate);
8718 /* Calculate the Probe Response PLCP for the given rate */
8719 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
8722 * Calculate the duration of the Probe Response
8723 * frame plus SIFS for the MAC
8725 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
8726 BRCMS_LONG_PREAMBLE, frame_len);
8729 /* Update the SHM Rate Table entry Probe Response values */
8730 brcms_c_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS,
8731 (u16) (plcp[0] + (plcp[1] << 8)));
8732 brcms_c_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS + 2,
8733 (u16) (plcp[2] + (plcp[3] << 8)));
8734 brcms_c_write_shm(wlc, entry_ptr + M_RT_PRS_DUR_POS, dur);
8738 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
8740 * PLCP header is 6 bytes.
8741 * 802.11 A3 header is 24 bytes.
8742 * Max beacon frame body template length is 112 bytes.
8743 * Max probe resp frame body template length is 110 bytes.
8745 * *len on input contains the max length of the packet available.
8747 * The *len value is set to the number of bytes in buf used, and starts
8748 * with the PLCP and included up to, but not including, the 4 byte FCS.
8751 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
8753 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
8755 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
8756 struct cck_phy_hdr *plcp;
8757 struct ieee80211_mgmt *h;
8758 int hdr_len, body_len;
8760 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
8762 /* calc buffer size provided for frame body */
8763 body_len = *len - hdr_len;
8764 /* return actual size */
8765 *len = hdr_len + body_len;
8767 /* format PHY and MAC headers */
8768 memset((char *)buf, 0, hdr_len);
8770 plcp = (struct cck_phy_hdr *) buf;
8773 * PLCP for Probe Response frames are filled in from
8776 if (type == IEEE80211_STYPE_BEACON)
8778 brcms_c_compute_plcp(wlc, bcn_rspec,
8779 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
8782 /* "Regular" and 16 MBSS but not for 4 MBSS */
8783 /* Update the phytxctl for the beacon based on the rspec */
8784 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
8786 h = (struct ieee80211_mgmt *)&plcp[1];
8788 /* fill in 802.11 header */
8789 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
8791 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8792 /* A1 filled in by MAC for prb resp, broadcast for bcn */
8793 if (type == IEEE80211_STYPE_BEACON)
8794 memcpy(&h->da, ðer_bcast, ETH_ALEN);
8795 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
8796 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
8798 /* SEQ filled in by MAC */
8803 int brcms_c_get_header_len(void)
8808 /* mac is assumed to be suspended at this point */
8810 brcms_b_write_hw_bcntemplates(struct brcms_hardware *wlc_hw, u16 bcn[],
8813 struct d11regs *regs = wlc_hw->regs;
8816 brcms_c_write_hw_bcntemplate0(wlc_hw, bcn, len);
8817 brcms_c_write_hw_bcntemplate1(wlc_hw, bcn, len);
8820 if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD))
8821 brcms_c_write_hw_bcntemplate0(wlc_hw, bcn, len);
8824 (R_REG(®s->maccommand) & MCMD_BCN1VLD))
8825 brcms_c_write_hw_bcntemplate1(wlc_hw, bcn, len);
8829 static void brcms_c_write_hw_bcntemplates(struct brcms_c_info *wlc, u16 bcn[],
8832 brcms_b_write_hw_bcntemplates(wlc->hw, bcn, len, both);
8836 * Update a beacon for a particular BSS
8837 * For MBSS, this updates the software template and sets "latest" to
8838 * the index of the template updated. Otherwise, it updates the hardware
8841 void brcms_c_bss_update_beacon(struct brcms_c_info *wlc,
8842 struct brcms_bss_cfg *cfg)
8844 int len = BCN_TMPL_LEN;
8846 /* Clear the soft intmask */
8847 wlc->defmacintmask &= ~MI_BCNTPL;
8850 /* Only allow updates on an UP bss */
8853 /* Optimize: Some of if/else could be combined */
8854 if ((cfg->flags & BRCMS_BSSCFG_HW_BCN) != 0) {
8855 /* Hardware beaconing for this config */
8856 u16 bcn[BCN_TMPL_LEN / 2];
8857 u32 both_valid = MCMD_BCN0VLD | MCMD_BCN1VLD;
8858 struct d11regs *regs = wlc->regs;
8860 /* Check if both templates are in use, if so sched. an interrupt
8861 * that will call back into this routine
8863 if ((R_REG(®s->maccommand) & both_valid) == both_valid)
8864 /* clear any previous status */
8865 W_REG(®s->macintstatus, MI_BCNTPL);
8867 /* Check that after scheduling the interrupt both of the
8868 * templates are still busy. if not clear the int. & remask
8870 if ((R_REG(®s->maccommand) & both_valid) == both_valid) {
8871 wlc->defmacintmask |= MI_BCNTPL;
8876 brcms_c_lowest_basic_rspec(wlc, &cfg->current_bss->rateset);
8877 /* update the template and ucode shm */
8878 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_BEACON,
8879 wlc->bcn_rspec, cfg, bcn, &len);
8880 brcms_c_write_hw_bcntemplates(wlc, bcn, len, false);
8885 * Update all beacons for the system.
8887 void brcms_c_update_beacon(struct brcms_c_info *wlc)
8889 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8891 if (bsscfg->up && !bsscfg->BSS)
8892 brcms_c_bss_update_beacon(wlc, bsscfg);
8895 /* Write ssid into shared memory */
8896 void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
8898 u8 *ssidptr = cfg->SSID;
8900 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
8902 /* padding the ssid with zero and copy it into shm */
8903 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
8904 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
8906 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
8907 brcms_c_write_shm(wlc, M_SSIDLEN, (u16) cfg->SSID_len);
8910 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
8912 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8914 /* update AP or IBSS probe responses */
8915 if (bsscfg->up && !bsscfg->BSS)
8916 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8920 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
8921 struct brcms_bss_cfg *cfg,
8924 u16 prb_resp[BCN_TMPL_LEN / 2];
8925 int len = BCN_TMPL_LEN;
8928 * write the probe response to hardware, or save in
8929 * the config structure
8932 /* create the probe response template */
8933 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
8934 cfg, prb_resp, &len);
8937 brcms_c_suspend_mac_and_wait(wlc);
8939 /* write the probe response into the template region */
8940 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
8941 (len + 3) & ~3, prb_resp);
8943 /* write the length of the probe response frame (+PLCP/-FCS) */
8944 brcms_c_write_shm(wlc, M_PRB_RESP_FRM_LEN, (u16) len);
8946 /* write the SSID and SSID length */
8947 brcms_c_shm_ssid_upd(wlc, cfg);
8950 * Write PLCP headers and durations for probe response frames
8951 * at all rates. Use the actual frame length covered by the
8952 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8953 * by subtracting the PLCP len and adding the FCS.
8955 len += (-D11_PHY_HDR_LEN + FCS_LEN);
8956 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
8959 brcms_c_enable_mac(wlc);
8962 /* prepares pdu for transmission. returns BCM error codes */
8963 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8967 struct ieee80211_hdr *h;
8970 txh = (struct d11txh *) (pdu->data);
8971 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8973 /* get the pkt queue info. This was put at brcms_c_sendctl or
8974 * brcms_c_send for PDU */
8975 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8981 /* return if insufficient dma resources */
8982 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8983 /* Mark precedences related to this FIFO, unsendable */
8984 /* A fifo is full. Clear precedences related to that FIFO */
8985 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8991 /* init tx reported rate mechanism */
8992 void brcms_c_reprate_init(struct brcms_c_info *wlc)
8994 brcms_c_bsscfg_reprate_init(wlc->bsscfg);
8997 /* per bsscfg init tx reported rate mechanism */
8998 void brcms_c_bsscfg_reprate_init(struct brcms_bss_cfg *bsscfg)
9000 bsscfg->txrspecidx = 0;
9001 memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec));
9004 void brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
9006 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
9007 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
9008 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
9009 brcms_chspec_bw(wlc->default_bss->chanspec),
9010 wlc->stf->txstreams);
9013 /* Read a single u16 from shared memory.
9014 * SHM 'offset' needs to be an even address
9016 u16 brcms_c_read_shm(struct brcms_c_info *wlc, uint offset)
9018 return brcms_b_read_shm(wlc->hw, offset);
9021 /* Write a single u16 to shared memory.
9022 * SHM 'offset' needs to be an even address
9024 void brcms_c_write_shm(struct brcms_c_info *wlc, uint offset, u16 v)
9026 brcms_b_write_shm(wlc->hw, offset, v);
9029 /* Copy a buffer to shared memory.
9030 * SHM 'offset' needs to be an even address and
9031 * Buffer length 'len' must be an even number of bytes
9033 void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, const void *buf,
9036 /* offset and len need to be even */
9037 if (len <= 0 || (offset & 1) || (len & 1))
9040 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
9044 /* wrapper BMAC functions to for HIGH driver access */
9045 void brcms_c_mctrl(struct brcms_c_info *wlc, u32 mask, u32 val)
9047 brcms_b_mctrl(wlc->hw, mask, val);
9050 void brcms_c_mhf(struct brcms_c_info *wlc, u8 idx, u16 mask, u16 val, int bands)
9052 brcms_b_mhf(wlc->hw, idx, mask, val, bands);
9055 static int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
9061 *blocks = wlc_hw->xmtfifo_sz[fifo];
9066 int brcms_c_xmtfifo_sz_get(struct brcms_c_info *wlc, uint fifo, uint *blocks)
9068 return brcms_b_xmtfifo_sz_get(wlc->hw, fifo, blocks);
9071 void brcms_c_write_template_ram(struct brcms_c_info *wlc, int offset, int len,
9074 brcms_b_write_template_ram(wlc->hw, offset, len, buf);
9078 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
9081 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
9082 if (match_reg_offset == RCM_BSSID_OFFSET)
9083 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
9086 void brcms_c_pllreq(struct brcms_c_info *wlc, bool set, u32 req_bit)
9088 brcms_b_pllreq(wlc->hw, set, req_bit);
9091 void brcms_c_reset_bmac_done(struct brcms_c_info *wlc)
9095 /* check for the particular priority flow control bit being set */
9097 brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc,
9098 struct brcms_txq_info *q,
9103 if (prio == ALLPRIO)
9104 prio_mask = TXQ_STOP_FOR_PRIOFC_MASK;
9106 prio_mask = NBITVAL(prio);
9108 return (q->stopped & prio_mask) == prio_mask;
9111 /* propagate the flow control to all interfaces using the given tx queue */
9112 void brcms_c_txflowcontrol(struct brcms_c_info *wlc,
9113 struct brcms_txq_info *qi,
9119 BCMMSG(wlc->wiphy, "flow control kicks in\n");
9121 if (prio == ALLPRIO)
9122 prio_bits = TXQ_STOP_FOR_PRIOFC_MASK;
9124 prio_bits = NBITVAL(prio);
9126 cur_bits = qi->stopped & prio_bits;
9128 /* Check for the case of no change and return early
9129 * Otherwise update the bit and continue
9132 if (cur_bits == prio_bits)
9135 mboolset(qi->stopped, prio_bits);
9140 mboolclr(qi->stopped, prio_bits);
9143 /* If there is a flow control override we will not change the external
9144 * flow control state.
9146 if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK)
9149 brcms_c_txflowcontrol_signal(wlc, qi, on, prio);
9153 brcms_c_txflowcontrol_override(struct brcms_c_info *wlc,
9154 struct brcms_txq_info *qi,
9155 bool on, uint override)
9159 prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK);
9161 /* Update the flow control bits and do an early return if there is
9162 * no change in the external flow control state.
9165 mboolset(qi->stopped, override);
9166 /* if there was a previous override bit on, then setting this
9167 * makes no difference.
9172 brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO);
9174 mboolclr(qi->stopped, override);
9175 /* clearing an override bit will only make a difference for
9176 * flow control if it was the only bit set. For any other
9177 * override setting, just return
9179 if (prev_override != override)
9182 if (qi->stopped == 0) {
9183 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
9187 for (prio = MAXPRIO; prio >= 0; prio--) {
9188 if (!mboolisset(qi->stopped, NBITVAL(prio)))
9189 brcms_c_txflowcontrol_signal(
9190 wlc, qi, OFF, prio);
9197 * Flag 'scan in progress' to withhold dynamic phy calibration
9199 void brcms_c_scan_start(struct brcms_c_info *wlc)
9201 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
9204 void brcms_c_scan_stop(struct brcms_c_info *wlc)
9206 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
9209 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
9211 wlc->pub->associated = state;
9212 wlc->bsscfg->associated = state;
9216 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
9217 * AMPDU traffic, packets pending in hardware have to be invalidated so that
9218 * when later on hardware releases them, they can be handled appropriately.
9220 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
9221 struct ieee80211_sta *sta,
9222 void (*dma_callback_fn))
9224 struct dma_pub *dmah;
9226 for (i = 0; i < NFIFO; i++) {
9229 dma_walk_packets(dmah, dma_callback_fn, sta);
9233 int brcms_c_get_curband(struct brcms_c_info *wlc)
9235 return wlc->band->bandunit;
9238 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
9240 /* flush packet queue when requested */
9242 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
9244 /* wait for queue and DMA fifos to run dry */
9245 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
9246 brcms_msleep(wlc->wl, 1);
9249 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
9251 wlc->bcn_li_bcn = interval;
9253 brcms_c_bcn_li_upd(wlc);
9256 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
9260 /* Remove override bit and clip to max qdbm value */
9261 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
9262 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
9265 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
9270 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
9272 /* Return qdbm units */
9273 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
9276 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc)
9279 brcms_c_radio_mpc_upd(wlc);
9283 * Search the name=value vars for a specific one and return its value.
9284 * Returns NULL if not found.
9286 char *getvar(char *vars, const char *name)
9298 /* first look in vars[] */
9299 for (s = vars; s && *s;) {
9300 if ((memcmp(s, name, len) == 0) && (s[len] == '='))
9311 * Search the vars for a specific one and return its value as
9312 * an integer. Returns 0 if not found.
9314 int getintvar(char *vars, const char *name)
9319 val = getvar(vars, name);
9320 if (val && !kstrtoul(val, 0, &res))