drivers/staging/media/lirc/lirc_serial.c

   1 /*
   2  * lirc_serial.c
   3  *
   4  * lirc_serial - Device driver that records pulse- and pause-lengths
   5  *             (space-lengths) between DDCD event on a serial port.
   6  *
   7  * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
   8  * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
   9  * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
  10  * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
  11  * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2 of the License, or
  15  *  (at your option) any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; if not, write to the Free Software
  24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27
  28 /*
  29  * Steve's changes to improve transmission fidelity:
  30  *   - for systems with the rdtsc instruction and the clock counter, a
  31  *     send_pule that times the pulses directly using the counter.
  32  *     This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
  33  *     not needed. Measurement shows very stable waveform, even where
  34  *     PCI activity slows the access to the UART, which trips up other
  35  *     versions.
  36  *   - For other system, non-integer-microsecond pulse/space lengths,
  37  *     done using fixed point binary. So, much more accurate carrier
  38  *     frequency.
  39  *   - fine tuned transmitter latency, taking advantage of fractional
  40  *     microseconds in previous change
  41  *   - Fixed bug in the way transmitter latency was accounted for by
  42  *     tuning the pulse lengths down - the send_pulse routine ignored
  43  *     this overhead as it timed the overall pulse length - so the
  44  *     pulse frequency was right but overall pulse length was too
  45  *     long. Fixed by accounting for latency on each pulse/space
  46  *     iteration.
  47  *
  48  * Steve Davies <steve@daviesfam.org>  July 2001
  49  */
  50
  51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  52
  53 #include <linux/module.h>
  54 #include <linux/errno.h>
  55 #include <linux/signal.h>
  56 #include <linux/sched.h>
  57 #include <linux/fs.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/ioport.h>
  60 #include <linux/kernel.h>
  61 #include <linux/serial_reg.h>
  62 #include <linux/time.h>
  63 #include <linux/string.h>
  64 #include <linux/types.h>
  65 #include <linux/wait.h>
  66 #include <linux/mm.h>
  67 #include <linux/delay.h>
  68 #include <linux/poll.h>
  69 #include <linux/platform_device.h>
  70
  71 #include <linux/io.h>
  72 #include <linux/irq.h>
  73 #include <linux/fcntl.h>
  74 #include <linux/spinlock.h>
  75
  76 #ifdef CONFIG_LIRC_SERIAL_NSLU2
  77 #include <asm/hardware.h>
  78 #endif
  79 /* From Intel IXP42X Developer's Manual (#252480-005): */
  80 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
  81 #define UART_IE_IXP42X_UUE   0x40 /* IXP42X UART Unit enable */
  82 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
  83
  84 #include <media/lirc.h>
  85 #include <media/lirc_dev.h>
  86
  87 #define LIRC_DRIVER_NAME "lirc_serial"
  88
  89 struct lirc_serial {
  90         int signal_pin;
  91         int signal_pin_change;
  92         u8 on;
  93         u8 off;
  94         long (*send_pulse)(unsigned long length);
  95         void (*send_space)(long length);
  96         int features;
  97         spinlock_t lock;
  98 };
  99
 100 #define LIRC_HOMEBREW           0
 101 #define LIRC_IRDEO              1
 102 #define LIRC_IRDEO_REMOTE       2
 103 #define LIRC_ANIMAX             3
 104 #define LIRC_IGOR               4
 105 #define LIRC_NSLU2              5
 106
 107 /*** module parameters ***/
 108 static int type;
 109 static int io;
 110 static int irq;
 111 static bool iommap;
 112 static int ioshift;
 113 static bool softcarrier = 1;
 114 static bool share_irq;
 115 static bool debug;
 116 static int sense = -1;  /* -1 = auto, 0 = active high, 1 = active low */
 117 static bool txsense;    /* 0 = active high, 1 = active low */
 118
 119 #define dprintk(fmt, args...)                                   \
 120         do {                                                    \
 121                 if (debug)                                      \
 122                         printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
 123                                fmt, ## args);                   \
 124         } while (0)
 125
 126 /* forward declarations */
 127 static long send_pulse_irdeo(unsigned long length);
 128 static long send_pulse_homebrew(unsigned long length);
 129 static void send_space_irdeo(long length);
 130 static void send_space_homebrew(long length);
 131
 132 static struct lirc_serial hardware[] = {
 133         [LIRC_HOMEBREW] = {
 134                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
 135                 .signal_pin        = UART_MSR_DCD,
 136                 .signal_pin_change = UART_MSR_DDCD,
 137                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 138                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 139                 .send_pulse = send_pulse_homebrew,
 140                 .send_space = send_space_homebrew,
 141 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 142                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 143                                 LIRC_CAN_SET_SEND_CARRIER |
 144                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 145 #else
 146                 .features    = LIRC_CAN_REC_MODE2
 147 #endif
 148         },
 149
 150         [LIRC_IRDEO] = {
 151                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
 152                 .signal_pin        = UART_MSR_DSR,
 153                 .signal_pin_change = UART_MSR_DDSR,
 154                 .on  = UART_MCR_OUT2,
 155                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 156                 .send_pulse  = send_pulse_irdeo,
 157                 .send_space  = send_space_irdeo,
 158                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 159                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 160         },
 161
 162         [LIRC_IRDEO_REMOTE] = {
 163                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
 164                 .signal_pin        = UART_MSR_DSR,
 165                 .signal_pin_change = UART_MSR_DDSR,
 166                 .on  = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 167                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 168                 .send_pulse  = send_pulse_irdeo,
 169                 .send_space  = send_space_irdeo,
 170                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 171                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 172         },
 173
 174         [LIRC_ANIMAX] = {
 175                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
 176                 .signal_pin        = UART_MSR_DCD,
 177                 .signal_pin_change = UART_MSR_DDCD,
 178                 .on  = 0,
 179                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 180                 .send_pulse = NULL,
 181                 .send_space = NULL,
 182                 .features   = LIRC_CAN_REC_MODE2
 183         },
 184
 185         [LIRC_IGOR] = {
 186                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
 187                 .signal_pin        = UART_MSR_DSR,
 188                 .signal_pin_change = UART_MSR_DDSR,
 189                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 190                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 191                 .send_pulse = send_pulse_homebrew,
 192                 .send_space = send_space_homebrew,
 193 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 194                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 195                                 LIRC_CAN_SET_SEND_CARRIER |
 196                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 197 #else
 198                 .features    = LIRC_CAN_REC_MODE2
 199 #endif
 200         },
 201
 202 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 203         /*
 204          * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
 205          * We receive on CTS of the 2nd serial port (R142,LHS), we
 206          * transmit with a IR diode between GPIO[1] (green status LED),
 207          * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
 208          * See also http://www.nslu2-linux.org for this device
 209          */
 210         [LIRC_NSLU2] = {
 211                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_NSLU2].lock),
 212                 .signal_pin        = UART_MSR_CTS,
 213                 .signal_pin_change = UART_MSR_DCTS,
 214                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 215                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 216                 .send_pulse = send_pulse_homebrew,
 217                 .send_space = send_space_homebrew,
 218 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 219                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 220                                 LIRC_CAN_SET_SEND_CARRIER |
 221                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 222 #else
 223                 .features    = LIRC_CAN_REC_MODE2
 224 #endif
 225         },
 226 #endif
 227
 228 };
 229
 230 #define RS_ISR_PASS_LIMIT 256
 231
 232 /*
 233  * A long pulse code from a remote might take up to 300 bytes.  The
 234  * daemon should read the bytes as soon as they are generated, so take
 235  * the number of keys you think you can push before the daemon runs
 236  * and multiply by 300.  The driver will warn you if you overrun this
 237  * buffer.  If you have a slow computer or non-busmastering IDE disks,
 238  * maybe you will need to increase this.
 239  */
 240
 241 /* This MUST be a power of two!  It has to be larger than 1 as well. */
 242
 243 #define RBUF_LEN 256
 244
 245 static struct timeval lasttv = {0, 0};
 246
 247 static struct lirc_buffer rbuf;
 248
 249 static unsigned int freq = 38000;
 250 static unsigned int duty_cycle = 50;
 251
 252 /* Initialized in init_timing_params() */
 253 static unsigned long period;
 254 static unsigned long pulse_width;
 255 static unsigned long space_width;
 256
 257 #if defined(__i386__)
 258 /*
 259  * From:
 260  * Linux I/O port programming mini-HOWTO
 261  * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
 262  * v, 28 December 1997
 263  *
 264  * [...]
 265  * Actually, a port I/O instruction on most ports in the 0-0x3ff range
 266  * takes almost exactly 1 microsecond, so if you're, for example, using
 267  * the parallel port directly, just do additional inb()s from that port
 268  * to delay.
 269  * [...]
 270  */
 271 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
 272  * comment above plus trimming to match actual measured frequency.
 273  * This will be sensitive to cpu speed, though hopefully most of the 1.5us
 274  * is spent in the uart access.  Still - for reference test machine was a
 275  * 1.13GHz Athlon system - Steve
 276  */
 277
 278 /*
 279  * changed from 400 to 450 as this works better on slower machines;
 280  * faster machines will use the rdtsc code anyway
 281  */
 282 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
 283
 284 #else
 285
 286 /* does anybody have information on other platforms ? */
 287 /* 256 = 1<<8 */
 288 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
 289
 290 #endif  /* __i386__ */
 291 /*
 292  * FIXME: should we be using hrtimers instead of this
 293  * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
 294  */
 295
 296 /* fetch serial input packet (1 byte) from register offset */
 297 static u8 sinp(int offset)
 298 {
 299         if (iommap != 0)
 300                 /* the register is memory-mapped */
 301                 offset <<= ioshift;
 302
 303         return inb(io + offset);
 304 }
 305
 306 /* write serial output packet (1 byte) of value to register offset */
 307 static void soutp(int offset, u8 value)
 308 {
 309         if (iommap != 0)
 310                 /* the register is memory-mapped */
 311                 offset <<= ioshift;
 312
 313         outb(value, io + offset);
 314 }
 315
 316 static void on(void)
 317 {
 318 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 319         /*
 320          * On NSLU2, we put the transmit diode between the output of the green
 321          * status LED and ground
 322          */
 323         if (type == LIRC_NSLU2) {
 324                 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
 325                 return;
 326         }
 327 #endif
 328         if (txsense)
 329                 soutp(UART_MCR, hardware[type].off);
 330         else
 331                 soutp(UART_MCR, hardware[type].on);
 332 }
 333
 334 static void off(void)
 335 {
 336 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 337         if (type == LIRC_NSLU2) {
 338                 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
 339                 return;
 340         }
 341 #endif
 342         if (txsense)
 343                 soutp(UART_MCR, hardware[type].on);
 344         else
 345                 soutp(UART_MCR, hardware[type].off);
 346 }
 347
 348 #ifndef MAX_UDELAY_MS
 349 #define MAX_UDELAY_US 5000
 350 #else
 351 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
 352 #endif
 353
 354 static void safe_udelay(unsigned long usecs)
 355 {
 356         while (usecs > MAX_UDELAY_US) {
 357                 udelay(MAX_UDELAY_US);
 358                 usecs -= MAX_UDELAY_US;
 359         }
 360         udelay(usecs);
 361 }
 362
 363 #ifdef USE_RDTSC
 364 /*
 365  * This is an overflow/precision juggle, complicated in that we can't
 366  * do long long divide in the kernel
 367  */
 368
 369 /*
 370  * When we use the rdtsc instruction to measure clocks, we keep the
 371  * pulse and space widths as clock cycles.  As this is CPU speed
 372  * dependent, the widths must be calculated in init_port and ioctl
 373  * time
 374  */
 375
 376 /* So send_pulse can quickly convert microseconds to clocks */
 377 static unsigned long conv_us_to_clocks;
 378
 379 static int init_timing_params(unsigned int new_duty_cycle,
 380                 unsigned int new_freq)
 381 {
 382         __u64 loops_per_sec, work;
 383
 384         duty_cycle = new_duty_cycle;
 385         freq = new_freq;
 386
 387         loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
 388         loops_per_sec *= HZ;
 389
 390         /* How many clocks in a microsecond?, avoiding long long divide */
 391         work = loops_per_sec;
 392         work *= 4295;  /* 4295 = 2^32 / 1e6 */
 393         conv_us_to_clocks = (work >> 32);
 394
 395         /*
 396          * Carrier period in clocks, approach good up to 32GHz clock,
 397          * gets carrier frequency within 8Hz
 398          */
 399         period = loops_per_sec >> 3;
 400         period /= (freq >> 3);
 401
 402         /* Derive pulse and space from the period */
 403         pulse_width = period * duty_cycle / 100;
 404         space_width = period - pulse_width;
 405         dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
 406                 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
 407                 "conv_us_to_clocks=%ld\n",
 408                 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
 409                 pulse_width, space_width, conv_us_to_clocks);
 410         return 0;
 411 }
 412 #else /* ! USE_RDTSC */
 413 static int init_timing_params(unsigned int new_duty_cycle,
 414                 unsigned int new_freq)
 415 {
 416 /*
 417  * period, pulse/space width are kept with 8 binary places -
 418  * IE multiplied by 256.
 419  */
 420         if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
 421             LIRC_SERIAL_TRANSMITTER_LATENCY)
 422                 return -EINVAL;
 423         if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
 424             LIRC_SERIAL_TRANSMITTER_LATENCY)
 425                 return -EINVAL;
 426         duty_cycle = new_duty_cycle;
 427         freq = new_freq;
 428         period = 256 * 1000000L / freq;
 429         pulse_width = period * duty_cycle / 100;
 430         space_width = period - pulse_width;
 431         dprintk("in init_timing_params, freq=%d pulse=%ld, "
 432                 "space=%ld\n", freq, pulse_width, space_width);
 433         return 0;
 434 }
 435 #endif /* USE_RDTSC */
 436
 437
 438 /* return value: space length delta */
 439
 440 static long send_pulse_irdeo(unsigned long length)
 441 {
 442         long rawbits, ret;
 443         int i;
 444         unsigned char output;
 445         unsigned char chunk, shifted;
 446
 447         /* how many bits have to be sent ? */
 448         rawbits = length * 1152 / 10000;
 449         if (duty_cycle > 50)
 450                 chunk = 3;
 451         else
 452                 chunk = 1;
 453         for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
 454                 shifted = chunk << (i * 3);
 455                 shifted >>= 1;
 456                 output &= (~shifted);
 457                 i++;
 458                 if (i == 3) {
 459                         soutp(UART_TX, output);
 460                         while (!(sinp(UART_LSR) & UART_LSR_THRE))
 461                                 ;
 462                         output = 0x7f;
 463                         i = 0;
 464                 }
 465         }
 466         if (i != 0) {
 467                 soutp(UART_TX, output);
 468                 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
 469                         ;
 470         }
 471
 472         if (i == 0)
 473                 ret = (-rawbits) * 10000 / 1152;
 474         else
 475                 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
 476
 477         return ret;
 478 }
 479
 480 #ifdef USE_RDTSC
 481 /* Version that uses Pentium rdtsc instruction to measure clocks */
 482
 483 /*
 484  * This version does sub-microsecond timing using rdtsc instruction,
 485  * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
 486  * Implicitly i586 architecture...  - Steve
 487  */
 488
 489 static long send_pulse_homebrew_softcarrier(unsigned long length)
 490 {
 491         int flag;
 492         unsigned long target, start, now;
 493
 494         /* Get going quick as we can */
 495         rdtscl(start);
 496         on();
 497         /* Convert length from microseconds to clocks */
 498         length *= conv_us_to_clocks;
 499         /* And loop till time is up - flipping at right intervals */
 500         now = start;
 501         target = pulse_width;
 502         flag = 1;
 503         /*
 504          * FIXME: This looks like a hard busy wait, without even an occasional,
 505          * polite, cpu_relax() call.  There's got to be a better way?
 506          *
 507          * The i2c code has the result of a lot of bit-banging work, I wonder if
 508          * there's something there which could be helpful here.
 509          */
 510         while ((now - start) < length) {
 511                 /* Delay till flip time */
 512                 do {
 513                         rdtscl(now);
 514                 } while ((now - start) < target);
 515
 516                 /* flip */
 517                 if (flag) {
 518                         rdtscl(now);
 519                         off();
 520                         target += space_width;
 521                 } else {
 522                         rdtscl(now); on();
 523                         target += pulse_width;
 524                 }
 525                 flag = !flag;
 526         }
 527         rdtscl(now);
 528         return ((now - start) - length) / conv_us_to_clocks;
 529 }
 530 #else /* ! USE_RDTSC */
 531 /* Version using udelay() */
 532
 533 /*
 534  * here we use fixed point arithmetic, with 8
 535  * fractional bits.  that gets us within 0.1% or so of the right average
 536  * frequency, albeit with some jitter in pulse length - Steve
 537  */
 538
 539 /* To match 8 fractional bits used for pulse/space length */
 540
 541 static long send_pulse_homebrew_softcarrier(unsigned long length)
 542 {
 543         int flag;
 544         unsigned long actual, target, d;
 545         length <<= 8;
 546
 547         actual = 0; target = 0; flag = 0;
 548         while (actual < length) {
 549                 if (flag) {
 550                         off();
 551                         target += space_width;
 552                 } else {
 553                         on();
 554                         target += pulse_width;
 555                 }
 556                 d = (target - actual -
 557                      LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
 558                 /*
 559                  * Note - we've checked in ioctl that the pulse/space
 560                  * widths are big enough so that d is > 0
 561                  */
 562                 udelay(d);
 563                 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
 564                 flag = !flag;
 565         }
 566         return (actual-length) >> 8;
 567 }
 568 #endif /* USE_RDTSC */
 569
 570 static long send_pulse_homebrew(unsigned long length)
 571 {
 572         if (length <= 0)
 573                 return 0;
 574
 575         if (softcarrier)
 576                 return send_pulse_homebrew_softcarrier(length);
 577         else {
 578                 on();
 579                 safe_udelay(length);
 580                 return 0;
 581         }
 582 }
 583
 584 static void send_space_irdeo(long length)
 585 {
 586         if (length <= 0)
 587                 return;
 588
 589         safe_udelay(length);
 590 }
 591
 592 static void send_space_homebrew(long length)
 593 {
 594         off();
 595         if (length <= 0)
 596                 return;
 597         safe_udelay(length);
 598 }
 599
 600 static void rbwrite(int l)
 601 {
 602         if (lirc_buffer_full(&rbuf)) {
 603                 /* no new signals will be accepted */
 604                 dprintk("Buffer overrun\n");
 605                 return;
 606         }
 607         lirc_buffer_write(&rbuf, (void *)&l);
 608 }
 609
 610 static void frbwrite(int l)
 611 {
 612         /* simple noise filter */
 613         static int pulse, space;
 614         static unsigned int ptr;
 615
 616         if (ptr > 0 && (l & PULSE_BIT)) {
 617                 pulse += l & PULSE_MASK;
 618                 if (pulse > 250) {
 619                         rbwrite(space);
 620                         rbwrite(pulse | PULSE_BIT);
 621                         ptr = 0;
 622                         pulse = 0;
 623                 }
 624                 return;
 625         }
 626         if (!(l & PULSE_BIT)) {
 627                 if (ptr == 0) {
 628                         if (l > 20000) {
 629                                 space = l;
 630                                 ptr++;
 631                                 return;
 632                         }
 633                 } else {
 634                         if (l > 20000) {
 635                                 space += pulse;
 636                                 if (space > PULSE_MASK)
 637                                         space = PULSE_MASK;
 638                                 space += l;
 639                                 if (space > PULSE_MASK)
 640                                         space = PULSE_MASK;
 641                                 pulse = 0;
 642                                 return;
 643                         }
 644                         rbwrite(space);
 645                         rbwrite(pulse | PULSE_BIT);
 646                         ptr = 0;
 647                         pulse = 0;
 648                 }
 649         }
 650         rbwrite(l);
 651 }
 652
 653 static irqreturn_t irq_handler(int i, void *blah)
 654 {
 655         struct timeval tv;
 656         int counter, dcd;
 657         u8 status;
 658         long deltv;
 659         int data;
 660         static int last_dcd = -1;
 661
 662         if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
 663                 /* not our interrupt */
 664                 return IRQ_NONE;
 665         }
 666
 667         counter = 0;
 668         do {
 669                 counter++;
 670                 status = sinp(UART_MSR);
 671                 if (counter > RS_ISR_PASS_LIMIT) {
 672                         pr_warn("AIEEEE: We're caught!\n");
 673                         break;
 674                 }
 675                 if ((status & hardware[type].signal_pin_change)
 676                     && sense != -1) {
 677                         /* get current time */
 678                         do_gettimeofday(&tv);
 679
 680                         /* New mode, written by Trent Piepho
 681                            <xyzzy@u.washington.edu>. */
 682
 683                         /*
 684                          * The old format was not very portable.
 685                          * We now use an int to pass pulses
 686                          * and spaces to user space.
 687                          *
 688                          * If PULSE_BIT is set a pulse has been
 689                          * received, otherwise a space has been
 690                          * received.  The driver needs to know if your
 691                          * receiver is active high or active low, or
 692                          * the space/pulse sense could be
 693                          * inverted. The bits denoted by PULSE_MASK are
 694                          * the length in microseconds. Lengths greater
 695                          * than or equal to 16 seconds are clamped to
 696                          * PULSE_MASK.  All other bits are unused.
 697                          * This is a much simpler interface for user
 698                          * programs, as well as eliminating "out of
 699                          * phase" errors with space/pulse
 700                          * autodetection.
 701                          */
 702
 703                         /* calc time since last interrupt in microseconds */
 704                         dcd = (status & hardware[type].signal_pin) ? 1 : 0;
 705
 706                         if (dcd == last_dcd) {
 707                                 pr_warn("ignoring spike: %d %d %lx %lx %lx %lx\n",
 708                                         dcd, sense,
 709                                         tv.tv_sec, lasttv.tv_sec,
 710                                         tv.tv_usec, lasttv.tv_usec);
 711                                 continue;
 712                         }
 713
 714                         deltv = tv.tv_sec-lasttv.tv_sec;
 715                         if (tv.tv_sec < lasttv.tv_sec ||
 716                             (tv.tv_sec == lasttv.tv_sec &&
 717                              tv.tv_usec < lasttv.tv_usec)) {
 718                                 pr_warn("AIEEEE: your clock just jumped backwards\n");
 719                                 pr_warn("%d %d %lx %lx %lx %lx\n",
 720                                         dcd, sense,
 721                                         tv.tv_sec, lasttv.tv_sec,
 722                                         tv.tv_usec, lasttv.tv_usec);
 723                                 data = PULSE_MASK;
 724                         } else if (deltv > 15) {
 725                                 data = PULSE_MASK; /* really long time */
 726                                 if (!(dcd^sense)) {
 727                                         /* sanity check */
 728                                         pr_warn("AIEEEE: %d %d %lx %lx %lx %lx\n",
 729                                                 dcd, sense,
 730                                                 tv.tv_sec, lasttv.tv_sec,
 731                                                 tv.tv_usec, lasttv.tv_usec);
 732                                         /*
 733                                          * detecting pulse while this
 734                                          * MUST be a space!
 735                                          */
 736                                         sense = sense ? 0 : 1;
 737                                 }
 738                         } else
 739                                 data = (int) (deltv*1000000 +
 740                                                tv.tv_usec -
 741                                                lasttv.tv_usec);
 742                         frbwrite(dcd^sense ? data : (data|PULSE_BIT));
 743                         lasttv = tv;
 744                         last_dcd = dcd;
 745                         wake_up_interruptible(&rbuf.wait_poll);
 746                 }
 747         } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
 748         return IRQ_HANDLED;
 749 }
 750
 751
 752 static int hardware_init_port(void)
 753 {
 754         u8 scratch, scratch2, scratch3;
 755
 756         /*
 757          * This is a simple port existence test, borrowed from the autoconfig
 758          * function in drivers/serial/8250.c
 759          */
 760         scratch = sinp(UART_IER);
 761         soutp(UART_IER, 0);
 762 #ifdef __i386__
 763         outb(0xff, 0x080);
 764 #endif
 765         scratch2 = sinp(UART_IER) & 0x0f;
 766         soutp(UART_IER, 0x0f);
 767 #ifdef __i386__
 768         outb(0x00, 0x080);
 769 #endif
 770         scratch3 = sinp(UART_IER) & 0x0f;
 771         soutp(UART_IER, scratch);
 772         if (scratch2 != 0 || scratch3 != 0x0f) {
 773                 /* we fail, there's nothing here */
 774                 pr_err("port existence test failed, cannot continue\n");
 775                 return -ENODEV;
 776         }
 777
 778
 779
 780         /* Set DLAB 0. */
 781         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 782
 783         /* First of all, disable all interrupts */
 784         soutp(UART_IER, sinp(UART_IER) &
 785               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 786
 787         /* Clear registers. */
 788         sinp(UART_LSR);
 789         sinp(UART_RX);
 790         sinp(UART_IIR);
 791         sinp(UART_MSR);
 792
 793 #ifdef CONFIG_LIRC_SERIAL_NSLU2
 794         if (type == LIRC_NSLU2) {
 795                 /* Setup NSLU2 UART */
 796
 797                 /* Enable UART */
 798                 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
 799                 /* Disable Receiver data Time out interrupt */
 800                 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
 801                 /* set out2 = interrupt unmask; off() doesn't set MCR
 802                    on NSLU2 */
 803                 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
 804         }
 805 #endif
 806
 807         /* Set line for power source */
 808         off();
 809
 810         /* Clear registers again to be sure. */
 811         sinp(UART_LSR);
 812         sinp(UART_RX);
 813         sinp(UART_IIR);
 814         sinp(UART_MSR);
 815
 816         switch (type) {
 817         case LIRC_IRDEO:
 818         case LIRC_IRDEO_REMOTE:
 819                 /* setup port to 7N1 @ 115200 Baud */
 820                 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
 821
 822                 /* Set DLAB 1. */
 823                 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
 824                 /* Set divisor to 1 => 115200 Baud */
 825                 soutp(UART_DLM, 0);
 826                 soutp(UART_DLL, 1);
 827                 /* Set DLAB 0 +  7N1 */
 828                 soutp(UART_LCR, UART_LCR_WLEN7);
 829                 /* THR interrupt already disabled at this point */
 830                 break;
 831         default:
 832                 break;
 833         }
 834
 835         return 0;
 836 }
 837
 838 static int lirc_serial_probe(struct platform_device *dev)
 839 {
 840         int i, nlow, nhigh, result;
 841
 842         result = request_irq(irq, irq_handler,
 843                              (share_irq ? IRQF_SHARED : 0),
 844                              LIRC_DRIVER_NAME, (void *)&hardware);
 845         if (result < 0) {
 846                 if (result == -EBUSY)
 847                         dev_err(&dev->dev, "IRQ %d busy\n", irq);
 848                 else if (result == -EINVAL)
 849                         dev_err(&dev->dev, "Bad irq number or handler\n");
 850                 return result;
 851         }
 852
 853         /* Reserve io region. */
 854         /*
 855          * Future MMAP-Developers: Attention!
 856          * For memory mapped I/O you *might* need to use ioremap() first,
 857          * for the NSLU2 it's done in boot code.
 858          */
 859         if (((iommap != 0)
 860              && (request_mem_region(iommap, 8 << ioshift,
 861                                     LIRC_DRIVER_NAME) == NULL))
 862            || ((iommap == 0)
 863                && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
 864                 dev_err(&dev->dev, "port %04x already in use\n", io);
 865                 dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
 866                 dev_warn(&dev->dev,
 867                          "or compile the serial port driver as module and\n");
 868                 dev_warn(&dev->dev, "make sure this module is loaded first\n");
 869                 result = -EBUSY;
 870                 goto exit_free_irq;
 871         }
 872
 873         result = hardware_init_port();
 874         if (result < 0)
 875                 goto exit_release_region;
 876
 877         /* Initialize pulse/space widths */
 878         init_timing_params(duty_cycle, freq);
 879
 880         /* If pin is high, then this must be an active low receiver. */
 881         if (sense == -1) {
 882                 /* wait 1/2 sec for the power supply */
 883                 msleep(500);
 884
 885                 /*
 886                  * probe 9 times every 0.04s, collect "votes" for
 887                  * active high/low
 888                  */
 889                 nlow = 0;
 890                 nhigh = 0;
 891                 for (i = 0; i < 9; i++) {
 892                         if (sinp(UART_MSR) & hardware[type].signal_pin)
 893                                 nlow++;
 894                         else
 895                                 nhigh++;
 896                         msleep(40);
 897                 }
 898                 sense = (nlow >= nhigh ? 1 : 0);
 899                 dev_info(&dev->dev, "auto-detected active %s receiver\n",
 900                          sense ? "low" : "high");
 901         } else
 902                 dev_info(&dev->dev, "Manually using active %s receiver\n",
 903                          sense ? "low" : "high");
 904
 905         dprintk("Interrupt %d, port %04x obtained\n", irq, io);
 906         return 0;
 907
 908 exit_release_region:
 909         if (iommap != 0)
 910                 release_mem_region(iommap, 8 << ioshift);
 911         else
 912                 release_region(io, 8);
 913 exit_free_irq:
 914         free_irq(irq, (void *)&hardware);
 915
 916         return result;
 917 }
 918
 919 static int lirc_serial_remove(struct platform_device *dev)
 920 {
 921         free_irq(irq, (void *)&hardware);
 922
 923         if (iommap != 0)
 924                 release_mem_region(iommap, 8 << ioshift);
 925         else
 926                 release_region(io, 8);
 927
 928         return 0;
 929 }
 930
 931 static int set_use_inc(void *data)
 932 {
 933         unsigned long flags;
 934
 935         /* initialize timestamp */
 936         do_gettimeofday(&lasttv);
 937
 938         spin_lock_irqsave(&hardware[type].lock, flags);
 939
 940         /* Set DLAB 0. */
 941         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 942
 943         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 944
 945         spin_unlock_irqrestore(&hardware[type].lock, flags);
 946
 947         return 0;
 948 }
 949
 950 static void set_use_dec(void *data)
 951 {       unsigned long flags;
 952
 953         spin_lock_irqsave(&hardware[type].lock, flags);
 954
 955         /* Set DLAB 0. */
 956         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 957
 958         /* First of all, disable all interrupts */
 959         soutp(UART_IER, sinp(UART_IER) &
 960               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 961         spin_unlock_irqrestore(&hardware[type].lock, flags);
 962 }
 963
 964 static ssize_t lirc_write(struct file *file, const char *buf,
 965                          size_t n, loff_t *ppos)
 966 {
 967         int i, count;
 968         unsigned long flags;
 969         long delta = 0;
 970         int *wbuf;
 971
 972         if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
 973                 return -EPERM;
 974
 975         count = n / sizeof(int);
 976         if (n % sizeof(int) || count % 2 == 0)
 977                 return -EINVAL;
 978         wbuf = memdup_user(buf, n);
 979         if (IS_ERR(wbuf))
 980                 return PTR_ERR(wbuf);
 981         spin_lock_irqsave(&hardware[type].lock, flags);
 982         if (type == LIRC_IRDEO) {
 983                 /* DTR, RTS down */
 984                 on();
 985         }
 986         for (i = 0; i < count; i++) {
 987                 if (i%2)
 988                         hardware[type].send_space(wbuf[i] - delta);
 989                 else
 990                         delta = hardware[type].send_pulse(wbuf[i]);
 991         }
 992         off();
 993         spin_unlock_irqrestore(&hardware[type].lock, flags);
 994         kfree(wbuf);
 995         return n;
 996 }
 997
 998 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
 999 {
1000         int result;
1001         __u32 value;
1002
1003         switch (cmd) {
1004         case LIRC_GET_SEND_MODE:
1005                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1006                         return -ENOIOCTLCMD;
1007
1008                 result = put_user(LIRC_SEND2MODE
1009                                   (hardware[type].features&LIRC_CAN_SEND_MASK),
1010                                   (__u32 *) arg);
1011                 if (result)
1012                         return result;
1013                 break;
1014
1015         case LIRC_SET_SEND_MODE:
1016                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1017                         return -ENOIOCTLCMD;
1018
1019                 result = get_user(value, (__u32 *) arg);
1020                 if (result)
1021                         return result;
1022                 /* only LIRC_MODE_PULSE supported */
1023                 if (value != LIRC_MODE_PULSE)
1024                         return -EINVAL;
1025                 break;
1026
1027         case LIRC_GET_LENGTH:
1028                 return -ENOIOCTLCMD;
1029                 break;
1030
1031         case LIRC_SET_SEND_DUTY_CYCLE:
1032                 dprintk("SET_SEND_DUTY_CYCLE\n");
1033                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1034                         return -ENOIOCTLCMD;
1035
1036                 result = get_user(value, (__u32 *) arg);
1037                 if (result)
1038                         return result;
1039                 if (value <= 0 || value > 100)
1040                         return -EINVAL;
1041                 return init_timing_params(value, freq);
1042                 break;
1043
1044         case LIRC_SET_SEND_CARRIER:
1045                 dprintk("SET_SEND_CARRIER\n");
1046                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1047                         return -ENOIOCTLCMD;
1048
1049                 result = get_user(value, (__u32 *) arg);
1050                 if (result)
1051                         return result;
1052                 if (value > 500000 || value < 20000)
1053                         return -EINVAL;
1054                 return init_timing_params(duty_cycle, value);
1055                 break;
1056
1057         default:
1058                 return lirc_dev_fop_ioctl(filep, cmd, arg);
1059         }
1060         return 0;
1061 }
1062
1063 static const struct file_operations lirc_fops = {
1064         .owner          = THIS_MODULE,
1065         .write          = lirc_write,
1066         .unlocked_ioctl = lirc_ioctl,
1067 #ifdef CONFIG_COMPAT
1068         .compat_ioctl   = lirc_ioctl,
1069 #endif
1070         .read           = lirc_dev_fop_read,
1071         .poll           = lirc_dev_fop_poll,
1072         .open           = lirc_dev_fop_open,
1073         .release        = lirc_dev_fop_close,
1074         .llseek         = no_llseek,
1075 };
1076
1077 static struct lirc_driver driver = {
1078         .name           = LIRC_DRIVER_NAME,
1079         .minor          = -1,
1080         .code_length    = 1,
1081         .sample_rate    = 0,
1082         .data           = NULL,
1083         .add_to_buf     = NULL,
1084         .rbuf           = &rbuf,
1085         .set_use_inc    = set_use_inc,
1086         .set_use_dec    = set_use_dec,
1087         .fops           = &lirc_fops,
1088         .dev            = NULL,
1089         .owner          = THIS_MODULE,
1090 };
1091
1092 static struct platform_device *lirc_serial_dev;
1093
1094 static int lirc_serial_suspend(struct platform_device *dev,
1095                                pm_message_t state)
1096 {
1097         /* Set DLAB 0. */
1098         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1099
1100         /* Disable all interrupts */
1101         soutp(UART_IER, sinp(UART_IER) &
1102               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1103
1104         /* Clear registers. */
1105         sinp(UART_LSR);
1106         sinp(UART_RX);
1107         sinp(UART_IIR);
1108         sinp(UART_MSR);
1109
1110         return 0;
1111 }
1112
1113 /* twisty maze... need a forward-declaration here... */
1114 static void lirc_serial_exit(void);
1115
1116 static int lirc_serial_resume(struct platform_device *dev)
1117 {
1118         unsigned long flags;
1119         int result;
1120
1121         result = hardware_init_port();
1122         if (result < 0)
1123                 return result;
1124
1125         spin_lock_irqsave(&hardware[type].lock, flags);
1126         /* Enable Interrupt */
1127         do_gettimeofday(&lasttv);
1128         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1129         off();
1130
1131         lirc_buffer_clear(&rbuf);
1132
1133         spin_unlock_irqrestore(&hardware[type].lock, flags);
1134
1135         return 0;
1136 }
1137
1138 static struct platform_driver lirc_serial_driver = {
1139         .probe          = lirc_serial_probe,
1140         .remove         = lirc_serial_remove,
1141         .suspend        = lirc_serial_suspend,
1142         .resume         = lirc_serial_resume,
1143         .driver         = {
1144                 .name   = "lirc_serial",
1145                 .owner  = THIS_MODULE,
1146         },
1147 };
1148
1149 static int __init lirc_serial_init(void)
1150 {
1151         int result;
1152
1153         /* Init read buffer. */
1154         result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1155         if (result < 0)
1156                 return result;
1157
1158         result = platform_driver_register(&lirc_serial_driver);
1159         if (result) {
1160                 printk("lirc register returned %d\n", result);
1161                 goto exit_buffer_free;
1162         }
1163
1164         lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1165         if (!lirc_serial_dev) {
1166                 result = -ENOMEM;
1167                 goto exit_driver_unregister;
1168         }
1169
1170         result = platform_device_add(lirc_serial_dev);
1171         if (result)
1172                 goto exit_device_put;
1173
1174         return 0;
1175
1176 exit_device_put:
1177         platform_device_put(lirc_serial_dev);
1178 exit_driver_unregister:
1179         platform_driver_unregister(&lirc_serial_driver);
1180 exit_buffer_free:
1181         lirc_buffer_free(&rbuf);
1182         return result;
1183 }
1184
1185 static void lirc_serial_exit(void)
1186 {
1187         platform_device_unregister(lirc_serial_dev);
1188         platform_driver_unregister(&lirc_serial_driver);
1189         lirc_buffer_free(&rbuf);
1190 }
1191
1192 static int __init lirc_serial_init_module(void)
1193 {
1194         int result;
1195
1196         switch (type) {
1197         case LIRC_HOMEBREW:
1198         case LIRC_IRDEO:
1199         case LIRC_IRDEO_REMOTE:
1200         case LIRC_ANIMAX:
1201         case LIRC_IGOR:
1202                 /* if nothing specified, use ttyS0/com1 and irq 4 */
1203                 io = io ? io : 0x3f8;
1204                 irq = irq ? irq : 4;
1205                 break;
1206 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1207         case LIRC_NSLU2:
1208                 io = io ? io : IRQ_IXP4XX_UART2;
1209                 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1210                 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1211                 ioshift = ioshift ? ioshift : 2;
1212                 break;
1213 #endif
1214         default:
1215                 return -EINVAL;
1216         }
1217         if (!softcarrier) {
1218                 switch (type) {
1219                 case LIRC_HOMEBREW:
1220                 case LIRC_IGOR:
1221 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1222                 case LIRC_NSLU2:
1223 #endif
1224                         hardware[type].features &=
1225                                 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1226                                   LIRC_CAN_SET_SEND_CARRIER);
1227                         break;
1228                 }
1229         }
1230
1231         /* make sure sense is either -1, 0, or 1 */
1232         if (sense != -1)
1233                 sense = !!sense;
1234
1235         result = lirc_serial_init();
1236         if (result)
1237                 return result;
1238
1239         driver.features = hardware[type].features;
1240         driver.dev = &lirc_serial_dev->dev;
1241         driver.minor = lirc_register_driver(&driver);
1242         if (driver.minor < 0) {
1243                 pr_err("register_chrdev failed!\n");
1244                 lirc_serial_exit();
1245                 return driver.minor;
1246         }
1247         return 0;
1248 }
1249
1250 static void __exit lirc_serial_exit_module(void)
1251 {
1252         lirc_unregister_driver(driver.minor);
1253         lirc_serial_exit();
1254         dprintk("cleaned up module\n");
1255 }
1256
1257
1258 module_init(lirc_serial_init_module);
1259 module_exit(lirc_serial_exit_module);
1260
1261 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1262 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1263               "Christoph Bartelmus, Andrei Tanas");
1264 MODULE_LICENSE("GPL");
1265
1266 module_param(type, int, S_IRUGO);
1267 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1268                  " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1269                  " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1270
1271 module_param(io, int, S_IRUGO);
1272 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1273
1274 /* some architectures (e.g. intel xscale) have memory mapped registers */
1275 module_param(iommap, bool, S_IRUGO);
1276 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1277                 " (0 = no memory mapped io)");
1278
1279 /*
1280  * some architectures (e.g. intel xscale) align the 8bit serial registers
1281  * on 32bit word boundaries.
1282  * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1283  */
1284 module_param(ioshift, int, S_IRUGO);
1285 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1286
1287 module_param(irq, int, S_IRUGO);
1288 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1289
1290 module_param(share_irq, bool, S_IRUGO);
1291 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1292
1293 module_param(sense, int, S_IRUGO);
1294 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1295                  " (0 = active high, 1 = active low )");
1296
1297 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1298 module_param(txsense, bool, S_IRUGO);
1299 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1300                  " (0 = active high, 1 = active low )");
1301 #endif
1302
1303 module_param(softcarrier, bool, S_IRUGO);
1304 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1305
1306 module_param(debug, bool, S_IRUGO | S_IWUSR);
1307 MODULE_PARM_DESC(debug, "Enable debugging messages");