1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
20 #define _HCI_HAL_INIT_C_
22 #include <osdep_service.h>
23 #include <drv_types.h>
24 #include <rtw_efuse.h>
26 #include <rtl8188e_hal.h>
27 #include <rtl8188e_led.h>
32 #define HAL_BB_ENABLE 1
34 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
36 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
40 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
41 haldata->OutEpNumber = 3;
44 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
45 haldata->OutEpNumber = 2;
48 haldata->OutEpQueueSel = TX_SELE_HQ;
49 haldata->OutEpNumber = 1;
54 DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
57 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
59 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
62 _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
64 /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
65 if (1 == haldata->OutEpNumber) {
70 /* All config other than above support one Bulk IN and one Interrupt IN. */
72 result = Hal_MappingOutPipe(adapt, NumOutPipe);
77 static void rtl8188eu_interface_configure(struct adapter *adapt)
79 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
80 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
82 if (pdvobjpriv->ishighspeed)
83 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
85 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
87 haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
89 haldata->UsbTxAggMode = 1;
90 haldata->UsbTxAggDescNum = 0x6; /* only 4 bits */
92 haldata->UsbRxAggMode = USB_RX_AGG_DMA;/* USB_RX_AGG_DMA; */
93 haldata->UsbRxAggBlockCount = 8; /* unit : 512b */
94 haldata->UsbRxAggBlockTimeout = 0x6;
95 haldata->UsbRxAggPageCount = 48; /* uint :128 b 0x0A; 10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
96 haldata->UsbRxAggPageTimeout = 0x4; /* 6, absolute time = 34ms/(2^6) */
98 HalUsbSetQueuePipeMapping8188EUsb(adapt,
99 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
102 static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
105 /* HW Power on sequence */
106 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
107 if (haldata->bMacPwrCtrlOn)
110 if (!HalPwrSeqCmdParsing(adapt, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) {
111 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
115 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
116 /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
117 usb_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
119 /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
120 value16 = usb_read16(adapt, REG_CR);
121 value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
122 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
123 /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
125 usb_write16(adapt, REG_CR, value16);
126 haldata->bMacPwrCtrlOn = true;
131 /* Shall USB interface init this? */
132 static void _InitInterrupt(struct adapter *Adapter)
136 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
138 /* HISR write one to clear */
139 usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
141 imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
142 usb_write32(Adapter, REG_HIMR_88E, imr);
143 haldata->IntrMask[0] = imr;
145 imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
146 usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
147 haldata->IntrMask[1] = imr_ex;
149 /* REG_USB_SPECIAL_OPTION - BIT(4) */
150 /* 0; Use interrupt endpoint to upload interrupt pkt */
151 /* 1; Use bulk endpoint to upload interrupt pkt, */
152 usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
154 if (!adapter_to_dvobj(Adapter)->ishighspeed)
155 usb_opt = usb_opt & (~INT_BULK_SEL);
157 usb_opt = usb_opt | (INT_BULK_SEL);
159 usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
162 static void _InitQueueReservedPage(struct adapter *Adapter)
164 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
165 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
172 bool bWiFiConfig = pregistrypriv->wifi_spec;
175 if (haldata->OutEpQueueSel & TX_SELE_HQ)
178 if (haldata->OutEpQueueSel & TX_SELE_LQ)
181 /* NOTE: This step shall be proceed before writting REG_RQPN. */
182 if (haldata->OutEpQueueSel & TX_SELE_NQ)
184 value8 = (u8)_NPQ(numNQ);
185 usb_write8(Adapter, REG_RQPN_NPQ, value8);
187 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
190 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
191 usb_write32(Adapter, REG_RQPN, value32);
193 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
194 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
195 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
199 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
201 usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
202 usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
203 usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
204 usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
205 usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
208 static void _InitPageBoundary(struct adapter *Adapter)
210 /* RX Page Boundary */
212 u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
214 usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
217 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
218 u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
221 u16 value16 = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
223 value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
224 _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
225 _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
227 usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
230 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
232 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
235 switch (haldata->OutEpQueueSel) {
243 value = QUEUE_NORMAL;
248 _InitNormalChipRegPriority(Adapter, value, value, value, value,
252 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
254 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
255 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
256 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
260 switch (haldata->OutEpQueueSel) {
261 case (TX_SELE_HQ | TX_SELE_LQ):
262 valueHi = QUEUE_HIGH;
263 valueLow = QUEUE_LOW;
265 case (TX_SELE_NQ | TX_SELE_LQ):
266 valueHi = QUEUE_NORMAL;
267 valueLow = QUEUE_LOW;
269 case (TX_SELE_HQ | TX_SELE_NQ):
270 valueHi = QUEUE_HIGH;
271 valueLow = QUEUE_NORMAL;
277 if (!pregistrypriv->wifi_spec) {
284 } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
292 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
295 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
297 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
298 u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
300 if (!pregistrypriv->wifi_spec) {/* typical setting */
307 } else {/* for WMM */
315 _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
318 static void _InitQueuePriority(struct adapter *Adapter)
320 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
322 switch (haldata->OutEpNumber) {
324 _InitNormalChipOneOutEpPriority(Adapter);
327 _InitNormalChipTwoOutEpPriority(Adapter);
330 _InitNormalChipThreeOutEpPriority(Adapter);
337 static void _InitNetworkType(struct adapter *Adapter)
341 value32 = usb_read32(Adapter, REG_CR);
342 /* TODO: use the other function to set network type */
343 value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
345 usb_write32(Adapter, REG_CR, value32);
348 static void _InitTransferPageSize(struct adapter *Adapter)
350 /* Tx page size is always 128. */
353 value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
354 usb_write8(Adapter, REG_PBP, value8);
357 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
359 usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
362 static void _InitWMACSetting(struct adapter *Adapter)
364 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
366 haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
367 RCR_CBSSID_DATA | RCR_CBSSID_BCN |
368 RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
369 RCR_APP_MIC | RCR_APP_PHYSTS;
371 /* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
372 usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
374 /* Accept all multicast address */
375 usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
376 usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
379 static void _InitAdaptiveCtrl(struct adapter *Adapter)
384 /* Response Rate Set */
385 value32 = usb_read32(Adapter, REG_RRSR);
386 value32 &= ~RATE_BITMAP_ALL;
387 value32 |= RATE_RRSR_CCK_ONLY_1M;
388 usb_write32(Adapter, REG_RRSR, value32);
390 /* CF-END Threshold */
392 /* SIFS (used in NAV) */
393 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
394 usb_write16(Adapter, REG_SPEC_SIFS, value16);
397 value16 = _LRL(0x30) | _SRL(0x30);
398 usb_write16(Adapter, REG_RL, value16);
401 static void _InitEDCA(struct adapter *Adapter)
403 /* Set Spec SIFS (used in NAV) */
404 usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
405 usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
407 /* Set SIFS for CCK */
408 usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
410 /* Set SIFS for OFDM */
411 usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
414 usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
415 usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
416 usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
417 usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
420 static void _InitRDGSetting(struct adapter *Adapter)
422 usb_write8(Adapter, REG_RD_CTRL, 0xFF);
423 usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
424 usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
427 static void _InitRxSetting(struct adapter *Adapter)
429 usb_write32(Adapter, REG_MACID, 0x87654321);
430 usb_write32(Adapter, 0x0700, 0x87654321);
433 static void _InitRetryFunction(struct adapter *Adapter)
437 value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
438 value8 |= EN_AMPDU_RTY_NEW;
439 usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
441 /* Set ACK timeout */
442 usb_write8(Adapter, REG_ACKTO, 0x40);
445 /*-----------------------------------------------------------------------------
446 * Function: usb_AggSettingTxUpdate()
448 * Overview: Separate TX/RX parameters update independent for TP detection and
449 * dynamic TX/RX aggreagtion parameters update.
451 * Input: struct adapter *
453 * Output/Return: NONE
457 * 12/10/2010 MHC Separate to smaller function.
459 *---------------------------------------------------------------------------*/
460 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
462 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
465 if (Adapter->registrypriv.wifi_spec)
466 haldata->UsbTxAggMode = false;
468 if (haldata->UsbTxAggMode) {
469 value32 = usb_read32(Adapter, REG_TDECTRL);
470 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
471 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
473 usb_write32(Adapter, REG_TDECTRL, value32);
475 } /* usb_AggSettingTxUpdate */
477 /*-----------------------------------------------------------------------------
478 * Function: usb_AggSettingRxUpdate()
480 * Overview: Separate TX/RX parameters update independent for TP detection and
481 * dynamic TX/RX aggreagtion parameters update.
483 * Input: struct adapter *
485 * Output/Return: NONE
489 * 12/10/2010 MHC Separate to smaller function.
491 *---------------------------------------------------------------------------*/
493 usb_AggSettingRxUpdate(
494 struct adapter *Adapter
497 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
501 valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
502 valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
504 switch (haldata->UsbRxAggMode) {
506 valueDMA |= RXDMA_AGG_EN;
507 valueUSB &= ~USB_AGG_EN;
510 valueDMA &= ~RXDMA_AGG_EN;
511 valueUSB |= USB_AGG_EN;
514 valueDMA |= RXDMA_AGG_EN;
515 valueUSB |= USB_AGG_EN;
517 case USB_RX_AGG_DISABLE:
519 valueDMA &= ~RXDMA_AGG_EN;
520 valueUSB &= ~USB_AGG_EN;
524 usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
525 usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
527 switch (haldata->UsbRxAggMode) {
529 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
530 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
533 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
534 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
537 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
538 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
539 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
540 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
542 case USB_RX_AGG_DISABLE:
550 haldata->HwRxPageSize = 128;
553 haldata->HwRxPageSize = 64;
556 haldata->HwRxPageSize = 256;
559 haldata->HwRxPageSize = 512;
562 haldata->HwRxPageSize = 1024;
567 } /* usb_AggSettingRxUpdate */
569 static void InitUsbAggregationSetting(struct adapter *Adapter)
571 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
573 /* Tx aggregation setting */
574 usb_AggSettingTxUpdate(Adapter);
576 /* Rx aggregation setting */
577 usb_AggSettingRxUpdate(Adapter);
579 /* 201/12/10 MH Add for USB agg mode dynamic switch. */
580 haldata->UsbRxHighSpeedMode = false;
583 static void _InitBeaconParameters(struct adapter *Adapter)
585 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
587 usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
589 /* TODO: Remove these magic number */
590 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */
591 usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */
592 usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */
594 /* Suggested by designer timchen. Change beacon AIFS to the largest number */
595 /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
596 usb_write16(Adapter, REG_BCNTCFG, 0x660F);
598 haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
599 haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
600 haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
601 haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
602 haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
605 static void _BeaconFunctionEnable(struct adapter *Adapter,
606 bool Enable, bool Linked)
608 usb_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
610 usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
613 /* Set CCK and OFDM Block "ON" */
614 static void _BBTurnOnBlock(struct adapter *Adapter)
616 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
617 PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
625 static void _InitAntenna_Selection(struct adapter *Adapter)
627 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
629 if (haldata->AntDivCfg == 0)
631 DBG_88E("==> %s ....\n", __func__);
633 usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0)|BIT23);
634 PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
636 if (PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
637 haldata->CurAntenna = Antenna_A;
639 haldata->CurAntenna = Antenna_B;
640 DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
643 /*-----------------------------------------------------------------------------
644 * Function: HwSuspendModeEnable92Cu()
646 * Overview: HW suspend mode switch.
656 * 08/23/2010 MHC HW suspend mode switch test..
657 *---------------------------------------------------------------------------*/
658 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
661 enum rt_rf_power_state rfpowerstate = rf_off;
663 if (adapt->pwrctrlpriv.bHWPowerdown) {
664 val8 = usb_read8(adapt, REG_HSISR);
665 DBG_88E("pwrdown, 0x5c(BIT7)=%02x\n", val8);
666 rfpowerstate = (val8 & BIT7) ? rf_off : rf_on;
667 } else { /* rf on/off */
668 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3));
669 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
670 DBG_88E("GPIO_IN=%02x\n", val8);
671 rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;
674 } /* HalDetectPwrDownMode */
676 static u32 rtl8188eu_hal_init(struct adapter *Adapter)
681 u32 status = _SUCCESS;
682 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
683 struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
684 struct registry_priv *pregistrypriv = &Adapter->registrypriv;
685 u32 init_start_time = jiffies;
687 #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
690 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
692 if (Adapter->pwrctrlpriv.bkeepfwalive) {
694 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
695 PHY_IQCalibrate_8188E(Adapter, true);
697 PHY_IQCalibrate_8188E(Adapter, false);
698 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
701 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
702 PHY_LCCalibrate_8188E(Adapter);
707 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
708 status = rtl8188eu_InitPowerOn(Adapter);
709 if (status == _FAIL) {
710 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
714 /* Save target channel */
715 haldata->CurrentChannel = 6;/* default set to 6 */
717 if (pwrctrlpriv->reg_rfoff) {
718 pwrctrlpriv->rf_pwrstate = rf_off;
721 /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
722 /* HW GPIO pin. Before PHY_RFConfig8192C. */
723 /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
725 if (!pregistrypriv->wifi_spec) {
726 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
729 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
732 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
733 _InitQueueReservedPage(Adapter);
734 _InitQueuePriority(Adapter);
735 _InitPageBoundary(Adapter);
736 _InitTransferPageSize(Adapter);
738 _InitTxBufferBoundary(Adapter, 0);
740 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
741 if (Adapter->registrypriv.mp_mode == 1) {
742 _InitRxSetting(Adapter);
743 Adapter->bFWReady = false;
744 haldata->fw_ractrl = false;
746 status = rtl88eu_download_fw(Adapter);
749 DBG_88E("%s: Download Firmware failed!!\n", __func__);
750 Adapter->bFWReady = false;
751 haldata->fw_ractrl = false;
754 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
755 Adapter->bFWReady = true;
756 haldata->fw_ractrl = false;
759 rtl8188e_InitializeFirmwareVars(Adapter);
761 rtl88eu_phy_mac_config(Adapter);
763 rtl88eu_phy_bb_config(Adapter);
765 rtl88eu_phy_rf_config(Adapter);
767 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
768 status = rtl8188e_iol_efuse_patch(Adapter);
769 if (status == _FAIL) {
770 DBG_88E("%s rtl8188e_iol_efuse_patch failed\n", __func__);
774 _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
776 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
777 status = InitLLTTable(Adapter, txpktbuf_bndy);
778 if (status == _FAIL) {
779 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
783 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
784 /* Get Rx PHY status in order to report RSSI and others. */
785 _InitDriverInfoSize(Adapter, DRVINFO_SZ);
787 _InitInterrupt(Adapter);
788 hal_init_macaddr(Adapter);/* set mac_address */
789 _InitNetworkType(Adapter);/* set msr */
790 _InitWMACSetting(Adapter);
791 _InitAdaptiveCtrl(Adapter);
793 _InitRetryFunction(Adapter);
794 InitUsbAggregationSetting(Adapter);
795 _InitBeaconParameters(Adapter);
796 /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
797 /* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
798 /* Enable MACTXEN/MACRXEN block */
799 value16 = usb_read16(Adapter, REG_CR);
800 value16 |= (MACTXEN | MACRXEN);
801 usb_write8(Adapter, REG_CR, value16);
803 if (haldata->bRDGEnable)
804 _InitRDGSetting(Adapter);
806 /* Enable TX Report */
807 /* Enable Tx Report Timer */
808 value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
809 usb_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0));
810 /* Set MAX RPT MACID */
811 usb_write8(Adapter, REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
812 /* Tx RPT Timer. Unit: 32us */
813 usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
815 usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
817 usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
818 usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
820 /* Keep RfRegChnlVal for later use. */
821 haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
822 haldata->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
824 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
825 _BBTurnOnBlock(Adapter);
827 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
828 invalidate_cam_all(Adapter);
830 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
831 /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */
832 PHY_SetTxPowerLevel8188E(Adapter, haldata->CurrentChannel);
834 /* Move by Neo for USB SS to below setp */
835 /* _RfPowerSave(Adapter); */
837 _InitAntenna_Selection(Adapter);
840 /* Disable BAR, suggested by Scott */
841 /* 2010.04.09 add by hpfan */
843 usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
846 /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
847 usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
849 if (pregistrypriv->wifi_spec)
850 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
852 /* Nav limit , suggest by scott */
853 usb_write8(Adapter, 0x652, 0x0);
855 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
856 rtl8188e_InitHalDm(Adapter);
858 /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
859 /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
860 /* call initstruct adapter. May cause some problem?? */
861 /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
862 /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
863 /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
864 /* Added by tynli. 2010.03.30. */
865 pwrctrlpriv->rf_pwrstate = rf_on;
867 /* enable Tx report. */
868 usb_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F);
870 /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
871 usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
873 /* tynli_test_tx_report. */
874 usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
876 /* enable tx DMA to drop the redundate data of packet */
877 usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
879 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
880 /* 2010/08/26 MH Merge from 8192CE. */
881 if (pwrctrlpriv->rf_pwrstate == rf_on) {
882 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
883 PHY_IQCalibrate_8188E(Adapter, true);
885 PHY_IQCalibrate_8188E(Adapter, false);
886 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
889 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
891 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
893 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
894 PHY_LCCalibrate_8188E(Adapter);
897 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
898 /* _InitPABias(Adapter); */
899 usb_write8(Adapter, REG_USB_HRPWM, 0);
901 /* ack for xmit mgmt frames. */
902 usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
905 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
907 DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time));
913 static void CardDisableRTL8188EU(struct adapter *Adapter)
916 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
918 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
920 /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
921 val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
922 usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1));
925 usb_write8(Adapter, REG_CR, 0x0);
927 /* Run LPS WL RFOFF flow */
928 HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW);
930 /* 2. 0x1F[7:0] = 0 turn off RF */
932 val8 = usb_read8(Adapter, REG_MCUFWDL);
933 if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
934 /* Reset MCU 0x2[10]=0. */
935 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
936 val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */
937 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
940 /* reset MCU ready status */
941 usb_write8(Adapter, REG_MCUFWDL, 0);
945 val8 = usb_read8(Adapter, REG_32K_CTRL);
946 usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT0));
948 /* Card disable power action flow */
949 HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW);
951 /* Reset MCU IO Wrapper */
952 val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
953 usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3)));
954 val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
955 usb_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3);
957 /* YJ,test add, 111207. For Power Consumption. */
958 val8 = usb_read8(Adapter, GPIO_IN);
959 usb_write8(Adapter, GPIO_OUT, val8);
960 usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
962 val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
963 usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
964 val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
965 usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
966 usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
967 haldata->bMacPwrCtrlOn = false;
968 Adapter->bFWReady = false;
970 static void rtl8192cu_hw_power_down(struct adapter *adapt)
972 /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
973 /* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
975 /* Enable register area 0x0-0xc. */
976 usb_write8(adapt, REG_RSV_CTRL, 0x0);
977 usb_write16(adapt, REG_APS_FSMCO, 0x8812);
980 static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
983 DBG_88E("==> %s\n", __func__);
985 usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
986 usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
988 DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
989 if (Adapter->pwrctrlpriv.bkeepfwalive) {
990 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
991 rtl8192cu_hw_power_down(Adapter);
993 if (Adapter->hw_init_completed) {
994 CardDisableRTL8188EU(Adapter);
996 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
997 rtl8192cu_hw_power_down(Adapter);
1003 static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
1006 struct recv_buf *precvbuf;
1008 struct recv_priv *precvpriv = &(Adapter->recvpriv);
1012 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
1013 ("===> usb_inirp_init\n"));
1015 precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1017 /* issue Rx irp to receive data */
1018 precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1019 for (i = 0; i < NR_RECVBUFF; i++) {
1020 if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
1021 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
1027 precvpriv->free_recv_buf_queue_cnt--;
1032 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1038 static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
1040 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n"));
1042 usb_read_port_cancel(Adapter);
1044 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n"));
1051 /* EEPROM/EFUSE Content Parsing */
1054 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1056 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1058 if (!AutoLoadFail) {
1060 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1061 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1063 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1064 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1065 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1067 haldata->EEPROMVID = EEPROM_Default_VID;
1068 haldata->EEPROMPID = EEPROM_Default_PID;
1070 /* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1071 haldata->EEPROMCustomerID = EEPROM_Default_CustomerID;
1072 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1075 DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1076 DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1079 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1082 u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1083 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1086 for (i = 0; i < 6; i++)
1087 eeprom->mac_addr[i] = sMacAddr[i];
1089 /* Read Permanent MAC address */
1090 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1092 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1093 ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
1094 eeprom->mac_addr[0], eeprom->mac_addr[1],
1095 eeprom->mac_addr[2], eeprom->mac_addr[3],
1096 eeprom->mac_addr[4], eeprom->mac_addr[5]));
1100 readAdapterInfo_8188EU(
1101 struct adapter *adapt
1104 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1106 /* parse the eeprom/efuse content */
1107 Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1108 Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1109 Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1111 Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1112 Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1113 Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1114 rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1115 Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1116 Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1117 Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1118 Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1119 Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1123 static void _ReadPROMContent(
1124 struct adapter *Adapter
1127 struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1130 /* check system boot selection */
1131 eeValue = usb_read8(Adapter, REG_9346CR);
1132 eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1133 eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
1135 DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1136 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1138 Hal_InitPGData88E(Adapter);
1139 readAdapterInfo_8188EU(Adapter);
1142 static void _ReadRFType(struct adapter *Adapter)
1144 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1146 haldata->rf_chip = RF_6052;
1149 static void _ReadAdapterInfo8188EU(struct adapter *Adapter)
1151 u32 start = jiffies;
1153 MSG_88E("====> %s\n", __func__);
1155 _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
1156 _ReadPROMContent(Adapter);
1158 MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
1161 #define GPIO_DEBUG_PORT_NUM 0
1162 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1166 static void ResumeTxBeacon(struct adapter *adapt)
1168 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1170 /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1171 /* which should be read from register to a global variable. */
1173 usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6);
1174 haldata->RegFwHwTxQCtrl |= BIT6;
1175 usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1176 haldata->RegReg542 |= BIT0;
1177 usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1180 static void StopTxBeacon(struct adapter *adapt)
1182 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1184 /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1185 /* which should be read from register to a global variable. */
1187 usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6));
1188 haldata->RegFwHwTxQCtrl &= (~BIT6);
1189 usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1190 haldata->RegReg542 &= ~(BIT0);
1191 usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1193 /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */
1196 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1199 u8 mode = *((u8 *)val);
1201 /* disable Port0 TSF update */
1202 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1205 val8 = usb_read8(Adapter, MSR)&0x0c;
1207 usb_write8(Adapter, MSR, val8);
1209 DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1211 if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1212 StopTxBeacon(Adapter);
1214 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1215 } else if ((mode == _HW_STATE_ADHOC_)) {
1216 ResumeTxBeacon(Adapter);
1217 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1218 } else if (mode == _HW_STATE_AP_) {
1219 ResumeTxBeacon(Adapter);
1221 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1224 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1225 /* enable to rx data frame */
1226 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1227 /* enable to rx ps-poll */
1228 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1230 /* Beacon Control related register for first time */
1231 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */
1233 usb_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */
1234 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1235 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1236 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */
1239 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1241 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1242 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1244 /* enable BCN0 Function for if1 */
1245 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1246 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1248 /* dis BCN1 ATIM WND if if2 is station */
1249 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1253 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1258 reg_macid = REG_MACID;
1260 for (idx = 0; idx < 6; idx++)
1261 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1264 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1269 reg_bssid = REG_BSSID;
1271 for (idx = 0; idx < 6; idx++)
1272 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1275 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1279 bcn_ctrl_reg = REG_BCN_CTRL;
1282 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1284 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1287 static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1289 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1290 struct dm_priv *pdmpriv = &haldata->dmpriv;
1291 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1294 case HW_VAR_MEDIA_STATUS:
1298 val8 = usb_read8(Adapter, MSR)&0x0c;
1299 val8 |= *((u8 *)val);
1300 usb_write8(Adapter, MSR, val8);
1303 case HW_VAR_MEDIA_STATUS1:
1307 val8 = usb_read8(Adapter, MSR) & 0x03;
1308 val8 |= *((u8 *)val) << 2;
1309 usb_write8(Adapter, MSR, val8);
1312 case HW_VAR_SET_OPMODE:
1313 hw_var_set_opmode(Adapter, variable, val);
1315 case HW_VAR_MAC_ADDR:
1316 hw_var_set_macaddr(Adapter, variable, val);
1319 hw_var_set_bssid(Adapter, variable, val);
1321 case HW_VAR_BASIC_RATE:
1326 /* 2007.01.16, by Emily */
1327 /* Select RRSR (in Legacy-OFDM and CCK) */
1328 /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1329 /* We do not use other rates. */
1330 HalSetBrateCfg(Adapter, val, &BrateCfg);
1331 DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1333 /* 2011.03.30 add by Luke Lee */
1334 /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1335 /* because CCK 2M has poor TXEVM */
1336 /* CCK 5.5M & 11M ACK should be enabled for better performance */
1338 BrateCfg = (BrateCfg | 0xd) & 0x15d;
1339 haldata->BasicRateSet = BrateCfg;
1341 BrateCfg |= 0x01; /* default enable 1M ACK rate */
1342 /* Set RRSR rate table. */
1343 usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1344 usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1345 usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1347 /* Set RTS initial rate */
1348 while (BrateCfg > 0x1) {
1349 BrateCfg = (BrateCfg >> 1);
1353 usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1356 case HW_VAR_TXPAUSE:
1357 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1359 case HW_VAR_BCN_FUNC:
1360 hw_var_set_bcn_func(Adapter, variable, val);
1362 case HW_VAR_CORRECT_TSF:
1365 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1366 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1368 tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1370 if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1371 StopTxBeacon(Adapter);
1373 /* disable related TSF function */
1374 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1376 usb_write32(Adapter, REG_TSFTR, tsf);
1377 usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1379 /* enable related TSF function */
1380 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(3));
1382 if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1383 ResumeTxBeacon(Adapter);
1386 case HW_VAR_CHECK_BSSID:
1388 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1392 val32 = usb_read32(Adapter, REG_RCR);
1394 val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1396 usb_write32(Adapter, REG_RCR, val32);
1399 case HW_VAR_MLME_DISCONNECT:
1400 /* Set RCR to not to receive data frame when NO LINK state */
1401 /* reject all data frames */
1402 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1405 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
1407 /* disable update TSF */
1408 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1410 case HW_VAR_MLME_SITESURVEY:
1411 if (*((u8 *)val)) { /* under sitesurvey */
1412 /* config RCR to receive different BSSID & not to receive data frame */
1413 u32 v = usb_read32(Adapter, REG_RCR);
1414 v &= ~(RCR_CBSSID_BCN);
1415 usb_write32(Adapter, REG_RCR, v);
1416 /* reject all data frame */
1417 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1419 /* disable update TSF */
1420 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1421 } else { /* sitesurvey done */
1422 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1423 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1425 if ((is_client_associated_to_ap(Adapter)) ||
1426 ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1427 /* enable to rx data frame */
1428 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1430 /* enable update TSF */
1431 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1432 } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1433 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1434 /* enable update TSF */
1435 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1437 if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1438 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1440 if (Adapter->in_cta_test) {
1441 u32 v = usb_read32(Adapter, REG_RCR);
1442 v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
1443 usb_write32(Adapter, REG_RCR, v);
1445 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1450 case HW_VAR_MLME_JOIN:
1452 u8 RetryLimit = 0x30;
1453 u8 type = *((u8 *)val);
1454 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1456 if (type == 0) { /* prepare to join */
1457 /* enable to rx data frame.Accept all data frame */
1458 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1460 if (Adapter->in_cta_test) {
1461 u32 v = usb_read32(Adapter, REG_RCR);
1462 v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */
1463 usb_write32(Adapter, REG_RCR, v);
1465 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1468 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1469 RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1470 else /* Ad-hoc Mode */
1472 } else if (type == 1) {
1473 /* joinbss_event call back when join res < 0 */
1474 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1475 } else if (type == 2) {
1476 /* sta add event call back */
1477 /* enable update TSF */
1478 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1480 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1483 usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1486 case HW_VAR_BEACON_INTERVAL:
1487 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1489 case HW_VAR_SLOT_TIME:
1491 u8 u1bAIFS, aSifsTime;
1492 struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
1493 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
1495 usb_write8(Adapter, REG_SLOT, val[0]);
1497 if (pmlmeinfo->WMM_enable == 0) {
1498 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1503 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1505 /* <Roger_EXP> Temporary removed, 2008.06.20. */
1506 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1507 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1508 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1509 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1513 case HW_VAR_RESP_SIFS:
1514 /* RESP_SIFS for CCK */
1515 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /* SIFS_T2T_CCK (0x08) */
1516 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1517 /* RESP_SIFS for OFDM */
1518 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1519 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1521 case HW_VAR_ACK_PREAMBLE:
1524 u8 bShortPreamble = *((bool *)val);
1525 /* Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1526 regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1530 usb_write8(Adapter, REG_RRSR+2, regTmp);
1533 case HW_VAR_SEC_CFG:
1534 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1536 case HW_VAR_DM_FLAG:
1537 podmpriv->SupportAbility = *((u8 *)val);
1539 case HW_VAR_DM_FUNC_OP:
1541 podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1543 podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1545 case HW_VAR_DM_FUNC_SET:
1546 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1547 pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1548 podmpriv->SupportAbility = pdmpriv->InitODMFlag;
1550 podmpriv->SupportAbility |= *((u32 *)val);
1553 case HW_VAR_DM_FUNC_CLR:
1554 podmpriv->SupportAbility &= *((u32 *)val);
1556 case HW_VAR_CAM_EMPTY_ENTRY:
1558 u8 ucIndex = *((u8 *)val);
1562 u32 ulEncAlgo = CAM_AES;
1564 for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1565 /* filled id in CAM config 2 byte */
1567 ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1570 /* polling bit, and No Write enable, and address */
1571 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1572 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1573 /* write content 0 is equall to mark invalid */
1574 usb_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */
1575 usb_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */
1579 case HW_VAR_CAM_INVALID_ALL:
1580 usb_write32(Adapter, RWCAM, BIT(31)|BIT(30));
1582 case HW_VAR_CAM_WRITE:
1585 u32 *cam_val = (u32 *)val;
1586 usb_write32(Adapter, WCAMI, cam_val[0]);
1588 cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1589 usb_write32(Adapter, RWCAM, cmd);
1592 case HW_VAR_AC_PARAM_VO:
1593 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1595 case HW_VAR_AC_PARAM_VI:
1596 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1598 case HW_VAR_AC_PARAM_BE:
1599 haldata->AcParam_BE = ((u32 *)(val))[0];
1600 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1602 case HW_VAR_AC_PARAM_BK:
1603 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1605 case HW_VAR_ACM_CTRL:
1607 u8 acm_ctrl = *((u8 *)val);
1608 u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1611 AcmCtrl = AcmCtrl | 0x1;
1613 if (acm_ctrl & BIT(3))
1614 AcmCtrl |= AcmHw_VoqEn;
1616 AcmCtrl &= (~AcmHw_VoqEn);
1618 if (acm_ctrl & BIT(2))
1619 AcmCtrl |= AcmHw_ViqEn;
1621 AcmCtrl &= (~AcmHw_ViqEn);
1623 if (acm_ctrl & BIT(1))
1624 AcmCtrl |= AcmHw_BeqEn;
1626 AcmCtrl &= (~AcmHw_BeqEn);
1628 DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1629 usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1632 case HW_VAR_AMPDU_MIN_SPACE:
1637 MinSpacingToSet = *((u8 *)val);
1638 if (MinSpacingToSet <= 7) {
1639 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1654 if (MinSpacingToSet < SecMinSpace)
1655 MinSpacingToSet = SecMinSpace;
1656 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1660 case HW_VAR_AMPDU_FACTOR:
1662 u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1667 pRegToSet = RegToSet_Normal; /* 0xb972a841; */
1668 FactorToSet = *((u8 *)val);
1669 if (FactorToSet <= 3) {
1670 FactorToSet = (1<<(FactorToSet + 2));
1671 if (FactorToSet > 0xf)
1674 for (index = 0; index < 4; index++) {
1675 if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1676 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1678 if ((pRegToSet[index] & 0x0f) > FactorToSet)
1679 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1681 usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1686 case HW_VAR_RXDMA_AGG_PG_TH:
1688 u8 threshold = *((u8 *)val);
1690 threshold = haldata->UsbRxAggPageCount;
1691 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1694 case HW_VAR_SET_RPWM:
1696 case HW_VAR_H2C_FW_PWRMODE:
1698 u8 psmode = (*(u8 *)val);
1700 /* Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1701 /* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1702 if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(haldata->VersionID)))
1703 ODM_RF_Saving(podmpriv, true);
1704 rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1707 case HW_VAR_H2C_FW_JOINBSSRPT:
1709 u8 mstatus = (*(u8 *)val);
1710 rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1713 case HW_VAR_INITIAL_GAIN:
1715 struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1716 u32 rx_gain = ((u32 *)(val))[0];
1718 if (rx_gain == 0xff) {/* restore rx gain */
1719 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1721 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1722 ODM_Write_DIG(podmpriv, rx_gain);
1726 case HW_VAR_TRIGGER_GPIO_0:
1727 rtl8192cu_trigger_gpio_0(Adapter);
1729 case HW_VAR_RPT_TIMER_SETTING:
1731 u16 min_rpt_time = (*(u16 *)val);
1732 ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1735 case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1737 u8 Optimum_antenna = (*(u8 *)val);
1739 /* switch antenna to Optimum_antenna */
1740 if (haldata->CurAntenna != Optimum_antenna) {
1741 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1742 ODM_UpdateRxIdleAnt_88E(&haldata->odmpriv, Ant);
1744 haldata->CurAntenna = Optimum_antenna;
1748 case HW_VAR_EFUSE_BYTES: /* To set EFUE total used bytes, added by Roger, 2008.12.22. */
1749 haldata->EfuseUsedBytes = *((u16 *)val);
1751 case HW_VAR_FIFO_CLEARN_UP:
1753 struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1757 usb_write8(Adapter, REG_TXPAUSE, 0xff);
1760 Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1762 if (!pwrpriv->bkeepfwalive) {
1764 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1766 if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1770 DBG_88E("Stop RX DMA failed......\n");
1773 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1774 usb_write32(Adapter, REG_RQPN, 0x80000000);
1779 case HW_VAR_CHECK_TXBUF:
1781 case HW_VAR_APFM_ON_MAC:
1782 haldata->bMacPwrCtrlOn = *val;
1783 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1785 case HW_VAR_TX_RPT_MAX_MACID:
1788 DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1789 usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1792 case HW_VAR_H2C_MEDIA_STATUS_RPT:
1793 rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(__le16 *)val));
1795 case HW_VAR_BCN_VALID:
1796 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1797 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT0);
1804 static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1806 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1807 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1810 case HW_VAR_BASIC_RATE:
1811 *((u16 *)(val)) = haldata->BasicRateSet;
1812 case HW_VAR_TXPAUSE:
1813 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1815 case HW_VAR_BCN_VALID:
1816 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1817 val[0] = (BIT0 & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1819 case HW_VAR_DM_FLAG:
1820 val[0] = podmpriv->SupportAbility;
1822 case HW_VAR_RF_TYPE:
1823 val[0] = haldata->rf_type;
1825 case HW_VAR_FWLPS_RF_ON:
1827 /* When we halt NIC, we should check if FW LPS is leave. */
1828 if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1829 /* If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1830 /* because Fw is unload. */
1834 valRCR = usb_read32(Adapter, REG_RCR);
1835 valRCR &= 0x00070000;
1843 case HW_VAR_CURRENT_ANTENNA:
1844 val[0] = haldata->CurAntenna;
1846 case HW_VAR_EFUSE_BYTES: /* To get EFUE total used bytes, added by Roger, 2008.12.22. */
1847 *((u16 *)(val)) = haldata->EfuseUsedBytes;
1849 case HW_VAR_APFM_ON_MAC:
1850 *val = haldata->bMacPwrCtrlOn;
1852 case HW_VAR_CHK_HI_QUEUE_EMPTY:
1853 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1863 /* Query setting of specified variable. */
1866 GetHalDefVar8188EUsb(
1867 struct adapter *Adapter,
1868 enum hal_def_variable eVariable,
1872 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1873 u8 bResult = _SUCCESS;
1875 switch (eVariable) {
1876 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1878 struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1879 struct sta_priv *pstapriv = &Adapter->stapriv;
1880 struct sta_info *psta;
1881 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1883 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1886 case HAL_DEF_IS_SUPPORT_ANT_DIV:
1887 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1889 case HAL_DEF_CURRENT_ANTENNA:
1890 *((u8 *)pValue) = haldata->CurAntenna;
1892 case HAL_DEF_DRVINFO_SZ:
1893 *((u32 *)pValue) = DRVINFO_SZ;
1895 case HAL_DEF_MAX_RECVBUF_SZ:
1896 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1898 case HAL_DEF_RX_PACKET_OFFSET:
1899 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1901 case HAL_DEF_DBG_DM_FUNC:
1902 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1904 case HAL_DEF_RA_DECISION_RATE:
1906 u8 MacID = *((u8 *)pValue);
1907 *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&(haldata->odmpriv), MacID);
1910 case HAL_DEF_RA_SGI:
1912 u8 MacID = *((u8 *)pValue);
1913 *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&(haldata->odmpriv), MacID);
1916 case HAL_DEF_PT_PWR_STATUS:
1918 u8 MacID = *((u8 *)pValue);
1919 *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(haldata->odmpriv), MacID);
1922 case HW_VAR_MAX_RX_AMPDU_FACTOR:
1923 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1925 case HW_DEF_RA_INFO_DUMP:
1927 u8 entry_id = *((u8 *)pValue);
1928 if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1929 DBG_88E("============ RA status check ===================\n");
1930 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1932 haldata->odmpriv.RAInfo[entry_id].RateID,
1933 haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1934 haldata->odmpriv.RAInfo[entry_id].RateSGI,
1935 haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1936 haldata->odmpriv.RAInfo[entry_id].PTStage);
1940 case HW_DEF_ODM_DBG_FLAG:
1942 struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
1943 pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1946 case HAL_DEF_DBG_DUMP_RXPKT:
1947 *((u8 *)pValue) = haldata->bDumpRxPkt;
1949 case HAL_DEF_DBG_DUMP_TXPKT:
1950 *((u8 *)pValue) = haldata->bDumpTxPkt;
1962 /* Change default setting of specified variable. */
1964 static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
1966 struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
1967 u8 bResult = _SUCCESS;
1969 switch (eVariable) {
1970 case HAL_DEF_DBG_DM_FUNC:
1972 u8 dm_func = *((u8 *)pValue);
1973 struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1975 if (dm_func == 0) { /* disable all dynamic func */
1976 podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE;
1977 DBG_88E("==> Disable all dynamic function...\n");
1978 } else if (dm_func == 1) {/* disable DIG */
1979 podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG);
1980 DBG_88E("==> Disable DIG...\n");
1981 } else if (dm_func == 2) {/* disable High power */
1982 podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
1983 } else if (dm_func == 3) {/* disable tx power tracking */
1984 podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION);
1985 DBG_88E("==> Disable tx power tracking...\n");
1986 } else if (dm_func == 5) {/* disable antenna diversity */
1987 podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV);
1988 } else if (dm_func == 6) {/* turn on all dynamic func */
1989 if (!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) {
1990 struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1991 pDigTable->CurIGValue = usb_read8(Adapter, 0xc50);
1993 podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
1994 DBG_88E("==> Turn on all dynamic function...\n");
1998 case HAL_DEF_DBG_DUMP_RXPKT:
1999 haldata->bDumpRxPkt = *((u8 *)pValue);
2001 case HAL_DEF_DBG_DUMP_TXPKT:
2002 haldata->bDumpTxPkt = *((u8 *)pValue);
2004 case HW_DEF_FA_CNT_DUMP:
2006 u8 bRSSIDump = *((u8 *)pValue);
2007 struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
2009 dm_ocm->DebugComponents = ODM_COMP_DIG|ODM_COMP_FA_CNT ;
2011 dm_ocm->DebugComponents = 0;
2014 case HW_DEF_ODM_DBG_FLAG:
2016 u64 DebugComponents = *((u64 *)pValue);
2017 struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
2018 dm_ocm->DebugComponents = DebugComponents;
2029 static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
2032 u8 networkType, raid;
2033 u32 mask, rate_bitmap;
2034 u8 shortGIrate = false;
2035 int supportRateNum = 0;
2036 struct sta_info *psta;
2037 struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
2038 struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
2039 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2040 struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network);
2042 if (mac_id >= NUM_STA) /* CAM_SIZE */
2044 psta = pmlmeinfo->FW_sta_info[mac_id].psta;
2048 case 0:/* for infra mode */
2049 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
2050 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
2051 raid = networktype_to_raid(networkType);
2052 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2053 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)) : 0;
2054 if (support_short_GI(adapt, &(pmlmeinfo->HT_caps)))
2057 case 1:/* for broadcast/multicast */
2058 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2059 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
2060 networkType = WIRELESS_11B;
2062 networkType = WIRELESS_11G;
2063 raid = networktype_to_raid(networkType);
2064 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
2066 default: /* for each sta in IBSS */
2067 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2068 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
2069 raid = networktype_to_raid(networkType);
2070 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2072 /* todo: support HT in IBSS */
2076 rate_bitmap = 0x0fffffff;
2077 rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
2078 DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2079 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
2081 mask &= rate_bitmap;
2083 init_rate = get_highest_rate_idx(mask)&0x3f;
2085 if (haldata->fw_ractrl) {
2088 arg = mac_id & 0x1f;/* MACID */
2092 mask |= ((raid << 28) & 0xf0000000);
2093 DBG_88E("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
2094 psta->ra_mask = mask;
2095 mask |= ((raid << 28) & 0xf0000000);
2097 /* to do ,for 8188E-SMIC */
2098 rtl8188e_set_raid_cmd(adapt, mask);
2100 ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv),
2109 psta->init_rate = init_rate;
2112 static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
2115 struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
2116 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2117 u32 bcn_ctrl_reg = REG_BCN_CTRL;
2118 /* reset TSF, enable update TSF, correcting TSF On Beacon */
2121 usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
2122 usb_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */
2124 _InitBeaconParameters(adapt);
2126 usb_write8(adapt, REG_SLOT, 0x09);
2128 value32 = usb_read32(adapt, REG_TCR);
2130 usb_write32(adapt, REG_TCR, value32);
2133 usb_write32(adapt, REG_TCR, value32);
2135 /* NOTE: Fix test chip's bug (about contention windows's randomness) */
2136 usb_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50);
2137 usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
2139 _BeaconFunctionEnable(adapt, true, true);
2141 ResumeTxBeacon(adapt);
2143 usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg)|BIT(1));
2146 static void rtl8188eu_init_default_value(struct adapter *adapt)
2148 struct hal_data_8188e *haldata;
2149 struct pwrctrl_priv *pwrctrlpriv;
2152 haldata = GET_HAL_DATA(adapt);
2153 pwrctrlpriv = &adapt->pwrctrlpriv;
2155 /* init default value */
2156 haldata->fw_ractrl = false;
2157 if (!pwrctrlpriv->bkeepfwalive)
2158 haldata->LastHMEBoxNum = 0;
2160 /* init dm default value */
2161 haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2162 haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
2163 haldata->pwrGroupCnt = 0;
2164 haldata->PGMaxGroup = 13;
2165 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2166 for (i = 0; i < HP_THERMAL_NUM; i++)
2167 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2170 void rtl8188eu_set_hal_ops(struct adapter *adapt)
2172 struct hal_ops *halfunc = &adapt->HalFunc;
2175 adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
2176 if (adapt->HalData == NULL)
2177 DBG_88E("cant not alloc memory for HAL DATA\n");
2179 halfunc->hal_power_on = rtl8188eu_InitPowerOn;
2180 halfunc->hal_init = &rtl8188eu_hal_init;
2181 halfunc->hal_deinit = &rtl8188eu_hal_deinit;
2183 halfunc->inirp_init = &rtl8188eu_inirp_init;
2184 halfunc->inirp_deinit = &rtl8188eu_inirp_deinit;
2186 halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
2188 halfunc->init_recv_priv = &rtl8188eu_init_recv_priv;
2189 halfunc->free_recv_priv = &rtl8188eu_free_recv_priv;
2190 halfunc->InitSwLeds = &rtl8188eu_InitSwLeds;
2191 halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
2193 halfunc->init_default_value = &rtl8188eu_init_default_value;
2194 halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
2195 halfunc->read_adapter_info = &_ReadAdapterInfo8188EU;
2197 halfunc->SetHwRegHandler = &SetHwReg8188EU;
2198 halfunc->GetHwRegHandler = &GetHwReg8188EU;
2199 halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb;
2200 halfunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb;
2202 halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb;
2203 halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb;
2205 halfunc->hal_xmit = &rtl8188eu_hal_xmit;
2206 halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
2208 rtl8188e_set_hal_ops(halfunc);