drivers/usb/host/ohci-hcd.c

   1 /*
   2  * Open Host Controller Interface (OHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   7  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   8  *
   9  * [ Initialisation is based on Linus'  ]
  10  * [ uhci code and gregs ohci fragments ]
  11  * [ (C) Copyright 1999 Linus Torvalds  ]
  12  * [ (C) Copyright 1999 Gregory P. Smith]
  13  *
  14  *
  15  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  16  * interfaces (though some non-x86 Intel chips use it).  It supports
  17  * smarter hardware than UHCI.  A download link for the spec available
  18  * through the http://www.usb.org website.
  19  *
  20  * This file is licenced under the GPL.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/pci.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/dmapool.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/debugfs.h>
  42
  43 #include <asm/io.h>
  44 #include <asm/irq.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/byteorder.h>
  47
  48
  49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  55
  56 /* For initializing controller (mask in an HCFS mode too) */
  57 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  58 #define OHCI_INTR_INIT \
  59                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  60                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  61
  62 #ifdef __hppa__
  63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  64 #define IR_DISABLE
  65 #endif
  66
  67 #ifdef CONFIG_ARCH_OMAP
  68 /* OMAP doesn't support IR (no SMM; not needed) */
  69 #define IR_DISABLE
  70 #endif
  71
  72 /*-------------------------------------------------------------------------*/
  73
  74 static const char       hcd_name [] = "ohci_hcd";
  75
  76 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  77
  78 #include "ohci.h"
  79 #include "pci-quirks.h"
  80
  81 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  82 static int ohci_init (struct ohci_hcd *ohci);
  83 static void ohci_stop (struct usb_hcd *hcd);
  84
  85 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
  86 static int ohci_restart (struct ohci_hcd *ohci);
  87 #endif
  88
  89 #ifdef CONFIG_PCI
  90 static void sb800_prefetch(struct ohci_hcd *ohci, int on);
  91 #else
  92 static inline void sb800_prefetch(struct ohci_hcd *ohci, int on)
  93 {
  94         return;
  95 }
  96 #endif
  97
  98
  99 #include "ohci-hub.c"
 100 #include "ohci-dbg.c"
 101 #include "ohci-mem.c"
 102 #include "ohci-q.c"
 103
 104
 105 /*
 106  * On architectures with edge-triggered interrupts we must never return
 107  * IRQ_NONE.
 108  */
 109 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
 110 #define IRQ_NOTMINE     IRQ_HANDLED
 111 #else
 112 #define IRQ_NOTMINE     IRQ_NONE
 113 #endif
 114
 115
 116 /* Some boards misreport power switching/overcurrent */
 117 static bool distrust_firmware = 1;
 118 module_param (distrust_firmware, bool, 0);
 119 MODULE_PARM_DESC (distrust_firmware,
 120         "true to distrust firmware power/overcurrent setup");
 121
 122 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 123 static bool no_handshake = 0;
 124 module_param (no_handshake, bool, 0);
 125 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 126
 127 /*-------------------------------------------------------------------------*/
 128
 129 /*
 130  * queue up an urb for anything except the root hub
 131  */
 132 static int ohci_urb_enqueue (
 133         struct usb_hcd  *hcd,
 134         struct urb      *urb,
 135         gfp_t           mem_flags
 136 ) {
 137         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 138         struct ed       *ed;
 139         urb_priv_t      *urb_priv;
 140         unsigned int    pipe = urb->pipe;
 141         int             i, size = 0;
 142         unsigned long   flags;
 143         int             retval = 0;
 144
 145 #ifdef OHCI_VERBOSE_DEBUG
 146         urb_print(urb, "SUB", usb_pipein(pipe), -EINPROGRESS);
 147 #endif
 148
 149         /* every endpoint has a ed, locate and maybe (re)initialize it */
 150         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
 151                 return -ENOMEM;
 152
 153         /* for the private part of the URB we need the number of TDs (size) */
 154         switch (ed->type) {
 155                 case PIPE_CONTROL:
 156                         /* td_submit_urb() doesn't yet handle these */
 157                         if (urb->transfer_buffer_length > 4096)
 158                                 return -EMSGSIZE;
 159
 160                         /* 1 TD for setup, 1 for ACK, plus ... */
 161                         size = 2;
 162                         /* FALLTHROUGH */
 163                 // case PIPE_INTERRUPT:
 164                 // case PIPE_BULK:
 165                 default:
 166                         /* one TD for every 4096 Bytes (can be up to 8K) */
 167                         size += urb->transfer_buffer_length / 4096;
 168                         /* ... and for any remaining bytes ... */
 169                         if ((urb->transfer_buffer_length % 4096) != 0)
 170                                 size++;
 171                         /* ... and maybe a zero length packet to wrap it up */
 172                         if (size == 0)
 173                                 size++;
 174                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 175                                 && (urb->transfer_buffer_length
 176                                         % usb_maxpacket (urb->dev, pipe,
 177                                                 usb_pipeout (pipe))) == 0)
 178                                 size++;
 179                         break;
 180                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 181                         size = urb->number_of_packets;
 182                         break;
 183         }
 184
 185         /* allocate the private part of the URB */
 186         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 187                         mem_flags);
 188         if (!urb_priv)
 189                 return -ENOMEM;
 190         INIT_LIST_HEAD (&urb_priv->pending);
 191         urb_priv->length = size;
 192         urb_priv->ed = ed;
 193
 194         /* allocate the TDs (deferring hash chain updates) */
 195         for (i = 0; i < size; i++) {
 196                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 197                 if (!urb_priv->td [i]) {
 198                         urb_priv->length = i;
 199                         urb_free_priv (ohci, urb_priv);
 200                         return -ENOMEM;
 201                 }
 202         }
 203
 204         spin_lock_irqsave (&ohci->lock, flags);
 205
 206         /* don't submit to a dead HC */
 207         if (!HCD_HW_ACCESSIBLE(hcd)) {
 208                 retval = -ENODEV;
 209                 goto fail;
 210         }
 211         if (ohci->rh_state != OHCI_RH_RUNNING) {
 212                 retval = -ENODEV;
 213                 goto fail;
 214         }
 215         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 216         if (retval)
 217                 goto fail;
 218
 219         /* schedule the ed if needed */
 220         if (ed->state == ED_IDLE) {
 221                 retval = ed_schedule (ohci, ed);
 222                 if (retval < 0) {
 223                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 224                         goto fail;
 225                 }
 226                 if (ed->type == PIPE_ISOCHRONOUS) {
 227                         u16     frame = ohci_frame_no(ohci);
 228
 229                         /* delay a few frames before the first TD */
 230                         frame += max_t (u16, 8, ed->interval);
 231                         frame &= ~(ed->interval - 1);
 232                         frame |= ed->branch;
 233                         urb->start_frame = frame;
 234                 }
 235         } else if (ed->type == PIPE_ISOCHRONOUS) {
 236                 u16     next = ohci_frame_no(ohci) + 2;
 237                 u16     frame = ed->last_iso + ed->interval;
 238
 239                 /* Behind the scheduling threshold? */
 240                 if (unlikely(tick_before(frame, next))) {
 241
 242                         /* USB_ISO_ASAP: Round up to the first available slot */
 243                         if (urb->transfer_flags & URB_ISO_ASAP)
 244                                 frame += (next - frame + ed->interval - 1) &
 245                                                 -ed->interval;
 246
 247                         /*
 248                          * Not ASAP: Use the next slot in the stream.  If
 249                          * the entire URB falls before the threshold, fail.
 250                          */
 251                         else if (tick_before(frame + ed->interval *
 252                                         (urb->number_of_packets - 1), next)) {
 253                                 retval = -EXDEV;
 254                                 usb_hcd_unlink_urb_from_ep(hcd, urb);
 255                                 goto fail;
 256                         }
 257
 258                         /*
 259                          * Some OHCI hardware doesn't handle late TDs
 260                          * correctly.  After retiring them it proceeds to
 261                          * the next ED instead of the next TD.  Therefore
 262                          * we have to omit the late TDs entirely.
 263                          */
 264                         urb_priv->td_cnt = DIV_ROUND_UP(next - frame,
 265                                         ed->interval);
 266                 }
 267                 urb->start_frame = frame;
 268         }
 269
 270         /* fill the TDs and link them to the ed; and
 271          * enable that part of the schedule, if needed
 272          * and update count of queued periodic urbs
 273          */
 274         urb->hcpriv = urb_priv;
 275         td_submit_urb (ohci, urb);
 276
 277 fail:
 278         if (retval)
 279                 urb_free_priv (ohci, urb_priv);
 280         spin_unlock_irqrestore (&ohci->lock, flags);
 281         return retval;
 282 }
 283
 284 /*
 285  * decouple the URB from the HC queues (TDs, urb_priv).
 286  * reporting is always done
 287  * asynchronously, and we might be dealing with an urb that's
 288  * partially transferred, or an ED with other urbs being unlinked.
 289  */
 290 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 291 {
 292         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 293         unsigned long           flags;
 294         int                     rc;
 295
 296 #ifdef OHCI_VERBOSE_DEBUG
 297         urb_print(urb, "UNLINK", 1, status);
 298 #endif
 299
 300         spin_lock_irqsave (&ohci->lock, flags);
 301         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 302         if (rc) {
 303                 ;       /* Do nothing */
 304         } else if (ohci->rh_state == OHCI_RH_RUNNING) {
 305                 urb_priv_t  *urb_priv;
 306
 307                 /* Unless an IRQ completed the unlink while it was being
 308                  * handed to us, flag it for unlink and giveback, and force
 309                  * some upcoming INTR_SF to call finish_unlinks()
 310                  */
 311                 urb_priv = urb->hcpriv;
 312                 if (urb_priv) {
 313                         if (urb_priv->ed->state == ED_OPER)
 314                                 start_ed_unlink (ohci, urb_priv->ed);
 315                 }
 316         } else {
 317                 /*
 318                  * with HC dead, we won't respect hc queue pointers
 319                  * any more ... just clean up every urb's memory.
 320                  */
 321                 if (urb->hcpriv)
 322                         finish_urb(ohci, urb, status);
 323         }
 324         spin_unlock_irqrestore (&ohci->lock, flags);
 325         return rc;
 326 }
 327
 328 /*-------------------------------------------------------------------------*/
 329
 330 /* frees config/altsetting state for endpoints,
 331  * including ED memory, dummy TD, and bulk/intr data toggle
 332  */
 333
 334 static void
 335 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 336 {
 337         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 338         unsigned long           flags;
 339         struct ed               *ed = ep->hcpriv;
 340         unsigned                limit = 1000;
 341
 342         /* ASSERT:  any requests/urbs are being unlinked */
 343         /* ASSERT:  nobody can be submitting urbs for this any more */
 344
 345         if (!ed)
 346                 return;
 347
 348 rescan:
 349         spin_lock_irqsave (&ohci->lock, flags);
 350
 351         if (ohci->rh_state != OHCI_RH_RUNNING) {
 352 sanitize:
 353                 ed->state = ED_IDLE;
 354                 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
 355                         ohci->eds_scheduled--;
 356                 finish_unlinks (ohci, 0);
 357         }
 358
 359         switch (ed->state) {
 360         case ED_UNLINK:         /* wait for hw to finish? */
 361                 /* major IRQ delivery trouble loses INTR_SF too... */
 362                 if (limit-- == 0) {
 363                         ohci_warn(ohci, "ED unlink timeout\n");
 364                         if (quirk_zfmicro(ohci)) {
 365                                 ohci_warn(ohci, "Attempting ZF TD recovery\n");
 366                                 ohci->ed_to_check = ed;
 367                                 ohci->zf_delay = 2;
 368                         }
 369                         goto sanitize;
 370                 }
 371                 spin_unlock_irqrestore (&ohci->lock, flags);
 372                 schedule_timeout_uninterruptible(1);
 373                 goto rescan;
 374         case ED_IDLE:           /* fully unlinked */
 375                 if (list_empty (&ed->td_list)) {
 376                         td_free (ohci, ed->dummy);
 377                         ed_free (ohci, ed);
 378                         break;
 379                 }
 380                 /* else FALL THROUGH */
 381         default:
 382                 /* caller was supposed to have unlinked any requests;
 383                  * that's not our job.  can't recover; must leak ed.
 384                  */
 385                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 386                         ed, ep->desc.bEndpointAddress, ed->state,
 387                         list_empty (&ed->td_list) ? "" : " (has tds)");
 388                 td_free (ohci, ed->dummy);
 389                 break;
 390         }
 391         ep->hcpriv = NULL;
 392         spin_unlock_irqrestore (&ohci->lock, flags);
 393 }
 394
 395 static int ohci_get_frame (struct usb_hcd *hcd)
 396 {
 397         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 398
 399         return ohci_frame_no(ohci);
 400 }
 401
 402 static void ohci_usb_reset (struct ohci_hcd *ohci)
 403 {
 404         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 405         ohci->hc_control &= OHCI_CTRL_RWC;
 406         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 407         ohci->rh_state = OHCI_RH_HALTED;
 408 }
 409
 410 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 411  * other cases where the next software may expect clean state from the
 412  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 413  */
 414 static void
 415 ohci_shutdown (struct usb_hcd *hcd)
 416 {
 417         struct ohci_hcd *ohci;
 418
 419         ohci = hcd_to_ohci (hcd);
 420         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 421
 422         /* Software reset, after which the controller goes into SUSPEND */
 423         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 424         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 425         udelay(10);
 426
 427         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 428 }
 429
 430 static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
 431 {
 432         return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
 433                 && (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
 434                         == (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
 435                 && !list_empty(&ed->td_list);
 436 }
 437
 438 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
 439  * an interrupt TD but neglects to add it to the donelist.  On systems with
 440  * this chipset, we need to periodically check the state of the queues to look
 441  * for such "lost" TDs.
 442  */
 443 static void unlink_watchdog_func(unsigned long _ohci)
 444 {
 445         unsigned long   flags;
 446         unsigned        max;
 447         unsigned        seen_count = 0;
 448         unsigned        i;
 449         struct ed       **seen = NULL;
 450         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
 451
 452         spin_lock_irqsave(&ohci->lock, flags);
 453         max = ohci->eds_scheduled;
 454         if (!max)
 455                 goto done;
 456
 457         if (ohci->ed_to_check)
 458                 goto out;
 459
 460         seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
 461         if (!seen)
 462                 goto out;
 463
 464         for (i = 0; i < NUM_INTS; i++) {
 465                 struct ed       *ed = ohci->periodic[i];
 466
 467                 while (ed) {
 468                         unsigned        temp;
 469
 470                         /* scan this branch of the periodic schedule tree */
 471                         for (temp = 0; temp < seen_count; temp++) {
 472                                 if (seen[temp] == ed) {
 473                                         /* we've checked it and what's after */
 474                                         ed = NULL;
 475                                         break;
 476                                 }
 477                         }
 478                         if (!ed)
 479                                 break;
 480                         seen[seen_count++] = ed;
 481                         if (!check_ed(ohci, ed)) {
 482                                 ed = ed->ed_next;
 483                                 continue;
 484                         }
 485
 486                         /* HC's TD list is empty, but HCD sees at least one
 487                          * TD that's not been sent through the donelist.
 488                          */
 489                         ohci->ed_to_check = ed;
 490                         ohci->zf_delay = 2;
 491
 492                         /* The HC may wait until the next frame to report the
 493                          * TD as done through the donelist and INTR_WDH.  (We
 494                          * just *assume* it's not a multi-TD interrupt URB;
 495                          * those could defer the IRQ more than one frame, using
 496                          * DI...)  Check again after the next INTR_SF.
 497                          */
 498                         ohci_writel(ohci, OHCI_INTR_SF,
 499                                         &ohci->regs->intrstatus);
 500                         ohci_writel(ohci, OHCI_INTR_SF,
 501                                         &ohci->regs->intrenable);
 502
 503                         /* flush those writes */
 504                         (void) ohci_readl(ohci, &ohci->regs->control);
 505
 506                         goto out;
 507                 }
 508         }
 509 out:
 510         kfree(seen);
 511         if (ohci->eds_scheduled)
 512                 mod_timer(&ohci->unlink_watchdog, round_jiffies(jiffies + HZ));
 513 done:
 514         spin_unlock_irqrestore(&ohci->lock, flags);
 515 }
 516
 517 /*-------------------------------------------------------------------------*
 518  * HC functions
 519  *-------------------------------------------------------------------------*/
 520
 521 /* init memory, and kick BIOS/SMM off */
 522
 523 static int ohci_init (struct ohci_hcd *ohci)
 524 {
 525         int ret;
 526         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 527
 528         if (distrust_firmware)
 529                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 530
 531         ohci->rh_state = OHCI_RH_HALTED;
 532         ohci->regs = hcd->regs;
 533
 534         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 535          * was never needed for most non-PCI systems ... remove the code?
 536          */
 537
 538 #ifndef IR_DISABLE
 539         /* SMM owns the HC?  not for long! */
 540         if (!no_handshake && ohci_readl (ohci,
 541                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 542                 u32 temp;
 543
 544                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 545
 546                 /* this timeout is arbitrary.  we make it long, so systems
 547                  * depending on usb keyboards may be usable even if the
 548                  * BIOS/SMM code seems pretty broken.
 549                  */
 550                 temp = 500;     /* arbitrary: five seconds */
 551
 552                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 553                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 554                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 555                         msleep (10);
 556                         if (--temp == 0) {
 557                                 ohci_err (ohci, "USB HC takeover failed!"
 558                                         "  (BIOS/SMM bug)\n");
 559                                 return -EBUSY;
 560                         }
 561                 }
 562                 ohci_usb_reset (ohci);
 563         }
 564 #endif
 565
 566         /* Disable HC interrupts */
 567         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 568
 569         /* flush the writes, and save key bits like RWC */
 570         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 571                 ohci->hc_control |= OHCI_CTRL_RWC;
 572
 573         /* Read the number of ports unless overridden */
 574         if (ohci->num_ports == 0)
 575                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 576
 577         if (ohci->hcca)
 578                 return 0;
 579
 580         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 581                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 582         if (!ohci->hcca)
 583                 return -ENOMEM;
 584
 585         if ((ret = ohci_mem_init (ohci)) < 0)
 586                 ohci_stop (hcd);
 587         else {
 588                 create_debug_files (ohci);
 589         }
 590
 591         return ret;
 592 }
 593
 594 /*-------------------------------------------------------------------------*/
 595
 596 /* Start an OHCI controller, set the BUS operational
 597  * resets USB and controller
 598  * enable interrupts
 599  */
 600 static int ohci_run (struct ohci_hcd *ohci)
 601 {
 602         u32                     mask, val;
 603         int                     first = ohci->fminterval == 0;
 604         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 605
 606         ohci->rh_state = OHCI_RH_HALTED;
 607
 608         /* boot firmware should have set this up (5.1.1.3.1) */
 609         if (first) {
 610
 611                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 612                 ohci->fminterval = val & 0x3fff;
 613                 if (ohci->fminterval != FI)
 614                         ohci_dbg (ohci, "fminterval delta %d\n",
 615                                 ohci->fminterval - FI);
 616                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 617                 /* also: power/overcurrent flags in roothub.a */
 618         }
 619
 620         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 621          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 622          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 623          * If the bus glue detected wakeup capability then it should
 624          * already be enabled; if so we'll just enable it again.
 625          */
 626         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 627                 device_set_wakeup_capable(hcd->self.controller, 1);
 628
 629         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 630         case OHCI_USB_OPER:
 631                 val = 0;
 632                 break;
 633         case OHCI_USB_SUSPEND:
 634         case OHCI_USB_RESUME:
 635                 ohci->hc_control &= OHCI_CTRL_RWC;
 636                 ohci->hc_control |= OHCI_USB_RESUME;
 637                 val = 10 /* msec wait */;
 638                 break;
 639         // case OHCI_USB_RESET:
 640         default:
 641                 ohci->hc_control &= OHCI_CTRL_RWC;
 642                 ohci->hc_control |= OHCI_USB_RESET;
 643                 val = 50 /* msec wait */;
 644                 break;
 645         }
 646         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 647         // flush the writes
 648         (void) ohci_readl (ohci, &ohci->regs->control);
 649         msleep(val);
 650
 651         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 652
 653         /* 2msec timelimit here means no irqs/preempt */
 654         spin_lock_irq (&ohci->lock);
 655
 656 retry:
 657         /* HC Reset requires max 10 us delay */
 658         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 659         val = 30;       /* ... allow extra time */
 660         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 661                 if (--val == 0) {
 662                         spin_unlock_irq (&ohci->lock);
 663                         ohci_err (ohci, "USB HC reset timed out!\n");
 664                         return -1;
 665                 }
 666                 udelay (1);
 667         }
 668
 669         /* now we're in the SUSPEND state ... must go OPERATIONAL
 670          * within 2msec else HC enters RESUME
 671          *
 672          * ... but some hardware won't init fmInterval "by the book"
 673          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 674          * this if we write fmInterval after we're OPERATIONAL.
 675          * Unclear about ALi, ServerWorks, and others ... this could
 676          * easily be a longstanding bug in chip init on Linux.
 677          */
 678         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 679                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 680                 // flush those writes
 681                 (void) ohci_readl (ohci, &ohci->regs->control);
 682         }
 683
 684         /* Tell the controller where the control and bulk lists are
 685          * The lists are empty now. */
 686         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 687         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 688
 689         /* a reset clears this */
 690         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 691
 692         periodic_reinit (ohci);
 693
 694         /* some OHCI implementations are finicky about how they init.
 695          * bogus values here mean not even enumeration could work.
 696          */
 697         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 698                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 699                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 700                         ohci->flags |= OHCI_QUIRK_INITRESET;
 701                         ohci_dbg (ohci, "enabling initreset quirk\n");
 702                         goto retry;
 703                 }
 704                 spin_unlock_irq (&ohci->lock);
 705                 ohci_err (ohci, "init err (%08x %04x)\n",
 706                         ohci_readl (ohci, &ohci->regs->fminterval),
 707                         ohci_readl (ohci, &ohci->regs->periodicstart));
 708                 return -EOVERFLOW;
 709         }
 710
 711         /* use rhsc irqs after khubd is fully initialized */
 712         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 713         hcd->uses_new_polling = 1;
 714
 715         /* start controller operations */
 716         ohci->hc_control &= OHCI_CTRL_RWC;
 717         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 718         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 719         ohci->rh_state = OHCI_RH_RUNNING;
 720
 721         /* wake on ConnectStatusChange, matching external hubs */
 722         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 723
 724         /* Choose the interrupts we care about now, others later on demand */
 725         mask = OHCI_INTR_INIT;
 726         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 727         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 728
 729         /* handle root hub init quirks ... */
 730         val = roothub_a (ohci);
 731         val &= ~(RH_A_PSM | RH_A_OCPM);
 732         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 733                 /* NSC 87560 and maybe others */
 734                 val |= RH_A_NOCP;
 735                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 736                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 737         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 738                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 739                 /* hub power always on; required for AMD-756 and some
 740                  * Mac platforms.  ganged overcurrent reporting, if any.
 741                  */
 742                 val |= RH_A_NPS;
 743                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 744         }
 745         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 746         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 747                                                 &ohci->regs->roothub.b);
 748         // flush those writes
 749         (void) ohci_readl (ohci, &ohci->regs->control);
 750
 751         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 752         spin_unlock_irq (&ohci->lock);
 753
 754         // POTPGT delay is bits 24-31, in 2 ms units.
 755         mdelay ((val >> 23) & 0x1fe);
 756
 757         if (quirk_zfmicro(ohci)) {
 758                 /* Create timer to watch for bad queue state on ZF Micro */
 759                 setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
 760                                 (unsigned long) ohci);
 761
 762                 ohci->eds_scheduled = 0;
 763                 ohci->ed_to_check = NULL;
 764         }
 765
 766         ohci_dump (ohci, 1);
 767
 768         return 0;
 769 }
 770
 771 /*-------------------------------------------------------------------------*/
 772
 773 /* an interrupt happens */
 774
 775 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 776 {
 777         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 778         struct ohci_regs __iomem *regs = ohci->regs;
 779         int                     ints;
 780
 781         /* Read interrupt status (and flush pending writes).  We ignore the
 782          * optimization of checking the LSB of hcca->done_head; it doesn't
 783          * work on all systems (edge triggering for OHCI can be a factor).
 784          */
 785         ints = ohci_readl(ohci, &regs->intrstatus);
 786
 787         /* Check for an all 1's result which is a typical consequence
 788          * of dead, unclocked, or unplugged (CardBus...) devices
 789          */
 790         if (ints == ~(u32)0) {
 791                 ohci->rh_state = OHCI_RH_HALTED;
 792                 ohci_dbg (ohci, "device removed!\n");
 793                 usb_hc_died(hcd);
 794                 return IRQ_HANDLED;
 795         }
 796
 797         /* We only care about interrupts that are enabled */
 798         ints &= ohci_readl(ohci, &regs->intrenable);
 799
 800         /* interrupt for some other device? */
 801         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 802                 return IRQ_NOTMINE;
 803
 804         if (ints & OHCI_INTR_UE) {
 805                 // e.g. due to PCI Master/Target Abort
 806                 if (quirk_nec(ohci)) {
 807                         /* Workaround for a silicon bug in some NEC chips used
 808                          * in Apple's PowerBooks. Adapted from Darwin code.
 809                          */
 810                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 811
 812                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 813
 814                         schedule_work (&ohci->nec_work);
 815                 } else {
 816                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 817                         ohci->rh_state = OHCI_RH_HALTED;
 818                         usb_hc_died(hcd);
 819                 }
 820
 821                 ohci_dump (ohci, 1);
 822                 ohci_usb_reset (ohci);
 823         }
 824
 825         if (ints & OHCI_INTR_RHSC) {
 826                 ohci_vdbg(ohci, "rhsc\n");
 827                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 828                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 829                                 &regs->intrstatus);
 830
 831                 /* NOTE: Vendors didn't always make the same implementation
 832                  * choices for RHSC.  Many followed the spec; RHSC triggers
 833                  * on an edge, like setting and maybe clearing a port status
 834                  * change bit.  With others it's level-triggered, active
 835                  * until khubd clears all the port status change bits.  We'll
 836                  * always disable it here and rely on polling until khubd
 837                  * re-enables it.
 838                  */
 839                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 840                 usb_hcd_poll_rh_status(hcd);
 841         }
 842
 843         /* For connect and disconnect events, we expect the controller
 844          * to turn on RHSC along with RD.  But for remote wakeup events
 845          * this might not happen.
 846          */
 847         else if (ints & OHCI_INTR_RD) {
 848                 ohci_vdbg(ohci, "resume detect\n");
 849                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 850                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 851                 if (ohci->autostop) {
 852                         spin_lock (&ohci->lock);
 853                         ohci_rh_resume (ohci);
 854                         spin_unlock (&ohci->lock);
 855                 } else
 856                         usb_hcd_resume_root_hub(hcd);
 857         }
 858
 859         if (ints & OHCI_INTR_WDH) {
 860                 spin_lock (&ohci->lock);
 861                 dl_done_list (ohci);
 862                 spin_unlock (&ohci->lock);
 863         }
 864
 865         if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
 866                 spin_lock(&ohci->lock);
 867                 if (ohci->ed_to_check) {
 868                         struct ed *ed = ohci->ed_to_check;
 869
 870                         if (check_ed(ohci, ed)) {
 871                                 /* HC thinks the TD list is empty; HCD knows
 872                                  * at least one TD is outstanding
 873                                  */
 874                                 if (--ohci->zf_delay == 0) {
 875                                         struct td *td = list_entry(
 876                                                 ed->td_list.next,
 877                                                 struct td, td_list);
 878                                         ohci_warn(ohci,
 879                                                   "Reclaiming orphan TD %p\n",
 880                                                   td);
 881                                         takeback_td(ohci, td);
 882                                         ohci->ed_to_check = NULL;
 883                                 }
 884                         } else
 885                                 ohci->ed_to_check = NULL;
 886                 }
 887                 spin_unlock(&ohci->lock);
 888         }
 889
 890         /* could track INTR_SO to reduce available PCI/... bandwidth */
 891
 892         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 893          * when there's still unlinking to be done (next frame).
 894          */
 895         spin_lock (&ohci->lock);
 896         if (ohci->ed_rm_list)
 897                 finish_unlinks (ohci, ohci_frame_no(ohci));
 898         if ((ints & OHCI_INTR_SF) != 0
 899                         && !ohci->ed_rm_list
 900                         && !ohci->ed_to_check
 901                         && ohci->rh_state == OHCI_RH_RUNNING)
 902                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 903         spin_unlock (&ohci->lock);
 904
 905         if (ohci->rh_state == OHCI_RH_RUNNING) {
 906                 ohci_writel (ohci, ints, &regs->intrstatus);
 907                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 908                 // flush those writes
 909                 (void) ohci_readl (ohci, &ohci->regs->control);
 910         }
 911
 912         return IRQ_HANDLED;
 913 }
 914
 915 /*-------------------------------------------------------------------------*/
 916
 917 static void ohci_stop (struct usb_hcd *hcd)
 918 {
 919         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 920
 921         ohci_dump (ohci, 1);
 922
 923         if (quirk_nec(ohci))
 924                 flush_work(&ohci->nec_work);
 925
 926         ohci_usb_reset (ohci);
 927         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 928         free_irq(hcd->irq, hcd);
 929         hcd->irq = 0;
 930
 931         if (quirk_zfmicro(ohci))
 932                 del_timer(&ohci->unlink_watchdog);
 933         if (quirk_amdiso(ohci))
 934                 usb_amd_dev_put();
 935
 936         remove_debug_files (ohci);
 937         ohci_mem_cleanup (ohci);
 938         if (ohci->hcca) {
 939                 dma_free_coherent (hcd->self.controller,
 940                                 sizeof *ohci->hcca,
 941                                 ohci->hcca, ohci->hcca_dma);
 942                 ohci->hcca = NULL;
 943                 ohci->hcca_dma = 0;
 944         }
 945 }
 946
 947 /*-------------------------------------------------------------------------*/
 948
 949 #if defined(CONFIG_PM) || defined(CONFIG_PCI)
 950
 951 /* must not be called from interrupt context */
 952 static int ohci_restart (struct ohci_hcd *ohci)
 953 {
 954         int temp;
 955         int i;
 956         struct urb_priv *priv;
 957
 958         spin_lock_irq(&ohci->lock);
 959         ohci->rh_state = OHCI_RH_HALTED;
 960
 961         /* Recycle any "live" eds/tds (and urbs). */
 962         if (!list_empty (&ohci->pending))
 963                 ohci_dbg(ohci, "abort schedule...\n");
 964         list_for_each_entry (priv, &ohci->pending, pending) {
 965                 struct urb      *urb = priv->td[0]->urb;
 966                 struct ed       *ed = priv->ed;
 967
 968                 switch (ed->state) {
 969                 case ED_OPER:
 970                         ed->state = ED_UNLINK;
 971                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 972                         ed_deschedule (ohci, ed);
 973
 974                         ed->ed_next = ohci->ed_rm_list;
 975                         ed->ed_prev = NULL;
 976                         ohci->ed_rm_list = ed;
 977                         /* FALLTHROUGH */
 978                 case ED_UNLINK:
 979                         break;
 980                 default:
 981                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 982                                         ed, ed->state);
 983                 }
 984
 985                 if (!urb->unlinked)
 986                         urb->unlinked = -ESHUTDOWN;
 987         }
 988         finish_unlinks (ohci, 0);
 989         spin_unlock_irq(&ohci->lock);
 990
 991         /* paranoia, in case that didn't work: */
 992
 993         /* empty the interrupt branches */
 994         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 995         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 996
 997         /* no EDs to remove */
 998         ohci->ed_rm_list = NULL;
 999
1000         /* empty control and bulk lists */
1001         ohci->ed_controltail = NULL;
1002         ohci->ed_bulktail    = NULL;
1003
1004         if ((temp = ohci_run (ohci)) < 0) {
1005                 ohci_err (ohci, "can't restart, %d\n", temp);
1006                 return temp;
1007         }
1008         ohci_dbg(ohci, "restart complete\n");
1009         return 0;
1010 }
1011
1012 #endif
1013
1014 #ifdef CONFIG_PM
1015
1016 static int __maybe_unused ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1017 {
1018         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1019         unsigned long   flags;
1020
1021         /* Disable irq emission and mark HW unaccessible. Use
1022          * the spinlock to properly synchronize with possible pending
1023          * RH suspend or resume activity.
1024          */
1025         spin_lock_irqsave (&ohci->lock, flags);
1026         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1027         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1028
1029         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1030         spin_unlock_irqrestore (&ohci->lock, flags);
1031
1032         return 0;
1033 }
1034
1035
1036 static int __maybe_unused ohci_resume(struct usb_hcd *hcd, bool hibernated)
1037 {
1038         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1039         int                     port;
1040         bool                    need_reinit = false;
1041
1042         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1043
1044         /* Make sure resume from hibernation re-enumerates everything */
1045         if (hibernated)
1046                 ohci_usb_reset(ohci);
1047
1048         /* See if the controller is already running or has been reset */
1049         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1050         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1051                 need_reinit = true;
1052         } else {
1053                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1054                 case OHCI_USB_OPER:
1055                 case OHCI_USB_RESET:
1056                         need_reinit = true;
1057                 }
1058         }
1059
1060         /* If needed, reinitialize and suspend the root hub */
1061         if (need_reinit) {
1062                 spin_lock_irq(&ohci->lock);
1063                 ohci_rh_resume(ohci);
1064                 ohci_rh_suspend(ohci, 0);
1065                 spin_unlock_irq(&ohci->lock);
1066         }
1067
1068         /* Normally just turn on port power and enable interrupts */
1069         else {
1070                 ohci_dbg(ohci, "powerup ports\n");
1071                 for (port = 0; port < ohci->num_ports; port++)
1072                         ohci_writel(ohci, RH_PS_PPS,
1073                                         &ohci->regs->roothub.portstatus[port]);
1074
1075                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1076                 ohci_readl(ohci, &ohci->regs->intrenable);
1077                 msleep(20);
1078         }
1079
1080         usb_hcd_resume_root_hub(hcd);
1081
1082         return 0;
1083 }
1084
1085 #endif
1086
1087 /*-------------------------------------------------------------------------*/
1088
1089 MODULE_AUTHOR (DRIVER_AUTHOR);
1090 MODULE_DESCRIPTION(DRIVER_DESC);
1091 MODULE_LICENSE ("GPL");
1092
1093 #ifdef CONFIG_PCI
1094 #include "ohci-pci.c"
1095 #define PCI_DRIVER              ohci_pci_driver
1096 #endif
1097
1098 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1099 #include "ohci-sa1111.c"
1100 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1101 #endif
1102
1103 #if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S3C64XX)
1104 #include "ohci-s3c2410.c"
1105 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
1106 #endif
1107
1108 #ifdef CONFIG_USB_OHCI_EXYNOS
1109 #include "ohci-exynos.c"
1110 #define PLATFORM_DRIVER         exynos_ohci_driver
1111 #endif
1112
1113 #ifdef CONFIG_USB_OHCI_HCD_OMAP1
1114 #include "ohci-omap.c"
1115 #define OMAP1_PLATFORM_DRIVER   ohci_hcd_omap_driver
1116 #endif
1117
1118 #ifdef CONFIG_USB_OHCI_HCD_OMAP3
1119 #include "ohci-omap3.c"
1120 #define OMAP3_PLATFORM_DRIVER   ohci_hcd_omap3_driver
1121 #endif
1122
1123 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
1124 #include "ohci-pxa27x.c"
1125 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
1126 #endif
1127
1128 #ifdef CONFIG_ARCH_EP93XX
1129 #include "ohci-ep93xx.c"
1130 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
1131 #endif
1132
1133 #ifdef CONFIG_MIPS_ALCHEMY
1134 #include "ohci-au1xxx.c"
1135 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
1136 #endif
1137
1138 #ifdef CONFIG_ARCH_AT91
1139 #include "ohci-at91.c"
1140 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
1141 #endif
1142
1143 #ifdef CONFIG_ARCH_LPC32XX
1144 #include "ohci-nxp.c"
1145 #define PLATFORM_DRIVER         usb_hcd_nxp_driver
1146 #endif
1147
1148 #ifdef CONFIG_ARCH_DAVINCI_DA8XX
1149 #include "ohci-da8xx.c"
1150 #define PLATFORM_DRIVER         ohci_hcd_da8xx_driver
1151 #endif
1152
1153 #ifdef CONFIG_USB_OHCI_SH
1154 #include "ohci-sh.c"
1155 #define PLATFORM_DRIVER         ohci_hcd_sh_driver
1156 #endif
1157
1158
1159 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1160 #include "ohci-ppc-of.c"
1161 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1162 #endif
1163
1164 #ifdef CONFIG_PLAT_SPEAR
1165 #include "ohci-spear.c"
1166 #define PLATFORM_DRIVER         spear_ohci_hcd_driver
1167 #endif
1168
1169 #ifdef CONFIG_PPC_PS3
1170 #include "ohci-ps3.c"
1171 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1172 #endif
1173
1174 #ifdef CONFIG_MFD_SM501
1175 #include "ohci-sm501.c"
1176 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1177 #endif
1178
1179 #ifdef CONFIG_MFD_TC6393XB
1180 #include "ohci-tmio.c"
1181 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1182 #endif
1183
1184 #ifdef CONFIG_MACH_JZ4740
1185 #include "ohci-jz4740.c"
1186 #define PLATFORM_DRIVER ohci_hcd_jz4740_driver
1187 #endif
1188
1189 #ifdef CONFIG_USB_OCTEON_OHCI
1190 #include "ohci-octeon.c"
1191 #define PLATFORM_DRIVER         ohci_octeon_driver
1192 #endif
1193
1194 #ifdef CONFIG_TILE_USB
1195 #include "ohci-tilegx.c"
1196 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1197 #endif
1198
1199 #ifdef CONFIG_USB_OHCI_HCD_PLATFORM
1200 #include "ohci-platform.c"
1201 #define PLATFORM_DRIVER         ohci_platform_driver
1202 #endif
1203
1204 #if     !defined(PCI_DRIVER) &&         \
1205         !defined(PLATFORM_DRIVER) &&    \
1206         !defined(OMAP1_PLATFORM_DRIVER) &&      \
1207         !defined(OMAP3_PLATFORM_DRIVER) &&      \
1208         !defined(OF_PLATFORM_DRIVER) && \
1209         !defined(SA1111_DRIVER) &&      \
1210         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1211         !defined(SM501_OHCI_DRIVER) && \
1212         !defined(TMIO_OHCI_DRIVER)
1213 #error "missing bus glue for ohci-hcd"
1214 #endif
1215
1216 static int __init ohci_hcd_mod_init(void)
1217 {
1218         int retval = 0;
1219
1220         if (usb_disabled())
1221                 return -ENODEV;
1222
1223         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1224         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1225                 sizeof (struct ed), sizeof (struct td));
1226         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1227
1228 #ifdef DEBUG
1229         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1230         if (!ohci_debug_root) {
1231                 retval = -ENOENT;
1232                 goto error_debug;
1233         }
1234 #endif
1235
1236 #ifdef PS3_SYSTEM_BUS_DRIVER
1237         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1238         if (retval < 0)
1239                 goto error_ps3;
1240 #endif
1241
1242 #ifdef PLATFORM_DRIVER
1243         retval = platform_driver_register(&PLATFORM_DRIVER);
1244         if (retval < 0)
1245                 goto error_platform;
1246 #endif
1247
1248 #ifdef OMAP1_PLATFORM_DRIVER
1249         retval = platform_driver_register(&OMAP1_PLATFORM_DRIVER);
1250         if (retval < 0)
1251                 goto error_omap1_platform;
1252 #endif
1253
1254 #ifdef OMAP3_PLATFORM_DRIVER
1255         retval = platform_driver_register(&OMAP3_PLATFORM_DRIVER);
1256         if (retval < 0)
1257                 goto error_omap3_platform;
1258 #endif
1259
1260 #ifdef OF_PLATFORM_DRIVER
1261         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1262         if (retval < 0)
1263                 goto error_of_platform;
1264 #endif
1265
1266 #ifdef SA1111_DRIVER
1267         retval = sa1111_driver_register(&SA1111_DRIVER);
1268         if (retval < 0)
1269                 goto error_sa1111;
1270 #endif
1271
1272 #ifdef PCI_DRIVER
1273         retval = pci_register_driver(&PCI_DRIVER);
1274         if (retval < 0)
1275                 goto error_pci;
1276 #endif
1277
1278 #ifdef SM501_OHCI_DRIVER
1279         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1280         if (retval < 0)
1281                 goto error_sm501;
1282 #endif
1283
1284 #ifdef TMIO_OHCI_DRIVER
1285         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1286         if (retval < 0)
1287                 goto error_tmio;
1288 #endif
1289
1290         return retval;
1291
1292         /* Error path */
1293 #ifdef TMIO_OHCI_DRIVER
1294         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1295  error_tmio:
1296 #endif
1297 #ifdef SM501_OHCI_DRIVER
1298         platform_driver_unregister(&SM501_OHCI_DRIVER);
1299  error_sm501:
1300 #endif
1301 #ifdef PCI_DRIVER
1302         pci_unregister_driver(&PCI_DRIVER);
1303  error_pci:
1304 #endif
1305 #ifdef SA1111_DRIVER
1306         sa1111_driver_unregister(&SA1111_DRIVER);
1307  error_sa1111:
1308 #endif
1309 #ifdef OF_PLATFORM_DRIVER
1310         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1311  error_of_platform:
1312 #endif
1313 #ifdef PLATFORM_DRIVER
1314         platform_driver_unregister(&PLATFORM_DRIVER);
1315  error_platform:
1316 #endif
1317 #ifdef OMAP1_PLATFORM_DRIVER
1318         platform_driver_unregister(&OMAP1_PLATFORM_DRIVER);
1319  error_omap1_platform:
1320 #endif
1321 #ifdef OMAP3_PLATFORM_DRIVER
1322         platform_driver_unregister(&OMAP3_PLATFORM_DRIVER);
1323  error_omap3_platform:
1324 #endif
1325 #ifdef PS3_SYSTEM_BUS_DRIVER
1326         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1327  error_ps3:
1328 #endif
1329 #ifdef DEBUG
1330         debugfs_remove(ohci_debug_root);
1331         ohci_debug_root = NULL;
1332  error_debug:
1333 #endif
1334
1335         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1336         return retval;
1337 }
1338 module_init(ohci_hcd_mod_init);
1339
1340 static void __exit ohci_hcd_mod_exit(void)
1341 {
1342 #ifdef TMIO_OHCI_DRIVER
1343         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1344 #endif
1345 #ifdef SM501_OHCI_DRIVER
1346         platform_driver_unregister(&SM501_OHCI_DRIVER);
1347 #endif
1348 #ifdef PCI_DRIVER
1349         pci_unregister_driver(&PCI_DRIVER);
1350 #endif
1351 #ifdef SA1111_DRIVER
1352         sa1111_driver_unregister(&SA1111_DRIVER);
1353 #endif
1354 #ifdef OF_PLATFORM_DRIVER
1355         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1356 #endif
1357 #ifdef PLATFORM_DRIVER
1358         platform_driver_unregister(&PLATFORM_DRIVER);
1359 #endif
1360 #ifdef OMAP3_PLATFORM_DRIVER
1361         platform_driver_unregister(&OMAP3_PLATFORM_DRIVER);
1362 #endif
1363 #ifdef PS3_SYSTEM_BUS_DRIVER
1364         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1365 #endif
1366 #ifdef DEBUG
1367         debugfs_remove(ohci_debug_root);
1368 #endif
1369         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1370 }
1371 module_exit(ohci_hcd_mod_exit);
1372