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1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
31
32 #include "xhci.h"
33 #include "xhci-trace.h"
34
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
37
38 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
39
40 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
41 static int link_quirk;
42 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
43 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
44
45 static unsigned int quirks;
46 module_param(quirks, uint, S_IRUGO);
47 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
48
49 /* TODO: copied from ehci-hcd.c - can this be refactored? */
50 /*
51  * xhci_handshake - spin reading hc until handshake completes or fails
52  * @ptr: address of hc register to be read
53  * @mask: bits to look at in result of read
54  * @done: value of those bits when handshake succeeds
55  * @usec: timeout in microseconds
56  *
57  * Returns negative errno, or zero on success
58  *
59  * Success happens when the "mask" bits have the specified value (hardware
60  * handshake done).  There are two failure modes:  "usec" have passed (major
61  * hardware flakeout), or the register reads as all-ones (hardware removed).
62  */
63 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
64 {
65         u32     result;
66
67         do {
68                 result = readl(ptr);
69                 if (result == ~(u32)0)          /* card removed */
70                         return -ENODEV;
71                 result &= mask;
72                 if (result == done)
73                         return 0;
74                 udelay(1);
75                 usec--;
76         } while (usec > 0);
77         return -ETIMEDOUT;
78 }
79
80 /*
81  * Disable interrupts and begin the xHCI halting process.
82  */
83 void xhci_quiesce(struct xhci_hcd *xhci)
84 {
85         u32 halted;
86         u32 cmd;
87         u32 mask;
88
89         mask = ~(XHCI_IRQS);
90         halted = readl(&xhci->op_regs->status) & STS_HALT;
91         if (!halted)
92                 mask &= ~CMD_RUN;
93
94         cmd = readl(&xhci->op_regs->command);
95         cmd &= mask;
96         writel(cmd, &xhci->op_regs->command);
97 }
98
99 /*
100  * Force HC into halt state.
101  *
102  * Disable any IRQs and clear the run/stop bit.
103  * HC will complete any current and actively pipelined transactions, and
104  * should halt within 16 ms of the run/stop bit being cleared.
105  * Read HC Halted bit in the status register to see when the HC is finished.
106  */
107 int xhci_halt(struct xhci_hcd *xhci)
108 {
109         int ret;
110         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
111         xhci_quiesce(xhci);
112
113         ret = xhci_handshake(&xhci->op_regs->status,
114                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
115         if (!ret) {
116                 xhci->xhc_state |= XHCI_STATE_HALTED;
117                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
118         } else
119                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
120                                 XHCI_MAX_HALT_USEC);
121         return ret;
122 }
123
124 /*
125  * Set the run bit and wait for the host to be running.
126  */
127 static int xhci_start(struct xhci_hcd *xhci)
128 {
129         u32 temp;
130         int ret;
131
132         temp = readl(&xhci->op_regs->command);
133         temp |= (CMD_RUN);
134         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
135                         temp);
136         writel(temp, &xhci->op_regs->command);
137
138         /*
139          * Wait for the HCHalted Status bit to be 0 to indicate the host is
140          * running.
141          */
142         ret = xhci_handshake(&xhci->op_regs->status,
143                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
144         if (ret == -ETIMEDOUT)
145                 xhci_err(xhci, "Host took too long to start, "
146                                 "waited %u microseconds.\n",
147                                 XHCI_MAX_HALT_USEC);
148         if (!ret)
149                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
150         return ret;
151 }
152
153 /*
154  * Reset a halted HC.
155  *
156  * This resets pipelines, timers, counters, state machines, etc.
157  * Transactions will be terminated immediately, and operational registers
158  * will be set to their defaults.
159  */
160 int xhci_reset(struct xhci_hcd *xhci)
161 {
162         u32 command;
163         u32 state;
164         int ret, i;
165
166         state = readl(&xhci->op_regs->status);
167         if ((state & STS_HALT) == 0) {
168                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
169                 return 0;
170         }
171
172         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
173         command = readl(&xhci->op_regs->command);
174         command |= CMD_RESET;
175         writel(command, &xhci->op_regs->command);
176
177         ret = xhci_handshake(&xhci->op_regs->command,
178                         CMD_RESET, 0, 10 * 1000 * 1000);
179         if (ret)
180                 return ret;
181
182         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
183                          "Wait for controller to be ready for doorbell rings");
184         /*
185          * xHCI cannot write to any doorbells or operational registers other
186          * than status until the "Controller Not Ready" flag is cleared.
187          */
188         ret = xhci_handshake(&xhci->op_regs->status,
189                         STS_CNR, 0, 10 * 1000 * 1000);
190
191         for (i = 0; i < 2; ++i) {
192                 xhci->bus_state[i].port_c_suspend = 0;
193                 xhci->bus_state[i].suspended_ports = 0;
194                 xhci->bus_state[i].resuming_ports = 0;
195         }
196
197         return ret;
198 }
199
200 #ifdef CONFIG_PCI
201 static int xhci_free_msi(struct xhci_hcd *xhci)
202 {
203         int i;
204
205         if (!xhci->msix_entries)
206                 return -EINVAL;
207
208         for (i = 0; i < xhci->msix_count; i++)
209                 if (xhci->msix_entries[i].vector)
210                         free_irq(xhci->msix_entries[i].vector,
211                                         xhci_to_hcd(xhci));
212         return 0;
213 }
214
215 /*
216  * Set up MSI
217  */
218 static int xhci_setup_msi(struct xhci_hcd *xhci)
219 {
220         int ret;
221         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
222
223         ret = pci_enable_msi(pdev);
224         if (ret) {
225                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
226                                 "failed to allocate MSI entry");
227                 return ret;
228         }
229
230         ret = request_irq(pdev->irq, xhci_msi_irq,
231                                 0, "xhci_hcd", xhci_to_hcd(xhci));
232         if (ret) {
233                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
234                                 "disable MSI interrupt");
235                 pci_disable_msi(pdev);
236         }
237
238         return ret;
239 }
240
241 /*
242  * Free IRQs
243  * free all IRQs request
244  */
245 static void xhci_free_irq(struct xhci_hcd *xhci)
246 {
247         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
248         int ret;
249
250         /* return if using legacy interrupt */
251         if (xhci_to_hcd(xhci)->irq > 0)
252                 return;
253
254         ret = xhci_free_msi(xhci);
255         if (!ret)
256                 return;
257         if (pdev->irq > 0)
258                 free_irq(pdev->irq, xhci_to_hcd(xhci));
259
260         return;
261 }
262
263 /*
264  * Set up MSI-X
265  */
266 static int xhci_setup_msix(struct xhci_hcd *xhci)
267 {
268         int i, ret = 0;
269         struct usb_hcd *hcd = xhci_to_hcd(xhci);
270         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
271
272         /*
273          * calculate number of msi-x vectors supported.
274          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
275          *   with max number of interrupters based on the xhci HCSPARAMS1.
276          * - num_online_cpus: maximum msi-x vectors per CPUs core.
277          *   Add additional 1 vector to ensure always available interrupt.
278          */
279         xhci->msix_count = min(num_online_cpus() + 1,
280                                 HCS_MAX_INTRS(xhci->hcs_params1));
281
282         xhci->msix_entries =
283                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
284                                 GFP_KERNEL);
285         if (!xhci->msix_entries) {
286                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
287                 return -ENOMEM;
288         }
289
290         for (i = 0; i < xhci->msix_count; i++) {
291                 xhci->msix_entries[i].entry = i;
292                 xhci->msix_entries[i].vector = 0;
293         }
294
295         ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
296         if (ret) {
297                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
298                                 "Failed to enable MSI-X");
299                 goto free_entries;
300         }
301
302         for (i = 0; i < xhci->msix_count; i++) {
303                 ret = request_irq(xhci->msix_entries[i].vector,
304                                 xhci_msi_irq,
305                                 0, "xhci_hcd", xhci_to_hcd(xhci));
306                 if (ret)
307                         goto disable_msix;
308         }
309
310         hcd->msix_enabled = 1;
311         return ret;
312
313 disable_msix:
314         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
315         xhci_free_irq(xhci);
316         pci_disable_msix(pdev);
317 free_entries:
318         kfree(xhci->msix_entries);
319         xhci->msix_entries = NULL;
320         return ret;
321 }
322
323 /* Free any IRQs and disable MSI-X */
324 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
325 {
326         struct usb_hcd *hcd = xhci_to_hcd(xhci);
327         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
328
329         if (xhci->quirks & XHCI_PLAT)
330                 return;
331
332         xhci_free_irq(xhci);
333
334         if (xhci->msix_entries) {
335                 pci_disable_msix(pdev);
336                 kfree(xhci->msix_entries);
337                 xhci->msix_entries = NULL;
338         } else {
339                 pci_disable_msi(pdev);
340         }
341
342         hcd->msix_enabled = 0;
343         return;
344 }
345
346 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
347 {
348         int i;
349
350         if (xhci->msix_entries) {
351                 for (i = 0; i < xhci->msix_count; i++)
352                         synchronize_irq(xhci->msix_entries[i].vector);
353         }
354 }
355
356 static int xhci_try_enable_msi(struct usb_hcd *hcd)
357 {
358         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
359         struct pci_dev  *pdev;
360         int ret;
361
362         /* The xhci platform device has set up IRQs through usb_add_hcd. */
363         if (xhci->quirks & XHCI_PLAT)
364                 return 0;
365
366         pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
367         /*
368          * Some Fresco Logic host controllers advertise MSI, but fail to
369          * generate interrupts.  Don't even try to enable MSI.
370          */
371         if (xhci->quirks & XHCI_BROKEN_MSI)
372                 goto legacy_irq;
373
374         /* unregister the legacy interrupt */
375         if (hcd->irq)
376                 free_irq(hcd->irq, hcd);
377         hcd->irq = 0;
378
379         ret = xhci_setup_msix(xhci);
380         if (ret)
381                 /* fall back to msi*/
382                 ret = xhci_setup_msi(xhci);
383
384         if (!ret)
385                 /* hcd->irq is 0, we have MSI */
386                 return 0;
387
388         if (!pdev->irq) {
389                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
390                 return -EINVAL;
391         }
392
393  legacy_irq:
394         if (!strlen(hcd->irq_descr))
395                 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
396                          hcd->driver->description, hcd->self.busnum);
397
398         /* fall back to legacy interrupt*/
399         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
400                         hcd->irq_descr, hcd);
401         if (ret) {
402                 xhci_err(xhci, "request interrupt %d failed\n",
403                                 pdev->irq);
404                 return ret;
405         }
406         hcd->irq = pdev->irq;
407         return 0;
408 }
409
410 #else
411
412 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
413 {
414         return 0;
415 }
416
417 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
418 {
419 }
420
421 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
422 {
423 }
424
425 #endif
426
427 static void compliance_mode_recovery(unsigned long arg)
428 {
429         struct xhci_hcd *xhci;
430         struct usb_hcd *hcd;
431         u32 temp;
432         int i;
433
434         xhci = (struct xhci_hcd *)arg;
435
436         for (i = 0; i < xhci->num_usb3_ports; i++) {
437                 temp = readl(xhci->usb3_ports[i]);
438                 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
439                         /*
440                          * Compliance Mode Detected. Letting USB Core
441                          * handle the Warm Reset
442                          */
443                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
444                                         "Compliance mode detected->port %d",
445                                         i + 1);
446                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
447                                         "Attempting compliance mode recovery");
448                         hcd = xhci->shared_hcd;
449
450                         if (hcd->state == HC_STATE_SUSPENDED)
451                                 usb_hcd_resume_root_hub(hcd);
452
453                         usb_hcd_poll_rh_status(hcd);
454                 }
455         }
456
457         if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
458                 mod_timer(&xhci->comp_mode_recovery_timer,
459                         jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
460 }
461
462 /*
463  * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
464  * that causes ports behind that hardware to enter compliance mode sometimes.
465  * The quirk creates a timer that polls every 2 seconds the link state of
466  * each host controller's port and recovers it by issuing a Warm reset
467  * if Compliance mode is detected, otherwise the port will become "dead" (no
468  * device connections or disconnections will be detected anymore). Becasue no
469  * status event is generated when entering compliance mode (per xhci spec),
470  * this quirk is needed on systems that have the failing hardware installed.
471  */
472 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
473 {
474         xhci->port_status_u0 = 0;
475         setup_timer(&xhci->comp_mode_recovery_timer,
476                     compliance_mode_recovery, (unsigned long)xhci);
477         xhci->comp_mode_recovery_timer.expires = jiffies +
478                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
479
480         set_timer_slack(&xhci->comp_mode_recovery_timer,
481                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
482         add_timer(&xhci->comp_mode_recovery_timer);
483         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
484                         "Compliance mode recovery timer initialized");
485 }
486
487 /*
488  * This function identifies the systems that have installed the SN65LVPE502CP
489  * USB3.0 re-driver and that need the Compliance Mode Quirk.
490  * Systems:
491  * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
492  */
493 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
494 {
495         const char *dmi_product_name, *dmi_sys_vendor;
496
497         dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
498         dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
499         if (!dmi_product_name || !dmi_sys_vendor)
500                 return false;
501
502         if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
503                 return false;
504
505         if (strstr(dmi_product_name, "Z420") ||
506                         strstr(dmi_product_name, "Z620") ||
507                         strstr(dmi_product_name, "Z820") ||
508                         strstr(dmi_product_name, "Z1 Workstation"))
509                 return true;
510
511         return false;
512 }
513
514 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
515 {
516         return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
517 }
518
519
520 /*
521  * Initialize memory for HCD and xHC (one-time init).
522  *
523  * Program the PAGESIZE register, initialize the device context array, create
524  * device contexts (?), set up a command ring segment (or two?), create event
525  * ring (one for now).
526  */
527 int xhci_init(struct usb_hcd *hcd)
528 {
529         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
530         int retval = 0;
531
532         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
533         spin_lock_init(&xhci->lock);
534         if (xhci->hci_version == 0x95 && link_quirk) {
535                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
536                                 "QUIRK: Not clearing Link TRB chain bits.");
537                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
538         } else {
539                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
540                                 "xHCI doesn't need link TRB QUIRK");
541         }
542         retval = xhci_mem_init(xhci, GFP_KERNEL);
543         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
544
545         /* Initializing Compliance Mode Recovery Data If Needed */
546         if (xhci_compliance_mode_recovery_timer_quirk_check()) {
547                 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
548                 compliance_mode_recovery_timer_init(xhci);
549         }
550
551         return retval;
552 }
553
554 /*-------------------------------------------------------------------------*/
555
556
557 static int xhci_run_finished(struct xhci_hcd *xhci)
558 {
559         if (xhci_start(xhci)) {
560                 xhci_halt(xhci);
561                 return -ENODEV;
562         }
563         xhci->shared_hcd->state = HC_STATE_RUNNING;
564         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
565
566         if (xhci->quirks & XHCI_NEC_HOST)
567                 xhci_ring_cmd_db(xhci);
568
569         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
570                         "Finished xhci_run for USB3 roothub");
571         return 0;
572 }
573
574 /*
575  * Start the HC after it was halted.
576  *
577  * This function is called by the USB core when the HC driver is added.
578  * Its opposite is xhci_stop().
579  *
580  * xhci_init() must be called once before this function can be called.
581  * Reset the HC, enable device slot contexts, program DCBAAP, and
582  * set command ring pointer and event ring pointer.
583  *
584  * Setup MSI-X vectors and enable interrupts.
585  */
586 int xhci_run(struct usb_hcd *hcd)
587 {
588         u32 temp;
589         u64 temp_64;
590         int ret;
591         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
592
593         /* Start the xHCI host controller running only after the USB 2.0 roothub
594          * is setup.
595          */
596
597         hcd->uses_new_polling = 1;
598         if (!usb_hcd_is_primary_hcd(hcd))
599                 return xhci_run_finished(xhci);
600
601         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
602
603         ret = xhci_try_enable_msi(hcd);
604         if (ret)
605                 return ret;
606
607         xhci_dbg(xhci, "Command ring memory map follows:\n");
608         xhci_debug_ring(xhci, xhci->cmd_ring);
609         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
610         xhci_dbg_cmd_ptrs(xhci);
611
612         xhci_dbg(xhci, "ERST memory map follows:\n");
613         xhci_dbg_erst(xhci, &xhci->erst);
614         xhci_dbg(xhci, "Event ring:\n");
615         xhci_debug_ring(xhci, xhci->event_ring);
616         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
617         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
618         temp_64 &= ~ERST_PTR_MASK;
619         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
620                         "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
621
622         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
623                         "// Set the interrupt modulation register");
624         temp = readl(&xhci->ir_set->irq_control);
625         temp &= ~ER_IRQ_INTERVAL_MASK;
626         temp |= (u32) 160;
627         writel(temp, &xhci->ir_set->irq_control);
628
629         /* Set the HCD state before we enable the irqs */
630         temp = readl(&xhci->op_regs->command);
631         temp |= (CMD_EIE);
632         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
633                         "// Enable interrupts, cmd = 0x%x.", temp);
634         writel(temp, &xhci->op_regs->command);
635
636         temp = readl(&xhci->ir_set->irq_pending);
637         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
638                         "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
639                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
640         writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
641         xhci_print_ir_set(xhci, 0);
642
643         if (xhci->quirks & XHCI_NEC_HOST) {
644                 struct xhci_command *command;
645                 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
646                 if (!command)
647                         return -ENOMEM;
648                 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
649                                 TRB_TYPE(TRB_NEC_GET_FW));
650         }
651         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
652                         "Finished xhci_run for USB2 roothub");
653         return 0;
654 }
655 EXPORT_SYMBOL_GPL(xhci_run);
656
657 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
658 {
659         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
660
661         spin_lock_irq(&xhci->lock);
662         xhci_halt(xhci);
663         spin_unlock_irq(&xhci->lock);
664 }
665
666 /*
667  * Stop xHCI driver.
668  *
669  * This function is called by the USB core when the HC driver is removed.
670  * Its opposite is xhci_run().
671  *
672  * Disable device contexts, disable IRQs, and quiesce the HC.
673  * Reset the HC, finish any completed transactions, and cleanup memory.
674  */
675 void xhci_stop(struct usb_hcd *hcd)
676 {
677         u32 temp;
678         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
679
680         if (!usb_hcd_is_primary_hcd(hcd)) {
681                 xhci_only_stop_hcd(xhci->shared_hcd);
682                 return;
683         }
684
685         spin_lock_irq(&xhci->lock);
686         /* Make sure the xHC is halted for a USB3 roothub
687          * (xhci_stop() could be called as part of failed init).
688          */
689         xhci_halt(xhci);
690         xhci_reset(xhci);
691         spin_unlock_irq(&xhci->lock);
692
693         xhci_cleanup_msix(xhci);
694
695         /* Deleting Compliance Mode Recovery Timer */
696         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
697                         (!(xhci_all_ports_seen_u0(xhci)))) {
698                 del_timer_sync(&xhci->comp_mode_recovery_timer);
699                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
700                                 "%s: compliance mode recovery timer deleted",
701                                 __func__);
702         }
703
704         if (xhci->quirks & XHCI_AMD_PLL_FIX)
705                 usb_amd_dev_put();
706
707         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
708                         "// Disabling event ring interrupts");
709         temp = readl(&xhci->op_regs->status);
710         writel(temp & ~STS_EINT, &xhci->op_regs->status);
711         temp = readl(&xhci->ir_set->irq_pending);
712         writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
713         xhci_print_ir_set(xhci, 0);
714
715         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
716         xhci_mem_cleanup(xhci);
717         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
718                         "xhci_stop completed - status = %x",
719                         readl(&xhci->op_regs->status));
720 }
721
722 /*
723  * Shutdown HC (not bus-specific)
724  *
725  * This is called when the machine is rebooting or halting.  We assume that the
726  * machine will be powered off, and the HC's internal state will be reset.
727  * Don't bother to free memory.
728  *
729  * This will only ever be called with the main usb_hcd (the USB3 roothub).
730  */
731 void xhci_shutdown(struct usb_hcd *hcd)
732 {
733         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
734
735         if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
736                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
737
738         spin_lock_irq(&xhci->lock);
739         xhci_halt(xhci);
740         /* Workaround for spurious wakeups at shutdown with HSW */
741         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
742                 xhci_reset(xhci);
743         spin_unlock_irq(&xhci->lock);
744
745         xhci_cleanup_msix(xhci);
746
747         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
748                         "xhci_shutdown completed - status = %x",
749                         readl(&xhci->op_regs->status));
750
751         /* Yet another workaround for spurious wakeups at shutdown with HSW */
752         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
753                 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
754 }
755
756 #ifdef CONFIG_PM
757 static void xhci_save_registers(struct xhci_hcd *xhci)
758 {
759         xhci->s3.command = readl(&xhci->op_regs->command);
760         xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
761         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
762         xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
763         xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
764         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
765         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
766         xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
767         xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
768 }
769
770 static void xhci_restore_registers(struct xhci_hcd *xhci)
771 {
772         writel(xhci->s3.command, &xhci->op_regs->command);
773         writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
774         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
775         writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
776         writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
777         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
778         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
779         writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
780         writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
781 }
782
783 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
784 {
785         u64     val_64;
786
787         /* step 2: initialize command ring buffer */
788         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
789         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
790                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
791                                       xhci->cmd_ring->dequeue) &
792                  (u64) ~CMD_RING_RSVD_BITS) |
793                 xhci->cmd_ring->cycle_state;
794         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
795                         "// Setting command ring address to 0x%llx",
796                         (long unsigned long) val_64);
797         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
798 }
799
800 /*
801  * The whole command ring must be cleared to zero when we suspend the host.
802  *
803  * The host doesn't save the command ring pointer in the suspend well, so we
804  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
805  * aligned, because of the reserved bits in the command ring dequeue pointer
806  * register.  Therefore, we can't just set the dequeue pointer back in the
807  * middle of the ring (TRBs are 16-byte aligned).
808  */
809 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
810 {
811         struct xhci_ring *ring;
812         struct xhci_segment *seg;
813
814         ring = xhci->cmd_ring;
815         seg = ring->deq_seg;
816         do {
817                 memset(seg->trbs, 0,
818                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
819                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
820                         cpu_to_le32(~TRB_CYCLE);
821                 seg = seg->next;
822         } while (seg != ring->deq_seg);
823
824         /* Reset the software enqueue and dequeue pointers */
825         ring->deq_seg = ring->first_seg;
826         ring->dequeue = ring->first_seg->trbs;
827         ring->enq_seg = ring->deq_seg;
828         ring->enqueue = ring->dequeue;
829
830         ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
831         /*
832          * Ring is now zeroed, so the HW should look for change of ownership
833          * when the cycle bit is set to 1.
834          */
835         ring->cycle_state = 1;
836
837         /*
838          * Reset the hardware dequeue pointer.
839          * Yes, this will need to be re-written after resume, but we're paranoid
840          * and want to make sure the hardware doesn't access bogus memory
841          * because, say, the BIOS or an SMI started the host without changing
842          * the command ring pointers.
843          */
844         xhci_set_cmd_ring_deq(xhci);
845 }
846
847 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
848 {
849         int port_index;
850         __le32 __iomem **port_array;
851         unsigned long flags;
852         u32 t1, t2;
853
854         spin_lock_irqsave(&xhci->lock, flags);
855
856         /* disble usb3 ports Wake bits*/
857         port_index = xhci->num_usb3_ports;
858         port_array = xhci->usb3_ports;
859         while (port_index--) {
860                 t1 = readl(port_array[port_index]);
861                 t1 = xhci_port_state_to_neutral(t1);
862                 t2 = t1 & ~PORT_WAKE_BITS;
863                 if (t1 != t2)
864                         writel(t2, port_array[port_index]);
865         }
866
867         /* disble usb2 ports Wake bits*/
868         port_index = xhci->num_usb2_ports;
869         port_array = xhci->usb2_ports;
870         while (port_index--) {
871                 t1 = readl(port_array[port_index]);
872                 t1 = xhci_port_state_to_neutral(t1);
873                 t2 = t1 & ~PORT_WAKE_BITS;
874                 if (t1 != t2)
875                         writel(t2, port_array[port_index]);
876         }
877
878         spin_unlock_irqrestore(&xhci->lock, flags);
879 }
880
881 /*
882  * Stop HC (not bus-specific)
883  *
884  * This is called when the machine transition into S3/S4 mode.
885  *
886  */
887 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
888 {
889         int                     rc = 0;
890         unsigned int            delay = XHCI_MAX_HALT_USEC;
891         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
892         u32                     command;
893
894         if (!hcd->state)
895                 return 0;
896
897         if (hcd->state != HC_STATE_SUSPENDED ||
898                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
899                 return -EINVAL;
900
901         /* Clear root port wake on bits if wakeup not allowed. */
902         if (!do_wakeup)
903                 xhci_disable_port_wake_on_bits(xhci);
904
905         /* Don't poll the roothubs on bus suspend. */
906         xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
907         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
908         del_timer_sync(&hcd->rh_timer);
909         clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
910         del_timer_sync(&xhci->shared_hcd->rh_timer);
911
912         spin_lock_irq(&xhci->lock);
913         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
914         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
915         /* step 1: stop endpoint */
916         /* skipped assuming that port suspend has done */
917
918         /* step 2: clear Run/Stop bit */
919         command = readl(&xhci->op_regs->command);
920         command &= ~CMD_RUN;
921         writel(command, &xhci->op_regs->command);
922
923         /* Some chips from Fresco Logic need an extraordinary delay */
924         delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
925
926         if (xhci_handshake(&xhci->op_regs->status,
927                       STS_HALT, STS_HALT, delay)) {
928                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
929                 spin_unlock_irq(&xhci->lock);
930                 return -ETIMEDOUT;
931         }
932         xhci_clear_command_ring(xhci);
933
934         /* step 3: save registers */
935         xhci_save_registers(xhci);
936
937         /* step 4: set CSS flag */
938         command = readl(&xhci->op_regs->command);
939         command |= CMD_CSS;
940         writel(command, &xhci->op_regs->command);
941         if (xhci_handshake(&xhci->op_regs->status,
942                                 STS_SAVE, 0, 10 * 1000)) {
943                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
944                 spin_unlock_irq(&xhci->lock);
945                 return -ETIMEDOUT;
946         }
947         spin_unlock_irq(&xhci->lock);
948
949         /*
950          * Deleting Compliance Mode Recovery Timer because the xHCI Host
951          * is about to be suspended.
952          */
953         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
954                         (!(xhci_all_ports_seen_u0(xhci)))) {
955                 del_timer_sync(&xhci->comp_mode_recovery_timer);
956                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
957                                 "%s: compliance mode recovery timer deleted",
958                                 __func__);
959         }
960
961         /* step 5: remove core well power */
962         /* synchronize irq when using MSI-X */
963         xhci_msix_sync_irqs(xhci);
964
965         return rc;
966 }
967 EXPORT_SYMBOL_GPL(xhci_suspend);
968
969 /*
970  * start xHC (not bus-specific)
971  *
972  * This is called when the machine transition from S3/S4 mode.
973  *
974  */
975 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
976 {
977         u32                     command, temp = 0, status;
978         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
979         struct usb_hcd          *secondary_hcd;
980         int                     retval = 0;
981         bool                    comp_timer_running = false;
982
983         if (!hcd->state)
984                 return 0;
985
986         /* Wait a bit if either of the roothubs need to settle from the
987          * transition into bus suspend.
988          */
989         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
990                         time_before(jiffies,
991                                 xhci->bus_state[1].next_statechange))
992                 msleep(100);
993
994         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
995         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
996
997         spin_lock_irq(&xhci->lock);
998         if (xhci->quirks & XHCI_RESET_ON_RESUME)
999                 hibernated = true;
1000
1001         if (!hibernated) {
1002                 /* step 1: restore register */
1003                 xhci_restore_registers(xhci);
1004                 /* step 2: initialize command ring buffer */
1005                 xhci_set_cmd_ring_deq(xhci);
1006                 /* step 3: restore state and start state*/
1007                 /* step 3: set CRS flag */
1008                 command = readl(&xhci->op_regs->command);
1009                 command |= CMD_CRS;
1010                 writel(command, &xhci->op_regs->command);
1011                 if (xhci_handshake(&xhci->op_regs->status,
1012                               STS_RESTORE, 0, 10 * 1000)) {
1013                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1014                         spin_unlock_irq(&xhci->lock);
1015                         return -ETIMEDOUT;
1016                 }
1017                 temp = readl(&xhci->op_regs->status);
1018         }
1019
1020         /* If restore operation fails, re-initialize the HC during resume */
1021         if ((temp & STS_SRE) || hibernated) {
1022
1023                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1024                                 !(xhci_all_ports_seen_u0(xhci))) {
1025                         del_timer_sync(&xhci->comp_mode_recovery_timer);
1026                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1027                                 "Compliance Mode Recovery Timer deleted!");
1028                 }
1029
1030                 /* Let the USB core know _both_ roothubs lost power. */
1031                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1032                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1033
1034                 xhci_dbg(xhci, "Stop HCD\n");
1035                 xhci_halt(xhci);
1036                 xhci_reset(xhci);
1037                 spin_unlock_irq(&xhci->lock);
1038                 xhci_cleanup_msix(xhci);
1039
1040                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1041                 temp = readl(&xhci->op_regs->status);
1042                 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1043                 temp = readl(&xhci->ir_set->irq_pending);
1044                 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1045                 xhci_print_ir_set(xhci, 0);
1046
1047                 xhci_dbg(xhci, "cleaning up memory\n");
1048                 xhci_mem_cleanup(xhci);
1049                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1050                             readl(&xhci->op_regs->status));
1051
1052                 /* USB core calls the PCI reinit and start functions twice:
1053                  * first with the primary HCD, and then with the secondary HCD.
1054                  * If we don't do the same, the host will never be started.
1055                  */
1056                 if (!usb_hcd_is_primary_hcd(hcd))
1057                         secondary_hcd = hcd;
1058                 else
1059                         secondary_hcd = xhci->shared_hcd;
1060
1061                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1062                 retval = xhci_init(hcd->primary_hcd);
1063                 if (retval)
1064                         return retval;
1065                 comp_timer_running = true;
1066
1067                 xhci_dbg(xhci, "Start the primary HCD\n");
1068                 retval = xhci_run(hcd->primary_hcd);
1069                 if (!retval) {
1070                         xhci_dbg(xhci, "Start the secondary HCD\n");
1071                         retval = xhci_run(secondary_hcd);
1072                 }
1073                 hcd->state = HC_STATE_SUSPENDED;
1074                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1075                 goto done;
1076         }
1077
1078         /* step 4: set Run/Stop bit */
1079         command = readl(&xhci->op_regs->command);
1080         command |= CMD_RUN;
1081         writel(command, &xhci->op_regs->command);
1082         xhci_handshake(&xhci->op_regs->status, STS_HALT,
1083                   0, 250 * 1000);
1084
1085         /* step 5: walk topology and initialize portsc,
1086          * portpmsc and portli
1087          */
1088         /* this is done in bus_resume */
1089
1090         /* step 6: restart each of the previously
1091          * Running endpoints by ringing their doorbells
1092          */
1093
1094         spin_unlock_irq(&xhci->lock);
1095
1096  done:
1097         if (retval == 0) {
1098                 /* Resume root hubs only when have pending events. */
1099                 status = readl(&xhci->op_regs->status);
1100                 if (status & STS_EINT) {
1101                         usb_hcd_resume_root_hub(hcd);
1102                         usb_hcd_resume_root_hub(xhci->shared_hcd);
1103                 }
1104         }
1105
1106         /*
1107          * If system is subject to the Quirk, Compliance Mode Timer needs to
1108          * be re-initialized Always after a system resume. Ports are subject
1109          * to suffer the Compliance Mode issue again. It doesn't matter if
1110          * ports have entered previously to U0 before system's suspension.
1111          */
1112         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1113                 compliance_mode_recovery_timer_init(xhci);
1114
1115         /* Re-enable port polling. */
1116         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1117         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1118         usb_hcd_poll_rh_status(hcd);
1119         set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1120         usb_hcd_poll_rh_status(xhci->shared_hcd);
1121
1122         return retval;
1123 }
1124 EXPORT_SYMBOL_GPL(xhci_resume);
1125 #endif  /* CONFIG_PM */
1126
1127 /*-------------------------------------------------------------------------*/
1128
1129 /**
1130  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1131  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
1132  * value to right shift 1 for the bitmask.
1133  *
1134  * Index  = (epnum * 2) + direction - 1,
1135  * where direction = 0 for OUT, 1 for IN.
1136  * For control endpoints, the IN index is used (OUT index is unused), so
1137  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1138  */
1139 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1140 {
1141         unsigned int index;
1142         if (usb_endpoint_xfer_control(desc))
1143                 index = (unsigned int) (usb_endpoint_num(desc)*2);
1144         else
1145                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1146                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1147         return index;
1148 }
1149
1150 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1151  * address from the XHCI endpoint index.
1152  */
1153 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1154 {
1155         unsigned int number = DIV_ROUND_UP(ep_index, 2);
1156         unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1157         return direction | number;
1158 }
1159
1160 /* Find the flag for this endpoint (for use in the control context).  Use the
1161  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1162  * bit 1, etc.
1163  */
1164 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1165 {
1166         return 1 << (xhci_get_endpoint_index(desc) + 1);
1167 }
1168
1169 /* Find the flag for this endpoint (for use in the control context).  Use the
1170  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1171  * bit 1, etc.
1172  */
1173 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1174 {
1175         return 1 << (ep_index + 1);
1176 }
1177
1178 /* Compute the last valid endpoint context index.  Basically, this is the
1179  * endpoint index plus one.  For slot contexts with more than valid endpoint,
1180  * we find the most significant bit set in the added contexts flags.
1181  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1182  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1183  */
1184 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1185 {
1186         return fls(added_ctxs) - 1;
1187 }
1188
1189 /* Returns 1 if the arguments are OK;
1190  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1191  */
1192 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1193                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1194                 const char *func) {
1195         struct xhci_hcd *xhci;
1196         struct xhci_virt_device *virt_dev;
1197
1198         if (!hcd || (check_ep && !ep) || !udev) {
1199                 pr_debug("xHCI %s called with invalid args\n", func);
1200                 return -EINVAL;
1201         }
1202         if (!udev->parent) {
1203                 pr_debug("xHCI %s called for root hub\n", func);
1204                 return 0;
1205         }
1206
1207         xhci = hcd_to_xhci(hcd);
1208         if (check_virt_dev) {
1209                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1210                         xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1211                                         func);
1212                         return -EINVAL;
1213                 }
1214
1215                 virt_dev = xhci->devs[udev->slot_id];
1216                 if (virt_dev->udev != udev) {
1217                         xhci_dbg(xhci, "xHCI %s called with udev and "
1218                                           "virt_dev does not match\n", func);
1219                         return -EINVAL;
1220                 }
1221         }
1222
1223         if (xhci->xhc_state & XHCI_STATE_HALTED)
1224                 return -ENODEV;
1225
1226         return 1;
1227 }
1228
1229 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1230                 struct usb_device *udev, struct xhci_command *command,
1231                 bool ctx_change, bool must_succeed);
1232
1233 /*
1234  * Full speed devices may have a max packet size greater than 8 bytes, but the
1235  * USB core doesn't know that until it reads the first 8 bytes of the
1236  * descriptor.  If the usb_device's max packet size changes after that point,
1237  * we need to issue an evaluate context command and wait on it.
1238  */
1239 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1240                 unsigned int ep_index, struct urb *urb)
1241 {
1242         struct xhci_container_ctx *out_ctx;
1243         struct xhci_input_control_ctx *ctrl_ctx;
1244         struct xhci_ep_ctx *ep_ctx;
1245         struct xhci_command *command;
1246         int max_packet_size;
1247         int hw_max_packet_size;
1248         int ret = 0;
1249
1250         out_ctx = xhci->devs[slot_id]->out_ctx;
1251         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1252         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1253         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1254         if (hw_max_packet_size != max_packet_size) {
1255                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1256                                 "Max Packet Size for ep 0 changed.");
1257                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1258                                 "Max packet size in usb_device = %d",
1259                                 max_packet_size);
1260                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1261                                 "Max packet size in xHCI HW = %d",
1262                                 hw_max_packet_size);
1263                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1264                                 "Issuing evaluate context command.");
1265
1266                 /* Set up the input context flags for the command */
1267                 /* FIXME: This won't work if a non-default control endpoint
1268                  * changes max packet sizes.
1269                  */
1270
1271                 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1272                 if (!command)
1273                         return -ENOMEM;
1274
1275                 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1276                 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1277                 if (!ctrl_ctx) {
1278                         xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1279                                         __func__);
1280                         ret = -ENOMEM;
1281                         goto command_cleanup;
1282                 }
1283                 /* Set up the modified control endpoint 0 */
1284                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1285                                 xhci->devs[slot_id]->out_ctx, ep_index);
1286
1287                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1288                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1289                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1290
1291                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1292                 ctrl_ctx->drop_flags = 0;
1293
1294                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1295                 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1296                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1297                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1298
1299                 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1300                                 true, false);
1301
1302                 /* Clean up the input context for later use by bandwidth
1303                  * functions.
1304                  */
1305                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1306 command_cleanup:
1307                 kfree(command->completion);
1308                 kfree(command);
1309         }
1310         return ret;
1311 }
1312
1313 /*
1314  * non-error returns are a promise to giveback() the urb later
1315  * we drop ownership so next owner (or urb unlink) can get it
1316  */
1317 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1318 {
1319         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1320         struct xhci_td *buffer;
1321         unsigned long flags;
1322         int ret = 0;
1323         unsigned int slot_id, ep_index;
1324         struct urb_priv *urb_priv;
1325         int size, i;
1326
1327         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1328                                         true, true, __func__) <= 0)
1329                 return -EINVAL;
1330
1331         slot_id = urb->dev->slot_id;
1332         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1333
1334         if (!HCD_HW_ACCESSIBLE(hcd)) {
1335                 if (!in_interrupt())
1336                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1337                 ret = -ESHUTDOWN;
1338                 goto exit;
1339         }
1340
1341         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1342                 size = urb->number_of_packets;
1343         else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1344             urb->transfer_buffer_length > 0 &&
1345             urb->transfer_flags & URB_ZERO_PACKET &&
1346             !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1347                 size = 2;
1348         else
1349                 size = 1;
1350
1351         urb_priv = kzalloc(sizeof(struct urb_priv) +
1352                                   size * sizeof(struct xhci_td *), mem_flags);
1353         if (!urb_priv)
1354                 return -ENOMEM;
1355
1356         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1357         if (!buffer) {
1358                 kfree(urb_priv);
1359                 return -ENOMEM;
1360         }
1361
1362         for (i = 0; i < size; i++) {
1363                 urb_priv->td[i] = buffer;
1364                 buffer++;
1365         }
1366
1367         urb_priv->length = size;
1368         urb_priv->td_cnt = 0;
1369         urb->hcpriv = urb_priv;
1370
1371         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1372                 /* Check to see if the max packet size for the default control
1373                  * endpoint changed during FS device enumeration
1374                  */
1375                 if (urb->dev->speed == USB_SPEED_FULL) {
1376                         ret = xhci_check_maxpacket(xhci, slot_id,
1377                                         ep_index, urb);
1378                         if (ret < 0) {
1379                                 xhci_urb_free_priv(urb_priv);
1380                                 urb->hcpriv = NULL;
1381                                 return ret;
1382                         }
1383                 }
1384
1385                 /* We have a spinlock and interrupts disabled, so we must pass
1386                  * atomic context to this function, which may allocate memory.
1387                  */
1388                 spin_lock_irqsave(&xhci->lock, flags);
1389                 if (xhci->xhc_state & XHCI_STATE_DYING)
1390                         goto dying;
1391                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1392                                 slot_id, ep_index);
1393                 if (ret)
1394                         goto free_priv;
1395                 spin_unlock_irqrestore(&xhci->lock, flags);
1396         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1397                 spin_lock_irqsave(&xhci->lock, flags);
1398                 if (xhci->xhc_state & XHCI_STATE_DYING)
1399                         goto dying;
1400                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1401                                 EP_GETTING_STREAMS) {
1402                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1403                                         "is transitioning to using streams.\n");
1404                         ret = -EINVAL;
1405                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1406                                 EP_GETTING_NO_STREAMS) {
1407                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1408                                         "is transitioning to "
1409                                         "not having streams.\n");
1410                         ret = -EINVAL;
1411                 } else {
1412                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1413                                         slot_id, ep_index);
1414                 }
1415                 if (ret)
1416                         goto free_priv;
1417                 spin_unlock_irqrestore(&xhci->lock, flags);
1418         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1419                 spin_lock_irqsave(&xhci->lock, flags);
1420                 if (xhci->xhc_state & XHCI_STATE_DYING)
1421                         goto dying;
1422                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1423                                 slot_id, ep_index);
1424                 if (ret)
1425                         goto free_priv;
1426                 spin_unlock_irqrestore(&xhci->lock, flags);
1427         } else {
1428                 spin_lock_irqsave(&xhci->lock, flags);
1429                 if (xhci->xhc_state & XHCI_STATE_DYING)
1430                         goto dying;
1431                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1432                                 slot_id, ep_index);
1433                 if (ret)
1434                         goto free_priv;
1435                 spin_unlock_irqrestore(&xhci->lock, flags);
1436         }
1437 exit:
1438         return ret;
1439 dying:
1440         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1441                         "non-responsive xHCI host.\n",
1442                         urb->ep->desc.bEndpointAddress, urb);
1443         ret = -ESHUTDOWN;
1444 free_priv:
1445         xhci_urb_free_priv(urb_priv);
1446         urb->hcpriv = NULL;
1447         spin_unlock_irqrestore(&xhci->lock, flags);
1448         return ret;
1449 }
1450
1451 /* Get the right ring for the given URB.
1452  * If the endpoint supports streams, boundary check the URB's stream ID.
1453  * If the endpoint doesn't support streams, return the singular endpoint ring.
1454  */
1455 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1456                 struct urb *urb)
1457 {
1458         unsigned int slot_id;
1459         unsigned int ep_index;
1460         unsigned int stream_id;
1461         struct xhci_virt_ep *ep;
1462
1463         slot_id = urb->dev->slot_id;
1464         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1465         stream_id = urb->stream_id;
1466         ep = &xhci->devs[slot_id]->eps[ep_index];
1467         /* Common case: no streams */
1468         if (!(ep->ep_state & EP_HAS_STREAMS))
1469                 return ep->ring;
1470
1471         if (stream_id == 0) {
1472                 xhci_warn(xhci,
1473                                 "WARN: Slot ID %u, ep index %u has streams, "
1474                                 "but URB has no stream ID.\n",
1475                                 slot_id, ep_index);
1476                 return NULL;
1477         }
1478
1479         if (stream_id < ep->stream_info->num_streams)
1480                 return ep->stream_info->stream_rings[stream_id];
1481
1482         xhci_warn(xhci,
1483                         "WARN: Slot ID %u, ep index %u has "
1484                         "stream IDs 1 to %u allocated, "
1485                         "but stream ID %u is requested.\n",
1486                         slot_id, ep_index,
1487                         ep->stream_info->num_streams - 1,
1488                         stream_id);
1489         return NULL;
1490 }
1491
1492 /*
1493  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1494  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1495  * should pick up where it left off in the TD, unless a Set Transfer Ring
1496  * Dequeue Pointer is issued.
1497  *
1498  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1499  * the ring.  Since the ring is a contiguous structure, they can't be physically
1500  * removed.  Instead, there are two options:
1501  *
1502  *  1) If the HC is in the middle of processing the URB to be canceled, we
1503  *     simply move the ring's dequeue pointer past those TRBs using the Set
1504  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1505  *     when drivers timeout on the last submitted URB and attempt to cancel.
1506  *
1507  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1508  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1509  *     HC will need to invalidate the any TRBs it has cached after the stop
1510  *     endpoint command, as noted in the xHCI 0.95 errata.
1511  *
1512  *  3) The TD may have completed by the time the Stop Endpoint Command
1513  *     completes, so software needs to handle that case too.
1514  *
1515  * This function should protect against the TD enqueueing code ringing the
1516  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1517  * It also needs to account for multiple cancellations on happening at the same
1518  * time for the same endpoint.
1519  *
1520  * Note that this function can be called in any context, or so says
1521  * usb_hcd_unlink_urb()
1522  */
1523 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1524 {
1525         unsigned long flags;
1526         int ret, i;
1527         u32 temp;
1528         struct xhci_hcd *xhci;
1529         struct urb_priv *urb_priv;
1530         struct xhci_td *td;
1531         unsigned int ep_index;
1532         struct xhci_ring *ep_ring;
1533         struct xhci_virt_ep *ep;
1534         struct xhci_command *command;
1535
1536         xhci = hcd_to_xhci(hcd);
1537         spin_lock_irqsave(&xhci->lock, flags);
1538         /* Make sure the URB hasn't completed or been unlinked already */
1539         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1540         if (ret || !urb->hcpriv)
1541                 goto done;
1542         temp = readl(&xhci->op_regs->status);
1543         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1544                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1545                                 "HW died, freeing TD.");
1546                 urb_priv = urb->hcpriv;
1547                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1548                         td = urb_priv->td[i];
1549                         if (!list_empty(&td->td_list))
1550                                 list_del_init(&td->td_list);
1551                         if (!list_empty(&td->cancelled_td_list))
1552                                 list_del_init(&td->cancelled_td_list);
1553                 }
1554
1555                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1556                 spin_unlock_irqrestore(&xhci->lock, flags);
1557                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1558                 xhci_urb_free_priv(urb_priv);
1559                 return ret;
1560         }
1561         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1562                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1563                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1564                                 "Ep 0x%x: URB %p to be canceled on "
1565                                 "non-responsive xHCI host.",
1566                                 urb->ep->desc.bEndpointAddress, urb);
1567                 /* Let the stop endpoint command watchdog timer (which set this
1568                  * state) finish cleaning up the endpoint TD lists.  We must
1569                  * have caught it in the middle of dropping a lock and giving
1570                  * back an URB.
1571                  */
1572                 goto done;
1573         }
1574
1575         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1576         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1577         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1578         if (!ep_ring) {
1579                 ret = -EINVAL;
1580                 goto done;
1581         }
1582
1583         urb_priv = urb->hcpriv;
1584         i = urb_priv->td_cnt;
1585         if (i < urb_priv->length)
1586                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1587                                 "Cancel URB %p, dev %s, ep 0x%x, "
1588                                 "starting at offset 0x%llx",
1589                                 urb, urb->dev->devpath,
1590                                 urb->ep->desc.bEndpointAddress,
1591                                 (unsigned long long) xhci_trb_virt_to_dma(
1592                                         urb_priv->td[i]->start_seg,
1593                                         urb_priv->td[i]->first_trb));
1594
1595         for (; i < urb_priv->length; i++) {
1596                 td = urb_priv->td[i];
1597                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1598         }
1599
1600         /* Queue a stop endpoint command, but only if this is
1601          * the first cancellation to be handled.
1602          */
1603         if (!(ep->ep_state & EP_HALT_PENDING)) {
1604                 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1605                 if (!command) {
1606                         ret = -ENOMEM;
1607                         goto done;
1608                 }
1609                 ep->ep_state |= EP_HALT_PENDING;
1610                 ep->stop_cmds_pending++;
1611                 ep->stop_cmd_timer.expires = jiffies +
1612                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1613                 add_timer(&ep->stop_cmd_timer);
1614                 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1615                                          ep_index, 0);
1616                 xhci_ring_cmd_db(xhci);
1617         }
1618 done:
1619         spin_unlock_irqrestore(&xhci->lock, flags);
1620         return ret;
1621 }
1622
1623 /* Drop an endpoint from a new bandwidth configuration for this device.
1624  * Only one call to this function is allowed per endpoint before
1625  * check_bandwidth() or reset_bandwidth() must be called.
1626  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1627  * add the endpoint to the schedule with possibly new parameters denoted by a
1628  * different endpoint descriptor in usb_host_endpoint.
1629  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1630  * not allowed.
1631  *
1632  * The USB core will not allow URBs to be queued to an endpoint that is being
1633  * disabled, so there's no need for mutual exclusion to protect
1634  * the xhci->devs[slot_id] structure.
1635  */
1636 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1637                 struct usb_host_endpoint *ep)
1638 {
1639         struct xhci_hcd *xhci;
1640         struct xhci_container_ctx *in_ctx, *out_ctx;
1641         struct xhci_input_control_ctx *ctrl_ctx;
1642         unsigned int ep_index;
1643         struct xhci_ep_ctx *ep_ctx;
1644         u32 drop_flag;
1645         u32 new_add_flags, new_drop_flags;
1646         int ret;
1647
1648         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1649         if (ret <= 0)
1650                 return ret;
1651         xhci = hcd_to_xhci(hcd);
1652         if (xhci->xhc_state & XHCI_STATE_DYING)
1653                 return -ENODEV;
1654
1655         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1656         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1657         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1658                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1659                                 __func__, drop_flag);
1660                 return 0;
1661         }
1662
1663         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1664         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1665         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1666         if (!ctrl_ctx) {
1667                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1668                                 __func__);
1669                 return 0;
1670         }
1671
1672         ep_index = xhci_get_endpoint_index(&ep->desc);
1673         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1674         /* If the HC already knows the endpoint is disabled,
1675          * or the HCD has noted it is disabled, ignore this request
1676          */
1677         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1678              cpu_to_le32(EP_STATE_DISABLED)) ||
1679             le32_to_cpu(ctrl_ctx->drop_flags) &
1680             xhci_get_endpoint_flag(&ep->desc)) {
1681                 /* Do not warn when called after a usb_device_reset */
1682                 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1683                         xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1684                                   __func__, ep);
1685                 return 0;
1686         }
1687
1688         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1689         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1690
1691         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1692         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1693
1694         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1695
1696         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1697                         (unsigned int) ep->desc.bEndpointAddress,
1698                         udev->slot_id,
1699                         (unsigned int) new_drop_flags,
1700                         (unsigned int) new_add_flags);
1701         return 0;
1702 }
1703
1704 /* Add an endpoint to a new possible bandwidth configuration for this device.
1705  * Only one call to this function is allowed per endpoint before
1706  * check_bandwidth() or reset_bandwidth() must be called.
1707  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1708  * add the endpoint to the schedule with possibly new parameters denoted by a
1709  * different endpoint descriptor in usb_host_endpoint.
1710  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1711  * not allowed.
1712  *
1713  * The USB core will not allow URBs to be queued to an endpoint until the
1714  * configuration or alt setting is installed in the device, so there's no need
1715  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1716  */
1717 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1718                 struct usb_host_endpoint *ep)
1719 {
1720         struct xhci_hcd *xhci;
1721         struct xhci_container_ctx *in_ctx;
1722         unsigned int ep_index;
1723         struct xhci_input_control_ctx *ctrl_ctx;
1724         u32 added_ctxs;
1725         u32 new_add_flags, new_drop_flags;
1726         struct xhci_virt_device *virt_dev;
1727         int ret = 0;
1728
1729         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1730         if (ret <= 0) {
1731                 /* So we won't queue a reset ep command for a root hub */
1732                 ep->hcpriv = NULL;
1733                 return ret;
1734         }
1735         xhci = hcd_to_xhci(hcd);
1736         if (xhci->xhc_state & XHCI_STATE_DYING)
1737                 return -ENODEV;
1738
1739         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1740         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1741                 /* FIXME when we have to issue an evaluate endpoint command to
1742                  * deal with ep0 max packet size changing once we get the
1743                  * descriptors
1744                  */
1745                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1746                                 __func__, added_ctxs);
1747                 return 0;
1748         }
1749
1750         virt_dev = xhci->devs[udev->slot_id];
1751         in_ctx = virt_dev->in_ctx;
1752         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1753         if (!ctrl_ctx) {
1754                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1755                                 __func__);
1756                 return 0;
1757         }
1758
1759         ep_index = xhci_get_endpoint_index(&ep->desc);
1760         /* If this endpoint is already in use, and the upper layers are trying
1761          * to add it again without dropping it, reject the addition.
1762          */
1763         if (virt_dev->eps[ep_index].ring &&
1764                         !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1765                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1766                                 "without dropping it.\n",
1767                                 (unsigned int) ep->desc.bEndpointAddress);
1768                 return -EINVAL;
1769         }
1770
1771         /* If the HCD has already noted the endpoint is enabled,
1772          * ignore this request.
1773          */
1774         if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1775                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1776                                 __func__, ep);
1777                 return 0;
1778         }
1779
1780         /*
1781          * Configuration and alternate setting changes must be done in
1782          * process context, not interrupt context (or so documenation
1783          * for usb_set_interface() and usb_set_configuration() claim).
1784          */
1785         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1786                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1787                                 __func__, ep->desc.bEndpointAddress);
1788                 return -ENOMEM;
1789         }
1790
1791         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1792         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1793
1794         /* If xhci_endpoint_disable() was called for this endpoint, but the
1795          * xHC hasn't been notified yet through the check_bandwidth() call,
1796          * this re-adds a new state for the endpoint from the new endpoint
1797          * descriptors.  We must drop and re-add this endpoint, so we leave the
1798          * drop flags alone.
1799          */
1800         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1801
1802         /* Store the usb_device pointer for later use */
1803         ep->hcpriv = udev;
1804
1805         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1806                         (unsigned int) ep->desc.bEndpointAddress,
1807                         udev->slot_id,
1808                         (unsigned int) new_drop_flags,
1809                         (unsigned int) new_add_flags);
1810         return 0;
1811 }
1812
1813 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1814 {
1815         struct xhci_input_control_ctx *ctrl_ctx;
1816         struct xhci_ep_ctx *ep_ctx;
1817         struct xhci_slot_ctx *slot_ctx;
1818         int i;
1819
1820         ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1821         if (!ctrl_ctx) {
1822                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1823                                 __func__);
1824                 return;
1825         }
1826
1827         /* When a device's add flag and drop flag are zero, any subsequent
1828          * configure endpoint command will leave that endpoint's state
1829          * untouched.  Make sure we don't leave any old state in the input
1830          * endpoint contexts.
1831          */
1832         ctrl_ctx->drop_flags = 0;
1833         ctrl_ctx->add_flags = 0;
1834         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1835         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1836         /* Endpoint 0 is always valid */
1837         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1838         for (i = 1; i < 31; ++i) {
1839                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1840                 ep_ctx->ep_info = 0;
1841                 ep_ctx->ep_info2 = 0;
1842                 ep_ctx->deq = 0;
1843                 ep_ctx->tx_info = 0;
1844         }
1845 }
1846
1847 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1848                 struct usb_device *udev, u32 *cmd_status)
1849 {
1850         int ret;
1851
1852         switch (*cmd_status) {
1853         case COMP_CMD_ABORT:
1854         case COMP_CMD_STOP:
1855                 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1856                 ret = -ETIME;
1857                 break;
1858         case COMP_ENOMEM:
1859                 dev_warn(&udev->dev,
1860                          "Not enough host controller resources for new device state.\n");
1861                 ret = -ENOMEM;
1862                 /* FIXME: can we allocate more resources for the HC? */
1863                 break;
1864         case COMP_BW_ERR:
1865         case COMP_2ND_BW_ERR:
1866                 dev_warn(&udev->dev,
1867                          "Not enough bandwidth for new device state.\n");
1868                 ret = -ENOSPC;
1869                 /* FIXME: can we go back to the old state? */
1870                 break;
1871         case COMP_TRB_ERR:
1872                 /* the HCD set up something wrong */
1873                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1874                                 "add flag = 1, "
1875                                 "and endpoint is not disabled.\n");
1876                 ret = -EINVAL;
1877                 break;
1878         case COMP_DEV_ERR:
1879                 dev_warn(&udev->dev,
1880                          "ERROR: Incompatible device for endpoint configure command.\n");
1881                 ret = -ENODEV;
1882                 break;
1883         case COMP_SUCCESS:
1884                 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1885                                 "Successful Endpoint Configure command");
1886                 ret = 0;
1887                 break;
1888         default:
1889                 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1890                                 *cmd_status);
1891                 ret = -EINVAL;
1892                 break;
1893         }
1894         return ret;
1895 }
1896
1897 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1898                 struct usb_device *udev, u32 *cmd_status)
1899 {
1900         int ret;
1901         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1902
1903         switch (*cmd_status) {
1904         case COMP_CMD_ABORT:
1905         case COMP_CMD_STOP:
1906                 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1907                 ret = -ETIME;
1908                 break;
1909         case COMP_EINVAL:
1910                 dev_warn(&udev->dev,
1911                          "WARN: xHCI driver setup invalid evaluate context command.\n");
1912                 ret = -EINVAL;
1913                 break;
1914         case COMP_EBADSLT:
1915                 dev_warn(&udev->dev,
1916                         "WARN: slot not enabled for evaluate context command.\n");
1917                 ret = -EINVAL;
1918                 break;
1919         case COMP_CTX_STATE:
1920                 dev_warn(&udev->dev,
1921                         "WARN: invalid context state for evaluate context command.\n");
1922                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1923                 ret = -EINVAL;
1924                 break;
1925         case COMP_DEV_ERR:
1926                 dev_warn(&udev->dev,
1927                         "ERROR: Incompatible device for evaluate context command.\n");
1928                 ret = -ENODEV;
1929                 break;
1930         case COMP_MEL_ERR:
1931                 /* Max Exit Latency too large error */
1932                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1933                 ret = -EINVAL;
1934                 break;
1935         case COMP_SUCCESS:
1936                 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1937                                 "Successful evaluate context command");
1938                 ret = 0;
1939                 break;
1940         default:
1941                 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1942                         *cmd_status);
1943                 ret = -EINVAL;
1944                 break;
1945         }
1946         return ret;
1947 }
1948
1949 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1950                 struct xhci_input_control_ctx *ctrl_ctx)
1951 {
1952         u32 valid_add_flags;
1953         u32 valid_drop_flags;
1954
1955         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1956          * (bit 1).  The default control endpoint is added during the Address
1957          * Device command and is never removed until the slot is disabled.
1958          */
1959         valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1960         valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1961
1962         /* Use hweight32 to count the number of ones in the add flags, or
1963          * number of endpoints added.  Don't count endpoints that are changed
1964          * (both added and dropped).
1965          */
1966         return hweight32(valid_add_flags) -
1967                 hweight32(valid_add_flags & valid_drop_flags);
1968 }
1969
1970 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1971                 struct xhci_input_control_ctx *ctrl_ctx)
1972 {
1973         u32 valid_add_flags;
1974         u32 valid_drop_flags;
1975
1976         valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1977         valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1978
1979         return hweight32(valid_drop_flags) -
1980                 hweight32(valid_add_flags & valid_drop_flags);
1981 }
1982
1983 /*
1984  * We need to reserve the new number of endpoints before the configure endpoint
1985  * command completes.  We can't subtract the dropped endpoints from the number
1986  * of active endpoints until the command completes because we can oversubscribe
1987  * the host in this case:
1988  *
1989  *  - the first configure endpoint command drops more endpoints than it adds
1990  *  - a second configure endpoint command that adds more endpoints is queued
1991  *  - the first configure endpoint command fails, so the config is unchanged
1992  *  - the second command may succeed, even though there isn't enough resources
1993  *
1994  * Must be called with xhci->lock held.
1995  */
1996 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1997                 struct xhci_input_control_ctx *ctrl_ctx)
1998 {
1999         u32 added_eps;
2000
2001         added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2002         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
2003                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2004                                 "Not enough ep ctxs: "
2005                                 "%u active, need to add %u, limit is %u.",
2006                                 xhci->num_active_eps, added_eps,
2007                                 xhci->limit_active_eps);
2008                 return -ENOMEM;
2009         }
2010         xhci->num_active_eps += added_eps;
2011         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2012                         "Adding %u ep ctxs, %u now active.", added_eps,
2013                         xhci->num_active_eps);
2014         return 0;
2015 }
2016
2017 /*
2018  * The configure endpoint was failed by the xHC for some other reason, so we
2019  * need to revert the resources that failed configuration would have used.
2020  *
2021  * Must be called with xhci->lock held.
2022  */
2023 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2024                 struct xhci_input_control_ctx *ctrl_ctx)
2025 {
2026         u32 num_failed_eps;
2027
2028         num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2029         xhci->num_active_eps -= num_failed_eps;
2030         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2031                         "Removing %u failed ep ctxs, %u now active.",
2032                         num_failed_eps,
2033                         xhci->num_active_eps);
2034 }
2035
2036 /*
2037  * Now that the command has completed, clean up the active endpoint count by
2038  * subtracting out the endpoints that were dropped (but not changed).
2039  *
2040  * Must be called with xhci->lock held.
2041  */
2042 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2043                 struct xhci_input_control_ctx *ctrl_ctx)
2044 {
2045         u32 num_dropped_eps;
2046
2047         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2048         xhci->num_active_eps -= num_dropped_eps;
2049         if (num_dropped_eps)
2050                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2051                                 "Removing %u dropped ep ctxs, %u now active.",
2052                                 num_dropped_eps,
2053                                 xhci->num_active_eps);
2054 }
2055
2056 static unsigned int xhci_get_block_size(struct usb_device *udev)
2057 {
2058         switch (udev->speed) {
2059         case USB_SPEED_LOW:
2060         case USB_SPEED_FULL:
2061                 return FS_BLOCK;
2062         case USB_SPEED_HIGH:
2063                 return HS_BLOCK;
2064         case USB_SPEED_SUPER:
2065                 return SS_BLOCK;
2066         case USB_SPEED_UNKNOWN:
2067         case USB_SPEED_WIRELESS:
2068         default:
2069                 /* Should never happen */
2070                 return 1;
2071         }
2072 }
2073
2074 static unsigned int
2075 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2076 {
2077         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2078                 return LS_OVERHEAD;
2079         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2080                 return FS_OVERHEAD;
2081         return HS_OVERHEAD;
2082 }
2083
2084 /* If we are changing a LS/FS device under a HS hub,
2085  * make sure (if we are activating a new TT) that the HS bus has enough
2086  * bandwidth for this new TT.
2087  */
2088 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2089                 struct xhci_virt_device *virt_dev,
2090                 int old_active_eps)
2091 {
2092         struct xhci_interval_bw_table *bw_table;
2093         struct xhci_tt_bw_info *tt_info;
2094
2095         /* Find the bandwidth table for the root port this TT is attached to. */
2096         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2097         tt_info = virt_dev->tt_info;
2098         /* If this TT already had active endpoints, the bandwidth for this TT
2099          * has already been added.  Removing all periodic endpoints (and thus
2100          * making the TT enactive) will only decrease the bandwidth used.
2101          */
2102         if (old_active_eps)
2103                 return 0;
2104         if (old_active_eps == 0 && tt_info->active_eps != 0) {
2105                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2106                         return -ENOMEM;
2107                 return 0;
2108         }
2109         /* Not sure why we would have no new active endpoints...
2110          *
2111          * Maybe because of an Evaluate Context change for a hub update or a
2112          * control endpoint 0 max packet size change?
2113          * FIXME: skip the bandwidth calculation in that case.
2114          */
2115         return 0;
2116 }
2117
2118 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2119                 struct xhci_virt_device *virt_dev)
2120 {
2121         unsigned int bw_reserved;
2122
2123         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2124         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2125                 return -ENOMEM;
2126
2127         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2128         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2129                 return -ENOMEM;
2130
2131         return 0;
2132 }
2133
2134 /*
2135  * This algorithm is a very conservative estimate of the worst-case scheduling
2136  * scenario for any one interval.  The hardware dynamically schedules the
2137  * packets, so we can't tell which microframe could be the limiting factor in
2138  * the bandwidth scheduling.  This only takes into account periodic endpoints.
2139  *
2140  * Obviously, we can't solve an NP complete problem to find the minimum worst
2141  * case scenario.  Instead, we come up with an estimate that is no less than
2142  * the worst case bandwidth used for any one microframe, but may be an
2143  * over-estimate.
2144  *
2145  * We walk the requirements for each endpoint by interval, starting with the
2146  * smallest interval, and place packets in the schedule where there is only one
2147  * possible way to schedule packets for that interval.  In order to simplify
2148  * this algorithm, we record the largest max packet size for each interval, and
2149  * assume all packets will be that size.
2150  *
2151  * For interval 0, we obviously must schedule all packets for each interval.
2152  * The bandwidth for interval 0 is just the amount of data to be transmitted
2153  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2154  * the number of packets).
2155  *
2156  * For interval 1, we have two possible microframes to schedule those packets
2157  * in.  For this algorithm, if we can schedule the same number of packets for
2158  * each possible scheduling opportunity (each microframe), we will do so.  The
2159  * remaining number of packets will be saved to be transmitted in the gaps in
2160  * the next interval's scheduling sequence.
2161  *
2162  * As we move those remaining packets to be scheduled with interval 2 packets,
2163  * we have to double the number of remaining packets to transmit.  This is
2164  * because the intervals are actually powers of 2, and we would be transmitting
2165  * the previous interval's packets twice in this interval.  We also have to be
2166  * sure that when we look at the largest max packet size for this interval, we
2167  * also look at the largest max packet size for the remaining packets and take
2168  * the greater of the two.
2169  *
2170  * The algorithm continues to evenly distribute packets in each scheduling
2171  * opportunity, and push the remaining packets out, until we get to the last
2172  * interval.  Then those packets and their associated overhead are just added
2173  * to the bandwidth used.
2174  */
2175 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2176                 struct xhci_virt_device *virt_dev,
2177                 int old_active_eps)
2178 {
2179         unsigned int bw_reserved;
2180         unsigned int max_bandwidth;
2181         unsigned int bw_used;
2182         unsigned int block_size;
2183         struct xhci_interval_bw_table *bw_table;
2184         unsigned int packet_size = 0;
2185         unsigned int overhead = 0;
2186         unsigned int packets_transmitted = 0;
2187         unsigned int packets_remaining = 0;
2188         unsigned int i;
2189
2190         if (virt_dev->udev->speed == USB_SPEED_SUPER)
2191                 return xhci_check_ss_bw(xhci, virt_dev);
2192
2193         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2194                 max_bandwidth = HS_BW_LIMIT;
2195                 /* Convert percent of bus BW reserved to blocks reserved */
2196                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2197         } else {
2198                 max_bandwidth = FS_BW_LIMIT;
2199                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2200         }
2201
2202         bw_table = virt_dev->bw_table;
2203         /* We need to translate the max packet size and max ESIT payloads into
2204          * the units the hardware uses.
2205          */
2206         block_size = xhci_get_block_size(virt_dev->udev);
2207
2208         /* If we are manipulating a LS/FS device under a HS hub, double check
2209          * that the HS bus has enough bandwidth if we are activing a new TT.
2210          */
2211         if (virt_dev->tt_info) {
2212                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2213                                 "Recalculating BW for rootport %u",
2214                                 virt_dev->real_port);
2215                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2216                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2217                                         "newly activated TT.\n");
2218                         return -ENOMEM;
2219                 }
2220                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2221                                 "Recalculating BW for TT slot %u port %u",
2222                                 virt_dev->tt_info->slot_id,
2223                                 virt_dev->tt_info->ttport);
2224         } else {
2225                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2226                                 "Recalculating BW for rootport %u",
2227                                 virt_dev->real_port);
2228         }
2229
2230         /* Add in how much bandwidth will be used for interval zero, or the
2231          * rounded max ESIT payload + number of packets * largest overhead.
2232          */
2233         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2234                 bw_table->interval_bw[0].num_packets *
2235                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2236
2237         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2238                 unsigned int bw_added;
2239                 unsigned int largest_mps;
2240                 unsigned int interval_overhead;
2241
2242                 /*
2243                  * How many packets could we transmit in this interval?
2244                  * If packets didn't fit in the previous interval, we will need
2245                  * to transmit that many packets twice within this interval.
2246                  */
2247                 packets_remaining = 2 * packets_remaining +
2248                         bw_table->interval_bw[i].num_packets;
2249
2250                 /* Find the largest max packet size of this or the previous
2251                  * interval.
2252                  */
2253                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2254                         largest_mps = 0;
2255                 else {
2256                         struct xhci_virt_ep *virt_ep;
2257                         struct list_head *ep_entry;
2258
2259                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2260                         virt_ep = list_entry(ep_entry,
2261                                         struct xhci_virt_ep, bw_endpoint_list);
2262                         /* Convert to blocks, rounding up */
2263                         largest_mps = DIV_ROUND_UP(
2264                                         virt_ep->bw_info.max_packet_size,
2265                                         block_size);
2266                 }
2267                 if (largest_mps > packet_size)
2268                         packet_size = largest_mps;
2269
2270                 /* Use the larger overhead of this or the previous interval. */
2271                 interval_overhead = xhci_get_largest_overhead(
2272                                 &bw_table->interval_bw[i]);
2273                 if (interval_overhead > overhead)
2274                         overhead = interval_overhead;
2275
2276                 /* How many packets can we evenly distribute across
2277                  * (1 << (i + 1)) possible scheduling opportunities?
2278                  */
2279                 packets_transmitted = packets_remaining >> (i + 1);
2280
2281                 /* Add in the bandwidth used for those scheduled packets */
2282                 bw_added = packets_transmitted * (overhead + packet_size);
2283
2284                 /* How many packets do we have remaining to transmit? */
2285                 packets_remaining = packets_remaining % (1 << (i + 1));
2286
2287                 /* What largest max packet size should those packets have? */
2288                 /* If we've transmitted all packets, don't carry over the
2289                  * largest packet size.
2290                  */
2291                 if (packets_remaining == 0) {
2292                         packet_size = 0;
2293                         overhead = 0;
2294                 } else if (packets_transmitted > 0) {
2295                         /* Otherwise if we do have remaining packets, and we've
2296                          * scheduled some packets in this interval, take the
2297                          * largest max packet size from endpoints with this
2298                          * interval.
2299                          */
2300                         packet_size = largest_mps;
2301                         overhead = interval_overhead;
2302                 }
2303                 /* Otherwise carry over packet_size and overhead from the last
2304                  * time we had a remainder.
2305                  */
2306                 bw_used += bw_added;
2307                 if (bw_used > max_bandwidth) {
2308                         xhci_warn(xhci, "Not enough bandwidth. "
2309                                         "Proposed: %u, Max: %u\n",
2310                                 bw_used, max_bandwidth);
2311                         return -ENOMEM;
2312                 }
2313         }
2314         /*
2315          * Ok, we know we have some packets left over after even-handedly
2316          * scheduling interval 15.  We don't know which microframes they will
2317          * fit into, so we over-schedule and say they will be scheduled every
2318          * microframe.
2319          */
2320         if (packets_remaining > 0)
2321                 bw_used += overhead + packet_size;
2322
2323         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2324                 unsigned int port_index = virt_dev->real_port - 1;
2325
2326                 /* OK, we're manipulating a HS device attached to a
2327                  * root port bandwidth domain.  Include the number of active TTs
2328                  * in the bandwidth used.
2329                  */
2330                 bw_used += TT_HS_OVERHEAD *
2331                         xhci->rh_bw[port_index].num_active_tts;
2332         }
2333
2334         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2335                 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2336                 "Available: %u " "percent",
2337                 bw_used, max_bandwidth, bw_reserved,
2338                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2339                 max_bandwidth);
2340
2341         bw_used += bw_reserved;
2342         if (bw_used > max_bandwidth) {
2343                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2344                                 bw_used, max_bandwidth);
2345                 return -ENOMEM;
2346         }
2347
2348         bw_table->bw_used = bw_used;
2349         return 0;
2350 }
2351
2352 static bool xhci_is_async_ep(unsigned int ep_type)
2353 {
2354         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2355                                         ep_type != ISOC_IN_EP &&
2356                                         ep_type != INT_IN_EP);
2357 }
2358
2359 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2360 {
2361         return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2362 }
2363
2364 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2365 {
2366         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2367
2368         if (ep_bw->ep_interval == 0)
2369                 return SS_OVERHEAD_BURST +
2370                         (ep_bw->mult * ep_bw->num_packets *
2371                                         (SS_OVERHEAD + mps));
2372         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2373                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2374                                 1 << ep_bw->ep_interval);
2375
2376 }
2377
2378 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2379                 struct xhci_bw_info *ep_bw,
2380                 struct xhci_interval_bw_table *bw_table,
2381                 struct usb_device *udev,
2382                 struct xhci_virt_ep *virt_ep,
2383                 struct xhci_tt_bw_info *tt_info)
2384 {
2385         struct xhci_interval_bw *interval_bw;
2386         int normalized_interval;
2387
2388         if (xhci_is_async_ep(ep_bw->type))
2389                 return;
2390
2391         if (udev->speed == USB_SPEED_SUPER) {
2392                 if (xhci_is_sync_in_ep(ep_bw->type))
2393                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2394                                 xhci_get_ss_bw_consumed(ep_bw);
2395                 else
2396                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2397                                 xhci_get_ss_bw_consumed(ep_bw);
2398                 return;
2399         }
2400
2401         /* SuperSpeed endpoints never get added to intervals in the table, so
2402          * this check is only valid for HS/FS/LS devices.
2403          */
2404         if (list_empty(&virt_ep->bw_endpoint_list))
2405                 return;
2406         /* For LS/FS devices, we need to translate the interval expressed in
2407          * microframes to frames.
2408          */
2409         if (udev->speed == USB_SPEED_HIGH)
2410                 normalized_interval = ep_bw->ep_interval;
2411         else
2412                 normalized_interval = ep_bw->ep_interval - 3;
2413
2414         if (normalized_interval == 0)
2415                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2416         interval_bw = &bw_table->interval_bw[normalized_interval];
2417         interval_bw->num_packets -= ep_bw->num_packets;
2418         switch (udev->speed) {
2419         case USB_SPEED_LOW:
2420                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2421                 break;
2422         case USB_SPEED_FULL:
2423                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2424                 break;
2425         case USB_SPEED_HIGH:
2426                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2427                 break;
2428         case USB_SPEED_SUPER:
2429         case USB_SPEED_UNKNOWN:
2430         case USB_SPEED_WIRELESS:
2431                 /* Should never happen because only LS/FS/HS endpoints will get
2432                  * added to the endpoint list.
2433                  */
2434                 return;
2435         }
2436         if (tt_info)
2437                 tt_info->active_eps -= 1;
2438         list_del_init(&virt_ep->bw_endpoint_list);
2439 }
2440
2441 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2442                 struct xhci_bw_info *ep_bw,
2443                 struct xhci_interval_bw_table *bw_table,
2444                 struct usb_device *udev,
2445                 struct xhci_virt_ep *virt_ep,
2446                 struct xhci_tt_bw_info *tt_info)
2447 {
2448         struct xhci_interval_bw *interval_bw;
2449         struct xhci_virt_ep *smaller_ep;
2450         int normalized_interval;
2451
2452         if (xhci_is_async_ep(ep_bw->type))
2453                 return;
2454
2455         if (udev->speed == USB_SPEED_SUPER) {
2456                 if (xhci_is_sync_in_ep(ep_bw->type))
2457                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2458                                 xhci_get_ss_bw_consumed(ep_bw);
2459                 else
2460                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2461                                 xhci_get_ss_bw_consumed(ep_bw);
2462                 return;
2463         }
2464
2465         /* For LS/FS devices, we need to translate the interval expressed in
2466          * microframes to frames.
2467          */
2468         if (udev->speed == USB_SPEED_HIGH)
2469                 normalized_interval = ep_bw->ep_interval;
2470         else
2471                 normalized_interval = ep_bw->ep_interval - 3;
2472
2473         if (normalized_interval == 0)
2474                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2475         interval_bw = &bw_table->interval_bw[normalized_interval];
2476         interval_bw->num_packets += ep_bw->num_packets;
2477         switch (udev->speed) {
2478         case USB_SPEED_LOW:
2479                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2480                 break;
2481         case USB_SPEED_FULL:
2482                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2483                 break;
2484         case USB_SPEED_HIGH:
2485                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2486                 break;
2487         case USB_SPEED_SUPER:
2488         case USB_SPEED_UNKNOWN:
2489         case USB_SPEED_WIRELESS:
2490                 /* Should never happen because only LS/FS/HS endpoints will get
2491                  * added to the endpoint list.
2492                  */
2493                 return;
2494         }
2495
2496         if (tt_info)
2497                 tt_info->active_eps += 1;
2498         /* Insert the endpoint into the list, largest max packet size first. */
2499         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2500                         bw_endpoint_list) {
2501                 if (ep_bw->max_packet_size >=
2502                                 smaller_ep->bw_info.max_packet_size) {
2503                         /* Add the new ep before the smaller endpoint */
2504                         list_add_tail(&virt_ep->bw_endpoint_list,
2505                                         &smaller_ep->bw_endpoint_list);
2506                         return;
2507                 }
2508         }
2509         /* Add the new endpoint at the end of the list. */
2510         list_add_tail(&virt_ep->bw_endpoint_list,
2511                         &interval_bw->endpoints);
2512 }
2513
2514 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2515                 struct xhci_virt_device *virt_dev,
2516                 int old_active_eps)
2517 {
2518         struct xhci_root_port_bw_info *rh_bw_info;
2519         if (!virt_dev->tt_info)
2520                 return;
2521
2522         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2523         if (old_active_eps == 0 &&
2524                                 virt_dev->tt_info->active_eps != 0) {
2525                 rh_bw_info->num_active_tts += 1;
2526                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2527         } else if (old_active_eps != 0 &&
2528                                 virt_dev->tt_info->active_eps == 0) {
2529                 rh_bw_info->num_active_tts -= 1;
2530                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2531         }
2532 }
2533
2534 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2535                 struct xhci_virt_device *virt_dev,
2536                 struct xhci_container_ctx *in_ctx)
2537 {
2538         struct xhci_bw_info ep_bw_info[31];
2539         int i;
2540         struct xhci_input_control_ctx *ctrl_ctx;
2541         int old_active_eps = 0;
2542
2543         if (virt_dev->tt_info)
2544                 old_active_eps = virt_dev->tt_info->active_eps;
2545
2546         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2547         if (!ctrl_ctx) {
2548                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2549                                 __func__);
2550                 return -ENOMEM;
2551         }
2552
2553         for (i = 0; i < 31; i++) {
2554                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2555                         continue;
2556
2557                 /* Make a copy of the BW info in case we need to revert this */
2558                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2559                                 sizeof(ep_bw_info[i]));
2560                 /* Drop the endpoint from the interval table if the endpoint is
2561                  * being dropped or changed.
2562                  */
2563                 if (EP_IS_DROPPED(ctrl_ctx, i))
2564                         xhci_drop_ep_from_interval_table(xhci,
2565                                         &virt_dev->eps[i].bw_info,
2566                                         virt_dev->bw_table,
2567                                         virt_dev->udev,
2568                                         &virt_dev->eps[i],
2569                                         virt_dev->tt_info);
2570         }
2571         /* Overwrite the information stored in the endpoints' bw_info */
2572         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2573         for (i = 0; i < 31; i++) {
2574                 /* Add any changed or added endpoints to the interval table */
2575                 if (EP_IS_ADDED(ctrl_ctx, i))
2576                         xhci_add_ep_to_interval_table(xhci,
2577                                         &virt_dev->eps[i].bw_info,
2578                                         virt_dev->bw_table,
2579                                         virt_dev->udev,
2580                                         &virt_dev->eps[i],
2581                                         virt_dev->tt_info);
2582         }
2583
2584         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2585                 /* Ok, this fits in the bandwidth we have.
2586                  * Update the number of active TTs.
2587                  */
2588                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2589                 return 0;
2590         }
2591
2592         /* We don't have enough bandwidth for this, revert the stored info. */
2593         for (i = 0; i < 31; i++) {
2594                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2595                         continue;
2596
2597                 /* Drop the new copies of any added or changed endpoints from
2598                  * the interval table.
2599                  */
2600                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2601                         xhci_drop_ep_from_interval_table(xhci,
2602                                         &virt_dev->eps[i].bw_info,
2603                                         virt_dev->bw_table,
2604                                         virt_dev->udev,
2605                                         &virt_dev->eps[i],
2606                                         virt_dev->tt_info);
2607                 }
2608                 /* Revert the endpoint back to its old information */
2609                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2610                                 sizeof(ep_bw_info[i]));
2611                 /* Add any changed or dropped endpoints back into the table */
2612                 if (EP_IS_DROPPED(ctrl_ctx, i))
2613                         xhci_add_ep_to_interval_table(xhci,
2614                                         &virt_dev->eps[i].bw_info,
2615                                         virt_dev->bw_table,
2616                                         virt_dev->udev,
2617                                         &virt_dev->eps[i],
2618                                         virt_dev->tt_info);
2619         }
2620         return -ENOMEM;
2621 }
2622
2623
2624 /* Issue a configure endpoint command or evaluate context command
2625  * and wait for it to finish.
2626  */
2627 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2628                 struct usb_device *udev,
2629                 struct xhci_command *command,
2630                 bool ctx_change, bool must_succeed)
2631 {
2632         int ret;
2633         unsigned long flags;
2634         struct xhci_input_control_ctx *ctrl_ctx;
2635         struct xhci_virt_device *virt_dev;
2636
2637         if (!command)
2638                 return -EINVAL;
2639
2640         spin_lock_irqsave(&xhci->lock, flags);
2641         virt_dev = xhci->devs[udev->slot_id];
2642
2643         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2644         if (!ctrl_ctx) {
2645                 spin_unlock_irqrestore(&xhci->lock, flags);
2646                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2647                                 __func__);
2648                 return -ENOMEM;
2649         }
2650
2651         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2652                         xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2653                 spin_unlock_irqrestore(&xhci->lock, flags);
2654                 xhci_warn(xhci, "Not enough host resources, "
2655                                 "active endpoint contexts = %u\n",
2656                                 xhci->num_active_eps);
2657                 return -ENOMEM;
2658         }
2659         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2660             xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2661                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2662                         xhci_free_host_resources(xhci, ctrl_ctx);
2663                 spin_unlock_irqrestore(&xhci->lock, flags);
2664                 xhci_warn(xhci, "Not enough bandwidth\n");
2665                 return -ENOMEM;
2666         }
2667
2668         if (!ctx_change)
2669                 ret = xhci_queue_configure_endpoint(xhci, command,
2670                                 command->in_ctx->dma,
2671                                 udev->slot_id, must_succeed);
2672         else
2673                 ret = xhci_queue_evaluate_context(xhci, command,
2674                                 command->in_ctx->dma,
2675                                 udev->slot_id, must_succeed);
2676         if (ret < 0) {
2677                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2678                         xhci_free_host_resources(xhci, ctrl_ctx);
2679                 spin_unlock_irqrestore(&xhci->lock, flags);
2680                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
2681                                 "FIXME allocate a new ring segment");
2682                 return -ENOMEM;
2683         }
2684         xhci_ring_cmd_db(xhci);
2685         spin_unlock_irqrestore(&xhci->lock, flags);
2686
2687         /* Wait for the configure endpoint command to complete */
2688         wait_for_completion(command->completion);
2689
2690         if (!ctx_change)
2691                 ret = xhci_configure_endpoint_result(xhci, udev,
2692                                                      &command->status);
2693         else
2694                 ret = xhci_evaluate_context_result(xhci, udev,
2695                                                    &command->status);
2696
2697         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2698                 spin_lock_irqsave(&xhci->lock, flags);
2699                 /* If the command failed, remove the reserved resources.
2700                  * Otherwise, clean up the estimate to include dropped eps.
2701                  */
2702                 if (ret)
2703                         xhci_free_host_resources(xhci, ctrl_ctx);
2704                 else
2705                         xhci_finish_resource_reservation(xhci, ctrl_ctx);
2706                 spin_unlock_irqrestore(&xhci->lock, flags);
2707         }
2708         return ret;
2709 }
2710
2711 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2712         struct xhci_virt_device *vdev, int i)
2713 {
2714         struct xhci_virt_ep *ep = &vdev->eps[i];
2715
2716         if (ep->ep_state & EP_HAS_STREAMS) {
2717                 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2718                                 xhci_get_endpoint_address(i));
2719                 xhci_free_stream_info(xhci, ep->stream_info);
2720                 ep->stream_info = NULL;
2721                 ep->ep_state &= ~EP_HAS_STREAMS;
2722         }
2723 }
2724
2725 /* Called after one or more calls to xhci_add_endpoint() or
2726  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2727  * to call xhci_reset_bandwidth().
2728  *
2729  * Since we are in the middle of changing either configuration or
2730  * installing a new alt setting, the USB core won't allow URBs to be
2731  * enqueued for any endpoint on the old config or interface.  Nothing
2732  * else should be touching the xhci->devs[slot_id] structure, so we
2733  * don't need to take the xhci->lock for manipulating that.
2734  */
2735 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2736 {
2737         int i;
2738         int ret = 0;
2739         struct xhci_hcd *xhci;
2740         struct xhci_virt_device *virt_dev;
2741         struct xhci_input_control_ctx *ctrl_ctx;
2742         struct xhci_slot_ctx *slot_ctx;
2743         struct xhci_command *command;
2744
2745         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2746         if (ret <= 0)
2747                 return ret;
2748         xhci = hcd_to_xhci(hcd);
2749         if (xhci->xhc_state & XHCI_STATE_DYING)
2750                 return -ENODEV;
2751
2752         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2753         virt_dev = xhci->devs[udev->slot_id];
2754
2755         command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2756         if (!command)
2757                 return -ENOMEM;
2758
2759         command->in_ctx = virt_dev->in_ctx;
2760
2761         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2762         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2763         if (!ctrl_ctx) {
2764                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2765                                 __func__);
2766                 ret = -ENOMEM;
2767                 goto command_cleanup;
2768         }
2769         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2770         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2771         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2772
2773         /* Don't issue the command if there's no endpoints to update. */
2774         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2775             ctrl_ctx->drop_flags == 0) {
2776                 ret = 0;
2777                 goto command_cleanup;
2778         }
2779         /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2780         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2781         for (i = 31; i >= 1; i--) {
2782                 __le32 le32 = cpu_to_le32(BIT(i));
2783
2784                 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2785                     || (ctrl_ctx->add_flags & le32) || i == 1) {
2786                         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2787                         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2788                         break;
2789                 }
2790         }
2791         xhci_dbg(xhci, "New Input Control Context:\n");
2792         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2793                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2794
2795         ret = xhci_configure_endpoint(xhci, udev, command,
2796                         false, false);
2797         if (ret)
2798                 /* Callee should call reset_bandwidth() */
2799                 goto command_cleanup;
2800
2801         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2802         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2803                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2804
2805         /* Free any rings that were dropped, but not changed. */
2806         for (i = 1; i < 31; ++i) {
2807                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2808                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2809                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2810                         xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2811                 }
2812         }
2813         xhci_zero_in_ctx(xhci, virt_dev);
2814         /*
2815          * Install any rings for completely new endpoints or changed endpoints,
2816          * and free or cache any old rings from changed endpoints.
2817          */
2818         for (i = 1; i < 31; ++i) {
2819                 if (!virt_dev->eps[i].new_ring)
2820                         continue;
2821                 /* Only cache or free the old ring if it exists.
2822                  * It may not if this is the first add of an endpoint.
2823                  */
2824                 if (virt_dev->eps[i].ring) {
2825                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2826                 }
2827                 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2828                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2829                 virt_dev->eps[i].new_ring = NULL;
2830         }
2831 command_cleanup:
2832         kfree(command->completion);
2833         kfree(command);
2834
2835         return ret;
2836 }
2837
2838 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2839 {
2840         struct xhci_hcd *xhci;
2841         struct xhci_virt_device *virt_dev;
2842         int i, ret;
2843
2844         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2845         if (ret <= 0)
2846                 return;
2847         xhci = hcd_to_xhci(hcd);
2848
2849         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2850         virt_dev = xhci->devs[udev->slot_id];
2851         /* Free any rings allocated for added endpoints */
2852         for (i = 0; i < 31; ++i) {
2853                 if (virt_dev->eps[i].new_ring) {
2854                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2855                         virt_dev->eps[i].new_ring = NULL;
2856                 }
2857         }
2858         xhci_zero_in_ctx(xhci, virt_dev);
2859 }
2860
2861 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2862                 struct xhci_container_ctx *in_ctx,
2863                 struct xhci_container_ctx *out_ctx,
2864                 struct xhci_input_control_ctx *ctrl_ctx,
2865                 u32 add_flags, u32 drop_flags)
2866 {
2867         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2868         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2869         xhci_slot_copy(xhci, in_ctx, out_ctx);
2870         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2871
2872         xhci_dbg(xhci, "Input Context:\n");
2873         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2874 }
2875
2876 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2877                 unsigned int slot_id, unsigned int ep_index,
2878                 struct xhci_dequeue_state *deq_state)
2879 {
2880         struct xhci_input_control_ctx *ctrl_ctx;
2881         struct xhci_container_ctx *in_ctx;
2882         struct xhci_ep_ctx *ep_ctx;
2883         u32 added_ctxs;
2884         dma_addr_t addr;
2885
2886         in_ctx = xhci->devs[slot_id]->in_ctx;
2887         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2888         if (!ctrl_ctx) {
2889                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2890                                 __func__);
2891                 return;
2892         }
2893
2894         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2895                         xhci->devs[slot_id]->out_ctx, ep_index);
2896         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2897         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2898                         deq_state->new_deq_ptr);
2899         if (addr == 0) {
2900                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2901                                 "reset ep command\n");
2902                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2903                                 deq_state->new_deq_seg,
2904                                 deq_state->new_deq_ptr);
2905                 return;
2906         }
2907         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2908
2909         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2910         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2911                         xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2912                         added_ctxs, added_ctxs);
2913 }
2914
2915 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2916                         unsigned int ep_index, struct xhci_td *td)
2917 {
2918         struct xhci_dequeue_state deq_state;
2919         struct xhci_virt_ep *ep;
2920         struct usb_device *udev = td->urb->dev;
2921
2922         xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2923                         "Cleaning up stalled endpoint ring");
2924         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2925         /* We need to move the HW's dequeue pointer past this TD,
2926          * or it will attempt to resend it on the next doorbell ring.
2927          */
2928         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2929                         ep_index, ep->stopped_stream, td, &deq_state);
2930
2931         if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2932                 return;
2933
2934         /* HW with the reset endpoint quirk will use the saved dequeue state to
2935          * issue a configure endpoint command later.
2936          */
2937         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2938                 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2939                                 "Queueing new dequeue state");
2940                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2941                                 ep_index, ep->stopped_stream, &deq_state);
2942         } else {
2943                 /* Better hope no one uses the input context between now and the
2944                  * reset endpoint completion!
2945                  * XXX: No idea how this hardware will react when stream rings
2946                  * are enabled.
2947                  */
2948                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2949                                 "Setting up input context for "
2950                                 "configure endpoint command");
2951                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2952                                 ep_index, &deq_state);
2953         }
2954 }
2955
2956 /* Called when clearing halted device. The core should have sent the control
2957  * message to clear the device halt condition. The host side of the halt should
2958  * already be cleared with a reset endpoint command issued when the STALL tx
2959  * event was received.
2960  *
2961  * Context: in_interrupt
2962  */
2963
2964 void xhci_endpoint_reset(struct usb_hcd *hcd,
2965                 struct usb_host_endpoint *ep)
2966 {
2967         struct xhci_hcd *xhci;
2968
2969         xhci = hcd_to_xhci(hcd);
2970
2971         /*
2972          * We might need to implement the config ep cmd in xhci 4.8.1 note:
2973          * The Reset Endpoint Command may only be issued to endpoints in the
2974          * Halted state. If software wishes reset the Data Toggle or Sequence
2975          * Number of an endpoint that isn't in the Halted state, then software
2976          * may issue a Configure Endpoint Command with the Drop and Add bits set
2977          * for the target endpoint. that is in the Stopped state.
2978          */
2979
2980         /* For now just print debug to follow the situation */
2981         xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2982                  ep->desc.bEndpointAddress);
2983 }
2984
2985 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2986                 struct usb_device *udev, struct usb_host_endpoint *ep,
2987                 unsigned int slot_id)
2988 {
2989         int ret;
2990         unsigned int ep_index;
2991         unsigned int ep_state;
2992
2993         if (!ep)
2994                 return -EINVAL;
2995         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2996         if (ret <= 0)
2997                 return -EINVAL;
2998         if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2999                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
3000                                 " descriptor for ep 0x%x does not support streams\n",
3001                                 ep->desc.bEndpointAddress);
3002                 return -EINVAL;
3003         }
3004
3005         ep_index = xhci_get_endpoint_index(&ep->desc);
3006         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3007         if (ep_state & EP_HAS_STREAMS ||
3008                         ep_state & EP_GETTING_STREAMS) {
3009                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3010                                 "already has streams set up.\n",
3011                                 ep->desc.bEndpointAddress);
3012                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3013                                 "dynamic stream context array reallocation.\n");
3014                 return -EINVAL;
3015         }
3016         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3017                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3018                                 "endpoint 0x%x; URBs are pending.\n",
3019                                 ep->desc.bEndpointAddress);
3020                 return -EINVAL;
3021         }
3022         return 0;
3023 }
3024
3025 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3026                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3027 {
3028         unsigned int max_streams;
3029
3030         /* The stream context array size must be a power of two */
3031         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3032         /*
3033          * Find out how many primary stream array entries the host controller
3034          * supports.  Later we may use secondary stream arrays (similar to 2nd
3035          * level page entries), but that's an optional feature for xHCI host
3036          * controllers. xHCs must support at least 4 stream IDs.
3037          */
3038         max_streams = HCC_MAX_PSA(xhci->hcc_params);
3039         if (*num_stream_ctxs > max_streams) {
3040                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3041                                 max_streams);
3042                 *num_stream_ctxs = max_streams;
3043                 *num_streams = max_streams;
3044         }
3045 }
3046
3047 /* Returns an error code if one of the endpoint already has streams.
3048  * This does not change any data structures, it only checks and gathers
3049  * information.
3050  */
3051 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3052                 struct usb_device *udev,
3053                 struct usb_host_endpoint **eps, unsigned int num_eps,
3054                 unsigned int *num_streams, u32 *changed_ep_bitmask)
3055 {
3056         unsigned int max_streams;
3057         unsigned int endpoint_flag;
3058         int i;
3059         int ret;
3060
3061         for (i = 0; i < num_eps; i++) {
3062                 ret = xhci_check_streams_endpoint(xhci, udev,
3063                                 eps[i], udev->slot_id);
3064                 if (ret < 0)
3065                         return ret;
3066
3067                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3068                 if (max_streams < (*num_streams - 1)) {
3069                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3070                                         eps[i]->desc.bEndpointAddress,
3071                                         max_streams);
3072                         *num_streams = max_streams+1;
3073                 }
3074
3075                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3076                 if (*changed_ep_bitmask & endpoint_flag)
3077                         return -EINVAL;
3078                 *changed_ep_bitmask |= endpoint_flag;
3079         }
3080         return 0;
3081 }
3082
3083 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3084                 struct usb_device *udev,
3085                 struct usb_host_endpoint **eps, unsigned int num_eps)
3086 {
3087         u32 changed_ep_bitmask = 0;
3088         unsigned int slot_id;
3089         unsigned int ep_index;
3090         unsigned int ep_state;
3091         int i;
3092
3093         slot_id = udev->slot_id;
3094         if (!xhci->devs[slot_id])
3095                 return 0;
3096
3097         for (i = 0; i < num_eps; i++) {
3098                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3099                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3100                 /* Are streams already being freed for the endpoint? */
3101                 if (ep_state & EP_GETTING_NO_STREAMS) {
3102                         xhci_warn(xhci, "WARN Can't disable streams for "
3103                                         "endpoint 0x%x, "
3104                                         "streams are being disabled already\n",
3105                                         eps[i]->desc.bEndpointAddress);
3106                         return 0;
3107                 }
3108                 /* Are there actually any streams to free? */
3109                 if (!(ep_state & EP_HAS_STREAMS) &&
3110                                 !(ep_state & EP_GETTING_STREAMS)) {
3111                         xhci_warn(xhci, "WARN Can't disable streams for "
3112                                         "endpoint 0x%x, "
3113                                         "streams are already disabled!\n",
3114                                         eps[i]->desc.bEndpointAddress);
3115                         xhci_warn(xhci, "WARN xhci_free_streams() called "
3116                                         "with non-streams endpoint\n");
3117                         return 0;
3118                 }
3119                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3120         }
3121         return changed_ep_bitmask;
3122 }
3123
3124 /*
3125  * The USB device drivers use this function (through the HCD interface in USB
3126  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
3127  * coordinate mass storage command queueing across multiple endpoints (basically
3128  * a stream ID == a task ID).
3129  *
3130  * Setting up streams involves allocating the same size stream context array
3131  * for each endpoint and issuing a configure endpoint command for all endpoints.
3132  *
3133  * Don't allow the call to succeed if one endpoint only supports one stream
3134  * (which means it doesn't support streams at all).
3135  *
3136  * Drivers may get less stream IDs than they asked for, if the host controller
3137  * hardware or endpoints claim they can't support the number of requested
3138  * stream IDs.
3139  */
3140 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3141                 struct usb_host_endpoint **eps, unsigned int num_eps,
3142                 unsigned int num_streams, gfp_t mem_flags)
3143 {
3144         int i, ret;
3145         struct xhci_hcd *xhci;
3146         struct xhci_virt_device *vdev;
3147         struct xhci_command *config_cmd;
3148         struct xhci_input_control_ctx *ctrl_ctx;
3149         unsigned int ep_index;
3150         unsigned int num_stream_ctxs;
3151         unsigned long flags;
3152         u32 changed_ep_bitmask = 0;
3153
3154         if (!eps)
3155                 return -EINVAL;
3156
3157         /* Add one to the number of streams requested to account for
3158          * stream 0 that is reserved for xHCI usage.
3159          */
3160         num_streams += 1;
3161         xhci = hcd_to_xhci(hcd);
3162         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3163                         num_streams);
3164
3165         /* MaxPSASize value 0 (2 streams) means streams are not supported */
3166         if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3167                         HCC_MAX_PSA(xhci->hcc_params) < 4) {
3168                 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3169                 return -ENOSYS;
3170         }
3171
3172         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3173         if (!config_cmd) {
3174                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3175                 return -ENOMEM;
3176         }
3177         ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3178         if (!ctrl_ctx) {
3179                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3180                                 __func__);
3181                 xhci_free_command(xhci, config_cmd);
3182                 return -ENOMEM;
3183         }
3184
3185         /* Check to make sure all endpoints are not already configured for
3186          * streams.  While we're at it, find the maximum number of streams that
3187          * all the endpoints will support and check for duplicate endpoints.
3188          */
3189         spin_lock_irqsave(&xhci->lock, flags);
3190         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3191                         num_eps, &num_streams, &changed_ep_bitmask);
3192         if (ret < 0) {
3193                 xhci_free_command(xhci, config_cmd);
3194                 spin_unlock_irqrestore(&xhci->lock, flags);
3195                 return ret;
3196         }
3197         if (num_streams <= 1) {
3198                 xhci_warn(xhci, "WARN: endpoints can't handle "
3199                                 "more than one stream.\n");
3200                 xhci_free_command(xhci, config_cmd);
3201                 spin_unlock_irqrestore(&xhci->lock, flags);
3202                 return -EINVAL;
3203         }
3204         vdev = xhci->devs[udev->slot_id];
3205         /* Mark each endpoint as being in transition, so
3206          * xhci_urb_enqueue() will reject all URBs.
3207          */
3208         for (i = 0; i < num_eps; i++) {
3209                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3210                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3211         }
3212         spin_unlock_irqrestore(&xhci->lock, flags);
3213
3214         /* Setup internal data structures and allocate HW data structures for
3215          * streams (but don't install the HW structures in the input context
3216          * until we're sure all memory allocation succeeded).
3217          */
3218         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3219         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3220                         num_stream_ctxs, num_streams);
3221
3222         for (i = 0; i < num_eps; i++) {
3223                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3224                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3225                                 num_stream_ctxs,
3226                                 num_streams, mem_flags);
3227                 if (!vdev->eps[ep_index].stream_info)
3228                         goto cleanup;
3229                 /* Set maxPstreams in endpoint context and update deq ptr to
3230                  * point to stream context array. FIXME
3231                  */
3232         }
3233
3234         /* Set up the input context for a configure endpoint command. */
3235         for (i = 0; i < num_eps; i++) {
3236                 struct xhci_ep_ctx *ep_ctx;
3237
3238                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3239                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3240
3241                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3242                                 vdev->out_ctx, ep_index);
3243                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3244                                 vdev->eps[ep_index].stream_info);
3245         }
3246         /* Tell the HW to drop its old copy of the endpoint context info
3247          * and add the updated copy from the input context.
3248          */
3249         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3250                         vdev->out_ctx, ctrl_ctx,
3251                         changed_ep_bitmask, changed_ep_bitmask);
3252
3253         /* Issue and wait for the configure endpoint command */
3254         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3255                         false, false);
3256
3257         /* xHC rejected the configure endpoint command for some reason, so we
3258          * leave the old ring intact and free our internal streams data
3259          * structure.
3260          */
3261         if (ret < 0)
3262                 goto cleanup;
3263
3264         spin_lock_irqsave(&xhci->lock, flags);
3265         for (i = 0; i < num_eps; i++) {
3266                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3267                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3268                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3269                          udev->slot_id, ep_index);
3270                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3271         }
3272         xhci_free_command(xhci, config_cmd);
3273         spin_unlock_irqrestore(&xhci->lock, flags);
3274
3275         /* Subtract 1 for stream 0, which drivers can't use */
3276         return num_streams - 1;
3277
3278 cleanup:
3279         /* If it didn't work, free the streams! */
3280         for (i = 0; i < num_eps; i++) {
3281                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3282                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3283                 vdev->eps[ep_index].stream_info = NULL;
3284                 /* FIXME Unset maxPstreams in endpoint context and
3285                  * update deq ptr to point to normal string ring.
3286                  */
3287                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3288                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3289                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3290         }
3291         xhci_free_command(xhci, config_cmd);
3292         return -ENOMEM;
3293 }
3294
3295 /* Transition the endpoint from using streams to being a "normal" endpoint
3296  * without streams.
3297  *
3298  * Modify the endpoint context state, submit a configure endpoint command,
3299  * and free all endpoint rings for streams if that completes successfully.
3300  */
3301 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3302                 struct usb_host_endpoint **eps, unsigned int num_eps,
3303                 gfp_t mem_flags)
3304 {
3305         int i, ret;
3306         struct xhci_hcd *xhci;
3307         struct xhci_virt_device *vdev;
3308         struct xhci_command *command;
3309         struct xhci_input_control_ctx *ctrl_ctx;
3310         unsigned int ep_index;
3311         unsigned long flags;
3312         u32 changed_ep_bitmask;
3313
3314         xhci = hcd_to_xhci(hcd);
3315         vdev = xhci->devs[udev->slot_id];
3316
3317         /* Set up a configure endpoint command to remove the streams rings */
3318         spin_lock_irqsave(&xhci->lock, flags);
3319         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3320                         udev, eps, num_eps);
3321         if (changed_ep_bitmask == 0) {
3322                 spin_unlock_irqrestore(&xhci->lock, flags);
3323                 return -EINVAL;
3324         }
3325
3326         /* Use the xhci_command structure from the first endpoint.  We may have
3327          * allocated too many, but the driver may call xhci_free_streams() for
3328          * each endpoint it grouped into one call to xhci_alloc_streams().
3329          */
3330         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3331         command = vdev->eps[ep_index].stream_info->free_streams_command;
3332         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3333         if (!ctrl_ctx) {
3334                 spin_unlock_irqrestore(&xhci->lock, flags);
3335                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3336                                 __func__);
3337                 return -EINVAL;
3338         }
3339
3340         for (i = 0; i < num_eps; i++) {
3341                 struct xhci_ep_ctx *ep_ctx;
3342
3343                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3344                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3345                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3346                         EP_GETTING_NO_STREAMS;
3347
3348                 xhci_endpoint_copy(xhci, command->in_ctx,
3349                                 vdev->out_ctx, ep_index);
3350                 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3351                                 &vdev->eps[ep_index]);
3352         }
3353         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3354                         vdev->out_ctx, ctrl_ctx,
3355                         changed_ep_bitmask, changed_ep_bitmask);
3356         spin_unlock_irqrestore(&xhci->lock, flags);
3357
3358         /* Issue and wait for the configure endpoint command,
3359          * which must succeed.
3360          */
3361         ret = xhci_configure_endpoint(xhci, udev, command,
3362                         false, true);
3363
3364         /* xHC rejected the configure endpoint command for some reason, so we
3365          * leave the streams rings intact.
3366          */
3367         if (ret < 0)
3368                 return ret;
3369
3370         spin_lock_irqsave(&xhci->lock, flags);
3371         for (i = 0; i < num_eps; i++) {
3372                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3373                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3374                 vdev->eps[ep_index].stream_info = NULL;
3375                 /* FIXME Unset maxPstreams in endpoint context and
3376                  * update deq ptr to point to normal string ring.
3377                  */
3378                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3379                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3380         }
3381         spin_unlock_irqrestore(&xhci->lock, flags);
3382
3383         return 0;
3384 }
3385
3386 /*
3387  * Deletes endpoint resources for endpoints that were active before a Reset
3388  * Device command, or a Disable Slot command.  The Reset Device command leaves
3389  * the control endpoint intact, whereas the Disable Slot command deletes it.
3390  *
3391  * Must be called with xhci->lock held.
3392  */
3393 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3394         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3395 {
3396         int i;
3397         unsigned int num_dropped_eps = 0;
3398         unsigned int drop_flags = 0;
3399
3400         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3401                 if (virt_dev->eps[i].ring) {
3402                         drop_flags |= 1 << i;
3403                         num_dropped_eps++;
3404                 }
3405         }
3406         xhci->num_active_eps -= num_dropped_eps;
3407         if (num_dropped_eps)
3408                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3409                                 "Dropped %u ep ctxs, flags = 0x%x, "
3410                                 "%u now active.",
3411                                 num_dropped_eps, drop_flags,
3412                                 xhci->num_active_eps);
3413 }
3414
3415 /*
3416  * This submits a Reset Device Command, which will set the device state to 0,
3417  * set the device address to 0, and disable all the endpoints except the default
3418  * control endpoint.  The USB core should come back and call
3419  * xhci_address_device(), and then re-set up the configuration.  If this is
3420  * called because of a usb_reset_and_verify_device(), then the old alternate
3421  * settings will be re-installed through the normal bandwidth allocation
3422  * functions.
3423  *
3424  * Wait for the Reset Device command to finish.  Remove all structures
3425  * associated with the endpoints that were disabled.  Clear the input device
3426  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3427  *
3428  * If the virt_dev to be reset does not exist or does not match the udev,
3429  * it means the device is lost, possibly due to the xHC restore error and
3430  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3431  * re-allocate the device.
3432  */
3433 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3434 {
3435         int ret, i;
3436         unsigned long flags;
3437         struct xhci_hcd *xhci;
3438         unsigned int slot_id;
3439         struct xhci_virt_device *virt_dev;
3440         struct xhci_command *reset_device_cmd;
3441         int last_freed_endpoint;
3442         struct xhci_slot_ctx *slot_ctx;
3443         int old_active_eps = 0;
3444
3445         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3446         if (ret <= 0)
3447                 return ret;
3448         xhci = hcd_to_xhci(hcd);
3449         slot_id = udev->slot_id;
3450         virt_dev = xhci->devs[slot_id];
3451         if (!virt_dev) {
3452                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3453                                 "not exist. Re-allocate the device\n", slot_id);
3454                 ret = xhci_alloc_dev(hcd, udev);
3455                 if (ret == 1)
3456                         return 0;
3457                 else
3458                         return -EINVAL;
3459         }
3460
3461         if (virt_dev->tt_info)
3462                 old_active_eps = virt_dev->tt_info->active_eps;
3463
3464         if (virt_dev->udev != udev) {
3465                 /* If the virt_dev and the udev does not match, this virt_dev
3466                  * may belong to another udev.
3467                  * Re-allocate the device.
3468                  */
3469                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3470                                 "not match the udev. Re-allocate the device\n",
3471                                 slot_id);
3472                 ret = xhci_alloc_dev(hcd, udev);
3473                 if (ret == 1)
3474                         return 0;
3475                 else
3476                         return -EINVAL;
3477         }
3478
3479         /* If device is not setup, there is no point in resetting it */
3480         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3481         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3482                                                 SLOT_STATE_DISABLED)
3483                 return 0;
3484
3485         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3486         /* Allocate the command structure that holds the struct completion.
3487          * Assume we're in process context, since the normal device reset
3488          * process has to wait for the device anyway.  Storage devices are
3489          * reset as part of error handling, so use GFP_NOIO instead of
3490          * GFP_KERNEL.
3491          */
3492         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3493         if (!reset_device_cmd) {
3494                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3495                 return -ENOMEM;
3496         }
3497
3498         /* Attempt to submit the Reset Device command to the command ring */
3499         spin_lock_irqsave(&xhci->lock, flags);
3500
3501         ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3502         if (ret) {
3503                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3504                 spin_unlock_irqrestore(&xhci->lock, flags);
3505                 goto command_cleanup;
3506         }
3507         xhci_ring_cmd_db(xhci);
3508         spin_unlock_irqrestore(&xhci->lock, flags);
3509
3510         /* Wait for the Reset Device command to finish */
3511         wait_for_completion(reset_device_cmd->completion);
3512
3513         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3514          * unless we tried to reset a slot ID that wasn't enabled,
3515          * or the device wasn't in the addressed or configured state.
3516          */
3517         ret = reset_device_cmd->status;
3518         switch (ret) {
3519         case COMP_CMD_ABORT:
3520         case COMP_CMD_STOP:
3521                 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3522                 ret = -ETIME;
3523                 goto command_cleanup;
3524         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3525         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3526                 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3527                                 slot_id,
3528                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3529                 xhci_dbg(xhci, "Not freeing device rings.\n");
3530                 /* Don't treat this as an error.  May change my mind later. */
3531                 ret = 0;
3532                 goto command_cleanup;
3533         case COMP_SUCCESS:
3534                 xhci_dbg(xhci, "Successful reset device command.\n");
3535                 break;
3536         default:
3537                 if (xhci_is_vendor_info_code(xhci, ret))
3538                         break;
3539                 xhci_warn(xhci, "Unknown completion code %u for "
3540                                 "reset device command.\n", ret);
3541                 ret = -EINVAL;
3542                 goto command_cleanup;
3543         }
3544
3545         /* Free up host controller endpoint resources */
3546         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3547                 spin_lock_irqsave(&xhci->lock, flags);
3548                 /* Don't delete the default control endpoint resources */
3549                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3550                 spin_unlock_irqrestore(&xhci->lock, flags);
3551         }
3552
3553         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3554         last_freed_endpoint = 1;
3555         for (i = 1; i < 31; ++i) {
3556                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3557
3558                 if (ep->ep_state & EP_HAS_STREAMS) {
3559                         xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3560                                         xhci_get_endpoint_address(i));
3561                         xhci_free_stream_info(xhci, ep->stream_info);
3562                         ep->stream_info = NULL;
3563                         ep->ep_state &= ~EP_HAS_STREAMS;
3564                 }
3565
3566                 if (ep->ring) {
3567                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3568                         last_freed_endpoint = i;
3569                 }
3570                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3571                         xhci_drop_ep_from_interval_table(xhci,
3572                                         &virt_dev->eps[i].bw_info,
3573                                         virt_dev->bw_table,
3574                                         udev,
3575                                         &virt_dev->eps[i],
3576                                         virt_dev->tt_info);
3577                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3578         }
3579         /* If necessary, update the number of active TTs on this root port */
3580         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3581
3582         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3583         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3584         ret = 0;
3585
3586 command_cleanup:
3587         xhci_free_command(xhci, reset_device_cmd);
3588         return ret;
3589 }
3590
3591 /*
3592  * At this point, the struct usb_device is about to go away, the device has
3593  * disconnected, and all traffic has been stopped and the endpoints have been
3594  * disabled.  Free any HC data structures associated with that device.
3595  */
3596 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3597 {
3598         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3599         struct xhci_virt_device *virt_dev;
3600         unsigned long flags;
3601         u32 state;
3602         int i, ret;
3603         struct xhci_command *command;
3604
3605         command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3606         if (!command)
3607                 return;
3608
3609 #ifndef CONFIG_USB_DEFAULT_PERSIST
3610         /*
3611          * We called pm_runtime_get_noresume when the device was attached.
3612          * Decrement the counter here to allow controller to runtime suspend
3613          * if no devices remain.
3614          */
3615         if (xhci->quirks & XHCI_RESET_ON_RESUME)
3616                 pm_runtime_put_noidle(hcd->self.controller);
3617 #endif
3618
3619         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3620         /* If the host is halted due to driver unload, we still need to free the
3621          * device.
3622          */
3623         if (ret <= 0 && ret != -ENODEV) {
3624                 kfree(command);
3625                 return;
3626         }
3627
3628         virt_dev = xhci->devs[udev->slot_id];
3629
3630         /* Stop any wayward timer functions (which may grab the lock) */
3631         for (i = 0; i < 31; ++i) {
3632                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3633                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3634         }
3635
3636         spin_lock_irqsave(&xhci->lock, flags);
3637         /* Don't disable the slot if the host controller is dead. */
3638         state = readl(&xhci->op_regs->status);
3639         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3640                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3641                 xhci_free_virt_device(xhci, udev->slot_id);
3642                 spin_unlock_irqrestore(&xhci->lock, flags);
3643                 kfree(command);
3644                 return;
3645         }
3646
3647         if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3648                                     udev->slot_id)) {
3649                 spin_unlock_irqrestore(&xhci->lock, flags);
3650                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3651                 return;
3652         }
3653         xhci_ring_cmd_db(xhci);
3654         spin_unlock_irqrestore(&xhci->lock, flags);
3655
3656         /*
3657          * Event command completion handler will free any data structures
3658          * associated with the slot.  XXX Can free sleep?
3659          */
3660 }
3661
3662 /*
3663  * Checks if we have enough host controller resources for the default control
3664  * endpoint.
3665  *
3666  * Must be called with xhci->lock held.
3667  */
3668 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3669 {
3670         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3671                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3672                                 "Not enough ep ctxs: "
3673                                 "%u active, need to add 1, limit is %u.",
3674                                 xhci->num_active_eps, xhci->limit_active_eps);
3675                 return -ENOMEM;
3676         }
3677         xhci->num_active_eps += 1;
3678         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3679                         "Adding 1 ep ctx, %u now active.",
3680                         xhci->num_active_eps);
3681         return 0;
3682 }
3683
3684
3685 /*
3686  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3687  * timed out, or allocating memory failed.  Returns 1 on success.
3688  */
3689 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3690 {
3691         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3692         unsigned long flags;
3693         int ret, slot_id;
3694         struct xhci_command *command;
3695
3696         command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3697         if (!command)
3698                 return 0;
3699
3700         /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3701         mutex_lock(&xhci->mutex);
3702         spin_lock_irqsave(&xhci->lock, flags);
3703         command->completion = &xhci->addr_dev;
3704         ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3705         if (ret) {
3706                 spin_unlock_irqrestore(&xhci->lock, flags);
3707                 mutex_unlock(&xhci->mutex);
3708                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3709                 kfree(command);
3710                 return 0;
3711         }
3712         xhci_ring_cmd_db(xhci);
3713         spin_unlock_irqrestore(&xhci->lock, flags);
3714
3715         wait_for_completion(command->completion);
3716         slot_id = xhci->slot_id;
3717         mutex_unlock(&xhci->mutex);
3718
3719         if (!slot_id || command->status != COMP_SUCCESS) {
3720                 xhci_err(xhci, "Error while assigning device slot ID\n");
3721                 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3722                                 HCS_MAX_SLOTS(
3723                                         readl(&xhci->cap_regs->hcs_params1)));
3724                 kfree(command);
3725                 return 0;
3726         }
3727
3728         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3729                 spin_lock_irqsave(&xhci->lock, flags);
3730                 ret = xhci_reserve_host_control_ep_resources(xhci);
3731                 if (ret) {
3732                         spin_unlock_irqrestore(&xhci->lock, flags);
3733                         xhci_warn(xhci, "Not enough host resources, "
3734                                         "active endpoint contexts = %u\n",
3735                                         xhci->num_active_eps);
3736                         goto disable_slot;
3737                 }
3738                 spin_unlock_irqrestore(&xhci->lock, flags);
3739         }
3740         /* Use GFP_NOIO, since this function can be called from
3741          * xhci_discover_or_reset_device(), which may be called as part of
3742          * mass storage driver error handling.
3743          */
3744         if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3745                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3746                 goto disable_slot;
3747         }
3748         udev->slot_id = slot_id;
3749
3750 #ifndef CONFIG_USB_DEFAULT_PERSIST
3751         /*
3752          * If resetting upon resume, we can't put the controller into runtime
3753          * suspend if there is a device attached.
3754          */
3755         if (xhci->quirks & XHCI_RESET_ON_RESUME)
3756                 pm_runtime_get_noresume(hcd->self.controller);
3757 #endif
3758
3759
3760         kfree(command);
3761         /* Is this a LS or FS device under a HS hub? */
3762         /* Hub or peripherial? */
3763         return 1;
3764
3765 disable_slot:
3766         /* Disable slot, if we can do it without mem alloc */
3767         spin_lock_irqsave(&xhci->lock, flags);
3768         command->completion = NULL;
3769         command->status = 0;
3770         if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3771                                      udev->slot_id))
3772                 xhci_ring_cmd_db(xhci);
3773         spin_unlock_irqrestore(&xhci->lock, flags);
3774         return 0;
3775 }
3776
3777 /*
3778  * Issue an Address Device command and optionally send a corresponding
3779  * SetAddress request to the device.
3780  */
3781 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3782                              enum xhci_setup_dev setup)
3783 {
3784         const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3785         unsigned long flags;
3786         struct xhci_virt_device *virt_dev;
3787         int ret = 0;
3788         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3789         struct xhci_slot_ctx *slot_ctx;
3790         struct xhci_input_control_ctx *ctrl_ctx;
3791         u64 temp_64;
3792         struct xhci_command *command = NULL;
3793
3794         mutex_lock(&xhci->mutex);
3795
3796         if (!udev->slot_id) {
3797                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3798                                 "Bad Slot ID %d", udev->slot_id);
3799                 ret = -EINVAL;
3800                 goto out;
3801         }
3802
3803         virt_dev = xhci->devs[udev->slot_id];
3804
3805         if (WARN_ON(!virt_dev)) {
3806                 /*
3807                  * In plug/unplug torture test with an NEC controller,
3808                  * a zero-dereference was observed once due to virt_dev = 0.
3809                  * Print useful debug rather than crash if it is observed again!
3810                  */
3811                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3812                         udev->slot_id);
3813                 ret = -EINVAL;
3814                 goto out;
3815         }
3816
3817         if (setup == SETUP_CONTEXT_ONLY) {
3818                 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3819                 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3820                     SLOT_STATE_DEFAULT) {
3821                         xhci_dbg(xhci, "Slot already in default state\n");
3822                         goto out;
3823                 }
3824         }
3825
3826         command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3827         if (!command) {
3828                 ret = -ENOMEM;
3829                 goto out;
3830         }
3831
3832         command->in_ctx = virt_dev->in_ctx;
3833         command->completion = &xhci->addr_dev;
3834
3835         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3836         ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3837         if (!ctrl_ctx) {
3838                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3839                                 __func__);
3840                 ret = -EINVAL;
3841                 goto out;
3842         }
3843         /*
3844          * If this is the first Set Address since device plug-in or
3845          * virt_device realloaction after a resume with an xHCI power loss,
3846          * then set up the slot context.
3847          */
3848         if (!slot_ctx->dev_info)
3849                 xhci_setup_addressable_virt_dev(xhci, udev);
3850         /* Otherwise, update the control endpoint ring enqueue pointer. */
3851         else
3852                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3853         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3854         ctrl_ctx->drop_flags = 0;
3855
3856         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3857         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3858         trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3859                                 le32_to_cpu(slot_ctx->dev_info) >> 27);
3860
3861         spin_lock_irqsave(&xhci->lock, flags);
3862         ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3863                                         udev->slot_id, setup);
3864         if (ret) {
3865                 spin_unlock_irqrestore(&xhci->lock, flags);
3866                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3867                                 "FIXME: allocate a command ring segment");
3868                 goto out;
3869         }
3870         xhci_ring_cmd_db(xhci);
3871         spin_unlock_irqrestore(&xhci->lock, flags);
3872
3873         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3874         wait_for_completion(command->completion);
3875
3876         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3877          * the SetAddress() "recovery interval" required by USB and aborting the
3878          * command on a timeout.
3879          */
3880         switch (command->status) {
3881         case COMP_CMD_ABORT:
3882         case COMP_CMD_STOP:
3883                 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3884                 ret = -ETIME;
3885                 break;
3886         case COMP_CTX_STATE:
3887         case COMP_EBADSLT:
3888                 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3889                          act, udev->slot_id);
3890                 ret = -EINVAL;
3891                 break;
3892         case COMP_TX_ERR:
3893                 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3894                 ret = -EPROTO;
3895                 break;
3896         case COMP_DEV_ERR:
3897                 dev_warn(&udev->dev,
3898                          "ERROR: Incompatible device for setup %s command\n", act);
3899                 ret = -ENODEV;
3900                 break;
3901         case COMP_SUCCESS:
3902                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3903                                "Successful setup %s command", act);
3904                 break;
3905         default:
3906                 xhci_err(xhci,
3907                          "ERROR: unexpected setup %s command completion code 0x%x.\n",
3908                          act, command->status);
3909                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3910                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3911                 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3912                 ret = -EINVAL;
3913                 break;
3914         }
3915         if (ret)
3916                 goto out;
3917         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3918         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3919                         "Op regs DCBAA ptr = %#016llx", temp_64);
3920         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3921                 "Slot ID %d dcbaa entry @%p = %#016llx",
3922                 udev->slot_id,
3923                 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3924                 (unsigned long long)
3925                 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3926         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3927                         "Output Context DMA address = %#08llx",
3928                         (unsigned long long)virt_dev->out_ctx->dma);
3929         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3930         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3931         trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3932                                 le32_to_cpu(slot_ctx->dev_info) >> 27);
3933         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3934         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3935         /*
3936          * USB core uses address 1 for the roothubs, so we add one to the
3937          * address given back to us by the HC.
3938          */
3939         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3940         trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3941                                 le32_to_cpu(slot_ctx->dev_info) >> 27);
3942         /* Zero the input context control for later use */
3943         ctrl_ctx->add_flags = 0;
3944         ctrl_ctx->drop_flags = 0;
3945
3946         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3947                        "Internal device address = %d",
3948                        le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3949 out:
3950         mutex_unlock(&xhci->mutex);
3951         kfree(command);
3952         return ret;
3953 }
3954
3955 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3956 {
3957         return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3958 }
3959
3960 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3961 {
3962         return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3963 }
3964
3965 /*
3966  * Transfer the port index into real index in the HW port status
3967  * registers. Caculate offset between the port's PORTSC register
3968  * and port status base. Divide the number of per port register
3969  * to get the real index. The raw port number bases 1.
3970  */
3971 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3972 {
3973         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3974         __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3975         __le32 __iomem *addr;
3976         int raw_port;
3977
3978         if (hcd->speed != HCD_USB3)
3979                 addr = xhci->usb2_ports[port1 - 1];
3980         else
3981                 addr = xhci->usb3_ports[port1 - 1];
3982
3983         raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3984         return raw_port;
3985 }
3986
3987 /*
3988  * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3989  * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
3990  */
3991 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3992                         struct usb_device *udev, u16 max_exit_latency)
3993 {
3994         struct xhci_virt_device *virt_dev;
3995         struct xhci_command *command;
3996         struct xhci_input_control_ctx *ctrl_ctx;
3997         struct xhci_slot_ctx *slot_ctx;
3998         unsigned long flags;
3999         int ret;
4000
4001         spin_lock_irqsave(&xhci->lock, flags);
4002
4003         virt_dev = xhci->devs[udev->slot_id];
4004
4005         /*
4006          * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
4007          * xHC was re-initialized. Exit latency will be set later after
4008          * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4009          */
4010
4011         if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
4012                 spin_unlock_irqrestore(&xhci->lock, flags);
4013                 return 0;
4014         }
4015
4016         /* Attempt to issue an Evaluate Context command to change the MEL. */
4017         command = xhci->lpm_command;
4018         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
4019         if (!ctrl_ctx) {
4020                 spin_unlock_irqrestore(&xhci->lock, flags);
4021                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4022                                 __func__);
4023                 return -ENOMEM;
4024         }
4025
4026         xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4027         spin_unlock_irqrestore(&xhci->lock, flags);
4028
4029         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4030         slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4031         slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4032         slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4033         slot_ctx->dev_state = 0;
4034
4035         xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4036                         "Set up evaluate context for LPM MEL change.");
4037         xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4038         xhci_dbg_ctx(xhci, command->in_ctx, 0);
4039
4040         /* Issue and wait for the evaluate context command. */
4041         ret = xhci_configure_endpoint(xhci, udev, command,
4042                         true, true);
4043         xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4044         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4045
4046         if (!ret) {
4047                 spin_lock_irqsave(&xhci->lock, flags);
4048                 virt_dev->current_mel = max_exit_latency;
4049                 spin_unlock_irqrestore(&xhci->lock, flags);
4050         }
4051         return ret;
4052 }
4053
4054 #ifdef CONFIG_PM
4055
4056 /* BESL to HIRD Encoding array for USB2 LPM */
4057 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4058         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4059
4060 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4061 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4062                                         struct usb_device *udev)
4063 {
4064         int u2del, besl, besl_host;
4065         int besl_device = 0;
4066         u32 field;
4067
4068         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4069         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4070
4071         if (field & USB_BESL_SUPPORT) {
4072                 for (besl_host = 0; besl_host < 16; besl_host++) {
4073                         if (xhci_besl_encoding[besl_host] >= u2del)
4074                                 break;
4075                 }
4076                 /* Use baseline BESL value as default */
4077                 if (field & USB_BESL_BASELINE_VALID)
4078                         besl_device = USB_GET_BESL_BASELINE(field);
4079                 else if (field & USB_BESL_DEEP_VALID)
4080                         besl_device = USB_GET_BESL_DEEP(field);
4081         } else {
4082                 if (u2del <= 50)
4083                         besl_host = 0;
4084                 else
4085                         besl_host = (u2del - 51) / 75 + 1;
4086         }
4087
4088         besl = besl_host + besl_device;
4089         if (besl > 15)
4090                 besl = 15;
4091
4092         return besl;
4093 }
4094
4095 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4096 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4097 {
4098         u32 field;
4099         int l1;
4100         int besld = 0;
4101         int hirdm = 0;
4102
4103         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4104
4105         /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4106         l1 = udev->l1_params.timeout / 256;
4107
4108         /* device has preferred BESLD */
4109         if (field & USB_BESL_DEEP_VALID) {
4110                 besld = USB_GET_BESL_DEEP(field);
4111                 hirdm = 1;
4112         }
4113
4114         return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4115 }
4116
4117 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4118                         struct usb_device *udev, int enable)
4119 {
4120         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4121         __le32 __iomem  **port_array;
4122         __le32 __iomem  *pm_addr, *hlpm_addr;
4123         u32             pm_val, hlpm_val, field;
4124         unsigned int    port_num;
4125         unsigned long   flags;
4126         int             hird, exit_latency;
4127         int             ret;
4128
4129         if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4130                         !udev->lpm_capable)
4131                 return -EPERM;
4132
4133         if (!udev->parent || udev->parent->parent ||
4134                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4135                 return -EPERM;
4136
4137         if (udev->usb2_hw_lpm_capable != 1)
4138                 return -EPERM;
4139
4140         spin_lock_irqsave(&xhci->lock, flags);
4141
4142         port_array = xhci->usb2_ports;
4143         port_num = udev->portnum - 1;
4144         pm_addr = port_array[port_num] + PORTPMSC;
4145         pm_val = readl(pm_addr);
4146         hlpm_addr = port_array[port_num] + PORTHLPMC;
4147         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4148
4149         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4150                         enable ? "enable" : "disable", port_num + 1);
4151
4152         if (enable) {
4153                 /* Host supports BESL timeout instead of HIRD */
4154                 if (udev->usb2_hw_lpm_besl_capable) {
4155                         /* if device doesn't have a preferred BESL value use a
4156                          * default one which works with mixed HIRD and BESL
4157                          * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4158                          */
4159                         if ((field & USB_BESL_SUPPORT) &&
4160                             (field & USB_BESL_BASELINE_VALID))
4161                                 hird = USB_GET_BESL_BASELINE(field);
4162                         else
4163                                 hird = udev->l1_params.besl;
4164
4165                         exit_latency = xhci_besl_encoding[hird];
4166                         spin_unlock_irqrestore(&xhci->lock, flags);
4167
4168                         /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4169                          * input context for link powermanagement evaluate
4170                          * context commands. It is protected by hcd->bandwidth
4171                          * mutex and is shared by all devices. We need to set
4172                          * the max ext latency in USB 2 BESL LPM as well, so
4173                          * use the same mutex and xhci_change_max_exit_latency()
4174                          */
4175                         mutex_lock(hcd->bandwidth_mutex);
4176                         ret = xhci_change_max_exit_latency(xhci, udev,
4177                                                            exit_latency);
4178                         mutex_unlock(hcd->bandwidth_mutex);
4179
4180                         if (ret < 0)
4181                                 return ret;
4182                         spin_lock_irqsave(&xhci->lock, flags);
4183
4184                         hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4185                         writel(hlpm_val, hlpm_addr);
4186                         /* flush write */
4187                         readl(hlpm_addr);
4188                 } else {
4189                         hird = xhci_calculate_hird_besl(xhci, udev);
4190                 }
4191
4192                 pm_val &= ~PORT_HIRD_MASK;
4193                 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4194                 writel(pm_val, pm_addr);
4195                 pm_val = readl(pm_addr);
4196                 pm_val |= PORT_HLE;
4197                 writel(pm_val, pm_addr);
4198                 /* flush write */
4199                 readl(pm_addr);
4200         } else {
4201                 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4202                 writel(pm_val, pm_addr);
4203                 /* flush write */
4204                 readl(pm_addr);
4205                 if (udev->usb2_hw_lpm_besl_capable) {
4206                         spin_unlock_irqrestore(&xhci->lock, flags);
4207                         mutex_lock(hcd->bandwidth_mutex);
4208                         xhci_change_max_exit_latency(xhci, udev, 0);
4209                         mutex_unlock(hcd->bandwidth_mutex);
4210                         return 0;
4211                 }
4212         }
4213
4214         spin_unlock_irqrestore(&xhci->lock, flags);
4215         return 0;
4216 }
4217
4218 /* check if a usb2 port supports a given extened capability protocol
4219  * only USB2 ports extended protocol capability values are cached.
4220  * Return 1 if capability is supported
4221  */
4222 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4223                                            unsigned capability)
4224 {
4225         u32 port_offset, port_count;
4226         int i;
4227
4228         for (i = 0; i < xhci->num_ext_caps; i++) {
4229                 if (xhci->ext_caps[i] & capability) {
4230                         /* port offsets starts at 1 */
4231                         port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4232                         port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4233                         if (port >= port_offset &&
4234                             port < port_offset + port_count)
4235                                 return 1;
4236                 }
4237         }
4238         return 0;
4239 }
4240
4241 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4242 {
4243         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4244         int             portnum = udev->portnum - 1;
4245
4246         if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4247                         !udev->lpm_capable)
4248                 return 0;
4249
4250         /* we only support lpm for non-hub device connected to root hub yet */
4251         if (!udev->parent || udev->parent->parent ||
4252                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4253                 return 0;
4254
4255         if (xhci->hw_lpm_support == 1 &&
4256                         xhci_check_usb2_port_capability(
4257                                 xhci, portnum, XHCI_HLC)) {
4258                 udev->usb2_hw_lpm_capable = 1;
4259                 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4260                 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4261                 if (xhci_check_usb2_port_capability(xhci, portnum,
4262                                         XHCI_BLC))
4263                         udev->usb2_hw_lpm_besl_capable = 1;
4264         }
4265
4266         return 0;
4267 }
4268
4269 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4270
4271 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4272 static unsigned long long xhci_service_interval_to_ns(
4273                 struct usb_endpoint_descriptor *desc)
4274 {
4275         return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4276 }
4277
4278 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4279                 enum usb3_link_state state)
4280 {
4281         unsigned long long sel;
4282         unsigned long long pel;
4283         unsigned int max_sel_pel;
4284         char *state_name;
4285
4286         switch (state) {
4287         case USB3_LPM_U1:
4288                 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4289                 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4290                 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4291                 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4292                 state_name = "U1";
4293                 break;
4294         case USB3_LPM_U2:
4295                 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4296                 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4297                 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4298                 state_name = "U2";
4299                 break;
4300         default:
4301                 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4302                                 __func__);
4303                 return USB3_LPM_DISABLED;
4304         }
4305
4306         if (sel <= max_sel_pel && pel <= max_sel_pel)
4307                 return USB3_LPM_DEVICE_INITIATED;
4308
4309         if (sel > max_sel_pel)
4310                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4311                                 "due to long SEL %llu ms\n",
4312                                 state_name, sel);
4313         else
4314                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4315                                 "due to long PEL %llu ms\n",
4316                                 state_name, pel);
4317         return USB3_LPM_DISABLED;
4318 }
4319
4320 /* The U1 timeout should be the maximum of the following values:
4321  *  - For control endpoints, U1 system exit latency (SEL) * 3
4322  *  - For bulk endpoints, U1 SEL * 5
4323  *  - For interrupt endpoints:
4324  *    - Notification EPs, U1 SEL * 3
4325  *    - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4326  *  - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4327  */
4328 static unsigned long long xhci_calculate_intel_u1_timeout(
4329                 struct usb_device *udev,
4330                 struct usb_endpoint_descriptor *desc)
4331 {
4332         unsigned long long timeout_ns;
4333         int ep_type;
4334         int intr_type;
4335
4336         ep_type = usb_endpoint_type(desc);
4337         switch (ep_type) {
4338         case USB_ENDPOINT_XFER_CONTROL:
4339                 timeout_ns = udev->u1_params.sel * 3;
4340                 break;
4341         case USB_ENDPOINT_XFER_BULK:
4342                 timeout_ns = udev->u1_params.sel * 5;
4343                 break;
4344         case USB_ENDPOINT_XFER_INT:
4345                 intr_type = usb_endpoint_interrupt_type(desc);
4346                 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4347                         timeout_ns = udev->u1_params.sel * 3;
4348                         break;
4349                 }
4350                 /* Otherwise the calculation is the same as isoc eps */
4351         case USB_ENDPOINT_XFER_ISOC:
4352                 timeout_ns = xhci_service_interval_to_ns(desc);
4353                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4354                 if (timeout_ns < udev->u1_params.sel * 2)
4355                         timeout_ns = udev->u1_params.sel * 2;
4356                 break;
4357         default:
4358                 return 0;
4359         }
4360
4361         return timeout_ns;
4362 }
4363
4364 /* Returns the hub-encoded U1 timeout value. */
4365 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4366                 struct usb_device *udev,
4367                 struct usb_endpoint_descriptor *desc)
4368 {
4369         unsigned long long timeout_ns;
4370
4371         if (xhci->quirks & XHCI_INTEL_HOST)
4372                 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4373         else
4374                 timeout_ns = udev->u1_params.sel;
4375
4376         /* The U1 timeout is encoded in 1us intervals.
4377          * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4378          */
4379         if (timeout_ns == USB3_LPM_DISABLED)
4380                 timeout_ns = 1;
4381         else
4382                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4383
4384         /* If the necessary timeout value is bigger than what we can set in the
4385          * USB 3.0 hub, we have to disable hub-initiated U1.
4386          */
4387         if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4388                 return timeout_ns;
4389         dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4390                         "due to long timeout %llu ms\n", timeout_ns);
4391         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4392 }
4393
4394 /* The U2 timeout should be the maximum of:
4395  *  - 10 ms (to avoid the bandwidth impact on the scheduler)
4396  *  - largest bInterval of any active periodic endpoint (to avoid going
4397  *    into lower power link states between intervals).
4398  *  - the U2 Exit Latency of the device
4399  */
4400 static unsigned long long xhci_calculate_intel_u2_timeout(
4401                 struct usb_device *udev,
4402                 struct usb_endpoint_descriptor *desc)
4403 {
4404         unsigned long long timeout_ns;
4405         unsigned long long u2_del_ns;
4406
4407         timeout_ns = 10 * 1000 * 1000;
4408
4409         if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4410                         (xhci_service_interval_to_ns(desc) > timeout_ns))
4411                 timeout_ns = xhci_service_interval_to_ns(desc);
4412
4413         u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4414         if (u2_del_ns > timeout_ns)
4415                 timeout_ns = u2_del_ns;
4416
4417         return timeout_ns;
4418 }
4419
4420 /* Returns the hub-encoded U2 timeout value. */
4421 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4422                 struct usb_device *udev,
4423                 struct usb_endpoint_descriptor *desc)
4424 {
4425         unsigned long long timeout_ns;
4426
4427         if (xhci->quirks & XHCI_INTEL_HOST)
4428                 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4429         else
4430                 timeout_ns = udev->u2_params.sel;
4431
4432         /* The U2 timeout is encoded in 256us intervals */
4433         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4434         /* If the necessary timeout value is bigger than what we can set in the
4435          * USB 3.0 hub, we have to disable hub-initiated U2.
4436          */
4437         if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4438                 return timeout_ns;
4439         dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4440                         "due to long timeout %llu ms\n", timeout_ns);
4441         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4442 }
4443
4444 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4445                 struct usb_device *udev,
4446                 struct usb_endpoint_descriptor *desc,
4447                 enum usb3_link_state state,
4448                 u16 *timeout)
4449 {
4450         if (state == USB3_LPM_U1)
4451                 return xhci_calculate_u1_timeout(xhci, udev, desc);
4452         else if (state == USB3_LPM_U2)
4453                 return xhci_calculate_u2_timeout(xhci, udev, desc);
4454
4455         return USB3_LPM_DISABLED;
4456 }
4457
4458 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4459                 struct usb_device *udev,
4460                 struct usb_endpoint_descriptor *desc,
4461                 enum usb3_link_state state,
4462                 u16 *timeout)
4463 {
4464         u16 alt_timeout;
4465
4466         alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4467                 desc, state, timeout);
4468
4469         /* If we found we can't enable hub-initiated LPM, or
4470          * the U1 or U2 exit latency was too high to allow
4471          * device-initiated LPM as well, just stop searching.
4472          */
4473         if (alt_timeout == USB3_LPM_DISABLED ||
4474                         alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4475                 *timeout = alt_timeout;
4476                 return -E2BIG;
4477         }
4478         if (alt_timeout > *timeout)
4479                 *timeout = alt_timeout;
4480         return 0;
4481 }
4482
4483 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4484                 struct usb_device *udev,
4485                 struct usb_host_interface *alt,
4486                 enum usb3_link_state state,
4487                 u16 *timeout)
4488 {
4489         int j;
4490
4491         for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4492                 if (xhci_update_timeout_for_endpoint(xhci, udev,
4493                                         &alt->endpoint[j].desc, state, timeout))
4494                         return -E2BIG;
4495                 continue;
4496         }
4497         return 0;
4498 }
4499
4500 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4501                 enum usb3_link_state state)
4502 {
4503         struct usb_device *parent;
4504         unsigned int num_hubs;
4505
4506         if (state == USB3_LPM_U2)
4507                 return 0;
4508
4509         /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4510         for (parent = udev->parent, num_hubs = 0; parent->parent;
4511                         parent = parent->parent)
4512                 num_hubs++;
4513
4514         if (num_hubs < 2)
4515                 return 0;
4516
4517         dev_dbg(&udev->dev, "Disabling U1 link state for device"
4518                         " below second-tier hub.\n");
4519         dev_dbg(&udev->dev, "Plug device into first-tier hub "
4520                         "to decrease power consumption.\n");
4521         return -E2BIG;
4522 }
4523
4524 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4525                 struct usb_device *udev,
4526                 enum usb3_link_state state)
4527 {
4528         if (xhci->quirks & XHCI_INTEL_HOST)
4529                 return xhci_check_intel_tier_policy(udev, state);
4530         else
4531                 return 0;
4532 }
4533
4534 /* Returns the U1 or U2 timeout that should be enabled.
4535  * If the tier check or timeout setting functions return with a non-zero exit
4536  * code, that means the timeout value has been finalized and we shouldn't look
4537  * at any more endpoints.
4538  */
4539 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4540                         struct usb_device *udev, enum usb3_link_state state)
4541 {
4542         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4543         struct usb_host_config *config;
4544         char *state_name;
4545         int i;
4546         u16 timeout = USB3_LPM_DISABLED;
4547
4548         if (state == USB3_LPM_U1)
4549                 state_name = "U1";
4550         else if (state == USB3_LPM_U2)
4551                 state_name = "U2";
4552         else {
4553                 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4554                                 state);
4555                 return timeout;
4556         }
4557
4558         if (xhci_check_tier_policy(xhci, udev, state) < 0)
4559                 return timeout;
4560
4561         /* Gather some information about the currently installed configuration
4562          * and alternate interface settings.
4563          */
4564         if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4565                         state, &timeout))
4566                 return timeout;
4567
4568         config = udev->actconfig;
4569         if (!config)
4570                 return timeout;
4571
4572         for (i = 0; i < config->desc.bNumInterfaces; i++) {
4573                 struct usb_driver *driver;
4574                 struct usb_interface *intf = config->interface[i];
4575
4576                 if (!intf)
4577                         continue;
4578
4579                 /* Check if any currently bound drivers want hub-initiated LPM
4580                  * disabled.
4581                  */
4582                 if (intf->dev.driver) {
4583                         driver = to_usb_driver(intf->dev.driver);
4584                         if (driver && driver->disable_hub_initiated_lpm) {
4585                                 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4586                                                 "at request of driver %s\n",
4587                                                 state_name, driver->name);
4588                                 return xhci_get_timeout_no_hub_lpm(udev, state);
4589                         }
4590                 }
4591
4592                 /* Not sure how this could happen... */
4593                 if (!intf->cur_altsetting)
4594                         continue;
4595
4596                 if (xhci_update_timeout_for_interface(xhci, udev,
4597                                         intf->cur_altsetting,
4598                                         state, &timeout))
4599                         return timeout;
4600         }
4601         return timeout;
4602 }
4603
4604 static int calculate_max_exit_latency(struct usb_device *udev,
4605                 enum usb3_link_state state_changed,
4606                 u16 hub_encoded_timeout)
4607 {
4608         unsigned long long u1_mel_us = 0;
4609         unsigned long long u2_mel_us = 0;
4610         unsigned long long mel_us = 0;
4611         bool disabling_u1;
4612         bool disabling_u2;
4613         bool enabling_u1;
4614         bool enabling_u2;
4615
4616         disabling_u1 = (state_changed == USB3_LPM_U1 &&
4617                         hub_encoded_timeout == USB3_LPM_DISABLED);
4618         disabling_u2 = (state_changed == USB3_LPM_U2 &&
4619                         hub_encoded_timeout == USB3_LPM_DISABLED);
4620
4621         enabling_u1 = (state_changed == USB3_LPM_U1 &&
4622                         hub_encoded_timeout != USB3_LPM_DISABLED);
4623         enabling_u2 = (state_changed == USB3_LPM_U2 &&
4624                         hub_encoded_timeout != USB3_LPM_DISABLED);
4625
4626         /* If U1 was already enabled and we're not disabling it,
4627          * or we're going to enable U1, account for the U1 max exit latency.
4628          */
4629         if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4630                         enabling_u1)
4631                 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4632         if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4633                         enabling_u2)
4634                 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4635
4636         if (u1_mel_us > u2_mel_us)
4637                 mel_us = u1_mel_us;
4638         else
4639                 mel_us = u2_mel_us;
4640         /* xHCI host controller max exit latency field is only 16 bits wide. */
4641         if (mel_us > MAX_EXIT) {
4642                 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4643                                 "is too big.\n", mel_us);
4644                 return -E2BIG;
4645         }
4646         return mel_us;
4647 }
4648
4649 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4650 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4651                         struct usb_device *udev, enum usb3_link_state state)
4652 {
4653         struct xhci_hcd *xhci;
4654         u16 hub_encoded_timeout;
4655         int mel;
4656         int ret;
4657
4658         xhci = hcd_to_xhci(hcd);
4659         /* The LPM timeout values are pretty host-controller specific, so don't
4660          * enable hub-initiated timeouts unless the vendor has provided
4661          * information about their timeout algorithm.
4662          */
4663         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4664                         !xhci->devs[udev->slot_id])
4665                 return USB3_LPM_DISABLED;
4666
4667         hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4668         mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4669         if (mel < 0) {
4670                 /* Max Exit Latency is too big, disable LPM. */
4671                 hub_encoded_timeout = USB3_LPM_DISABLED;
4672                 mel = 0;
4673         }
4674
4675         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4676         if (ret)
4677                 return ret;
4678         return hub_encoded_timeout;
4679 }
4680
4681 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4682                         struct usb_device *udev, enum usb3_link_state state)
4683 {
4684         struct xhci_hcd *xhci;
4685         u16 mel;
4686
4687         xhci = hcd_to_xhci(hcd);
4688         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4689                         !xhci->devs[udev->slot_id])
4690                 return 0;
4691
4692         mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4693         return xhci_change_max_exit_latency(xhci, udev, mel);
4694 }
4695 #else /* CONFIG_PM */
4696
4697 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4698                                 struct usb_device *udev, int enable)
4699 {
4700         return 0;
4701 }
4702
4703 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4704 {
4705         return 0;
4706 }
4707
4708 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4709                         struct usb_device *udev, enum usb3_link_state state)
4710 {
4711         return USB3_LPM_DISABLED;
4712 }
4713
4714 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4715                         struct usb_device *udev, enum usb3_link_state state)
4716 {
4717         return 0;
4718 }
4719 #endif  /* CONFIG_PM */
4720
4721 /*-------------------------------------------------------------------------*/
4722
4723 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4724  * internal data structures for the device.
4725  */
4726 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4727                         struct usb_tt *tt, gfp_t mem_flags)
4728 {
4729         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4730         struct xhci_virt_device *vdev;
4731         struct xhci_command *config_cmd;
4732         struct xhci_input_control_ctx *ctrl_ctx;
4733         struct xhci_slot_ctx *slot_ctx;
4734         unsigned long flags;
4735         unsigned think_time;
4736         int ret;
4737
4738         /* Ignore root hubs */
4739         if (!hdev->parent)
4740                 return 0;
4741
4742         vdev = xhci->devs[hdev->slot_id];
4743         if (!vdev) {
4744                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4745                 return -EINVAL;
4746         }
4747         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4748         if (!config_cmd) {
4749                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4750                 return -ENOMEM;
4751         }
4752         ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4753         if (!ctrl_ctx) {
4754                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4755                                 __func__);
4756                 xhci_free_command(xhci, config_cmd);
4757                 return -ENOMEM;
4758         }
4759
4760         spin_lock_irqsave(&xhci->lock, flags);
4761         if (hdev->speed == USB_SPEED_HIGH &&
4762                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4763                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4764                 xhci_free_command(xhci, config_cmd);
4765                 spin_unlock_irqrestore(&xhci->lock, flags);
4766                 return -ENOMEM;
4767         }
4768
4769         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4770         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4771         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4772         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4773         if (tt->multi)
4774                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4775         if (xhci->hci_version > 0x95) {
4776                 xhci_dbg(xhci, "xHCI version %x needs hub "
4777                                 "TT think time and number of ports\n",
4778                                 (unsigned int) xhci->hci_version);
4779                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4780                 /* Set TT think time - convert from ns to FS bit times.
4781                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
4782                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
4783                  *
4784                  * xHCI 1.0: this field shall be 0 if the device is not a
4785                  * High-spped hub.
4786                  */
4787                 think_time = tt->think_time;
4788                 if (think_time != 0)
4789                         think_time = (think_time / 666) - 1;
4790                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4791                         slot_ctx->tt_info |=
4792                                 cpu_to_le32(TT_THINK_TIME(think_time));
4793         } else {
4794                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4795                                 "TT think time or number of ports\n",
4796                                 (unsigned int) xhci->hci_version);
4797         }
4798         slot_ctx->dev_state = 0;
4799         spin_unlock_irqrestore(&xhci->lock, flags);
4800
4801         xhci_dbg(xhci, "Set up %s for hub device.\n",
4802                         (xhci->hci_version > 0x95) ?
4803                         "configure endpoint" : "evaluate context");
4804         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4805         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4806
4807         /* Issue and wait for the configure endpoint or
4808          * evaluate context command.
4809          */
4810         if (xhci->hci_version > 0x95)
4811                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4812                                 false, false);
4813         else
4814                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4815                                 true, false);
4816
4817         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4818         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4819
4820         xhci_free_command(xhci, config_cmd);
4821         return ret;
4822 }
4823
4824 int xhci_get_frame(struct usb_hcd *hcd)
4825 {
4826         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4827         /* EHCI mods by the periodic size.  Why? */
4828         return readl(&xhci->run_regs->microframe_index) >> 3;
4829 }
4830
4831 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4832 {
4833         struct xhci_hcd         *xhci;
4834         struct device           *dev = hcd->self.controller;
4835         int                     retval;
4836
4837         /* Accept arbitrarily long scatter-gather lists */
4838         hcd->self.sg_tablesize = ~0;
4839
4840         /* support to build packet from discontinuous buffers */
4841         hcd->self.no_sg_constraint = 1;
4842
4843         /* XHCI controllers don't stop the ep queue on short packets :| */
4844         hcd->self.no_stop_on_short = 1;
4845
4846         if (usb_hcd_is_primary_hcd(hcd)) {
4847                 xhci = hcd_to_xhci(hcd);
4848                 xhci->main_hcd = hcd;
4849                 /* Mark the first roothub as being USB 2.0.
4850                  * The xHCI driver will register the USB 3.0 roothub.
4851                  */
4852                 hcd->speed = HCD_USB2;
4853                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4854                 /*
4855                  * USB 2.0 roothub under xHCI has an integrated TT,
4856                  * (rate matching hub) as opposed to having an OHCI/UHCI
4857                  * companion controller.
4858                  */
4859                 hcd->has_tt = 1;
4860         } else {
4861                 /* xHCI private pointer was set in xhci_pci_probe for the second
4862                  * registered roothub.
4863                  */
4864                 return 0;
4865         }
4866
4867         mutex_init(&xhci->mutex);
4868         xhci->cap_regs = hcd->regs;
4869         xhci->op_regs = hcd->regs +
4870                 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4871         xhci->run_regs = hcd->regs +
4872                 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4873         /* Cache read-only capability registers */
4874         xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4875         xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4876         xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4877         xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4878         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4879         xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4880         xhci_print_registers(xhci);
4881
4882         xhci->quirks = quirks;
4883
4884         get_quirks(dev, xhci);
4885
4886         /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4887          * success event after a short transfer. This quirk will ignore such
4888          * spurious event.
4889          */
4890         if (xhci->hci_version > 0x96)
4891                 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4892
4893         /* Make sure the HC is halted. */
4894         retval = xhci_halt(xhci);
4895         if (retval)
4896                 return retval;
4897
4898         xhci_dbg(xhci, "Resetting HCD\n");
4899         /* Reset the internal HC memory state and registers. */
4900         retval = xhci_reset(xhci);
4901         if (retval)
4902                 return retval;
4903         xhci_dbg(xhci, "Reset complete\n");
4904
4905         /* Set dma_mask and coherent_dma_mask to 64-bits,
4906          * if xHC supports 64-bit addressing */
4907         if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4908                         !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4909                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4910                 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4911         }
4912
4913         xhci_dbg(xhci, "Calling HCD init\n");
4914         /* Initialize HCD and host controller data structures. */
4915         retval = xhci_init(hcd);
4916         if (retval)
4917                 return retval;
4918         xhci_dbg(xhci, "Called HCD init\n");
4919
4920         xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4921                   xhci->hcc_params, xhci->hci_version, xhci->quirks);
4922
4923         return 0;
4924 }
4925 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4926
4927 static const struct hc_driver xhci_hc_driver = {
4928         .description =          "xhci-hcd",
4929         .product_desc =         "xHCI Host Controller",
4930         .hcd_priv_size =        sizeof(struct xhci_hcd *),
4931
4932         /*
4933          * generic hardware linkage
4934          */
4935         .irq =                  xhci_irq,
4936         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4937
4938         /*
4939          * basic lifecycle operations
4940          */
4941         .reset =                NULL, /* set in xhci_init_driver() */
4942         .start =                xhci_run,
4943         .stop =                 xhci_stop,
4944         .shutdown =             xhci_shutdown,
4945
4946         /*
4947          * managing i/o requests and associated device resources
4948          */
4949         .urb_enqueue =          xhci_urb_enqueue,
4950         .urb_dequeue =          xhci_urb_dequeue,
4951         .alloc_dev =            xhci_alloc_dev,
4952         .free_dev =             xhci_free_dev,
4953         .alloc_streams =        xhci_alloc_streams,
4954         .free_streams =         xhci_free_streams,
4955         .add_endpoint =         xhci_add_endpoint,
4956         .drop_endpoint =        xhci_drop_endpoint,
4957         .endpoint_reset =       xhci_endpoint_reset,
4958         .check_bandwidth =      xhci_check_bandwidth,
4959         .reset_bandwidth =      xhci_reset_bandwidth,
4960         .address_device =       xhci_address_device,
4961         .enable_device =        xhci_enable_device,
4962         .update_hub_device =    xhci_update_hub_device,
4963         .reset_device =         xhci_discover_or_reset_device,
4964
4965         /*
4966          * scheduling support
4967          */
4968         .get_frame_number =     xhci_get_frame,
4969
4970         /*
4971          * root hub support
4972          */
4973         .hub_control =          xhci_hub_control,
4974         .hub_status_data =      xhci_hub_status_data,
4975         .bus_suspend =          xhci_bus_suspend,
4976         .bus_resume =           xhci_bus_resume,
4977
4978         /*
4979          * call back when device connected and addressed
4980          */
4981         .update_device =        xhci_update_device,
4982         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
4983         .enable_usb3_lpm_timeout =      xhci_enable_usb3_lpm_timeout,
4984         .disable_usb3_lpm_timeout =     xhci_disable_usb3_lpm_timeout,
4985         .find_raw_port_number = xhci_find_raw_port_number,
4986 };
4987
4988 void xhci_init_driver(struct hc_driver *drv,
4989                       const struct xhci_driver_overrides *over)
4990 {
4991         BUG_ON(!over);
4992
4993         /* Copy the generic table to drv then apply the overrides */
4994         *drv = xhci_hc_driver;
4995
4996         if (over) {
4997                 drv->hcd_priv_size += over->extra_priv_size;
4998                 if (over->reset)
4999                         drv->reset = over->reset;
5000                 if (over->start)
5001                         drv->start = over->start;
5002         }
5003 }
5004 EXPORT_SYMBOL_GPL(xhci_init_driver);
5005
5006 MODULE_DESCRIPTION(DRIVER_DESC);
5007 MODULE_AUTHOR(DRIVER_AUTHOR);
5008 MODULE_LICENSE("GPL");
5009
5010 static int __init xhci_hcd_init(void)
5011 {
5012         /*
5013          * Check the compiler generated sizes of structures that must be laid
5014          * out in specific ways for hardware access.
5015          */
5016         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5017         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5018         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5019         /* xhci_device_control has eight fields, and also
5020          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5021          */
5022         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5023         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5024         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5025         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
5026         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5027         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5028         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5029         return 0;
5030 }
5031
5032 /*
5033  * If an init function is provided, an exit function must also be provided
5034  * to allow module unload.
5035  */
5036 static void __exit xhci_hcd_fini(void) { }
5037
5038 module_init(xhci_hcd_init);
5039 module_exit(xhci_hcd_fini);