]> git.kernelconcepts.de Git - karo-tx-linux.git/blob - drivers/video/sgivwfb.c
Merge Paulus' tree
[karo-tx-linux.git] / drivers / video / sgivwfb.c
1 /*
2  *  linux/drivers/video/sgivwfb.c -- SGI DBE frame buffer device
3  *
4  *      Copyright (C) 1999 Silicon Graphics, Inc.
5  *      Jeffrey Newquist, newquist@engr.sgi.som
6  *
7  *  This file is subject to the terms and conditions of the GNU General Public
8  *  License. See the file COPYING in the main directory of this archive for
9  *  more details.
10  */
11
12 #include <linux/config.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/mm.h>
16 #include <linux/errno.h>
17 #include <linux/delay.h>
18 #include <linux/fb.h>
19 #include <linux/init.h>
20 #include <linux/ioport.h>
21 #include <linux/platform_device.h>
22
23 #include <asm/io.h>
24 #include <asm/mtrr.h>
25
26 #define INCLUDE_TIMING_TABLE_DATA
27 #define DBE_REG_BASE par->regs
28 #include <video/sgivw.h>
29
30 struct sgivw_par {
31         struct asregs *regs;
32         u32 cmap_fifo;
33         u_long timing_num;
34 };
35
36 #define FLATPANEL_SGI_1600SW    5
37
38 /*
39  *  RAM we reserve for the frame buffer. This defines the maximum screen
40  *  size
41  *
42  *  The default can be overridden if the driver is compiled as a module
43  */
44
45 /* set by arch/i386/kernel/setup.c */
46 extern unsigned long sgivwfb_mem_phys;
47 extern unsigned long sgivwfb_mem_size;
48
49 static int ypan = 0;
50 static int ywrap = 0;
51
52 static int flatpanel_id = -1;
53
54 static struct fb_fix_screeninfo sgivwfb_fix __initdata = {
55         .id             = "SGI Vis WS FB",
56         .type           = FB_TYPE_PACKED_PIXELS,
57         .visual         = FB_VISUAL_PSEUDOCOLOR,
58         .mmio_start     = DBE_REG_PHYS,
59         .mmio_len       = DBE_REG_SIZE,
60         .accel          = FB_ACCEL_NONE,
61         .line_length    = 640,
62 };
63
64 static struct fb_var_screeninfo sgivwfb_var __initdata = {
65         /* 640x480, 8 bpp */
66         .xres           = 640,
67         .yres           = 480,
68         .xres_virtual   = 640,
69         .yres_virtual   = 480,
70         .bits_per_pixel = 8,
71         .red            = { 0, 8, 0 },
72         .green          = { 0, 8, 0 },
73         .blue           = { 0, 8, 0 },
74         .height         = -1,
75         .width          = -1,
76         .pixclock       = 20000,
77         .left_margin    = 64,
78         .right_margin   = 64,
79         .upper_margin   = 32,
80         .lower_margin   = 32,
81         .hsync_len      = 64,
82         .vsync_len      = 2,
83         .vmode          = FB_VMODE_NONINTERLACED
84 };
85
86 static struct fb_var_screeninfo sgivwfb_var1600sw __initdata = {
87         /* 1600x1024, 8 bpp */
88         .xres           = 1600,
89         .yres           = 1024,
90         .xres_virtual   = 1600,
91         .yres_virtual   = 1024,
92         .bits_per_pixel = 8,
93         .red            = { 0, 8, 0 },
94         .green          = { 0, 8, 0 },
95         .blue           = { 0, 8, 0 },
96         .height         = -1,
97         .width          = -1,
98         .pixclock       = 9353,
99         .left_margin    = 20,
100         .right_margin   = 30,
101         .upper_margin   = 37,
102         .lower_margin   = 3,
103         .hsync_len      = 20,
104         .vsync_len      = 3,
105         .vmode          = FB_VMODE_NONINTERLACED
106 };
107
108 /*
109  *  Interface used by the world
110  */
111 int sgivwfb_init(void);
112
113 static int sgivwfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
114 static int sgivwfb_set_par(struct fb_info *info);
115 static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
116                              u_int blue, u_int transp,
117                              struct fb_info *info);
118 static int sgivwfb_mmap(struct fb_info *info, struct file *file,
119                         struct vm_area_struct *vma);
120
121 static struct fb_ops sgivwfb_ops = {
122         .owner          = THIS_MODULE,
123         .fb_check_var   = sgivwfb_check_var,
124         .fb_set_par     = sgivwfb_set_par,
125         .fb_setcolreg   = sgivwfb_setcolreg,
126         .fb_fillrect    = cfb_fillrect,
127         .fb_copyarea    = cfb_copyarea,
128         .fb_imageblit   = cfb_imageblit,
129         .fb_cursor      = soft_cursor,
130         .fb_mmap        = sgivwfb_mmap,
131 };
132
133 /*
134  *  Internal routines
135  */
136 static unsigned long bytes_per_pixel(int bpp)
137 {
138         switch (bpp) {
139                 case 8:
140                         return 1;
141                 case 16:
142                         return 2;
143                 case 32:
144                         return 4;
145                 default:
146                         printk(KERN_INFO "sgivwfb: unsupported bpp %d\n", bpp);
147                         return 0;
148         }
149 }
150
151 static unsigned long get_line_length(int xres_virtual, int bpp)
152 {
153         return (xres_virtual * bytes_per_pixel(bpp));
154 }
155
156 /*
157  * Function:    dbe_TurnOffDma
158  * Parameters:  (None)
159  * Description: This should turn off the monitor and dbe.  This is used
160  *              when switching between the serial console and the graphics
161  *              console.
162  */
163
164 static void dbe_TurnOffDma(struct sgivw_par *par)
165 {
166         unsigned int readVal;
167         int i;
168
169         // Check to see if things are already turned off:
170         // 1) Check to see if dbe is not using the internal dotclock.
171         // 2) Check to see if the xy counter in dbe is already off.
172
173         DBE_GETREG(ctrlstat, readVal);
174         if (GET_DBE_FIELD(CTRLSTAT, PCLKSEL, readVal) < 2)
175                 return;
176
177         DBE_GETREG(vt_xy, readVal);
178         if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1)
179                 return;
180
181         // Otherwise, turn off dbe
182
183         DBE_GETREG(ovr_control, readVal);
184         SET_DBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, readVal, 0);
185         DBE_SETREG(ovr_control, readVal);
186         udelay(1000);
187         DBE_GETREG(frm_control, readVal);
188         SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, readVal, 0);
189         DBE_SETREG(frm_control, readVal);
190         udelay(1000);
191         DBE_GETREG(did_control, readVal);
192         SET_DBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, readVal, 0);
193         DBE_SETREG(did_control, readVal);
194         udelay(1000);
195
196         // XXX HACK:
197         //
198         //    This was necessary for GBE--we had to wait through two
199         //    vertical retrace periods before the pixel DMA was
200         //    turned off for sure.  I've left this in for now, in
201         //    case dbe needs it.
202
203         for (i = 0; i < 10000; i++) {
204                 DBE_GETREG(frm_inhwctrl, readVal);
205                 if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) ==
206                     0)
207                         udelay(10);
208                 else {
209                         DBE_GETREG(ovr_inhwctrl, readVal);
210                         if (GET_DBE_FIELD
211                             (OVR_INHWCTRL, OVR_DMA_ENABLE, readVal) == 0)
212                                 udelay(10);
213                         else {
214                                 DBE_GETREG(did_inhwctrl, readVal);
215                                 if (GET_DBE_FIELD
216                                     (DID_INHWCTRL, DID_DMA_ENABLE,
217                                      readVal) == 0)
218                                         udelay(10);
219                                 else
220                                         break;
221                         }
222                 }
223         }
224 }
225
226 /*
227  *  Set the User Defined Part of the Display. Again if par use it to get
228  *  real video mode.
229  */
230 static int sgivwfb_check_var(struct fb_var_screeninfo *var, 
231                              struct fb_info *info)
232 {
233         struct sgivw_par *par = (struct sgivw_par *)info->par;
234         struct dbe_timing_info *timing;
235         u_long line_length;
236         u_long min_mode;
237         int req_dot;
238         int test_mode;
239
240         /*
241          *  FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal!
242          *  as FB_VMODE_SMOOTH_XPAN is only used internally
243          */
244
245         if (var->vmode & FB_VMODE_CONUPDATE) {
246                 var->vmode |= FB_VMODE_YWRAP;
247                 var->xoffset = info->var.xoffset;
248                 var->yoffset = info->var.yoffset;
249         }
250
251         /* XXX FIXME - forcing var's */
252         var->xoffset = 0;
253         var->yoffset = 0;
254
255         /* Limit bpp to 8, 16, and 32 */
256         if (var->bits_per_pixel <= 8)
257                 var->bits_per_pixel = 8;
258         else if (var->bits_per_pixel <= 16)
259                 var->bits_per_pixel = 16;
260         else if (var->bits_per_pixel <= 32)
261                 var->bits_per_pixel = 32;
262         else
263                 return -EINVAL;
264
265         var->grayscale = 0;     /* No grayscale for now */
266
267         /* determine valid resolution and timing */
268         for (min_mode = 0; min_mode < DBE_VT_SIZE; min_mode++) {
269                 if (dbeVTimings[min_mode].width >= var->xres &&
270                     dbeVTimings[min_mode].height >= var->yres)
271                         break;
272         }
273
274         if (min_mode == DBE_VT_SIZE)
275                 return -EINVAL; /* Resolution to high */
276
277         /* XXX FIXME - should try to pick best refresh rate */
278         /* for now, pick closest dot-clock within 3MHz */
279         req_dot = PICOS2KHZ(var->pixclock);
280         printk(KERN_INFO "sgivwfb: requested pixclock=%d ps (%d KHz)\n",
281                var->pixclock, req_dot);
282         test_mode = min_mode;
283         while (dbeVTimings[min_mode].width == dbeVTimings[test_mode].width) {
284                 if (dbeVTimings[test_mode].cfreq + 3000 > req_dot)
285                         break;
286                 test_mode++;
287         }
288         if (dbeVTimings[min_mode].width != dbeVTimings[test_mode].width)
289                 test_mode--;
290         min_mode = test_mode;
291         timing = &dbeVTimings[min_mode];
292         printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n", timing->cfreq);
293
294         /* Adjust virtual resolution, if necessary */
295         if (var->xres > var->xres_virtual || (!ywrap && !ypan))
296                 var->xres_virtual = var->xres;
297         if (var->yres > var->yres_virtual || (!ywrap && !ypan))
298                 var->yres_virtual = var->yres;
299
300         /*
301          *  Memory limit
302          */
303         line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
304         if (line_length * var->yres_virtual > sgivwfb_mem_size)
305                 return -ENOMEM; /* Virtual resolution to high */
306
307         info->fix.line_length = line_length;
308
309         switch (var->bits_per_pixel) {
310         case 8:
311                 var->red.offset = 0;
312                 var->red.length = 8;
313                 var->green.offset = 0;
314                 var->green.length = 8;
315                 var->blue.offset = 0;
316                 var->blue.length = 8;
317                 var->transp.offset = 0;
318                 var->transp.length = 0;
319                 break;
320         case 16:                /* RGBA 5551 */
321                 var->red.offset = 11;
322                 var->red.length = 5;
323                 var->green.offset = 6;
324                 var->green.length = 5;
325                 var->blue.offset = 1;
326                 var->blue.length = 5;
327                 var->transp.offset = 0;
328                 var->transp.length = 0;
329                 break;
330         case 32:                /* RGB 8888 */
331                 var->red.offset = 0;
332                 var->red.length = 8;
333                 var->green.offset = 8;
334                 var->green.length = 8;
335                 var->blue.offset = 16;
336                 var->blue.length = 8;
337                 var->transp.offset = 24;
338                 var->transp.length = 8;
339                 break;
340         }
341         var->red.msb_right = 0;
342         var->green.msb_right = 0;
343         var->blue.msb_right = 0;
344         var->transp.msb_right = 0;
345
346         /* set video timing information */
347         var->pixclock = KHZ2PICOS(timing->cfreq);
348         var->left_margin = timing->htotal - timing->hsync_end;
349         var->right_margin = timing->hsync_start - timing->width;
350         var->upper_margin = timing->vtotal - timing->vsync_end;
351         var->lower_margin = timing->vsync_start - timing->height;
352         var->hsync_len = timing->hsync_end - timing->hsync_start;
353         var->vsync_len = timing->vsync_end - timing->vsync_start;
354
355         /* Ouch. This breaks the rules but timing_num is only important if you
356         * change a video mode */
357         par->timing_num = min_mode;
358
359         printk(KERN_INFO "sgivwfb: new video mode xres=%d yres=%d bpp=%d\n",
360                 var->xres, var->yres, var->bits_per_pixel);
361         printk(KERN_INFO "         vxres=%d vyres=%d\n", var->xres_virtual,
362                 var->yres_virtual);
363         return 0;
364 }
365
366 /*
367  *  Setup flatpanel related registers.
368  */
369 static void sgivwfb_setup_flatpanel(struct sgivw_par *par, struct dbe_timing_info *currentTiming)
370 {
371         int fp_wid, fp_hgt, fp_vbs, fp_vbe;
372         u32 outputVal = 0;
373
374         SET_DBE_FIELD(VT_FLAGS, HDRV_INVERT, outputVal, 
375                 (currentTiming->flags & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1);
376         SET_DBE_FIELD(VT_FLAGS, VDRV_INVERT, outputVal, 
377                 (currentTiming->flags & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1);
378         DBE_SETREG(vt_flags, outputVal);
379
380         /* Turn on the flat panel */
381         switch (flatpanel_id) {
382                 case FLATPANEL_SGI_1600SW:
383                         fp_wid = 1600;
384                         fp_hgt = 1024;
385                         fp_vbs = 0;
386                         fp_vbe = 1600;
387                         currentTiming->pll_m = 4;
388                         currentTiming->pll_n = 1;
389                         currentTiming->pll_p = 0;
390                         break;
391                 default:
392                         fp_wid = fp_hgt = fp_vbs = fp_vbe = 0xfff;
393         }
394
395         outputVal = 0;
396         SET_DBE_FIELD(FP_DE, FP_DE_ON, outputVal, fp_vbs);
397         SET_DBE_FIELD(FP_DE, FP_DE_OFF, outputVal, fp_vbe);
398         DBE_SETREG(fp_de, outputVal);
399         outputVal = 0;
400         SET_DBE_FIELD(FP_HDRV, FP_HDRV_OFF, outputVal, fp_wid);
401         DBE_SETREG(fp_hdrv, outputVal);
402         outputVal = 0;
403         SET_DBE_FIELD(FP_VDRV, FP_VDRV_ON, outputVal, 1);
404         SET_DBE_FIELD(FP_VDRV, FP_VDRV_OFF, outputVal, fp_hgt + 1);
405         DBE_SETREG(fp_vdrv, outputVal);
406 }
407
408 /*
409  *  Set the hardware according to 'par'.
410  */
411 static int sgivwfb_set_par(struct fb_info *info)
412 {
413         struct sgivw_par *par = info->par;
414         int i, j, htmp, temp;
415         u32 readVal, outputVal;
416         int wholeTilesX, maxPixelsPerTileX;
417         int frmWrite1, frmWrite2, frmWrite3b;
418         struct dbe_timing_info *currentTiming; /* Current Video Timing */
419         int xpmax, ypmax;       // Monitor resolution
420         int bytesPerPixel;      // Bytes per pixel
421
422         currentTiming = &dbeVTimings[par->timing_num];
423         bytesPerPixel = bytes_per_pixel(info->var.bits_per_pixel);
424         xpmax = currentTiming->width;
425         ypmax = currentTiming->height;
426
427         /* dbe_InitGraphicsBase(); */
428         /* Turn on dotclock PLL */
429         DBE_SETREG(ctrlstat, 0x20000000);
430
431         dbe_TurnOffDma(par);
432
433         /* dbe_CalculateScreenParams(); */
434         maxPixelsPerTileX = 512 / bytesPerPixel;
435         wholeTilesX = xpmax / maxPixelsPerTileX;
436         if (wholeTilesX * maxPixelsPerTileX < xpmax)
437                 wholeTilesX++;
438
439         printk(KERN_DEBUG "sgivwfb: pixPerTile=%d wholeTilesX=%d\n",
440                maxPixelsPerTileX, wholeTilesX);
441
442         /* dbe_InitGammaMap(); */
443         udelay(10);
444
445         for (i = 0; i < 256; i++) {
446                 DBE_ISETREG(gmap, i, (i << 24) | (i << 16) | (i << 8));
447         }
448
449         /* dbe_TurnOn(); */
450         DBE_GETREG(vt_xy, readVal);
451         if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1) {
452                 DBE_SETREG(vt_xy, 0x00000000);
453                 udelay(1);
454         } else
455                 dbe_TurnOffDma(par);
456
457         /* dbe_Initdbe(); */
458         for (i = 0; i < 256; i++) {
459                 for (j = 0; j < 100; j++) {
460                         DBE_GETREG(cm_fifo, readVal);
461                         if (readVal != 0x00000000)
462                                 break;
463                         else
464                                 udelay(10);
465                 }
466
467                 // DBE_ISETREG(cmap, i, 0x00000000);
468                 DBE_ISETREG(cmap, i, (i << 8) | (i << 16) | (i << 24));
469         }
470
471         /* dbe_InitFramebuffer(); */
472         frmWrite1 = 0;
473         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, frmWrite1,
474                       wholeTilesX);
475         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_RHS, frmWrite1, 0);
476
477         switch (bytesPerPixel) {
478         case 1:
479                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
480                               DBE_FRM_DEPTH_8);
481                 break;
482         case 2:
483                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
484                               DBE_FRM_DEPTH_16);
485                 break;
486         case 4:
487                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
488                               DBE_FRM_DEPTH_32);
489                 break;
490         }
491
492         frmWrite2 = 0;
493         SET_DBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, frmWrite2, ypmax);
494
495         // Tell dbe about the framebuffer location and type
496         // XXX What format is the FRM_TILE_PTR??  64K aligned address?
497         frmWrite3b = 0;
498         SET_DBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, frmWrite3b,
499                       sgivwfb_mem_phys >> 9);
500         SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, frmWrite3b, 1);
501         SET_DBE_FIELD(FRM_CONTROL, FRM_LINEAR, frmWrite3b, 1);
502
503         /* Initialize DIDs */
504
505         outputVal = 0;
506         switch (bytesPerPixel) {
507         case 1:
508                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_I8);
509                 break;
510         case 2:
511                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGBA5);
512                 break;
513         case 4:
514                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGB8);
515                 break;
516         }
517         SET_DBE_FIELD(WID, BUF, outputVal, DBE_BMODE_BOTH);
518
519         for (i = 0; i < 32; i++) {
520                 DBE_ISETREG(mode_regs, i, outputVal);
521         }
522
523         /* dbe_InitTiming(); */
524         DBE_SETREG(vt_intr01, 0xffffffff);
525         DBE_SETREG(vt_intr23, 0xffffffff);
526
527         DBE_GETREG(dotclock, readVal);
528         DBE_SETREG(dotclock, readVal & 0xffff);
529
530         DBE_SETREG(vt_xymax, 0x00000000);
531         outputVal = 0;
532         SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_ON, outputVal,
533                       currentTiming->vsync_start);
534         SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_OFF, outputVal,
535                       currentTiming->vsync_end);
536         DBE_SETREG(vt_vsync, outputVal);
537         outputVal = 0;
538         SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_ON, outputVal,
539                       currentTiming->hsync_start);
540         SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_OFF, outputVal,
541                       currentTiming->hsync_end);
542         DBE_SETREG(vt_hsync, outputVal);
543         outputVal = 0;
544         SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_ON, outputVal,
545                       currentTiming->vblank_start);
546         SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_OFF, outputVal,
547                       currentTiming->vblank_end);
548         DBE_SETREG(vt_vblank, outputVal);
549         outputVal = 0;
550         SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_ON, outputVal,
551                       currentTiming->hblank_start);
552         SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_OFF, outputVal,
553                       currentTiming->hblank_end - 3);
554         DBE_SETREG(vt_hblank, outputVal);
555         outputVal = 0;
556         SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_ON, outputVal,
557                       currentTiming->vblank_start);
558         SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_OFF, outputVal,
559                       currentTiming->vblank_end);
560         DBE_SETREG(vt_vcmap, outputVal);
561         outputVal = 0;
562         SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_ON, outputVal,
563                       currentTiming->hblank_start);
564         SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_OFF, outputVal,
565                       currentTiming->hblank_end - 3);
566         DBE_SETREG(vt_hcmap, outputVal);
567
568         if (flatpanel_id != -1)
569                 sgivwfb_setup_flatpanel(par, currentTiming);
570
571         outputVal = 0;
572         temp = currentTiming->vblank_start - currentTiming->vblank_end - 1;
573         if (temp > 0)
574                 temp = -temp;
575
576         SET_DBE_FIELD(DID_START_XY, DID_STARTY, outputVal, (u32) temp);
577         if (currentTiming->hblank_end >= 20)
578                 SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
579                               currentTiming->hblank_end - 20);
580         else
581                 SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
582                               currentTiming->htotal - (20 -
583                                                        currentTiming->
584                                                        hblank_end));
585         DBE_SETREG(did_start_xy, outputVal);
586
587         outputVal = 0;
588         SET_DBE_FIELD(CRS_START_XY, CRS_STARTY, outputVal,
589                       (u32) (temp + 1));
590         if (currentTiming->hblank_end >= DBE_CRS_MAGIC)
591                 SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
592                               currentTiming->hblank_end - DBE_CRS_MAGIC);
593         else
594                 SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
595                               currentTiming->htotal - (DBE_CRS_MAGIC -
596                                                        currentTiming->
597                                                        hblank_end));
598         DBE_SETREG(crs_start_xy, outputVal);
599
600         outputVal = 0;
601         SET_DBE_FIELD(VC_START_XY, VC_STARTY, outputVal, (u32) temp);
602         SET_DBE_FIELD(VC_START_XY, VC_STARTX, outputVal,
603                       currentTiming->hblank_end - 4);
604         DBE_SETREG(vc_start_xy, outputVal);
605
606         DBE_SETREG(frm_size_tile, frmWrite1);
607         DBE_SETREG(frm_size_pixel, frmWrite2);
608
609         outputVal = 0;
610         SET_DBE_FIELD(DOTCLK, M, outputVal, currentTiming->pll_m - 1);
611         SET_DBE_FIELD(DOTCLK, N, outputVal, currentTiming->pll_n - 1);
612         SET_DBE_FIELD(DOTCLK, P, outputVal, currentTiming->pll_p);
613         SET_DBE_FIELD(DOTCLK, RUN, outputVal, 1);
614         DBE_SETREG(dotclock, outputVal);
615
616         udelay(11 * 1000);
617
618         DBE_SETREG(vt_vpixen, 0xffffff);
619         DBE_SETREG(vt_hpixen, 0xffffff);
620
621         outputVal = 0;
622         SET_DBE_FIELD(VT_XYMAX, VT_MAXX, outputVal, currentTiming->htotal);
623         SET_DBE_FIELD(VT_XYMAX, VT_MAXY, outputVal, currentTiming->vtotal);
624         DBE_SETREG(vt_xymax, outputVal);
625
626         outputVal = frmWrite1;
627         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, outputVal, 1);
628         DBE_SETREG(frm_size_tile, outputVal);
629         DBE_SETREG(frm_size_tile, frmWrite1);
630
631         outputVal = 0;
632         SET_DBE_FIELD(OVR_WIDTH_TILE, OVR_FIFO_RESET, outputVal, 1);
633         DBE_SETREG(ovr_width_tile, outputVal);
634         DBE_SETREG(ovr_width_tile, 0);
635
636         DBE_SETREG(frm_control, frmWrite3b);
637         DBE_SETREG(did_control, 0);
638
639         // Wait for dbe to take frame settings
640         for (i = 0; i < 100000; i++) {
641                 DBE_GETREG(frm_inhwctrl, readVal);
642                 if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) !=
643                     0)
644                         break;
645                 else
646                         udelay(1);
647         }
648
649         if (i == 100000)
650                 printk(KERN_INFO
651                        "sgivwfb: timeout waiting for frame DMA enable.\n");
652
653         outputVal = 0;
654         htmp = currentTiming->hblank_end - 19;
655         if (htmp < 0)
656                 htmp += currentTiming->htotal;  /* allow blank to wrap around */
657         SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_ON, outputVal, htmp);
658         SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_OFF, outputVal,
659                       ((htmp + currentTiming->width -
660                         2) % currentTiming->htotal));
661         DBE_SETREG(vt_hpixen, outputVal);
662
663         outputVal = 0;
664         SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_OFF, outputVal,
665                       currentTiming->vblank_start);
666         SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_ON, outputVal,
667                       currentTiming->vblank_end);
668         DBE_SETREG(vt_vpixen, outputVal);
669
670         // Turn off mouse cursor
671         par->regs->crs_ctl = 0;
672
673         // XXX What's this section for??
674         DBE_GETREG(ctrlstat, readVal);
675         readVal &= 0x02000000;
676
677         if (readVal != 0) {
678                 DBE_SETREG(ctrlstat, 0x30000000);
679         }
680         return 0;
681 }
682
683 /*
684  *  Set a single color register. The values supplied are already
685  *  rounded down to the hardware's capabilities (according to the
686  *  entries in the var structure). Return != 0 for invalid regno.
687  */
688
689 static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
690                              u_int blue, u_int transp,
691                              struct fb_info *info)
692 {
693         struct sgivw_par *par = (struct sgivw_par *) info->par;
694
695         if (regno > 255)
696                 return 1;
697         red >>= 8;
698         green >>= 8;
699         blue >>= 8;
700
701         /* wait for the color map FIFO to have a free entry */
702         while (par->cmap_fifo == 0)
703                 par->cmap_fifo = par->regs->cm_fifo;
704
705         par->regs->cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
706         par->cmap_fifo--;       /* assume FIFO is filling up */
707         return 0;
708 }
709
710 static int sgivwfb_mmap(struct fb_info *info, struct file *file,
711                         struct vm_area_struct *vma)
712 {
713         unsigned long size = vma->vm_end - vma->vm_start;
714         unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
715
716         if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
717                 return -EINVAL;
718         if (offset + size > sgivwfb_mem_size)
719                 return -EINVAL;
720         offset += sgivwfb_mem_phys;
721         pgprot_val(vma->vm_page_prot) =
722             pgprot_val(vma->vm_page_prot) | _PAGE_PCD;
723         vma->vm_flags |= VM_IO;
724         if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
725                                                 size, vma->vm_page_prot))
726                 return -EAGAIN;
727         vma->vm_file = file;
728         printk(KERN_DEBUG "sgivwfb: mmap framebuffer P(%lx)->V(%lx)\n",
729                offset, vma->vm_start);
730         return 0;
731 }
732
733 int __init sgivwfb_setup(char *options)
734 {
735         char *this_opt;
736
737         if (!options || !*options)
738                 return 0;
739
740         while ((this_opt = strsep(&options, ",")) != NULL) {
741                 if (!strncmp(this_opt, "monitor:", 8)) {
742                         if (!strncmp(this_opt + 8, "crt", 3))
743                                 flatpanel_id = -1;
744                         else if (!strncmp(this_opt + 8, "1600sw", 6))
745                                 flatpanel_id = FLATPANEL_SGI_1600SW;
746                 }
747         }
748         return 0;
749 }
750
751 /*
752  *  Initialisation
753  */
754 static void sgivwfb_release(struct device *device)
755 {
756 }
757
758 static int __init sgivwfb_probe(struct device *device)
759 {
760         struct platform_device *dev = to_platform_device(device);
761         struct sgivw_par *par;
762         struct fb_info *info;
763         char *monitor;
764
765         info = framebuffer_alloc(sizeof(struct sgivw_par) + sizeof(u32) * 256, &dev->dev);
766         if (!info)
767                 return -ENOMEM;
768         par = info->par;
769
770         if (!request_mem_region(DBE_REG_PHYS, DBE_REG_SIZE, "sgivwfb")) {
771                 printk(KERN_ERR "sgivwfb: couldn't reserve mmio region\n");
772                 framebuffer_release(info);
773                 return -EBUSY;
774         }
775
776         par->regs = (struct asregs *) ioremap_nocache(DBE_REG_PHYS, DBE_REG_SIZE);
777         if (!par->regs) {
778                 printk(KERN_ERR "sgivwfb: couldn't ioremap registers\n");
779                 goto fail_ioremap_regs;
780         }
781
782         mtrr_add(sgivwfb_mem_phys, sgivwfb_mem_size, MTRR_TYPE_WRCOMB, 1);
783
784         sgivwfb_fix.smem_start = sgivwfb_mem_phys;
785         sgivwfb_fix.smem_len = sgivwfb_mem_size;
786         sgivwfb_fix.ywrapstep = ywrap;
787         sgivwfb_fix.ypanstep = ypan;
788
789         info->fix = sgivwfb_fix;
790
791         switch (flatpanel_id) {
792                 case FLATPANEL_SGI_1600SW:
793                         info->var = sgivwfb_var1600sw;
794                         monitor = "SGI 1600SW flatpanel";
795                         break;
796                 default:
797                         info->var = sgivwfb_var;
798                         monitor = "CRT";
799         }
800
801         printk(KERN_INFO "sgivwfb: %s monitor selected\n", monitor);
802
803         info->fbops = &sgivwfb_ops;
804         info->pseudo_palette = (void *) (par + 1);
805         info->flags = FBINFO_DEFAULT;
806
807         info->screen_base = ioremap_nocache((unsigned long) sgivwfb_mem_phys, sgivwfb_mem_size);
808         if (!info->screen_base) {
809                 printk(KERN_ERR "sgivwfb: couldn't ioremap screen_base\n");
810                 goto fail_ioremap_fbmem;
811         }
812
813         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
814                 goto fail_color_map;
815
816         if (register_framebuffer(info) < 0) {
817                 printk(KERN_ERR "sgivwfb: couldn't register framebuffer\n");
818                 goto fail_register_framebuffer;
819         }
820
821         dev_set_drvdata(&dev->dev, info);
822
823         printk(KERN_INFO "fb%d: SGI DBE frame buffer device, using %ldK of video memory at %#lx\n",      
824                 info->node, sgivwfb_mem_size >> 10, sgivwfb_mem_phys);
825         return 0;
826
827 fail_register_framebuffer:
828         fb_dealloc_cmap(&info->cmap);
829 fail_color_map:
830         iounmap((char *) info->screen_base);
831 fail_ioremap_fbmem:
832         iounmap(par->regs);
833 fail_ioremap_regs:
834         release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
835         framebuffer_release(info);
836         return -ENXIO;
837 }
838
839 static int sgivwfb_remove(struct device *device)
840 {
841         struct fb_info *info = dev_get_drvdata(device);
842
843         if (info) {
844                 struct sgivw_par *par = info->par;
845
846                 unregister_framebuffer(info);
847                 dbe_TurnOffDma(par);
848                 iounmap(par->regs);
849                 iounmap(info->screen_base);
850                 release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
851         }
852         return 0;
853 }
854
855 static struct device_driver sgivwfb_driver = {
856         .name   = "sgivwfb",
857         .bus    = &platform_bus_type,
858         .probe  = sgivwfb_probe,
859         .remove = sgivwfb_remove,
860 };
861
862 static struct platform_device sgivwfb_device = {
863         .name   = "sgivwfb",
864         .id     = 0,
865         .dev    = {
866                 .release = sgivwfb_release,
867         }
868 };
869
870 int __init sgivwfb_init(void)
871 {
872         int ret;
873
874 #ifndef MODULE
875         char *option = NULL;
876
877         if (fb_get_options("sgivwfb", &option))
878                 return -ENODEV;
879         sgivwfb_setup(option);
880 #endif
881         ret = driver_register(&sgivwfb_driver);
882         if (!ret) {
883                 ret = platform_device_register(&sgivwfb_device);
884                 if (ret)
885                         driver_unregister(&sgivwfb_driver);
886         }
887         return ret;
888 }
889
890 module_init(sgivwfb_init);
891
892 #ifdef MODULE
893 MODULE_LICENSE("GPL");
894
895 static void __exit sgivwfb_exit(void)
896 {
897         platform_device_unregister(&sgivwfb_device);
898         driver_unregister(&sgivwfb_driver);
899 }
900
901 module_exit(sgivwfb_exit);
902
903 #endif                          /* MODULE */