]> git.kernelconcepts.de Git - karo-tx-linux.git/blob - include/uapi/linux/perf_event.h
sh_eth: use DMA barriers
[karo-tx-linux.git] / include / uapi / linux / perf_event.h
1 /*
2  * Performance events:
3  *
4  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
5  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
6  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
7  *
8  * Data type definitions, declarations, prototypes.
9  *
10  *    Started by: Thomas Gleixner and Ingo Molnar
11  *
12  * For licencing details see kernel-base/COPYING
13  */
14 #ifndef _UAPI_LINUX_PERF_EVENT_H
15 #define _UAPI_LINUX_PERF_EVENT_H
16
17 #include <linux/types.h>
18 #include <linux/ioctl.h>
19 #include <asm/byteorder.h>
20
21 /*
22  * User-space ABI bits:
23  */
24
25 /*
26  * attr.type
27  */
28 enum perf_type_id {
29         PERF_TYPE_HARDWARE                      = 0,
30         PERF_TYPE_SOFTWARE                      = 1,
31         PERF_TYPE_TRACEPOINT                    = 2,
32         PERF_TYPE_HW_CACHE                      = 3,
33         PERF_TYPE_RAW                           = 4,
34         PERF_TYPE_BREAKPOINT                    = 5,
35
36         PERF_TYPE_MAX,                          /* non-ABI */
37 };
38
39 /*
40  * Generalized performance event event_id types, used by the
41  * attr.event_id parameter of the sys_perf_event_open()
42  * syscall:
43  */
44 enum perf_hw_id {
45         /*
46          * Common hardware events, generalized by the kernel:
47          */
48         PERF_COUNT_HW_CPU_CYCLES                = 0,
49         PERF_COUNT_HW_INSTRUCTIONS              = 1,
50         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
51         PERF_COUNT_HW_CACHE_MISSES              = 3,
52         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
53         PERF_COUNT_HW_BRANCH_MISSES             = 5,
54         PERF_COUNT_HW_BUS_CYCLES                = 6,
55         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
56         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
57         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
58
59         PERF_COUNT_HW_MAX,                      /* non-ABI */
60 };
61
62 /*
63  * Generalized hardware cache events:
64  *
65  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
66  *       { read, write, prefetch } x
67  *       { accesses, misses }
68  */
69 enum perf_hw_cache_id {
70         PERF_COUNT_HW_CACHE_L1D                 = 0,
71         PERF_COUNT_HW_CACHE_L1I                 = 1,
72         PERF_COUNT_HW_CACHE_LL                  = 2,
73         PERF_COUNT_HW_CACHE_DTLB                = 3,
74         PERF_COUNT_HW_CACHE_ITLB                = 4,
75         PERF_COUNT_HW_CACHE_BPU                 = 5,
76         PERF_COUNT_HW_CACHE_NODE                = 6,
77
78         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
79 };
80
81 enum perf_hw_cache_op_id {
82         PERF_COUNT_HW_CACHE_OP_READ             = 0,
83         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
84         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
85
86         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
87 };
88
89 enum perf_hw_cache_op_result_id {
90         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
91         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
92
93         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
94 };
95
96 /*
97  * Special "software" events provided by the kernel, even if the hardware
98  * does not support performance events. These events measure various
99  * physical and sw events of the kernel (and allow the profiling of them as
100  * well):
101  */
102 enum perf_sw_ids {
103         PERF_COUNT_SW_CPU_CLOCK                 = 0,
104         PERF_COUNT_SW_TASK_CLOCK                = 1,
105         PERF_COUNT_SW_PAGE_FAULTS               = 2,
106         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
107         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
108         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
109         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
110         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
111         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
112         PERF_COUNT_SW_DUMMY                     = 9,
113         PERF_COUNT_SW_BPF_OUTPUT                = 10,
114
115         PERF_COUNT_SW_MAX,                      /* non-ABI */
116 };
117
118 /*
119  * Bits that can be set in attr.sample_type to request information
120  * in the overflow packets.
121  */
122 enum perf_event_sample_format {
123         PERF_SAMPLE_IP                          = 1U << 0,
124         PERF_SAMPLE_TID                         = 1U << 1,
125         PERF_SAMPLE_TIME                        = 1U << 2,
126         PERF_SAMPLE_ADDR                        = 1U << 3,
127         PERF_SAMPLE_READ                        = 1U << 4,
128         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
129         PERF_SAMPLE_ID                          = 1U << 6,
130         PERF_SAMPLE_CPU                         = 1U << 7,
131         PERF_SAMPLE_PERIOD                      = 1U << 8,
132         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
133         PERF_SAMPLE_RAW                         = 1U << 10,
134         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
135         PERF_SAMPLE_REGS_USER                   = 1U << 12,
136         PERF_SAMPLE_STACK_USER                  = 1U << 13,
137         PERF_SAMPLE_WEIGHT                      = 1U << 14,
138         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
139         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
140         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
141         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
142
143         PERF_SAMPLE_MAX = 1U << 19,             /* non-ABI */
144 };
145
146 /*
147  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
148  *
149  * If the user does not pass priv level information via branch_sample_type,
150  * the kernel uses the event's priv level. Branch and event priv levels do
151  * not have to match. Branch priv level is checked for permissions.
152  *
153  * The branch types can be combined, however BRANCH_ANY covers all types
154  * of branches and therefore it supersedes all the other types.
155  */
156 enum perf_branch_sample_type_shift {
157         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
158         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
159         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
160
161         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
162         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
163         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
164         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
165         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
166         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
167         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
168         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
169
170         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
171         PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT       = 12, /* indirect jumps */
172
173         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
174 };
175
176 enum perf_branch_sample_type {
177         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
178         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
179         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
180
181         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
182         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
183         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
184         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
185         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
186         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
187         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
188         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
189
190         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
191         PERF_SAMPLE_BRANCH_IND_JUMP     = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
192
193         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
194 };
195
196 #define PERF_SAMPLE_BRANCH_PLM_ALL \
197         (PERF_SAMPLE_BRANCH_USER|\
198          PERF_SAMPLE_BRANCH_KERNEL|\
199          PERF_SAMPLE_BRANCH_HV)
200
201 /*
202  * Values to determine ABI of the registers dump.
203  */
204 enum perf_sample_regs_abi {
205         PERF_SAMPLE_REGS_ABI_NONE       = 0,
206         PERF_SAMPLE_REGS_ABI_32         = 1,
207         PERF_SAMPLE_REGS_ABI_64         = 2,
208 };
209
210 /*
211  * Values for the memory transaction event qualifier, mostly for
212  * abort events. Multiple bits can be set.
213  */
214 enum {
215         PERF_TXN_ELISION        = (1 << 0), /* From elision */
216         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
217         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
218         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
219         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
220         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
221         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
222         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
223
224         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
225
226         /* bits 32..63 are reserved for the abort code */
227
228         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
229         PERF_TXN_ABORT_SHIFT = 32,
230 };
231
232 /*
233  * The format of the data returned by read() on a perf event fd,
234  * as specified by attr.read_format:
235  *
236  * struct read_format {
237  *      { u64           value;
238  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
239  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
240  *        { u64         id;           } && PERF_FORMAT_ID
241  *      } && !PERF_FORMAT_GROUP
242  *
243  *      { u64           nr;
244  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
245  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
246  *        { u64         value;
247  *          { u64       id;           } && PERF_FORMAT_ID
248  *        }             cntr[nr];
249  *      } && PERF_FORMAT_GROUP
250  * };
251  */
252 enum perf_event_read_format {
253         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
254         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
255         PERF_FORMAT_ID                          = 1U << 2,
256         PERF_FORMAT_GROUP                       = 1U << 3,
257
258         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
259 };
260
261 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
262 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
263 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
264 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
265                                         /* add: sample_stack_user */
266 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
267 #define PERF_ATTR_SIZE_VER5     112     /* add: aux_watermark */
268
269 /*
270  * Hardware event_id to monitor via a performance monitoring event:
271  */
272 struct perf_event_attr {
273
274         /*
275          * Major type: hardware/software/tracepoint/etc.
276          */
277         __u32                   type;
278
279         /*
280          * Size of the attr structure, for fwd/bwd compat.
281          */
282         __u32                   size;
283
284         /*
285          * Type specific configuration information.
286          */
287         __u64                   config;
288
289         union {
290                 __u64           sample_period;
291                 __u64           sample_freq;
292         };
293
294         __u64                   sample_type;
295         __u64                   read_format;
296
297         __u64                   disabled       :  1, /* off by default        */
298                                 inherit        :  1, /* children inherit it   */
299                                 pinned         :  1, /* must always be on PMU */
300                                 exclusive      :  1, /* only group on PMU     */
301                                 exclude_user   :  1, /* don't count user      */
302                                 exclude_kernel :  1, /* ditto kernel          */
303                                 exclude_hv     :  1, /* ditto hypervisor      */
304                                 exclude_idle   :  1, /* don't count when idle */
305                                 mmap           :  1, /* include mmap data     */
306                                 comm           :  1, /* include comm data     */
307                                 freq           :  1, /* use freq, not period  */
308                                 inherit_stat   :  1, /* per task counts       */
309                                 enable_on_exec :  1, /* next exec enables     */
310                                 task           :  1, /* trace fork/exit       */
311                                 watermark      :  1, /* wakeup_watermark      */
312                                 /*
313                                  * precise_ip:
314                                  *
315                                  *  0 - SAMPLE_IP can have arbitrary skid
316                                  *  1 - SAMPLE_IP must have constant skid
317                                  *  2 - SAMPLE_IP requested to have 0 skid
318                                  *  3 - SAMPLE_IP must have 0 skid
319                                  *
320                                  *  See also PERF_RECORD_MISC_EXACT_IP
321                                  */
322                                 precise_ip     :  2, /* skid constraint       */
323                                 mmap_data      :  1, /* non-exec mmap data    */
324                                 sample_id_all  :  1, /* sample_type all events */
325
326                                 exclude_host   :  1, /* don't count in host   */
327                                 exclude_guest  :  1, /* don't count in guest  */
328
329                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
330                                 exclude_callchain_user   : 1, /* exclude user callchains */
331                                 mmap2          :  1, /* include mmap with inode data     */
332                                 comm_exec      :  1, /* flag comm events that are due to an exec */
333                                 use_clockid    :  1, /* use @clockid for time fields */
334                                 context_switch :  1, /* context switch data */
335                                 __reserved_1   : 37;
336
337         union {
338                 __u32           wakeup_events;    /* wakeup every n events */
339                 __u32           wakeup_watermark; /* bytes before wakeup   */
340         };
341
342         __u32                   bp_type;
343         union {
344                 __u64           bp_addr;
345                 __u64           config1; /* extension of config */
346         };
347         union {
348                 __u64           bp_len;
349                 __u64           config2; /* extension of config1 */
350         };
351         __u64   branch_sample_type; /* enum perf_branch_sample_type */
352
353         /*
354          * Defines set of user regs to dump on samples.
355          * See asm/perf_regs.h for details.
356          */
357         __u64   sample_regs_user;
358
359         /*
360          * Defines size of the user stack to dump on samples.
361          */
362         __u32   sample_stack_user;
363
364         __s32   clockid;
365         /*
366          * Defines set of regs to dump for each sample
367          * state captured on:
368          *  - precise = 0: PMU interrupt
369          *  - precise > 0: sampled instruction
370          *
371          * See asm/perf_regs.h for details.
372          */
373         __u64   sample_regs_intr;
374
375         /*
376          * Wakeup watermark for AUX area
377          */
378         __u32   aux_watermark;
379         __u32   __reserved_2;   /* align to __u64 */
380 };
381
382 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
383
384 /*
385  * Ioctls that can be done on a perf event fd:
386  */
387 #define PERF_EVENT_IOC_ENABLE           _IO ('$', 0)
388 #define PERF_EVENT_IOC_DISABLE          _IO ('$', 1)
389 #define PERF_EVENT_IOC_REFRESH          _IO ('$', 2)
390 #define PERF_EVENT_IOC_RESET            _IO ('$', 3)
391 #define PERF_EVENT_IOC_PERIOD           _IOW('$', 4, __u64)
392 #define PERF_EVENT_IOC_SET_OUTPUT       _IO ('$', 5)
393 #define PERF_EVENT_IOC_SET_FILTER       _IOW('$', 6, char *)
394 #define PERF_EVENT_IOC_ID               _IOR('$', 7, __u64 *)
395 #define PERF_EVENT_IOC_SET_BPF          _IOW('$', 8, __u32)
396
397 enum perf_event_ioc_flags {
398         PERF_IOC_FLAG_GROUP             = 1U << 0,
399 };
400
401 /*
402  * Structure of the page that can be mapped via mmap
403  */
404 struct perf_event_mmap_page {
405         __u32   version;                /* version number of this structure */
406         __u32   compat_version;         /* lowest version this is compat with */
407
408         /*
409          * Bits needed to read the hw events in user-space.
410          *
411          *   u32 seq, time_mult, time_shift, index, width;
412          *   u64 count, enabled, running;
413          *   u64 cyc, time_offset;
414          *   s64 pmc = 0;
415          *
416          *   do {
417          *     seq = pc->lock;
418          *     barrier()
419          *
420          *     enabled = pc->time_enabled;
421          *     running = pc->time_running;
422          *
423          *     if (pc->cap_usr_time && enabled != running) {
424          *       cyc = rdtsc();
425          *       time_offset = pc->time_offset;
426          *       time_mult   = pc->time_mult;
427          *       time_shift  = pc->time_shift;
428          *     }
429          *
430          *     index = pc->index;
431          *     count = pc->offset;
432          *     if (pc->cap_user_rdpmc && index) {
433          *       width = pc->pmc_width;
434          *       pmc = rdpmc(index - 1);
435          *     }
436          *
437          *     barrier();
438          *   } while (pc->lock != seq);
439          *
440          * NOTE: for obvious reason this only works on self-monitoring
441          *       processes.
442          */
443         __u32   lock;                   /* seqlock for synchronization */
444         __u32   index;                  /* hardware event identifier */
445         __s64   offset;                 /* add to hardware event value */
446         __u64   time_enabled;           /* time event active */
447         __u64   time_running;           /* time event on cpu */
448         union {
449                 __u64   capabilities;
450                 struct {
451                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
452                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
453
454                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
455                                 cap_user_time           : 1, /* The time_* fields are used */
456                                 cap_user_time_zero      : 1, /* The time_zero field is used */
457                                 cap_____res             : 59;
458                 };
459         };
460
461         /*
462          * If cap_user_rdpmc this field provides the bit-width of the value
463          * read using the rdpmc() or equivalent instruction. This can be used
464          * to sign extend the result like:
465          *
466          *   pmc <<= 64 - width;
467          *   pmc >>= 64 - width; // signed shift right
468          *   count += pmc;
469          */
470         __u16   pmc_width;
471
472         /*
473          * If cap_usr_time the below fields can be used to compute the time
474          * delta since time_enabled (in ns) using rdtsc or similar.
475          *
476          *   u64 quot, rem;
477          *   u64 delta;
478          *
479          *   quot = (cyc >> time_shift);
480          *   rem = cyc & ((1 << time_shift) - 1);
481          *   delta = time_offset + quot * time_mult +
482          *              ((rem * time_mult) >> time_shift);
483          *
484          * Where time_offset,time_mult,time_shift and cyc are read in the
485          * seqcount loop described above. This delta can then be added to
486          * enabled and possible running (if index), improving the scaling:
487          *
488          *   enabled += delta;
489          *   if (index)
490          *     running += delta;
491          *
492          *   quot = count / running;
493          *   rem  = count % running;
494          *   count = quot * enabled + (rem * enabled) / running;
495          */
496         __u16   time_shift;
497         __u32   time_mult;
498         __u64   time_offset;
499         /*
500          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
501          * from sample timestamps.
502          *
503          *   time = timestamp - time_zero;
504          *   quot = time / time_mult;
505          *   rem  = time % time_mult;
506          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
507          *
508          * And vice versa:
509          *
510          *   quot = cyc >> time_shift;
511          *   rem  = cyc & ((1 << time_shift) - 1);
512          *   timestamp = time_zero + quot * time_mult +
513          *               ((rem * time_mult) >> time_shift);
514          */
515         __u64   time_zero;
516         __u32   size;                   /* Header size up to __reserved[] fields. */
517
518                 /*
519                  * Hole for extension of the self monitor capabilities
520                  */
521
522         __u8    __reserved[118*8+4];    /* align to 1k. */
523
524         /*
525          * Control data for the mmap() data buffer.
526          *
527          * User-space reading the @data_head value should issue an smp_rmb(),
528          * after reading this value.
529          *
530          * When the mapping is PROT_WRITE the @data_tail value should be
531          * written by userspace to reflect the last read data, after issueing
532          * an smp_mb() to separate the data read from the ->data_tail store.
533          * In this case the kernel will not over-write unread data.
534          *
535          * See perf_output_put_handle() for the data ordering.
536          *
537          * data_{offset,size} indicate the location and size of the perf record
538          * buffer within the mmapped area.
539          */
540         __u64   data_head;              /* head in the data section */
541         __u64   data_tail;              /* user-space written tail */
542         __u64   data_offset;            /* where the buffer starts */
543         __u64   data_size;              /* data buffer size */
544
545         /*
546          * AUX area is defined by aux_{offset,size} fields that should be set
547          * by the userspace, so that
548          *
549          *   aux_offset >= data_offset + data_size
550          *
551          * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
552          *
553          * Ring buffer pointers aux_{head,tail} have the same semantics as
554          * data_{head,tail} and same ordering rules apply.
555          */
556         __u64   aux_head;
557         __u64   aux_tail;
558         __u64   aux_offset;
559         __u64   aux_size;
560 };
561
562 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
563 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
564 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
565 #define PERF_RECORD_MISC_USER                   (2 << 0)
566 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
567 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
568 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
569
570 /*
571  * Indicates that /proc/PID/maps parsing are truncated by time out.
572  */
573 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
574 /*
575  * PERF_RECORD_MISC_MMAP_DATA and PERF_RECORD_MISC_COMM_EXEC are used on
576  * different events so can reuse the same bit position.
577  * Ditto PERF_RECORD_MISC_SWITCH_OUT.
578  */
579 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
580 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
581 #define PERF_RECORD_MISC_SWITCH_OUT             (1 << 13)
582 /*
583  * Indicates that the content of PERF_SAMPLE_IP points to
584  * the actual instruction that triggered the event. See also
585  * perf_event_attr::precise_ip.
586  */
587 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
588 /*
589  * Reserve the last bit to indicate some extended misc field
590  */
591 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
592
593 struct perf_event_header {
594         __u32   type;
595         __u16   misc;
596         __u16   size;
597 };
598
599 enum perf_event_type {
600
601         /*
602          * If perf_event_attr.sample_id_all is set then all event types will
603          * have the sample_type selected fields related to where/when
604          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
605          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
606          * just after the perf_event_header and the fields already present for
607          * the existing fields, i.e. at the end of the payload. That way a newer
608          * perf.data file will be supported by older perf tools, with these new
609          * optional fields being ignored.
610          *
611          * struct sample_id {
612          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
613          *      { u64                   time;     } && PERF_SAMPLE_TIME
614          *      { u64                   id;       } && PERF_SAMPLE_ID
615          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
616          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
617          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
618          * } && perf_event_attr::sample_id_all
619          *
620          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
621          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
622          * relative to header.size.
623          */
624
625         /*
626          * The MMAP events record the PROT_EXEC mappings so that we can
627          * correlate userspace IPs to code. They have the following structure:
628          *
629          * struct {
630          *      struct perf_event_header        header;
631          *
632          *      u32                             pid, tid;
633          *      u64                             addr;
634          *      u64                             len;
635          *      u64                             pgoff;
636          *      char                            filename[];
637          *      struct sample_id                sample_id;
638          * };
639          */
640         PERF_RECORD_MMAP                        = 1,
641
642         /*
643          * struct {
644          *      struct perf_event_header        header;
645          *      u64                             id;
646          *      u64                             lost;
647          *      struct sample_id                sample_id;
648          * };
649          */
650         PERF_RECORD_LOST                        = 2,
651
652         /*
653          * struct {
654          *      struct perf_event_header        header;
655          *
656          *      u32                             pid, tid;
657          *      char                            comm[];
658          *      struct sample_id                sample_id;
659          * };
660          */
661         PERF_RECORD_COMM                        = 3,
662
663         /*
664          * struct {
665          *      struct perf_event_header        header;
666          *      u32                             pid, ppid;
667          *      u32                             tid, ptid;
668          *      u64                             time;
669          *      struct sample_id                sample_id;
670          * };
671          */
672         PERF_RECORD_EXIT                        = 4,
673
674         /*
675          * struct {
676          *      struct perf_event_header        header;
677          *      u64                             time;
678          *      u64                             id;
679          *      u64                             stream_id;
680          *      struct sample_id                sample_id;
681          * };
682          */
683         PERF_RECORD_THROTTLE                    = 5,
684         PERF_RECORD_UNTHROTTLE                  = 6,
685
686         /*
687          * struct {
688          *      struct perf_event_header        header;
689          *      u32                             pid, ppid;
690          *      u32                             tid, ptid;
691          *      u64                             time;
692          *      struct sample_id                sample_id;
693          * };
694          */
695         PERF_RECORD_FORK                        = 7,
696
697         /*
698          * struct {
699          *      struct perf_event_header        header;
700          *      u32                             pid, tid;
701          *
702          *      struct read_format              values;
703          *      struct sample_id                sample_id;
704          * };
705          */
706         PERF_RECORD_READ                        = 8,
707
708         /*
709          * struct {
710          *      struct perf_event_header        header;
711          *
712          *      #
713          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
714          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
715          *      # is fixed relative to header.
716          *      #
717          *
718          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
719          *      { u64                   ip;       } && PERF_SAMPLE_IP
720          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
721          *      { u64                   time;     } && PERF_SAMPLE_TIME
722          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
723          *      { u64                   id;       } && PERF_SAMPLE_ID
724          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
725          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
726          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
727          *
728          *      { struct read_format    values;   } && PERF_SAMPLE_READ
729          *
730          *      { u64                   nr,
731          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
732          *
733          *      #
734          *      # The RAW record below is opaque data wrt the ABI
735          *      #
736          *      # That is, the ABI doesn't make any promises wrt to
737          *      # the stability of its content, it may vary depending
738          *      # on event, hardware, kernel version and phase of
739          *      # the moon.
740          *      #
741          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
742          *      #
743          *
744          *      { u32                   size;
745          *        char                  data[size];}&& PERF_SAMPLE_RAW
746          *
747          *      { u64                   nr;
748          *        { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
749          *
750          *      { u64                   abi; # enum perf_sample_regs_abi
751          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
752          *
753          *      { u64                   size;
754          *        char                  data[size];
755          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
756          *
757          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
758          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
759          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
760          *      { u64                   abi; # enum perf_sample_regs_abi
761          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
762          * };
763          */
764         PERF_RECORD_SAMPLE                      = 9,
765
766         /*
767          * The MMAP2 records are an augmented version of MMAP, they add
768          * maj, min, ino numbers to be used to uniquely identify each mapping
769          *
770          * struct {
771          *      struct perf_event_header        header;
772          *
773          *      u32                             pid, tid;
774          *      u64                             addr;
775          *      u64                             len;
776          *      u64                             pgoff;
777          *      u32                             maj;
778          *      u32                             min;
779          *      u64                             ino;
780          *      u64                             ino_generation;
781          *      u32                             prot, flags;
782          *      char                            filename[];
783          *      struct sample_id                sample_id;
784          * };
785          */
786         PERF_RECORD_MMAP2                       = 10,
787
788         /*
789          * Records that new data landed in the AUX buffer part.
790          *
791          * struct {
792          *      struct perf_event_header        header;
793          *
794          *      u64                             aux_offset;
795          *      u64                             aux_size;
796          *      u64                             flags;
797          *      struct sample_id                sample_id;
798          * };
799          */
800         PERF_RECORD_AUX                         = 11,
801
802         /*
803          * Indicates that instruction trace has started
804          *
805          * struct {
806          *      struct perf_event_header        header;
807          *      u32                             pid;
808          *      u32                             tid;
809          * };
810          */
811         PERF_RECORD_ITRACE_START                = 12,
812
813         /*
814          * Records the dropped/lost sample number.
815          *
816          * struct {
817          *      struct perf_event_header        header;
818          *
819          *      u64                             lost;
820          *      struct sample_id                sample_id;
821          * };
822          */
823         PERF_RECORD_LOST_SAMPLES                = 13,
824
825         /*
826          * Records a context switch in or out (flagged by
827          * PERF_RECORD_MISC_SWITCH_OUT). See also
828          * PERF_RECORD_SWITCH_CPU_WIDE.
829          *
830          * struct {
831          *      struct perf_event_header        header;
832          *      struct sample_id                sample_id;
833          * };
834          */
835         PERF_RECORD_SWITCH                      = 14,
836
837         /*
838          * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and
839          * next_prev_tid that are the next (switching out) or previous
840          * (switching in) pid/tid.
841          *
842          * struct {
843          *      struct perf_event_header        header;
844          *      u32                             next_prev_pid;
845          *      u32                             next_prev_tid;
846          *      struct sample_id                sample_id;
847          * };
848          */
849         PERF_RECORD_SWITCH_CPU_WIDE             = 15,
850
851         PERF_RECORD_MAX,                        /* non-ABI */
852 };
853
854 #define PERF_MAX_STACK_DEPTH            127
855
856 enum perf_callchain_context {
857         PERF_CONTEXT_HV                 = (__u64)-32,
858         PERF_CONTEXT_KERNEL             = (__u64)-128,
859         PERF_CONTEXT_USER               = (__u64)-512,
860
861         PERF_CONTEXT_GUEST              = (__u64)-2048,
862         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
863         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
864
865         PERF_CONTEXT_MAX                = (__u64)-4095,
866 };
867
868 /**
869  * PERF_RECORD_AUX::flags bits
870  */
871 #define PERF_AUX_FLAG_TRUNCATED         0x01    /* record was truncated to fit */
872 #define PERF_AUX_FLAG_OVERWRITE         0x02    /* snapshot from overwrite mode */
873
874 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
875 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
876 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
877 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
878
879 union perf_mem_data_src {
880         __u64 val;
881         struct {
882                 __u64   mem_op:5,       /* type of opcode */
883                         mem_lvl:14,     /* memory hierarchy level */
884                         mem_snoop:5,    /* snoop mode */
885                         mem_lock:2,     /* lock instr */
886                         mem_dtlb:7,     /* tlb access */
887                         mem_rsvd:31;
888         };
889 };
890
891 /* type of opcode (load/store/prefetch,code) */
892 #define PERF_MEM_OP_NA          0x01 /* not available */
893 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
894 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
895 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
896 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
897 #define PERF_MEM_OP_SHIFT       0
898
899 /* memory hierarchy (memory level, hit or miss) */
900 #define PERF_MEM_LVL_NA         0x01  /* not available */
901 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
902 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
903 #define PERF_MEM_LVL_L1         0x08  /* L1 */
904 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
905 #define PERF_MEM_LVL_L2         0x20  /* L2 */
906 #define PERF_MEM_LVL_L3         0x40  /* L3 */
907 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
908 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
909 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
910 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
911 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
912 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
913 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
914 #define PERF_MEM_LVL_SHIFT      5
915
916 /* snoop mode */
917 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
918 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
919 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
920 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
921 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
922 #define PERF_MEM_SNOOP_SHIFT    19
923
924 /* locked instruction */
925 #define PERF_MEM_LOCK_NA        0x01 /* not available */
926 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
927 #define PERF_MEM_LOCK_SHIFT     24
928
929 /* TLB access */
930 #define PERF_MEM_TLB_NA         0x01 /* not available */
931 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
932 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
933 #define PERF_MEM_TLB_L1         0x08 /* L1 */
934 #define PERF_MEM_TLB_L2         0x10 /* L2 */
935 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
936 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
937 #define PERF_MEM_TLB_SHIFT      26
938
939 #define PERF_MEM_S(a, s) \
940         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
941
942 /*
943  * single taken branch record layout:
944  *
945  *      from: source instruction (may not always be a branch insn)
946  *        to: branch target
947  *   mispred: branch target was mispredicted
948  * predicted: branch target was predicted
949  *
950  * support for mispred, predicted is optional. In case it
951  * is not supported mispred = predicted = 0.
952  *
953  *     in_tx: running in a hardware transaction
954  *     abort: aborting a hardware transaction
955  *    cycles: cycles from last branch (or 0 if not supported)
956  */
957 struct perf_branch_entry {
958         __u64   from;
959         __u64   to;
960         __u64   mispred:1,  /* target mispredicted */
961                 predicted:1,/* target predicted */
962                 in_tx:1,    /* in transaction */
963                 abort:1,    /* transaction abort */
964                 cycles:16,  /* cycle count to last branch */
965                 reserved:44;
966 };
967
968 #endif /* _UAPI_LINUX_PERF_EVENT_H */